Residual and coefficient coding and decoding of video coding and decoding

Abstract

A method, an apparatus, and a non-transitory computer-readable storage medium for video decoding are provided. In one method, a decoder receives a sequence parameter set (SPS) Rice extension flag indicating whether an extension of Rice parameter derivation for binarization of abs_remainder and dec_abs_level is enabled. In a second method, the decoder receives a sequence parameter set (SPS) Rice adaptation enable flag indicating whether to initialize Rice parameter derivation for binarization of abs_remainder and dec_abs_level with statistics accumulated from a previous TU at the beginning of each transform unit (TU).

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority to U.S. Provisional Patent Application No. 63 / 193,593, filed May 26, 2021, the entire contents of which are incorporated herein by reference. [Technical Field]

[0002] This disclosure relates to video encoding / decoding and compression, and more particularly to improving and simplifying residual and coefficient encoding / decoding in video encoding / decoding. [Background technology]

[0003] Various video encoding and decoding techniques can be used to compress video data. Video encoding and decoding is performed according to one or more video encoding and decoding standards. For example, video encoding and decoding standards include Versatile Video Coding (VVC), Joint Search and Test Model (JEM), High Efficiency Video Coding and Decoding (H.265 / HEVC), Advanced Video Coding and Decoding (H.264 / AVC), Moving Picture Experts Committee (MPEG) Coding and Decoding, etc. Video encoding and decoding generally utilizes prediction methods (e.g., inter-prediction, intra-prediction, etc.) that exploit redundancy present in a video image or sequence. One important goal of video encoding and decoding techniques is to compress video data into a format with a lower bit rate while avoiding or minimizing degradation of video quality. Summary of the Invention

[0004] Embodiments of the present disclosure provide a video encoding / decoding method and apparatus.

[0005] According to a first aspect of the present disclosure, a video decoding method is provided. The method may include receiving, by a decoder, a sequence parameter set (SPS) Rice extension flag indicating whether extensions to Rice parameter derivation for binarization, abs_remainder and dec_abs_level, are enabled. The parameter abs_remainder indicates a first syntax element that is the remainder of level information of a coefficient coded with Golomb-Rice code and bypass-coded bins in a second pass when the remaining number of context-coded bins in the first pass is four or more. The parameter dec_abs_level indicates a second syntax element that is the current coefficient directly coded using Golomb-Rice code and bypass-coded bins in a second pass when the remaining number of context-coded bins in the first pass is less than four.

[0006] According to a second aspect of the present disclosure, a video decoding method is provided. The method may include receiving, by a decoder, a sequence parameter set (SPS) Rice adaptation enable flag indicating whether to initialize Rice parameter derivation for binarization, abs_remainder and dec_abs_level, using statistics accumulated at the beginning of each transform unit (TU) from a previous TU. The parameter abs_remainder indicates a first syntax element that is the remainder of level information of a coefficient coded with Golomb-Rice code and bypass-coded bins in a second pass when the remaining number of context-coded bins in the first pass is four or more. The parameter dec_abs_level indicates a second syntax element that is the current coefficient directly coded with Golomb-Rice code and bypass-coded bins in a second pass when the remaining number of context-coded bins in the first pass is less than four.

[0007] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not intended to be restrictive of the present disclosure. [Brief explanation of the drawings]

[0008] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the disclosure.

[0009] [Figure 1] FIG. 2 is a block diagram of an encoder according to one embodiment of the present disclosure. [Figure 2] FIG. 2 is a block diagram of a decoder according to one embodiment of the present disclosure. [Figure 3] FIG. 1 illustrates block division of a multi-type tree structure according to one embodiment of the present disclosure. [Figure 4] 1 is a diagram illustrating a residual encoding / decoding structure of a transform block according to one embodiment of the present disclosure. [Figure 5] 1 is a diagram illustrating a residual encoding and decoding structure of a transform skip block according to one embodiment of the present disclosure. [Figure 6] 1 is a method for encoding a video signal according to one embodiment of the present disclosure. [Figure 7] 1 is a method for encoding a video signal according to one embodiment of the present disclosure. [Figure 8] FIG. 1 illustrates a computing environment coupled to a user interface according to one embodiment of the present disclosure. [Figure 9] 1 illustrates a video encoding / decoding method according to one embodiment of the present disclosure. [Figure 10] 1 illustrates a video encoding / decoding method according to one embodiment of the present disclosure. [Figure 11] 1 illustrates a video encoding / decoding method according to one embodiment of the present disclosure. [Figure 12] 1 illustrates a video encoding / decoding method according to one embodiment of the present disclosure. [Figure 13] FIG. 1 is a block diagram illustrating an example system for encoding and decoding video blocks, according to one embodiment of the present disclosure. [Figure 14] FIG. 2 is a block diagram illustrating an exemplary video encoder according to one embodiment of the present disclosure. [Figure 15] FIG. 2 is a block diagram illustrating an exemplary video decoder according to one embodiment of the present disclosure. [Figure 16] 1 illustrates a low-delay transform skip residual coding and decoding (TSRC) method according to one embodiment of the present disclosure. [Figure 17] 1 illustrates a video decoding method according to one embodiment of the present disclosure. [Figure 18] 1 illustrates a video decoding method according to one embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0010] Reference will now be made in detail to specific embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the drawings in which the same numerals in different drawings represent the same or similar elements unless otherwise stated. The implementations described in the following description of exemplary embodiments do not represent all implementations consistent with the present disclosure. These are merely examples of apparatus and methods consistent with aspects related to the present disclosure as set forth in the appended claims.

[0011] The terms used in this disclosure are used only for the purpose of describing particular embodiments and are not intended to limit the disclosure. As used in this disclosure and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. Furthermore, as used herein, the term "and / or" is intended to refer to and include any and all possible combinations of one or more of the associated listed items.

[0012] As used herein, terms such as "first," "second," and "third" may be used to describe various types of information, but it should be understood that such information should not be limited to these terms. These terms are used only to distinguish one type of information from another. For example, first information could be referred to as second information, and similarly, second information could be referred to as first information, without departing from the scope of this disclosure. As used herein, the term "if" is understood to mean "when," or "when," or "depending on," depending on the context.

[0013] Figure 1 shows a general diagram of a VVC block-based video encoder. Specifically, Figure 1 shows a typical encoder 100. The encoder 100 includes a video input 110, motion compensation 112, motion estimation 114, intra / inter mode decision 116, block predictor 140, summer 128, transform 130, quantization 132, prediction-related information 142, intra prediction 118, picture buffer 120, inverse quantization 134, inverse transform 136, summer 126, memory 124, in-loop filter 122, entropy coding 138, and bitstream 144.

[0014] In encoder 100, a video frame is divided into video blocks for processing. For each given video block, a prediction is formed based on either an inter-prediction or an intra-prediction approach.

[0015] A prediction residual, which represents the difference between a current video block that is part of the video input 110 and its predictor that is part of the block predictor 140, is sent from the summer 128 to a transform 130. The transform coefficients are then sent from the transform 130 to a quantizer 132 for entropy reduction. The quantized coefficients are then provided to an entropy coder 138 to generate a compressed video bitstream. As shown in FIG. 1 , prediction-related information 142 from the intra / inter mode decision 116, such as video block partition information, motion vectors (MVs), reference picture indices, and intra prediction modes, are also provided by the entropy coder 138 and stored in a compressed bitstream 144. The compressed bitstream 144 comprises the video bitstream.

[0016] The encoder 100 also requires decoder-related circuitry to reconstruct pixels for prediction purposes. First, a prediction residual is reconstructed by inverse quantization 134 and inverse transform 136. This reconstructed prediction residual is combined with a block predictor 140 to produce unfiltered reconstructed pixels for the current video block.

[0017] Spatial prediction (or "intra prediction") predicts the current video block using pixels from samples (called reference samples) of already-encoded neighboring blocks in the same video frame as the current video block.

[0018] Temporal prediction (also called "inter-prediction") predicts a current video block using reconstructed pixels from an already coded video image. Temporal prediction reduces the temporal redundancy inherent in video signals. The temporal prediction signal for a given coding unit (CU) or coding block is typically signaled by one or more MVs that indicate the amount and direction of motion between the current CU and its temporal reference. Furthermore, if multiple reference images are supported, a reference image index is also sent and is used to identify which reference image in the reference image store the temporal prediction signal comes from.

[0019] Motion estimation 114 takes signals from video input 110 and picture buffer 120 and outputs a motion estimation signal to motion compensation 112. Motion compensation 112 takes signals from video input 110, picture buffer 120, and a motion estimation signal from motion estimation 114 and outputs a motion compensation signal to intra / inter mode decision 116.

[0020] After spatial and / or temporal prediction is performed, intra / inter mode decision 116 of encoder 100 selects an optimal prediction mode, for example, based on a rate-distortion optimization method. Block predictor 140 is then subtracted from the current video block, and the resulting prediction residual is decorrelated by transform 130 and quantization 132. The resulting quantized residual coefficients are inverse quantized by inverse quantization 134 and inverse transformed by inverse transform 136 to form a reconstructed residual, which is then added to the prediction block to form a reconstructed signal for the CU. Further in-loop filtering 122, such as a deblocking filter, sample adaptive offset (SAO), and / or adaptive in-loop filter (ALF), can be applied to the reconstructed CU before it is placed in a reference picture store in picture buffer 120 and used to encode future video blocks. To form the output video bitstream 144, the coding mode (inter or intra), prediction mode information, motion information, and quantized residual coefficients are all sent to the entropy coding unit 138 for further compression and packaging to form the bitstream.

[0021] Figure 1 is a block diagram illustrating a typical block-based hybrid video coding system. The input video signal is processed block by block (called a coding unit (CU)). In VTM-1.0, a CU can be up to 128 x 128 pixels. However, unlike HEVC, which divides blocks based solely on a quadtree, VVC divides a single coding tree unit (CTU) into CUs based on a quadtree, binary tree, or ternary tree to adapt to varying local characteristics. By definition, a coding tree block (CTB) is an N x N block of samples of some value of N, such that the division of components into CTBs is a partition. A CTU may include a CTB for luma samples for an image with a three-sample array, a corresponding CTB for two chroma samples, or a CTB for a monochrome image or an image coded with a syntax structure used to code three distinct color planes and samples. Furthermore, the concept of multiple split unit types in HEVC is removed, i.e., the separation of CU, prediction unit (PU), and transform unit (TU) no longer exists in VVC. Instead, each CU is always used as a basic unit for both prediction and transformation without further splitting. In the multi-type tree structure, a CTU is first split by a quadtree structure. Then, each quadtree leaf node can be further split by a binary tree structure and a ternary tree structure. As shown in Figures 3A, 3B, 3C, 3D, and 3E, there are five split types: 4-way split, horizontal 2-way split, vertical 2-way split, horizontal 3-way split, and vertical 3-way split.

[0022] FIG. 3A shows a diagram illustrating block quad division in a multi-type tree structure according to the present disclosure.

[0023] FIG. 3B shows a diagram illustrating vertical bisection of blocks in a multi-type tree structure according to the present disclosure.

[0024] FIG. 3C shows a diagram illustrating horizontal bisection of blocks in a multi-type tree structure according to the present disclosure.

[0025] FIG. 3D shows a diagram illustrating a vertical third division of blocks in a multi-type tree structure according to the present disclosure.

[0026] FIG. 3E shows a diagram illustrating a horizontal division of blocks into thirds in a multi-type tree structure according to the present disclosure.

[0027] In FIG. 1, spatial prediction and / or temporal prediction may be performed. Spatial prediction (or "intra prediction") predicts a current video block using pixels from samples (called reference samples) of already coded neighboring blocks of the same video image / slice. Spatial prediction reduces spatial redundancy inherent in video signals. Temporal prediction (also called "inter prediction" or "motion-compensated prediction") predicts a current video block using reconstructed pixels from already coded video images. Temporal prediction reduces temporal redundancy inherent in video signals. The temporal prediction signal for a given CU is typically signaled by one or more motion vectors (MVs), which indicate the amount and direction of motion between the current CU and its temporal reference. If multiple reference images are supported, a reference image index is also sent and used to identify which reference image in the reference image store the temporal prediction signal comes from. After spatial and / or temporal prediction, a mode decision block of the encoder selects an optimal prediction mode, for example, based on a rate-distortion optimization method. The prediction block is then subtracted from the current video block, and the prediction residual is de-correlated using a transform and quantized. The quantized residual coefficients are inverse quantized and inverse transformed to form a reconstructed residual, which is then added back to the prediction block to form a reconstructed signal for the CU. Furthermore, in-loop filtering, such as a deblocking filter, sample adaptive offset (SAO), and adaptive in-loop filter (ALF), can be applied to the reconstructed CU before it is placed in a reference picture store and used to encode future video blocks. To form an output video bitstream, the coding mode (inter or intra), prediction mode information, motion information, and quantized residual coefficients are all sent to an entropy coding unit for further compression and packing to form the bitstream.

[0028] Figure 2 shows a general block diagram of a video decoder for VVC. Specifically, Figure 2 shows a block diagram of an exemplary decoder 200. The decoder 200 includes a bitstream 210, entropy decoding 212, inverse quantization 214, inverse transform 216, adder 218, intra / inter mode selection 220, intra prediction 222, memory 230, in-loop filter 228, motion compensation 224, picture buffer 226, prediction-related information 234, and video output 232.

[0029] The decoder 200 is similar to the reconstruction-related parts present in the encoder 100 of Figure 1. In the decoder 200, an input video bitstream 210 is first decoded by entropy decoding 212 to derive quantized coefficient levels and prediction-related information. The quantized coefficient levels are then processed by inverse quantization 214 and inverse transform 216 to obtain a reconstructed prediction residual. A block predictor mechanism implemented in intra / inter mode selection 220 is configured to perform intra prediction 222 or motion compensation 224 based on the decoded prediction information. A set of unfiltered reconstructed pixels is obtained by summing the reconstructed prediction residual from the inverse transform 216 and the prediction output generated by the block predictor mechanism using an adder 218.

[0030] The reconstructed blocks may further pass through an in-loop filter 228 before being stored in an image buffer 226, which acts as a reference image store. The reconstructed video in the image buffer 226 may be sent to drive a display device as well as used to predict future video blocks. In situations where the in-loop filter 228 is turned on, a filtering operation is performed on these reconstructed pixels to derive the final reconstructed video output 232.

[0031] Figure 2 shows a general block diagram of a block-based video decoder. The video bitstream is first entropy decoded in an entropy decoding unit. Coding mode and prediction information are sent to a spatial prediction unit (if intra-coded) or a temporal prediction unit (if inter-coded) to form a prediction block. The residual transform coefficients are sent to an inverse quantization unit and an inverse transform unit to reconstruct a residual block. The prediction block and the residual block are then added. The reconstructed block may undergo further in-loop filtering before being stored in a reference picture store. The reconstructed video in the reference picture store is then sent to drive a display device as well as being used to predict future video blocks. Transform Coefficient Coding in VVC

[0032] In transform coefficient encoding / decoding in VVC, the variable remBinsPass1 is initially set to the maximum number of context-coded bins (MCCB) allowed. During the encoding / decoding process, the variable is decremented by 1 for each context-coded bin signaled. If remBinsPass1 is 4 or greater, all coefficients are first signaled using context-coded bins in the first pass with the syntax elements sig_coeff_flag, abs_level_gt1_flag, par_level_flag, and abs_level_gt3_flag. The remainder of the coefficient's level information is coded in the second pass using Golomb-Rice coding and bypass-coded bins with the syntax element abs_remainder. If remBinsPass1 becomes less than 4 during first-pass encoding, the current coefficient is not coded in the first pass, but is directly coded in the second pass using Golomb-Rice coding and bypass-coded bins with the syntax element dec_abs_level. The Rice parameter derivation process for dec_abs_level[] is derived as specified in Table 1A. After all the above level encodings, the signs (sign_flag) of all scan positions where sig_coeff_flag is equal to 1 are finally coded as bypass bins. This process is shown in Figure 4. remBinsPass1 is reset for each TB. The transition from using context-coded bins for sig_coeff_flag, abs_level_gt1_flag, par_level_flag, and abs_level_gt3_flag to using bypass-coded bins for the remaining coefficients occurs at most once per TB. For a coefficient sub-block, if remBinsPass1 is less than 4 before coding the first coefficient of the coefficient sub-block, the entire coefficient sub-block is coded using bypass-coded bins.

[0033] FIG. 4 shows a diagram of the residual coding and decoding structure of a transform block. JPEG0007721685000001.jpg162162JPEG0007721685000002.jpg69163Residual coding and decoding in transform skip mode in VVC

[0034] In transform skip mode, the statistical properties of the residual signal are different from those of the transform coefficients, and energy compaction around low-frequency components is not observed. The residual coding is modified to take into account the different signal properties of the (spatial) transform skip residual.

[0035] FIG. 5 shows a diagram of the residual coding structure of a transform skip block. General constraint information

[0036] The GCI structure contains several types of constraint syntax elements, including flags for general bitstream restrictions such as indicating that only intra-coding is used, that all layers are coded independently, or that the bitstream contains only one AU; fields that constrain the bit depth and chroma format of the coded picture; flags that indicate that certain NAL unit types cannot be present in the bitstream; flags that constrain how pictures can be divided into slices, tiles, and sub-pictures in the bitstream; flags that constrain the size of the CTU and the size and type of the partition tree; flags that constrain the use of certain intra-coding tools; flags that constrain the use of certain inter-coding tools; flags that constrain transform, quantization, and residual coding tools; and flags that constrain aspects of the in-loop filter.

[0037] The purpose of the GCI syntax structure is to allow easy discovery of configuration information about features required for decoding a bitstream and to enable signaling of interoperability points that impose restrictions beyond those specified in a profile, tier, and level (PTL) at a finer granularity than allowed in previous video coding and decoding standards. Similar to subprofiles, the GCI syntax structure allows interoperability to be defined for decoder implementations that do not support all features of a VVC profile but address the needs of a particular application. Decoder implementations may examine GCI syntax elements to determine whether a bitstream avoids the use of certain features in order to determine how to configure the decoding process and to identify whether the bitstream is decodable by the decoder. Decoder implementations that support all features of a VVC profile can ignore the values of GCI syntax elements, since the decoder can decode any bitstream that conforms to the specified PTL. Transform skip residual coding and decoding

[0038] In a 27th aspect of the present disclosure, it is proposed to use a variable set of binary codewords to encode / decode specific syntax elements such as abs_remainder in transform skip residual encoding / decoding, where the selection is determined depending on specific coded information of the current block, such as quantization parameters or coding bit depth associated with TB / CB and / or slice / profile, and / or depending on new flags such as extended_precision_processing_flag associated with TB / CB / slice / image / sequence level. The variable set of binary codewords may be derived in different ways, and some exemplary ways are listed below.

[0039] First, the same procedure as that for determining the sign word of abs_remainder currently used in VVC is used, but a fixed Rice parameter (e.g., 2, 3, 4, 5, 6, 7, or 8) is always selected. The fixed value may vary under different conditions according to specific encoded information of the current block such as the quantization parameter associated with the TB / CB and / or slice / profile, frame type (e.g., I, P, or B), component ID (e.g., luminance or chrominance), color format (e.g., 420, 422, or 444), or encoded bit depth, and / or according to syntax elements such as rice_parameter_value associated with the TB / CB / slice / image / sequence level. As one specific example, TH1 to TH4 are predetermined threshold values satisfying (TH1 < TH2 < TH3 < TH4), and K0 to K4 are predetermined Rice parameters. In practice, even if it is the same logic, it may be implemented differently. For example, the same Rice parameter may be derived from the bit depth value of the current CU / sequence using a specific formula or look-up table.

[0040] Second, fixed-length binarization.

[0041] Third, truncated Rice binarization.

[0042] Fourth, the binarization process of truncated binary (TB).

[0043] Fifth, the k-th exponential Golomb binarization process (EGk).

[0044] Sixth, restricted k-th exponential Golomb binarization.

[0045] An example of the corresponding decoding process based on the VVC draft is shown below. Changes to the VVC draft are shown in bold italic font in Table 1, and the deleted content is shown in italic font. In practice, even if it is the same logic, it may be implemented differently. For example, the same Rice parameter may be derived using a specific formula or look-up table. JPEG0007721685000003.jpg100163

[0046] In another embodiment, it is proposed to use only one fixed value of the Rice parameter in encoding / decoding the syntax element abs_remainder when a new flag such as extended_precision_processing_flag is equal to 1. The corresponding decoding process based on the VVC draft is shown below, with changes indicated in bold italic font and deleted content indicated in italic font. Changes to the VVC draft are shown in bold italic font in Table 2. JPEG0007721685000004.jpg126163

[0047] In yet another embodiment, when a new flag such as extended_precision_processing_flag is equal to 1, the rice parameter cRiceParam is fixed to n, where n is a positive number (e.g., 2, 3, 4, 5, 6, 7, or 8). The fixed value may be different under different conditions. An example of the corresponding decoding process based on the VVC draft is shown below, where changes are indicated in bold italic font and deleted content is indicated in italic font. Changes to the VVC draft are shown in bold italic font in Table 3. JPEG0007721685000005.jpg86164

[0048] In yet another embodiment, if BitDepth is greater than or equal to a predetermined threshold (e.g., 10, 11, 12, 13, 14, 15, or 16), the Rice parameter cRiceParam is fixed to n, where n is a positive number, e.g., 4, 5, 6, 7, or 8. The fixed value may be different under different conditions. An example of the corresponding decoding process based on the VVC draft is shown below, where TH is a predetermined threshold (e.g., 10, 11, 12, 13, 14, 15, or 16), and changes are indicated in bold italic font, and deleted content is indicated in italic font. Changes to the VVC draft are shown in bold italic font in Table 4. JPEG0007721685000006.jpg82164

[0049] In yet another embodiment, one control flag indicating whether signaling of the Rice parameter for the transform skip block is enabled or disabled is signaled in the slice header. If the control flag is signaled as enabled, one syntax element indicating the Rice parameter of the transform skip slice is further signaled for each transform skip slice. If the control flag is signaled as disabled (e.g., set equal to "0"), no further syntax elements indicating the Rice parameter of the transform skip slice are signaled at the lower level, and a default Rice parameter (e.g., 1) is used for all transform skip slices. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predetermined value (e.g., 0, 1, 2), changes are indicated in bold italic font, and deleted content is indicated in italic font. Changes to the VVC draft are shown in bold italic font in Table 5. Note that sh_ts_residual_coding_rice_index can be coded differently and / or may have a maximum value. For example, an n-bit unsigned integer u(n) or an n-bit fixed-pattern bit string f(n) written left bit first (left to right) may be used to encode / decode the same syntax element. Slice Header Syntax JPEG0007721685000007.jpg103167

[0050] sh_ts_residual_coding_rice_flag equal to 1 specifies that sh_ts_residual_coding_rice_index may be present for the current slice. sh_ts_residual_coding_rice_flag equal to 0 specifies that sh_ts_residual_coding_rice_index is not present for the current slice. If sh_ts_residual_coding_rice_flag is not present, the value of sh_ts_residual_coding_rice_flag is inferred to be equal to 0.

[0051] sh_ts_residual_coding_rice_index specifies the rice parameter used in the residual_ts_coding() syntax construct. JPEG0007721685000008.jpg91167

[0052] In yet another embodiment, one control flag indicating whether signaling of Rice parameters for transform skip blocks is enabled or disabled is signaled in the sequence parameter set (or in the sequence parameter set range extension syntax). If the control flag is signaled as enabled, one syntax element indicating the Rice parameter of the transform skip slice is further signaled for each transform skip slice. If the control flag is signaled as disabled (e.g., set equal to "0"), no further syntax elements indicating the Rice parameters of the transform skip slices are signaled at the lower level, and a default Rice parameter (e.g., 1) is used for all transform skip slices. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a predetermined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold italic font in Table 7, and deleted content is shown in italic font. Note that sh_ts_residual_coding_rice_idx can be coded differently and / or may have a maximum value. For example, an n-bit unsigned integer u(n) or an n-bit fixed-pattern bit string f(n) written left bit first (left to right) may be used to encode / decode the same syntax element. Sequence Parameter Set RBSP Syntax JPEG0007721685000009.jpg58164

[0053] sps_ts_residual_coding_rice_present_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx may be present in SH syntax structures that reference an SPS. sps_ts_residual_coding_rice_present_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx is not present in SH syntax structures that reference an SPS. If sps_ts_residual_coding_rice_present_in_sh_flag is not present, the value of sps_ts_residual_coding_rice_present_in_sh_flag is inferred to be equal to 0. Slice Header Syntax JPEG0007721685000010.jpg86164

[0054] sh_ts_residual_coding_rice_idx specifies the rice parameter used in the residual_ts_coding() syntax construct. JPEG0007721685000011.jpg92165

[0055] In one or more embodiments of the present disclosure, it is proposed to disable the presence of the Rice parameter for transform skip residual coding when transform skip is disabled. In one specific example, to meet such design objective, it is proposed to use sps_transform_skip_enabled_flag to condition on the presence of sps_ts_residual_coding_rice_present_in_sh_flag. For example, if the flag sps_transform_skip_enabled_flag is equal to 0 (i.e., transform skip is disabled for the current picture), sps_ts_residual_coding_rice_present_in_sh_flag is not signaled and is inferred to be 0. If the flag sps_transform_skip_enabled_flag is equal to 1, sps_ts_residual_coding_rice_present_in_sh_flag is also signaled. Changes to the current VVC working draft are indicated in italic font below. JPEG0007721685000012.jpg26163

[0056] In another example, to meet such design objectives, it is proposed to add a bitstream conformance requirement for sps_transform_skip_enabled_flag to sps_ts_residual_coding_rice_present_in_sh_flag. For example, if sps_transform_skip_enabled_flag is equal to 0, then it is a bitstream conformance requirement that the value of sps_ts_residual_coding_rice_present_in_sh_flag be equal to 0. Changes to the current VVC Working Draft are shown in italic font below. Sequence parameter set setting range extended semantics

[0057] sps_ts_residual_coding_rice_present_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx_minus1 may be present in the slice_header() syntax structure referencing the SPS. sps_ts_residual_coding_rice_present_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx_minus1 is not present in the slice_header() syntax structure referencing the SPS. If sps_ts_residual_coding_rice_present_in_sh_flag is not present, the value of sps_ts_residual_coding_rice_present_in_sh_flag is inferred to be equal to 0.

[0058] If sps_transform_skip_enabled_flag is equal to 0, it is a bitstream conformance requirement that the value of sps_ts_residual_coding_rice_present_in_sh_flag is equal to 0.

[0059] In yet another embodiment, if the transform skip flag (sps_transform_skip_enabled_flag) is signaled as enabled, one control flag indicating whether signaling of Rice parameters for transform skip blocks is enabled or disabled is signaled in the sequence parameter set (or in the sequence parameter set range extension syntax). If the control flag is signaled as enabled, one syntax element indicating the Rice parameter of the transform skip slice is further signaled for each transform skip slice. If the control flag is signaled as disabled (e.g., set equal to "0"), at the lower level, no further syntax elements indicating the Rice parameter of the transform skip slice are signaled, and a default Rice parameter (e.g., 1) is used for all transform skip slices. An example of a corresponding decoding process based on the VVC draft is shown below. Changes to the VVC draft are indicated in italic font. Sequence Parameter Set RBSP Syntax JPEG0007721685000013.jpg62165

[0060] sps_ts_residual_coding_rice_present_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx may be present in SH syntax structures that reference the SPS. sps_ts_residual_coding_rice_present_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx_minus1 is not present in SH syntax structures that reference the SPS. If sps_ts_residual_coding_rice_present_in_sh_flag is not present, the value of sps_ts_residual_coding_rice_present_in_sh_flag is inferred to be equal to 0. Slice Header Syntax JPEG0007721685000014.jpg83165

[0061] sh_ts_residual_coding_rice_idx_minus1 plus 1 specifies the rice parameter used in the residual_ts_coding() syntax construct. If sh_ts_residual_coding_rice_idx_minus1 is not present, the value of sh_ts_residual_coding_rice_idx_minus1 is inferred to be equal to 0.

[0062] 9.3.3.11 abs_remainder[] thresholding process

[0063] The input to this process is the syntax element abs_remainder[n], the color components Index The binarization request is for cIdx, the current sub-block index i, the luminance position (x0, y0) that specifies the top left sample of the current luminance transformation block relative to the top left luminance sample of the image, the current coefficient scan position (xC, yC), the binary logarithm of the transformation block width log2TbWidth, and the binary logarithm of the transformation block height log2TbHeight.

[0064] The output of this process is a binarization of the syntax elements.

[0065] The variables lastAbsRemainder and lastRiceParam are derived as follows:

[0066] If this process is invoked for the first time for the current subblock index i, then lastAbsRemainder and lastRiceParam are both set equal to 0.

[0067] - Otherwise (if this process is not the first time it is invoked for the current subblock index i), lastAbsRemainder and lastRiceParam are set equal to the values of abs_remainder[n] and cRiceParam, respectively, derived during the last invocation of the binarization process for the syntax element abs_remainder[n] specified in this section.

[0068] The rice parameter cRiceParam is derived as follows:

[0069] If -transform_skip_flag[x0][y0][cIdx] is equal to 1 and sh_ts_residual_coding_disabled_flag is equal to 0, then the rice parameter cRiceParam is set equal to sh_ts_residual_coding_rice_idx_minus1+1.

[0070] Otherwise, the Rice parameter cRiceParam is derived by invoking the Rice parameter derivation process in abs_remainder[] specified in Section 9.3.3.2 with the variable baseLevel set equal to 4, the color component index cIdx, the luminance position (x0,y0), the current coefficient scan position (xC,yC), the binary logarithm of the transform block width log2TbWidth, and the binary logarithm of the transform block height log2TbHeight as input.

[0071] In yet another embodiment, one syntax element is signaled for each transform skip slice, indicating the Rice parameter of the transform skip slice. An example of the corresponding decoding process based on the VVC draft is shown below. The changes to the VVC draft are shown in bold italic font in Table 10. Note that sh_ts_residual_coding_rice_idx can be coded in different ways and / or may have a maximum value. For example, u(n), an n-bit unsigned integer, or f(n), an n-bit fixed-pattern bit string written left bit first (left to right), may be used to encode / decode the same syntax element. Slice Header Syntax JPEG0007721685000015.jpg81165

[0072] sh_ts_residual_coding_rice_idx specifies the rice parameter used in the residual_ts_coding() syntax construct. If sh_ts_residual_coding_rice_idx is not present, the value of sh_ts_residual_coding_rice_idx is inferred to be equal to 0. JPEG0007721685000016.jpg62165

[0073] In yet another embodiment, one control flag indicating whether signaling of Rice parameters for transform skip blocks is enabled or disabled is signaled within the picture parameter set range extension syntax. If the control flag is signaled as enabled, one syntax element indicating the Rice parameters for that picture is further signaled. If the control flag is signaled as disabled (e.g., set equal to "0"), no further syntax elements indicating Rice parameters for transform skip slices are signaled at the lower level, and a default Rice parameter (e.g., 1) is used for all transform skip slices. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a pre-defined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold italic font in Table 12. Note that pps_ts_residual_coding_rice_idx can be coded differently and / or may have a maximum value. For example, an n-bit unsigned integer u(n) or an n-bit fixed-pattern bit string f(n) written left bit first (left to right) may be used to encode / decode the same syntax element. Image Parameter Set Range Extension Syntax JPEG0007721685000017.jpg58165

[0074] pps_ts_residual_coding_rice_flag equal to 1 specifies that pps_ts_residual_coding_rice_index may be present in the current picture. pps_ts_residual_coding_rice_flag equal to 0 specifies that pps_ts_residual_coding_rice_idx is not present in the current picture. If pps_ts_residual_coding_rice_flag is not present, the value of pps_ts_residual_coding_rice_flag is inferred to be equal to 0.

[0075] pps_ts_residual_coding_rice_idx specifies the rice parameter used in the residual_ts_coding() syntax structure. JPEG0007721685000018.jpg93165

[0076] In yet another embodiment, it is proposed to use only the varying Rice parameter in encoding the syntax element abs_remainder. The value of the applied Rice parameter may be determined according to specific coded information of the current block, such as the block size, quantization parameter, bit depth, and transform type. In one specific embodiment, it is proposed to adjust the Rice parameter based on the coding bit depth and the quantization parameter applied to one CU. An example of a corresponding decoding process based on the VVC draft is shown below, where changes to the VVC draft are indicated in bold italic font in Table 14, and deleted content is indicated in italic font. Note that in practice, the same logic may be implemented differently. For example, the same Rice parameter may be derived using a specific formula or lookup table. JPEG0007721685000019.jpg217164

[0077] In yet another embodiment, the corresponding decoding process based on the VVC draft is shown below, where TH is a predetermined threshold (e.g., 33 or 34). Changes to the VVC draft are shown in bold italic font in Table 15, and deleted content is shown in italic font. Note that in practice, the same logic may be implemented differently. For example, a specific formula or lookup table may be used to derive the same Rice parameters. JPEG0007721685000020.jpg73165

[0078] In yet another embodiment, the corresponding decoding process based on the VVC draft is shown below: A and TH B is a predetermined threshold (e.g., THA =8,TH B = 33 or 34). Changes to the VVC draft are shown in bold italic font in Table 16, and deletions are shown in italic font. Note that in practice, the same logic may be implemented differently. For example, a specific formula or lookup table may be used to derive the same Rice parameters. JPEG0007721685000021.jpg73165

[0079] In yet another embodiment, it is proposed to use only the varying Rice parameter in the encoding / decoding of the syntax element abs_remainder when a new flag such as extended_precision_processing_flag is equal to 1. The varying value may be determined according to specific coded information of the current block, such as block size, quantization parameter, bit depth, and transform type. In one specific embodiment, it is proposed to adjust the Rice parameter based on the coding bit depth and the quantization parameter applied to one CU. The corresponding decoding process based on the VVC draft is shown below. The changes to the VVC draft are shown in bold italic font in Table 17. Note that in practice, the same logic may be implemented differently. For example, the same Rice parameter may be derived using a specific formula or lookup table. JPEG0007721685000022.jpg165165

[0080] In yet another embodiment, the corresponding decoding process based on the VVC draft is shown below, where TH is a predetermined threshold (e.g., 18, 19). Changes to the VVC draft are shown in bold italic font in Table 18. Note that in practice, the same logic may be implemented differently. For example, a specific formula or lookup table may be used to derive the same Rice parameters. JPEG0007721685000023.jpg91166

[0081] In yet another embodiment, the corresponding decoding process based on the VVC draft is shown below: A and TH B is a predetermined threshold (e.g., TH A =8,TH B = 18 or 19). Changes to the VVC draft are shown in bold italic font in Table 19. Note that in practice, the same logic may be implemented differently. For example, a specific formula or lookup table may be used to derive the same Rice parameters. JPEG0007721685000024.jpg99166

[0082] FIG. 6 illustrates a video encoding method. This method may be applied to, for example, an encoder. In step 1610, the encoder may receive a video input. The video input may be, for example, a live stream. In step 1612, the encoder may obtain a quantization parameter based on the video input. The quantization parameter may be calculated, for example, by a quantization unit in the encoder. In step 1614, the encoder may derive a Rice parameter based on at least one predetermined threshold, the coding bit depth, and the quantization parameter. The Rice parameter may be used, for example, to signal the abs_remainder and dec_abs_level syntax. In step 1616, the encoder may entropy code a video bitstream based on the Rice parameter. The video bitstream may be entropy coded, for example, to generate a compressed video bitstream.

[0083] In yet another embodiment, it is proposed to use only fixed values (e.g., 2, 3, 4, 5, 6, 7, or 8) for the Rice parameter in encoding the syntax element abs_remainder when BitDepth is greater than 10. The fixed value may vary under different conditions depending on the specific coded information of the current block, such as the quantization parameter. The corresponding decoding process based on the VVC draft is shown below, where TH is a predetermined threshold (e.g., 18, 19). The changes to the VVC draft are shown in bold italic font in Table 20. Note that in practice, the same logic may be implemented differently. For example, the same Rice parameter may be derived using a specific formula or lookup table. JPEG0007721685000025.jpg88167

[0084] In yet another embodiment, the corresponding decoding process based on the VVC draft is shown below: A and TH B is a predetermined threshold (e.g., TH A =8,TH B = 18 or 19). Changes to the VVC draft are shown in bold italic font in Table 21. Note that in practice, the same logic may be implemented differently. For example, a specific formula or lookup table may be used to derive the same Rice parameters. JPEG0007721685000026.jpg92167

[0085] In yet another embodiment, the corresponding decoding process based on the VVC draft is shown below, where TH is a predetermined threshold (e.g., 33 or 34). Changes to the VVC draft are shown in bold italic font in Table 22. Note that in practice, the same logic may be implemented differently. For example, a specific formula or lookup table may be used to derive the same Rice parameters. JPEG0007721685000027.jpg92165

[0086] In yet another embodiment, the corresponding decoding process based on the VVC draft is shown below: A and TH B is a predetermined threshold (e.g., TH A =8,TH B = 33 or 34). Changes to the VVC draft are shown in bold italic font in Table 23. Note that in practice, the same logic may be implemented differently. For example, a specific formula or lookup table may be used to derive the same Rice parameters. JPEG0007721685000028.jpg92165

[0087] It should be noted that in the above description, the formula used to calculate the specific Rice parameter is used only as an example to explain the proposed idea. Those skilled in the art of modern video coding technology can already apply other mapping functions (or equivalent mapping formulas) to this proposed idea (i.e., determine the Rice parameter for the transform skip mode based on the coded bits and the applied quantization parameter). Meanwhile, it should also be noted that in the current VVC design, the value of the applied quantization parameter can be changed at the coded block group level. Therefore, the proposed Rice parameter adjustment scheme can provide flexible adaptation of the Rice parameter for the transform skip mode at the coded block group level. Signaling information for normal residual coding / decoding and transform-skip residual coding / decoding

[0088] In a 28th aspect of the present disclosure, it is proposed to signal the Rice parameters of binary codewords for encoding specific syntax elements such as abs_remainder in transform skip residual coding / decoding, and to shift and offset parameters for deriving the Rice parameters used for abs_remainder / dec_abs_level in normal residual coding / decoding, and to decide whether to signal depending on specific coded information of the current block such as quantization parameters or coding bit depth associated with TB / CB and / or slice / profile, and / or depending on a new flag such as sps_residual_coding_info_present_in_sh_flag associated with TB / CB / slice / image / sequence level.

[0089] In one embodiment, one control flag is signaled in the slice header to indicate whether signaling of Rice parameters for transform skip blocks and signaling of shift and / or offset parameters for deriving the Rice parameters in the transform blocks are enabled or disabled. If the control flag is signaled as enabled, one syntax element indicating the Rice parameters of the transform skip slice is further signaled for each transform skip slice, and two syntax elements indicating shift and / or offset parameters for deriving the Rice parameters of the transform slice are further signaled for each transform slice. If the control flag is signaled as disabled (e.g., set equal to “0”), no further syntax elements indicating Rice parameters of the transform skip slice are signaled at a lower level, and default Rice parameters (e.g., 1) are used for all transform skip slices, and no further syntax elements indicating shift and offset parameters for deriving the Rice parameters of the transform slices are signaled at a lower level, and default shift and / or offset parameters (e.g., 0) are used for all transform slices. An example of the corresponding decoding process based on the VVC draft is shown below, where TH is a predetermined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold italic font in Table 24. Note that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_index can be coded in different ways and / or may have maximum values. For example, u(n), an n-bit unsigned integer, or f(n), an n-bit fixed-pattern bit string written left bit first (left to right), may be used to code / decode the same syntax element.

[0090] Figure 7 shows the video sign17 illustrates a coding method for a video bitstream. This method may be applied to, for example, an encoder. In step 1710, the encoder may receive a video input. In step 1712, the encoder may signal a Rice parameter of a binary codeword for encoding a syntax element. The encoded syntax element may include abs_remainder in transform skip residual coding. In step 1714, the encoder may entropy code a video bitstream based on the Rice parameter and the video input. Slice Header Syntax JPEG0007721685000029.jpg148165

[0091] sh_residual_coding_rice_flag equal to 1 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_residual_coding_rice_index may be present for the current slice. sh_residual_coding_rice_flag equal to 0 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_residual_coding_rice_index are not present for the current slice.

[0092] sh_residual_coding_rice_shift specifies the shift parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. If sh_residual_coding_rice_shift is not present, the value of sh_residual_coding_rice_shift is inferred to be equal to 0.

[0093] sh_residual_coding_rice_offset specifies the offset parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. If sh_residual_coding_rice_offset is not present, the value of sh_residual_coding_rice_offset is inferred to be equal to 0.

[0094] sh_ts_residual_coding_rice_index specifies the rice parameter used in the residual_ts_coding() syntax construct. If sh_ts_residual_coding_rice_index is not present, the value of sh_ts_residual_coding_rice_index is inferred to be equal to 0. JPEG0007721685000030.jpg108166JPEG0007721685000031.jpg182165

[0095] In another embodiment, one control flag is signaled in the sequence parameter set (or sequence parameter set range extension syntax) indicating whether signaling of Rice parameters for transform skip blocks and signaling of shift and / or offset parameters for deriving Rice parameters in transform blocks are enabled or disabled. If the control flag is signaled as enabled, one syntax element indicating Rice parameters for the transform skip slice is further signaled for each transform skip slice, and two syntax elements indicating shift and / or offset parameters for deriving Rice parameters for the transform slice are further signaled for each transform slice. If the control flag is signaled as disabled (e.g., set equal to "0"), no further syntax elements indicating Rice parameters for transform skip slices are signaled at the lower level, and default Rice parameters (e.g., 1) are used for all transform skip slices; and no further syntax elements indicating shift and / or offset parameters for deriving Rice parameters for transform slices are signaled at the lower level, and default shift and / or offset parameters (e.g., 0) are used for all transform slices. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a pre-defined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold italic font in Table 27. Note that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx may be coded differently and / or may have maximum values. For example, an n-bit unsigned integer u(n) or an n-bit fixed-pattern bit string f(n) written left bit first (left to right) may be used to encode / decode the same syntax element. Sequence Parameter Set RBSP Syntax JPEG0007721685000032.jpg59165

[0096] sps_residual_coding_info_present_in_sh_flag equal to 1 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx may be present in SH syntax structures that reference the SPS. sps_residual_coding_info_present_in_sh_flag equal to 0 specifies that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx are not present in SH syntax structures that reference the SPS. If sps_residual_coding_info_present_in_sh_flag is not present, the value of sps_residual_coding_info_present_in_sh_flag is inferred to be equal to 0.

[0097] Slice Header Syntax JPEG0007721685000033.jpg116165

[0098] sh_residual_coding_rice_shift specifies the shift parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. If sh_residual_coding_rice_shift is not present, the value of sh_residual_coding_rice_shift is inferred to be equal to 0.

[0099] sh_residual_coding_rice_offset specifies the offset parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. If sh_residual_coding_rice_offset is not present, the value of sh_residual_coding_rice_offset is inferred to be equal to 0.

[0100] sh_ts_residual_coding_rice_idx specifies the rice parameter used in the residual_ts_coding() syntax construct. If sh_ts_residual_coding_rice_index is not present, the value of sh_ts_residual_coding_rice_index is inferred to be equal to 0. JPEG0007721685000034.jpg106165JPEG0007721685000035.jpg182163

[0101] In yet another embodiment, for each transform skip slice, one syntax element indicating the Rice parameter of the transform skip slice is signaled, and for each transform slice, two syntax elements indicating shift and / or offset parameters for deriving the Rice parameter of the transform slice are signaled. An example of the corresponding decoding process based on the VVC draft is shown below. The changes to the VVC draft are shown in bold italic font in Table 31. Note that sh_residual_coding_rice_shift, sh_residual_coding_rice_offset, and sh_ts_residual_coding_rice_idx can be coded in different ways and / or may have maximum values. For example, u(n), an n-bit unsigned integer, or f(n), an n-bit fixed-pattern bit string written left bit first (left to right), may be used to code / decode the same syntax element. Slice Header Syntax JPEG0007721685000036.jpg101166

[0102] sh_ts_residual_coding_rice_idx specifies the rice parameter used in the residual_ts_coding() syntax construct. If sh_ts_residual_coding_rice_idx is not present, the value of sh_ts_residual_coding_rice_idx is inferred to be equal to 0.

[0103] sh_residual_coding_rice_offset specifies the offset parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. If sh_residual_coding_rice_offset is not present, the value of sh_residual_coding_rice_offset is inferred to be equal to 0.

[0104] sh_ts_residual_coding_rice_idx specifies the rice parameter used in the residual_ts_coding() syntax construct. If sh_ts_residual_coding_rice_index is not present, the value of sh_ts_residual_coding_rice_index is inferred to be equal to 0. JPEG0007721685000037.jpg81166JPEG0007721685000038.jpg183166

[0105] In yet another embodiment, one control flag is signaled in the picture parameter set range extension syntax indicating whether the signaling of Rice parameters for transform skip blocks and the signaling of shift and / or offset parameters for deriving the Rice parameters in transform blocks are enabled or disabled. If the control flag is signaled as enabled, one syntax element indicating Rice parameters for transform skip residual coding of the picture is further signaled, and two syntax elements indicating shift and / or offset parameters for deriving the Rice parameters for regular residual coding of the picture are further signaled. If the control flag is signaled as disabled (e.g., set equal to "0"), no further syntax elements indicating Rice parameters for transform skip residual coding are signaled at the lower level, and default Rice parameters (e.g., 1) are used for all transform skip residual coding; and no further syntax elements indicating shift and / or offset parameters for deriving Rice parameters for regular residual coding are signaled at the lower level, and default shift and / or offset parameters (e.g., 0) are used for all regular residual coding. An example of a corresponding decoding process based on the VVC draft is shown below, where TH is a pre-defined value (e.g., 0, 1, 2). Changes to the VVC draft are shown in bold italic font in Table 34. Note that pps_residual_coding_rice_shift, pps_residual_coding_rice_offset, and pps_ts_residual_coding_rice_idx may be coded differently and / or may have maximum values. For example, an n-bit unsigned integer u(n) or an n-bit fixed-pattern bit string f(n) written left bit first (left to right) may be used to encode / decode the same syntax element. Image Parameter Set Range Extension Syntax JPEG0007721685000039.jpg77165

[0106] pps_residual_coding_info_flag equal to 1 specifies that pps_residual_coding_rice_shift, pps_residual_coding_rice_offset, and pps_ts_residual_coding_rice_index may be present in the current picture. pps_residual_coding_info_flag equal to 0 specifies that pps_residual_coding_rice_shift, pps_residual_coding_rice_offset, and pps_ts_residual_coding_rice_idx are not present in the current picture. If pps_residual_coding_info_flag is not present, the value of pps_residual_coding_info_flag is inferred to be equal to 0.

[0107] pps_residual_coding_rice_shift specifies the shift parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. If pps_residual_coding_rice_shift is not present, the value of pps_residual_coding_rice_shift is inferred to be equal to 0.

[0108] pps_residual_coding_rice_offset specifies the offset parameter used in the Rice parameter derivation process for abs_remainder[] and dec_abs_level[]. If pps_residual_coding_rice_offset is not present, the value of pps_residual_coding_rice_offset is inferred to be equal to 0.

[0109] pps_ts_residual_coding_rice_idx specifies the rice parameter used in the residual_ts_coding() syntax structure. If pps_ts_residual_coding_rice_index is not present, the value of pps_ts_residual_coding_rice_index is inferred to be equal to 0. JPEG0007721685000040.jpg105155JPEG0007721685000041.jpg183165

[0110] In the 29th aspect of the present disclosure, it is proposed to use different Rice parameters for coding specific syntax elements such as abs_remainder in transform skip residual coding / decoding, and to shift and offset parameters for deriving the Rice parameters used for abs_remainder / dec_abs_level in normal residual coding / decoding, and to decide which one to use depending on specific coded information of the current block such as quantization parameters or coding bit depth associated with TB / CB and / or slice / profile, and / or depending on a new flag such as sps_residual_coding_info_present_in_sh_flag associated with TB / CB / slice / image / sequence level.

[0111] In one embodiment, one control flag is signaled in the slice header to indicate whether the derivation process of the Rice parameters for the transform skip block and the derivation process of the shift and / or offset parameters for the Rice parameters in the transform block are enabled or disabled. When the control flag is signaled as enabled, the Rice parameters may vary under different conditions depending on specific coded information of the current block, such as the quantization parameter and bit depth. Also, the shift and / or offset parameters for deriving the Rice parameters in normal residual coding may vary under different conditions depending on specific coded information of the current block, such as the quantization parameter and bit depth. When the control flag is signaled as disabled (e.g., set equal to "0"), default Rice parameters (e.g., 1) are used for all transform skip slices and / or default shift and / or offset parameters (e.g., 0) are used for all transform slices. An example of a corresponding decoding process based on the VVC draft is shown below, and TH A and TH B is a predetermined threshold (e.g., TH A =8,TH B = 18 or 19). Changes to the VVC draft are shown in bold italic font in Table 37. Note that in practice, the same logic may be implemented differently. For example, a specific formula or lookup table may be used to derive the same Rice parameter. Slice Header Syntax JPEG0007721685000042.jpg62165

[0112] sh_residual_coding_rice_flag equal to 1 specifies that a bit-depth dependent Rice parameter derivation process is used for the current slice. sh_residual_coding_rice_flag equal to 0 specifies that a bit-depth dependent Rice parameter derivation process is not used for the current slice. JPEG0007721685000043.jpg106164JPEG0007721685000044.jpg203167

[0113] In yet another embodiment, the corresponding decoding process based on the VVC draft is shown below, where TH is a predetermined threshold (e.g., 18, 19). Changes to the VVC draft are shown in bold italic font in Table 40. Note that in practice, the same logic may be implemented differently. For example, a specific formula or lookup table may be used to derive the same Rice parameters. JPEG0007721685000045.jpg251166JPEG0007721685000046.jpg31164

[0114] In another aspect of the present disclosure, it is proposed to add constraints to the values of those encoding / decoding tool flags, providing the same general constraint control as the values of other flags in the general constraint information.

[0115] For example, sps_ts_residual_coding_rice_present_in_sh_flag equal to 1 specifies that sh_ts_residual_coding_rice_idx may be present in SH syntax structures that reference an SPS. sps_ts_residual_coding_rice_present_in_sh_flag equal to 0 specifies that sh_ts_residual_coding_rice_idx is not present in SH syntax structures that reference an SPS. In this disclosure, it is proposed to add the syntax element gci_no_ts_residual_coding_rice_constraint_flag to the general constraint information syntax to provide the same general constraint control as the other flags. An example of the decoding process of the VVC draft is shown below. Changes to the VVC draft are highlighted. Added parts are highlighted in italic font. JPEG0007721685000047.jpg62166

[0116] In another embodiment, pps_ts_residual_coding_rice_flag equal to 1 specifies that pps_ts_residual_coding_rice_index may be present in the current picture. pps_ts_residual_coding_rice_flag equal to 0 specifies that pps_ts_residual_coding_rice_idx is not present in the current picture. In this disclosure, it is proposed to add the syntax element gci_no_ts_residual_coding_rice_constraint_flag to the general constraint information syntax to provide the same general constraint control as the other flags. An example of the decoding process of the VVC draft is shown below. Changes to the VVC draft are highlighted. Added parts are highlighted in italic font. JPEG0007721685000048.jpg64166

[0117] In yet another embodiment, sps_rice_adaptation_enabled_flag equal to 1 indicates that the Rice parameters for binarization of abs_remainder[ ] and dec_abs_level can be derived by formula.

[0118] The formula may include: RiceParam=RiceParam+shiftVal and shiftVal=(localSumAbs <Tx[0])?Rx[0]:((localSumAbs<Tx[1])?Rx[1]:((localSumAbs<Tx[2])?Rx[2]:((localSumAbs<Tx[3])?Rx[3]:Rx[4])))。 The lists Tx[] and Rx[] are specified as follows: Tx[]={32,128,512,2048}>>(1523) Rx[]={0,2,4,6,8}

[0119] In this disclosure, it is proposed to add a syntax element gci_no_rice_adaptation_constraint_flag to the general constraint information syntax to provide the same general constraint control as other flags. An example of the VVC draft decoding process is shown below. Changes to the VVC draft are highlighted. Additions are highlighted in italic font. JPEG0007721685000049.jpg64166

[0120] Since the proposed Rice parameter adaptation scheme is used only for transform skip residual coding and decoding (TSRC), the proposed method is only effective when TSRC is enabled. Correspondingly, one or more embodiments of the present disclosure propose to add one bitstream constraint that requires the value of gci_no_rice_adaptation_constraint_flag to be 1 when transform skip mode is disabled from the general constraint information level, e.g., when the value of gci_no_transform_skip_constraint_flag is set to 1.

[0121] In yet another embodiment, sps_range_extension_flag equal to 1 specifies that the sps_range_extension() syntax structure is present in the SPS RBSP syntax structure. sps_range_extension_flag equal to 0 specifies that this syntax structure is not present. In this disclosure, it is proposed to add the syntax element gci_no_range_extension_constraint_flag to the general constraint information syntax to provide the same general constraint control as the other flags. An example of the decoding process of the VVC draft is shown below. Changes to the VVC draft are highlighted. Added portions are highlighted in italic font. JPEG0007721685000050.jpg59169

[0122] 9 illustrates a video encoding / decoding method according to one embodiment of the present disclosure. This method may be applied to, for example, a decoder. In step 1902, the decoder may receive a sequence parameter set (SPS) range extension flag, which indicates, by a value, whether a syntax structure sps_range_extension is present in a slice head (SH) raw byte sequence payload (RBSP) syntax structure.

[0123] In step 1904, in response to determining that the value of the SPS range extension flag is equal to 1, the decoder may determine that sps_range_extension is present in the SH RBSP syntax structure.

[0124] In step 1906, in response to determining that the value of the range extension flag is equal to 0, the decoder may determine that sps_range_extension is not present in the SH RBSP syntax structure.

[0125] In yet another embodiment, sps_cabac_bypass_alignment_enabled_flag equal to 1 specifies that the value of ivlCurrRange may be aligned before bypass decoding of the syntax elements sb_coded_flag[][], abs_remainder[], dec_abs_level[n], and coeff_sign_flag[]. sps_cabac_bypass_alignment_enabled_flag equal to 0 specifies that the value of ivlCurrRange is not aligned before bypass decoding. In this disclosure, it is proposed to add the syntax element gci_no_cabac_bypass_alignment_constraint_flag to the general constraint information syntax to provide the same general constraint control as the other flags. An example of the decoding process of the VVC draft is shown below. The changes to the VVC draft are highlighted. The additions are highlighted in italic font. JPEG0007721685000051.jpg67169

[0126] 10 illustrates a video encoding / decoding method according to one embodiment of the present disclosure. This method may be applied to, for example, a decoder. In step 2002, the decoder may receive a sequence parameter set (SPS) alignment enable flag indicating whether to align the index ivlCurrRange before bypass decoding of the syntax elements sb_coded_flag, abs_remainder, dec_abs_level, and coeff_sign_flagn based on a value of SPS alignment enable.

[0127] In step 2004, in response to determining that the value of the SPS alignment enable flag is equal to 1, the decoder may determine to align the ivlCurrRange before bypass decoding.

[0128] In step 2006, in response to determining that the value of the SPS alignment enable flag is equal to 0, the decoder may determine not to align the ivlCurrRange before bypass decoding.

[0129] In yet another embodiment, extended_precision_processing_flag equal to 1 specifies that extended dynamic range may be used during transform processing for transform coefficients. Extended_precision_processing_flag equal to 0 specifies that extended dynamic range is not used. In this disclosure, it is proposed to add a syntax element gci_no_extended_precision_processing_constraint_flag to the general constraint information syntax to provide the same general constraint control as the other flags. An example of the decoding process of the VVC draft is shown below. Changes to the VVC draft are highlighted. Additions are highlighted in italic font. JPEG0007721685000052.jpg67169

[0130] 11 illustrates a video encoding / decoding method according to one embodiment of the present disclosure. This method may be applied to, for example, a decoder. In step 2102, the decoder may receive an extended precision processing flag, the extended precision processing flag indicating whether to employ an extended dynamic range for transform coefficients during transform processing.

[0131] In step 2104, in response to determining that the value of the extended precision processing flag is equal to one, the decoder may determine to employ extended dynamic range during transform processing for the transform coefficients.

[0132] In step 2106, in response to determining that the value of the extended precision processing flag is equal to 0, the decoder may determine not to employ extended dynamic range for the transform coefficients or during the transform process.

[0133] In yet another embodiment, persistent_rice_adaptation_enabled_flag equal to 1 specifies that the mode-dependent statistics accumulated from the previous sub-block at the beginning of each sub-block may be used to initialize the Rice parameter derivation for binarization of abs_remainder[] and dec_abs_level. persistent_rice_adaptation_enabled_flag equal to 0 specifies that the previous sub-block state is not used in the Rice parameter derivation. In this disclosure, it is proposed to add the syntax element gci_no_persistent_rice_adaptation_constraint_flag to the general constraint information syntax to provide the same general constraint control as the other flags. An example of the decoding process of the VVC draft is shown below. Changes to the VVC draft are highlighted. Added parts are highlighted in italic font. JPEG0007721685000053.jpg64167

[0134] 12 illustrates a video encoding / decoding method according to one embodiment of the present disclosure. This method may be applied to, for example, a decoder. In step 2202, the decoder may receive a persistent Rice adaptation enable flag, which indicates whether to initialize Rice parameter derivation for binarization of abs_remainder and dec_abs_level using mode-dependent statistics accumulated at the beginning of each sub-block from the previous sub-block.

[0135] In step 2204, in response to determining that the value of the persistent Rice adaptation enable flag is equal to 1, the decoder may determine to initialize the Rice parameter derivation for binarization by employing mode-dependent statistics accumulated from previous sub-blocks at the beginning of each sub-block.

[0136] In step 2206, in response to determining that the value of the persistent Rice adaptation enable flag is equal to 0, the decoder may determine not to employ the previous sub-block state in the Rice parameter derivation.

[0137] In yet another embodiment, sps_rrc_rice_extension_flag equal to 1 specifies that the extension of the Rice parameter derivation for the binarization of abs_remainder[] and dec_abs_level[] is enabled. sps_rrc_rice_extension_flag equal to 0 specifies that the extension of the Rice parameter derivation for the binarization of abs_remainder[] and dec_abs_level[] is disabled. In this disclosure, it is proposed to add the syntax element gci_no_rrc_rice_extension_flag to the general constraint information syntax to provide the same general constraint control as the other flags. An example of the decoding process of the VVC draft is shown below. The changes to the VVC draft are highlighted. The additions are shown in italic font. JPEG0007721685000054.jpg58167

[0138] 17 illustrates a video decoding method according to one embodiment of the present disclosure. This method may be applied to, for example, a decoder. In step 2702, the decoder may receive an SPS Rice extension flag indicating whether extension of the Rice parameter derivation for binarization of abs_remainder and dec_abs_level is enabled.

[0139] In step 2704, in response to determining that the value of the SPS Rice extension flag is equal to one, the decoder may determine that extension of the Rice parameter derivation for binarization is enabled.

[0140] In step 2706, in response to determining that the value of the SPS Rice extension flag is equal to 0, the decoder may determine that extension of the Rice parameter derivation for binarization is disabled.

[0141] In yet another embodiment, sps_persistent_rice_adaptation_enabled_flag equal to 1 specifies that the Rice parameter derivation for binarization of abs_remainder[] and dec_abs_level[] is initialized using the statistics accumulated from the previous TU at the beginning of each TU. sps_persistent_rice_adaptation_enabled_flag equal to 0 specifies that the state of the previous TU is not adopted in the Rice parameter derivation. In this disclosure, it is proposed to add the syntax element gci_no_persistent_rice_adaptation_enabled_flag to the general constraint information syntax to provide the same general constraint control as other flags. An example of the decoding process of the VVC draft is shown below. Changes to the VVC draft are highlighted. Added parts are shown in italic font. JPEG0007721685000055.jpg66167

[0142] 18 illustrates a video decoding method according to one embodiment of the present disclosure. This method may be applied to, for example, a decoder. In step 2802, the decoder may receive an SPS Rice adaptation enable flag indicating whether to initialize Rice parameter derivation for binarization of abs_remainder and dec_abs_level using statistics accumulated from previous TUs at the beginning of each transform unit.

[0143] In step 2804, in response to determining that the value of the SPS Rice adaptation enable flag is equal to 1, the decoder may determine to initialize the Rice parameter derivation for binarization using statistics accumulated at the beginning of each TU from the previous TU.

[0144] In step 2806, in response to determining that the value of the SPS Rice adaptation enable flag is equal to 0, the decoder may determine not to employ the previous TU state in the Rice parameter derivation.

[0145] The above methods may be implemented using an apparatus including one or more circuits, including an application specific integrated circuit (ASIC), a digital signal processor (DSP), a digital signal processing device (DSPD), a programmable logic device (PLD), a field programmable gate array (FPGA), a controller, a microcontroller, a microprocessor, or other electronic components. An apparatus may employ circuits in combination with other hardware or software components to perform the above-described methods. Each module, sub-module, unit, or sub-unit disclosed above may be implemented at least in part using one or more circuits. Rice parameter determination

[0146] On the encoder side, TSRC encoding / decoding may require multiple passes of encoding to derive optimal Rice parameters. This multi-pass encoding may not be suitable for practical hardware encoder design. To solve this problem, a low-delay TSRC encoding method has also been proposed. In a 30th aspect of the present disclosure, it is proposed to derive the Rice parameters according to specific coded information of the current slice, such as the quantization parameter and / or coding bit depth associated with the slice / image / sequence, and / or according to the hash ratio associated with the slice / image / sequence level. The Rice parameters may be derived in different ways, and some exemplary methods are listed below. Note that the following methods can be applied independently or in combination.

[0147] 1. The Rice parameters mentioned in the above embodiments may further depend on the resolution of the video, including both the temporal resolution (e.g., frame rate) and spatial resolution (e.g., image width and height) of the video.

[0148] 2. The Rice parameter may vary at the sequence level, image level, slice level, and / or any predetermined region. In one example, different Rice values are used for images with different temporal layer IDs (pertaining to nuh_temporal_id_plus1 as specified in the VVC standard). Alternatively, the Rice parameter may include a value determined based on the QP value used at the sequence level, image level, slice level, and / or any predetermined region. For example, the Rice parameter = Clip3(1, 8, (TH-QP) / 6), where TH is a predetermined threshold (e.g., 18, 19).

[0149] 3. The Rice parameter may be set to a default value, e.g., 1, depending on the change in coded information between the current slice and the previous slice. In one example, the default Rice value is used for an image whose temporal layer ID has changed compared to the previous image. Alternatively, if ΔQ is greater than TH, the default Rice value is used for the image, where ΔQ is calculated as abs(QPcurrent-QPprevious), where TH is a predetermined threshold. The Rice parameter (e.g., 0, 5) may be set to a default value, e.g., 1, depending on the change in coded information between the current slice and the previous slice. By Intrablock copy mode hash ratio of If is greater than TH, then the Rice parameter=1, and TH is a predetermined threshold, for example, Max(41*(number of CTUs), 4200).

[0150] 4. The rice parameters for each slice are According to the encoding order That , based on the value of abs_remainder encoded in the previous slice. It is determined by In one specific example, after one slice is coded, the number of bins for binarization of abs_remainder using different Rice parameters is calculated, and then the number of bins is used to determine the Rice parameter for the next slice. For example, the Rice parameter that achieves the smallest number of bins in the previous slice is selected for the current slice. In another example, if the current slice and its previous slice use the same QP, the Rice parameter that achieves the smallest number of bins in the previous slice is selected for the current slice; otherwise, the number of bins generated in the previous slice using a default Rice parameter (e.g., 1) is scaled by TH before being compared with other Rice parameters, and the Rice parameter that results in the smallest number of bins is selected for the current slice, where TH is a predetermined threshold, e.g., 0.9.

[0151] 5. The rice parameters for each slice are According to the coding order, it is based on the value of abs_remainder coded in the previous slice. It is decidedThe Rice parameter may be adjusted depending on the change in coded information between the current slice and the previous slice. In one example, the Rice parameter that achieves the smallest number of bins in the previous slice is selected for the current slice. Also, if ΔQ is greater than TH, the Rice value may be adjusted, where ΔQ is calculated as abs(QPcurrent-QPprevious), where TH is a predetermined threshold. The Rice parameter (e.g., 0, 5) may be adjusted. The adjustment may be to add a predetermined offset (e.g., +1, -1) or to scale by a predetermined value.

[0152] This method may be applied, for example, to an encoder. In step 2602, the encoder may derive Rice parameters based on coded information of the current slice of video. The coded information may include: In step 2604 the quantization parameter or coding bit depth associated with a slice, image or sequence of video, or In step 2606 It may include one or more parameters such as a hash ratio associated with a slice, image or sequence of video.

[0153] It should be noted that the above encoder method can also be applied at the decoder side. In one embodiment, the Rice parameters may not be signaled to the decoder, and the encoder / decoder use the same method to derive the Rice parameters.

[0154] 8 illustrates a computing environment 1810 coupled to a user interface 1860. The computing environment 1810 may be part of a data processing server. The computing environment 1810 includes a processor 1820, a memory 1840, and an I / O interface 1850.

[0155] The processor 1820 typically controls the overall operation of the computing environment 1810, such as operations related to display, data acquisition, data communication, and image processing. The processor 1820 may include one or more processors for executing instructions to perform all or some of the steps of the methods described above. The processor 1820 may also include one or more modules that facilitate interaction between the processor 1820 and other components. The processor may be a central processing unit (CPU), a microprocessor, a single-chip machine, a GPU, etc.

[0156] Memory 1840 is configured to store various types of data to support the operation of computing environment 1810. Memory 1840 may include predefined software 1842. Examples of such data include instructions for any applications or methods operating on computing environment 1810, video data sets, image data, etc. Memory 1840 may be implemented by employing any type of volatile or non-volatile memory device, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk, or a combination thereof.

[0157] The I / O interface 1850 provides an interface between the processor 1820 and a peripheral interface module, such as a keyboard, a click wheel, buttons, etc. The buttons may include, but are not limited to, a home button, a start scan button, and a stop scan button. The I / O interface 1850 can be coupled to an encoder and a decoder.

[0158] In some embodiments, a non-transitory computer-readable storage medium is also provided that includes a plurality of programs, such as those contained in memory 1840, executable by processor 1820 in computing environment 1810 to perform the methods described above. For example, the non-transitory computer-readable storage medium may be a ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.

[0159] A non-transitory computer-readable recording medium stores a plurality of programs that are executed by a computing device having one or more processors, and the plurality of programs, when executed by the one or more processors, cause the computing device to perform the above-described motion prediction method.

[0160] In some embodiments, the computing environment 1810 may be implemented using one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), graphical processing units (GPUs), controllers, microcontrollers, microprocessors, or other electronic components to perform the methods described above.

[0161] 13 is a block diagram illustrating an example system 10 for encoding and decoding video blocks in parallel, according to some implementations of the present disclosure. As shown in FIG. 13, system 10 includes a source device 12 that generates and encodes video data that is subsequently decoded by a target device 14. Source device 12 and target device 14 may include any of a wide variety of electronic devices, including desktop or laptop computers, tablet computers, smartphones, set-top boxes, digital televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some implementations, source device 12 and target device 14 are equipped with wireless communication capabilities.

[0162] In some implementations, target device 14 may receive the encoded video data to be decoded via link 16. Link 16 may include any type of communication medium or device capable of moving encoded video data from source device 12 to target device 14. In one embodiment, link 16 may include a communication medium that enables source device 12 to transmit encoded video data directly to target device 14 in real time. The encoded video data may be modulated according to a communication standard, such as a wireless communication protocol, and transmitted to target device 14. The communication medium may include any wireless or wired communication medium, such as the radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide area network, or a global network such as the Internet. The communication medium may include routers, switches, base stations, or any other equipment that may be useful in facilitating communication from source device 12 to target device 14.

[0163] In some other implementations, the encoded video data may be transmitted from output interface 22 to storage device 32. The encoded video data in storage device 32 may then be accessed by target device 14 via input interface 28. Storage device 32 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, a Blu-ray disc, a digital versatile disc (DVD), a compact disc read-only memory (CD-ROM), flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data. In a further example, storage device 32 may correspond to a file server or other intermediate storage device that may hold the encoded video generated by source device 12. Target device 14 may access the stored video data from storage device 32 via streaming or download. The file server may be any type of computer capable of storing encoded video data and transmitting the encoded video data to target device 14. Exemplary file servers include a web server (e.g., for a website), a file transfer protocol (FTP) server, a network-attached storage (NAS) device, or a local disk drive. Target device 14 may access the encoded video data over any standard data connection, including a wireless channel (e.g., a Wi-Fi (Wireless Fidelity) connection), a wired connection (e.g., a DSL (Digital Subscriber Line), a cable modem, etc.), or a combination of both, suitable for accessing encoded video data stored on a file server. Transmission of the encoded video data from storage device 32 may be a streaming transmission, a download transmission, or a combination of both.

[0164] 13 , source device 12 includes video source 18, video encoder 20, and output interface 22. Video source 18 may include sources such as a video camera, a video archive containing previously captured video, a video capture device such as a video feed interface receiving video from a video content provider, and / or a computer graphics system generating computer graphics data as source video, or a combination of these sources. As one example, if video source 18 is a video camera in a security surveillance system, source device 12 and target device 14 may form a camera phone or video phone. However, implementations described herein are applicable to video encoding generally and may also be applicable to wireless and / or wired applications.

[0165] The captured, pre-captured, or computer-generated video may be encoded by video encoder 20. The encoded video data may be transmitted directly to target device 14 via output interface 22 of source device 12. The encoded video data may also (or alternatively) be stored in storage device 32 for later access, decoding, and / or playback by target device 14 or another device. Output interface 22 may further include a modem and / or a transmitter.

[0166] Target device 14 includes an input interface 28, a video decoder 30, and a display device 34. Input interface 28 may include a receiver and / or modem to receive encoded video data over link 16. The encoded video data communicated over link 16 or provided to storage device 32 may include various syntax elements generated by video encoder 20 that video decoder 30 uses to decode the video data. Such syntax elements may be included within the encoded video data that is transmitted over a communications medium, stored on a storage medium, or stored on a file server.

[0167] In some implementations, target device 14 may include a display device 34, which may be an integrated display device and an external display device configured to communicate with target device 14. Display device 34 displays decoded video data to a user and may include any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or other types of display devices.

[0168] Video encoder 20 and video decoder 30 may operate in accordance with proprietary or industry standards, such as, for example, VVC, HEVC, MPEG-4 Part 10, AVC, or extensions of these standards. It should be understood that the present application is not limited to a particular video encoding / decoding standard and may be applicable to other video encoding / decoding standards. It is generally contemplated that video encoder 20 of source device 12 may be configured to encode video data in accordance with any of these current or future standards. Similarly, it is generally contemplated that video decoder 30 of target device 14 may be configured to decode video data in accordance with any of these current or future standards.

[0169] Video encoder 20 and video decoder 30 may each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or combinations thereof. If the electronic device is implemented partially in software, instructions for the software may be stored on a suitable non-transitory computer-readable medium and executed in hardware by one or more processors to perform the video encoding / decoding operations disclosed in this disclosure. Each of video encoder 20 and video decoder 30 may be included in one or more encoders or decoders, or either may be integrated as part of a combined encoder / decoder (CODEC) within the respective device.

[0170] 14 is a block diagram illustrating an example video encoder 20 according to some implementations described herein. The video encoder 20 can perform intra-predictive and inter-predictive coding of video blocks within video frames. Intra-predictive coding relies on spatial prediction to reduce or remove spatial redundancy in video data within a given video frame or image. Inter-predictive coding relies on temporal prediction to reduce or remove temporal redundancy in video data within adjacent video frames or images of a video sequence. Note that the term "frame" may be used synonymously with the term "image" or "picture" in the field of video coding.

[0171] As shown in FIG. 14 , video encoder 20 includes a video data memory 40, a prediction processing unit 41, a decoded picture buffer (DPB) 64, an adder 50, a transform processing unit 52, a quantization unit 54, and an entropy coding unit 56. Prediction processing unit 41 further includes a motion estimation unit 42, a motion compensation unit 44, a division unit 45, an intra-prediction processing unit 46, and an intra-block copy (BC) unit 48. In some implementations, video encoder 20 also includes an inverse quantization unit 58, an inverse transform processing unit 60, and an adder 62 for video block reconstruction. An in-loop filter 63, such as a deblocking filter, may be disposed between adder 62 and DPB 64 to filter block boundaries and remove block artifacts from the reconstructed video. In addition to the deblocking filter, other in-loop filters, such as a sample adaptive offset (SAO) filter and / or an adaptive in-loop filter (ALF), may be used to filter the output of adder 62. In some embodiments, the in-loop filter may be omitted, and the decoded video blocks may be provided directly to DPB 64 by summer 62. Video encoder 20 may take the form of a fixed or programmable hardware unit, or may be divided into one or more of the illustrated fixed or programmable hardware units.

[0172] Video data memory 40 may store video data to be encoded by components of video encoder 20. The video data in video data memory 40 may be obtained from video source 18, for example, as shown in FIG. 13. DPB 64 is a buffer that stores reference video data (e.g., reference frames or images) used in encoding video data by video encoder 20 (e.g., in intra-predictive coding mode or inter-predictive coding mode). Video data memory 40 and DPB 64 may be formed by any of a variety of memory devices. In various embodiments, video data memory 40 may be on-chip with other components of video encoder 20 or off-chip relative to those components.

[0173] As shown in FIG. 14, after receiving the video data, a division unit 45 in the prediction processing unit 41 divides the video data into video blocks. This division may include dividing the video frame into slices, tiles (e.g., sets of video blocks), or other larger coding units (CUs) according to a predetermined division structure, such as a quadtree (QT) structure, associated with the video data. A video frame may be, or may be considered as, a two-dimensional array or matrix of samples having sample values. The samples in the array may be referred to as pixels or pels. The number of samples in the horizontal and vertical directions (or axes) of the array or image defines the size and / or resolution of the video frame. The video frame may be divided into multiple video blocks, for example, using QT division. A video block has smaller dimensions than a video frame, but may also be, or may be considered as, a two-dimensional array or matrix of samples having sample values. The number of samples in the horizontal and vertical directions (or axes) of a video block defines the size of the video block. A video block may be further divided into one or more block or sub-block partitions (which may again form blocks), for example, by iteratively using QT partitioning, binary tree (BT) partitioning, ternary tree (TT) partitioning, or any combination thereof. Note that, as used herein, the term "block" or "video block" may refer to a portion of a frame or image, particularly a rectangular (square or non-square) portion. For example, with reference to HEVC and VVC, a block or video block may be or correspond to a coding tree unit (CTU), CU, prediction unit (PU), or transform unit (TU), and / or may correspond to a corresponding block and / or sub-block, such as a coding tree block (CTB), coding block (CB), prediction block (PB), or transform block (TB).

[0174] Prediction processing unit 41 may select one of multiple possible predictive coding modes, such as one of multiple intra-predictive coding modes or one of multiple inter-predictive coding modes, for the current video block based on the error result (e.g., code rate and distortion level). Prediction processing unit 41 provides the resulting intra- or inter-predictive coded block to summer 50 to generate a residual block and to summer 62 to reconstruct a coded block that can be used as part of a reference frame. Prediction processing unit 41 also provides syntax elements, such as motion vectors, intra-mode indicators, partition information, and other such syntax information, to entropy coding unit 56.

[0175] To select an appropriate intra-prediction coding mode for a current video block, intra-prediction processing unit 46 within prediction processing unit 41 performs intra-prediction coding of the current video block relative to one or more neighboring blocks in the same frame as the current block being coded to provide spatial prediction. Motion estimation unit 42 and motion compensation unit 44 within prediction processing unit 41 perform inter-prediction coding of the current video block relative to one or more predictive blocks in one or more reference frames to provide temporal prediction. Video encoder 20 may perform multiple passes of coding, for example, to select an appropriate coding mode for each block of video data.

[0176] In some implementations, motion estimation unit 42 determines the inter-prediction mode for a current video frame by generating a motion vector that indicates the displacement of a video block in the current video frame relative to a predictive block in a reference video frame according to a predetermined pattern in a sequence of video frames. Motion estimation performed by motion estimation unit 42 is the process of generating motion vectors that estimate the motion of a video block. The motion vector may indicate, for example, the displacement of a video block in a current video frame or image relative to a predictive block in a reference frame, the predictive block being relative to a current block being coded in the current frame. The predetermined pattern may designate a video frame in the sequence as a P frame or a B frame. Intra BC unit 48 may determine vectors, e.g., block vectors, for intra BC coding in a manner similar to how motion estimation unit 42 determines motion vectors for inter prediction, or may utilize motion estimation unit 42 to determine the block vectors.

[0177] A prediction block for a video block may be or may correspond to a block or reference block of a reference frame that is deemed to closely match the video block being encoded, with respect to pixel differences, which may be determined by sum of absolute differences (SAD) or sum of squared differences (SSD), or other difference metrics. In some implementations, video encoder 20 may calculate values for sub-integer pixel positions of the reference frame stored in DPB 64. For example, video encoder 20 may interpolate values for quarter-pixel positions, eighth-pixel positions, and other fractional pixel positions of the reference frame. Thus, motion estimation unit 42 may perform motion searches for whole pixel positions and fractional pixel positions and output motion vectors with fractional pixel precision.

[0178] Motion estimation unit 42 calculates a motion vector for a video block by comparing the position of the video block in the inter-predictively coded frame with the position of a predictive block of a reference frame selected from a first reference frame list (List 0) or a second reference frame list (List 1), each of which identifies one or more reference frames stored in DPB 64. Motion estimation unit 42 sends the calculated motion vector to motion compensation unit 44 and then to entropy coding unit 56.

[0179] The motion compensation performed by motion compensation unit 44 may include obtaining or generating a predictive block based on the motion vector determined by motion estimation unit 42. Upon receiving the motion vector for the current video block, motion compensation unit 44 may determine which predictive block in a reference frame list the motion vector points to, obtain the predictive block from DPB 64, and forward the predictive block to summer 50. Summer 50 then forms a residual video block of pixel difference values by subtracting pixel values of the predictive block provided by motion compensation unit 44 from pixel values of the current video block being coded. The pixel difference values forming the residual video block may include luma difference components, chroma difference components, or both. Motion compensation unit 44 may also generate syntax elements associated with the video blocks of the video frame for use by video decoder 30 in decoding the video blocks of the video frame. The syntax elements may include, for example, syntax elements defining the motion vector used to identify the predictive block, any flags indicating the prediction mode, or any other syntax information described herein. It should be noted that motion estimation unit 42 and motion compensation unit 44 may be highly integrated, but are shown separately for conceptual purposes.

[0180] In some implementations, the intra BC unit 48 may generate a vector to obtain a predictive block in a manner similar to that described above in connection with the motion estimation unit 42 and the motion compensation unit 44, except that the predictive block is within the same frame as the current block being coded, and the vector is referred to as a block vector rather than a motion vector. In particular, the intra BC unit 48 may determine an intra prediction mode to be used to code the current block. In some embodiments, the intra BC unit 48 may encode the current block using various intra prediction modes, e.g., during separate pass coding, and test their performance using rate-distortion analysis. The intra BC unit 48 may then select and use an appropriate intra prediction mode from among the tested intra prediction modes and generate a corresponding intra mode indicator. For example, the intra BC unit 48 may calculate rate-distortion values for the various tested intra prediction modes using rate-distortion analysis, and select and use the intra prediction mode with the best rate-distortion characteristics from among the tested modes as the appropriate intra prediction mode. Rate-distortion analysis generally determines the amount of distortion (or error) between a coded block and the original uncoded block that was coded to produce the coded block, as well as the bitrate (i.e., number of bits) used to produce the coded block. Intra BC unit 48 can calculate ratios from the distortions and rates of the various coded blocks to determine which intra-prediction mode exhibits the optimal rate-distortion value for the block.

[0181] In other embodiments, intra BC unit 48 may perform the functionality for intra BC prediction according to implementations described herein with all or part of motion estimation unit 42 and motion compensation unit 44. In either case, for intra block copying, the predictive block may be a block that is deemed to closely match the block being coded in terms of pixel differences, which may be determined by SAD, SSD, or other difference metrics, and identifying the predictive block may include calculating values for sub-integer pixel positions.

[0182] Regardless of whether the predictive block is from the same frame via intra prediction or a different frame via inter prediction, video encoder 20 may form a residual video block by subtracting pixel values of the predictive block from pixel values of the current video block being coded to form pixel difference values. The pixel difference values that form the residual video block may include both luma and chroma component differences.

[0183] Intra-prediction processing unit 46 may intra-predict the current video block, instead of the inter-prediction performed by motion estimation unit 42 and motion compensation unit 44 or the intra-block copy prediction performed by intra BC unit 48, as described above. In particular, intra-prediction processing unit 46 may determine the intra-prediction mode to be used to encode the current block. To do so, intra-prediction processing unit 46 may encode the current block using various intra-prediction modes, e.g., during the encoding of separate passes, and intra-prediction processing unit 46 (or, in some embodiments, a mode selection unit) may select and use an appropriate intra-prediction mode from the tested intra-prediction modes. Intra-prediction processing unit 46 may provide information indicating the selected intra-prediction mode of the block to entropy coding unit 56. Entropy coding unit 56 may encode the information indicating the selected intra-prediction mode into the bitstream.

[0184] After prediction processing unit 41 determines a predictive block for the current video block via inter- or intra-prediction, adder 50 forms a residual video block by subtracting the predictive block from the current video block. The residual video data in the residual block, which may be included in one or more TUs, is provided to transform processing unit 52. Transform processing unit 52 converts the residual video data into residual transform coefficients with a transform, such as a discrete cosine transform (DCT) or a conceptually similar transform.

[0185] Transform processing unit 52 may send the resulting transform coefficients to quantization unit 54, which quantizes the transform coefficients to further reduce the bit rate. The quantization process may also reduce the bit depth associated with some or all of the coefficients. The degree of quantization can be varied by adjusting a quantization parameter. In some embodiments, quantization unit 54 may perform a scan of a matrix containing the quantized transform coefficients. Alternatively, entropy coding unit 56 may perform the scan.

[0186] Following quantization, entropy coding unit 56 entropy codes the quantized transform coefficients into a video bitstream using, for example, context-adaptive variable-length coding (CAVLC), context-adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding, or other entropy coding methods or techniques. The coded bitstream may then be transmitted to video decoder 30, as shown in FIG. 13, or archived to storage device 32, as shown in FIG. 13, for later transmission to or retrieval by video decoder 30. Entropy coding unit 56 may entropy code motion vectors and other syntax elements for the current video frame being coded.

[0187] Inverse quantization unit 58 and inverse transform processing unit 60 apply inverse quantization and inverse transform, respectively, to reconstruct residual video blocks in the pixel domain for generating reference blocks for predicting other video blocks. As described above, motion compensation unit 44 may generate motion-compensated prediction blocks from one or more reference blocks of frames stored in DPB 64. Motion compensation unit 44 may also apply one or more interpolation filters to the prediction blocks to calculate sub-integer pixel values used for motion estimation.

[0188] Summer 62 adds the reconstructed residual block to the motion compensated prediction block produced by motion compensation unit 44 to generate a reference block for storage in DPB 64. The reference block may then be used by intra BC unit 48, motion estimation unit 42, and motion compensation unit 44 as a prediction block for inter predicting other video blocks in subsequent video frames.

[0189] 15 is a block diagram illustrating an example video decoder 30 according to some implementations of the present application. The video decoder 30 includes a video data memory 79, an entropy decoding unit 80, a prediction processing unit 81, an inverse quantization unit 86, an inverse transform processing unit 88, an adder 90, and a DPB 92. The prediction processing unit 81 further includes a motion compensation unit 82, an intra prediction unit 84, and an intra BC unit 85. The video decoder 30 may perform a decoding process that is generally the reverse of the encoding process described above for the video encoder 20 in connection with FIG. 14. For example, the motion compensation unit 82 may generate prediction data based on motion vectors received from the entropy decoding unit 80, while the intra prediction unit 84 may generate prediction data based on intra prediction mode information received from the entropy decoding unit 80.

[0190] In some embodiments, a unit of video decoder 30 may be responsible for performing implementations of the present disclosure. Also, in some embodiments, implementations of the present disclosure may be divided into one or more units of video decoder 30. For example, intra BC unit 85 may perform implementations of the present disclosure alone or in combination with other units of video decoder 30, such as motion compensation unit 82, intra prediction unit 84, and entropy decoding unit 80. In some embodiments, video decoder 30 may not include intra BC unit 85, and the functionality of intra BC unit 85 may be performed by other components of prediction processing unit 81, such as motion compensation unit 82.

[0191] Video data memory 79 may store video data, such as an encoded video bitstream, to be decoded by other components of video decoder 30. The video data stored in video data memory 79 may be obtained, for example, from storage device 32, from a local video source such as a camera via wired or wireless network communication of video data, or by accessing a physical data storage medium (e.g., a flash drive or hard disk). Video data memory 79 may include a coded picture buffer (CPB) that stores coded video data from the coded video bitstream. DPB 92 of video decoder 30 stores reference video data used in decoding video data by video decoder 30 (e.g., in intra- or inter-prediction coding modes). Video data memory 79 and DPB 92 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), and resistive RAM (RRAM)) or other types of memory devices. For ease of explanation, video data memory 79 and DPB 92 are shown in Figure 15 as two separate components of video decoder 30. However, it will be apparent to those skilled in the art that video data memory 79 and DPB 92 may be provided by the same memory device or by separate memory devices. In some embodiments, video data memory 79 may be on-chip with other components of video decoder 30 or may be off-chip with respect to those components.

[0192] During the decoding process, video decoder 30 receives an encoded video bitstream representing video blocks of encoded video frames and associated syntax elements. Video decoder 30 may receive the syntax elements at the video frame level and / or the video block level. Entropy decoding unit 80 of video decoder 30 entropy decodes the bitstream to generate quantized coefficients, motion vectors or intra-prediction mode indicators, and other syntax elements. Entropy decoding unit 80 then forwards the motion vectors or intra-prediction mode indicators and other syntax elements to prediction processing unit 81.

[0193] If the video frame is coded as an intra-predictive coded (I) frame, or relative to an intra-coded predictive block of another type of frame, intra prediction unit 84 of prediction processing unit 81 may generate predictive data for the video block of the current video frame based on the signaled intra-prediction mode and reference data from previously decoded blocks of the current frame.

[0194] If a video frame is coded as an inter-predictive coded (B or P) frame, motion compensation unit 82 of prediction processing unit 81 generates one or more predictive blocks of video blocks of the current video frame based on the motion vectors and other syntax elements received from entropy decoding unit 80. Each predictive block may be generated from a reference frame in one of the reference frame lists. Video decoder 30 may construct reference frame lists List 0 and List 1 using a default construction technique based on the reference frames stored in DPB 92.

[0195] In some embodiments, when a video block is encoded according to the intra BC mode described herein, intra BC unit 85 of prediction processing unit 81 generates a predictive block of the current video block based on the block vectors and other syntax elements received from entropy decoding unit 80. The predictive block may be within the same reconstructed region of the image as the current video block as defined by video encoder 20.

[0196] Motion compensation unit 82 and / or intra BC unit 85 determine prediction information for video blocks of the current video frame by analyzing the motion vectors and other syntax elements, and then use this prediction information to generate predictive blocks for the current video block being decoded. For example, motion compensation unit 82 uses some of the received syntax elements to determine the prediction mode (e.g., intra- or inter-prediction) to use in encoding the video blocks of the video frame, the inter-prediction frame type (e.g., B or P), configuration information for one or more reference frame lists for the frame, the motion vector for each inter-predictively coded video block of the frame, the inter-prediction state for each inter-predictively coded video block of the frame, and other information for decoding the video blocks of the current video frame.

[0197] Similarly, intra BC unit 85 uses some of the received syntax elements, such as flags, to determine that the current video block was predicted in intra BC mode, configuration information regarding which video blocks of the frame are within the reconstructed region and should be stored in DPB 92, block vectors for each intra BC predicted video block of the frame, intra BC prediction states for each intra BC predicted video block of the frame, and other information for decoding the video blocks of the current video frame.

[0198] Motion compensation unit 82 may also perform interpolation using an interpolation filter used by video encoder 20 during encoding of the video block to calculate sub-integer pixel interpolated values of the reference block. In this case, motion compensation unit 82 may determine the interpolation filter used by video encoder 20 from the received syntax element and generate the prediction block using this interpolation filter.

[0199] Inverse quantization unit 86 uses the same quantization parameter calculated by video encoder 20 for each video block in a video frame to inverse quantize and determine the degree of quantization of the quantized transform coefficients provided in the bitstream and entropy decoded by entropy decoding unit 80. Inverse transform processing unit 88 applies an inverse transform, e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process, to the transform coefficients in order to reconstruct residual blocks in the pixel domain.

[0200] After motion compensation unit 82 or intra BC unit 85 generates a predictive block for the current video block based on the vectors and other syntax elements, summer 90 reconstructs a decoded video block for the current video block by adding a residual block from inverse transform processing unit 88 and the corresponding predictive block generated by motion compensation unit 82 and intra BC unit 85. An in-loop filter 91, such as a deblocking filter, an SAO filter, and / or an ALF, may be disposed between summer 90 and DPB 92 to further process the decoded video block. In some embodiments, in-loop filter 91 may be omitted, and the decoded video block may be provided directly to DPB 92 by summer 90. The decoded video block in a given frame is then stored in DPB 92, which stores reference frames used for subsequent motion compensation of the next video block. DPB 92, or a memory device separate from DPB 92, may also store the decoded video for later display on a display device, such as display device 34 of FIG. 13 .

[0201] The description of the present disclosure has been presented for purposes of illustration and is not intended to be exhaustive or limiting of the disclosure. Many modifications, variations and alternative implementations will become apparent to one skilled in the art having the benefit of the teachings presented in the foregoing descriptions and the associated drawings.

[0202] The examples have been chosen and described to explain the principles of the present disclosure and to enable others skilled in the art to understand the present disclosure in terms of various implementations and to optimally utilize the underlying principles and various implementations with various modifications suited to the particular use intended. Therefore, it should be understood that the scope of the present disclosure should not be limited to the specific implementations disclosed, and that modifications and other implementations are intended to be included within the scope of the present disclosure.

Claims

1. receiving, by the decoder, a sequence parameter set (SPS) Rice extension flag indicating whether an extension of the Rice parameter derivation for binarization of abs_remainder and dec_abs_level is used; receiving, by the decoder, a general constraint information (GCI) Rice extension flag in a GCI syntax to provide general constraint control of the SPS Rice extension flag; abs_reminder is coded with Golomb-Rice code and bypass coded bins in the second pass if the remaining number of context coded bins in the first pass coding is 4 or more; dec_abs_level is directly coded using Golomb-Rice code and bypass coded bins in the second pass if the remaining number of context coded bins in the first pass coding is less than 4.

2. determining, by the decoder, in response to determining that the value of the SPS Rice extension flag is equal to one, that an extension of the Rice parameter derivation for the binarization is enabled; 2. The video decoding method of claim 1, further comprising: determining, by the decoder, in response to determining that a value of the SPS Rice extension flag is equal to 0, that extension of Rice parameter derivation for the binarization is disabled.

3. The video decoding method of claim 1 , further comprising: in response to determining that the value of the GCI Rice Extension Flag is equal to one, determining that the value of the SPS Rice Extension Flag is equal to zero.

4. receiving, by the decoder, a sequence parameter set (SPS) Rice adaptation enable flag indicating whether to initialize Rice parameter derivation for binarization of abs_reminder and dec_abs_level using statistics accumulated from the previous TU at the beginning of each transform unit (TU); receiving, by the decoder, a general constraint information (GCI) Rice adaptation enable flag in a GCI syntax to provide general constraint control of the SPS Rice adaptation enable flag; abs_reminder is coded with Golomb-Rice code and bypass coded bins in the second pass if the remaining number of context coded bins in the first pass coding is 4 or more; A video decoding method in which dec_abs_level is directly coded using Golomb-Rice code and bypass coded bins in the second pass if the remaining number of context coded bins in the first pass coding is less than 4.

5. In response to determining that the value of the SPS Rice adaptation enable flag is equal to 1, determining, by the decoder, to initialize Rice parameter derivation for the binarization using statistics accumulated at the beginning of each TU from a previous TU; 5. The video decoding method of claim 4, further comprising: in response to determining that the value of the SPS Rice adaptation enable flag is equal to 0, determining, by the decoder, not to employ a previous TU state in Rice parameter derivation.

6. 6. The video decoding method of claim 5, further comprising: in response to determining that the value of the GCI Rice adaptation enable flag is equal to one, determining that the value of the SPS Rice adaptation enable flag is equal to zero.

7. one or more processors; a memory configured to store instructions executable by the one or more processors; A video decoding apparatus, wherein the one or more processors are configured to implement the method of any one of claims 1 to 6 upon execution of the instructions.

8. A non-transitory computer-readable storage medium for video decoding storing computer-executable instructions that, when executed by one or more computer processors, cause the one or more computer processors to implement a method according to any one of claims 1 to 6 and to store a bitstream decoded by the method according to any one of claims 1 to 6.

9. A method for manufacturing a digital video camera comprising: receiving a bitstream; Decoding said bitstream by performing a method according to any one of claims 1 to 6. A method for processing a bitstream.

10. A method for generating a bitstream by performing a video encoding method; and storing the generated bitstream in a storage medium, The video encoding method comprises: encoding a Sequence Parameter Set (SPS) Rice extension flag indicating whether an extension of Rice parameter derivation for binarization of abs_remainder and dec_abs_level is used, and a General Constraint Information (GCI) Rice extension flag in GCI syntax to provide general constraint control of the SPS Rice extension flag; or A bitstream storage method comprising the step of encoding a sequence parameter set (SPS) Rice adaptation enable flag at the beginning of each transform unit (TU) indicating whether to initialize Rice parameter derivation for binarization of abs_remainder and dec_abs_level using statistics accumulated from a previous TU, and a GCI Rice adaptation enable flag in a general constraint information (GCI) syntax, to provide general constraint control of the SPS Rice adaptation enable flag.

11. A method for manufacturing a digital video camera comprising the steps of: receiving a bitstream; obtaining a Sequence Parameter Set (SPS) Rice extension flag from the bitstream indicating whether an extension of Rice parameter derivation for binarization of abs_remainder and dec_abs_level is used, and a General Constraint Information (GCI) Rice extension flag in GCI syntax, to provide general constraint control of the SPS Rice extension flag; or and obtaining from the bitstream a sequence parameter set (SPS) Rice adaptation enable flag indicating whether to initialize Rice parameter derivation for binarization of abs_reminder and dec_abs_level using statistics accumulated from a previous TU at the beginning of each transform unit (TU), and a general constraint information (GCI) Rice adaptation enable flag in a GCI syntax, to provide general constraint control of the SPS Rice adaptation enable flag; abs_reminder is coded with Golomb-Rice code and bypass coded bins in the second pass if the remaining number of context coded bins in the first pass coding is 4 or more; A bitstream decoding method in which dec_abs_level is directly coded using Golomb-Rice code and bypass coded bins in the second pass if the remaining number of context coded bins in the first pass coding is less than 4.

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