Coaxial Fluoroscopy Inspection System

Abstract

An aspect of the present disclosure provides an inspection system that may include an imaging module and a processing circuit. The imaging module may image a wafer with a first light beam and a second light beam. The first light beam may be coaxially aligned with the second light beam and may image a first pattern located on the front side of the wafer to form a first image. The second light beam may image a second pattern located below the first pattern by quantum tunneling imaging or infrared transmission imaging to form a second image. The second light beam may have sufficient power to penetrate at least a portion of the thickness of the wafer to reach the second pattern. The processing circuit may perform image analysis on the first and second images to calculate an overlay value of the first and second patterns and / or defects on the wafer.

Description

[Technical Field]

[0001] Incorporation by Reference This disclosure claims the benefit of U.S. Provisional Patent Application No. 63 / 066,779, filed August 17, 2020, entitled "Method for Producing Overlay Results with Absolute Reference for Semiconductor Manufacturing," which is incorporated herein by reference in its entirety.

[0002] The present disclosure relates generally to methods for manufacturing semiconductor devices, and more particularly to overlay errors. [Background technology]

[0003] Semiconductor manufacturing involves several different steps and processes. One typical manufacturing process is known as photolithography (also called microlithography). Photolithography uses radiation, such as ultraviolet or visible light, to create fine patterns in semiconductor device designs. Semiconductor manufacturing techniques, including photolithography, etching, film deposition, surface cleaning, metallization, etc., can be used to create a variety of semiconductor devices, such as diodes, transistors, and integrated circuits. Summary of the Invention [Means for solving the problem]

[0004] An aspect of the present disclosure provides an inspection system. For example, the inspection system may include an imaging module and a processing circuit. The imaging module may image a wafer with a first light beam and a second light beam aligned simultaneously with the first light beam. The first light beam may image a first pattern located on the front side of the wafer to form a first image. The second light beam may image a second pattern located below the first pattern to form a second image, and may have sufficient power to pass through at least a portion of the thickness of the wafer to reach the second pattern. The processing circuit may perform image analysis on the first and second images to calculate at least one overlay value of the first and second patterns and inspect the wafer for defects. In one embodiment, the second pattern may include a radioactive or fluorescent material. In another embodiment, the second pattern may include at least one of a dot, a line, a corner, a box, a triangle, a number, and a mark.

[0005] In one embodiment, the second pattern can be incorporated into a reference plate located below the wafer. For example, the reference plate can be placed or glued to the backside of the wafer. As another example, the reference plate can be incorporated into a reference holder of a lithography scanner or stepper. In another embodiment, the second pattern can be projected onto the surface of the wafer.

[0006] In one embodiment, the second pattern can be formed on the backside of the wafer and the second light beam can have sufficient power to pass through the entire thickness of the wafer to reach the second pattern, hi another embodiment, the second pattern can be embedded in the wafer.

[0007] In one embodiment, the second wavelength can be longer than the first wavelength of the first light beam. 10 For example, the first wavelength can be 50 to 400 nanometers, and the second wavelength can be 1 to 10 micrometers. As another example, the first wavelength can be 266 nanometers, and the second wavelength can be 3.6 or 3.7 micrometers.

[0008] In one embodiment, the inspection system may further include an ultraviolet (UV) light source configured to generate the first light beam and an infrared (IR) light source configured to generate the second light beam. For example, the second pattern may be imaged by quantum tunneling imaging or IR transmission imaging.

[0009] In one embodiment, the second pattern can be coaxially aligned with the wafer.

[0010] In one embodiment, the processing circuitry can perform image analysis by identifying the coordinate position of the first pattern relative to the second pattern as an overlay value.

[0011] As can be appreciated, as manufacturing progresses on a given wafer, there may be many different materials and layers depending on the given device being made. Thus, each wafer at each process stage may have a different profile, which means that different wavelengths may be required to pass through the wafer.

[0012] It should be understood that the order of discussion of different steps as described herein is presented for clarity. In general, these steps can be performed in any suitable order. In addition, although various features, techniques, configurations, etc. herein may each be described in various places in this disclosure, it is intended that each of these concepts can be performed independently of each other or in combination with each other. Thus, the present disclosure can be embodied and viewed in many different ways.

[0013] It should be noted that this Summary section does not specify every embodiment and / or inherently novel aspect of the present disclosure as set forth in the disclosure or claims. Rather, this Summary merely presents a preliminary discussion of various embodiments and corresponding points of novelty over the prior art. For further details and / or possible aspects of the present disclosure and embodiments, the reader is directed to the Detailed Description section and corresponding figures of the present disclosure as further discussed below.

[0014] Various embodiments of the present disclosure, proposed by way of example, will now be described in detail with reference to the following figures, in which like numbers refer to like elements, and in which: [Brief explanation of the drawings]

[0015] [Figure 1A] Indicates a production problem with the overlay. [Figure 1B] 1 illustrates overlay mitigation using an exemplary reference pattern, according to some embodiments of the present disclosure. [Figure 2] FIG. 1 is a functional block diagram of an exemplary imaging system according to some embodiments of the present disclosure. [Figure 3] 3 is an enlarged view of a portion of the coaxially aligned light beams produced by the exemplary imaging system of FIG. 2. [Figure 4A] 3 shows an enlarged top view of overlaid images of a portion of a wafer captured by a first image acquisition device and a second image acquisition device of the exemplary imaging system of FIG. 2 in accordance with some embodiments of the present disclosure. [Figure 4B] 10 illustrates an exemplary image analysis for overlay calculation using absolute independent fiducial patterns, according to some embodiments of the present disclosure. [Figure 5] 1 is a flowchart illustrating an exemplary imaging method according to some embodiments of the present disclosure. [Figure 6] FIG. 1 is a functional block diagram of an exemplary inspection system according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0016] According to the present disclosure, an imaging method is provided that uses an absolute, independent fiducial pattern as an alignment mark to which a feature pattern is aligned, instead of being aligned with a previous pattern. The feature pattern can be formed on the front side of a wafer, and the fiducial pattern is independent of the front side of the wafer. For example, the fiducial pattern can be formed within or below the wafer. A first light beam (e.g., an ultraviolet (UV) light beam) of a first wavelength can be used to image the feature pattern formed on the first side of the wafer, and a second light beam (e.g., an infrared (IR) light beam) of a second wavelength can be used to image the fiducial pattern formed within or below the wafer. In one embodiment, the second light beam can be coaxially aligned with the first light beam. Because the fiducial pattern is formed within or below the wafer, the second light beam must "penetrate" some or all of the thickness of the wafer to image the fiducial pattern. For example, the second light beam can have sufficient power or intensity to pass through part or all of the thickness of the wafer, depending on whether the reference pattern is formed within or below the wafer, to capture an image of the reference pattern using quantum tunneling imaging, IR transmission imaging, or the like. Thus, a UV image of the feature pattern and an IR image of the reference pattern can be captured on the same optical axis and overlaid on one another. Image analysis can then be performed for exposure, inspection, alignment, or other processing. While the UV and IR images are captured coaxially, transmission to the image detectors can be coaxial or non-coaxial. For example, the coaxially captured images can be optically separated and transmitted to separate image detectors, as discussed below.

[0017] The following disclosure presents many embodiments or examples embodying various features of the presented subject matter. To simplify the disclosure, specific examples of components and arrangements are described below. It should be understood that these are merely examples and are not intended to be limiting. For example, the formation of a first feature above or on a second feature in the following description may include embodiments in which the first and second features are formed in direct contact with each other, and may also include embodiments in which an additional feature may be formed between the first and second features such that the first and second features are not in direct contact with each other. Additionally, the present disclosure may repeat reference numbers and / or letters in various examples. This repetition is for the purposes of brevity and clarity and does not in itself dictate a relationship between the various embodiments and / or configurations discussed. Furthermore, for ease of description, spatially relative terms such as “top,” “bottom,” “below,” “belower,” “lower,” “upper,” and “above” may be used herein to describe the relationship of one element or feature to another element or feature, as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may be interpreted accordingly.

[0018] The illustrative discussion of the different steps as described herein is presented for clarity. In general, these steps can be performed in any suitable order. In addition, although various features, techniques, configurations, etc. herein may each be described in various places in this disclosure, it is intended that each of these concepts can be implemented independently of each other or in combination with each other. Thus, the present disclosure can be embodied and viewed in many different ways.

[0019] Microfabrication involves forming and processing multiple films and layers on a wafer. This can involve dozens or more films stacked on a wafer. Patterns applied to the wafer for various films and layers need to be aligned to previously formed patterns. Traditionally, such alignment has been achieved by using portions of the wafer to form alignment marks and scribe lines. However, the inventors have recognized that various film deposition, etching, and processing techniques sometimes cover alignment marks or even completely remove them. Covered or missing alignment marks can sometimes result in errors when applying subsequent patterns to the wafer. The terms overlay or overlay error refer to the difference between the placement of a given pattern relative to a previously placed pattern. With alignment marks consistently destroyed, overlay errors can accumulate in additional layers, potentially resulting in performance degradation and device failure.

[0020] FIG. 1A illustrates an overlay production problem. Each arrow in this specification has a starting point (e.g., 111A, 111B, 121A, and 131A) corresponding to the location of a preceding pattern and an end point or arrowhead (e.g., 111A', 111N', and 121N') corresponding to the location of a subsequent pattern. As a result, each arrow represents the overlay value or overlay error when the subsequent pattern is formed on or alongside the corresponding preceding pattern. For example, in step 110A, no grid or reference plate is present when placing the initial pattern. Therefore, the starting point 111A of the first arrow is likely to be misaligned, i.e., the initial pattern may have a placement error relative to, for example, the wafer edge. The subsequent pattern then attempts to align based on the corresponding final pattern. As shown in FIG. 1A, the starting point of the subsequent arrow (e.g., 111B) overlaps with the arrowhead (e.g., 111A') of the corresponding final or preceding arrow. In some embodiments, degradation of alignment marks can result in alignment errors for subsequent patterns placed using such degraded alignment marks. Note that even in a theoretically perfect system, walkouts can still occur. For example, if a system's pattern placement tolerance is ±4 nm and each level is referenced to the previous level, the reference level is considered to have zero error. The first layer can then be off by +4 nm. The alignment of the second layer relative to the first layer can be off by +4 nm, meaning the second layer is now off by +8 nm from the reference level. Also, there are process factors that introduce or alleviate stresses during manufacturing that can induce walkouts / misalignments, which can add to the accumulated error even if the pristine alignment marks are visible.

[0021] Additionally, in step S120 of the manufacturing process, the alignment mark may be destroyed, and placement is performed again without the reference mark. Degradation of the alignment mark may result in cumulative alignment errors in subsequent processing. Similar to start point 111A, start point 121A of the new arrow is likely to be misaligned. In the example of FIG. 1A, start point 121A is offset from arrowhead 111N′. Processing proceeds by aligning subsequent patterns based on the corresponding last pattern until the alignment mark is again destroyed in step S130. Similarly, placement is performed without the reference mark, and start point 131A is offset from arrowhead 121N′. As can be seen in FIG. 1A, as layers are added, overlay errors may accumulate, leading to reduced manufacturing yields, device failure, etc. Note that process 110A is a non-limiting example. Other processes (e.g., 110B and 110C) may have different overlay values ​​(different arrows) and / or different steps.

[0022] FIG. 1B illustrates overlay mitigation using an exemplary fiducial pattern, according to some embodiments of the present disclosure. In the techniques herein, all patterns (e.g., patterns having origin 141A) placed on the front side (or processing side) 191 of a wafer 190 are based on the same fiducial pattern 102. In one embodiment, the fiducial pattern 102 can be located below the front side 191 of the wafer 190. For example, the fiducial pattern 102 can be formed on the back side 192 of the wafer 190 or incorporated into the wafer 190. As another example, the fiducial pattern 102 can be incorporated into a fiducial plate (not shown in FIG. 1B ), which can be positioned below the wafer 190, placed on or adhered to the back side 192 of the wafer 190, or incorporated into a substrate holder (not shown in FIG. 1B ) of a photolithography scanner or stepper used to hold the wafer 190. In other words, the reference pattern 102 is not affected by the lithography steps, such as etching, deposition, and chemical-mechanical polishing, that are performed on the front side 191 of the wafer 190 to form the pattern. Therefore, the reference pattern 102 is independent of the front side 191 of the wafer 190 and remains intact during lithography processing of the wafer 190. Thus, the reference pattern 102 can be used and considered independent of any pattern formed on the front side 191 of the wafer 190, rather than being absolute, and is not altered by the various deposition and etching steps performed on the wafer 190. In one embodiment, the reference pattern 102 can be compared to the wafer 190 when placing a new pattern. This means that for the first pattern, the pattern can be aligned to the reference pattern 102. For subsequent patterns, this means that one or more patterns can still be compared to the reference pattern 102 and an overlay correction can be calculated to return to the same alignment.

[0023] For example, in step 140, the fiducial pattern 102 can be used to align the first pattern on the front side 191 of the wafer 190. In one embodiment, the fiducial pattern 102 can be provided at a fixed position relative to the wafer surface, such as by embedding the fiducial pattern 102 in the wafer 190 or by providing a fixed fiducial pattern 102 on the back side 192 of the wafer 190. As a result, the start point 141A of the first arrow is aligned to the fiducial pattern 102, the position of which is shown as the fiducial line 150. Subsequent patterns are also aligned using the fixed, absolute, and independent fiducial pattern 102. Although a new photoresist layer can be formed for each subsequent pattern, because the fiducial pattern 102 is present, alignment marks do not need to be formed and / or destroyed on the wafer 190. As a result, the arrows are centered on the fiducial line 150, signifying that subsequent patterns are aligned to the fiducial pattern 102. Alignment can be performed, for example, by moving the mask of the pattern image or by moving the wafer 190 relative to the mask, so that overlay errors are less likely to accumulate as more and more layers are formed.

[0024] 2 is a functional block diagram of an exemplary imaging system 200 according to some embodiments of the present disclosure. For example, the exemplary imaging system 200 can be implemented in a scanner or stepper of a lithography system. As another example, the exemplary imaging system 200 can be implemented in a resist coating tool, such as a CLEAN TRACK™ ACT™ 12 manufactured by Tokyo Electron Ltd., which includes multiple mask-specific modules, such as a pre-soft bake oven unit, an edge bead removal module, and a cleaning system. The exemplary imaging system 200 can coaxially align two light beams of different wavelengths and focus the two coaxially aligned light beams onto a first pattern located on the front side of a substrate (e.g., a wafer) and a second pattern located below the first pattern, respectively, to capture images of the first and second patterns. For example, the exemplary imaging system 200 may include a first light source 210, a second light source 220, an alignment module 230, a coaxial module 240, a first image acquisition device 250, and a second image acquisition device 260. The first image acquisition device 250 and the second image acquisition device 260 may be collectively referred to as an imaging module.

[0025] In one embodiment, the first light source 210 can be configured to generate a first incident light beam at a first wavelength. For example, the first light source 210 can generate a first incident light beam at a wavelength between 50 and 400 nanometers, such as 266 nanometers (UV in FIG. 2). 入射 As another example, the first light source 210 can be a solid-state laser from Optowaves (Optowares Inc., Massachusetts, USA), such as a pumped nanosecond laser for surface imaging.

[0026] In one embodiment, the second light source 220 can be configured to generate a second incident light beam at a second wavelength. According to some aspects of the present disclosure, when an absolute independent reference pattern is located below a pattern formed on the front side of a wafer and the second incident light beam is used to image the reference pattern, the second incident light beam must penetrate at least a portion or even the entire thickness of a wafer, such as wafer 290.

[0027] For example, the second incident light beam has sufficient power or intensity to pass through the entire thickness (e.g., 750 micrometers) of the wafer 290 to capture an image of the reference pattern using quantum tunneling imaging, IR transmission imaging, etc. As another example, the second light source 220 may emit a second incident light beam (shown as IR in FIG. 2) between 1 and 10 micrometers, e.g., 3.6 or 3.7 micrometers. 入射 , which may be an IR light source generating an IR (shown as ⅕ of the wavelength) light. In one embodiment, the second light source 220 may be an IR tunable quantum cascade laser available from Pranalytica, Inc. (California, USA). According to evanescent wave theory, a light beam impinging on a surface (e.g., the front side 391 of the wafer 290 as shown in FIG. 3) between two different media (e.g., between the wafer 290 and air or liquid in immersion lithography where the coaxial module 240 is located) experiences an exponential decay in intensity of the light beam perpendicular to the surface. The penetration depth at which the intensity drops to 1 / e (approximately 37%) depends, among other things, on the wavelength of the light beam. A typical penetration depth may be a fraction of the wavelength of the light beam, e.g., ⅕ of the wavelength, depending on the angle of incidence of the light beam with respect to the surface. The second incident light beam IR 入射 The second wavelength is the first incident light beam UV 入射 A second incident light beam IR, whose power is well controlled because it is much longer than the first wavelength of 入射 can pass through the entire thickness of the wafer 290.

[0028] In one embodiment, the relative positions of the first (UV) light source 210 and the second (IR) light source 220 can be periodically calibrated, also referred to as red and blue relative position calibration. For example, the relative positions of the first (UV) light source 210 and the second (IR) light source 220 can be maintained within the dynamic range of the sensor, which is several decades and therefore very forgiving. However, normalization can be performed using a stage artifact of known relative transmittance, imaged as needed, for example, once a day, to facilitate normalization of relative intensity. Calibration of relative position or offset with a TIS tool is common to metrology stations. The relative position is readjusted in real time relative to the grid plate as measurements are taken. Thus, the exemplary imaging system 200 can always have a real-time absolute reference. Digital image acquisition and regression can be used.

[0029] In one embodiment, the alignment module 230 aligns the second incident light beam IR 入射 The first incident light beam UV 入射 For example, the alignment module 230 may be configured to align the first incident light beam UV 入射 The optical system may include a first optical beam splitter that splits the first incident optical beam UV into two portions, one of which may be transmitted and the other of which may be reflected. In one embodiment, the first optical beam splitter may be a prism. In another embodiment, the first optical beam splitter may be a transparent plate, such as a glass or plastic plate, coated on one side with a partially transparent thin film of metal, such as aluminum, and may split the first incident optical beam UV. 入射 In the exemplary imaging system 200, a first light source 210 and a first optical beam splitter split a first incident light beam UV 入射 may be positioned to be incident on the first optical beam splitter at a 45 degree angle.

[0030] For example, the alignment module 230 may be configured to align the second incident light beam IR入射 The optical system may further include a second optical beam splitter that splits the second incident optical beam IR into two portions, one of which may be reflected and the other of which may be transmitted. For example, the second optical beam splitter may be a prism. As another example, the second optical beam splitter may be a glass or plastic plate coated on one side with a thin film of aluminum, and may split the second incident optical beam IR. 入射 In the exemplary imaging system 200, the second light source 220 and the second optical beam splitter split the second incident light beam IR into a beam of light IR. 入射 can be positioned to be incident on the second optical beam splitter at a 45 degree angle.

[0031] For example, the alignment module 230 can further include a third beam splitter that allows for the reflection or transmission of light beams of different wavelengths, for example, the third beam splitter can be configured to split the first incident light beam UV of the first wavelength transmitted from the first light beam splitter. 入射 and a second incident light beam IR of a second wavelength transmitted from the second optical beam splitter. 入射 In one embodiment, the third beam splitter may be a transparent plate coated on one side with a dichroic material that allows the transmitted second incident light beam IR to be transmitted. 入射 The first incident light beam UV is reflected 入射 A second incident light beam IR is coaxially aligned with and transmitted through 入射 and the reflected first incident light beam UV 入射 are designed and positioned so that they can be directed to the wafer 290 along the same optical path.

[0032] In one embodiment, the coaxial module 240 splits the first incident light beam UV reflected from the third beam splitter. 入射 is focused onto a first pattern 301 (shown in FIG. 3) located on the front side 391 of the wafer 290, and a second incident light beam IR transmitted from a third beam splitter. 入射The coaxial module 240 may be configured to focus the first incident light beam UV onto a second pattern 302 (or reference pattern) located below the first pattern 301. For example, the coaxial module 240 may be designed and configured to adjust the tolerance of the placement (i.e., depth of focus (DOF)) of the first pattern 301 and the second pattern 302. For example, a level sensor may track the top of the first pattern 301, subtract the height of the first pattern 301 by the height of the wafer 290, and adjust the height of the coaxially aligned first incident light beam UV. 入射 and a second incident light beam IR 入射 The DOF can be simultaneously automatically adjusted using deep ultraviolet (DUV) light. Damage to the photoresist is negligible with deep ultraviolet (DUV) light. The 250 micrometer field of view (FOV) herein corresponds to approximately 60 nanometers per pixel for 4K resolution. This field of view is sufficient for measuring alignment errors of 0.1 nanometers. Having a light source of sufficient power or intensity can suppress shadowing of the metal layer. While FIG. 3 illustrates imaging of a physical pattern formed on the wafer 290, forming an image of the pattern (i.e., before exposure to activating light) can be achieved, for example, with light having a wavelength that does not activate the photoresist of the wafer.

[0033] In one embodiment, the coaxial module 240 can include 2-12 individual optical elements, such as 6 optical elements, each of which can include sapphire, AlN, MgF, CaF, BaF, LiF, Ge, Si, or the like.

[0034] First incident light beam UV 入射 is reflected by the first pattern 301 and becomes a first reflected light beam UV 反射 The first reflected light beam UV 反射The second incident light beam IR can be sequentially reflected by the third beam splitter and the first optical beam splitter and captured by the first image capture device 250, which can form a corresponding first image of the first pattern 301. For example, the first image capture device 250 can be a DataRay camera. 入射 is reflected by the second pattern 302 to form a second reflected light beam IR 反射 A second reflected light beam IR can be formed. 反射 The first and second images may be sequentially transmitted through a third beam splitter and a second optical beam splitter and captured by a second image capture device 260, which may form a corresponding second image of the second pattern 302. For example, the second image capture device 260 may be a high-speed, high-resolution mid-wavelength IR (MWIR) camera, such as a FLIR X8500 MWIR. In one embodiment, image analysis may be performed on the first and second images to calculate an overlay value and determine the location of the first pattern 301. For example, the image analysis may be performed by overlaying a first image of the first pattern 301 and a second image of the second pattern 302 on one another and determining the coordinate position of the first pattern 301 relative to the second pattern 302. In some embodiments, the image analysis may be performed in real time, allowing the location of the first pattern 301 to be adjusted in real time.

[0035] In one embodiment, the alignment module 230 may further include a first lens set and a second lens set, for example, the first lens set may be configured to align the first incident light beam UV generated by the first light source 210. 入射 collimated to form a first incident light beam UV 入射 As another example, the second lens set may also include reflective and / or refractive optics to direct the second incident light beam IR generated by the second light source 220 to the first optical beam splitter. 入射 collimated to form a second collimated incident light beam IR入射 The light may include reflective and / or refractive optics that directs the light to the second optical beam splitter.

[0036] In one embodiment, the exemplary imaging system 200 can further include a third lens set 270 and a fourth lens set 280. For example, the third lens set 270 can be configured to focus the first reflected light beam UV 反射 The fourth lens set 280 may also include reflective and / or refractive optics to focus the second reflected light beam IR onto the first image acquisition device 250. As another example, the fourth lens set 280 may also focus the second reflected light beam IR onto the first image acquisition device 250. 反射 The second image acquisition device 260 may include reflective and / or refractive optics that focus the reflected light onto the second image acquisition device 260.

[0037] In one embodiment, the exemplary imaging system 200 may further include an optical system that can capture the diffracted light beam outside the coaxial module 240 and direct the diffracted light beam to the first image acquisition device 250 and the second image acquisition device 260.

[0038] 3, the first pattern 301 may be included on a photomask (not shown) located on the front side 391 of the wafer 290. In one embodiment, the photomask may be placed in direct contact with the wafer 290 in a contact printing system. In another embodiment, the photomask may be placed away from the wafer 290 in a proximity printing system or a projection printing system.

[0039] In the exemplary embodiment shown in FIG. 3, the second pattern 302 is located on the backside 392 of the wafer 290 and is irradiated with a second incident light beam IR. 入射The laser beam has sufficient power to pass through the entire thickness of the wafer 290 to capture a second image of the second pattern 302 using quantum tunneling imaging, IR transmission imaging, or the like. In one embodiment, the second pattern 302 can be formed on a reference plate 310. For example, the reference plate 310 can be a grid plate having nearly perfectly aligned 20 micrometer by 20 micrometer squares, and the second pattern 302 can be at least one corner point of the squares. As another example, the reference plate 310 can include at least one of dots, lines, corners, boxes, numbers, marks, or any other pattern suitable for alignment purposes, and the second pattern 302 can be one of these. In one embodiment, the reference plate 310 can be bonded to the backside 392 of the wafer 290. Thus, the reference plate 310 and the wafer 290 can function as a single module. In another embodiment, the reference plate 310 can be integrated into the substrate holder 320 of a photolithography scanner or stepper. Each time a given wafer is placed on the substrate holder 320, it may be positioned or oriented differently compared to the previous placement, and this is not a problem. For a given new pattern to be placed or exposed, the wafer can be imaged using the reference plate 310, e.g., a grid plate. The reference plate 310 can then provide relative reference points for identifying vectors for two or more points, from which overlay correction adjustments for the next exposure can be calculated using vector analysis. For example, when the wafer 290 does not yet have a pattern, it is roughly pre-aligned to the reference plate 310 when it is placed on the reference plate 310. As another example, when the wafer 290 already has an existing pattern, the existing pattern and the reference plate 310 can be coaxially aligned when it is placed on the reference plate 310.In conventional lithography processes, measurement errors caused by wafer backside scratches, backside dust, and / or thermally induced substrate distortion can affect overlay, but these issues often go unnoticed in conventional overlay systems. Technology herein includes an independent reference plate and high spatial resolution to overcome these issues.

[0040] In one embodiment, the second pattern 302 may be formed on the backside 392 of the wafer 290 and may be irradiated with a second incident light beam IR. 入射 also has sufficient power to penetrate the entire thickness of the wafer 290 to take a second image of the second pattern 302 using quantum tunneling imaging, IR transmission imaging, etc. Other techniques may include embedding the second pattern 302 (e.g., grating lines) into the wafer 290 using a radioactive or fluorescent material, etc.

[0041] In one embodiment, the second pattern 302 may be formed on the front side 291 of the wafer 290, and then a layer of silicon and / or silicon oxide may be deposited on top of the second pattern 302. For example, the layer of silicon and / or silicon oxide may have a thickness of 1 to 5 micrometers such that the second pattern 302 is effectively "embedded" in the wafer 290, allowing the pattern to be formed on the layer of silicon and / or silicon oxide. Thus, the second incident light beam IR 入射 must have sufficient power to penetrate the silicon and / or silicon oxide layer to capture a second image of the second pattern 302 using quantum tunneling imaging, IR transmission imaging, etc. As another example, the second pattern 302 can be formed on the backside 292 of the wafer 290 prior to a protective layer, such as silicon or silicon oxide, being formed on the backside 292 of the wafer 290. As a result, the second pattern 302 can be embedded in the wafer 290. Therefore, the second incident light beam IR 入射must have sufficient power to penetrate the entire thickness of the wafer 290 to capture a second image of the second pattern 302 using quantum tunneling imaging, IR transmission imaging, or the like. In one embodiment, the second pattern 302 can be formed on the front side of the carrier wafer before the front side of the carrier wafer is bonded to the back side of the target wafer (e.g., back side 392 of wafer 290). As a result, the second pattern 302 can be sandwiched between the carrier wafer and the target wafer, which together function as one wafer. Thus, the second incident light beam IR 入射 The laser beam must have sufficient power to penetrate the entire thickness of the target wafer to capture a second image of the second pattern 302 using quantum tunneling imaging, IR transmission imaging, or the like. In some embodiments, optical projection can also be used. For example, the second pattern 302 can be a projected grating that is not physically present on the wafer 290, such as a grating plate on the substrate holder or below the substrate holder. In some embodiments, the second pattern 302 can be a combination of physical marks and optical projection. For example, physical fiducial marks may be provided in peripheral areas of the substrate holder that will not be covered by the wafer placed on the substrate holder, and optical projection can complete the fiducial pattern in areas of the wafer, and tunneling may not be required.

[0042] FIG. 4A shows a magnified top view of an overlaid image of a portion of a wafer 290 captured by a first image acquisition device 250 and a second image acquisition device 260, the portion of the wafer 290 including a first pattern 301 and a second pattern 302, according to some embodiments of the present disclosure. FIG. 4B shows an exemplary image analysis for overlay calculation using the first pattern 301, which serves as a reference pattern in the alignment process, according to some embodiments of the present disclosure. FIGS. 4A and 4B illustrate how the absolute, independent first pattern 301 can be used to calculate the overlay value of two patterns. Calculating the overlay value is done by knowing each common reference pattern relative to a coordinate system and using that reference pattern to know "where" each pattern is in that coordinate system. For example, once the distance between each layer is known, simple vector algebra is used to perform the vector calculations necessary to extract the overlay value. From that point on, this is basic coordinate geometry. One can think of this as mix-match overlay (MMO), where the golden tool is always under the stage by itself.

[0043] In one embodiment, the first pattern 301 (denoted by point M), for example, one corner of a square of a grid plate having 20 micrometer by 20 micrometer squares, can be considered absolute or wafer independent and used to calculate an overlay value between the second pattern 302 (denoted by point N) and the third pattern 401 (denoted by point P) formed subsequent to the formation of the second pattern 302. By overlaying the second pattern 302 on the first pattern 301, the coordinate difference or vector from point M of the first pattern 301 to point N of the second pattern 302 can be calculated.

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[0044] Additionally, the coordinate position of a point of the second pattern 302 (e.g., N(Wx,Wy)) and the coordinate position of a point of the third pattern 401 (e.g., P(Bx,By)) can be used to determine the overlay value or overlay deviation from the second pattern 302 to the third pattern 401. This overlay value can then be used to position a third or subsequent pattern and correct the overlay relative to an independent reference pattern, e.g., the first pattern 301. In some embodiments, having a uniform reference image for all image comparisons allows for correcting adjacent patterns and maintaining overlay correction based on the first line or absolute reference. Regarding concerns about the impact of critical dimension (CD) variations on the resist layer, the techniques herein allow for coordinate extraction without the impact of pattern CD variations on the resist layer and underlying layers (e.g., a metal resist pattern covers most of the via pattern). The impact of CD variations on the resist layer can be problematic for alignment, but can be ignored by the overlay metrology team as negligible. The reference pattern itself is a much better indicator of pattern placement, providing a significant improvement over alignment marks, which suffer from CD astigmatism and Zernike-induced offsets. Note that in some embodiments, images do not need to be overlaid. Coordinate position data can be collected from the reference plate and the wafer's work surface, and vector analysis can then be used to determine the overall offset or overlay value.

[0045] 5 is a flowchart illustrating an exemplary imaging method 500 for processing a wafer (e.g., wafer 290) according to some embodiments of the present disclosure. The exemplary imaging method 500 may be applied to the exemplary imaging system 200. In various embodiments, some of the steps of the illustrated exemplary imaging method 500 may be performed simultaneously or in a different order than shown, may be replaced by other method steps, or may be omitted. Additional method steps may also be performed as desired.

[0046] In step S510, a first light beam (e.g., a first incident light beam UV 入射 ) and a second light beam (e.g., a second incident light beam IR) coaxially aligned with the first light beam. 入射 In one embodiment, the first light beam images a first pattern located on the front side of the wafer to form a first image (e.g., a first reflected light beam UV 反射 ) and the second light beam images a second pattern located below the first pattern to form a second image (e.g., a second reflected light beam IR 反射 (by capturing the second light beam). For example, the second light beam can have sufficient power to pass through at least a portion of the thickness of the wafer to reach the second pattern. In one embodiment, the second light beam can have a second wavelength longer than the first wavelength of the first light beam. For example, the first light beam can be generated by a first light source 210, such as a UV light source, and the second light beam can be generated by a second light source 220, such as an IR light source. In one embodiment, the first wavelength is between 50 and 400 nanometers, e.g., 266 nanometers, and the second wavelength is between 1 and 10 micrometers, e.g., 3.6 or 3.7 micrometers. In one embodiment, the second pattern can be imaged by quantum tunneling imaging or IR transmission imaging.

[0047] In one embodiment, the second pattern can be incorporated with sub-nanometer positional accuracy into a reference plate, e.g., a grid plate, having 20 micrometer by 20 micrometer squares located below the wafer. For example, the reference plate can be placed or glued to the backside of the wafer. Therefore, the second light beam can have sufficient power to penetrate the entire thickness of the wafer to capture a second image of the second pattern using quantum tunneling imaging, IR transmission imaging, or the like. In another embodiment, the reference plate can be incorporated into a substrate holder or chip of a photolithography scanner or stepper, and the exemplary imaging method 500 can further include aligning the reference plate with the wafer prior to imaging the wafer with the first and second light beams. In yet another embodiment, the second pattern can be formed on the backside of the wafer. Therefore, the second light beam can have sufficient power to penetrate the entire thickness of the wafer to capture a second image of the second pattern 302 using quantum tunneling imaging, IR transmission imaging, or the like. In yet another embodiment, the second pattern can be embedded in the wafer and accessible through one or more layers. Thus, the second light beam can have sufficient power to pass through a portion of the thickness of the wafer to capture a second image of the second pattern 302 using quantum tunneling imaging, IR transmission imaging, or the like. For example, the second pattern can include a radioactive or fluorescent material. As another example, the second pattern can include at least one of a dot, a line, a corner, a box, a triangle, a number, and a mark.

[0048] Image analysis can be performed on the first and second images to calculate an overlay value for the first and second patterns in step 520. For example, the image analysis can be performed by identifying the coordinate position of the first pattern relative to the second pattern as the overlay value, as shown in Figures 4A and 4B.

[0049] Next, in step S530, a first pattern can be formed on the front side of the wafer based on the overlay value. For example, a photomask of the first pattern can be moved relative to the wafer based on the overlay value so that the first pattern is aligned with the second pattern, and a resist layer formed on the front side of the wafer can be exposed to allow the first pattern to be formed in the resist layer.

[0050] In one embodiment, in a "step-and-repeat" or "step-and-scan" system, the first and second light beams and the photomask can be moved to different areas of the wafer, and steps S510-S530 can be repeated to form one or more patterns in the resist layer on the front side of the wafer.

[0051] The reference pattern used in patterning herein can be considered absolute in some sense and relative in other sense. For example, the reference pattern may hold or maintain fixed grid lines (or dots, corners, boxes, or any other suitable shape) and remain unchanged through the various deposition and etching steps on the wafer. In one embodiment, this can be a grid plate integrated with the stage or substrate holder. In this manner, the grid plate is absolute because the same physical grid plate is used throughout wafer processing, but relative because the physical grid plate is not fixed to the wafer itself and can move relative to the wafer throughout wafer processing. Each time a given wafer is placed on the stage, the wafer may be in a different position or orientation compared to the previous placement. This is not a problem. For a given new pattern to be placed or exposed, the wafer is imaged using the reference grid. The reference grid can then provide relative reference points for identifying vectors for two or more points, from which vector analysis can be used to calculate overlay correction adjustments for the next exposure.

[0052] The exemplary imaging system 200 and exemplary imaging method 500 can be implemented as a stand-alone coaxial metrology system and method that can operate in combination with a lithography tool, an integrated track coaxial metrology system and method with feedforward control for a linked lithography cell, or an active coaxial metrology system and method that can be incorporated into a lithography tool for real-time correction.

[0053] 6 is a functional block diagram of an example inspection system 600 in accordance with some embodiments of the present disclosure. The example inspection system 600 can calculate an overlay value of a first pattern and a second pattern associated with a wafer and inspect the wafer for defects. For example, the example inspection system 600 can include an imaging module 610, such as the imaging system 200, and a processing circuit 620. In one embodiment, the imaging module 610 can image the wafer with a first light beam and a second light beam coaxially aligned with the first light beam, where the first light beam images a first pattern located on the front side of the wafer to form a first image, and the second light beam images a second pattern located below the first pattern to form a second image, and the second light beam has sufficient power to pass through at least a portion of the thickness of the wafer to reach the second pattern. For example, the imaging module 610 may image the wafer 290 with a first light beam generated by a first light source 210, e.g., a UV light source, and a second light beam generated by a second light source 220, e.g., an IR light source such as an IR tunable quantum cascade laser, where the first light beam may image a first pattern 301 located on the front side 391 of the wafer 290, and the second light beam may image a second pattern 302 located below the first pattern 301 and have sufficient power to pass through at least a portion of the thickness of the wafer 290 to reach the second pattern 302. The processing circuitry 620 may perform image analysis on the first image of the first pattern 301 and the second image of the second pattern 302 to calculate an overlay value of the first pattern 301 and the second pattern 302.

[0054] Each wafer may have scratch effects, thermal effects, and chucking issues that may be severe enough to affect overlay. The wafer may also have patterning defects, which may be present if lines are not connected as designed, if critical dimensions are too small or large, or if there are gaps that cause shorts. Because the second light beam can pass through the wafer 290, the second light beam may also identify defects, and the captured second image may contain further information about the defects. In one embodiment, the processing circuitry 620 may further inspect the wafer 290 for any defects by performing image analysis on the first image of the first pattern 301 and the second image of the second pattern 302.

[0055] Aspects of the present disclosure provide imaging methods that can provide a precise and accurate alignment mechanism that does not rely on traditional alignment marks formed on the front side of the wafer. Instead, reliable fiducial patterns can be repeatedly evaluated for precise and accurate registration and alignment of subsequent patterns relative to patterns or gratings in / under the wafer. The techniques herein eliminate the need for traditional overlay marks. These new paradigms of overlay eliminate the need for clearouts, lost real estate, and complex scribe line designs, improving silicon real estate utilization and enabling complex integration of alignment marks. The exemplary fiducial patterns disclosed herein are not affected or obscured by undesirable processes that fabricate devices in place of alignment marks, as is often the case in the past. Here, overlay placement accuracy is not only nearly perfect every time, but can also be measured from the very first layer where the second pattern resides, since the fiducial pattern is always hidden beneath the stage.

[0056] The foregoing description has set forth specific details, such as the particular configuration of the processing system and descriptions of the various components and steps used therein. However, it should be understood that the technology herein may be practiced in other embodiments that depart from these specific details, and that such details are for purposes of explanation and not limitation. The embodiments disclosed herein have been described with reference to the accompanying drawings. Similarly, for purposes of explanation, specific numbers, materials, and configurations have been set forth to provide a thorough understanding. However, embodiments may be practiced without such specific details. Components having substantially the same functional configuration are designated by similar reference numerals, and therefore any redundant description may be omitted.

[0057] To facilitate understanding of various embodiments, various techniques have been described as multiple discrete operations. The order of description should not be construed to imply that these operations are necessarily order dependent. In fact, these operations need not be performed in the order presented. The described operations may be performed in a different order than in the described embodiments. Various additional operations may be performed and / or described operations may be omitted in additional embodiments.

[0058] As used herein, "substrate" or "target substrate" refers generally to an object to be processed in accordance with the present disclosure. A substrate may include any material portion or structure of a device (especially a semiconductor device or other electronic device), such as a base substrate structure (e.g., a semiconductor wafer), a reticle, or a layer (e.g., a thin film) on or overlying the base substrate structure. Thus, substrate is not limited to any particular base structure, underlying layer, or overlying layer, whether patterned or not, but rather is contemplated to include any such layer or base structure, and any combination of layers and / or base structures. While the description may refer to particular types of substrates, this is for illustrative purposes only.

[0059] Those skilled in the art will also understand that many variations can be made to the operation of the techniques described above and still achieve the same objectives of the present disclosure. Such variations are intended to be encompassed within the scope of the present disclosure. Accordingly, the foregoing description of embodiments of the present disclosure is not intended to be limiting. Rather, all limitations to embodiments of the present disclosure are presented in the following claims.

Claims

1. 1. An inspection system comprising: an imaging module configured to image a wafer using a first light beam and a second light beam coaxially aligned with the first light beam, the first light beam images a first pattern disposed on a front side of a wafer to form a first image; the second light beam captures an image of a second pattern disposed below the first pattern to form a second image; an imaging module, the second light beam having sufficient power to pass through at least a portion of the thickness of the wafer to reach the second pattern; processing circuitry configured to perform image analysis on the first image and the second image, calculate at least one overlay value of the first pattern and the second pattern, and inspect the wafer for defects; an ultraviolet (UV) light source configured to generate the first light beam; and an infrared (IR) light source configured to generate the second light beam; An inspection system comprising:

2. The inspection system of claim 1 , wherein the second pattern is incorporated into a reference plate positioned below the wafer.

3. The inspection system of claim 2 , wherein the reference plate is disposed on or adhered to the backside of the wafer.

4. The inspection system of claim 2 , wherein the reference plate is integrated into a substrate holder of a photolithography scanner or stepper.

5. the second pattern is formed on the backside of the wafer; 10. The inspection system of claim 1, wherein the second light beam has sufficient power to pass through the entire thickness of the wafer to reach the second pattern.

6. The inspection system of claim 1 , wherein the second pattern is embedded in the wafer.

7. The inspection system of claim 1 , wherein the second pattern comprises a radioactive or fluorescent material.

8. The inspection system of claim 1 , wherein the second pattern comprises at least one of a dot, a line, a corner, a box, a triangle, a number, and a mark.

9. 10. The inspection system of claim 1, wherein the first light beam has a wavelength between 50 and 400 nanometers, and the second light beam has a wavelength between 1 and 10 micrometers.

10. 11 10. The inspection system of claim 9, wherein the wavelength of the first light beam is 266 nanometers and the wavelength of the second light beam is 3.6 or 3.7 micrometers.

11. The inspection system of claim 1 , wherein the second pattern is imaged by quantum tunneling imaging or IR transmission imaging.

12. The inspection system of claim 1 , wherein the second pattern is coaxially aligned with the wafer.

13. The inspection system of claim 1 , wherein the processing circuitry performs the image analysis by identifying a coordinate position of the first pattern relative to the second pattern as the overlay value.

14. The inspection system of claim 1 , wherein the second pattern is projected onto a surface of the wafer.

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