Runtime alias checking optimization

Abstract

Optimizing the runtime alias checks includes: a compiler identifying a base pointer in a code loop and a plurality of different memory accesses based on the base pointer; the compiler generating a first portion of runtime code to determine a minimum access and a maximum access of the plurality of different memory accesses; and the compiler generating a second portion of runtime code including one or more runtime alias checks for the minimum access and one or more runtime alias checks for the maximum access.

Description

[Background technology]

[0001] Aliasing refers to when a data location in memory can be accessed through different symbolic names within a program. Thus, modifying the data under one name implicitly modifies the values ​​associated with all alias names. As a result, aliasing has various effects on compiler performance and the correctness of the code generated by the compiler. When the value of a pointer alias is not known at compile time, runtime alias checks are inserted into the compiled code. [Brief explanation of the drawings]

[0002] [Figure 1] FIG. 1 is a block diagram of an exemplary computing device for optimizing runtime alias checking, according to some embodiments. [Figure 2] 1 is a flowchart of an exemplary method for optimizing runtime alias checking, according to some embodiments. [Figure 3] 1 is a flowchart of an exemplary method for optimizing runtime alias checking, according to some embodiments. [Figure 4] 1 is a flowchart of an exemplary method for optimizing runtime alias checking, according to some embodiments. [Figure 5] 1 is a flowchart of an exemplary method for optimizing runtime alias checking, according to some embodiments. [Figure 6] 1 is a flowchart of an exemplary method for optimizing runtime alias checking, according to some embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0003] In some embodiments, a method for optimizing runtime alias checking includes: identifying, by a compiler, a base pointer in a code loop and a plurality of distinct memory accesses based on the base pointer; generating, by the compiler, a first portion of runtime code to determine minimum accesses and maximum accesses of the plurality of distinct memory accesses; and generating, by the compiler, a second portion of runtime code including one or more runtime alias checks for the minimum accesses and one or more runtime alias checks for the maximum accesses.

[0004] In some embodiments, the one or more runtime alias checks are based on one or more other base pointers in the code loop. In some embodiments, the method includes identifying, by a compiler, in the code loop a first group of memory accesses based on the base pointer and a second group of memory accesses based on the other base pointer, wherein the first group of memory accesses and the second group of memory accesses share a common memory access pattern, and generating a first portion of runtime code to determine minimum and maximum accesses of the plurality of different memory addresses includes generating, by the compiler, the first portion of runtime code to determine minimum and maximum accesses based on the common memory access pattern. In some embodiments, generating a first portion of runtime code to determine minimum and maximum accesses of the plurality of different memory addresses includes generating, by the compiler, the first portion of runtime code to determine, by the compiler, the other minimum accesses and the other maximum accesses of the other base pointer based on the common memory access pattern, and generating a second portion of runtime code includes generating, by the compiler, the second portion of runtime code including one or more runtime alias checks of the other minimum accesses and one or more runtime alias checks of the other maximum accesses.In some embodiments, the method includes identifying, by a compiler, in the code loop, a first group of memory accesses based on a base pointer and a second group of memory accesses based on another base pointer, where the first group of memory accesses and the second group of memory accesses share a common memory access pattern; and generating, by the compiler, a third portion of runtime code to determine another minimum access based on the minimum access and another maximum access based on the maximum access, where generating the second portion of runtime code includes, by the compiler, generating the second portion of runtime code including one or more runtime alias checks of the other minimum access and one or more runtime alias checks of the other maximum access. In some embodiments, the method includes, by the compiler, determining, by the compiler, an estimated cost of the one or more runtime checks; and determining, by the compiler, the estimated cost is less than a threshold, where generating the first portion of runtime code and generating the second portion of runtime code are performed in response to the estimated cost being less than the threshold. In some embodiments, the method includes applying, by the compiler, one or more loop optimizations to the code loop.

[0005] In some embodiments, an apparatus for optimizing runtime alias checking performs steps including: identifying, by a compiler, a base pointer in a code loop and a plurality of different memory accesses based on the base pointer; generating, by the compiler, a first portion of runtime code to determine minimum accesses and maximum accesses of the plurality of different memory accesses; and generating, by the compiler, a second portion of runtime code including one or more runtime alias checks for the minimum accesses and one or more runtime alias checks for the maximum accesses.

[0006] In some embodiments, the one or more runtime alias checks are based on one or more other base pointers in the code loop. In some embodiments, these steps include identifying, by a compiler, in the code loop a first group of memory accesses based on the base pointer and a second group of memory accesses based on the other base pointer, wherein the first group of memory accesses and the second group of memory accesses share a common memory access pattern; and generating a first portion of runtime code to determine minimum and maximum accesses of the plurality of different memory addresses includes generating, by the compiler, the first portion of runtime code to determine minimum and maximum accesses based on the common memory access pattern. In some embodiments, generating a first portion of runtime code to determine minimum and maximum accesses of the plurality of different memory addresses includes generating, by the compiler, the first portion of runtime code to determine, by the compiler, the other minimum accesses and the other maximum accesses of the other base pointer based on the common memory access pattern; and generating a second portion of runtime code includes generating, by the compiler, the second portion of runtime code including one or more runtime alias checks of the other minimum accesses and one or more runtime alias checks of the other maximum accesses.In some embodiments, these steps include: identifying, by the compiler, in the code loop, a first group of memory accesses based on a base pointer and a second group of memory accesses based on another base pointer, where the first group of memory accesses and the second group of memory accesses share a common memory access pattern; and generating, by the compiler, a third portion of runtime code to determine another minimum access based on the minimum access and another maximum access based on the maximum access, where generating the second portion of runtime code includes, by the compiler, generating the second portion of runtime code including one or more runtime alias checks of the other minimum access and one or more runtime alias checks of the other maximum access. In some embodiments, these steps include determining, by the compiler, an estimated cost of the one or more runtime checks; and determining, by the compiler, the estimated cost is less than a threshold, where generating the first portion of runtime code and generating the second portion of runtime code are performed in response to the estimated cost being less than the threshold. In some embodiments, these steps include applying, by the compiler, one or more loop optimizations to the code loop.

[0007] In some embodiments, a computer program product for optimizing runtime alias checking is disposed on a computer-readable medium and includes computer program instructions that, when executed, cause a computer to perform steps including: identifying, by a compiler, a base pointer in a code loop and a plurality of different memory accesses based on the base pointer; generating, by the compiler, a first portion of runtime code to determine minimum accesses and maximum accesses of the plurality of different memory accesses; and generating, by the compiler, a second portion of runtime code including one or more runtime alias checks for the minimum accesses and one or more runtime alias checks for the maximum accesses.

[0008] In some embodiments, the one or more runtime alias checks are based on one or more other base pointers in the code loop. In some embodiments, these steps include identifying, by a compiler, in the code loop a first group of memory accesses based on the base pointer and a second group of memory accesses based on the other base pointer, wherein the first group of memory accesses and the second group of memory accesses share a common memory access pattern; and generating a first portion of runtime code to determine minimum and maximum accesses of the plurality of different memory addresses includes generating, by the compiler, the first portion of runtime code to determine minimum and maximum accesses based on the common memory access pattern. In some embodiments, generating a first portion of runtime code to determine minimum and maximum accesses of the plurality of different memory addresses includes generating, by the compiler, the first portion of runtime code to determine, by the compiler, the other minimum accesses and the other maximum accesses of the other base pointer based on the common memory access pattern; and generating a second portion of runtime code includes generating, by the compiler, the second portion of runtime code including one or more runtime alias checks of the other minimum accesses and one or more runtime alias checks of the other maximum accesses.In some embodiments, these steps include: identifying, by the compiler, in the code loop, a first group of memory accesses based on a base pointer and a second group of memory accesses based on another base pointer, where the first group of memory accesses and the second group of memory accesses share a common memory access pattern; and generating, by the compiler, a third portion of runtime code to determine another minimum access based on the minimum accesses and another maximum access based on the maximum accesses, where generating the second portion of runtime code includes, by the compiler, generating the second portion of runtime code including one or more runtime alias checks of the other minimum accesses and one or more runtime alias checks of the other maximum accesses. In some embodiments, these steps include determining, by the compiler, an estimated cost of the one or more runtime checks; and determining, by the compiler, that the estimated cost is below a threshold, where generating the first portion of runtime code and generating the second portion of runtime code are performed in response to the estimated cost being below the threshold.

[0009] Optimization of runtime alias checking according to the present disclosure is generally implemented using a computer, i.e., an automated computing machine. Accordingly, for further explanation, Figure 1 illustrates a block diagram of an automated computing machine including an exemplary computer 100 configured for optimizing runtime alias checking according to certain embodiments. The computer 100 of Figure 1 includes at least one computer processor 102 or "CPU" and random access memory 104 (RAM) connected to the processor 102 and other components of the computer 100 via a high-speed memory bus 106 and a bus adapter 108.

[0010] Stored in RAM 104 is an operating system 110. Operating systems useful in computers configured to optimize runtime alias checking include UNIX, Linux, Microsoft Windows, and others that will occur to those skilled in the art. While the example operating system 110 of FIG. 1 is shown in RAM 104, many components of such software are typically also stored in non-volatile memory, such as data storage 112, for example, a disk drive. A compiler 114 for optimizing runtime alias checking is also stored in RAM.

[0011] 1 includes a disk drive adapter 116 coupled to processor 102 and other components of computer 100 via expansion bus 118 and bus adapter 108. Disk drive adapter 116 connects non-volatile data storage to computer 100 in the form of data storage 112. Disk drive adapters useful in computers configured to optimize runtime alias checking include Integrated Drive Electronics (IDE) adapters, Small Computer System Interface (SCSI) adapters, and others as would occur to one skilled in the art. In some embodiments, non-volatile computer memory is implemented as an optical disk drive, an electrically erasable programmable read-only memory (so-called "EEPROM" or "flash" memory), a RAM drive, etc., as would occur to one skilled in the art.

[0012] The exemplary computer 100 of Figure 1 includes one or more input / output (I / O) adapters 120. The I / O adapters implement user-oriented input / output through software drivers and computer hardware for controlling, for example, output to a display device, such as a computer display screen, and user input from user input devices 122, such as a keyboard and mouse. The exemplary computer 100 of Figure 1 also includes a video adapter 124, which is an example of an I / O adapter specifically designed for graphics output to a display device 126, such as a display screen or computer monitor. The video adapter 124 is connected to the processor 102 via a high-speed video bus 128, the bus adapter 108, and a front-side bus 130, which is also a high-speed bus.

[0013] The example computer 100 of Figure 1 includes a communications adapter 132 for data communications with other computers and with a data communications network. Such data communications may be performed serially via an RS-232 connection, an external bus such as a Universal Serial Bus (USB), a data communications network such as an IP data communications network, and other methods that will occur to those skilled in the art. Communications adapters implement the hardware level of data communications by which one computer sends data communications to another computer directly or over a data communications network. Examples of communications adapters useful in computers configured to optimize runtime alias checking include modems for wired dial-up communications, Ethernet (IEEE 802.3) adapters for wired data communications, and 802.11 adapters for wireless data communications.

[0014] To further explain, Figure 2 sets forth a flowchart illustrating an exemplary method for optimizing runtime alias checking that includes identifying (202) by the compiler 114 a base pointer within a code loop (e.g., a code loop of code 204 compiled by the compiler 114) and multiple distinct memory accesses based on that pointer. The code loop includes an iterative portion of the code 204 (e.g., a "for" loop, a "while" loop, etc.). The base pointer is a symbolic reference of a pointer to a location in memory. For example, the base pointer may correspond to a variable declared in the code loop or an attribute input to a function that includes the code loop.

[0015] The different memory accesses based on the base pointer are accesses to a location in memory using the base pointer, or the base pointer and an offset. If an offset is not used to access memory and only the base pointer is used, the offset is considered NULL. Therefore, when describing a combination of a base pointer and an offset, such a combination is assumed to include the base pointer itself (e.g., having a NULL offset). The subscript includes a loop induction variable and / or the combination of a loop induction variable and an offset. The loop induction variable includes a variable that is modified during an iteration of a code loop. The offset includes a value to which the loop induction variable is added or subtracted to determine the specific memory location accessed during each iteration of the loop. A specific memory access is defined by its base pointer and its offset.

[0016] Below is an example code 204 referred to as an example function called "foo." void foo(int*A, int*B, int*X1, int*X2, int*X3, int*X4, intS, intE, IntP, IntQ, IntR){ for(Int i=S;i <E;++i){ X1[i]=A[i+P]+A[i+Q]+A[i+R]+ A[i+2*P]+A[i+2*Q]+A[i+2*R]+ A[i+3*P]+A[i+3*Q]+A[i+3*R]+ A[i+4*P]+A[i+4*Q]+A[i+4*R]+ X2[i]=i; X3[i]=i; X4[i]=i;}}

[0017] In the example function "foo," "i" serves as the loop induction variable. The code loop includes base pointers "A," "X1," "X2," "X3," and "X4." In the example function "foo," the base pointer "A" serves as the basis for 12 different memory accesses during each iteration of the loop (i.e., A[P], A[Q], A[R], A[2*P], A[2*Q], A[2*R], A[3*P], A[3*Q], A[3*R], A[4*P], A[4*Q], A[4*R]). Each memory access corresponds to a range of addresses accessed relative to the memory accesses in the loop. The range of a particular memory access is defined by the range of the memory access, which is determined by its base pointer, offset, and the loop induction variable. For example, if the starting value of "i" is "S" and the ending value of "i" is "E," then the range of memory access A[i+P] begins at A[S+P] and ends at A[S+E].

[0018] The multiple distinct memory accesses are read accesses and / or write accesses. The base pointer is identified as not determinable at compile time. Thus, the specific memory addresses targeted by the multiple distinct memory accesses cannot be determined at compile time. Furthermore, the base pointer is identified as one of multiple base pointers that cannot be determined at compile time.

[0019] 2 also includes generating 206 a first portion 207 of runtime code (e.g., machine-executable instructions) to determine a minimum access and a maximum access for the plurality of distinct memory accesses. If the plurality of distinct memory accesses are represented as a base pointer, or a base pointer and an offset, the minimum access is the smallest memory access within the range of memory accesses, and the maximum access is the largest memory access within the range of memory accesses.

[0020] In an example function called "foo", a base pointer "A" serves as the basis for 12 different memory accesses during each iteration of the loop (i.e., A[P], A[Q], A[R], A[2*P], A[2*Q], A[2*R], A[3*P], A[3*Q], A[3*R], A[4*P], A[4*Q], A[4*R]). Thus, the minimum access "MIN_A" is determined as MIN(A[P], A[Q], A[R], A[2*P], A[2*Q], A[2*R], A[3*P], A[3*Q], A[3*R], A[4*P], A[4*Q], A[4*R]), and the maximum access is determined as MAX(A[P], A[Q], A[R], A[2*P], A[2*Q], A[2*R], A[3*P], A[3*Q], A[3*R], A[4*P], A[4*Q], A[4*R]). In other words, when executed, the first portion of runtime code 207 determines "MIN_A" and "MAX_A."

[0021] 2 also includes generating 208 a second portion of runtime code 210 (e.g., machine-executable instructions) that includes one or more runtime alias checks for minimum accesses and one or more runtime alias checks for maximum accesses. A runtime alias check is a function that determines whether a memory range of a given memory access (e.g., a range of memory accessed by the given memory access) conflicts with a memory range of another memory access. A conflict exists if the range of a write memory access overlaps with the range of another memory access (e.g., a read memory access or another write memory access). The runtime alias checks are included in the executable code (e.g., compiled code 210) such that the runtime alias checks are performed when the executable code is executed.

[0022] In existing solutions, runtime alias checks are performed for each distinct memory access (e.g., each base pointer and offset combination), whereby the memory range of each write memory access is compared with the memory access ranges of all other memory accesses. In other words, given a group of memory accesses, the range of each write access in the group of memory accesses is compared with the ranges of all other memory accesses in the group. As the number of distinct memory accesses increases, the number of runtime alias checks also increases.

[0023] In contrast, the runtime code (e.g., first portion of runtime code 207 and second portion of runtime code 210) is generated such that for a given base pointer associated with multiple memory accesses, only the minimum and maximum accesses are included in the group of memory accesses for runtime alias checking. In other words, the runtime alias check of the base pointer excludes memory accesses from the multiple different memory accesses other than the minimum and maximum accesses. If the base pointer is a first base pointer and a second base pointer is included in a code loop and associated with multiple different memory accesses, the group for which the runtime alias check is generated includes the minimum and maximum accesses of the first base pointer, the minimum and maximum accesses of the second base pointer, etc.

[0024] Returning to the example "foo" function above, if runtime alias checks are generated for each memory access, as in existing solutions, the set of runtime alias checks would be: 1) Range Check X1&A's (All Access) -X1&A[P] -X1&A[Q] -X1&A[R] -X1&A[2*P] -X1&A[2*Q] -X1&A[2*R] -X1&A[3*P] -X1&A[3*Q] -X1&A[3*R] -X1&A[4*P] -X1&A[4*Q] -X1&A[4*R] 2) Range Check X2&A -Similar to X1&A, X2 requires a range check for A's 12 accesses. 3) Range Check X3&A -Similar to X1&A, X3 requires a range check for A's 12 accesses. 4) Range Check X4&A -Similar to X1&A, X4 requires a range check for A's 12 accesses. 5) Range check X1 & X2 6) Range check X1 & X3 7) Range check X1 & X4 8) Range check X2 & X3 9) Range check X2 & X4 10) Range check X3 & X4

[0025] In contrast, by filtering out memory accesses based on base pointer A other than the minimum and maximum accesses, the runtime alias check becomes: 1) Identify the minimum and maximum values MIN_A=MIN(A[P], A[Q], A[R], A[2*P], A[2*Q], A[2*R], A[3*P], A[3*Q], A[3*R], A[4*P], A[4*Q], A[4*R]) MAX_A=MAX(A[P], A[Q], A[R], A[2*P], A[2*Q], A[2*R], A[3*P], A[3*Q], A[3*R], A[4*P], A[4*Q], A[4*R]) 2) Range check x1&A (min and max) (a) X1&MIN_A (b) X1&MAX_A 3) Range check x2 & A (min and max) (a) X2&MIN_A (b) X2&MAX_A 4) Range check x3&A (min and max) (a) X3&MIN_A (b) X3&MAX_A 5) Range check x4&A (min and max) (a) X4&MIN_A (b) X4&MAX_A 6) Range check X1 & X2 7) Range check X1 & X3 8) Range check X1 & X4 9) Range check X2 & X3 10) Range check X2 & X4 11) Range check X3 & X4

[0026] This reduces the number of runtime alias checks required, improving computational performance. In some embodiments, the compiler 114 applies loop optimizations (e.g., auto-vectorization, loop versioning, loop distribution, loop load elimination, loop tiling, etc.) to code loops that require runtime alias checks. In such embodiments, the compiler 114 determines to apply loop optimizations if the performance benefits provided by the loop optimizations outweigh the performance costs of the runtime alias checks. Loop optimizations that might otherwise be rejected due to the large number of runtime alias checks required are applied by reducing the number of runtime alias checks required.

[0027] In some embodiments, the first portion of runtime code 207 and the second portion of runtime code 210 are included in the compiled version of the code 204 such that the generated runtime alias checks are performed when the compiled code is executed.

[0028] To further explain, FIG. 3 is a flowchart illustrating an exemplary method for optimizing runtime alias checking, including: identifying (202), by the compiler 114, a base pointer in a code loop and a plurality of distinct memory accesses based on the base pointer; generating (206) a first portion 207 of runtime code to determine a minimum access and a maximum access of the plurality of distinct memory accesses; and generating (208) a second portion 210 of runtime code that includes one or more runtime alias checks for the minimum address and one or more runtime alias checks for the maximum address.

[0029] 3 differs from FIG. 2 in that it also includes, in the code loop, identifying (302) a first memory access group based on a first pointer and a second memory access group based on another base pointer, where the first memory access group and the second memory access group share a common memory access pattern. A memory access group for a given base pointer includes all memory accesses associated with that base pointer. The memory access pattern of a memory access group includes a set of subscripts (e.g., offsets) for each memory access. Consider the following function, hereinafter referred to as an exemplary function "foo2": void foo2(Int*A, Int*B, IntS IntE, IntP, IntQ, IntR) { for(int i=S;i <E;++i){ X1[i]=A[i+P]+A[i+Q]+A[i+R]+ A[i+2*P]+A[i+2*Q]+A[i+2*R]+ A[i+3*P]+A[i+3*Q]+A[i+3*R]+ A[i+4*P]+A[i+4*Q]+A[i+4*R]+ B[i+P]+B[i+Q]+B[i+R]+ B[i+2*P]+B[i+2*Q]+B[i+2*R]+ B[i+3*P]+B[i+3*Q]+B[i+3*R]+ B[i+4*P]+B[i+4*Q]+B[i+4*R]+ X2[i]=i; X3[i]=i; X4[i]=i; }}

[0030] In the example function "foo2", the memory access group of base pointer A is (A[P], A[Q], A[R], A[2*P], A[2*Q], A[2*R], A[3*P], A[3*Q], A[3*R], A[4*P], A[4*Q], A[4*R]). The memory access pattern of base pointer A is ([P], [Q], [R], [2*P], [2*Q], [2*R], [3*P], [3*Q], [3*R], [4*P], [4*Q], [4*R]). The example function "foo2" also includes a base pointer B that shares the same memory access pattern as A.

[0031] The method of Figure 3 further differs from Figure 2 in that generating 206 a first portion of runtime code 207 to determine minimum and maximum accesses for a plurality of different memory addresses includes generating 304 a first portion of runtime code to determine minimum and maximum accesses based on a common memory access pattern. For example, first portion of runtime code 207 is generated at runtime to include instructions for identifying minimum and maximum values ​​from the common memory access pattern. Continuing with the "foo2" example, such instructions may be represented as "MIN_Common=MIN(P, Q, R, 2*P, 2*Q, 2*R, 3*P, 3*Q, 3*R, 4*P, 4*Q, 4*R), MAX_Common=MAX(P, Q, R, 2*P, 2*Q, 2*R, 3*P, 3*Q, 3*R, 4*P, 4*Q, 4*R)," where MIN_Common is the minimum value of the common memory access pattern and MAX_Common is the maximum value of the common memory access pattern.

[0032] The minimum access value is then determined by incrementing the base pointer by the minimum value of the common memory access pattern, and the maximum access is determined by incrementing the base pointer by the maximum value of the common memory access pattern. Thus, a first portion 207 of runtime code is generated to include instructions to determine the minimum access value at runtime by incrementing the base pointer by the minimum value of the common memory access pattern, and instructions to determine the maximum access by incrementing the base pointer by the maximum value of the common memory access pattern.

[0033] 4 is a flowchart illustrating an exemplary method for optimizing runtime alias checking, the method including: identifying, by the compiler 114, in a code loop, a base pointer and multiple distinct memory accesses based on the pointer (202); identifying, in the code loop, a first group of memory accesses based on a first pointer and a second group of memory accesses based on another base pointer (302), where the first group of memory accesses and the second group of memory accesses share a common memory access pattern (302); generating, based on the common memory access pattern, a first portion of runtime code (304), thereby generating, based on the common memory access pattern, a first portion of runtime code (207) to determine minimum accesses and maximum accesses of the multiple distinct memory accesses; and generating, based on the common memory access pattern, a second portion of runtime code (210) including one or more runtime alias checks of a minimum address and one or more runtime alias checks of a maximum address (208).

[0034] The method of Figure 4 differs from Figure 3 in that generating (206) a first portion of runtime code 207 to determine minimum and maximum accesses of a plurality of different memory accesses includes generating (402) a first portion of runtime code 207 to determine minimum and maximum accesses of other base pointers based on a common memory access pattern. For example, first portion of runtime code 207 is generated to include instructions to find a minimum value of the common memory access pattern and a maximum value of the common memory access pattern. First portion of runtime code 207 is then generated to determine minimum and maximum accesses of any base pointers that share the common memory access pattern using the determined minimum and maximum values ​​of the common memory access pattern. Continuing with the example function "foo2," the minimum access of the B base pointer is determined by incrementing the B base pointer by the minimum value of the common memory access pattern (e.g., by executing first portion of runtime code 207), and the maximum access is determined by incrementing the B base pointer by the maximum value of the common memory access pattern.

[0035] The method of Figure 4 differs from that of Figure 3 in that generating 208 a second portion of runtime code 210 that includes one or more runtime alias checks for minimum accesses and one or more runtime alias checks for maximum accesses includes generating 404 a second portion of runtime code 210 that includes one or more runtime alias checks for other minimum accesses and one or more runtime alias checks for other maximum accesses. Thus, second portion of runtime code 210 includes runtime alias checks for the minimum and maximum accesses of the first base pointer and the minimum and maximum accesses of the second base pointer.

[0036] To further explain, FIG. 5 is a flowchart illustrating an exemplary method for optimizing runtime alias checking, including: identifying (202), by the compiler 114, in a code loop, a base pointer and multiple distinct memory accesses based on the pointer; generating (206) a first portion 207 of runtime code to determine a minimum access and a maximum access of the multiple distinct memory accesses; and generating (208) a second portion 210 of runtime code that includes one or more runtime alias checks for the minimum address and one or more runtime alias checks for the maximum address.

[0037] The method of Figure 5 differs from Figure 2 in that it also includes identifying (502) in the code loop a first group of memory accesses based on the first pointer and a second group of memory accesses based on another base pointer, where the first group of memory accesses and the second group of memory accesses share a common memory access pattern. The method of Figure 5 further differs from Figure 2 in that it also includes generating (504) a third portion of runtime code for determining another minimum access (e.g., of the other base pointer) based on the minimum access (e.g., of the base pointer) and for determining another maximum access (e.g., of the other base pointer) based on the maximum access (e.g., of the base pointer).

[0038] When the third portion of the runtime code 506 is executed, the minimum access and maximum access of the base pointer have been determined. Since other base pointers share a minimum access pattern with the base pointer, other minimum accesses of other base pointers are determined by incrementing the other base pointer by the minimum access decremented by the base pointer (e.g., by executing the third portion of the runtime code 506). Other maximum accesses of other base pointers are determined by incrementing the other base pointer by the maximum access decremented by the base pointer (e.g., by executing the third portion of the runtime code 506). Continuing with the exemplary function "foo2," where base pointers A and B share a common memory access pattern, the minimum access "MIN_B" of B is determined as "MIN_B = B + MIN_A - A." The maximum access "MAX_B" of B is determined as "MAX_B = B + MAX_A - A."

[0039] The method of Figure 5 differs from Figure 2 in that generating 208 a second portion of runtime code 210 that includes one or more runtime alias checks for minimum accesses and one or more runtime alias checks for maximum accesses includes generating 508 a second portion of runtime code 210 that includes one or more runtime alias checks for other minimum accesses and one or more runtime alias checks for other maximum accesses. Thus, second portion of runtime code 210 includes runtime alias checks for the minimum and maximum accesses of a first base pointer and the minimum and maximum accesses of a second base pointer.

[0040] To further explain, FIG. 6 is a flowchart illustrating an exemplary method for optimizing runtime alias checking, including: identifying (202), by the compiler 114, in a code loop, a base pointer and multiple distinct memory accesses based on the pointer; generating (206) a first portion 207 of runtime code to determine a minimum access and a maximum access of the multiple distinct memory accesses; and generating (208) a second portion 210 of runtime code that includes one or more runtime alias checks for the minimum address and one or more runtime alias checks for the maximum address.

[0041] The method of Figure 6 differs from that of Figure 2 in that it also includes determining (602) an estimated cost of one or more runtime checks. For example, the estimated cost may be expressed as a number of runtime checks or a number of instructions required to perform the runtime checks. The number of runtime checks or the number of instructions required to perform the runtime checks may be determined based on the number of memory accesses among a plurality of different memory accesses.

[0042] The method of Figure 6 further differs from Figure 2 in that it also includes determining (604) that the estimated cost is less than a threshold. By way of example, the threshold corresponds to an expected performance for applying one or more loop operations. Thus, first portion of runtime code 207 and second portion of runtime code 210 are generated only if the cost is less than the threshold. If first portion of runtime code 207 and second portion of runtime code 210 are generated in response to applying one or more loop optimizations, the loop optimizations are performed only if the estimated cost is less than the threshold.

[0043] In view of the above discussion, the reader will recognize that advantages of optimizing runtime alias checking according to embodiments of the present disclosure include the following: Improved computing system performance by reducing the number of runtime alias checks required in compiled code. · The number of runtime alias checks has been reduced, improving the performance of computing systems by encouraging the use of loop optimizations.

[0044] Exemplary embodiments of the present disclosure are described primarily in the context of a fully functional computer system for runtime alias checking optimization. However, skilled artisans will recognize that the present disclosure may also be embodied in a computer program product disposed on a computer-readable storage medium for use with any suitable data processing system. Such a computer-readable storage medium may be any storage medium for machine-readable information, including magnetic, optical, or other suitable media. Examples of such media include magnetic disks in hard drives or diskettes, compact discs for optical drives, magnetic tape, and others that will occur to those skilled in the art. Those skilled in the art will readily recognize that any computer system with suitable programming means is capable of executing the steps of the disclosed methods embodied in a computer program product. Those skilled in the art will also recognize that, while some of the exemplary embodiments described herein are adapted for software installed and executed on computer hardware, alternative embodiments implemented as firmware or hardware are nevertheless well within the scope of the present disclosure.

[0045] The present disclosure may be a system, a method, and / or a computer program product, which may include computer-readable storage medium(s) having computer-readable program instructions for causing a processor to perform aspects of the present disclosure.

[0046] A computer-readable storage medium may be a tangible device that can hold and store instructions for use by an instruction-execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. A non-exhaustive list of more specific examples of computer-readable storage media includes portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disk (DVD), memory stick, floppy disk, mechanically encoded devices such as punch cards or ridge structures in a groove having instructions recorded thereon, and any suitable combination thereof. As used herein, computer-readable storage media should not be construed as being signals that are transitory in nature, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., light pulses passing through a fiber optic cable), or electrical signals transmitted over electrical wires.

[0047] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device or to an external computer or external storage device via a network (e.g., the Internet, a local area network, a wide area network, and / or a wireless network). The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and transfers the computer-readable program instructions to a computer-readable storage medium within each computing / processing device for storage.

[0048] The computer-readable program instructions for carrying out the operations of the present disclosure may be either source code or object code written in any combination of one or more programming languages, including assembler instructions, instruction set architecture (ISA) instructions, machine language instructions, machine-dependent instructions, microcode, firmware instructions, state-setting data, or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, or conventional procedural programming languages ​​such as the "C" programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA) can execute computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry to perform aspects of the present disclosure.

[0049] Aspects of the present disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the present disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0050] These computer-readable program instructions may be provided to a processor of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus to manufacture a machine such that the instructions, executed by the processor of the computer or other programmable data processing apparatus, generate means for performing the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams. These computer-readable program instructions, which may direct a computer, programmable data processing apparatus, and / or other device to function in a particular manner, may also be stored on a computer-readable storage medium, whereby the computer-readable storage medium having the instructions stored thereon comprises an article of manufacture containing instructions that implement aspects of the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams.

[0051] Furthermore, the computer-readable program instructions can be loaded into a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be executed on the computer, other programmable apparatus, or other device to generate a computer-implemented process, whereby the instructions executed on the computer, other programmable apparatus, or other device perform the functions / acts specified in one or more blocks of the flowcharts and / or block diagrams.

[0052] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowcharts or block diagrams may represent a module, segment, or portion of instructions, including one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions shown in the blocks may occur out of order (out of order) as shown in the figures. For example, two blocks shown in succession may in fact be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending on the functionality involved. It should also be noted that each block of the block diagrams and / or flowchart diagrams, and combinations of blocks in the block diagrams and / or flowchart diagrams, may be implemented by a dedicated hardware-based system that performs the specified functions or acts or executes a combination of dedicated hardware and computer instructions.

[0053] It will be understood from the foregoing description that modifications and variations can be made in various embodiments of the present disclosure. The description herein is for illustrative purposes only and should not be construed in a limiting sense. The scope of the present disclosure is limited only by the language of the following claims.

Claims

1. 1. A method for optimizing runtime alias checking, comprising: a compiler executed by a processor identifying a plurality of different memory accesses based on a base pointer within a code loop; the compiler identifying, in the code loop, a first group of memory accesses based on the base pointer and a second group of memory accesses, the first group of memory accesses and the second group of memory accesses sharing a common memory access pattern; the compiler generating a first portion of runtime code to determine minimum and maximum accesses of the plurality of different memory accesses of the base pointer based on the common memory access pattern of the base pointer and a second base pointer within the code loop; the compiler generating a second portion of the runtime code including one or more runtime alias checks for the minimum access and the maximum access of the base pointer. method.

2. the compiler further comprising identifying, in the code loop, a second group of memory accesses based on the second base pointer.

10. The method of claim 1.

3. generating the first portion of the runtime code includes the compiler generating the first portion of the runtime code to determine a second minimum access and a second maximum access of the second base pointer based on the common memory access pattern; generating the second portion of the runtime code includes the compiler generating the second portion of the runtime code including one or more runtime alias checks for the second minimum access and the second maximum access of the second base pointer. The method of claim 2.

4. the compiler identifying, in the code loop, the second group of memory accesses based on the second base pointer; generating a third portion of the runtime code for determining a second minimum access based on the minimum access and a second maximum access based on the maximum access; generating the second portion of the runtime code includes the compiler generating the second portion of the runtime code including one or more runtime alias checks for the second minimum access and the second maximum access; 10. The method of claim 1.

5. determining an estimated cost of the one or more runtime alias checks; determining that the estimated cost is less than a threshold; generating the first portion of the runtime code and generating the second portion of the runtime code are performed in response to the estimated cost being less than the threshold.

10. The method of claim 1.

6. the compiler further comprising applying one or more loop optimizations to the code loop in response to the estimated cost being less than the threshold. The method of claim 5.

7. 1. An apparatus for optimizing runtime alias checking, comprising: a processor; a memory operatively connected to the processor, the memory storing computer program instructions executable by the processor; The computer program instructions, when executed by the processor, the compiler identifying a plurality of different memory accesses based on a base pointer within a code loop; the compiler identifying, in the code loop, a first group of memory accesses based on the base pointer and a second group of memory accesses, the first group of memory accesses and the second group of memory accesses sharing a common memory access pattern; the compiler generating a first portion of runtime code to determine minimum and maximum accesses of the plurality of different memory accesses of the base pointer based on the common memory access pattern of the base pointer and a second base pointer within the code loop; the compiler generating a second portion of the runtime code including one or more runtime alias checks for the minimum access and the maximum access of the base pointer; causing the processor to perform Device.

8. The computer program instructions, when executed by the processor, the compiler causing the processor to identify, in the code loop, a second group of memory accesses based on the second base pointer; 8. The apparatus of claim 7.

9. generating the first portion of the runtime code by the compiler includes causing the processor to generate the first portion of the runtime code to determine a second minimum access and a second maximum access of the second base pointer based on the common memory access pattern; generating the second portion of the runtime code by the compiler includes causing the processor to generate the second portion of the runtime code including one or more runtime alias checks for the second minimum access and the second maximum access of the second base pointer.

9. The apparatus of claim 8.

10. The computer program instructions, when executed by the processor, the compiler identifying, in the code loop, a first group of memory accesses based on the base pointer and a second group of memory accesses based on the second base pointer, wherein the first group of memory accesses and the second group of memory accesses share the common memory access pattern; generating a third portion of the runtime code for determining a second minimum access based on the minimum access and a second maximum access based on the maximum access; generating the second portion of the runtime code includes the compiler generating the second portion of the runtime code including one or more runtime alias checks for the second minimum access and the second maximum access; 8. The apparatus of claim 7.

11. The computer program instructions, when executed by the processor, the compiler determining an estimated cost of the one or more runtime alias checks; the compiler determining that the estimated cost is less than a threshold; causing the processor to perform generating the first portion of the runtime code and generating the second portion of the runtime code are performed in response to the estimated cost being less than a threshold.

8. The apparatus of claim 7.

12. The computer program instructions, when executed by the processor, the compiler causing the processor to apply one or more loop optimizations to the code loop in response to the estimated cost being less than the threshold.

12. The apparatus of claim 11.

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