Method for manufacturing solar cell and solar cell

Abstract

Provided is a solar cell capable of suppressing a decline in the reliability and performance of the solar cell, even when simplifying the manufacturing process thereof. A solar cell 1 of the rear-surface electrode type in which a first semiconductor layer 25 and a first metal electrode layer 29 are formed in a first region and a second semiconductor layer and a second metal electrode layer are formed in a second region, wherein: a resin film 41 is provided to the boundary-side end sections of the first metal electrode layer 29 (and of the second metal electrode layer) which border the first and second regions; the first metal electrode layer 29 (and the second metal electrode layer) has a ground layer 29l and a plating layer 29u; the ground layer 29l has a projecting / recessing structure which corresponds to the projecting / recessing structure of a semiconductor substrate 11; the peaks in the projecting / recessing structure of the ground layer 29l contact the plating layer 29u; and the resin film 41 is interposed between the plating layer 29u and the valleys of the projecting / recessing structure in the end sections of the ground layer 29l.

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a back electrode type (back contact type) solar cell, and to a back electrode type solar cell. [Background technology]

[0002] Solar cells using semiconductor substrates include double-sided electrode solar cells in which electrodes are formed on both the light-receiving surface and the back surface, and back-surface electrode solar cells in which electrodes are formed only on the back surface. In double-sided electrode solar cells, electrodes are formed on the light-receiving surface, which blocks sunlight. On the other hand, back-surface electrode solar cells do not have electrodes on the light-receiving surface, so they have a higher sunlight reception rate than double-sided electrode solar cells. Patent Document 1 discloses a back-surface electrode solar cell.

[0003] The solar cell described in Patent Document 1 includes a semiconductor substrate, a first conductivity type semiconductor layer and a first electrode layer stacked in this order on the back surface of the semiconductor substrate, and a second conductivity type semiconductor layer and a second electrode layer stacked in this order on another part of the back surface of the semiconductor substrate. The first electrode layer and the second electrode layer are separated from each other to prevent short circuits. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-131586 Summary of the Invention [Problem to be solved by the invention]

[0005] In general, for the purpose of improving the light trapping effect and / or light recovery efficiency in a semiconductor substrate, the semiconductor substrate has a pyramidal fine uneven structure called a texture structure on the light-receiving surface side and / or the back surface side.

[0006] Also, typically, each of the first and second electrode layers includes a metal electrode layer.

[0007] The present inventors have devised a method for forming a metal electrode layer using a plating method in order to simplify the manufacturing process of such solar cells. However, according to the findings of the present inventors, in this manufacturing method of solar cells, due to the uneven structure on the back surface of the semiconductor substrate, when the metal electrode layer grows, the metal electrode layer growing obliquely, particularly in the valleys of the uneven structure, presses against each other, which can cause cracks in the metal electrode layer.

[0008] If cracks occur in the metal electrode layer, for example, etching solutions used to pattern the metal electrode layer can seep into the cracks and damage the semiconductor layer, resulting in a decrease in the performance and reliability of the solar cell.

[0009] An object of the present invention is to provide a solar cell manufacturing method that can suppress deterioration in the performance and reliability of the solar cell even when the manufacturing process is simplified, and a solar cell. [Means for solving the problem]

[0010] A method for manufacturing a solar cell according to the present invention is a method for manufacturing a back electrode type solar cell including a semiconductor substrate having an uneven structure on one main surface side, a first conductivity type semiconductor layer and a first metal electrode layer stacked in this order in a first region that is a part of the one main surface side of the semiconductor substrate, and a second conductivity type semiconductor layer and a second metal electrode layer stacked in this order in a second region that is another part of the one main surface side of the semiconductor substrate, wherein the solar cell includes a resin film disposed on an end portion of each of the first metal electrode layer and the second metal electrode layer on at least a boundary side between the first region and the second region, and each of the first metal electrode layer and the second metal electrode layer has an underlayer and a plating layer, and the method for manufacturing the solar cell includes: and a base layer forming step of forming a series of base layer material films on the first region and the second region on the second conductive type semiconductor layer, the base layer material film being continuous across the first region and the second region; a resist forming step of forming a resist on the base layer material film at the boundary between the first region and the second region; a plating layer forming step of forming a patterned plating layer on the base layer material film in each of the first region and the second region using a plating method that uses the resist as a mask; a resist removing step of removing the resist; and a base layer forming step of forming a patterned base layer in each of the first region and the second region by etching the base layer material film using an etching method that uses the plating layer as a mask. In the base layer material film formation process, a base layer material film having a concave-convex structure corresponding to the concave-convex structure of the semiconductor substrate is formed; in the resist formation process, a pattern printing method is used to print and harden a printing material containing a resin material and a solvent to form a patterned resist, thereby placing the resin film formed by the resin material seeping out into the valleys of the concave-convex structure at least at the end of the base layer; and in the plating layer formation process, the plating layer is formed on the resin film in the valleys of the concave-convex structure at least at the end of the base layer and on the peaks of the concave-convex structure of the base layer.

[0011] The solar cell of the present invention is a back electrode type solar cell comprising: a semiconductor substrate having an uneven structure on one main surface side; a first conductivity type semiconductor layer and a first metal electrode layer stacked in that order in a first region which is a part of the one main surface side of the semiconductor substrate; and a second conductivity type semiconductor layer and a second metal electrode layer stacked in that order in a second region which is another part of the one main surface side of the semiconductor substrate, wherein the solar cell comprises a resin film arranged at an end of each of the first metal electrode layer and the second metal electrode layer, at least on the boundary side between the first region and the second region, each of the first metal electrode layer and the second metal electrode layer having an underlayer and a plating layer, the underlayer having an uneven structure corresponding to the uneven structure of the semiconductor substrate, the peaks of the uneven structure in the underlayer being in contact with the plating layer, and the resin film being interposed between the valleys of the uneven structure at least at the end of the underlayer and the plating layer.

[0012] Another solar cell according to the present invention is a back electrode type solar cell comprising: a semiconductor substrate having an uneven structure on one main surface side; a first conductivity type semiconductor layer and a first metal electrode layer stacked in that order in a first region that is a part of the one main surface side of the semiconductor substrate; and a second conductivity type semiconductor layer and a second metal electrode layer stacked in that order in a second region that is another part of the one main surface side of the semiconductor substrate, wherein each of the first metal electrode layer and the second metal electrode layer has an underlayer and a plating layer, the underlayer has an uneven structure corresponding to the uneven structure of the semiconductor substrate, the peaks of the uneven structure in the underlayer are in contact with the plating layer, and a space exists below the plating layer in the valleys of the uneven structure at least at the end of each of the first metal electrode layer and the second metal electrode layer on the boundary side between the first region and the second region. [Effects of the Invention]

[0013] According to the present invention, even when the manufacturing process of the solar cell is simplified, it is possible to suppress deterioration in the performance and reliability of the solar cell. [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 2 is a view of the solar cell according to the embodiment as viewed from the back surface side. [Figure 2] 2 is a cross-sectional view taken along line II-II of the solar cell shown in FIG. [Figure 3] 3 is an enlarged cross-sectional view of a portion III in the solar cell shown in FIG. 2. FIG. [Figure 4A] 3A to 3C are diagrams illustrating a semiconductor layer forming step in the solar cell manufacturing method according to the present embodiment. [Figure 4B] 1A to 1C are diagrams illustrating a transparent electrode layer material film forming step and a metal electrode layer underlayer material film forming step in the solar cell manufacturing method according to the present embodiment. [Figure 4C] 3A to 3C are diagrams illustrating a resist formation step in the solar cell manufacturing method according to the present embodiment. [Figure 4D] 3A to 3C are diagrams illustrating a step of forming a plating layer of a metal electrode layer in the method for manufacturing a solar cell according to the present embodiment. [Figure 4E] 1A to 1C are diagrams illustrating a resist removal step in the solar cell manufacturing method according to the present embodiment. [Figure 4F] 3A to 3C are diagrams illustrating a transparent electrode layer forming step and a base layer forming step for a metal electrode layer in the solar cell manufacturing method according to the present embodiment. [Figure 5] 4C and 4D in the step of forming a resist and the step of forming a plating layer of a metal electrode layer. [Figure 6] FIG. 1 is a diagram for explaining a problem in the step of forming a plating layer of a metal electrode layer in a solar cell manufacturing method using a conventional plating method (subtract method). [Figure 7A] 4 is a partially enlarged cross-sectional view of the solar cell according to the embodiment shown in FIG. 3, corresponding to a portion III shown in FIG. 2. FIG. [Figure 7B] 3 is a partially enlarged cross-sectional view of a solar cell according to a modified example of the present embodiment, corresponding to a portion III shown in FIG. 2. FIG. [Figure 7C] 3 is a partially enlarged cross-sectional view of a solar cell according to a modified example of the present embodiment, corresponding to a portion III shown in FIG. 2. FIG. [Figure 7D] 3 is a partially enlarged cross-sectional view of a solar cell according to a modified example of the present embodiment, corresponding to a portion III shown in FIG. 2. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0015] An example of an embodiment of the present invention will be described below with reference to the accompanying drawings. The same or equivalent parts in each drawing are designated by the same reference numerals. For convenience, hatching and reference numerals may be omitted. In such cases, reference should be made to other drawings.

[0016] (solar cells) Fig. 1 is a view of the solar cell according to this embodiment as seen from the back surface side, and Fig. 2 is a cross-sectional view of the solar cell shown in Fig. 1 taken along line II-II. Fig. 3 is an enlarged cross-sectional view of part III in the solar cell shown in Fig. 2. The solar cell 1 shown in Figs. 1 to 3 is a back electrode type (also called a back contact type or back junction type) heterojunction solar cell.

[0017] Solar cell 1 includes a semiconductor substrate 11 with two main surfaces, and the main surface of semiconductor substrate 11 has a first region 7 and a second region 8. In the following, the main surface of semiconductor substrate 11 that receives light is referred to as the light-receiving surface, and the main surface of semiconductor substrate 11 opposite the light-receiving surface (one main surface) is referred to as the back surface.

[0018] The first region 7 has a so-called comb shape and includes a plurality of finger portions 7f corresponding to the teeth of the comb and busbar portions 7b corresponding to supports for the teeth of the comb. The busbar portions 7b extend in a first direction (X direction) along one side of the semiconductor substrate 11, and the finger portions 7f extend from the busbar portions 7b in a second direction (Y direction) that intersects with the first direction.

[0019] Similarly, the second region 8 has a so-called comb shape and includes a plurality of finger portions 8f corresponding to the teeth of the comb and busbar portions 8b corresponding to supports for the teeth of the comb. The busbar portions 8b extend in a first direction (X direction) along one side of the semiconductor substrate 11 that faces the other side, and the finger portions 8f extend in a second direction (Y direction) from the busbar portions 8b.

[0020] The finger portions 7f and 8f are strip-shaped and extend in the second direction (Y direction), and are alternately arranged in the first direction (X direction). The first region 7 and the second region 8 may be formed in a stripe pattern.

[0021] 2, solar cell 1 includes a passivation layer 13 and an optical adjustment layer 15 laminated in this order on the light-receiving surface side of semiconductor substrate 11. Solar cell 1 also includes a passivation layer 23, a first conductivity type semiconductor layer 25, and a first electrode layer 27 laminated in this order on a portion (first region 7) of the back surface side of semiconductor substrate 11. Solar cell 1 also includes a passivation layer 33, a second conductivity type semiconductor layer 35, and a second electrode layer 37 laminated in this order on another portion (second region 8) of the back surface side of semiconductor substrate 11.

[0022] The semiconductor substrate 11 is formed of a crystalline silicon material such as single crystal silicon or polycrystalline silicon. The semiconductor substrate 11 is, for example, an n-type semiconductor substrate obtained by doping a crystalline silicon material with an n-type dopant. The semiconductor substrate 11 may also be a p-type semiconductor substrate obtained by doping a crystalline silicon material with a p-type dopant. An example of an n-type dopant is phosphorus (P). An example of a p-type dopant is boron (B). The semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light-receiving surface side and generates photocarriers (electrons and holes).

[0023] By using crystalline silicon as the material for the semiconductor substrate 11, dark current is relatively small, and a relatively high output (stable output regardless of illuminance) can be obtained even when the intensity of incident light is low.

[0024] The semiconductor substrate 11 has a pyramidal fine uneven structure called a texture structure on the back side, which increases the recovery efficiency of light that passes through the semiconductor substrate 11 without being absorbed.

[0025] Furthermore, semiconductor substrate 11 may have a pyramidal fine uneven structure called a texture structure on the light-receiving surface side, which reduces the reflection of incident light on the light-receiving surface and improves the light trapping effect in semiconductor substrate 11.

[0026] Passivation layer 13 is formed on the light-receiving surface side of semiconductor substrate 11. Passivation layer 23 is formed in a first region 7 on the back surface side of semiconductor substrate 11. Passivation layer 33 is formed in a second region 8 on the back surface side of semiconductor substrate 11. Passivation layers 13, 23, and 33 are formed of a material containing, for example, an intrinsic (i-type) amorphous silicon material as a main component. Passivation layers 13, 23, and 33 suppress recombination of carriers generated in semiconductor substrate 11 and increase carrier collection efficiency.

[0027] Optical adjustment layer 15 is formed on passivation layer 13 on the light-receiving surface side of semiconductor substrate 11. Optical adjustment layer 15 functions as an anti-reflection layer that prevents reflection of incident light, and also functions as a protective layer that protects the light-receiving surface side of semiconductor substrate 11 and passivation layer 13. Optical adjustment layer 15 is formed of an insulating material, for example, silicon oxide (SiO), silicon nitride (SiN), or a composite thereof such as silicon oxynitride (SiON).

[0028] The first conductivity type semiconductor layer 25 is formed on the passivation layer 23, i.e., in a first region 7 on the back surface side of the semiconductor substrate 11. On the other hand, the second conductivity type semiconductor layer 35 is formed on the passivation layer 33, i.e., in a second region 8 on the back surface side of the semiconductor substrate 11. That is, the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35 have a strip-like shape and extend in the Y direction. The first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35 are arranged alternately in the X direction. A portion of the second conductivity type semiconductor layer 35 may overlap a portion of an adjacent first conductivity type semiconductor layer 25 (not shown).

[0029] The first conductivity type semiconductor layer 25 is formed of, for example, an amorphous silicon material. The first conductivity type semiconductor layer 25 is a p-type semiconductor layer obtained by doping an amorphous silicon material with a p-type dopant (for example, the above-mentioned boron (B)).

[0030] The second conductivity type semiconductor layer 35 is formed of, for example, an amorphous silicon material. The second conductivity type semiconductor layer 35 is, for example, an n-type semiconductor layer obtained by doping an n-type dopant (for example, the above-mentioned phosphorus (P)) into an amorphous silicon material. Note that the first conductivity type semiconductor layer 25 may be an n-type semiconductor layer, and the second conductivity type semiconductor layer 35 may be a p-type semiconductor layer.

[0031] The first electrode layer 27 is formed on the first conductivity type semiconductor layer 25, i.e., in a first region 7 on the back surface side of the semiconductor substrate 11. On the other hand, the second electrode layer 37 is formed on the second conductivity type semiconductor layer 35, i.e., in a second region 8 on the back surface side of the semiconductor substrate 11. That is, the first electrode layer 27 and the second electrode layer 37 have a strip-like shape and extend in the Y direction. The first electrode layer 27 and the second electrode layer 37 are provided alternately in the X direction.

[0032] The first electrode layer 27 has a first transparent electrode layer 28 and a first metal electrode layer 29 laminated in this order on the first conductivity-type semiconductor layer 25. On the other hand, the second electrode layer 37 has a second transparent electrode layer 38 and a second metal electrode layer 39 laminated in this order on the second conductivity-type semiconductor layer 35. The first metal electrode layer 29 has a two-layer structure of an underlayer 29l and a plating layer 29u, and the second metal electrode layer 39 has a two-layer structure of an underlayer 39l and a plating layer 39u.

[0033] The first transparent electrode layer 28 and the second transparent electrode layer 38 are formed of a transparent conductive material, such as ITO (Indium Tin Oxide: a composite oxide of indium oxide and tin oxide), ZnO (Zinc Oxide), etc.

[0034] The underlayer 29l in the first metal electrode layer 29 and the underlayer 39l in the second metal electrode layer 39 contain a metal material such as silver, copper, or aluminum, which is formed using a PVD method such as sputtering. On the other hand, the plating layer 29u in the first metal electrode layer 29 and the plating layer 39u in the second metal electrode layer 39 contain a metal material such as silver, copper, or nickel, which is formed using a plating method.

[0035] The first electrode layer 27 and the second electrode layer 37 are strip-shaped extending in the second direction (Y direction) and are alternately arranged in the first direction (X direction). That is, the first transparent electrode layer 28 and the second transparent electrode layer 38 are strip-shaped extending in the second direction (Y direction) and are alternately arranged in the first direction (X direction). Furthermore, the first metal electrode layer 29 and the second metal electrode layer 39 are strip-shaped extending in the second direction (Y direction) and are alternately arranged in the first direction (X direction). The first transparent electrode layer 28 and the second transparent electrode layer 38 are separated from each other, and the first metal electrode layer 29 and the second metal electrode layer 39 are also separated from each other.

[0036] As shown in FIG. 3, a resin film 41 is unevenly distributed at least at the end of the first metal electrode layer 29 on the boundary side between the first region 7 and the second region 8 between the underlayer 29l and the plating layer 29u.

[0037] More specifically, the base layer 29l is relatively thin and has a concave-convex structure corresponding to the concave-convex structure (texture structure) of the semiconductor substrate 11. The resin film 41 is interposed between the plating layer 29u and the valleys of the concave-convex structure at least at the ends of the base layer 29l. The resin film 41 may be formed in a sea-like (i.e., continuous) or island-like (i.e., discontinuous) shape of the sea-island structure. It is preferable that the valleys of the concave-convex structure at least at the ends of the base layer 29l are flattened by the resin film 41.

[0038] Meanwhile, the peaks of the concave-convex structure at least at the ends of the base layer 29l are in contact with the plating layer 29u, and the valleys and peaks of the concave-convex structure other than the ends of the base layer 29l are in contact with the plating layer 29u.

[0039] Similarly, the resin film 41 is unevenly distributed at least at the end of the second metal electrode layer 39 on the boundary side between the first region 7 and the second region 8 between the underlayer 39l and the plating layer 39u.

[0040] More specifically, the base layer 39l is relatively thin and has a concave-convex structure corresponding to the concave-convex structure (texture structure) of the semiconductor substrate 11. The resin film 41 is interposed between the plating layer 39u and valleys of the concave-convex structure at least at the ends of the base layer 39l. The resin film 41 may be formed in a sea-like (i.e., continuous) or island-like (i.e., discontinuous) shape of the sea-island structure. It is preferable that the valleys of the concave-convex structure at least at the ends of the base layer 39l are flattened by the resin film 41.

[0041] Meanwhile, the peaks of the concave-convex structure at least at the ends of the base layer 39l are in contact with the plating layer 39u, and the valleys and peaks of the concave-convex structure other than the ends of the base layer 39l are in contact with the plating layer 39u.

[0042] (Solar Cell Manufacturing Method) Next, a method for manufacturing a solar cell according to this embodiment will be described with reference to FIGS. 4A to 4F. FIG. 4A is a diagram showing a semiconductor layer forming step in the method for manufacturing a solar cell according to this embodiment, and FIG. 4B is a diagram showing a transparent electrode layer material film forming step and a base layer material film forming step for a metal electrode layer in the method for manufacturing a solar cell according to this embodiment. FIG. 4C is a diagram showing a resist forming step in the method for manufacturing a solar cell according to this embodiment, and FIG. 4D is a diagram showing a plating layer forming step for a metal electrode layer in the method for manufacturing a solar cell according to this embodiment. FIG. 4E is a diagram showing a resist removing step in the method for manufacturing a solar cell according to this embodiment, and FIG. 4F is a diagram showing a transparent electrode layer forming step and a base layer forming step for a metal electrode layer in the method for manufacturing a solar cell according to this embodiment. FIGS. 4A to 4F show the back side of semiconductor substrate 11, and the front side of semiconductor substrate 11 is omitted.

[0043] 4A, a passivation layer 23 and a first conductivity type semiconductor layer 25 are formed on a portion of the back surface side of semiconductor substrate 11, specifically in first region 7 (semiconductor layer formation step). For example, after a passivation layer material film and a first conductivity type semiconductor layer material film are formed on the entire back surface side of semiconductor substrate 11 using a CVD method or a PVD method, passivation layer 23 and first conductivity type semiconductor layer 25 may be patterned using an etching method that uses a resist or a metal mask generated using a photolithography technique or a printing technique.

[0044] The etching solution for the p-type semiconductor layer material film may be, for example, an acidic solution such as hydrofluoric acid containing ozone or a mixture of nitric acid and hydrofluoric acid, and the etching solution for the n-type semiconductor layer material film may be, for example, an alkaline solution such as an aqueous potassium hydroxide solution.

[0045] Alternatively, when a passivation layer and a first conductivity type semiconductor layer are stacked on the back side of the semiconductor substrate 11 using a CVD method or a PVD method, the passivation layer 23 and the first conductivity type semiconductor layer 25 may be deposited and patterned simultaneously using a mask.

[0046] Next, a passivation layer 33 and a second conductivity type semiconductor layer 35 are formed on another part of the back surface side of the semiconductor substrate 11, specifically in the second region 8 (semiconductor layer formation step). For example, as described above, a passivation layer material film and a second conductivity type semiconductor layer material film may be formed on the entire back surface side of the semiconductor substrate 11 using a CVD method or a PVD method, and then the passivation layer 33 and the second conductivity type semiconductor layer 35 may be patterned using an etching method that uses a resist generated using a photolithography technique or a printing technique, or a metal mask.

[0047] Alternatively, when a passivation layer and a second conductivity type semiconductor layer are stacked on the back side of the semiconductor substrate 11 using a CVD method or a PVD method, the passivation layer 33 and the second conductivity type semiconductor layer 35 may be deposited and patterned simultaneously using a mask.

[0048] In this semiconductor layer forming step, a passivation layer 13 (not shown) may be formed on the entire light-receiving surface side of the semiconductor substrate 11.

[0049] 4B, a continuous transparent electrode layer material film 28Z is formed across the first region 7 and the second region 8 on the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35 (transparent electrode layer material film forming step). The transparent electrode layer material film 28Z can be formed by, for example, a CVD method or a PVD method.

[0050] Next, a series of underlayer material films 29lZ is formed on the transparent electrode layer material film 28Z, i.e., on the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35, across the first region 7 and the second region 8 (underlayer material film forming step). The underlayer material film 29lZ is formed by a PVD method such as sputtering, for example.

[0051] 4C, a resist 40 is formed on the underlayer material film 291Z at the boundary between the first region 7 and the second region 8 (resist forming step). Examples of a method for forming the resist 40 include press printing such as screen printing or gravure printing, and pattern printing methods such as ejection printing such as inkjet printing.

[0052] In the pattern printing method, a printing material containing a resin material and a solvent is printed and baked (cured) to form a patterned resist 40. At this time, as shown in Fig. 5, a resin film 41 formed by the resin material seeping out of the printing material is formed in the valleys of the uneven structure (texture structure) of the underlayer material film 29lZ.

[0053] The resin film 41 may be formed in the valleys of the uneven structure between the resists 40, i.e., in all of the first region 7 and the second region 8, as shown in Figure 5, or may be formed in the valleys of the uneven structure between the resists 40 at the end of the boundary between the first region 7 and the second region 8, as shown in Figure 3.

[0054] 4D, a plating method using resist 40 as a mask is used to form a patterned plating layer 29u on the underlayer material film 29lZ in the first region 7, and a patterned plating layer 39u on the underlayer material film 29lZ in the second region 8 (plated metal electrode layer forming step). Specifically, as shown in FIG. 5, the plating layer 29u is formed on the resin film 41 in the valleys of the concave-convex structure at least at the end of the underlayer material film 29lZ, and on the peaks of the concave-convex structure of the underlayer material film 29lZ.

[0055] Next, as shown in Fig. 4E, the resist 40 is removed (resist removal step). As the resist removal solution, an alkaline aqueous solution such as an aqueous sodium hydroxide solution is used.

[0056] Next, as shown in FIG. 4F , an etching method using the plating layer 29u and the plating layer 39u as a mask is used to etch the foundation layer material film 29lZ and the transparent electrode layer material film 28Z to form a patterned first transparent electrode layer 28 and foundation layer 29l in the first region 7, and a patterned second transparent electrode layer 38 and foundation layer 39l in the second region 8 (transparent electrode layer forming step and foundation layer forming step). This forms a first metal electrode layer 29 consisting of the foundation layer 29l and the plating layer 29u, and a second metal electrode layer 39 consisting of the foundation layer 39l and the plating layer 39u. Furthermore, a first electrode layer 27 consisting of the first transparent electrode layer 28 and the first metal electrode layer 29, and a second electrode layer 37 consisting of the second transparent electrode layer 38 and the second metal electrode layer 39 are formed.

[0057] An example of an etching solution for simultaneous etching of the underlayer material film 29lZ and the transparent electrode layer material film 28Z is a mixed solution of an oxidizing agent such as ammonium persulfate (ammonium persulfate) and an acidic solution such as hydrochloric acid (HCl) when, for example, the transparent electrode layer material film 28Z is ITO and the underlayer material film 29lZ is copper.

[0058] Here, the technique of forming a plating layer on a relatively thin underlayer is also called a subtraction method. In this subtraction method, instead of the resist formation process, plating layer formation process, and resist removal process (FIGS. 4C to 4E), a series of plating layers are formed and then patterned using a resist. Because the underlayer is relatively thin, the underlayer has an uneven structure corresponding to the uneven structure (texture structure) of the semiconductor substrate. Therefore, as shown in FIG. 6, when the plating layer 29u grows on the underlayer material film 29lZ, the plating layers growing obliquely, especially in the valleys of the uneven structure, push against each other (see arrows), which can cause cracks in the plating layer.

[0059] If cracks occur in the plating layer, etching solutions used for patterning the metal electrode layer and transparent electrode layer, for example, can penetrate the cracks and dissolve the underlayer material film and transparent electrode layer material film, damaging the semiconductor layer. Thin underlayer material films, in particular, have small crystal grains and are relatively easily dissolved in acidic solutions such as sulfuric acid. This can lead to a decrease in the performance and reliability of the solar cell.

[0060] In this regard, in this embodiment, as shown in FIG. 5, in the resist formation step, a resin film 41 exuding from the resist 40 is disposed in the valleys of the concave-convex structure of the underlayer material film 29lZ. It is preferable that the valleys of the concave-convex structure of the underlayer material film 29lZ be planarized (smoothed) by the resin film 41. This prevents the plating layer 29u growing obliquely, particularly in the valleys of the concave-convex structure, from pressing against each other, thereby preventing cracks from occurring in the plating layer, when the plating layer 29u grows on the underlayer material film 29lZ. This prevents damage to the semiconductor layer, for example, caused by the penetration of an etching solution used for patterning the metal electrode layer and the transparent electrode layer into cracks in the plating layer. This prevents a decrease in the performance of the solar cell. Furthermore, it also prevents a decrease in the reliability of the solar cell.

[0061] Thereafter, optical adjustment layer 15 (not shown) is formed on the entire light-receiving surface side of semiconductor substrate 11. Through the above steps, back electrode type solar cell 1 of this embodiment shown in FIGS.

[0062] As described above, according to the method for manufacturing a solar cell of this embodiment, plating is used to form the metal electrode layers 29, 39. This makes it possible to simplify the solar cell manufacturing process and reduce costs.

[0063] Furthermore, according to the solar cell manufacturing method of this embodiment, the plating method uses a pattern printing method to directly (i.e., film formation and patterning are performed simultaneously) form the plating layer 29u using a resist 40 formed by printing and baking (hardening) a printing material containing a resin material and a solvent. As a result, a resin film 41 exuding from the printing material is disposed in the valleys of the uneven structure of the base layer material film 29lZ. It is preferable that the valleys of the uneven structure of the base layer material film 29lZ are planarized (smoothed) by the resin film 41. This can prevent cracks from occurring in the plating layer and can suppress damage to the semiconductor layer caused by cracks in the plating layer. Therefore, deterioration in the performance of the solar cell can be suppressed. Furthermore, deterioration in the reliability of the solar cell can be suppressed.

[0064] Furthermore, according to the method for manufacturing a solar cell of this embodiment, a relatively inexpensive metal, such as Cu (e.g., a film formed by a PVD method such as sputtering followed by wet etching) may be used as the material for the metal electrode layers 29, 39 instead of the relatively expensive known Ag paste, thereby reducing the cost of the solar cell.

[0065] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments and various modifications and variations are possible. For example, the above-described embodiments illustrate a solar cell in which resin film 41 is unevenly distributed in the valleys of the uneven structure between underlayer 29l and plating layer 29u in first metal electrode layer 29 and between underlayer 39l and plating layer 39u in second metal electrode layer 39, as shown in FIG. 3. However, the present invention is not limited to this, and various solar cells can be conceived depending on the degree of etching in the solar cell manufacturing process. For comparison with the comparative solar cell described below, FIG. 7A shows a partial enlarged cross-sectional view of the solar cell according to this embodiment shown in FIG. 3, which is an enlarged cross-sectional view of portion III shown in FIG. 2. FIG. 7A collectively shows the first conductivity-type semiconductor layer 25 and passivation layer 23 in FIG. 3. FIGS. 7B to 7D are partial enlarged cross-sectional views of solar cells according to variations of this embodiment, corresponding to portion III shown in FIG. 2.

[0066] 7B , in solar cell 1, resin film 41 that is unevenly distributed in the valleys of the uneven structure between base layer 29l and plating layer 29u in first metal electrode layer 29 and between base layer 39l and plating layer 39u in second metal electrode layer 39 may be etched and removed. For example, resin film 41 is etched and removed in the resist removal step described above.

[0067] As a result, in solar cell 1, a space may exist below plating layer 29u in the valleys of the uneven structure at least at the end of first metal electrode layer 29 on the boundary side between first region 7 and second region 8. More specifically, at least at the end of first metal electrode layer 29, base layer 29l may exist below plating layer 29u in the valleys of the uneven structure, and a space may exist between base layer 29l and plating layer 29u in the valleys of the uneven structure without resin film 41 interposed therebetween.

[0068] Similarly, in solar cell 1, a space may exist below plating layer 39u in the valleys of the uneven structure at least at the end of second metal electrode layer 39 on the boundary side between first region 7 and second region 8. More specifically, at least at the end of second metal electrode layer 39, base layer 39l may exist below plating layer 39u in the valleys of the uneven structure, and a space may exist between base layer 39l and plating layer 39u in the valleys of the uneven structure without resin film 41 interposed therebetween.

[0069] 7C , in solar cell 1, base layers 29l and 39l may be further etched and removed, and transparent electrode layers 28 and 38 may be further etched and removed. For example, in the transparent electrode layer forming step and base layer forming step described above, base layers 29l and 39l and transparent electrode layers 28 and 38 are etched and removed.

[0070] As a result, in solar cell 1, resin film 41 and underlayer 29l may not be present and spaces may exist below plating layer 29u in the valleys of the uneven structure at least at the ends of first metal electrode layer 29. Alternatively, in solar cell 1, resin film 41, underlayer 29l and transparent electrode layer 28 may not be present and spaces may exist below plating layer 29u in the valleys of the uneven structure at least at the ends of first metal electrode layer 29.

[0071] Similarly, in the solar cell 1, the resin film 41 and the base layer 39l may not be present and a space may exist below the plating layer 39u in the valleys of the uneven structure at least at the end of the second metal electrode layer 39. Alternatively, in the solar cell 1, the resin film 41, the base layer 39l, and the transparent electrode layer 38 may not be present and a space may exist below the plating layer 39u in the valleys of the uneven structure at least at the end of the second metal electrode layer 39.

[0072] 7D , in solar cell 1, resin film 41 unevenly distributed in the valleys of the concave-convex structure between base layer 29l and plating layer 29u in first metal electrode layer 29 and between base layer 39l and plating layer 39u in second metal electrode layer 39 may remain unetched, and base layers 29l and 39l may be etched and removed, and further transparent electrode layers 28 and 38 may be etched and removed. As described above, for example, in the transparent electrode layer forming step and base layer forming step, base layers 29l and 39l and transparent electrode layers 28 and 38 are etched and removed.

[0073] As a result, in solar cell 1, at least at the end of first metal electrode layer 29, resin film 41 may be present below plating layer 29u in the valleys of the uneven structure, base layer 29l may not be present, and spaces may exist below resin layer 41 in the valleys of the uneven structure. Alternatively, in solar cell 1, at least at the end of first metal electrode layer 29, resin film 41 may be present below plating layer 29u in the valleys of the uneven structure, base layer 29l and transparent electrode layer 28 may not be present, and spaces may exist below resin layer 41 in the valleys of the uneven structure.

[0074] Similarly, in solar cell 1, at least at the end of second metal electrode layer 39, resin film 41 may be present below plating layer 39u in the valleys of the uneven structure, base layer 39l may not be present, and spaces may exist below resin layer 41 in the valleys of the uneven structure. Alternatively, in solar cell 1, at least at the end of second metal electrode layer 39, resin film 41 may be present below plating layer 39u in the valleys of the uneven structure, base layer 39l and transparent electrode layer 38 may not be present, and spaces may exist below resin layer 41 in the valleys of the uneven structure.

[0075] In addition, in the above-described embodiment, a solar cell including an electrode layer including a transparent electrode layer and a metal electrode layer is exemplified, but the present invention is not limited thereto and can also be applied to a solar cell including an electrode layer including only a metal electrode layer.

[0076] In the above-described embodiment, the solar cell 1 is exemplified by using a crystalline silicon material, but the solar cell is not limited to this. For example, various materials such as gallium arsenide (GaAs) may be used as the material for the solar cell.

[0077] In the above-described embodiment, a heterojunction solar cell 1 is exemplified as shown in Fig. 2. However, the present invention is not limited to this and can be applied to various solar cells such as a homojunction solar cell. [Explanation of symbols]

[0078] 1. Solar cells 7 First area 7f Finger section 7b Busbar section 8 Second area 8f Finger section 8b Busbar section 11 Semiconductor substrate 13,23,33 Passivation layer 15 Optical adjustment layer 25 First conductivity type semiconductor layer 27 1st electrode layer 28 First transparent electrode layer 28Z Transparent electrode layer material film 29 First metal electrode layer 29l base layer 29lZ Base layer material film 29u plating layer 35 Second conductivity type semiconductor layer 37 Second electrode layer 38 Second transparent electrode layer 39 Second metal electrode layer 39l Base layer 39u plating layer 40 Resist 41 Resin film

Claims

1. A back electrode type solar cell including: a semiconductor substrate having an uneven structure on one main surface side; a first conductivity type semiconductor layer and a first metal electrode layer stacked in this order in a first region which is a part of the one main surface side of the semiconductor substrate; and a second conductivity type semiconductor layer and a second metal electrode layer stacked in this order in a second region which is another part of the one main surface side of the semiconductor substrate, a resin film disposed at least at an end of each of the first metal electrode layer and the second metal electrode layer on a boundary side between the first region and the second region; each of the first metal electrode layer and the second metal electrode layer has an underlayer and a plating layer; the underlayer has a concave-convex structure corresponding to the concave-convex structure of the semiconductor substrate, the peaks of the concave-convex structure of the underlayer are in contact with the plating layer, the resin film is interposed between the plating layer and a valley of the concave-convex structure at least at the end of the base layer; Solar cell.

2. The solar cell according to claim 1 , wherein valleys of the uneven structure of the base layer other than the end portions are in contact with the plating layer.

3. The solar cell according to claim 1 , wherein each of the first metal electrode layer and the second metal electrode layer contains copper as a main component.

4. a first transparent electrode layer laminated between the first conductive type semiconductor layer and the first metal electrode layer in the first region; a second transparent electrode layer laminated between the second conductive type semiconductor layer and the second metal electrode layer in the second region; The solar cell according to any one of claims 1 to 3, further comprising:

5. A back electrode type solar cell including: a semiconductor substrate having an uneven structure on one main surface side; a first conductivity type semiconductor layer and a first metal electrode layer stacked in this order in a first region which is a part of the one main surface side of the semiconductor substrate; and a second conductivity type semiconductor layer and a second metal electrode layer stacked in this order in a second region which is another part of the one main surface side of the semiconductor substrate, each of the first metal electrode layer and the second metal electrode layer has an underlayer and a plating layer; the underlayer has a concave-convex structure corresponding to the concave-convex structure of the semiconductor substrate, the peaks of the concave-convex structure of the underlayer are in contact with the plating layer, a space exists below the plating layer in a valley portion of the uneven structure of the semiconductor substrate at least at an end portion of each of the first metal electrode layer and the second metal electrode layer on a boundary side between the first region and the second region; Solar cell.

6. At least at the end, the underlayer is present under the plating layer in the valleys of the uneven structure of the semiconductor substrate, a resin film is not interposed between the base layer and the plating layer in the valley portion of the concave-convex structure of the semiconductor substrate, but the space is interposed between the base layer and the plating layer. The solar cell according to claim 5 .

7. At least at the end, the resin film and the underlayer are not present under the plating layer in the valleys of the concave-convex structure of the semiconductor substrate, and the space is present. The solar cell according to claim 5 .

8. At least at the end, a resin film is present under the plating layer in the valleys of the uneven structure of the semiconductor substrate, the space exists under the resin film in the valley portion of the concave-convex structure of the semiconductor substrate; The solar cell according to claim 5 .

9. At least at the end, the underlayer is not present under the plating layer in the valleys of the concave-convex structure of the semiconductor substrate. The solar cell according to claim 8 .

10. a transparent electrode layer laminated between the first conductive type semiconductor layer and the first metal electrode layer in the first region and between the second conductive type semiconductor layer and the second metal electrode layer in the second region; At least at the end, the transparent electrode layer is not present under the plating layer in the valleys of the concave-convex structure of the semiconductor substrate. The solar cell according to claim 7 or 9.

11. A solar cell described in any one of claims 5 to 10, wherein the base layer and the plating layer are in contact in the valleys of the uneven structure of the semiconductor substrate other than the end portions.

12. 12. The solar cell according to claim 5, wherein each of the first metal electrode layer and the second metal electrode layer contains copper as a main component.

13. A method for manufacturing a back electrode type solar cell including: a semiconductor substrate having an uneven structure on one main surface side; a first conductivity type semiconductor layer and a first metal electrode layer stacked in this order in a first region that is a part of the one main surface side of the semiconductor substrate; and a second conductivity type semiconductor layer and a second metal electrode layer stacked in this order in a second region that is another part of the one main surface side of the semiconductor substrate, the solar cell includes a resin film disposed at least at an end portion of each of the first metal electrode layer and the second metal electrode layer on a boundary side between the first region and the second region, each of the first metal electrode layer and the second metal electrode layer has an underlayer and a plating layer; The method for manufacturing a solar cell includes: an underlayer material film forming step of forming a series of underlayer material films on the first conductivity type semiconductor layer and the second conductivity type semiconductor layer on the one main surface side of the semiconductor substrate, spanning the first region and the second region; a resist forming step of forming a resist on the material film of the underlayer at the boundary between the first region and the second region; a plating layer forming step of forming a patterned plating layer on the material film of the base layer in each of the first region and the second region by using a plating method using the resist as a mask; a resist removal step of removing the resist; an underlayer forming step of etching a material film of the underlayer using an etching method that uses the plating layer as a mask, thereby forming a patterned underlayer in each of the first region and the second region; Including, In the underlayer material film forming step, a material film of the underlayer having a concavo-convex structure corresponding to the concavo-convex structure of the semiconductor substrate is formed, In the resist forming step, a printing material containing a resin material and a solvent is printed and cured using a pattern printing method to form a patterned resist, whereby the resin film formed by the resin material seeping out is disposed in valleys of the uneven structure at least at the end of the base layer; In the plating layer forming step, the plating layer is formed on the resin film in the valleys of the concave-convex structure at least at the end of the base layer and on the peaks of the concave-convex structure of the base layer. How solar cells are manufactured.

Images