Power conversion device and control method for power conversion device

Abstract

When the secondary side DC voltage is equal to or greater than a threshold value, the circuit outputs a primary side maximum pulse width and a secondary side maximum pulse width, and their phase difference, for achieving a secondary side DC current command value to the bidirectional isolated DC / DC converter 3 based on the primary side DC voltage, and when the secondary side DC voltage is less than a threshold value, the circuit outputs a primary side pulse width and a secondary side pulse width, and their phase difference, for achieving the secondary side DC current command value based on the primary side DC voltage and the secondary side DC voltage. Also, when the secondary side DC voltage is equal to or greater than the threshold value, the circuit sets a primary side DC voltage command reference value corrected based on the threshold value and the secondary side DC voltage as a primary side DC voltage average command value to the AC / DC converter 2, and when the secondary side DC voltage is less than the threshold value, the circuit sets a primary side DC voltage command lower limit value as the primary side DC voltage average command value.

Description

[Technical Field]

[0001] The present invention relates to a control technology for an SST (Solid-State Transformer) type power conversion system, and in particular to a technology for maintaining high efficiency even when a load over a wide voltage range is connected. [Background technology]

[0002] Non-Patent Document 1 proposes a power conversion system that assumes an EV charger or a battery of a power storage device as a load in an SST power conversion circuit. In this system, a DC bus is formed from the high-voltage system in the circuit, and power is supplied bidirectionally by an isolated DC / DC converter connected to each load.

[0003] Non-Patent Document 2 proposes a power conversion system that assumes the battery of an EV charger is used as a load in an SST power conversion circuit. Since the battery voltage range of EV chargers is wide, this system enables highly efficient operation over a wide voltage range by providing a non-isolated DC / DC converter on the secondary side of the AC / DC converter in the circuit. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] Michael Starke, Radha Sree Krishna Moorthy, Aswad Adib, Benjamin Dean, Madhu Chinthavali, Bailu Xiao, Steven Campbell, “A MW scale charging architecture for supporting extreme fast charging of heavy-duty electric vehicles,” in Proc. IEEE Conference on Transportation Electrification (ITEC), 2022, Anaheim, CA, USA [Non-patent document 2] “High-Efficiency, Medium-Voltage Input, Solid-State, Transformer-Based 400-kW / 1000-V / 400-A Extreme Fast Charger for Electric Vehicles” Department of Energy (DOE) at the 2021 DOE Vehicle Technologies Office Annual Merit Review [Non-patent document 3] J.Shi, W.Gou, H.Yuan, T.Zhao, AQHuang: “Research on voltage and power balance control for cascaded modular solid-state transformer”, IEEE Trans. on Power Electronics [Non-patent document 4] Junichi Ito, Junichi Higa, "Development of a T-type Dual Active Bridge DC-DC Converter with an Operation Mode Switching Method for a Wide Voltage Drive Range," IEEJ Transactions on Power Systems, Vol. 139, No. 4, pp. 388-400 (2019) [Patent documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2022-165495 [Patent Document 2] Japanese Patent Publication No. 2022-43627 [Patent Document 3] Patent No. 7384136 Summary of the Invention

[0006] The systems described in Non-Patent Documents 1 and 2 are intended to supply power to a battery using an SST-type power conversion circuit. Since batteries and capacitors with various voltage ranges are connected to the load of the circuit, an isolated or non-isolated DC / DC converter is required in the circuit to drive it efficiently over a wide voltage range, which increases the cost and size of the device. Furthermore, a circuit with low loss and requiring a small cooler is desirable in terms of reducing the cost, size, and energy consumption of the device.

[0007] When the load for the SST method is assumed to be a storage device such as a battery or capacitor, DC voltage fluctuations occur in the load due to charging and discharging. In an isolated DC / DC converter, losses increase when the input and output DC voltages fluctuate from the nominal value, which leads to increased costs and size, such as increased capacity of semiconductor elements and larger coolers and passive components.

[0008] In view of the above circumstances, an object of the present invention is to suppress an increase in loss without adding any additional circuitry even over a wide voltage range in an SST type power conversion system that is designed for a load with a large fluctuation in DC voltage.

[0009] Therefore, one aspect of the present invention is a power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, in which, when a secondary side DC voltage is equal to or higher than a threshold, a secondary side DC current command value to the bidirectional isolated DC / DC converter is achieved based on a primary side DC voltage from the AC / DC converter. Primary pulse width and Secondary pulse widthand a phase difference therebetween, and when the secondary-side DC voltage is less than a threshold value, outputs a primary-side pulse width and a secondary-side pulse width, and a phase difference therebetween, that achieve the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage, and when the secondary-side DC voltage is equal to or greater than the threshold value, this current control unit sets a primary-side DC voltage command reference value corrected based on the threshold value and the secondary-side DC voltage as a primary-side DC voltage average command value of the AC / DC converter, and when the secondary-side DC voltage is less than the threshold value, sets a primary-side DC voltage command lower-limit value as the primary-side DC voltage average command value.

[0010] One aspect of the present invention is a power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, in which, when a secondary-side DC voltage is equal to or greater than a lower threshold and less than an upper threshold, a secondary-side DC current command value to the bidirectional isolated DC / DC converter is achieved based on a primary-side DC voltage from the AC / DC converter. Primary pulse width and Secondary pulse width and a phase difference therebetween, and outputs a primary-side pulse width and a secondary-side pulse width, and a phase difference therebetween, for achieving the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage, when the secondary-side DC voltage is less than a lower-limit threshold or equal to or greater than an upper-limit threshold. This current control unit sets a primary-side DC voltage command upper limit value as a primary-side DC voltage average command value to the AC / DC converter when the secondary-side DC voltage is equal to or greater than an upper-limit threshold, sets a primary-side DC voltage command reference value corrected based on a secondary-side DC voltage reference value and the secondary-side DC voltage, as the primary-side DC voltage average command value, when the secondary-side DC voltage is equal to or greater than the lower-limit threshold and less than an upper-limit threshold, and sets a primary-side DC voltage command lower-limit value as the primary-side DC voltage average command value when the secondary-side DC voltage is less than the lower-limit threshold.

[0011] One aspect of the present invention is a control method for a power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, wherein when a secondary-side DC voltage is equal to or higher than a threshold, a secondary-side DC current command value for the bidirectional isolated DC / DC converter is achieved based on a primary-side DC voltage from the AC / DC converter. Primary pulse width and Secondary pulse width and a phase difference thereof, and when the secondary-side DC voltage is less than a threshold value, outputting a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, that achieve the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage; and when the secondary-side DC voltage is equal to or greater than the threshold value, setting a primary-side DC voltage command reference value corrected based on the threshold value and the secondary-side DC voltage as a primary-side DC voltage average command value to the AC / DC converter, and when the secondary-side DC voltage is less than the threshold value, setting a primary-side DC voltage command lower-limit value as the primary-side DC voltage average command value.

[0012] One aspect of the present invention is a control method for a power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, wherein when a secondary-side DC voltage is equal to or greater than a lower threshold and less than an upper threshold, a secondary-side DC current command value to the bidirectional isolated DC / DC converter is achieved based on a primary-side DC voltage from the AC / DC converter. Primary pulse width and Secondary pulse width and a phase difference thereof, and outputting a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, that achieve the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage, when the secondary-side DC voltage is less than a lower-limit threshold or equal to or greater than an upper-limit threshold; and a process of setting a primary-side DC voltage command upper limit value as a primary-side DC voltage average command value to the AC / DC converter, when the secondary-side DC voltage is equal to or greater than an upper-limit threshold, setting a primary-side DC voltage command reference value corrected based on a secondary-side DC voltage reference value and the secondary-side DC voltage, as the primary-side DC voltage average command value, when the secondary-side DC voltage is equal to or greater than a lower-limit threshold and less than an upper-limit threshold, and setting a primary-side DC voltage command lower-limit value as the primary-side DC voltage average command value, when the secondary-side DC voltage is less than the lower-limit threshold.

[0013] According to the present invention, in an SST power conversion system designed for a load with large DC voltage fluctuations, an increase in loss can be suppressed without adding any additional circuitry even over a wide voltage range. [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 1A is a circuit diagram of a 2-series, 4-parallel SST-type power conversion system to which the present invention is applied, and FIG. 1B is a circuit diagram of a 1-series, 8-parallel SST-type power conversion system. [Figure 2] Circuit configuration diagram of a DAB (Dual Active Bridge) type bidirectional isolated DC / DC converter. [Figure 3] An example of a DAB operating waveform. [Figure 4] (a) Block diagram of ACDC control, (b) Block diagram of DAB control. [Figure 5] Block diagram of DAB current control. [Figure 6] FIG. 1A is a control decision block diagram of the first embodiment of the present invention; FIG. 1B is a relationship between the DAB control of the first embodiment and the secondary side DC voltage and current; [Figure 7] 10A is a block diagram showing a DAB switching frequency calculation according to a second embodiment of the present invention; FIG. 10B is a diagram showing the relationship between DAB control and secondary DC voltage and current according to the second embodiment; [Figure 8] FIG. 10A is a control decision block diagram of the third embodiment of the present invention; FIG. 10B is a relationship between the DAB control of the third embodiment and the secondary side DC voltage and current; DETAILED DESCRIPTION OF THE INVENTION

[0015] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0016] [Embodiment 1] The SST circuit 1 (hereinafter referred to as SST circuit 1) shown in FIG. 1 to which the present invention is applied is a circuit that inputs high voltage AC and outputs direct current voltage (hereinafter referred to as DC voltage), and is designed to suppress an increase in loss over a wide voltage range without requiring any additional circuitry, assuming a load where the DC voltage fluctuates greatly.

[0017] The SST circuit 1 includes n units 1u each including three phases (m cells per phase) of cells 1c each consisting of a power conversion device having an AC / DC converter 2 and a DAB converter 3. For example, the xth secondary side DC voltage Vdc2 The primary DC voltage of the kth unit connected to V dc1axk In this embodiment, the DC bus may be configured by connecting the output DC terminals of the cells 1c in series and parallel.

[0018] The SST circuit 1 enables voltage output while improving efficiency by switching the control modes of the AC / DC converter 2 and the DAB (Dual Active Bridge) bidirectional isolated DC / DC converter 3 (hereinafter referred to as DAB converter 3) depending on the load voltage.

[0019] The number m of cells 1c per phase of the SST circuit 1 is set based on the number of series connections on the output side of the cells 1c, the withstand voltage and capacity of the selected semiconductor device. If the number of series connections is 2, the closest even value to the number of cells selected from the selected device is used, and if the number of series connections is 1, the value is determined from the selected device. The number of units n is defined as n = 3m / number of series connections on the secondary side DC terminals using the number m of cells per phase.

[0020] As shown in Fig. 2, the cell 1c has an H-bridge AC / DC converter 2 and a DAB converter 3 connected to the secondary side of the AC / DC converter 2. The DAB converter 3 has a transformer turns ratio N tr = Equipped with a high frequency transformer Tr of N1 / N2.

[0021] The DAB converter 3 includes a primary-side inverter 301 connected to the AC / DC converter 2 on the primary side of a high-frequency transformer Tr, and a secondary-side inverter 302 connected to the secondary side of the high-frequency transformer Tr. As a driving method for the DAB system in the DAB converter 3, for example, the phase and pulse width control method disclosed in Patent Document 1 is applied. This control method, as shown in FIG. 3, dc1axk ) primary pulse width W 1xk and secondary pulse width W 2xk and its phase difference θ xk By adjusting the above, power can be controlled efficiently against DC voltage fluctuations on the primary and secondary sides.

[0022] (AC / DC converter 2) FIG. 4(a) shows a block configuration of the AC / DC control unit 20 of the AC / DC converter 2 (Non-Patent Document 3, Patent Document 2).

[0023] The ACDC control unit 20 is implemented in the control device 10 of the SST circuit 1, and includes an average voltage control unit 21, a system current control unit 22, a dq inverter 23, and an intra-phase balance control unit 24.

[0024] The average voltage control unit 21 controls the primary side DC voltage V dc1axk That is, the average voltage control unit 21 controls the primary side DC voltage V of each cell to a desired value. dc1axk and the primary side DC voltage average command value V dc1_ave_ref is used as the input, and the active component i of the grid current command value (d-axis component) d_ref Output the active ingredient i d_ref is output to the grid current control unit 22 together with the grid current command value (q-axis component) (however, the grid current command value (q-axis component) is 0 (reactive component i q_ref In the control of this embodiment, the secondary side DC voltage V dc2x Based on the primary side DC voltage average command value V dc1_ave_ref will be changed.

[0025] The system current control unit 22 calculates the active component i d_ref and inactive ingredient i q_ref Controls the current. Active ingredient i d_ref , inactive ingredient i q_ref P control or PI control is performed on the active ingredient V d_ref , Inactive ingredient V q_ref Output.

[0026] The dq inverse converter 23 calculates the active component V d_ref , Inactive ingredient V q_ref and phase ωt, the value on the rotating coordinate system synchronized with the system voltage is converted to the value on the fixed coordinate system (V u_ref , V v_ref , V w_ref )

[0027] The phase balance control unit 24 controls the primary side DC voltage V in each phase (U, V, W). dc1axk In particular, the phase balance control unit 24 controls the balance of the primary side DC voltage V dc1axk Based on the output signal of the phase balance control, a gate signal for the semiconductor element of the primary inverter 301 in each cell is generated by a method such as triangular wave comparison. As a result, the primary DC voltage V of each cell is dc1 Control the average value of

[0028] (DAB Converter 3) FIG. 2B shows a block diagram of the DAB control unit 30 of the DAB converter 3.

[0029] The DAB control unit 30 is implemented in the control device 10 of the SST circuit 1, and includes a current command generation unit 31, a balance control unit 32, a subtraction unit 33, and a current control unit .

[0030] The current command generating unit 31 outputs a secondary DC current command value by controlling the entire secondary DC voltage value or by controlling the secondary DC current (Non-Patent Document 3, Patent Document 2).

[0031] The balance control unit 32 performs balance control of the secondary DC voltage (Non-Patent Document 3). Specifically, when the number of series-connected secondary DC terminals is two, the secondary DC voltage V dc21 ,V dc22 This is not necessary if all are connected in parallel. The balance control section 32 balances the secondary DC voltage V dc21 ,V dc22 and a secondary DC voltage V adjusted by P control or PI control based on the difference. dc2 and a voltage regulator 322 that outputs:

[0032] The subtractor 33 calculates the secondary DC current command value i based on the secondary DC current command value from the current command generator 41 and the output value of the balance controller 42. dc2xk_ref Output.

[0033] The current control unit 34 calculates the secondary current command value idc2xk_ref and the primary side DC voltage V dc1axk and secondary DC voltage V dc2x is used as input, and the primary pulse width W 1xk and primary pulse width W 2xk and its phase difference command value θ xk , switching frequency f sw_DAB , primary side DC voltage average command value V dc1_ave_ref and generates a gate signal (on / off signal for a semiconductor element) of the DAB system based on Patent Document 3. The drive start signal for generating the gate signal is input from the outside, similar to the gate signal generating unit of Patent Document 3, and can be set at any timing after it becomes possible to start operation of the power conversion device of this embodiment.

[0034] FIG. 5 is a block diagram of the current control unit 34.

[0035] The current control unit 34 calculates the secondary DC current command value i dc2xk_ref , primary side DC voltage V dc1axk , secondary DC voltage V dc2 , and the secondary DC voltage V of each series-connected cell 1c when the number of series-connected secondary DC terminals of cell 1c is two or more dc2x (When the number of series connections of the secondary DC terminal of cell 1c is 1, V dc2 ) is taken as input.

[0036] Below, each functional unit of the current control unit 34 (PI control unit 51, phase control unit 52, pulse width and phase control unit 53, control determination unit 54, multiplexer 55, high-pass filter 56, adder 57, and subtractor 58) will be described.

[0037] The PI control unit 51 calculates the secondary DC current command value i dc2xk_ref and secondary side DC current detection value i dc2xk The phase difference θ is controlled by P control or PI control based on the difference xk_PI Output.

[0038] The phase control unit 52 calculates the secondary DC current command value i dc2xk_ref In response to this, the primary side DC voltage V dc1axk , secondary DC voltage Vdc2 is a square wave, and the output voltage (primary side DC voltage V dc1axk ) phase difference θ xk_ps Calculate.

[0039] The pulse width and phase control unit 53 calculates the secondary DC current command value i dc2xk_ref In response to this, one or both of the output voltages of each H-bridge is a three-level voltage waveform including a zero voltage period, and the primary side pulse width W of the output voltage 1xk_pw and secondary pulse width W 2xk_pw and its phase difference θ xk_ps Calculate.

[0040] The control decision unit 54 determines the secondary DC current command value i dc2xk_ref and the secondary DC voltage V dc2 Based on this, the control flag PS flg , the DAB switching frequency f sw_DAB , primary side DC voltage average command value V dc1_ave_ref Output.

[0041] The multiplexer 55 determines the DAB control flag PS flg The primary pulse width W corresponding to the value (1 or 0) 1xk and secondary pulse width W 2xk and its phase difference θ xk_FF DAB control flag PS flg The correspondence table is shown in Table 1.

[0042] [Table 1]

[0043] The high-pass filter 56 (hereinafter HPF56) is dc2 is used as input, and the vibration component θ of the load side voltage xk_dmp Only the above is output.

[0044] The adder 57 receives the output of the PI control unit 51 (phase difference θ xk_PI) and the output of multiplexer 55 (phase difference θ xk_FF ) and take the sum.

[0045] The subtractor 58 takes the difference between the output of the adder 57 and the output of the HPF 56 to suppress the oscillation component of the secondary DC current and also to adjust the phase difference command value θ xk Output.

[0046] 6(a) shows the block configuration of the control decision unit 54. The control decision unit 54 determines the secondary side DC voltage V dc2 and threshold V PWM_H Based on the magnitude relationship between these, the primary side DC voltage command value of the AC / DC control unit 20 and the DAB current control mode of the DAB control unit 30 are determined.

[0047] The control decision unit 54 determines the lower limit V of the primary side DC voltage average command value. dc1_ave_L , the reference value V of the primary side DC voltage average command value dc1_ave_base , secondary DC voltage reference value V dc2_base , secondary DC voltage V dc2 and threshold V PWM_H is taken as input.

[0048] Hereinafter, each functional unit of the control decision unit 54 (the multiplication unit 61, the divider 62, the multiplier 63, the limiter 64, the hysteresis comparator 65, and the switch 66) will be described.

[0049] The multiplication unit 61 calculates the threshold V PWM_H (Number of series connections of secondary DC terminal of cell 1c N si ) / (transformer turns ratio N tr )

[0050] The divider 62 calculates the primary side DC voltage average command reference value V dc1_ave_base The output value of the multiplication unit 61 is divided by

[0051] The multiplier 63 multiplies the output value of the divider 62 by the secondary DC voltage V dc2 Multiply by .

[0052] The limiter 64 limits the upper limit of the output value of the multiplier 63 to a voltage or element withstand voltage at which no system current ripple occurs, and limits the lower limit of the output value to a voltage at which no overmodulation due to the system current occurs.

[0053] The hysteresis comparator 65 has a threshold V PWM_H and the secondary DC voltage V dc2 Depending on the magnitude relationship, the DAB control flag PS flg Determine.

[0054] The switch 66 switches the DAB control flag PS flg Based on the primary side DC voltage command value V dc1_ave_ref Switch between.

[0055] (Operation example of embodiment 1) A specific example of the operation of the first embodiment will be described with reference to FIGS.

[0056] The control device 10 of the SST circuit 1 controls the secondary DC voltage V dc2 Based on this, the DAB converter 3 is controlled (hereinafter referred to as DAB control) and the AC / DC converter 2 is controlled (hereinafter referred to as AC / DC control). dc2 Based on the magnitude relationship between the voltage range of the grid current and the threshold determined by the voltage range available for the grid current, the DAB control and ACDC control modes are switched as follows:

[0057] DAB control is performed by the secondary DC voltage V dc2 Based on this, the following [1] phase control + maximum pulse width control mode and [2] phase + pulse width control mode are switched.

[0058] [1] Phase control + maximum pulse width control mode is the secondary DC voltage V dc2 is the threshold V PWM_H When the primary DC voltage V from AC / DC converter 2 is dc1axk A desired secondary DC current (secondary DC current command value) is achieved to the DAB converter 3 based on Primary pulse width W 1xk_pw , Secondary pulse width W 2xk_pw and its phase difference θ xk_pwOutput.

[0059] [2] Phase + pulse width control mode is the secondary DC voltage V dc2 is the threshold V PWM_H When the primary DC voltage V is less than dc1axk and secondary DC voltage V dc2 The primary pulse width W that achieves the desired secondary DC current (secondary DC current command value) based on 1xk_pw , Secondary pulse width W 2xk_pw and its phase difference θ xk_pw Output.

[0060] ACDC control is performed by controlling the secondary DC voltage V dc2 Based on this, the following [3] primary side DC voltage average command value setting mode and [4] primary side DC voltage average command value lower limit setting mode are switched.

[0061] [3] The primary DC voltage average command value setting mode is the secondary DC voltage V dc2 is the threshold V PWM_H If it is greater than or equal to the threshold V PWM_H and the secondary DC voltage V dc2 The primary side DC voltage command reference value V dc1_ave_base is the primary side DC voltage average command value V to AC / DC converter 2. dc1_ave_ref Set as.

[0062] [4] The primary DC voltage average command lower limit setting mode is the secondary DC voltage V dc2 is the threshold V PWM_H If the primary DC voltage command lower limit V is less than dc1_ave_L is the primary side DC voltage average command value V to AC / DC converter 2. dc1_ave_ref Set as.

[0063] A specific example of the operation of the control device 10 (the ACDC control unit 20 and the DAB control unit 30) will be described below.

[0064] First, in the current control unit 34 of the DAB control unit 30, the PI control unit 51 calculates the secondary DC voltage values ​​(secondary DC current command values ​​idc2xk_ref , secondary side current detection value i dc2xk ) is used to calculate the current command value required to balance the two series-connected secondary DC voltages. xk_PI Output.

[0065] The phase control section 52 controls the primary side DC voltage V dc1axk and secondary DC current command value i dc2xk_ref is input, the phase difference θ that achieves a predetermined secondary DC current based on Non-Patent Document 4 xk_ps The pulse width W 1xk_ps ,W 2xk_ps outputs a value that forms a square wave.

[0066] The pulse width and phase control section 53 controls each primary side DC voltage V dc1axk , secondary DC voltage V dc2x and secondary DC current command value i dc2xk_ref is input, the pulse width W that achieves the desired secondary DC current based on Patent Document 2 1xk_pw ,W 2xk_pw and its phase difference θ xk_pw Output.

[0067] The control decision unit 54 determines the secondary DC current command value i dc2xk_ref and the secondary DC voltage value V dc2 Based on this, the DAB control flag PS flg (Phase control, pulse width and phase control), DAB switching frequency f sw_DAB , Primary side DC voltage average command value V dc1_ave_ref (Figure 6(a)(b)).

[0068] The multiplexer 55 receives the phase difference θ xk_ps and pulse width W 1xk_ps ,W 2xk_ps , the phase difference θ from the pulse width and phase control section 53 xk_pw and pulse width W 1xk_pw ,W 2xk_pw , the DAB control flag PS from the control decision unit 54 flg Based on this, the primary pulse width command value W 1xk and secondary pulse width command value W2xk and its phase difference θ xk_FF Determine.

[0069] The adder 57 receives the output of the multiplexer 55 (phase difference θ xk_FF ) and the output of the PI control unit 51 (phase difference θ xk_PI ) to calculate the phase difference that follows the current command value.

[0070] The subtractor 58 subtracts the output of the HPF 56 (the vibration component θ xk_dmp ) and the output of adder 57 (phase difference that follows the current command value), a phase difference command value θ xk Output.

[0071] The current control section 34 controls the secondary DC current i dc2 Since the configuration uses both feedforward control and feedback control, the PI control section 51 that controls the current does not need to be designed with an excessively large gain.

[0072] In particular, the control decision unit 54 determines the secondary DC voltage V dc2x and threshold V PWM_H Depending on the magnitude relationship, the ACDC control mode and the DAB control mode are switched.

[0073] Threshold V PWM_H is the primary side DC voltage command lower limit V dc1_ave_L , transformer turns ratio N tr and the number of series connections of the secondary DC terminals of cell 1c, N si Based on this, it is calculated using the following formula (1).

[0074]

number

[0075] V PWM_H :Threshold V dc1_ave_L : Primary side DC voltage command lower limit N tr : Transformer turns ratio N si : Number of series connections of secondary side DC terminals of cell 1c (power converter)

[0076] The lower limit of the primary DC voltage is V dc1_ave_L is set to a voltage value that does not cause overmodulation due to grid current control.

[0077] As shown in FIG. 1(b), the control decision unit 54 determines the secondary DC voltage V dc2 and threshold V PWM_H DAB control flag PS flg and the primary side DC voltage average command value V dc1_ave_ref Determine.

[0078] That is, the hysteresis comparator 65 detects the secondary DC voltage V dc2 ≧ threshold V PWM_H If it is determined that the DAB current control is flg = 1). Then, the primary side DC voltage average command value V dc1_ave_ref The switch 66 switches to [3] primary side DC voltage average command value setting mode, and the primary side DC voltage average command reference value V dc1_ave_base Based on this, the following equation (2) is set.

[0079]

number

[0080] V dc1_ave_ref : Primary side DC voltage average command value V dc1_ave_base : Primary side DC voltage average command reference value V PWM_H :Threshold N si : Number of series connections of secondary side DC terminals of cell 1c (power converter) N tr : Transformer turns ratio V dc2 : Secondary DC voltage

[0081] However, when the load suddenly changes, the secondary DC voltage V dc2 is the primary side DC voltage average command value V when overshoot or undershoot occurs. dc1_ave_ref is the lower limit V dc1_ave_L The limiter 64 is used to limit the voltage so that it does not fall below the voltage limit, and also so that it does not exceed the breakdown voltage of the semiconductor element, taking into account surges.

[0082] On the other hand, the secondary DC voltage V dc2 < Threshold V PWM_H If this is determined, the DAB control will be in [2] Phase control + pulse width control mode (PS flg = 0). Then, the primary side DC voltage average command value V dc1_ave_ref The switch 66 switches to [4] primary side DC voltage average command value lower limit value setting mode, and the lower limit value V dc1_ave_L The secondary DC voltage V dc2 is the threshold V PWM_H Hysteresis is provided to prevent control chatter when nearing the limit.

[0083] According to the above-described first embodiment, the highest efficiency is achieved under the conditions of maximum voltage and maximum current, and therefore the rated power is advantageous in specifications of maximum voltage and maximum current. In particular, since high efficiency is achieved over a wide voltage range, an additional step-up or step-down circuit is not required, which prevents the device from becoming larger and increasing its size and cost. Furthermore, since the efficiency can be increased in the high voltage and large current range, the cooler can be made smaller in devices where the rated power is the maximum voltage and maximum current.

[0084] [Embodiment 2] The control decision unit 54 of the second embodiment is the same as the control decision unit 54 of the first embodiment, and further includes a switching frequency calculation unit 70 shown in FIG.

[0085] The switching frequency calculation unit 70 calculates the secondary DC voltage V dc2 is the threshold V PWM_H If the switching frequency f sw_DABThe command value of the secondary DC voltage V is set to the reference value. dc2 is the threshold V PWM_H When the secondary DC voltage V is less than dc2 Switching frequency f based on sw_DAB Set the command value.

[0086] FIG. 7(a) shows the block configuration of the switching frequency calculation unit 70, and FIG. 7(b) shows the relationship between the DAB control and the secondary side DC voltage and current in the second embodiment.

[0087] The switching frequency calculation unit 70 calculates the reference switching frequency f sw_base In response to this, the secondary DC voltage V dc2 and threshold V PWM_H Based on the magnitude relationship of the primary DC voltage command value V dc1_ave_ref and the DAB current control switching frequency f sw_DAB Determine.

[0088] Hereinafter, each functional unit (divider 71, multiplier 72, limiter 73, and switch 74) of the switching frequency calculation unit 70 will be described.

[0089] Divider 71 divides the secondary DC voltage V dc2 Secondary side DC voltage reference value V dc2_base Divide by .

[0090] Multiplier 72 multiplies the reference switching frequency f sw_base is multiplied by the output value of the divider 71.

[0091] The limiter 73 sets upper and lower limits for the switching frequency output from the multiplier 72. The upper limit is determined based on the maximum drive frequency of the gate driver of the semiconductor element and the allowable loss value. The lower limit is determined based on the stable region of DC-DC control.

[0092] The switch 74 is connected to the secondary side DC voltage V dc2 and threshold V PWM_H DAB control flag PS according to the magnitude relationship with flgBased on the DAB circuit switching frequency f sw_DAB Determine the command value.

[0093] A specific example of the operation of the second embodiment will be described with reference to the same figure.

[0094] In this embodiment, as shown in FIG. 1(b), the secondary DC voltage V dc2 < Threshold V PWM_H In this region, phase control, pulse width control and switching frequency control are added to the DAB current control of the first embodiment.

[0095] The maximum current for DAB current control is determined by the primary and secondary DC voltages and the impedance of the high-frequency inductance L1. Therefore, if the impedance of the high-frequency inductance L1 is large, it may not be possible to drive at the rated current when the voltage drops.

[0096] Therefore, in the second embodiment, when the voltage drops, the switching frequency calculation unit 70 calculates the switching frequency f sw_DAB By controlling the voltage to a low level, the loss of the DAB current control is reduced and the lower limit of the voltage at which the rated current can be operated is expanded.

[0097] The control block of the switching frequency calculation unit 70 in FIG. 1(a) is a DAB control flag PS flg Based on the switching frequency f of DAB converter 3 sw_DAB The command value is controlled.

[0098] That is, the hysteresis comparator 65 detects the secondary DC voltage V dc2 ≧ threshold V PWM_H If it is determined that the DAB control flag PS flg =1 (phase control + maximum pulse width control). At this time, the DAB control is set to [1] phase control + maximum pulse width control mode, and the ACDC control is set to [3] primary side DC voltage average command value setting mode of the first embodiment. Then, the switching frequency f sw_DAB The command value is the reference value f sw_base is set to

[0099] On the other hand, the secondary DC voltage V dc2 < Threshold V PWM_H If it is determined that the DAB control flag PS flg = 0 (phase control + pulse width control). At this time, the DAB control switches to the [2] phase + pulse width control mode, and the ACDC control switches to the [4] primary side DC voltage average command value lower limit setting mode of the first embodiment. Then, the switching frequency f sw_DAB The command value of the secondary DC voltage V dc2 Based on this, it is controlled by the following equation (3).

[0100]

number

[0101] f sw_DAB : Switching frequency V dc2 : Secondary DC voltage V dc2_base : Secondary DC voltage reference value f sw_base : Switching frequency reference value

[0102] According to the above-described second embodiment, by adding control of the switching frequency of the DAB converter 3 to the first embodiment, the parameter tolerance range of the high-frequency transformer Tr of the DAB converter 3 is widened, and the design of the winding structure of the high-frequency transformer Tr is made easier.

[0103] [Embodiment 3] The current control unit 34 of the third embodiment includes a control decision unit 80 shown in FIG. 8 instead of the control decision unit 54 of FIG. 6 (first embodiment).

[0104] FIG. 8(a) shows a block diagram of the control decision unit 80 of the third embodiment, and FIG. 8(b) shows the relationship between the DAB control of this embodiment and the secondary side DC voltage and current.

[0105] The control decision unit 80 determines the primary side DC voltage command upper limit value V dc1_ave_H, primary side DC voltage command lower limit V dc1_ave_L , primary side DC voltage command reference value V dc1_ave_base , secondary DC voltage reference value V dc2_base , secondary DC voltage V dc2 and the upper threshold V for DAB control switching PWM_H , lower threshold V PWM_L Based on this, the primary side DC voltage command value V dc1_ave_ref and outputs the secondary DC voltage V dc2 and its upper threshold V PWM_H , lower threshold V PWM_L Based on the magnitude relationship between the two, the DAB control and ACDC control modes are switched as follows:

[0106] DAB control is performed by the secondary DC voltage V dc2 Based on this, the following [1] phase control + maximum pulse width control mode and [2] phase and pulse width control mode are switched.

[0107] [1] Phase control and maximum pulse width control modes are based on the secondary DC voltage V dc2 is the lower threshold V PWM_L and above the upper threshold V PWM_H When the primary DC voltage V from AC / DC converter 2 is less than dc1axk A desired secondary DC current (secondary DC current command value) is achieved to the DAB converter 3 based on Primary pulse width W 1xk_pw , Secondary pulse width W 2xk_pw and its phase difference θ xk_pw Output.

[0108] [2] Phase and pulse width control mode is the secondary DC voltage V dc2 is the lower threshold V PWM_L Less than or equal to the upper threshold V PWM_H When the primary DC voltage V is greater than or equal to dc1axk and secondary DC voltage V dc2 The primary pulse width W that achieves the desired secondary DC current (secondary DC current command value) based on 1xk_pw , Secondary pulse width W 2xk_pw and its phase difference θ xk_pw Output.

[0109] ACDC control is performed by controlling the secondary DC voltage V dc2 Based on this, the following (3) primary side DC voltage average command upper limit value setting mode, (4) primary side DC voltage average reference value setting mode, and (5) primary side DC voltage average command lower limit value setting mode are switched.

[0110] [3] The primary DC voltage average command upper limit setting mode is the secondary DC voltage V dc2 is the upper threshold V PWM_H When the primary side DC voltage command upper limit V dc1_ave_H is the primary side DC voltage average command value V to AC / DC converter 2. dc1_ave_ref Set as.

[0111] [4] The primary DC voltage average reference value setting mode is the secondary DC voltage V dc2 is the lower threshold V PWM_L and above the upper threshold V PWM_H If the secondary DC voltage reference value V is less than dc2_base and the secondary DC voltage V dc2 The primary side DC voltage command reference value V dc1_ave_base is the primary side DC voltage average command value V to AC / DC converter 2. dc1_ave_ref Set as.

[0112] [5] The primary DC voltage average command lower limit setting mode is the secondary DC voltage V dc2 is the lower threshold V PWM_L If the primary DC voltage command lower limit V is less than dc1_ave_L is the primary side DC voltage average command value V to AC / DC converter 2. dc1_ave_ref Set as.

[0113] Below, we will explain each functional unit of the control decision unit 80 (multiplication unit 81, division unit 82, multiplication unit 83, limiter 84, upper limit hysteresis comparator 85, lower limit hysteresis comparator 86, first switch 87, second switch 88, and NOR unit 89).

[0114] The multiplication unit 81 calculates the secondary side DC voltage reference value V dc2_base (transformer turns ratio N tr) / (Number of series connections of the secondary side DC terminal of cell 1c (power conversion device) N si )

[0115] The division unit 82 calculates the primary side DC voltage command reference value V dc1_ave_base The output value of the multiplication unit 81 is divided by the

[0116] The multiplication unit 83 multiplies the output value of the division unit 82 by the secondary side DC voltage V dc2 Multiply by.

[0117] The limiter 84 limits the upper and lower limits of the output value of the multiplication unit 83, as in the first embodiment.

[0118] The upper limit hysteresis comparator 85 detects the secondary DC voltage V dc2 and the upper threshold V PWM_H DAB control upper limit flag PS flg_H Determine.

[0119] The lower limit hysteresis comparator 86 detects the secondary DC voltage V dc2 and the lower threshold V PWM_L DAB control lower limit flag PS flg_L Determine.

[0120] The first switch 87 switches the determined DAB control upper limit flag PS flg_H Based on the primary side DC voltage command upper limit V dc1_ave_H , primary side DC voltage command reference value V dc1_ave_base , primary side DC voltage command lower limit V dc1_ave_L Switch to one of the following.

[0121] The second switch 88 switches the determined DAB control flag PS flg_L Based on the primary side DC voltage command lower limit V dc1_ave_L Or the primary side DC voltage command upper limit value V from the first switch 87 dc1_ave_H or primary side DC voltage command reference value V dc1_ave_base Switch to.

[0122] The NOR unit 89 calculates the DAB control upper limit flag PS flg_H and DAB control lower limit flag PS flg_L If there is no decision, the DAB control flag PS flg Output.

[0123] A specific example of the operation of the third embodiment will be described with reference to the same figure.

[0124] The upper limit hysteresis comparator 85 and the lower limit hysteresis comparator 86 are connected to the secondary side DC voltage V dc2 and two upper thresholds V PWM_H , lower threshold V PWM_L The control switches between ACDC control and DAB control depending on the magnitude relationship between the two.

[0125] Upper threshold V PWM_H , lower threshold V PWM_L is the primary side DC voltage V dc1 The upper limit V dc1_ave_H and the lower limit V dc1_ave_L , transformer turns ratio N tr and the number of series connections of the secondary side DC terminals of cell 1c (power conversion device) N si Based on this, it is calculated using the following formulas (4) and (5).

[0126]

number

[0127] V PWM_H :Upper threshold V dc1_ave_H : Primary side DC voltage V dc1 Upper limit of N si : Number of series connections of secondary side DC terminals of cell 1c (power converter) N tr : Transformer turns ratio

[0128]

number

[0129] V PWM_L:Lower threshold V dc1_ave_L : Primary side DC voltage V dc1 Lower limit of N si : Number of series connections of secondary side DC terminals of cell 1c (power converter) N tr : Transformer turns ratio

[0130] Primary side DC voltage V dc1 The lower limit V dc1_ave_L is set to a voltage value that does not cause overmodulation due to grid current control, and the primary side DC voltage V dc1 The upper limit V dc1_ave_H is set to a voltage value that is below the breakdown voltage of the semiconductor element, taking surges into consideration.

[0131] Then, as shown in Figures (a) and (b), the secondary DC voltage V dc2 and two thresholds V PWM_H , V PWM_L The DAB control flag PS flg and the primary side DC voltage average command value V dc1_ave_ref is determined.

[0132] That is, the upper limit hysteresis comparator 85 detects the secondary DC voltage V dc2 ≧Upper threshold V PWM_H If it is determined that the DAB signal is flg_H =1, PS flg_L = 0). Then, the primary side DC voltage average command value V dc1_ave_ref The first switch 87 switches to [3] primary side DC voltage average command upper limit value setting mode, and the primary side DC voltage command upper limit value V dc1_ave_H is set to

[0133] On the other hand, the upper limit hysteresis comparator 85 and the lower limit hysteresis comparator 86 determine the lower limit threshold V PWM_L ≦Secondary DC voltage V dc2 <Upper threshold V PWM_H If it is determined that the DAB control is flg_H =0, PS flg_L= 0). Then, the primary side DC voltage average command value V dc1_ave_ref The first switch 87 switches to (4) primary side DC voltage average reference value setting mode, and the primary side DC voltage average command reference value V dc1_ave_base Based on this, the following equation (6) is set.

[0134]

number

[0135] V dc1_ave_ref : Primary side DC voltage average command value V dc1_ave_base : Primary side DC voltage average command reference value V dc2_base : Reference value of secondary DC voltage N tr : Transformer turns ratio N si : Number of series connections of secondary side DC terminals of cell 1c (power converter) V dc2 : Secondary DC voltage

[0136] Secondary DC voltage reference value V dc2_base is the secondary DC voltage V dc2 is the reference value of the secondary DC voltage V that is the desired maximum efficiency condition. dc2 Set to.

[0137] In addition, the lower limit hysteresis comparator 86 detects the secondary DC voltage V dc2 < Threshold V PWM_L If it is determined that the DAB control is flg_H =0, PS flg_L = 1). Then, the primary side DC voltage average command value V dc1_ave_ref The second switch 88 switches to (5) primary side DC voltage average command lower limit value setting mode, and the primary side DC voltage average command value V dc1_ave_ref is the primary side DC voltage command lower limit V dc1_ave_L is set to

[0138] The DAB method uses a secondary DC voltage reference value V dc2_base to secondary DC voltage V dc2 When the current changes, the efficiency decreases. Therefore, in this embodiment, when driven at maximum current under high voltage conditions, the loss increases compared to low voltage conditions, and the cooling equipment becomes larger. This embodiment is advantageous for devices with constant power operation (CP) in the high voltage range.

[0139] According to the third embodiment, the secondary DC voltage reference value V dc2_base Since the range of change is the smallest with respect to the maximum and minimum voltages, the efficiency drop at maximum and minimum voltages is small. However, since losses are large in the high voltage and large current range, a high efficiency improvement effect can be expected in specifications that operate at constant power, limiting the current in the high voltage range. Furthermore, compared to other embodiments, this embodiment has a large minimum pulse width because the minimum pulse width is proportional to the difference between the reference value and the maximum and minimum voltages. Therefore, this embodiment can be implemented using an inexpensive controller with a low clock frequency (poor resolution). [Explanation of symbols]

[0140] 1...SST circuit, 1c...cell (power conversion device), 1u...unit 2...AC / DC converter 3...Bidirectional isolated DC / DC converter, 301...Primary side inverter, 302...Primary side inverter Tr...transformer 10...Control device 20... ACDC control unit, 21... average voltage control unit, 22... system current control unit, 23... dq inverter, 24... intra-phase balance control unit 30...DAB control unit, 31...current command generation unit, 32...balance control unit, 33...adder unit, 34...current control unit, 51...PI control unit, 52...phase control unit, 53...pulse width and phase control unit, 54...control determination unit, 55...multiplexer, 56...high-pass filter, 57...adder, 58...subtractor 61... multiplication unit, 62... divider, 63... multiplier, 64... limiter, 65... hysteresis comparator, 66... ​​switch 70...Switching frequency calculation unit, 71...Divider, 72...Multiplier, 73...Limiter, 74...Switch 80...control determination unit, 81...multiplication unit, 82...division unit, 83...multiplication unit, 84...limiter, 85...upper limit hysteresis comparator, 86...lower limit hysteresis comparator, 87...first switch, 88...second switch, 89...NOR unit

Claims

1. 1. A power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, a current control unit that outputs a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, for achieving a secondary-side DC current command value to the bidirectional isolated DC / DC converter based on a primary-side DC voltage from the AC / DC converter when a secondary-side DC voltage is equal to or higher than a threshold value, and that outputs a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, for achieving the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage when the secondary-side DC voltage is less than the threshold value, the current control unit sets a primary side DC voltage command reference value corrected based on the threshold value and the secondary side DC voltage as a primary side DC voltage average command value to the AC / DC converter when the secondary side DC voltage is equal to or higher than the threshold value, and sets a primary side DC voltage command lower limit value as the primary side DC voltage average command value when the secondary side DC voltage is less than the threshold value.

2. 2. The power conversion device according to claim 1, wherein the control determination unit further comprises a switching frequency calculation unit that sets a command value of a switching frequency of the bidirectional isolated DC / DC converter to a reference value when the secondary-side DC voltage is equal to or higher than the threshold value, and that sets the command value based on the secondary-side DC voltage when the secondary-side DC voltage is less than the threshold value.

3. 1. A power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, a current control unit that outputs a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, for achieving a secondary-side DC current command value to the bidirectional isolated DC / DC converter, based on a primary-side DC voltage from the AC / DC converter, when a secondary-side DC voltage is equal to or greater than a lower-limit threshold and less than an upper-limit threshold, and that outputs a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, for achieving the secondary-side DC current command value, based on the primary-side DC voltage and the secondary-side DC voltage, when the secondary-side DC voltage is less than a lower-limit threshold or equal to or greater than an upper-limit threshold, the current control unit sets a primary side DC voltage command upper limit value as a primary side DC voltage average command value to the AC / DC converter when the secondary side DC voltage is equal to or greater than an upper limit threshold, sets a primary side DC voltage command reference value corrected on the basis of a secondary side DC voltage reference value and the secondary side DC voltage as the primary side DC voltage average command value when the secondary side DC voltage is equal to or greater than a lower limit threshold and less than an upper limit threshold, and sets a primary side DC voltage command lower limit value as the primary side DC voltage average command value when the secondary side DC voltage is less than a lower limit threshold.

4. The power conversion device according to claim 1 , wherein the threshold value is expressed by the following formula (1): [Equation 1] V ＰＷＭ＿Ｈ : threshold V ｄｃ１＿ａｖｅ＿Ｌ : Lower limit of primary DC voltage N ｓｉ : Number of series connections of the DC terminals on the secondary side of the power converter N ｔｒ : Transformer turns ratio of bidirectional isolated DC / DC converter

5. 3. The power conversion device according to claim 2, wherein the switching frequency set based on the secondary side DC voltage is expressed by the following equation (3): [Equation 3] f ｓｗ＿ＤＡＢ : switching frequency V ｄｃ２ : Secondary DC voltage V ｄｃ２＿ｂａｓｅ : Secondary DC voltage reference value f ｓｗ＿ｂａｓｅ : Switching frequency reference value

6. 4. The power conversion device according to claim 3, wherein the upper limit threshold is expressed by the following formula (4), and the lower limit threshold is expressed by the following formula (5). [Equation 4] V ＰＷＭ＿Ｈ : Upper threshold V ｄｃ１＿ａｖｅ＿Ｈ : Upper limit of primary DC voltage N ｓｉ : Number of series connections of the DC terminals on the secondary side of the power converter N ｔｒ : Transformer turns ratio of bidirectional isolated DC / DC converter [Equation 5] V ＰＷＭ＿Ｌ : Lower threshold V ｄｃ１＿ａｖｅ＿Ｌ : Lower limit of primary DC voltage N ｔｒ : Transformer turns ratio of bidirectional isolated DC / DC converter N ｓｉ : Number of series connections of the DC terminals on the secondary side of the power converter

7. A control method for a power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, comprising: a current control process for outputting a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, for achieving a secondary-side DC current command value to the bidirectional isolated DC / DC converter based on a primary-side DC voltage from the AC / DC converter when the secondary-side DC voltage is equal to or higher than a threshold value, and for outputting a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, for achieving the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage when the secondary-side DC voltage is lower than the threshold value, the current control step further comprises a control decision step of setting a primary side DC voltage command reference value corrected based on the threshold value and the secondary side DC voltage as a primary side DC voltage average command value to the AC / DC converter when the secondary side DC voltage is equal to or greater than the threshold value, and setting a primary side DC voltage command lower limit value as the primary side DC voltage average command value when the secondary side DC voltage is less than the threshold value.

8. A control method for a power conversion device including a bidirectional isolated DC / DC converter connected to an AC / DC converter, comprising: a current control process for outputting a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, for achieving a secondary-side DC current command value to the bidirectional isolated DC / DC converter based on a primary-side DC voltage from the AC / DC converter when the secondary-side DC voltage is equal to or greater than a lower-limit threshold and less than an upper-limit threshold, and for outputting a primary-side pulse width and a secondary-side pulse width, and a phase difference thereof, for achieving the secondary-side DC current command value based on the primary-side DC voltage and the secondary-side DC voltage when the secondary-side DC voltage is less than a lower-limit threshold or equal to or greater than an upper-limit threshold, the current control step further comprises a control decision step of setting a primary side DC voltage command upper limit value as a primary side DC voltage average command value to the AC / DC converter when the secondary side DC voltage is equal to or greater than an upper limit threshold, setting a primary side DC voltage command reference value corrected based on a secondary side DC voltage reference value and the secondary side DC voltage as the primary side DC voltage average command value when the secondary side DC voltage is equal to or greater than a lower limit threshold and less than an upper limit value, and setting a primary side DC voltage command lower limit value as the primary side DC voltage average command value when the secondary side DC voltage is less than a lower limit threshold.

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