Wafer-Level Signature Grouping Using Transfer Learning

Abstract

The wafer map is classified using a machine learning-based model and signatures on the wafer map. The machine learning-based model uses transfer learning. The machine learning-based model can be trained using extracted and augmented images from various sources and their extracted features. The extracted features can be classified into defects occurring during semiconductor manufacturing.

Description

[Technical Field]

[0001] This disclosure relates to semiconductor manufacturing [Background technology]

[0002] [CROSS-REFERENCE TO RELATED APPLICATIONS] This application claims priority to Indian Patent Application No. 202041036573, filed August 25, 2020, and U.S. Provisional Patent Application No. 63 / 089036, filed October 8, 2020, the disclosures of which are incorporated herein by reference.

[0003] As the semiconductor manufacturing industry evolves, the demands on yield management, particularly metrology and inspection systems, are increasing. As critical dimensions continue to shrink, the industry is under pressure to achieve high yields and high-value production in shorter periods of time. Reducing the total time between detecting a yield problem and correcting it increases the return on investment for semiconductor manufacturers.

[0004] In the fabrication of semiconductor devices, such as logic and memory devices, semiconductor wafers are typically processed using a number of manufacturing processes to form the various features and multiple levels of the semiconductor devices. For example, in a semiconductor manufacturing process known as lithography, a pattern is transferred from a reticle onto a photoresist disposed on the semiconductor wafer. Further examples of semiconductor manufacturing processes include, but are not limited to, chemical mechanical polishing (CMP), etching, deposition, and ion implantation.

[0005] Most monolithic integrated circuits are fabricated in batches of devices on wafers. Having many such devices on a single wafer makes them easier to handle and reduces manufacturing costs. The functional elements within each device tend to be extremely small and therefore easily damaged. For example, particulate matter, whether gas- or liquid-borne, can be fatal to the device. Any particle that lands on the wafer's surface, if not removed in a timely manner, can disrupt the manufacturing process and cause the device to malfunction. Similarly, scratches or other physical disturbances to the desired manufacturing process can also cause device malfunctions.

[0006] Because identifying and, where possible, correcting the causes of these physical anomalies (e.g., defects) is very important, wafers typically undergo physical inspection at various stages of the manufacturing cycle. The inspection system attempts to determine not only the type of defect (e.g., scratch or grain) but also the source of the defect. Often, the type of defect and the pattern of the defect can provide clues as to the source of the defect. Typically, this inspection is performed manually by a trained technician or engineer who examines one or more of the wafers under some type of microscope, looks for defects, and attempts to experimentally identify their source.

[0007] Manual inspection of individual wafers is cumbersome and can produce inaccurate and inconsistent results due to fatigue, inexperience, and carelessness. Manual inspection is also impractical in a manufacturing setting due to the large number of wafers involved. Spatial signature analysis provides the ability to automatically track problems in integrated circuit wafer processing. Spatial signature analysis can be performed on wafers at various stages of the manufacturing process to detect specific patterns of defects on them. The identified patterns can be mapped to the various processes the wafer underwent. For example, defects in the CMP process can produce long, curved scratches. In such cases, process issues can be automatically detected without relying on detailed inspection of a subset of microscopic defects, which typically requires scanning electron microscope review. This, in turn, leads to faster corrective action, improved yield, and increased profits.

[0008] Unfortunately, spatial signature analysis has been an inflexible process, often prone to over-analyzing defects individually and repetitively, and can fail to recognize defect patterns that may be present. That is, spatial signature analysis typically has problems with defect characterization, tends to be very time-consuming, and cannot be extended or reconfigured beyond its originally implemented capabilities and parameters.

[0009] In conventional systems, parametric rules are used in conjunction with wafer signatures. In some conventional pixel-level signature analysis platforms, signature detection is achieved by setting up a set of parametric rules or by using pattern templates. The parametric search is limited to basic, mathematically describable shapes. The construction of independent rules for each shape leads to overfitting and missed detections. In addition, most process signatures cannot be defined using simple rules such as lines, arcs, and circles. Complex shapes are addressed using template searches, but they are constrained by user-defined templates. Significant signatures have wide variations in shape, size, density, and completeness. These conventional parametric rules delay the detection of impacted wafers and any root cause analysis, thereby reducing yields for semiconductor manufacturers. [Prior art documents] [Patent documents]

[0010] [Patent Document 1] US Patent Application Publication No. 2017 / 0193400 [Non-patent literature]

[0011] [Non-Patent Document 1] “Very Deep Convolutional Networks for Large-Scale Image Recognition,” by Simonyan et al., ICLR 2015 Summary of the Invention [Problem to be solved by the invention]

[0012] Therefore, there is a need for improved methods and systems. [Means for solving the problem]

[0013] In a first embodiment, a method is provided in which a processor receives a wafer map, particularly a wafer map relating to the surface of an entire wafer. The processor is configured to execute a machine learning-based model to classify the wafer map. The wafer map is classified using the machine learning-based model and signatures on the wafer map. The machine learning-based model uses transfer learning.

[0014] The method may further determine a confidence level for the classification, where the confidence level is based on the criticality of the defects in the signature.

[0015] The method can also send an alert if the signature is outside of a confidence level.

[0016] The method can further include receiving a plurality of specimen wafer maps at a processor, classifying the specimen wafer maps based on defect root causes using a processor, and generating a library of specimen signatures from the specimen wafer maps using a processor. According to some examples, the method can include extracting images from the plurality of defect maps, binsort maps, and / or metrics maps using a processor, and augmenting the images using a processor. In some examples, features extracted from the images are used in training a machine learning-based model.

[0017] In this method, wafer maps can also be grouped together with wafer maps that have the same classification.

[0018] In a second embodiment, a system is provided. The system includes a semiconductor wafer inspection system and a processor in electronic communication with the semiconductor wafer inspection system. The processor is configured to receive a wafer map and classify the wafer map using a machine learning-based model and signatures on the wafer map. The wafer map may relate to an entire surface of a wafer. The processor is configured to execute the machine learning-based model to classify the wafer map. The machine learning-based model uses transfer learning.

[0019] The semiconductor wafer inspection system may include a light source or an electron beam source.

[0020] A wafer map can also be generated in a semiconductor wafer inspection system.

[0021] The processor may be further configured to determine a confidence level for the classification, which may be based on the severity of the defects in the signature.

[0022] The processor may further be configured to send an alert if the signature is outside the confidence level.

[0023] The processor may be further configured to receive the plurality of specimen wafer maps, classify the specimen wafer maps based on defect root causes, and generate a library of specimen signatures from the specimen wafer maps. In some examples, the processor is further configured to extract images from the plurality of defect maps, binsort maps, and / or metrology maps and augment the images. In some examples, the processor is further configured to train a machine learning-based model using features extracted from the images.

[0024] The processor may further be configured to group the wafer maps together with wafer maps having the same classification.

[0025] In a third embodiment, a non-transitory computer-readable storage medium is provided, the non-transitory computer-readable storage medium comprising one or more programs for executing the following steps on one or more information processing devices: A wafer map is classified using a machine learning-based model and signatures on the wafer map; the machine learning-based model uses transfer learning; and the wafer map is for the entire wafer surface.

[0026] The steps may further include receiving a plurality of sample wafer maps, classifying the sample wafer maps based on root causes of the defects, and generating a library of sample signatures from the sample wafer maps.

[0027] The steps may further include extracting images from a plurality of defect maps, binsort maps and / or metric maps, and augmenting the images.

[0028] These steps may further include training a machine learning-based model using features extracted from the images.

[0029] For a more complete understanding of the nature and purpose of the present disclosure, reference should be made to the accompanying drawings in conjunction with the detailed description below. [Brief explanation of the drawings]

[0030] [Figure 1] 1 is a flowchart of an operation according to the present disclosure. [Figure 2] FIG. 1 is a diagram illustrating an example of a signature classification. [Figure 3] 1 is a flowchart of a signature classification according to the present disclosure. [Figure 4] FIG. 10 is a diagram showing an example of a signature related to a wafer handling problem. [Figure 5] FIG. 10 is a diagram illustrating an example of a signature related to a CMP issue. [Figure 6] 10A and 10B are diagrams illustrating other example signatures relating to various semiconductor manufacturing issues. [Figure 7] 1 is a flowchart of one embodiment of a method according to the present disclosure. [Figure 8] FIG. 1 illustrates one embodiment of a system according to the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0031] Although certain embodiments describe the claimed subject matter, other embodiments exist within the scope of this disclosure, including embodiments that do not provide all of the benefits and features described herein. Various structural, logical, process step, and electronic changes may be made without departing from the scope of this disclosure. Accordingly, the scope of this disclosure is determined solely by reference to the appended claims.

[0032] Transfer learning and machine learning can be used to automatically classify wafer signatures at the wafer level. Wafer map signatures are informative to semiconductor manufacturers because they aid in root cause analysis. Figure 4 shows an example signature for a wafer handling issue, which shows three impact points. Figure 5 shows an example signature for a CMP issue, which shows a long, arc-shaped scratch. Figure 6 illustrates other example signatures for various semiconductor manufacturing issues. Each of these examples has a distinct origin, and quickly identifying the signature on the wafer can help identify the root cause of the problem.

[0033] Existing applications are manual or cumbersome to use, and are unsatisfactory, especially given a distribution of signature shapes that fall under a single class. Transfer learning can be used to classify multi-label, multi-class signatures on wafer maps. This is useful when new signatures of variability are introduced because retraining tends to be quick and requires little information processing power.

[0034] FIG. 7 illustrates one embodiment of method 100. A processor may be used for some or all of the steps of method 100. At 101, a wafer map is received by the processor. The wafer map pertains to the surface of the entire wafer, as shown in the examples of FIGS. 4-6. The surface may be a flat surface of the wafer or a surface on the wafer that contains devices (e.g., dies or integrated circuits). The processor is configured to classify the wafer map by executing a machine learning-based model.

[0035] At 102, the wafer map is classified using a machine learning-based model and the signatures on the wafer map. The machine learning-based model uses transfer learning. The wafer signatures can be useful to semiconductor manufacturers. They can be used to find the root cause of the error. Early detection of the root cause means fewer wafers are scrapped, which increases yield for semiconductor manufacturers. Automated processing and quantification of the signatures also allows semiconductor manufacturers to respond faster to inline excursions and perform root cause analysis.

[0036] In the embodiment shown in Figure 3, specimen wafer maps are received. These specimen wafer maps are classified based on the root cause of the defects. For example, an example of a signature classification is depicted in Figure 2. A library of specimen signatures is generated from the specimen wafer maps, as shown in Figure 3. A machine learning-based model can be trained using features extracted from these images.

[0037] In the embodiment of Figure 3, images are extracted from a defect map, a binsort map, and / or a metrology map. A defect map is a wafer map showing the locations of detected defects. A binsort map is a wafer map showing the pass / fail status of dies within the wafer. A metrology map is a wafer map showing the results of characteristic measurements of actual features within the wafer or dedicated target marks located within the wafer. These images can then be augmented.

[0038] Extraction can be performed. A deep neural network can be trained to map images to classes. Intermediate layers of the deep neural network can provide an abstract representation of the image. During extraction, the image is processed and features are extracted from the output of the intermediate layers. If the deep neural network used to generate the features has been trained on a different image dataset, transfer learning is performed.

[0039] Augmentation can be performed, in which a larger image dataset is created by transforming a set of original images (i.e., a small dataset) in such a way that the original images can be considered separate instances, but the images are not transformed enough to be considered part of an entirely separate dataset.

[0040] The flowchart of FIG. 1 is used to further illustrate the embodiment of FIG. 3. Features are extracted from the augmented images. These features are then classified and added to a library of specimen signatures. A user can validate and / or retrain the machine learning-based model based on examples in the specimen signature library. Manual classification can be used to provide ground truth. For example, a semiconductor manufacturer can classify one or two examples and then let the machine learning-based model determine the rest. In the example of FIG. 1, images are classified into classes A through n. The machine learning-based model can be used to examine trends, track defect sources, and monitor production. The machine learning-based model can also look for complex signatures associated with specific wafer processing steps or tools.

[0041] Embodiments of method 100 address the set of signatures found in semiconductor manufacturing environments that may impact yield loss due to wafer scrap. Because the input is an image rather than data, it is possible to classify signature classes that cannot be determined using existing methods.

[0042] According to one example, a confidence level for the classification can be determined. The confidence level can be based on the severity of the defects in the signature. Deviations from the confidence level can be monitored. For example, an alert can be sent if the signature falls outside the confidence level. The confidence index allows semiconductor manufacturers to control the purity of the signature bins based on their severity.

[0043] According to one example, wafer maps can be grouped together with wafer maps that have the same classification. Signatures can be grouped together systematically based on their variability in shape, size, and morphology.

[0044] Transfer learning can be used in conjunction with machine learning-based models. Transfer learning is a machine learning technique in which a model trained for one task is repurposed for a second, related task. Transfer learning can speed progress or improve performance when modeling the second task.

[0045] The disclosed embodiments enable automated wafer-level signature analysis using a combination of transfer learning and deep learning techniques. In one prototype, signature classes were detected with over 80% precision and recall based on initial analysis. In one example, approximately 3,000 production wafers were analyzed. The purity of the signature classes can be controlled by a confidence matrix. The disclosed embodiments can be applied to semiconductor manufacturing across wafers, layers, and devices. Tool stability can be monitored over time.

[0046] When training a model to detect CMP issues on wafers, it is possible to use a model trained on a similar domain (e.g., wafer handling issues). These types of signatures are shown in Figures 4 and 5. However, in practice, performance may degrade or collapse due to the model inheriting biases from its training data and not knowing how to generalize to the new domain. Existing models cannot be reused when training a model to perform a new task, such as detecting etch defects, because the labels for those tasks differ.

[0047] In fact, it can be beneficial to transfer a moderate amount of knowledge from the source setting to the target task or domain. This knowledge can take many forms, depending on the data. For example, it could be about how to organize objects for the identification of new objects.

[0048] Transfer learning can handle these scenarios by leveraging existing labeled data from some related task or domain. This knowledge, gained by solving the source task in the source domain, can be stored and applied to these new wafer signatures.

[0049] Transfer learning can be broadly defined as improving learning in a new task (or target task) through the transfer of knowledge from related tasks (one or more source tasks) that have already been learned. In the embodiments described herein, learning of one or more source tasks is achieved by training a machine learning-based model with only nominal examples, and knowledge is transferred from the source tasks to the target task (non-nominal examples) when the machine learning-based model is retrained with non-nominal examples. In transfer learning, the agent learns about a source task without knowledge of the target task (or even the likelihood of the target task). For example, in the embodiments described herein, the machine learning-based model is trained with previous data without knowledge of new signatures. However, in general, transfer learning as described herein can be performed according to any suitable method known in the art.

[0050] Inductive transfer can be viewed not only as a way to improve learning in standard supervised learning tasks, but also as a way to offset the challenges posed by tasks involving relatively small data sets. That is, when a task has a relatively small amount of data or class labels, treating that task as a target task and performing inductive transfer from a related source task can lead to a more accurate model. In this approach, source task data can be used to augment target task data, despite the fact that the two datasets are assumed to come from different probability distributions. Transfer learning as described herein can be further performed as described in U.S. Patent No. 6,249,999, which is incorporated by reference and deemed to be fully disclosed herein. The embodiments described herein can be further configured as described in U.S. Patent No. 6,249,999, and any related references disclosed herein.

[0051] The retraining (and training) architecture used by the embodiments described herein can be designed to converge to the ground truth (that of the validation samples) with a minimum number of samples. In some embodiments, the one or more components include one or more additional components, and the retraining is performed using the one or more additional components. The one or more additional components can include a mother network common to all layers of the samples, a grandmother network common to all layers of the samples, or other components. For example, the machine learning-based models can be trained by applying a transfer learning method to training set(s) generated using one of the transfer learning training input generation methods described herein.

[0052] According to one example, a deep neural network (e.g., a VGG19 deep neural network) can be used to extract feature vectors from the wafer map. The deep neural network can be followed by a series of logistic regression models to perform classification. The deep neural network can be a machine learning-based model.

[0053] Broadly speaking, "deep learning" (also known as deep structured learning, hierarchical learning, or deep learning) is a branch of machine learning that relies on a set of algorithms that attempt to model highly abstract concepts in data. In a simple case, there might be two sets of layers: one that receives input signals and one that sends output signals. The input layer receives an input and passes a modified version of that input to the next layer. Because deep networks have many layers between the input and output, the algorithm can use multiple processing layers, consisting of multiple linear and nonlinear transformations.

[0054] Deep learning is a member of a growing family of machine learning methods that rely on learning data representations. Observations (e.g., images) can be represented in many ways, such as a vector of pixel-by-pixel intensity values, or more abstractly as a set of edges, regions of particular shapes, etc. Some representations are superior to others in simplifying the learning task (e.g., face recognition or facial expression recognition). One of the promises of deep learning is the replacement of handcrafted features with efficient algorithms for unsupervised or semi-supervised feature learning and hierarchical feature extraction.

[0055] Research in this area attempts to create better representations and to generate models that can learn these representations from large amounts of unlabeled data. Some of these representations are inspired by advances in neuroscience and are loosely based on neural coding, which attempts to interpret information processing and communication patterns in the nervous system, such as determining the relationship between various stimuli and the associated neuronal responses in the brain.

[0056] In certain embodiments, a deep learning model is a generative model. A "generative" model can generally be defined as a model that is probabilistic in nature. A generative model can be trained (in which its parameters can be learned) based on an appropriate training dataset. In some embodiments, a deep learning model is configured as a deep generative model. For example, the model can be configured to have a deep learning architecture, i.e., the model can have multiple layers that perform multiple algorithms or transformations.

[0057] In another embodiment, the deep learning model is configured as a neural network. According to a further embodiment, the deep learning model can be a set of deep neural networks with weights that model the world according to the data provided to train the deep learning model. A neural network can be generally defined as an information processing method that relies on a relatively large population of neural units that loosely model the way a biological brain solves problems with relatively large clusters of biological neurons connected by axons. Because each neural unit is connected to many other neural units, the links can enhance or suppress their influence on the activation states of the neural units to which they are connected. These systems are self-learning and trained rather than explicitly programmed, and excel in areas where traditional computer programs have difficulty providing solutions or feature detection strategies.

[0058] A neural network typically consists of multiple layers, with signal paths running from front to back. The goal of a neural network is to solve problems in the same way that a human brain would, although some neural networks are quite abstract. Modern neural network projects typically involve thousands to millions of neural units and millions of connections. Neural networks can have any suitable architecture and / or configuration known in the art.

[0059] In some embodiments, the information incorporates a classification of defects detected on the specimen. In one such embodiment, the deep learning model is configured as an AlexNet. For example, AlexNet can have multiple convolutional layers (e.g., 5 layers) followed by multiple fully connected layers (e.g., 3 layers) that are jointly configured and trained to classify images.

[0060] In another such embodiment, the deep learning model is configured as GoogLeNet. For example, GoogLeNet can incorporate convolutional layers, pooling layers, fully connected layers, and the like, such as those described herein, configured and trained to classify images. The GoogLeNet architecture can have a relatively large number of layers, some of which can operate in parallel, and a collection of layers working in parallel with each other is generally referred to as an Inception module. Other layers can operate sequentially. Thus, GoogLeNet differs from other neural networks described herein in that not all layers are arranged in a sequential structure.

[0061] In further such embodiments, the deep learning model is configured as a VGG network. For example, a VGG network is created by increasing the number of convolutional layers while keeping other parameters of its architecture fixed. Adding convolutional layers can increase the depth, and this can be done by using sufficiently small convolutional filters in all of those layers. Like other neural networks described herein, a VGG network is created and trained to classify images. A VGG network also has a convolutional layer followed by a fully connected layer. An example of a neural network configured as a VGG is described in "Non-Patent Document 1," which is incorporated by reference and deemed to be fully described herein. The deep learning model described herein can be further configured as described in this non-patent document.

[0062] In one such embodiment, the deep learning model is configured as a deep residual network. For example, like some other networks described herein, a deep residual network can have convolutional layers followed by fully connected layers, which can be jointly configured and trained for image classification. In a deep residual network, layers are configured to learn a residual function by referencing the layer inputs instead of learning a non-reference function. Specifically, instead of expecting each of several stacked layers to directly fit a desired underlying mapping, the layers can be explicitly fit to the residual mapping, and this is achieved by a feedforward neural network with shortcut connections. A shortcut connection is a connection or connection that skips one or more layers. A deep residual network can be created by taking a plain neural network structure with convolutional layers and inserting shortcut connections to transform the plain neural network into a residual-learning version of it.

[0063] In further such embodiments, the deep learning model includes one or more fully connected layers configured to classify defects on the specimen. A "fully connected layer" can be generally defined as a layer in which each node is connected to each node in the previous layer. The fully connected layer(s) can perform classification based on features extracted by the convolutional layer(s), such as those configured as described herein. The fully connected layer(s) can be configured for feature selection and classification. In other words, the fully connected layer(s) select features from the feature map and further analyze defects in the image(s) based on the selected features. The selected features can include all of the features in the feature map (if appropriate) or only some of the features in the feature map.

[0064] When the deep learning model outputs classifications for defects detected on the specimen, the deep learning model may output image classifications, which may include classifications for each image along with a confidence level for each classification. The image classifications may also be used as described herein. The image classifications may have any suitable format (e.g., image or defect ID, defect description such as "pattern," "bridge," etc.). The image classifications may be stored and used as described herein.

[0065] In some embodiments, the information determined by the deep learning model includes image features extracted by the deep learning model. In some such embodiments, the deep learning model includes one or more convolutional layers. The convolutional layer(s) may have any suitable configuration known in the art, and are generally configured to identify image features as a function of location on the image (i.e., a feature map) by applying a convolutional function to an input image using one or more filters. In this manner, the deep learning model (or at least a portion of the deep learning model) may be configured as a convolutional neural network (CNN). For example, the deep learning model may be configured as a CNN, typically a stack of convolutional and pooling layers, enabling local feature extraction. The described embodiments take advantage of deep learning concepts, such as CNNs, to solve typically intractable representation inversion problems. The deep learning model may have any CNN configuration or architecture known in the art. The one or more pooling layers may have any suitable configuration known in the art (e.g., a maximal pooling layer), and are generally configured to reduce the dimensionality of the feature maps generated by the one or more convolutional layers while preserving the most important features.

[0066] The features identified by the deep learning model can include any suitable feature described herein or known in the art that can be inferred from the inputs described herein (and potentially used to generate the outputs described herein). For example, the features can include vectors of intensity values ​​per pixel. The features can also include any other type of feature described herein, such as a vector of scalar values, a vector of independent distributions, a joint distribution, or any other type of feature known in the art that is suitable.

[0067] In general, the deep learning models described herein are trained deep learning models. For example, a deep learning model on which one or more diagnostic functions are performed may have been previously trained using one or more other systems and / or methods. Additionally, the one or more diagnostic functions may be performed on the deep learning model after the deep learning model has been trained using one or more of the embodiments described herein. In this manner, the diagnostic functions described herein are distinct from deep learning model characterizations performed during training of the deep learning model; in the embodiments described herein, the deep learning model is previously generated and trained, and the model's functions are determined as described herein and then used to perform one or more additional functions on the deep learning model.

[0068] One embodiment of system 200 is shown in FIG. 8. System 200 includes an optical-based subsystem 201. Generally, optical-based subsystem 201 is configured to direct light at (or scan light over) a sample 202 and detect light from the sample 202 to generate an optical-based output related to the sample 202. In one embodiment, sample 202 includes a wafer. The wafer may include any wafer known in the art. In another embodiment, the sample includes a reticle. The reticle may include any reticle known in the art.

[0069] In the embodiment of system 200 shown in FIG. 8, an optically-based subsystem 201 includes an illumination subsystem configured to direct light to sample 202. The illumination subsystem includes at least one light source. For example, as shown in FIG. 8, the illumination subsystem includes light source 203. According to certain embodiments, the illumination subsystem is configured to direct light to sample 202 at one or more angles of incidence, including one or more oblique angles and / or one or more perpendicular angles. For example, as shown in FIG. 8, light from light source 203 is directed through optical element 204 and then lens 205 to sample 202 at an oblique angle of incidence. The oblique angle of incidence can include any suitable oblique angle of incidence and can vary depending, for example, on the characteristics of sample 202.

[0070] The optical-based subsystem 201 can also be configured to direct light to the sample 202 at different angles of incidence at different times. For example, the optical-based subsystem 201 can be configured to direct light to the sample 202 at angles of incidence different from that shown in Figure 8 by varying one or more properties of one or more elements included in the illumination subsystem. According to one such example, the optical-based subsystem 201 can be configured to move the light source 203, the optical element 204, and the lens 205, thereby directing light to the sample 202 at different oblique or orthogonal (or near-orthogonal) angles of incidence.

[0071] According to some examples, the optical-based subsystem 201 can be configured to simultaneously direct light at multiple angles of incidence toward the sample 202. For example, the illumination subsystem can include multiple illumination channels, one of which can include the light source 203, optical element 204, and lens 205 shown in FIG. 8, and another of which (not shown) can include similar elements or be otherwise similarly configured, or can include at least one light source and possibly one or more other components, such as those described herein. When such light is simultaneously directed toward the sample with other light, the light directed toward the sample 202 at different angles of incidence can have one or more different characteristics (e.g., wavelength, polarization, etc.) so that the light resulting from illumination of the sample 202 at the different angles of incidence can be distinguished from one another by the detector(s).

[0072] In some other examples, the illumination subsystem may include only one light source (e.g., light source 203 shown in FIG. 8 ), and the light from the light source may be split into separate optical paths (e.g., based on wavelength, polarization, etc.) by one or more optical elements (not shown) in the illumination subsystem. The light from each of these separate optical paths may then be directed toward the sample 202. The multiple illumination channels may be configured to direct light toward the sample 202 simultaneously or at different times (e.g., when using separate illumination channels to sequentially illuminate the sample). In other examples, the same illumination channel may be configured to direct light with different characteristics toward the sample 202 at different times. For example, in some examples, the optical element 204 may be configured as a spectral filter whose characteristics can be varied in various ways (e.g., by changing the spectral filter) to direct light of different wavelengths toward the sample 202 at different times. The illumination subsystem may have any other configuration known in the art that is suitable for directing light having different or identical characteristics at different or identical angles of incidence onto the sample 202, either sequentially or simultaneously.

[0073] According to certain embodiments, light source 203 can include a broadband plasma (BBP) light source. This allows the light generated by light source 203 and directed toward sample 202 to include broadband light. However, the light source can include any other suitable light source, such as a laser. The laser can include any suitable laser known in the art, and can be configured to generate light at any suitable wavelength or wavelength group known in the art. In addition, the laser can be configured to generate monochromatic or near-monochromatic light, allowing the laser to be a narrowband laser. Light source 203 can also include a polychromatic light source that generates light at multiple discrete wavelengths or wavebands.

[0074] Light from optical element 204 can be focused onto sample 202 by lens 205. While lens 205 is depicted in FIG. 8 as a single refractive optical element, it is understood that lens 205 can actually comprise multiple refractive and / or reflective optical elements that cooperate to focus light from the optical element onto the sample. The illumination subsystem depicted in FIG. 8 and described herein can include any other suitable optical elements (not shown). Examples of such optical elements include, but are not limited to, deflector(s), spectral filter(s), spatial filter(s), reflective optical element(s), apodizer(s), beamsplitter(s) (e.g., beamsplitter 213), aperture(s), and the like, which may include any type of suitable optical element known in the art. Additionally, optical-based subsystem 201 can be configured to modify one or more of the elements of the illumination subsystem based on the type of illumination used to generate the optical-based output.

[0075] The optical-based subsystem 201 may also include a scanning subsystem configured to scan the light across the sample 202. For example, the optical-based subsystem 201 may include a stage 206 on which the sample 202 rests while the optical-based output is being generated. The scanning subsystem may include any suitable mechanical and / or robotic assembly (including the stage 206) configured to move the sample 202 and scan the light across the sample 202. Additionally or alternatively, the optical-based subsystem 201 may be configured such that one or more optical elements included in the optical-based subsystem 201 may perform some optical scanning across the sample 202. The light may be scanned across the sample 202 in any suitable manner, such as along a serpentine path or a spiral path.

[0076] The optical-based subsystem 201 further includes one or more detection channels, at least one of which includes a detector configured to detect light from the sample 202 as a result of illumination of the sample 202 by the subsystem and to generate an output in response to the detected light. For example, the optical-based subsystem 201 shown in FIG. 8 includes two detection channels, one formed by collector 207, element 208, and detector 209, and the other formed by collector 210, element 211, and detector 212. As shown in FIG. 8, the two detection channels are configured to collect and detect light at different collection angles. In some examples, both detection channels are configured to detect scattered light, and the detection channels are configured to detect light scattered from the sample 202 at different angles. However, one or more of the detection channels may be configured to detect other types of light (e.g., reflected light) from the sample 202.

[0077] As further shown in FIG. 8 , both detection channels are shown positioned within the plane of the page, and the illumination subsystem is also shown positioned within the plane of the page. That is, in this embodiment, both detection channels are positioned (e.g., centered) within the plane of incidence. However, one or more of the detection channels can be positioned outside the plane of incidence. For example, the detection channel formed by collector 210, element 211, and detector 212 can be configured to collect and detect light scattered outside the plane of incidence. Such detection channels can therefore be referred to as "side" channels, and they can also be centered in a plane that is generally perpendicular to the plane of incidence.

[0078] Although the embodiment of optical-based subsystem 201 shown in FIG. 8 includes two detection channels, optical-based subsystem 201 may include other numbers of detection channels (e.g., a single detection channel or two or more detection channels). According to one such example, while the detection channel formed by collector 210, element 211, and detector 212 forms one side channel as described above, the optical-based subsystem 201 may include an additional detection channel (not shown) formed as a separate side channel located on the opposite side of the plane of incidence. Thus, optical-based subsystem 201 may include a detection channel including collector 207, element 208, and detector 209 centered in the plane of incidence and configured to collect and detect light at scattering angles perpendicular to or near the surface of sample 202. This detection channel may therefore be referred to as the "top" channel, and the optical-based subsystem 201 may include two or more side channels configured as described above. That is, the optical-based subsystem 201 can have at least three channels (i.e., one top channel and two side channels), each of which has its own collector, each of which can be configured to collect light at a different scattering angle than any of the other collectors.

[0079] Additionally, as described above, each detection channel in the optical-based subsystem 201 can be configured to detect scattered light. Thus, the optical-based subsystem 201 shown in FIG. 8 can be configured to generate a dark-field (DF) output associated with the sample 202. However, the optical-based subsystem 201 can additionally or alternatively include a detection channel(s) configured to generate a bright-field (BF) output associated with the sample 202. In other words, the optical-based subsystem 201 can include at least one detection channel configured to detect light specularly reflected from the sample 202. Thus, the optical-based subsystem 201 described herein can be configured for DF-only imaging, BF-only imaging, or both DF and BF imaging. While each collector is shown in FIG. 8 as a single refractive optical element, it should be understood that each collector can include one or more refractive optical dies and / or one or more reflective optical elements.

[0080] The one or more detection channels can include any suitable detector known in the art. For example, the detectors can include photomultiplier tubes (PMTs), charge-coupled devices (CCDs), time-delay integration (TDI) cameras, or any other suitable detector known in the art. The detectors can include both non-imaging and imaging detectors. In this configuration, when the detectors are non-imaging detectors, each detector can be configured to detect a certain characteristic of the scattered light, such as intensity, but cannot detect that characteristic as a function of position in the imaging plane. That is, the output generated by each detector in each detection channel of the optically-based subsystem can be considered a signal or data, but not an image signal or image data. In this example, a processor, such as processor 214, can be configured to generate an image of sample 202 based on the non-imaging outputs of the detectors. However, according to another example, the detectors can also be configured as imaging detectors configured to generate an imaging signal or image data. Thus, the optical-based subsystem can be configured in a variety of ways to generate optical images and other optical-based outputs described herein.

[0081] It should be noted that Figure 8 is provided herein to broadly illustrate optical-based subsystem 201 configurations that may be incorporated into or generate optical-based outputs used in the system embodiments described herein. As is common practice when designing commercial power acquisition systems, optical-based subsystem 201 configurations described herein may be modified to optimize the performance of the optical-based subsystem 201. Additionally, the systems described herein may be implemented using existing systems (e.g., by adding the described functionality to an existing system). For such systems, the methods described herein may be provided as optional features of the system (e.g., in addition to other features of the system). Alternatively, the systems described herein may be designed as entirely new systems.

[0082] Processor 214 may be coupled to components of system 200 in any suitable manner (e.g., via one or more transmission media, including, for example, wired and / or wireless transmission media) to receive output from processor 214. Processor 214 may be configured to perform a number of functions using its output. System 200 may receive instructions and other information from processor 214. Processor 214 and / or electronic data storage unit 215 may optionally be in electronic communication with a wafer inspection tool, wafer metrology tool, or wafer review tool (not depicted) to receive additional information or send instructions. For example, processor 214 and / or electronic data storage unit 215 may be in electronic communication with a scanning electron microscope.

[0083] The processor 214 and other system(s) or other subsystem(s) described herein can be part of a variety of systems, including personal computer systems, image computers, mainframe computer systems, workstations, network appliances, internet appliances, and other devices. The subsystem(s) or system(s) can include any suitable processor known in the art, including parallel processors. In addition, the subsystem(s) or system(s) can include platforms with high-speed processing and software, whether standalone or networked tools.

[0084] The processor 214 and electronic data storage unit 215 may be part of, e.g., located within, the system 200 or other device. According to one example, the processor 214 and electronic data storage unit 215 may be part of a stand-alone control unit or may be provided within a centralized quality control unit. Multiple processors 214 or electronic data storage units 215 may also be used.

[0085] Processor 214 may actually be implemented as any combination of hardware, software, and firmware, and its functionality, as described herein, may be performed in a single unit or distributed among several different components, each of which may be implemented as any combination of hardware, software, and firmware. Program code or instructions for causing processor 214 to perform and implement various methods and functions may be stored in a readable storage medium, such as memory in electronic data storage unit 215 or other memory.

[0086] When system 200 includes multiple processors 214, the separate subsystems may be coupled together, thereby transmitting images, data, information, instructions, etc., between the subsystems. For example, a subsystem may be coupled to additional subsystem(s) by any suitable transmission medium, which may include any suitable wired and / or wireless transmission medium known in the art. Two or more of such subsystems may also be coupled substantially by a shared computer-readable storage medium (not shown).

[0087] Processor 214 may be configured to perform numerous functions using the output of system 200 or other outputs. For example, processor 214 may be configured to send its output to electronic data storage unit 215 or other storage medium. Processor 214 may be configured according to any of the embodiments described herein. Processor 214 may also be configured to perform other functions or additional steps using the output of system 200 or using images or data from other sources.

[0088] The various steps, functions, and / or operations of the system 200 and methods disclosed herein may be performed by one or more of electronic circuits, logic gates, multiplexers, programmable logic devices, ASICs, analog or digital controllers / switches, microcontrollers, or information processing systems. Program instructions implementing the methods, such as those described herein, may be transmitted on or stored on a carrier medium. The carrier medium may include storage media such as read-only memory, random-access memory, magnetic or optical disks, non-volatile memory, solid-state memory, magnetic tape, and the like. The carrier medium may also include transmission media such as wires, cables, wireless transmission links, and the like. For example, the steps described throughout the disclosure may be performed by a single processor 214 or, alternatively, by multiple processors 214. Furthermore, the various subsystems of the system 200 may incorporate one or more information processing or logic systems. Accordingly, the foregoing description should be construed as merely illustrative and not limiting on the present disclosure.

[0089] In one example, a processor 214 is in communication with the system 200. The processor 214 is configured to perform the method 100 of embodiments. The processor 214 can operate a machine learning-based model according to an example. The system 200 can inspect wafers for defects, and the results can be used to generate a wafer map that is received by the processor 214.

[0090] Additional embodiments relate to non-transitory computer-readable media having stored thereon program instructions executable on a controller for performing a computer-implemented method of classifying a wafer map as disclosed herein. Specifically, as shown in FIG. 8, a non-transitory computer-readable medium having program instructions executable on a processor 214 may be included in an electronic data storage unit 215 or other storage medium. The computer-implemented method may include any step(s) of any method(s) described herein, including method 100.

[0091] The program instructions may be implemented in any of a variety of ways, including procedure-based techniques, component-based techniques, and / or object-oriented techniques, among others. For example, the program instructions may be implemented using ActiveX controls, C++ objects, JavaBeans, Microsoft Foundation Classes (MFC), Streaming SIMD Extensions (SSE), or other technologies or methodologies, as desired.

[0092] Although system 200 uses light, method 100 can also be performed using other semiconductor inspection tools. For example, method 100 can be performed using results from an electron beam system, such as a scanning electron microscope, or an ion beam system. In turn, the system can include an electron beam source or an ion beam source.

[0093] Although the present disclosure has been described with reference to one or more specific embodiments, it will be understood that other embodiments of the present disclosure may be made without departing from the spirit and scope of the present disclosure, and that the present disclosure is to be limited only by the appended claims and their reasonable interpretation.

Claims

1. 1. A method comprising:

1. A method of receiving a wafer map at a processor, wherein the wafer map relates to a surface of an entire wafer, the processor being configured to execute a machine learning based model to classify the wafer map; a method for classifying the wafer map using the machine learning based model and a signature on the wafer map, wherein the machine learning based model uses transfer learning; The purity of the signature classes in the machine learning-based model is controlled using a confidence matrix; determining a confidence level for the classification, the confidence level being based on a severity of the defect in the signature; determining whether the signature falls outside a confidence level; method.

2. 10. The method of claim 1, further comprising sending an alert if the signature is outside of the confidence level.

3. 10. The method of claim 1 further comprising: receiving a plurality of sample wafer maps at the processor; using the processor to classify the sample wafer map based on root cause of defects; and generating, using the processor, a library of specimen signatures based on the specimen wafer map; method.

4. 4. The method of claim 3, further comprising: extracting images from the plurality of defect maps, binsort maps, and / or metric maps using the processor; and augmenting the image using the processor; method.

5. 5. The method of claim 4, further comprising training the machine learning-based model using features extracted from the image.

6. 10. The method of claim 1, further comprising grouping the wafer maps with wafer maps having the same classification.

7. a semiconductor wafer inspection system; a processor in electronic communication with the semiconductor wafer inspection system; A system comprising: the processor: a processor configured to receive a wafer map, the wafer map relating to a surface of an entire wafer, the processor configured to execute a machine learning based model to classify the wafer map; configured to classify the wafer map using the machine learning based model and a signature on the wafer map, wherein the machine learning based model uses transfer learning; The purity of the signature classes in the machine learning-based model is controlled using a confidence matrix; determining a confidence level for the classification, the confidence level being based on a severity of the defect in the signature; determining whether the signature falls outside a confidence level; system.

8. 8. The system of claim 7, wherein the semiconductor wafer inspection system comprises a light source or an electron beam source.

9. 8. The system of claim 7, wherein the semiconductor wafer inspection system generates the wafer map.

10. 8. The system of claim 7, wherein the processor is further configured to send an alert if the signature is outside the confidence level.

11. 8. The system of claim 7, wherein the processor further comprises: To receive a plurality of sample wafer maps, classifying the sample wafer maps based on root causes of defects; and generating a library of specimen signatures based on the specimen wafer map; The system being configured.

12. 12. The system of claim 11, wherein the processor further comprises: extracting images from a plurality of defect maps, binsort maps, and / or metrology maps; and To reinforce the image, The system being configured.

13. 13. The system of claim 12, wherein the processor is further configured to train the machine learning-based model using features extracted from the image.

14. 8. The system of claim 7, wherein the processor is further configured to group the wafer maps with wafer maps having the same classification.

15. A non-transitory computer-readable storage medium having one or more programs thereon, the programs being operable on one or more information processing devices to: classifying the wafer map using a machine learning based model and signatures on the wafer map, wherein the machine learning based model uses transfer learning and the wafer map is for the entire surface of the wafer; The purity of the signature classes in the machine learning-based model is controlled using a confidence matrix; determining a confidence level for the classification, the confidence level being based on a severity of the defect in the signature; determining whether the signature falls outside a confidence level; A non-transitory computer-readable storage medium for performing steps.

16. 16. The non-transitory computer-readable storage medium of claim 15, further comprising: receiving a plurality of sample wafer maps; classifying the sample wafer map based on root causes of defects; generating a library of specimen signatures based on the specimen wafer map; A non-transitory computer-readable storage medium including:

17. 17. The non-transitory computer-readable storage medium of claim 16, further comprising: extracting images from a plurality of defect maps, binsort maps and / or metric maps; augmenting the image; A non-transitory computer-readable storage medium including:

18. 20. The non-transitory computer-readable storage medium of claim 17, wherein the steps further include training the machine learning-based model using features extracted from the image.

Images