Voltage monitoring across multiple frequency ranges for autonomous machine applications

Abstract

To provide voltage monitoring over multiple frequency ranges for autonomous machine applications.SOLUTION: In various examples, a voltage monitor may determine whether the voltage supplied to at least one component of a computing system is safe using two sets of thresholds, e.g., a high-frequency over-voltage (OV) threshold, a high-frequency under-voltage (UV) threshold, a low-frequency OV threshold, and a low-frequency UV threshold. A high-frequency voltage error detector may compare the supplied or input voltage to the high-frequency OV and UV thresholds. A low-frequency voltage error detector may filter the supplied voltage to remove or reduce noise and then may compare the filtered voltage to the low-frequency OV and UV thresholds. Upon detecting a voltage error, a safety monitor may cause a change to an operating state of the at least one component.SELECTED DRAWING: Figure 1

Description

[Background technology]

[0001] To operate safely, safety-critical and operationally important computer systems in autonomous and semi-autonomous machines must meet certain safety requirements that help ensure that these computer systems can make timely and accurate decisions and take appropriate actions for the safe operation of the machine. Among many safety precautions, the voltages supplied to these computer systems may be monitored to ensure that appropriate voltage levels are supplied. For example, functional safety standards such as the International Standardization Organization (ISO) standard ISO 26262 require that at least 99% of failures be detected, at least for certain safety goals.

[0002] As computer systems within autonomous and semi-autonomous machines continue to grow in complexity—due, for example, to increased processing and power demands—power supplies capable of switching between multiple operating modes and corresponding power consumption rates and / or requirements are becoming increasingly common. A drawback of such power supplies is that they can induce alternating current (AC) noise into the standard direct current (DC) voltage supplied to the computer system. In previous systems, fault detection or diagnostic coverage typically provides only a single over-voltage (OV) threshold and a single under-voltage (UV) threshold for comparison with the input voltage supplied to the computer system by the power supply. However, this diagnostic coverage may be insufficient to meet stringent safety requirements that require a very low rate of undetected failures. For example, if the single OV threshold is set to a relatively high value (with a corresponding single UV threshold set to a relatively low value, indicating a wide range of acceptable voltages), false positives will be reduced, but low-frequency faults will go undetected, thereby reducing diagnostic coverage below the acceptable limit. As another example, if a single OV threshold is set to a relatively low value (with a corresponding single UV threshold set to a relatively high value indicating a narrow range of acceptable voltages), false detections will be prevalent due to AC noise in the supply voltage, thereby limiting system performance—for example, by causing system state changes even when the input voltage is acceptable to the computer system. If AC noise is filtered before applying the narrow thresholds, fault detection will be limited to only low-frequency faults; high-frequency faults will not be detected, which could result in undetected system failures. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] U.S. Patent Application No. 16 / 101,232 Summary of the Invention [Means for solving the problem]

[0004]

[0003] Embodiments of the present disclosure relate to a comprehensive voltage monitor for autonomous machine applications, such as autonomous or semi-autonomous vehicles, robots, and / or robotic platforms. Systems and methods are disclosed for identifying voltage errors in both low- and high-frequency applications via the voltage monitor. Based on the identified voltage errors, a safety manager can alter the operating state of electronic devices powered by the voltage.

[0005] In contrast to conventional systems, such as those described above, the present system and method uses multiple sets of thresholds to determine whether the voltage supplied to an electronic system is safe—in an exemplary, non-limiting example, these sets of thresholds may include a high-frequency overvoltage (OV) threshold, a high-frequency undervoltage (UV) threshold, a low-frequency OV threshold, and a low-frequency UV threshold. An embodiment of the present disclosure includes a high-frequency voltage error detector that can compare the supply or input voltage to the high-frequency OV and UV thresholds, and a low-frequency voltage error detector that can filter the supply voltage to remove or reduce any AC noise and then compare the filtered voltage to the low-frequency OV and UV thresholds. Such an arrangement can detect both low-frequency and high-frequency errors while maintaining a low rate of false positives, thereby meeting the diagnostic coverage requirements of a computer system while enhancing or optimizing the system's performance, at least with respect to the supply voltage.

[0006] The present system and method for comprehensive voltage monitoring for autonomous machine applications is described in detail below with reference to the accompanying drawings. [Brief explanation of the drawings]

[0007] [Figure 1]FIG. 1 is a hardware system diagram illustrating a voltage monitor between a computer system and an associated power supply, according to some embodiments of the present disclosure. [Figure 2] FIG. 2 is a hardware diagram illustrating a voltage monitor configured to detect voltage errors at low and high frequencies, according to some embodiments of the present disclosure. [Figure 3A] 1 is a graphical representation of a voltage monitor with a narrow range of tolerance voltage as through a low frequency voltage error detector, according to some embodiments of the present disclosure. [Figure 3B] 1 is a graphical representation of a voltage monitor with a wide range of voltage tolerance as through a high frequency voltage error detector, according to some embodiments of the present disclosure. [Figure 4] 3C is a graphical representation of a voltage monitor having two sets of thresholds as a combination of FIGS. 3A and 3B, according to some embodiments of the present disclosure. [Figure 5] 1 is a flow diagram illustrating a method for voltage monitoring according to some embodiments of the present disclosure. [Figure 6] 1 is a flow diagram illustrating a method for voltage monitoring according to some embodiments of the present disclosure. [Figure 7A] 1 is an illustration of an exemplary autonomous vehicle, according to some embodiments of the present disclosure. [Figure 7B] 7B is an illustration of camera positions and fields of view for the example autonomous vehicle of FIG. 7A, according to some embodiments of the present disclosure. [Figure 7C] FIG. 7B is a block diagram of an example system architecture of the example autonomous vehicle of FIG. 7A, in accordance with some embodiments of the present disclosure. [Figure 7D] FIG. 7B is a system diagram of communication between a cloud-based server and the example autonomous vehicle of FIG. 7A, according to some embodiments of the present disclosure. [Figure 8] FIG. 1 is a block diagram of an exemplary computing device suitable for use in implementing some embodiments of the present disclosure. [Figure 9]FIG. 1 is a block diagram of an exemplary data center suitable for use in implementing some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0008] Systems and methods for comprehensive voltage monitoring for autonomous machine applications are disclosed. The present disclosure may be described with respect to an exemplary autonomous vehicle 700 (alternatively referred to herein as “vehicle 700” or “ego machine 700,” examples of which are described with reference to FIGS. 7A-7D ), but this is not intended to be limiting. For example, the systems and methods described herein may be used, without limitation, by non-autonomous vehicles, semi-autonomous vehicles (e.g., in one or more adaptive driver assistance systems (ADAS)), piloted or non-piloted robots or robotic platforms, warehouse vehicles, off-road vehicles, vehicles coupled to one or more trailers, airships, boats, shuttles, emergency response vehicles, motorcycles, electric or mopeds, aircraft, construction vehicles, submarines, drones, and / or other vehicle types. Additionally, while the present disclosure may be described with respect to monitoring voltages provided to computer systems in safety applications, this is not intended to be limiting, and the systems and methods described herein may be used in augmented reality, virtual reality, mixed reality, robotics, security and surveillance, autonomous or semi-autonomous machine applications, and / or any other technology space in which safety applications may be used.

[0009] Embodiments of the present disclosure relate to a computer system configured to detect voltage errors in safety-critical applications, such as autonomous or semi-autonomous machine applications. In some embodiments, the computer system may be associated with a communicatively and / or electrically coupled safety system that may include a voltage monitor and / or a safety manager. The voltage monitor may detect faults in the input voltage provided by a power supply to one or more electronic components of the computer system, while the safety manager may use the detected faults from the voltage monitor to take any of a variety of remedial actions, such as placing the computer system in a safe mode, a low-power mode, a shutoff mode, and / or otherwise changing the operating mode of the computer system.

[0010] In embodiments of the present disclosure, a computer system may broadly include electronic components, power supplies, voltage monitors, and / or safety managers. An electronic component may be any of a variety of powered hardware components, such as, without limitation, a processor, a system-on-chip (SoC), a microcontroller, a sensor, and / or the like. An electronic component may also include a set or group of individual components, integrated circuits, or other power receptors, where a power supply can provide power to the electronic components over one or more buses (e.g., different components may require different input voltages, and a power supply can provide various input voltages across any number of buses). An electronic component may have one or more operating modes, such as a fully autonomous operating mode, a semi-autonomous operating mode, a driver-controlled mode, a driver-warning mode, a safe mode, a low-power mode, and / or a power-off mode. Once a fault is detected using the voltage monitor, the safety manager can instruct (e.g., via a message or signal to the electronic component) or directly place the electronic component in a different operating mode. As such, the safety manager can prevent potentially problematic calculations (or other actions) by the electronic component (which is being supplied with an incorrect voltage) from causing a system safety issue. For example, if the electronic component is in a fully autonomous operating mode and an incorrect voltage is detected, the safety manager can change the electronic component to a driver-controlled mode, since the electronic component may be making an incorrect decision due to the incorrect voltage. Driver-controlled mode allows the driver to take control of the machine so that the driver can make appropriate control decisions—at least until the voltage issue is addressed.

[0011] The power supplies may be configured to provide power to the electronic components. The power may be supplied by a battery, an alternator, and / or other power source. In some embodiments, the power supplies may be switched-mode power supplies, linear power supplies, or combinations thereof. For example, in some embodiments, there may be a set of power supplies including a first power supply and a second power supply of the same or different types (e.g., a switched-mode power supply and a linear power supply). Other combinations and / or types of power supplies may be used without departing from the scope of this disclosure.

[0012] The safety manager may be configured to change the operating mode of the electronic component when a voltage fault is detected by the voltage monitor. In an embodiment, the safety manager may be communicatively and / or electrically coupled to the voltage monitor and the electronic component. The safety manager may receive an indication of a voltage fault from the voltage monitor and, in response, cause a change in the operating state of the electronic component. For example, when the voltage monitor detects that the input voltage from the power supply is at least one of a voltage greater than a high-frequency OV threshold or a voltage less than a low-frequency OV threshold, or that the filtered input voltage is at least one of a voltage greater than a low-frequency OV threshold or a voltage less than a low-frequency UV threshold, the safety manager may perform one or more actions, such as causing a change in the current operating state of the electronic component.

[0013]

[0003] Embodiments of the present disclosure relate to a voltage monitor configured to detect a voltage fault in an input or supply voltage from a power supply to an electronic component. The voltage monitor may include a voltage meter (e.g., a voltmeter) electrically disposed between the power supply and the electronic component. In embodiments, the voltage monitor may be included in a component separate from the power supply and the electronic component, and / or may be included as a component of the power supply, the electronic component, and / or a safety manager (e.g., on an integrated circuit with the electronic component).

[0014] In an embodiment, the voltage monitor may include, without limitation, a low frequency voltage error detector and a high frequency voltage error detector that can operate in parallel to detect low frequency and / or high frequency faults in the same supply voltage.

[0015] The low-frequency voltage error detector may include a filter (e.g., a low-pass filter) to filter the input voltage to produce a filtered input voltage. The filter may remove at least a portion of AC noise in the supply voltage so that drift in the base voltage may be identified in an analysis of the filtered input voltage. The filtered input voltage may then be passed through a comparator of the low-frequency voltage error detector, which may compare the filtered input voltage to a low-frequency UV threshold and a low-frequency OV threshold. The high-frequency voltage error detector may include a comparator configured to compare the input voltage (e.g., with or without filtering) to a high-frequency OV threshold and a high-frequency UV threshold.

[0016] The voltage monitor can be communicatively coupled to a safety manager. When a voltage fault is detected, the voltage monitor can alert (e.g., send a signal, a message, etc.) the safety manager so that the safety manager can change the operating mode of the electronic component. The voltage monitor can transmit information indicative of the detected fault, such as the detected voltage, the threshold exceeded, a time stamp, other operating conditions, the associated power supply, and / or other information. The safety manager can store this received information and / or use it to determine what remedial action to take (e.g., what operating mode to place the electronic component in).

[0017] In some embodiments of the present disclosure, at least one of the low frequency OV threshold, the low frequency UV threshold, the high frequency OV threshold, or the high frequency UV threshold may be programmable or otherwise variable to allow the respective threshold to be changed based on a particular configuration, hardware, layout, and / or condition.

[0018] As such, the present systems and methods may be configured to compare the input voltage provided by the power supply to a high-frequency threshold and, after filtering to produce a filtered input signal, to a low-frequency threshold. For example, a voltage monitor may compare the input voltage to a high-frequency OV threshold, a high-frequency UV threshold, a low-frequency OV threshold (filtered), and a low-frequency UV threshold (filtered). By comparing the input voltage to both overvoltage and undervoltage thresholds and high- and low-frequency thresholds, each of the various fault types may be detected while accounting for AC noise in the input voltage. Additionally, system performance may be enhanced because thresholds may not be limited by the voltage monitor's ability to account for both filtered and unfiltered input voltage levels.

[0019] Referring to FIG. 1, FIG. 1 illustrates an example voltage monitoring system 100 (alternatively referred to as “system 100”) according to some embodiments of the present disclosure. It should be understood that this and other arrangements described herein are merely illustrative. Other configurations and elements (e.g., machines, interfaces, functions, sequences, groupings of functions, etc.) may be used in addition to or instead of those illustrated, and some elements may be omitted entirely. Furthermore, many of the elements described herein are functional entities that may be implemented as individual or distributed components or in conjunction with other components, and in any suitable combination and location. Various functions described herein as being performed by entities may be implemented by hardware, firmware, and / or software. For example, various functions may be implemented by a processor executing instructions stored in a memory. For example, in some embodiments, system 100 may include features, functionality, and / or components similar to those of example autonomous vehicle 700 of FIGS. 7A-7D , example computing device 800 of FIG. 8 , and / or example data center 900 of FIG. 9 .

[0020] As shown in FIG. 1 , the system 100 may broadly include a computer system 102, a power supply 104, a voltage monitor 106, and a safety manager 108. The power supply 104 may provide power to various electronic components 112 of the computer system 102 along one or more lines 110 (e.g., busbars). The provided power may have an associated voltage, which may be tested by the voltage monitor 106 to determine whether the voltage is too high and / or too low for each electronic component 112. If the voltage is outside of an acceptable threshold, as described herein, the voltage monitor 106 may send a message or otherwise alert the safety manager 108. The safety manager 108 may then take any of a variety of remedial actions, including changing the operating state of the computer system 102 and / or the electronic components 112. This is because erroneous voltages may affect calculations and other functions being performed by the computer system 102 such that these calculations and other functions cannot be trusted in a safety situation. Altering the operational state of computer system 102 may include preventing communication between computer system 102 and vehicle 700 to prevent the performance of one or more calculations, operations, and other functions. Thus, altering the operational state of computer system 102 and / or electronic components 112 may prevent this potentially unsafe condition.

[0021] In embodiments of the present disclosure, the system may be or may otherwise relate to at least one of the following: a control system for an autonomous or semi-autonomous machine, a perception system for an autonomous or semi-autonomous machine, a system for performing simulation operations, a system for performing deep learning operations, a system implemented using edge devices, a system implemented using a robot, a system incorporating one or more virtual machines (VMs), a system implemented at least partially in a data center, or a system implemented at least partially using cloud computing resources.

[0022] Computer system 102 may be, for example, computing system 800 within autonomous vehicle 700, as shown and described with respect to Figures 7A-7D. Computer system 102 may control any of a variety of safety-related functions, e.g., functions, methods, or processes upon which the safe operation of the machine depends. For example, an autonomous vehicle 700 operating autonomously may include computer system 102 making numerous observations about obstacles and determining numerous actions for the vehicle to take to avoid those obstacles. This autonomous control is an example of a safety-related function because the safety of the vehicle and any passengers depends on the correct identification and avoidance of obstacles.

[0023] Computer system 102 may include one or more electronic components 112. As a non-limiting example, FIG. 1 shows four electronic components 112. However, embodiments of the present disclosure may include more or fewer electronic components 112. Electronic components 112 may perform one or more safety-related functions of system 100 or computer system 102. In embodiments, electronic components 112 may be separate from computer system 102, may be components of computer system 102, and / or may be the entire computer system 102.

[0024] Electronic component 112 may be any of a variety of hardware components that receive power from power supply 104. For example, in some embodiments of the present disclosure, as described with respect to Figures 7C and 8, electronic component 112 may include at least one of a processor or system-on-chip (SoC), such as CPU 706, CPU 718, CPU 806, GPU 708, GPU 720, GPU 808, SoC 704A, SoC 704B, a data processing unit (DPU), a tensor processing unit (TPU), a vector processing unit (VPU), and / or the like. As another example, in some embodiments of the present disclosure, electronic component 112 may be any of the components shown in Figures 7A-7D, 8, and / or 9, or any combination of such components.

[0025] The power supply 104 may be electrically coupled to an electrical load, which may directly or indirectly include an electronic component 112. The power supply 104 may be a power supply 816 discussed herein or another power supply type, and the power supply 104 may convert or otherwise modify the source to the required voltage, current, frequency, or other characteristics of the electrical load. The source may be a battery, an internal combustion engine, and / or another source type. In some embodiments, the power supply 104 may comprise a separate component (as shown in FIG. 1 ), while in other embodiments, the power supply 104 may be a component of the computer system 102—e.g., incorporated into the same integrated circuit. The power supply 104 may be connected to the electronic component 112 by one or more wires 110 such that power (e.g., in the form of electrons) can flow from the power supply 104 to the electronic component 112.

[0026] In some embodiments, the power supply 104 may include a switching mode power supply 114 (SMPS) and / or a linear power supply 116 (LPS). In some embodiments, the first power supply 104 is a switching mode power supply 114 and the second power supply is a linear power supply 116. The power supplies may be in other configurations, such as multiple SMPSs 114, multiple LPSs 116, or other combinations. In some embodiments, the system 100 includes a first power supply 104 electrically coupled to the first electronic component 112 and a second power supply 104 electrically coupled to the second electronic component 112—e.g., to provide a different input voltage to the second electronic component 112. In some embodiments, the input voltage from the second power supply 104 to the second electronic component 112 may be the same or different from the first input voltage.

[0027] The switched-mode power supply 114 is a type of power supply 104 that uses semiconductors as ON / OFF switches (rather than continuous variable resistors) to provide voltage. The SMPS 114 may include a driver / controller 118, an external compensation network 120, an inductor 122, a capacitor 124, and / or other components. The driver / controller 118 switches ideally lossless storage elements, such as the inductor 122 and the capacitor 124. While the inductor 122 and the capacitor 124 may have losses, the losses may be reduced compared to the LPS 116 as discussed herein. The external compensation network 120 can adjust the output voltage and may be, for example, a Type I, Type II, or Type III feedback amplifier network.

[0028] The linear power supply 116 may use a linear regulator to provide an output voltage through the dissipation of excess power, for example, in a resistor or as heat. The excess voltage (e.g., the difference between the voltage input and voltage output from the power supply to the LPS 116) may be lost or wasted.

[0029] The power supply 104 can provide an input voltage to the electronic component 112 at a level required by the particular electronic component 112. The input voltage is shown in FIG. 1 as a voltage drain (VD) as the voltage provided at the electronic component 112. In an embodiment, various electronic components 112 may require unique input voltages and may have unique tolerance thresholds for such input voltages. Thus, the power supply 104 can provide multiple different input voltages to each electronic component 112—for example, as shown in FIG. 1 with separate lines 110 (e.g., busbars) to the separate electronic components 112. The line 110 can include a split 126 that directs the input voltage to the voltage monitor 106 for voltage testing. The line 110 can also include one or more capacitors 128 after the split 126 to store excess charge.

[0030] Voltage monitor 106 may be positioned along split 126 to receive an input voltage at input 130. In an embodiment, voltage monitor 106 may be positioned between power supply 104 and electronic component 112 and may include output 132 configured to report a detected voltage error to safety manager 108. Safety manager 108 may also include output 134 configured to change the operational state of electronic component 112 in response to a detected voltage error (which may include changing the operational state of the entire computer system 100), as discussed herein, for example, by placing the entire computer system 100 in a safe state by disabling external communications and / or reducing the capabilities of computer system 100.

[0031] The voltage monitor 106 may be a component of, or may be otherwise associated with, a control system for an autonomous or semi-autonomous machine, a perception system for an autonomous or semi-autonomous machine, a system for performing simulation operations, a system for performing deep learning operations, a system implemented using edge devices, a system implemented using a robot, a system incorporating one or more virtual machines (VMs), a system implemented at least partially in a data center, or a system implemented at least partially using cloud computing resources. Some examples of such systems are shown in Figures 7A-9 and discussed herein.

[0032] 2, the voltage monitor 106 may include a voltage monitor chip 200 configured to receive an input voltage on one or more input lines 202 (e.g., a bus bar) and a controller 204 for processing detected voltage errors and alerting the safety manager 108 (as shown in FIG. 1). The voltage monitor 106 may include a low frequency voltage error detector 206 and a high frequency voltage error detector 208, and the input voltage may be split between the low frequency voltage error detector 206 and the high frequency voltage error detector 208.

[0033] Voltage monitor 106 may include various circuits (e.g., as described herein) for receiving an input voltage from power supply 104 electrically coupled to electronic component 112 and for comparing the input voltage to one or more thresholds using both a low-frequency voltage error detector and a high-frequency voltage error detector. More specifically, voltage monitor 106 may compare the input voltage to at least one of a high-frequency over-voltage (OV) threshold or a high-frequency under-voltage (UV) threshold using the high-frequency voltage error detector, filter the input voltage to produce a filtered input voltage using the low-frequency voltage error detector, and compare the filtered voltage to at least one of a low-frequency OV threshold or a low-frequency UV threshold using the low-frequency voltage error detector.

[0034] The low-frequency voltage error detector may include a low-pass filter 210 and a comparator 212 associated with an undervoltage (UV) threshold 214 and an overvoltage (OV) threshold 216. The low-pass filter 210 may filter at least a portion of the input voltage to generate a filtered input voltage. For example, the low-pass filter 210 may remove at least a portion of noise from the input voltage (e.g., from AC current noise in the input voltage) to generate the filtered input voltage. The low-pass filter 210 may allow signals having frequencies lower than a certain cutoff frequency to pass and / or attenuate signals having frequencies higher than the cutoff frequency. Examples of low-pass filters may include a resistor-capacitor filter (RC filter), a resistor-inductor filter (RL filter), a resistor-inductor-capacitor filter (RLC filter), a high-order passive filter, an active low-pass filter, and / or other types of filters. After passing through the low pass filter 210, a comparator 212 may compare the filtered input voltage to a low frequency UV threshold 214 and a low frequency OV threshold 216.

[0035] A graphical representation of the low frequency voltage error detector is shown in Figure 3A. Figure 3A includes a voltage axis (as the y-axis) and a time axis (as the x-axis). The regulator nominal voltage (V nom ) lines are placed at a certain voltage level (e.g., horizontal in Figure 3A), and V nom The plus regulator tolerance line is V nom It is placed above the line. nom Associated with the positive regulator tolerance line is the low frequency OV threshold. V nom Below the line is V nom Minus regulator tolerance line. V nomAssociated with the negative regulator tolerance line is the low frequency UV threshold. In some embodiments, the low frequency OV threshold is V nom Plus, the low frequency threshold is V nom Minus the regulator tolerance, which may not be relevant. Two example unfiltered voltage measurements (one near the OV threshold and one near the UV threshold) are shown as example voltage measurements. Without the low-pass filter, the low-frequency voltage error detector could return a false positive result, and the low-pass filter removes the fluctuations shown in Figure 3A so that an upward or downward voltage drift can be detected regardless of the fluctuation.

[0036] The high-frequency voltage error detector may include a comparator 218 configured to compare an input voltage (e.g., with or without filtering) to a high-frequency UV threshold 220 and a high-frequency OV threshold 222. Comparator 218 may be a device that compares the input voltage to a respective threshold, like comparator 212 of the low-frequency voltage error detector. Comparator 218 essentially performs one-bit quantization as an analog-to-digital converter. Thus, a comparison of the input voltage may be performed using a first comparator, and a comparison of the filtered input voltage may be performed using a second comparator, each of which may be associated with a separate threshold.

[0037] In some embodiments of the present disclosure, at least one of high frequency OV threshold 222, high frequency UV threshold 220, low frequency OV threshold 216, and low frequency UV threshold 214 may be programmable. Each threshold may be programmable by controller 204 or other external computer system. In yet other embodiments of the present disclosure, one or more of the thresholds may be static.

[0038] A graphical representation of a high frequency voltage error detector is shown in FIG. 3B. FIG. 3B includes a voltage axis (as the y-axis) and a time axis (as the x-axis). In one or more embodiments, the regulator nominal voltage (Vnom ) lines are placed at a certain voltage level (e.g., horizontal in FIG. 3A). As shown, V nom The plus regulator tolerance line is V nom line, and the high frequency OV threshold is V nom The positive regulator is positioned above the tolerance line. nom The minus regulator tolerance line is V nom The high frequency UV threshold is located below the V nom Two example voltage measurements (one close to the OV threshold and one close to the UV threshold) are shown below the line. The OV and UV thresholds are set so that natural and tolerable noise in the supply voltage does not exceed the respective thresholds.

[0039] Voltage monitor 106 may include an OR gate 224 that passes a detected voltage error (e.g., a voltage exceeding one of the described thresholds) to controller 204. It should be understood that OR gate 224 may be implemented as a physical hardware component and / or a logic circuit. Similarly, low-frequency voltage error detector 206 and high-frequency voltage error detector 208 may each include an OR gate derived from a respective UV and OV threshold (not shown), which may also be implemented as a physical hardware component and / or a logic circuit.

[0040] A graphical representation of OR gate 224, which identifies voltage errors via either a high frequency voltage error detector or a low frequency voltage error detector, is shown in Figure 4. Figure 4, like Figures 3A and 3B, includes a voltage axis (as the y-axis) and a time axis (as the x-axis). In one or more embodiments, the regulator nominal voltage (V nom ) lines are placed at certain voltage levels (e.g., horizontal in FIG. 3A). As shown, V nom The plus regulator tolerance line is V nom It is placed on the line and V nom The minus regulator tolerance line is V nomAlso shown are four overall threshold lines. From top to bottom, as shown in FIG. 4, these are the high frequency OV threshold, the low frequency OV threshold, the low frequency UV threshold, and the high frequency UV threshold.

[0041] Two example unfiltered voltage measurements (V nom Plus one near the regulator tolerance line and V nom A low-frequency OV threshold (one near the minus regulator tolerance line) is shown as an example voltage measurement. The unfiltered voltage measurement is compared to a high-frequency OV threshold and a high-frequency UV threshold. The filtered voltage (not shown) is compared to a low-frequency OV threshold and a low-frequency UV threshold. Thus, the high-frequency OV threshold and the high-frequency UV threshold can identify transient faults in the fluctuating unfiltered voltage, while the low-frequency OV threshold and the low-frequency UV threshold identify gradual faults in the filtered voltage, which is more stable.

[0042] The voltage monitor 106 may include an output 226 configured to send a voltage error indication to the safety manager 108. Upon detecting a voltage error based on at least one of the input voltage being greater than a high frequency OV threshold or less than a high frequency UV threshold or the filtered input voltage being greater than a low frequency OV threshold or less than a low frequency UV threshold, the voltage monitor 106 may indicate the voltage error to the safety manager 108 of the system 100. In other examples, the voltage monitor 106 may perform one or more functions of the safety manager 108, such as changing the operating state of the electronic component 112.

[0043] 1, safety manager 108 may be a microcontroller or other processing element, such as logic unit 820. In an embodiment, safety manager 108 may be a separate component from computer system 102 so that it can monitor and control the operation of computer system 102 without being affected by any potentially erroneous voltages. Safety manager 108 may configure voltage monitor 106, for example, by setting and / or reprogramming one or more of the thresholds discussed herein. Safety manager 108 may be configured to monitor and / or reprogram ... 2 The voltage monitor 106 may be monitored by reading discovered faults via an interface such as an inter-integrated circuit (IC) (e.g., which may, in embodiments, be located within the safety manager 108 and the voltage monitor 106 or may be a component of the safety manager 108 and / or the voltage monitor 106). In other embodiments, the safety manager 108 may be a component of the computer system 102, a component of the SoC, a component of the power supply 104, and / or the like. The safety manager 108 may be communicatively coupled to the voltage monitor 106 and / or the electronic component 112, directly or indirectly. In some embodiments, the safety manager 108 detects a voltage error in the voltage monitor 106 without direct communication from the voltage monitor 106. In these embodiments, the voltage monitor 106 may be referred to as a passive voltage monitor. In other embodiments, the safety manager 108 may receive a message from the voltage monitor 106 indicating a voltage error. The message may include information related to or otherwise indicative of the electronic component 112 associated with the voltage error, the particular threshold that was exceeded, the current voltage level, the amount above or below each threshold, the duration of the voltage error, a time stamp of the voltage error, a critical level, or other information. In these embodiments, the voltage monitor 106 may be referred to as an active voltage monitor. In either embodiment, the indication of a voltage error may cause a change to at least one electronic component 112 communicatively coupled to the safety manager 108.

[0044] The safety manager 108 may be configured to cause a change to the operational state of the electronic component 112 when the voltage monitor 106 detects that the input voltage from the power supply 104 is greater than or less than a high frequency OV threshold or a low frequency OV threshold, or the filtered input voltage is greater than or less than a low frequency OV threshold or a low frequency UV threshold. The operational state may be specific to the electronic component 112, the computer system 102, or the vehicle 700 (or other machine).

[0045] 5 and 6, each block of methods 500 and 600 described herein includes computational processes that can be implemented using any combination of hardware, firmware, and / or software. For example, various functions may be implemented by a processor executing instructions stored in a memory. Methods 500 and 600 may also be implemented as computer-usable instructions stored on a computer storage medium. Methods 500 and 600 may be provided by a standalone application, a service, or a hosted service (standalone or in combination with another hosted service), or a plug-in to another product, to name a few. Additionally, methods 500 and 600 are described with reference to system 100 of FIG. 1 and / or voltage monitor 106 of FIG. 2, by way of example. However, these methods may additionally or alternatively be performed by any one system or any combination of systems, including, but not limited to, those described herein.

[0046] 5, which is a flow diagram illustrating a method 500 for monitoring a voltage supplied to an electronic component 112, according to some embodiments of the present disclosure. The method 500 includes, at block B502, providing an input voltage to the electronic component 112 using a power supply 104. The electronic component 112 may include at least one of a processor or a system-on-chip (SoC). The power supply 104 may be a switched-mode power supply 114 that includes some alternating current (AC) noise and / or fluctuations in the input voltage.

[0047] At block B504, the method 500 includes comparing the input voltage to at least one of a high frequency overvoltage (OV) threshold or a high frequency undervoltage (UV) threshold using a high frequency voltage error detector. The high frequency voltage error detector detects voltage errors in AC noise fluctuations.

[0048] The method 500 includes filtering the input voltage using a low-pass filter of the low-frequency voltage error detector to produce a filtered input voltage, at block 506. The low-pass filter may remove at least a portion of the AC noise from the input voltage to produce the filtered input voltage.

[0049] At block 508, method 500 includes comparing the filtered voltage to at least one of a low-frequency OV threshold or a low-frequency UV threshold using a low-frequency voltage error detector. The low-frequency voltage error detector detects voltage errors in a more stable drift of the underlying filtered voltage. In some embodiments, the high-frequency voltage error detector and the low-frequency error detector may be arranged in parallel. In these embodiments, the operations of comparing using the high-frequency voltage error detector and comparing using the low-frequency voltage error detector may be performed at least partially simultaneously.

[0050] At block 510, the method 500 includes using the safety manager 108 to determine a voltage error based on at least one of the input voltage being greater than a high frequency OV threshold or less than a high frequency UV threshold or the filtered input voltage being greater than a low frequency OV threshold or less than a low frequency UV threshold.

[0051] The method 500 includes causing a change to an operational mode of the electronic component 112 based at least in part on determining the voltage error at block 512. Such a change may terminate a safety program such that the voltage error is less likely to cause an unsafe condition in a vehicle or other machine.

[0052] 6, which is a flow diagram illustrating a method 600 for monitoring a voltage supplied to an electronic component 112, in accordance with some embodiments of the present disclosure. The method 600 includes, at block 602, receiving an input voltage from a power supply 104 electrically coupled to the electronic component 112. The power supply 104 also provides the input voltage to the electronic component 112.

[0053] The method 600 includes, at block 604, comparing the input voltage to at least one of a high frequency overvoltage (OV) threshold or a high frequency undervoltage (UV) threshold using a high frequency voltage error detector.

[0054] At block 606, the method 600 includes filtering the input voltage using a low frequency voltage error detector to generate a filtered input voltage.

[0055] At block 608, the method 600 includes comparing the filtered voltage to at least one of a low frequency OV threshold or a low frequency UV threshold using a low frequency voltage error detector.

[0056] Method 600 includes indicating a voltage error to a safety manager at block 610. For example, upon detecting a voltage error based on at least one of an input voltage being greater than a high frequency OV threshold or less than a high frequency UV threshold or a filtered input voltage being greater than a low frequency OV threshold or less than a low frequency UV threshold, the voltage error may be indicated to safety manager 108 of system 100 such that safety manager 108 may take any of a variety of remedial actions, such as changing the operational state of electronic components 112 supplied by the input voltage.

[0057] Exemplary Autonomous Vehicle 7A is a diagram of an example autonomous vehicle 700 according to some embodiments of the present disclosure. The autonomous vehicle 700 (alternatively referred to herein as "vehicle 700") may include, but is not limited to, a passenger vehicle, such as a car, a truck, a bus, a first responder vehicle, a shuttle, an electric or moped, a motorcycle, a fire engine, a police vehicle, an ambulance, a boat, a construction vehicle, a submarine, a drone, a vehicle coupled to a trailer, and / or another type of vehicle (e.g., unmanned and / or carrying one or more passengers). Autonomous vehicles are generally described in terms of automation levels as defined by the National Highway Traffic Safety Administration (NHTSA), a division of the U.S. Department of Transportation, and the Society of Automotive Engineers (SAE) "Taxonomy and Definitions for Terms Related to Driving Automation Systems for On-Road Motor Vehicles" (Standard No. J3016-201806 published June 15, 2018, Standard No. J3016-201609 published September 30, 2016, and previous and future versions of this standard). Vehicle 700 may be capable of functioning according to one or more of levels 3 through 5 of autonomous driving. For example, vehicle 700 may be capable of conditional automation (Level 3), high automation (Level 4), and / or full automation (Level 5), depending on the embodiment.

[0058] Vehicle 700 may include components such as a vehicle chassis, body, wheels (e.g., 2, 4, 6, 8, 18, etc.), tires, axles, and other components. Vehicle 700 may include a propulsion system 750, such as an internal combustion engine, a hybrid power plant, a fully electric engine, and / or another propulsion system type. Propulsion system 750 may be connected to a drive train of vehicle 700, which may include a transmission, to enable propulsion of vehicle 700. Propulsion system 750 may be controlled in response to receiving a signal from a throttle / accelerator 752.

[0059] A steering system 754, which may include a steering wheel, may be used to steer the vehicle 700 (e.g., along a desired course or route) when the propulsion system 750 is operating (e.g., when the vehicle is moving). The steering system 754 may receive signals from a steering actuator 756. A steering wheel may be optional for fully automated (Level 5) functionality.

[0060] Brake sensor system 746 may be used to operate vehicle brakes in response to receiving signals from brake actuators 748 and / or brake sensors.

[0061] A controller 736, which may include one or more system on chip (SoC) 704 (FIG. 7C) and / or a GPU, can provide signals (e.g., representations of commands) to one or more components and / or systems of the vehicle 700. For example, the controller can send signals to operate vehicle brakes via one or more brake actuators 748, to operate a steering system 754 via one or more steering actuators 756, and to operate a propulsion system 750 via one or more throttle / accelerators 752. The controller 736 may include one or more on-board (e.g., integrated) computing devices (e.g., supercomputers) that process sensor signals and output operational commands (e.g., signals representing commands) to enable rhythmic driving and / or assist a driver in operating the vehicle 700. The controllers 736 may include a first controller 736 for autonomous driving functions, a second controller 736 for functional safety functions, a third controller 736 for artificial intelligence functions (e.g., computer vision), a fourth controller 736 for infotainment functions, a fifth controller 736 for redundancy in emergency situations, and / or other controllers. In some instances, a single controller 736 may handle two or more of the foregoing functions, and two or more controllers 736 may handle a single function and / or any combination thereof.

[0062] Controller 736 may provide signals to control one or more components and / or systems of vehicle 700 in response to sensor data (e.g., sensor inputs) received from one or more sensors. The sensor data may be received from, for example, and without limitation, global navigation satellite system sensors 758 (e.g., global positioning system sensors), RADAR sensors 760, ultrasonic sensors 762, LIDAR sensors 764, inertial measurement unit (IMU) sensors 766 (e.g., accelerometers, gyroscopes, magnetic compasses, magnetometers, etc.), microphones 796, stereo cameras 768, wide-view cameras 770 (e.g., fisheye cameras), infrared cameras 772, surround cameras 774 (e.g., 360-degree cameras), long-range and / or medium-range cameras 798, speed sensors 744 (e.g., for measuring the speed of the vehicle 700), vibration sensors 742, steering sensors 740, brake sensors (e.g., as part of a brake sensor system 746), and / or other sensor types.

[0063] One or more of the controllers 736 may receive input (e.g., represented by input data) from the instrument cluster 732 of the vehicle 700 and provide output (e.g., represented by output data, display data, etc.) via a human-machine interface (HMI) display 734, an audible annunciator, a loudspeaker, and / or other components of the vehicle 700. The output may include information such as vehicle velocity, speed, time, map data (e.g., HD map 722 of FIG. 7C ), position data (e.g., the position of the vehicle 700 on a map, etc.), direction, the positions of other vehicles (e.g., an occupancy grid), information about objects and the status of objects as known by the controller 736, etc. For example, the HMI display 734 may display information regarding the presence of one or more objects (e.g., road signs, warning signs, traffic light changes, etc.) and / or a driving maneuver the vehicle has performed, is performing, or will perform (e.g., changing lanes now, taking exit 34B in 3.22 km (2 miles), etc.).

[0064] Vehicle 700 further includes a network interface 724 that can communicate over one or more networks using one or more wireless antennas 726 and / or a modem. For example, network interface 724 may be capable of communication over LTE, WCDMA, UMTS, GSM, CDMA2000, etc. Wireless antenna 726 may also enable communication between objects in the environment (e.g., vehicles, mobile devices, etc.) using local area networks such as Bluetooth, Bluetooth LE, Z-Wave, ZigBee, etc., and / or low power wide-area networks (LPWANs) such as LoRaWAN, SigFox, etc.

[0065] 7B is an illustration of camera positions and fields of view of the exemplary autonomous vehicle 700 of FIG. 7A, according to some embodiments of the present disclosure. The cameras and their respective fields of view are one illustrative example and are not intended to be limiting. For example, additional and / or alternative cameras may be included and / or the cameras may be located in different positions on the vehicle 700.

[0066] The camera type may include, but is not limited to, a digital camera adapted for use with components and / or systems of vehicle 700. The camera may be capable of operating at automotive safety integrity level (ASIL) B and / or at another ASIL. The camera type may be capable of any image capture rate, such as 60 frames per second (fps), 120 fps, 240 fps, etc., depending on the embodiment. The camera may be capable of using a rolling shutter, a global shutter, another type of shutter, or a combination thereof. In some instances, the color filter array may include a red clear clear clear (RCCC) color filter array, a red clear clear blue (RCCB) color filter array, a red blue green clear (RBGC) color filter array, a Foveon X3 color filter array, a Bayer sensor (RGGB) color filter array, a monochrome sensor color filter array, and / or another type of color filter array. In some embodiments, clear pixel cameras, such as cameras with RCCC, RCCB, and / or RBGC color filter arrays, may be used in an effort to increase light sensitivity.

[0067] In some instances, one or more of the cameras may be used to perform advanced driver assistance system (ADAS) functions (e.g., as part of a redundant or fail-safe design). For example, a multi-function mono camera may be installed to provide functions including lane departure warning, traffic sign assist, and intelligent headlamp control. One or more of the cameras (e.g., all cameras) may simultaneously record and provide image data (e.g., video).

[0068] One or more of the cameras may be mounted in a mounting part, such as a custom-designed (e.g., 3D printed) part, to filter out stray light and reflections from within the vehicle (e.g., reflections from the dashboard reflected in the windshield mirror) that may interfere with the camera's image data capture ability. Referring to a side mirror mounting part, the side mirror part may be custom 3D printed so that the camera mounting plate fits the shape of the side mirror. In some instances, the camera may be integrated into the side mirror. For side view cameras, the camera may also be integrated into four posts at each corner of the cabin.

[0069] A camera (e.g., a forward-facing camera) with a field of view that includes a portion of the environment in front of the vehicle 700 may be used for surround view to help identify the forward path and obstacles and, with the assistance of one or more controllers 736 and / or control SoCs, provide information essential for generating an occupancy grid and / or determining a preferred vehicle path. Forward-facing cameras may be used to perform many of the same ADAS functions as LIDAR, including emergency braking, pedestrian detection, and collision avoidance. Forward-facing cameras may also be used for ADAS features and systems, including other functions such as lane departure warning (LDW), autonomous cruise control (ACC), and / or traffic sign recognition.

[0070] Various cameras may be used in a forward-facing configuration, including, for example, a monocular camera platform including a complementary metal oxide semiconductor (CMOS) color imager. Another example may be a wide-view camera 770 that may be used to understand objects entering the view from the periphery (e.g., pedestrians, crossing traffic, or bicycles). While only one wide-view camera is shown in FIG. 7B, any number of wide-view cameras 770 may be present in the vehicle 700. Additionally, a long-range camera 798 (e.g., a long-view stereo camera pair) may be used for depth-based object detection, particularly for objects for which a neural network has not yet been trained. The long-range camera 798 may also be used for object detection and classification, as well as basic object tracking.

[0071] One or more stereo cameras 768 may also be included in the forward-facing configuration. The stereo camera 768 may include an integrated control unit with an extensible processing unit, which may provide programmable logic (FPGA) and a multi-core microprocessor with a CAN or Ethernet interface integrated on a single chip. Such a unit may be used to generate a 3D map of the vehicle's environment, including distance estimates for all points in the image. An alternative stereo camera 768 may include a compact stereo vision sensor, which may include two camera lenses (one on the left and one on the right) and an image processing chip that can measure the distance from the vehicle to objects and use the generated information (e.g., metadata) to activate autonomous emergency braking and lane departure warning features. Other types of stereo cameras 768 may be used in addition to or instead of those described herein.

[0072] Cameras having a field of view that includes portions of the environment to the sides of the vehicle 700 (e.g., side-view cameras) may be used for surround view, providing information used to create and update the occupancy grid and to generate side-impact collision warnings. For example, surround cameras 774 (e.g., four surround cameras 774 as shown in FIG. 7B ) may be positioned on the vehicle 700. The surround cameras 774 may include wide-view cameras 770, fisheye cameras, 360-degree cameras, and / or the like. For example, four fisheye cameras may be positioned at the front, rear, and sides of the vehicle. In an alternative arrangement, the vehicle may use three surround cameras 774 (e.g., left, right, and rear) and utilize one or more other cameras (e.g., a forward-facing camera) as a fourth surround view camera.

[0073] A camera having a field of view that includes the portion of the environment behind the vehicle 700 (e.g., a rearview camera) may be used for parking assistance, surround view, rear collision warning, and creating and updating an occupancy grid. As described herein, a wide variety of cameras may be used, including, but not limited to, cameras that are also suitable as forward-facing cameras (e.g., long-range and / or mid-range camera 798, stereo camera 768, infrared camera 772, etc.).

[0074] FIG. 7C is a block diagram of an example system architecture for the example autonomous vehicle 700 of FIG. 7A , in accordance with some embodiments of the present disclosure. It should be understood that this and other arrangements described herein are merely illustrative. Other arrangements and elements (e.g., machines, interfaces, functions, sequences, groupings of functions, etc.) may be used in addition to or instead of those shown, and some elements may be omitted altogether. Furthermore, many of the elements described herein are functional entities that may be implemented as separate or distributed components or in conjunction with other components, and in any suitable combination and location. Various functions described herein as being performed by entities may be implemented by hardware, firmware, and / or software. For example, various functions may be implemented by a processor executing instructions stored in a memory.

[0075] Each of the components, features, and systems of the vehicle 700 in FIG. 7C is shown connected via a bus 702. The bus 702 may include a controller area network (CAN) data interface (alternatively referred to as a "CAN bus"). The CAN may be a network within the vehicle 700 used to help control various features and functions of the vehicle 700, such as braking, acceleration, braking, steering, windshield wiper operation, etc. The CAN bus may be configured to have dozens or even hundreds of nodes, each with its own unique identifier (e.g., CAN ID). The CAN bus may be read to determine steering angle, ground speed, engine revolutions per minute (RPM), button position, and / or other vehicle status indicators. The CAN bus may be ASIL B compliant.

[0076] Although the bus 702 is described herein as being a CAN bus, this is not intended to be limiting. For example, FlexRay and / or Ethernet may be used in addition to or as an alternative to a CAN bus. Additionally, although a single line is used to represent the bus 702, this is not intended to be limiting. There may be any number of buses 702, which may include, for example, one or more CAN buses, one or more FlexRay buses, one or more Ethernet buses, and / or one or more other types of buses using different protocols. In some instances, two or more buses 702 may be used to perform different functions and / or for redundancy. For example, a first bus 702 may be used for collision avoidance functions, and a second bus 702 may be used for operational control. In any instance, each bus 702 may communicate with any of the components of the vehicle 700, and two or more buses 702 may communicate with the same component. In some instances, each SoC 704, each controller 736, and / or each computer in the vehicle may have access to the same input data (e.g., input from sensors in the vehicle 700) and may be connected to a common bus, such as a CAN bus.

[0077] Vehicle 700 may include one or more controllers 736, such as those described herein with respect to FIG. 7A. Controller 736 may be used for a variety of functions. Controller 736 may be coupled to any of various other components and systems of vehicle 700 and may be used for control of vehicle 700, artificial intelligence of vehicle 700, infotainment for vehicle 700, and / or the like.

[0078] The vehicle 700 may include a system-on-chip (SoC) 704. The SoC 704 may include a CPU 706, a GPU 708, a processor 710, a cache 712, an accelerator 714, a data store 716, and / or other components and features not shown. The SoC 704 may be used to control the vehicle 700 in a variety of platforms and systems. For example, the SoC 704 may be coupled in a system (e.g., that of the vehicle 700) with an HD map 722 that can obtain map refreshes and / or updates via a network interface 724 from one or more servers (e.g., server 778 of FIG. 7D ).

[0079] CPU 706 may include a CPU cluster or CPU complex (alternatively referred to as a "CCPLEX"). CPU 706 may include multiple cores and / or L2 caches. For example, in some embodiments, CPU 706 may include eight cores in a coherent multiprocessor configuration. In some embodiments, CPU 706 may include four dual-core clusters, each with its own dedicated L2 cache (e.g., a 2M B L2 cache). CPU 706 (e.g., a CCPLEX) may be configured to support simultaneous cluster operation, allowing any combination of CPU 706 clusters to be active at any given time.

[0080] The CPU 706 may implement power management capabilities including one or more of the following features: individual hardware blocks may be automatically clock gated when idle to conserve dynamic power; each core clock may be gated when the core is not actively executing instructions by executing a WFI / WFE instruction; each core may be independently power gated; each core cluster may be independently clock gated when all cores are clock gated or power gated; and / or each core cluster may be independently power gated when all cores are power gated. The CPU 706 may further implement an enhanced algorithm for managing power states, where allowable power states and expected wake-up times are specified and hardware / microcode determines the best power state for entering the cores, clusters, and CCPLEX. The processing cores may support simplified power state entry sequences in software with work offloaded to microcode.

[0081] GPU 708 may include an integrated GPU (alternatively referred to herein as an "iGPU"). GPU 708 may be programmable and efficient for parallel workloads. In some instances, GPU 708 may use an enhanced tensor instruction set. GPU 708 may include one or more streaming microprocessors, where each streaming microprocessor may include an L1 cache (e.g., an L1 cache having at least 96 KB of storage capacity) and two or more of the streaming microprocessors may share a cache (e.g., an L2 cache having 512 KB of storage capacity). In some embodiments, GPU 708 may include at least eight streaming microprocessors. GPU 708 may use a compute application programming interface (API). Additionally, GPU 708 may use one or more parallel computing platforms and / or programming models (e.g., NVIDIA's CUDA).

[0082] The GPU 708 may be power-optimized for best performance in automotive and embedded use cases. For example, the GPU 708 may be fabricated on FinFET (Fin field-effect transistor) chips. However, this is not intended to be limiting, and the GPU 708 may be fabricated using other semiconductor fabrication processes. Each streaming microprocessor may incorporate several mixed-precision processing cores partitioned into multiple blocks. For example, and without limitation, 64 PF32 cores and 32 PF64 cores may be partitioned into four processing blocks. In such an example, each processing block may be assigned 16 FP32 cores, 8 FP64 cores, 16 INT32 cores, two mixed-precision NVIDIA tensor cores for deep learning matrix operations, an L0 instruction cache, a warp scheduler, a dispatch unit, and / or a 64KB register file. Additionally, the streaming microprocessor may include independent parallel integer and floating-point data paths to provide efficient execution of workloads with a mix of computational and addressing operations. Streaming microprocessors may include independent thread scheduling capabilities to allow finer-grained synchronization and coordination among concurrent threads. Streaming microprocessors may include a combined L1 data cache and shared memory unit to improve performance while simplifying programming.

[0083] The GPU 708 may, in some instances, include a high bandwidth memory (HBM) and / or 16GB HBM2 memory subsystem to provide up to 900GB / s of peak memory bandwidth. In some instances, synchronous graphics random-access memory (SGRAM), such as graphics double data rate type five synchronous random-access memory (GDDR5), may be used in addition to or in place of the HBM memory.

[0084] The GPU 708 may include unified memory technology, including access counters, to enable more accurate movement of memory pages to the processors that access them most frequently, thereby improving the efficiency of storage areas shared between processors. In some instances, address translation service (ATS) support may be used to enable the GPU 708 to directly access the CPU 706 page tables. In such instances, when the GPU 708 memory management unit (MMU) experiences a miss, an address translation request may be sent to the CPU 706. In response, the CPU 706 may consult its page table for a virtual-to-real mapping of addresses and send the translation back to the GPU 708. As such, unified memory technology may enable a single unified virtual address space for both CPU 706 and GPU 708 memory, thereby simplifying GPU 708 programming and porting of applications to the GPU 708.

[0085] Additionally, GPU 708 may include access counters that can record the frequency of GPU 708's accesses to the memory of other processors. The access counters can help ensure that memory pages are moved to the physical memory of the processors that are accessing the pages most frequently.

[0086] The SoC 704 may include any number of caches 712, including those described herein. For example, the cache 712 may include an L3 cache available to both the CPU 706 and the GPU 708 (e.g., connected to both the CPU 706 and the GPU 708). The cache 712 may include a write-back cache that can record line state, such as by using a cache coherence protocol (e.g., MEI, MESI, MSI, etc.). The L3 cache may include 4 MB or more, depending on the implementation, although smaller cache sizes may also be used.

[0087] The SoC 704 may include an arithmetic logic unit (ALU) that may be utilized in performing processing for any of various tasks or operations (e.g., processing DNNs) of the vehicle 700. Additionally, the SoC 704 may include a floating point unit (FPU) (or other math coprocessor or math coprocessor type) for performing mathematical operations within the system. For example, the SoC 104 may include one or more FPUs integrated as execution units within the CPU 706 and / or GPU 708.

[0088] The SoC 704 may include one or more accelerators 714 (e.g., hardware accelerators, software accelerators, or a combination thereof). For example, the SoC 704 may include a hardware acceleration cluster, which may include optimized hardware accelerators and / or large on-chip memory. The large on-chip memory (e.g., 4 MB of SRAM) may enable the hardware acceleration cluster to accelerate neural networks and other operations. The hardware acceleration cluster may be used to complement the GPU 708 and to offload some of the GPU 708's tasks (e.g., to free up more cycles for the GPU 708 to perform other tasks). As an example, the accelerator 714 may be used for target workloads that are sufficiently stable to be suitable for acceleration (e.g., perception, convolutional neural networks (CNNs), etc.). As used herein, the term "CNN" may include all types of CNNs, including region-based or regional convolutional neural networks (RCNNs) and Faster RCNNs (e.g., as used for object detection).

[0089] The accelerator 714 (e.g., a hardware acceleration cluster) may include a deep learning accelerator (DLA). The DLA may include one or more tensor processing units (TPUs) that can be configured to provide an additional 10 trillion operations per second for deep learning applications and inference. The TPU may be an accelerator configured and optimized to perform image processing functions (e.g., CNN, RCNN, etc.). The DLA may also be optimized for a specific set of neural network types and floating-point operations, as well as inference. The DLA design can provide more performance per millimeter than a general-purpose GPU, significantly exceeding the performance of a CPU. The TPU can perform several functions, including, for example, single-instance convolution functions, supporting INT8, INT16, and FP16 data types for both features and weights, and post-processor functions.

[0090] The DLA can quickly and efficiently run neural networks, particularly CNNs, on processed or unprocessed data for any of a variety of functions, including, but not limited to: CNNs for object identification and detection using data from camera sensors, CNNs for distance estimation using data from camera sensors, CNNs for emergency vehicle detection and identification using data from microphones, CNNs for face recognition and vehicle owner identification using data from camera sensors, and / or CNNs for security and / or safety related events.

[0091] The DLA can perform any function of the GPU 708, and by using an inference accelerator, for example, a designer can target either the DLA or the GPU 708 for any function. For example, a designer can focus on processing CNNs and floating-point operations on the DLA, and offload other functions to the GPU 708 and / or other accelerators 714.

[0092] The accelerator 714 (e.g., a hardware acceleration cluster) may include a programmable vision accelerator (PVA), which may alternatively be referred to herein as a computer vision accelerator. The PVA may be designed and configured to accelerate computer vision algorithms for advanced driver assistance systems (ADAS), autonomous driving, and / or augmented reality (AR) and / or virtual reality (VR) applications. The PVA may provide a balance between performance and flexibility. For example, each PVA may include, but is not limited to, any number of reduced instruction set computer (RISC) cores, direct memory access (DMA), and / or any number of vector processors.

[0093] The RISC cores may interact with an image sensor (e.g., an image sensor in any of the cameras described herein), an image signal processor, and / or the like. Each RISC core may include any amount of memory. The RISC cores may use any of several protocols, depending on the embodiment. In some instances, the RISC cores may execute a real-time operating system (RTOS). The RISC cores may be implemented using one or more integrated circuit devices, application specific integrated circuits (ASICs), and / or memory devices. For example, the RISC cores may include an instruction cache and / or tightly coupled RAM.

[0094] The DMA may enable components of the PVA to access system memory independent of the CPU 706. The DMA may support any number of features used to provide optimizations to the PVA, including, but not limited to, supporting multi-dimensional addressing and / or circular addressing. In some instances, the DMA may support up to six or more dimensions of addressing, which may include block width, block height, block depth, horizontal block stepping, vertical block stepping, and / or depth stepping.

[0095] A vector processor may be a programmable processor that can be designed to efficiently and flexibly execute computer vision algorithm programming and provide signal processing capabilities. In some instances, a PVA may include a PVA core and two vector processing subsystem partitions. The PVA core may include a processor subsystem, a DMA engine (e.g., two DMA engines), and / or other peripherals. The vector processing subsystem may act as the PVA's primary processing engine and may include a vector processing unit (VPU), an instruction cache, and / or a vector memory (e.g., VMEM). The VPU core may include a digital signal processor, such as a single instruction, multiple data (SIMD), or very long instruction word (VLIW) digital signal processor. The combination of SIMD and VLIW can increase throughput and speed.

[0096] Each vector processor may include an instruction cache and may be coupled to dedicated memory. As a result, in some instances, each vector processor may be configured to execute independently of other vector processors. In other instances, the vector processors included in a particular PVA may be configured to employ data parallelism. For example, in some embodiments, multiple vector processors included in a single PVA may execute the same computer vision algorithm, but on different regions of an image. In other instances, the vector processors included in a particular PVA may execute different computer vision algorithms simultaneously on the same image, or even execute different algorithms on sequential images or portions of an image. In particular, any number of PVAs may be included in a hardware-accelerated cluster, and any number of vector processors may be included in each PVA. Additionally, the PVA may include additional error correcting code (ECC) memory to enhance overall system security.

[0097] The accelerator 714 (e.g., a hardware acceleration cluster) may include a computer vision network-on-chip and SRAM to provide high-bandwidth, low-latency SRAM for the accelerator 714. In some instances, the on-chip memory may include, for example, and without limitation, at least 4 MB of SRAM consisting of eight field-configurable memory blocks that may be accessible by both the PVA and DLA. Each pair of memory blocks may include an advanced peripheral bus (APB) interface, configuration circuitry, a controller, and a multiplexer. Any type of memory may be used. The PVA and DLA can access the memory through a backbone that provides the PVA and DLA with high-speed access to the memory. The backbone may include a computer vision network-on-chip that interconnects the PVA and DLA to the memory (e.g., using the APB).

[0098] The computer vision network-on-chip may include an interface that determines, prior to the transmission of any control signals, addresses, or data, that both the PVA and DLA provide ready and valid signals. Such an interface may provide separate phases and separate channels for transmitting control signals, addresses, and data, as well as burst-type communication for continuous data transfer. This type of interface may conform to the ISO 26262 or IEC 61508 standards, although other standards and protocols may also be used.

[0099] In some instances, SoC 704 may include a real-time ray tracing hardware accelerator, such as that described in U.S. Patent Application Publication No. 2009 / 0229994. The real-time ray tracing hardware accelerator may be used to quickly and efficiently determine the location and scale of objects (e.g., within a world model) to generate real-time visualization simulations for RADAR signal interpretation, for acoustic propagation synthesis and / or analysis, for SONAR system simulation, for general wave propagation simulation, for comparison to LIDAR data for localization and / or other functions, and / or other uses. In some embodiments, one or more tree traversal units (TTUs) may be used to perform one or more ray tracing-related operations.

[0100] The accelerator 714 (e.g., a hardware accelerator cluster) has diverse applications for autonomous driving. The PVA may be a programmable vision accelerator that can be used for critical processing stages in ADAS and autonomous vehicles. The capabilities of the PVA make it well suited to algorithmic domains that require predictable processing at low power and low latency. In other words, the PVA works well for semi-dense or dense regular computations on small data sets that require predictable execution times with low latency and low power. Therefore, because the PVA is efficient at object detection and integer computation, in the context of a platform for autonomous vehicles, the PVA is designed to run classic computer vision algorithms.

[0101] For example, according to one embodiment of the present technology, PVA is used to perform computer stereo vision. A semi-global matching-based algorithm may be used in some instances, but this is not intended to be limiting. Many applications for Level 3-5 autonomous driving require motion estimation / stereo matching on the fly (e.g., structure from motion, pedestrian recognition, lane detection, etc.). PVA can perform computer stereo vision functions with input from two monocular cameras.

[0102] In some instances, PVA may be used to perform dense optical flow by processing raw RADAR data (e.g., using a 4D Fast Fourier Transform) to provide processed RADAR. In other instances, PVA is used in time of flight depth processing, for example, by processing raw time of flight data to provide processed time of flight data.

[0103] DLA can be used to implement any type of network to enhance control and driving safety, including, for example, a neural network that outputs a confidence measure for each object detection. Such a confidence value can be interpreted as a probability or as providing the relative "weight" of each detection compared to other detections. This confidence value allows the system to make further decisions regarding which detections should be considered true positives rather than false positives. For example, the system can set a confidence threshold and consider only detections above the threshold as true positives. In an automatic emergency braking (AEB) system, a false positive detection would cause the vehicle to automatically apply emergency braking, which is clearly undesirable. Therefore, only the most confident detections should be considered to trigger AEB. DLA can implement a neural network that regresses the confidence value. The neural network may receive as its input at least some subset of parameters, such as bounding box dimensions, ground plane estimates obtained (e.g., from another subsystem), inertial measurement unit (IMU) sensor 766 outputs that correlate with vehicle 700 orientation, range, and 3D position estimates of objects obtained from the neural network and / or other sensors (e.g., LIDAR sensor 764 or RADAR sensor 760), and others.

[0104] The SoC 704 may include a data store 716 (e.g., memory). The data store 716 may be on-chip memory of the SoC 704 and may store neural networks to be executed by the GPU and / or DLA. In some instances, the data store 716 may have a capacity large enough to store multiple instances of the neural network for redundancy and safety. The data store 716 may comprise an L2 or L3 cache 712. References to the data store 716 may include references to memory associated with the GPU, DLA, and / or other accelerators 714, as described herein.

[0105] The SoC 704 may include one or more processors 710 (e.g., embedded processors). The processors 710 may include a boot and power management processor, which may be a dedicated processor and subsystem for handling boot power and management capabilities and related security enforcement. The boot and power management processor may be part of the SoC 704 boot sequence and may provide run-time power management services. The boot power and management processor may provide clock and voltage programming, assist with system low-power state transitions, manage the SoC 704 thermal and temperature sensors, and / or manage the SoC 704 power state. Each temperature sensor may be implemented as a ring oscillator whose output frequency is proportional to temperature, and the SoC 704 may use the ring oscillator to detect the temperature of the CPU 706, GPU 708, and / or accelerator 714. If the temperature is determined to exceed a threshold, the boot and power management processor may enter a temperature fault routine, place the SoC 704 in a lower power state, and / or place the vehicle 700 in a Chauffeur safe shutdown mode (e.g., bring the vehicle 700 to a safe shutdown).

[0106] The processor 710 may further include a set of embedded processors that can perform the functions of an audio processing engine. The audio processing engine may be an audio subsystem that allows full hardware support for multi-channel audio through multiple interfaces and a wide and flexible range of audio I / O interfaces. In some instances, the audio processing engine is a dedicated processor core that includes a digital signal processor with dedicated RAM.

[0107] The processor 710 may further include an always-on processor engine that can provide the necessary hardware features to support low-power sensor management and wake use cases. The always-on processor engine may include a processor core, tightly coupled RAM, support peripherals (e.g., timers and interrupt controllers), various I / O controller peripherals, and routing logic.

[0108] The processor 710 may further include a safety cluster engine that includes a processor subsystem dedicated to handling safety management for automotive applications. The safety cluster engine may include two or more processor cores, tightly coupled RAM, supporting peripherals (e.g., timers, interrupt controllers, etc.), and / or routing logic. In safety mode, the two or more cores may operate in lockstep mode and function as a single core with comparison logic to detect any differences between their operations.

[0109] The processor 710 may further include a real-time camera engine, which may include a dedicated processor subsystem for handling real-time camera management.

[0110] The processor 710 may further include a high dynamic range signal processor, which may include an image signal processor, which is a hardware engine that is part of the camera processing pipeline.

[0111] The processor 710 may include a video image compositor, which may be a processing block (e.g., implemented in a microprocessor) that implements video post-processing functions required by the video playback application to produce the final image for the player window. The video image compositor may perform lens distortion correction on the wide-view camera 770, the surround camera 774, and / or the in-cabin surveillance camera sensor. The in-cabin surveillance camera sensor is preferably monitored by a neural network running on a separate instance of the advanced SoC, configured to identify in-cabin events and respond appropriately. The in-cabin system may perform lip reading to activate cellular service and make phone calls, dictate emails, change the vehicle's destination, activate or change the vehicle's infotainment system and settings, or provide voice-activated web surfing. Certain features are available to the driver only when operating in autonomous mode and are disabled otherwise.

[0112] The video image combiner may include enhanced temporal noise reduction for both spatial and temporal noise reduction. For example, when motion occurs in the video, the noise reduction reduces the weight of information provided by adjacent frames and appropriately weights spatial information. When an image or portion of an image does not contain motion, the temporal noise reduction performed by the video image combiner can use information from previous images to reduce noise in the current image.

[0113] The video image compositor may also be configured to perform stereo rectification on the input stereo lens frames. The video image compositor may further be used for user interface compositing when the operating system desktop is in use, and the GPU 708 is not required to continuously render new surfaces. Even when the GPU 708 is powered on and actively performing 3D rendering, the video image compositor may be used to offload the GPU 708 to improve performance and responsiveness.

[0114] The SoC 704 may further include a mobile industry processor interface (MIPI) camera serial interface, a high-speed interface for receiving video and input from a camera, and / or a video input block that may be used for camera and related pixel input functions. The SoC 704 may further include an input / output controller that may be controlled by software and that may be used to receive I / O signals that are not committed to a specific role.

[0115] The SoC 704 may further include a wide range of peripheral interfaces to enable communication with peripherals, audio codecs, power management, and / or other devices. The SoC 704 may be used to process data from cameras (e.g., connected via gigabit multimedia serial links and Ethernet), sensors (e.g., LIDAR sensors 764, RADAR sensors 760, etc., which may be connected via Ethernet), data from the bus 702 (e.g., vehicle 700 speed, steering wheel position, etc.), and data from a GNSS sensor 758 (e.g., connected via Ethernet or a CAN bus). The SoC 704 may further include a dedicated high-performance mass storage controller, which may include its own DMA engine and may be used to offload routine data management tasks from the CPU 706.

[0116] The SoC 704 may be an end-to-end platform with a flexible architecture that spans levels 3-5 of automation, thereby providing a comprehensive functional safety architecture that leverages and efficiently uses computer vision and ADAS techniques for diversity and redundancy, and provides a platform for a flexible, reliable driving software stack along with deep learning tools. The SoC 704 may be faster, more reliable, and more energy- and space-efficient than conventional systems. For example, when the accelerator 714 is combined with the CPU 706, GPU 708, and data store 716, it can provide a fast and efficient platform for levels 3-5 of autonomous vehicles.

[0117] This technology therefore offers capabilities and functionality not achievable by conventional systems. For example, computer vision algorithms can be implemented on a central processing unit (CPU), which can be configured using a high-level programming language, such as the C programming language, to execute a wide variety of processing algorithms across a wide variety of visual data. However, CPUs often cannot meet the performance requirements of many computer vision applications, including those related to execution time and power consumption. Specifically, many CPUs cannot execute complex object detection algorithms in real time, a requirement for in-vehicle ADAS applications and practical Level 3-5 autonomous vehicles.

[0118] In contrast to conventional systems, by providing a CPU complex, a GPU complex, and a hardware acceleration cluster, the technology described herein allows multiple neural networks to run simultaneously and / or serially and the results to be combined to enable Level 3-5 autonomous driving capabilities. For example, a CNN running on the DLA or dGPU (e.g., GPU720) can include text and word recognition, enabling the supercomputer to read and understand traffic signs, including signs for which the neural network was not specifically trained. The DLA can further include a neural network that can identify, interpret, and provide a semantic understanding of the signs and pass the semantic understanding to a route planning module running on the CPU complex.

[0119] As another example, multiple neural networks may be run simultaneously, as required for Level 3, 4, or 5 driving. For example, a warning sign consisting of "Caution: Flashing lights indicate icy conditions" along with an electric light may be interpreted independently or collectively by several neural networks. The sign itself may be identified as a traffic sign by a first deployed neural network (e.g., a trained neural network), and the text "Flashing lights indicate icy conditions" may be interpreted by a second deployed neural network that notifies the vehicle's route planning software (preferably running on a CPU complex) that icy conditions exist when the flashing light is detected. The flashing light may be identified by running a third deployed neural network over multiple frames, informing the vehicle's route planning software of the presence (or absence) of the flashing light. All three neural networks may run simultaneously, such as within the DLA and / or on the GPU 708.

[0120] In some instances, a CNN for facial recognition and vehicle owner identification can use data from the camera sensors to identify the presence of a legitimate driver and / or owner of the vehicle 700. An always-on sensor processing engine can be used to unlock the vehicle and turn on the lights when the owner approaches the driver's side door, and in security mode, to disable vehicle operation when the owner leaves the vehicle. In this way, the SoC 704 provides security against theft and / or carjacking.

[0121] In another example, a CNN for emergency vehicle detection and identification can detect and identify emergency vehicle sirens using data from microphone 796. In contrast to conventional systems that use general classifiers to detect sirens and manually extract features, SoC 704 uses CNNs for environmental and urban sound classification, as well as visual data classification. In a preferred embodiment, the CNN running on the DLA is trained to identify the relative terminal velocity of emergency vehicles (e.g., by using the Doppler effect). The CNN can also be trained to identify emergency vehicles specific to the local area in which the vehicle is operating, as identified by GNSS sensor 758. Thus, for example, when operating in Europe, the CNN would attempt to detect European sirens, and when in the United States, the CNN would attempt to identify only North American sirens. After an emergency vehicle is detected, a control program can be used to perform emergency vehicle safety routines, such as slowing the vehicle down, stopping it at the side of the road, parking it, and / or idling it, with the assistance of ultrasonic sensor 762, until the emergency vehicle has passed.

[0122] The vehicle may include a CPU 718 (e.g., a discrete CPU or dCPU) that may be coupled to the SoC 704 via a high-speed interconnect (e.g., PCIe). The CPU 718 may include, for example, an X86 processor. The CPU 718 may be used to perform any of a variety of functions, including, for example, reconciling potentially inconsistent results between the ADAS sensors and the SoC 704 and / or monitoring the status and health of the controller 736 and / or infotainment SoC 730.

[0123] Vehicle 700 may include a GPU 720 (e.g., a discrete GPU or dGPU) that may be coupled to SoC 704 via a high-speed interconnect (e.g., NVIDIA's NVLINK). GPU 720 may provide additional artificial intelligence functionality, such as by running redundant and / or different neural networks, and may be used to train and / or update neural networks based on input (e.g., sensor data) from sensors of vehicle 700.

[0124] The vehicle 700 may further include a network interface 724, which may include one or more wireless antennas 726 (e.g., one or more wireless antennas for different communication protocols, such as a cellular antenna, a Bluetooth antenna, etc.). The network interface 724 may be used to enable wireless connections with the cloud over the Internet (e.g., with a server 778 and / or other network devices), with other vehicles, and / or with computing devices (e.g., passenger client devices). To communicate with other vehicles, a direct link may be established between the two vehicles and / or an indirect link may be established (e.g., through a network and via the Internet). A direct link may be provided using a vehicle-to-vehicle communication link. The vehicle-to-vehicle communication link may provide the vehicle 700 with information about vehicles in its vicinity (e.g., vehicles in front of, beside, and / or behind the vehicle 700). This functionality may be part of a cooperative adaptive cruise control function of the vehicle 700.

[0125] The network interface 724 may include an SoC that provides modulation and demodulation functions and enables the controller 736 to communicate over a wireless network. The network interface 724 may include a radio frequency front end for upconversion from baseband to radio frequency and downconversion from radio frequency to baseband. The frequency conversion may be performed through well-known processes and / or may be performed using a superheterodyne process. In some instances, the radio frequency front end functionality may be provided by a separate chip. The network interface may include wireless functionality for communicating via LTE, WCDMA, UMTS, GSM, CDMA2000, Bluetooth, Bluetooth LE, Wi-Fi, Z-Wave, ZigBee, LoRaWAN, and / or other wireless protocols.

[0126] Vehicle 700 may further include a data store 728, which may include off-chip (e.g., off-SoC 704) storage. Data store 728 may include one or more memory elements, including RAM, SRAM, DRAM, VRAM, flash, hard disk, and / or other components and / or devices capable of storing at least one bit of data.

[0127] The vehicle 700 may further include a GNSS sensor 758. The GNSS sensor 758 (e.g., a GPS, an aided GPS sensor, a differential GPS (DGPS) sensor, etc.) aids in mapping, perception, occupancy grid generation, and / or route planning functions. Any number of GNSS sensors 758 may be used, including, for example, but not limited to, a GPS using a USB connector with an Ethernet to serial (RS-232) bridge.

[0128] Vehicle 700 may further include a RADAR sensor 760. The RADAR sensor 760 may be used by vehicle 700 for long-range vehicle detection, even in darkness and / or severe weather conditions. The RADAR functional safety level may be ASIL B. In some instances, the RADAR sensor 760 may use CAN and / or bus 702 for control and to access object tracking data (e.g., to transmit data generated by the RADAR sensor 760), with access to Ethernet for accessing raw data. A wide variety of RADAR sensor types may be used. For example, and without limitation, the RADAR sensor 760 may be suitable for front, rear, and side RADAR use. In some instances, a pulse-Doppler RADAR sensor is used.

[0129] The RADAR sensor 760 may include different configurations, such as long-range with a narrow field of view, short-range with a wide field of view, and short-range side coverage. In some instances, long-range RADAR may be used for adaptive cruise control functions. Long-range RADAR systems may provide a wide field of view achieved by two or more independent scans, such as within a 250-meter range. The RADAR sensor 760 may help distinguish between static and moving objects and may be used by ADAS systems for emergency brake assist and forward collision warning. Long-range RADAR sensors may include monostatic multimodal RADAR with multiple (e.g., six or more) fixed RADAR antennas and high-speed CAN and FlexRay interfaces. In one example with six antennas, the center four antennas may create a focused beam pattern designed to record the vehicle 700's surroundings at high speeds with minimal interference from traffic in adjacent lanes. The other two antennas may widen the field of view, allowing for rapid detection of vehicles entering or leaving the vehicle's lane.

[0130] As an example, a medium-range RADAR system may include a range of up to 760 meters (front) or 80 meters (rear) and a field of view of up to 42 degrees (front) or 750 degrees (rear). A short-range RADAR system may include, but is not limited to, a RADAR sensor designed to be mounted on either end of the rear bumper. When mounted on either end of the rear bumper, such a RADAR sensor system can create two beams that constantly monitor the blind spots behind and adjacent to the vehicle.

[0131] Short-range RADAR systems may be used in ADAS systems for blind spot detection and / or lane change assist.

[0132] Vehicle 700 may further include ultrasonic sensors 762. The ultrasonic sensors 762, which may be positioned on the front, rear, and / or sides of vehicle 700, may be used for parking assistance and / or for creating and updating an occupancy grid. A variety of ultrasonic sensors 762 may be used, and different ultrasonic sensors 762 may be used for different ranges of detection (e.g., 2.5 m, 4 m). The ultrasonic sensors 762 may operate at an ASIL B functional safety level.

[0133] Vehicle 700 may include a LIDAR sensor 764. The LIDAR sensor 764 may be used for object and pedestrian detection, emergency braking, collision avoidance, and / or other functions. The LIDAR sensor 764 may be functional safety level ASIL B. In some instances, vehicle 700 may include multiple (e.g., two, four, six, etc.) LIDAR sensors 764 that can use Ethernet (e.g., to provide data to a Gigabit Ethernet switch).

[0134] In some instances, the LIDAR sensor 764 may be capable of providing a list of objects and their distances in a 360-degree field of view. A commercially available LIDAR sensor 764 may have, for example, an accuracy of 2 cm to 3 cm and an advertised range of approximately 700 m with support for a 700 Mbps Ethernet connection. In some instances, one or more non-protruding LIDAR sensors 764 may be used. In such instances, the LIDAR sensor 764 may be implemented as a small device that may be integrated into the front, rear, sides, and / or corners of the vehicle 700. In such instances, the LIDAR sensor 764 may have a range of 200 m, even for low-reflecting objects, and may provide up to a 120-degree horizontal and 35-degree vertical field of view. A front-mounted LIDAR sensor 764 may be configured for a horizontal field of view between 45 and 135 degrees.

[0135] In some instances, LIDAR technology such as 3D flash LIDAR may also be used. 3D flash LIDAR uses a laser flash as a transmitter to illuminate the vehicle's surroundings up to approximately 200 meters. The flash LIDAR unit includes a receptor that records the laser pulse transit time and the reflected light at each pixel, which in turn corresponds to the range from the vehicle to the object. Flash LIDAR may enable a highly accurate and distortion-free image of the surroundings to be generated with every laser flash. In some instances, four flash LIDAR sensors may be deployed, one on each side of the vehicle 700. Available 3D flash LIDAR systems include solid-state 3D steering array LIDAR cameras (e.g., non-scanning LIDAR devices) with no moving parts other than the blower. Flash LIDAR devices may use 5 nanosecond Class I (eye-safe) laser pulses per frame and may capture reflected laser light in the form of a 3D range point cloud and coregistered intensity data. By using flash LIDAR, and because flash LIDAR is a solid-state device with no moving parts, the LIDAR sensor 764 may be less susceptible to motion blur, vibration, and / or shock.

[0136] The vehicle may further include an IMU sensor 766. In some instances, the IMU sensor 766 may be positioned at the center of the rear axle of the vehicle 700. The IMU sensor 766 may include, for example, but not limited to, an accelerometer, a magnetometer, a gyroscope, a magnetic compass, and / or other sensor types. In some instances, such as in a six-axis application, the IMU sensor 766 may include an accelerometer and a gyroscope, while in a nine-axis application, the IMU sensor 766 may include an accelerometer, a gyroscope, and a magnetometer.

[0137] In some embodiments, the IMU sensor 766 may be implemented as a miniature, high-performance GPS-Aided Inertial Navigation System (GPS / INS) that combines micro-electro-mechanical system (MEMS) inertial sensors, a highly sensitive GPS receiver, and advanced Kalman filtering algorithms to provide estimates of position, velocity, and attitude. As such, in some instances, the IMU sensor 766 may enable the vehicle 700 to estimate heading without requiring input from a magnetic sensor by directly observing and correlating changes in velocity from the GPS to the IMU sensor 766. In some instances, the IMU sensor 766 and the GNSS sensor 758 may be combined in a single integrated unit.

[0138] The vehicle may include a microphone 796 placed in and / or around the vehicle 700. The microphone 796 may be used for emergency vehicle detection and identification, among other things.

[0139] The vehicle may further include any number of camera types, including stereo cameras 768, wide-view cameras 770, infrared cameras 772, surround cameras 774, long-range and / or mid-range cameras 798, and / or other camera types. The cameras may be used to capture image data around the entire exterior of the vehicle 700. The types of cameras used depend on the embodiment and requirements of the vehicle 700, and any combination of camera types may be used to achieve the required coverage around the vehicle 700. Additionally, the number of cameras may vary depending on the embodiment. For example, the vehicle may include six cameras, seven cameras, ten cameras, twelve cameras, and / or another number of cameras. The cameras may support, by way of example only, Gigabit Multimedia Serial Link (GMSL) and / or Gigabit Ethernet. Each camera is described in further detail herein with reference to FIGS. 7A and 7B.

[0140] The vehicle 700 may further include a vibration sensor 742. The vibration sensor 742 may measure vibrations of vehicle components, such as an axle. For example, a change in vibration may indicate a change in the road surface. In another example, when two or more vibration sensors 742 are used, the difference in vibration may be used to determine friction or slippage of the road surface (e.g., when the difference in vibration is between a powered axle and a free-spinning axle).

[0141] The vehicle 700 may include an ADAS system 738. In some instances, the ADAS system 738 may include an SoC. The ADAS system 738 may include autonomous / adaptive / automatic cruise control (ACC), cooperative adaptive cruise control (CACC), forward crash warning (FCW), automatic emergency braking (AEB), lane departure warning (LDW), lane keep assist (LKA), blind spot warning (BSW), rear cross-traffic warning (RCTW), collision warning system (CWS), lane centering (LC), and / or other features and functions.

[0142] The ACC system may use a RADAR sensor 760, a LIDAR sensor 764, and / or a camera. The ACC system may include longitudinal ACC and / or lateral ACC. Longitudinal ACC monitors and controls the distance to the vehicle directly ahead of the vehicle 700 and automatically adjusts the vehicle speed to maintain a safe distance from the vehicle ahead. Lateral ACC performs distance keeping and advises the vehicle 700 to change lanes when necessary. Lateral ACC is related to other ADAS applications such as LCA and CWS.

[0143] CACC uses information from other vehicles, which may be received from other vehicles via a wireless link via the network interface 724 and / or wireless antenna 726, or indirectly via a network connection (e.g., via the Internet). A direct link may be provided by a vehicle-to-vehicle (V2V) communication link, while an indirect link may be an infrastructure-to-vehicle (I2V) communication link. Generally, V2V communication concepts provide information about the immediately preceding vehicle (e.g., the vehicle directly ahead of the vehicle 700 that is in the same lane as the vehicle 700), while I2V communication concepts provide information about traffic further ahead. A CACC system may include either or both I2V and V2V information sources. Given information about vehicles ahead of the vehicle 700, CACC may be more reliable, potentially allowing for smoother traffic flow and reducing road congestion.

[0144] The FCW system is designed to warn the driver of hazards so that the driver can take corrective action. The FCW system uses a forward-facing camera and / or RADAR sensor 760 coupled to a dedicated processor, DSP, FPGA, and / or ASIC, electrically coupled to driver feedback such as a display, speaker, and / or vibration components. The FCW system can provide warnings in the form of an audio or visual alarm, vibration, and / or a quick brake pulse.

[0145] An AEB system can detect an imminent forward collision with another vehicle or other object and automatically apply the brakes if the driver does not take corrective action within specified time or distance parameters. The AEB system can use a forward-facing camera and / or RADAR sensor 760 coupled to a dedicated processor, DSP, FPGA, and / or ASIC. When the AEB system detects a hazard, it typically first alerts the driver to take corrective action to avoid the collision; if the driver does not take corrective action, the AEB system can automatically apply the brakes as part of an effort to prevent, or at least mitigate, the effects of the predicted collision. The AEB system may include techniques such as dynamic brake support and / or collision imminent braking.

[0146] The LDW system provides visual, audible, and / or tactile warnings, such as vibration of the steering wheel or seat, to alert the driver when the vehicle 700 crosses a lane marking. The LDW system does not activate when the driver indicates an intentional lane departure by activating a turn signal. The LDW system may use a forward-facing camera coupled to a dedicated processor, DSP, FPGA, and / or ASIC electrically coupled to driver feedback, such as a display, speaker, and / or vibration components.

[0147] The LKA system is a modification of the LDW system, which provides steering input or braking to correct the vehicle 700 if it begins to drift out of its lane.

[0148] The BSW system detects and alerts the vehicle driver in the vehicle's blind spot. The BSW system can provide visual, audible, and / or tactile warnings to indicate that merging or changing lanes is unsafe. The system may provide additional warnings when the driver uses a turn signal. The BSW system may use a rear-facing camera and / or RADAR sensor 760 coupled to a dedicated processor, DSP, FPGA, and / or ASIC electrically coupled to driver feedback, e.g., a display, speaker, and / or vibration components.

[0149] The RCTW system may provide visual, audible, and / or tactile notification when an object is detected outside the range of the rear camera when the vehicle 700 is backing up. Some RCTW systems include AEB to ensure vehicle brakes are applied to avoid a collision. The RCTW system may use one or more rear-facing RADAR sensors 760 coupled to a dedicated processor, DSP, FPGA, and / or ASIC, electrically coupled to driver feedback, e.g., a display, speaker, and / or vibration components.

[0150] Because conventional ADAS systems alert the driver and allow the driver to determine whether a safety condition truly exists and act accordingly, conventional ADAS systems can be prone to producing false positives that, while not usually catastrophic, can be annoying and distracting to the driver. However, in an autonomous vehicle 700, when results conflict, the vehicle 700 itself must decide whether to heed results from a primary computer or a secondary computer (e.g., the first controller 736 or the second controller 736). For example, in some embodiments, the ADAS system 738 may be a backup and / or secondary computer that provides perception information to a backup computer rationality module. The backup computer rationality monitor can run redundant software on hardware components to detect impairments in perception and dynamic driving tasks. Output from the ADAS system 738 may be provided to a supervisory MCU. When the outputs from the primary and secondary computers conflict, the supervisory MCU must decide how to reconcile the conflict to ensure safe operation.

[0151] In some instances, the primary computer may be configured to provide a reliability score to the supervising MCU indicating the reliability of the primary computer in a selected outcome. If the reliability score exceeds a threshold, the supervising MCU may follow the primary computer's instructions regardless of whether the secondary computers provide conflicting or inconsistent results. If the reliability score does not meet the threshold, and the primary and secondary computers provide different (e.g., conflicting) results, the supervising MCU may arbitrate between the computers to determine the appropriate outcome.

[0152] The supervisory MCU may be configured to execute a neural network trained and configured to determine, based on outputs from the primary and secondary computers, conditions under which the secondary computer will provide a false alarm. Thus, the neural network in the supervisory MCU can learn when the output of the secondary computer can be trusted and when it cannot be trusted. For example, when the secondary computer is a RADAR-based FCW system, the neural network in the supervisory MCU can learn when the FCW identifies a metal object that is not actually dangerous, such as a sewer grate or manhole cover, which triggers an alarm. Similarly, when the secondary computer is a camera-based LDW system, the neural network in the supervisory MCU can learn to ignore the LDW when a bicyclist or pedestrian is present and lane departure is, in fact, the safest maneuver. In embodiments including a neural network running on the supervisory MCU, the supervisory MCU may include at least one of a DLA or a GPU suitable for executing the neural network with associated memory. In a preferred embodiment, the supervising MCU may comprise and / or be included as a component of the SoC 704 .

[0153] In other instances, the ADAS system 738 may include a secondary computer that performs ADAS functions using traditional rules of computer vision. As such, the secondary computer may use classical computer vision rules (if-then), and the presence of a neural network in the supervisory MCU may improve reliability, safety, and performance. For example, diverse implementations and intentional non-identity may make the overall system more fault-tolerant, particularly to failures caused by software (or software-hardware interface) functions. For example, if a software bug or error exists in software running on the primary computer and non-identical software code running on the secondary computer provides the same overall result, the supervisory MCU may have greater confidence that the overall result is correct and that a bug in the software or hardware on the primary computer has not caused a critical error.

[0154] In some instances, the output of the ADAS system 738 may be provided to the perception block of the primary computer and / or the dynamic driving task block of the primary computer. For example, if the ADAS system 738 indicates a forward collision warning due to an object directly ahead, the perception block can use this information when identifying the object. In other instances, the secondary computer may have its own neural network that is trained as described herein, thus reducing the risk of false positives.

[0155] Vehicle 700 may further include an infotainment SoC 730 (e.g., an in-vehicle infotainment system (IVI)). Although illustrated and described as an SoC, the infotainment system need not be an SoC and may include two or more separate components. Infotainment SoC 730 may include a combination of hardware and software that may be used to provide audio (e.g., music, personal digital assistants, navigation instructions, news, radio, etc.), video (e.g., TV, movies, streaming, etc.), telephony (e.g., hands-free calling), network connectivity (e.g., LTE, Wi-Fi, etc.), and / or information services (e.g., navigation system, reverse parking assist, wireless data system, vehicle-related information such as fuel level, total distance traveled, brake fuel level, oil level, door opening / closing, air filter information, etc.) to vehicle 700. For example, the infotainment SoC 730 may be a radio, a disc player, a navigation system, a video player, USB and Bluetooth connectivity, a car computer, in-car entertainment, Wi-Fi, steering wheel audio controls, hands-free voice control, a heads-up display (HUD), an HMI display 734, a telematics device, a control panel (e.g., for controlling and / or interacting with various components, features, and / or systems), and / or other components. The infotainment SoC 730 may further be used to provide information (e.g., visual and / or audible) to a user of the vehicle, such as information from an ADAS system 738, autonomous driving information such as planned vehicle maneuvers, trajectory, surrounding environment information (e.g., intersection information, vehicle information, road information, etc.), and / or other information.

[0156] The infotainment SoC 730 may include GPU functionality. The infotainment SoC 730 may communicate with other devices, systems, and / or components of the vehicle 700 via the bus 702 (e.g., a CAN bus, Ethernet, etc.). In some instances, the infotainment SoC 730 may be coupled to a supervisory MCU so that the infotainment system's GPU can perform some self-drive functions in the event of a failure of the primary controller 736 (e.g., the vehicle's 700 primary and / or backup computer). In such instances, the infotainment SoC 730 may place the vehicle 700 in a Chauffeur safe shutdown mode, as described herein.

[0157] The vehicle 700 may further include an instrument cluster 732 (e.g., a digital dash, an electronic instrument cluster, a digital instrument panel, etc.). The instrument cluster 732 may include a controller and / or a supercomputer (e.g., a separate controller or supercomputer). The instrument cluster 732 may include a set of instruments such as a speedometer, fuel level, oil pressure, a tachometer, an odometer, turn signals, a gear shift position indicator, a seat belt warning light, a parking brake warning light, an engine malfunction light, airbag (SRS) system information, lighting controls, safety system controls, navigation information, etc. In some instances, information may be displayed and / or shared between the infotainment SoC 730 and the instrument cluster 732. In other words, the instrument cluster 732 may be included as part of the infotainment SoC 730, or vice versa.

[0158] 7D is a system diagram of communication between the cloud-based server and the example autonomous vehicle 700 of FIG. 7A in accordance with some embodiments of the present disclosure. System 776 may include a server 778, a network 790, and a vehicle including vehicle 700. Server 778 may include multiple GPUs 784(A)-784(H) (collectively referred to herein as GPUs 784), PCIe switches 782(A)-782(H) (collectively referred to herein as PCIe switches 782), and / or CPUs 780(A)-780(B) (collectively referred to herein as CPUs 780). GPUs 784, CPUs 780, and PCIe switches may be interconnected with a high-speed interconnect, such as, but not limited to, an NVLink interface 788 developed by NVIDIA and / or a PCIe connection 786. In some instances, the GPUs 784 are connected via NVLink and / or NVSwitch SoCs, and the GPUs 784 and PCIe switches 782 are connected via PCIe interconnects. While eight GPUs 784, two CPUs 780, and two PCIe switches are illustrated, this is not intended to be limiting. Depending on the embodiment, each server 778 may include any number of GPUs 784, CPUs 780, and / or PCIe switches. For example, the servers 778 may each include 8, 16, 32, and / or more GPUs 784.

[0159] Server 778 may receive image data from vehicles over network 790, representing images showing unexpected or changed road conditions, such as recently started road construction. Server 778 may transmit neural network 792, updated neural network 792, and / or map information 794, including information about traffic and road conditions, to vehicles over network 790. Updates to map information 794 may include updates to HD map 722, such as information about construction sites, potholes, detours, flooding, and / or other obstacles. In some instances, neural network 792, updated neural network 792, and / or map information 794 may result from new training and / or experience represented in data received from any number of vehicles in the environment and / or based on training performed at a data center (e.g., using server 778 and / or other servers).

[0160] Server 778 may be used to train a machine learning model (e.g., a neural network) based on training data. The training data may be generated by a vehicle and / or generated in a simulation (e.g., using a game engine). In some instances, the training data is tagged (e.g., if the neural network benefits from supervised learning) and / or undergoes other pre-processing, while in other instances, the training data is not tagged and / or pre-processed (e.g., if the neural network does not require supervised learning). The training may be performed according to any one or more classes of machine learning techniques, including, but not limited to, the following classes: supervised training, semi-supervised training, unsupervised training, self-learning, reinforcement learning, federated learning, transfer learning, feature learning (including principal component and cluster analysis), multi-linear subspace learning, manifold learning, representation learning (including preliminary dictionary learning), rule-based machine learning, anomaly detection, and variations or combinations thereof. After the machine-learned model has been traced, it may be used by the vehicle (e.g., transmitted to the vehicle via network 790) and / or it may be used by server 778 to remotely monitor the vehicle.

[0161] In some instances, server 778 may receive data from vehicles and apply the data to state-of-the-art real-time neural networks for real-time intelligent inference. Server 778 may include deep learning supercomputers and / or dedicated AI computers powered by GPUs 784, such as the DGX and DGX Station machines developed by NVIDIA. However, in some instances, server 778 may include a deep learning infrastructure that uses only CPU-powered data centers.

[0162] The deep learning infrastructure of server 778 may be capable of rapid real-time inference, which it may use to evaluate and verify the health of the processor, software, and / or associated hardware within vehicle 700. For example, the deep learning infrastructure may receive periodic updates from vehicle 700 (e.g., via computer vision and / or other machine learning object classification techniques), such as a sequence of images and / or objects where vehicle 700 was located within the sequence of images. The deep learning infrastructure may run its own neural network to identify objects and compare them to objects identified by vehicle 700; if the results are inconsistent and the infrastructure concludes that the AI ​​within vehicle 700 is not functioning properly, server 778 may send a signal to vehicle 700 commanding its failsafe computer to assume control, notify passengers, and complete a safe parking maneuver.

[0163] For inference, the server 778 may include a GPU 784 and one or more programmable inference accelerators (e.g., NVIDIA's TensorRT). The combination of a GPU-powered server and inference acceleration can enable real-time responsiveness. In other instances, such as when less performance is required, servers powered by CPUs, FPGAs, and other processors may be used for inference.

[0164] Exemplary Computing Device 8 is a block diagram of an example computing device 800 suitable for use in implementing some embodiments of the present disclosure. Computing device 800 may include an interconnection system 802 that indirectly or directly couples the following devices: memory 804, one or more central processing units (CPUs) 806, one or more graphics processing units (GPUs) 808, a communications interface 810, input / output (I / O) ports 812, input / output components 814, a power supply 816, one or more presentation components 818 (e.g., displays), and one or more logic units 820. In at least one embodiment, computing device 800 may include one or more virtual machines (VMs), and / or any of its components may include virtual components (e.g., virtual hardware components). As non-limiting examples, one or more of GPUs 808 may include one or more vGPUs, one or more of CPUs 806 may include one or more vCPUs, and / or one or more of logical units 820 may include one or more virtual logical units. As such, computing device 800 may include discrete components (e.g., an entire GPU dedicated to computing device 800), virtual components (e.g., a portion of a GPU dedicated to computing device 800), or a combination thereof.

[0165] While the various blocks in FIG. 8 are depicted as connected via interconnection system 802 with lines, this is not intended to be limiting and is merely for clarity. For example, in some embodiments, a presentation component 818, such as a display device, may be considered an I / O component 814 (e.g., if the display is a touch screen). As another example, CPU 806 and / or GPU 808 may include memory (e.g., memory 804 may represent a storage device in addition to the memory of GPU 808, CPU 806, and / or other components). In other words, the computing devices in FIG. 8 are merely exemplary. Categories such as “workstation,” “server,” “laptop,” “desktop,” “tablet,” “client device,” “mobile device,” “handheld device,” “gaming console,” “electronic control unit (ECU),” “virtual reality system,” and / or other device or system types are all intended to be within the scope of the computing devices in FIG. 8 and therefore will not be distinguished from one another.

[0166] Interconnect system 802 may represent one or more links or buses, such as an address bus, a data bus, a control bus, or a combination thereof. Interconnect system 802 may include one or more bus or link types, such as an industry standard architecture (ISA) bus, an extended industry standard architecture (EISA) bus, a video electronics standards association (VESA) bus, a peripheral component interconnect (PCI) bus, a peripheral component interconnect express (PCIe) bus, and / or another type of bus or link. In some embodiments, direct connections exist between components. As an example, CPU 806 may be directly connected to memory 804. Further, CPU 806 may be directly connected to GPU 808. When direct or point-to-point connections exist between components, interconnect system 802 may include a PCIe link to implement the connections. In these examples, a PCI bus need not be included in computing device 800.

[0167] Memory 804 may include any of a variety of computer-readable media. Computer-readable media may be any available media that can be accessed by computing device 800. Computer-readable media may include both volatile and nonvolatile media, and removable and non-removable media. By way of example, and not limitation, computer-readable media may comprise computer storage media and communication media.

[0168] Computer storage media may include both volatile and nonvolatile media, and / or removable and non-removable media implemented in any method or technology for storage of information, such as computer-readable instructions, data structures, program modules, and / or other data types. For example, memory 804 may store computer-readable instructions (e.g., representing programs and / or program elements), such as an operating system. Computer storage media may include, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and that can be accessed by computing device 800. As used herein, computer storage media does not include the signals themselves.

[0169] Computer storage media may embody computer-readable instructions, data structures, program modules, and / or other data types in a modulated data signal such as a carrier wave or other transport mechanism and include any information delivery media. The term "modulated data signal" may refer to a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. By way of example, and not limitation, computer storage media may include wired media such as a wired network or direct-wired connection, and wireless media such as acoustic, RF, infrared and other wireless media. Combinations of any of the above should also be included within the scope of computer-readable media.

[0170] The CPU 806 may be configured to execute at least some of the computer-readable instructions to control one or more components of the computing device 800 to perform one or more of the methods and / or processes described herein. The CPU 806 may include one or more (e.g., 1, 2, 4, 8, 28, 72, etc.) cores, each capable of simultaneously processing multiple software threads. The CPU 806 may include any type of processor, and may include different types of processors depending on the type of computing device 800 implemented (e.g., a processor with fewer cores for a mobile device and a processor with more cores for a server). For example, depending on the type of computing device 800, the processor may be an Advanced RISC Machines (ARM) processor implemented using Reduced Instruction Set Computing (RISC) or an x86 processor implemented using Complex Instruction Set Computing (CISC). The computing device 800 may include one or more CPUs 806 within one or more microprocessors or auxiliary coprocessors, such as computational coprocessors.

[0171] In addition to or instead of CPU 806, GPU 808 may be configured to execute at least some of the computer-readable instructions to control one or more components of computing device 800 to perform one or more of the methods and / or processes described herein. One or more of GPUs 808 may be integrated GPUs (e.g., with one or more of CPUs 806 and / or one or more of GPUs 808 may be discrete GPUs. In an embodiment, one or more of GPUs 808 may be coprocessors of one or more of CPUs 806. GPU 808 may be used by computing device 800 to render graphics (e.g., 3D graphics) or perform general-purpose computing. For example, GPU 808 may be used with GPGPU (General-Purpose Computing on a GPU) The GPU 808 may be used for graphics processing (GPU). The GPU 808 may include hundreds or thousands of cores capable of processing hundreds or thousands of software threads simultaneously. The GPU 808 may generate pixel data for an output image in response to rendering commands (e.g., rendering commands from the CPU 806 received via a host interface). The GPU 808 may include graphics memory, e.g., display memory, for storing pixel data or any other suitable data, e.g., GPGPU data. The display memory may be included as part of the memory 804. GPU 808 may include two or more GPUs operating in parallel (e.g., via links). The links may connect the GPUs directly (e.g., using NVLINK) or may connect the GPUs via a switch (e.g., using NVSwitch). When coupled together, each GPU 808 may generate pixel data or GPGPU data for a different portion of the output or for a different output (e.g., a first GPU for a first image and a second GPU for a second image). Each GPU may include its own memory or may share memory with other GPUs.

[0172] In addition to or instead of CPU 806 and / or GPU 808, logic unit 820 may be configured to execute at least some of the computer-readable instructions to control one or more of computing devices 800 to perform one or more of the methods and / or processes described herein. In an embodiment, CPU 806, GPU 808, and / or logic unit 820 may discretely or jointly execute any combination of methods, processes, and / or portions thereof. One or more of logic units 820 may be part of and / or integrated with one or more of CPU 806 and / or GPU 808, and / or one or more of logic units 820 may be discrete components to or otherwise external to CPU 806 and / or GPU 808. In an embodiment, one or more of logic units 820 may be a coprocessor of one or more of CPU 806 and / or GPU 808.

[0173] Examples of logic unit 820 include one or more processing cores and / or components thereof, such as a Data Processing Unit (DPU), a Tensor Core (TC), a Tensor Processing Unit (TPU), a Pixel Visual Core (PVC), a Vision Processing Unit (VPU), a Graphics Processing Cluster (GPC), a Texture Processing Cluster (TPC), a Streaming Multiprocessor (SM), a Tree Traversal Unit (TTU), an Artificial Intelligence Accelerator (AIA), a Deep Learning Accelerator (DLA ... Accelerator), arithmetic logic unit (ALU), application specific integrated circuit (ASIC), floating point unit (FPU), input / output (I / O) elements, peripheral component interconnect (PCI) or peripheral component interconnect express (PCIe) elements, and / or the like.

[0174] Communications interface 810 may include one or more receivers, transmitters, and / or transceivers that enable computing device 800 to communicate with other computing devices over electronic communications networks, including wired and / or wireless communications. Communications interface 810 may include components and functionality to enable communication over any of several different networks, such as a wireless network (e.g., Wi-Fi, Z-Wave, W, Bluetooth LE, ZigBee, etc.), a wired network (e.g., communicating over Ethernet or InfiniBand), a low-power wide area network (e.g., LoRaWAN, SigFox, etc.), and / or the Internet. In one or more embodiments, logic unit 820 and / or communications interface 810 may include one or more data processing units (DPUs) to transmit data received over a network and / or via interconnection system 802 directly to one or more GPUs 808 (e.g., their memories).

[0175] The I / O ports 812 may enable the computing device 800 to be logically coupled to other devices, including I / O components 814, presentation components 818, and / or other components, some of which may be built into (e.g., integrated with) the computing device 800. Exemplary I / O components 814 include a microphone, mouse, keyboard, joystick, game pad, game controller, satellite dish, scanner, printer, wireless device, etc. The I / O components 814 may provide a natural user interface (NUI) that processes air gestures, voice, or other physiological input generated by the user. In some cases, the input may be sent to an appropriate network element for further processing. The NUI may implement any combination of voice recognition, stylus recognition, facial recognition, biometric recognition, on-screen and adjacent-screen gesture recognition, air gestures, head and eye tracking, and touch recognition in connection with the display of the computing device 800 (as described in more detail below). Computing device 800 may include a depth camera, such as a stereoscopic camera system, an infrared camera system, an RGB camera system, touch screen technology, and combinations thereof, for gesture detection and recognition. Additionally, computing device 800 may include an accelerometer or gyroscope (e.g., as part of an inertia measurement unit (IMU)) to enable detection of movement. In some instances, the output of the accelerometer or gyroscope may be used by computing device 800 to render immersive augmented or virtual reality.

[0176] Power supply 816 may include a hardwired power supply, a battery power supply, or a combination thereof. Power supply 816 may provide power to computing device 800 to enable components of computing device 800 to operate.

[0177] The presentation component 818 may include a display (e.g., a monitor, a touch screen, a television screen, a heads-up display (HUD), other display types, or a combination thereof), speakers, and / or other presentation components. The presentation component 818 can receive data from other components (e.g., GPU 808, CPU 806, etc.) and output data (e.g., as images, video, sound, etc.).

[0178] Exemplary Data Center 9 illustrates an example data center 900 that may be used in at least one embodiment of the present disclosure. The data center 900 may include a data center infrastructure layer 910, a framework layer 920, a software layer 930, and / or an application layer 940.

[0179] 9, data center infrastructure layer 910 may include a resource orchestrator 912, grouped computational resources 914, and node computational resources (“node CRs”) 916(1) through 916(N), where “N” represents any integer, natural number. In at least one embodiment, node CRs 916(1) through 916(N) may include, but are not limited to, any number of central processing units (CPUs) or other processors (including DPUs, accelerators, field programmable gate arrays (FPGAs), graphics processors or graphics processing units (GPUs), etc.), memory devices (e.g., dynamic read-only memory), storage devices (e.g., solid-state or disk drives), network input / output (NW I / O) devices, network switches, virtual machines (VMs), power modules, and / or cooling modules, etc. In some embodiments, one or more of the nodes CR 916(1)-916(N) may correspond to a server having one or more of the aforementioned computing resources. Additionally, in some embodiments, the nodes CR 916(1)-916(N) may include one or more virtual components, such as a vGPU, a vCPU, and / or the like, and / or one or more of the nodes CR 916(1)-916(N) may correspond to a virtual machine (VM).

[0180] In at least one embodiment, the grouped computing resources 914 may include separate groups of nodes CR 916 housed within one or more racks (not shown), or multiple racks housed in data centers in various geographic locations (also not shown). The separate groups of nodes CR 916 within the grouped computing resources 914 may include grouped computing, network, memory, or storage resources that can be configured or assigned to support one or more workloads. In at least one embodiment, several nodes CR 916 including CPUs, GPUs, DPUs, and / or other processors may be grouped within one or more racks to provide computing resources to support one or more workloads. The one or more racks may also include any number of power modules, cooling modules, and / or network switches, in any combination.

[0181] The resource orchestrator 912 can configure or otherwise control one or more nodes CR 916(1)-916(N) and / or grouped computational resources 914. In at least one embodiment, the resource orchestrator 912 can include a software design infrastructure (SDI) management entity of the data center 900. The resource orchestrator 912 can include hardware, software, or some combination thereof.

[0182] In at least one embodiment, as shown in FIG. 9 , framework layer 920 may include a job scheduler 932, a configuration manager 934, a resource manager 936, and / or a distributed file system 938. Framework layer 920 may include a framework to support software 932 in software layer 930 and / or one or more applications 942 in application layer 940. Software 932 or applications 942 may include web-based service software or applications, such as those offered by Amazon Web Services, Google Cloud, and Microsoft Azure, respectively. Framework layer 920 may be a type of free and open source software web application framework, such as, but not limited to, Apache Spark™ (hereinafter “Spark”), which may use distributed file system 938 for large-scale data processing (e.g., “big data”). In at least one embodiment, job scheduler 932 may include a Spark driver to facilitate scheduling of workloads supported by various tiers of data center 900. The configuration manager 934 may be capable of configuring different layers, for example, the software layer 930 and the framework layer 920, which includes Spark and a distributed file system 938 to support large-scale data processing. The resource manager 936 may be capable of managing clustered or grouped computing resources that are mapped or allocated to support the distributed file system 938 and the job scheduler 932. In at least one embodiment, the clustered or grouped computing resources may include the computing resources 914 grouped in the data center infrastructure layer 910. The resource manager 936 may coordinate with the resource orchestrator 912 to manage these mapped or allocated computing resources.

[0183] In at least one embodiment, software 932 included in software layer 930 may include software used by at least a portion of nodes CR 916(1)-916(N), grouped computational resources 914, and / or distributed file system 938 of framework layer 920. The one or more types of software may include, but are not limited to, internet web page searching software, email virus scanning software, database software, and streaming video content software.

[0184] In at least one embodiment, the applications 942 included in the application layer 940 may include one or more types of applications used by at least a portion of the nodes CR 916(1)-916(N), the grouped computational resources 914, and / or the distributed file system 938 of the framework layer 920. The one or more types of applications may include, but are not limited to, any number of genomics applications, cognitive computing, and machine learning applications, including training or inference software, machine learning framework software (e.g., PyTorch, TensorFlow, Caffe, etc.), and / or other machine learning applications used in conjunction with one or more embodiments.

[0185] In at least one embodiment, any of configuration manager 934, resource manager 936, and resource orchestrator 912 can implement any number and type of self-modifying actions based on any amount and type of data obtained in any technically possible manner. The self-modifying actions can free data center operators of data center 900 from making potentially poor configuration decisions and possibly avoiding underutilized and / or underperforming portions of the data center.

[0186] Data center 900 may include tools, services, software, or other resources for training one or more machine learning models or for predicting or inferring information using one or more machine learning models according to one or more embodiments described herein. For example, a machine learning model may be trained by calculating weight parameters according to a neural network architecture using the software and / or computing resources described above with respect to data center 900. In at least one embodiment, a trained or deployed machine learning model corresponding to one or more neural networks may be used to infer or predict information using the resources described above with respect to data center 900, for example, by using weight parameters calculated via one or more training techniques, including but not limited to those described herein.

[0187] In at least one embodiment, data center 900 may use CPUs, application specific integrated circuits (ASICs), GPUs, FPGAs, and / or other hardware (or corresponding virtual computing resources) for training and / or performing inference using such resources. Additionally, one or more of such software and / or hardware resources may be configured as services, such as image recognition, speech recognition, or other artificial intelligence services, to enable users to train or perform inference on information.

[0188] Example Network Environment A network environment suitable for use in implementing embodiments of the present disclosure may include one or more client devices, servers, network attached storage (NAS), other back-end devices, and / or other device types. The client devices, servers, and / or other device types (e.g., each device) may be implemented with one or more instances of computing device 800 of FIG. 8 , e.g., each device may include similar components, features, and / or functionality of computing device 800. Additionally, if a back-end device (e.g., server, NAS, etc.) is implemented, the back-end device may be included as part of data center 900, examples of which are further detailed herein with respect to FIG. 9.

[0189] Components of a network environment may communicate with each other via a network, which may be wired, wireless, or both. A network may include multiple networks or a network of networks. Illustratively, a network may include one or more wide area networks (WANs), one or more local area networks (LANs), one or more public networks, such as the Internet and / or the Public Switched Telephone Network (PSTN), and / or one or more private networks. When a network includes a wireless telecommunications network, components such as base stations, communication towers, or access points (as well as other components) may provide wireless connectivity.

[0190] Compatible network environments may include one or more peer-to-peer network environments (wherein a server may not be included in the network environment) and one or more client-server network environments (wherein a server or servers may be included in the network environment). In a peer-to-peer network environment, functionality described herein with respect to a server may be implemented in any number of client devices.

[0191] In at least one embodiment, the network environment may include one or more cloud-based network environments, distributed computing environments, combinations thereof, etc. The cloud-based network environment may include a framework layer, a job scheduler, a resource manager, and a distributed file system implemented on one or more of the servers, which may include one or more core network servers and / or edge servers. The framework layer may include a framework to support software in the software layer and / or one or more applications in the application layer. The software or applications may each include web-based service software or applications. In an embodiment, one or more of the client devices may use the web-based service software or applications (e.g., by accessing the service software and / or applications via one or more application programming interfaces (APIs)). The framework layer may be, but is not limited to, a type of free and open source software web application framework that may use a distributed file system for large-scale data processing (e.g., “big data”).

[0192] A cloud-based network environment may provide cloud computing and / or cloud storage that implements any combination of the computing and / or data storage functions (or one or more portions thereof) described herein. Any of these various functions may be distributed across multiple locations from a central or core server (e.g., one or more data centers that may be distributed across a state, region, country, or the world). When a user (e.g., a client device) is connected relatively close to an edge server, the core server may delegate at least a portion of its functionality to the edge server. A cloud-based network environment may be private (e.g., limited to a single organization), public (e.g., available to multiple organizations), and / or a combination thereof (e.g., a hybrid cloud environment).

[0193] A client device may include at least some of the components, features, and functionality of the exemplary computing device 800 described herein with respect to Figure 8. By way of illustration, and not limitation, a client device may be embodied as a personal computer (PC), a laptop computer, a mobile device, a smartphone, a tablet computer, a smart watch, a wearable computer, a personal digital assistant (PDA), an MP3 player, a virtual reality headset, a global positioning system (GPS) or device, a video player, a video camera, a surveillance device or system, a vehicle, a boat, an airship, a virtual machine, a drone, a robot, a handheld communications device, a hospital device, a gaming device or system, an entertainment system, a vehicle computing system, an embedded system controller, a remote control, an appliance, a consumer electronic device, a workstation, an edge device, any combination of these depicted devices, or any other suitable device.

[0194] The present disclosure may be described in the general context of computer code or machine-usable instructions, including computer-executable instructions, such as program modules, being executed by a computer or other machine, such as a personal digital assistant or other handheld device. Generally, program modules, including routines, programs, objects, components, data structures, etc., refer to code that performs particular tasks or implements particular abstract data types. The present disclosure may be implemented in a variety of configurations, including handheld devices, consumer electronics, general-purpose computers, more specialized computing devices, etc. The present disclosure may also be implemented in distributed computing environments where tasks are performed by remote processing devices linked through a communications network.

[0195] As used herein, the term "and / or" in reference to two or more elements should be interpreted to mean one element only or a combination of elements. For example, "element A, element B, and / or element C" may include element A only, element B only, element C only, elements A and B, elements A and C, elements B and C, or elements A, B, and C. Additionally, "at least one of element A or element B" may include at least one of element A, at least one of element B, or at least one of element A and at least one of element B. Furthermore, "at least one of element A and element B" may include at least one of element A, at least one of element B, or at least one of element A and at least one of element B.

[0196] The subject matter of the present disclosure has been described with specificity to meet statutory requirements. However, that description itself is not intended to limit the scope of the disclosure. Rather, the inventors contemplate that the claimed subject matter may be implemented in other ways, including different steps or combinations of steps similar to those described herein, in conjunction with other current or future technologies. Furthermore, although the terms "step" and / or "block" may be used herein to connote different elements of the method used, these terms should not be construed as implying any particular order among the various steps disclosed herein unless and when the order of individual steps is explicitly described.

Claims

1. an electronic component; a power supply electrically coupled to the electronic component, the power supply for providing an input voltage to the electronic component; a voltage monitor disposed between the power supply and the electronic component; a voltage monitor configured to: a high frequency voltage error detector for comparing the input voltage with a first overvoltage (OV) threshold and a first undervoltage (UV) threshold; a low frequency voltage error detector for filtering the input voltage to produce a filtered input voltage and comparing the filtered input voltage to a second UV threshold and a second OV threshold; a safety manager communicatively coupled to the voltage monitor and the electronic component, the input voltage is greater than the first OV threshold; the input voltage is less than the first UV threshold; the filtered input voltage is greater than the second OV threshold; or the filtered input voltage is less than the second UV threshold. a safety manager for causing a change to the operational state of the electronic component when the voltage monitor detects at least one of Including, the system.

2. 2. The system of claim 1, wherein the electronic component comprises at least one of a processor or a system on a chip (SoC), and the power supply comprises at least one of a switched mode power supply or a linear power supply.

3. the low frequency voltage error detector: a low pass filter for removing at least a portion of noise from the input voltage to produce the filtered input voltage; a first comparator for performing the comparison of the filtered input voltage with the first OV threshold and the first UV threshold; Including, the high frequency voltage error detector includes a second comparator for performing the comparison of the input voltage with the second OV threshold and the second UV threshold; The system of claim 1 .

4. the high frequency voltage error detector is in parallel with the low frequency voltage error detector; the high frequency voltage error detector is configured to compare the input voltage with at least one of the first OV threshold or the first UV threshold at least partially concurrently with a comparison of the input voltage with at least one of the second OV threshold or the second UV threshold performed using the low frequency voltage error detector. The system of claim 1 .

5. The system of claim 1 , wherein at least one of the first OV threshold, the first UV threshold, the second OV threshold, or the second UV threshold is reprogrammable.

6. The system of claim 1 , wherein the voltage monitor is external to at least one of the power supply or the electronic component.

7. another electronic component; another power supply electrically coupled to the other electronic component, the other power supply for providing a different input voltage to the other electronic component; Furthermore, the voltage monitor is further configured to compare the other input voltage with the first OV threshold, the first UV threshold, the second OV threshold, and the second UV threshold; The safety manager further comprises: the other input voltage is greater than the first OV threshold; the other input voltage is less than the first UV threshold; the other filtered input voltage is greater than the second OV threshold; or the filtered input voltage is less than the second UV threshold. and causing a change to the operational state of the other electronic component when the voltage monitor detects at least one of The system of claim 1 .

8. the power supply is a switched mode power supply; the other power supply is a linear power supply; The system of claim 7.

9. The system comprises: Control systems for autonomous or semi-autonomous machines, Perception systems for autonomous or semi-autonomous machines, a system for performing a simulation operation; a system for performing deep learning operations; a system implemented using edge devices; Systems implemented using robots, a system incorporating one or more virtual machines (VMs); a system that is at least partially implemented in a data center; or Systems implemented at least in part using cloud computing resources The system of claim 1 , which is included in at least one of:

10. providing an input voltage to the electronic component using a power supply; comparing the input voltage to at least one of a high frequency overvoltage (OV) threshold or a high frequency undervoltage (UV) threshold using a high frequency voltage error detector; filtering the input voltage using a low pass filter of a low frequency voltage error detector to produce a filtered input voltage; using the low frequency voltage error detector to compare the filtered voltage to at least one of a low frequency OV threshold or a low frequency UV threshold; using a safety manager to determine a voltage error based on at least one of the input voltage being greater than the high frequency OV threshold, the input voltage being less than the high frequency UV threshold, the filtered input voltage being greater than the low frequency OV threshold, or the filtered input voltage being less than the low frequency UV threshold; causing a change to an operational mode of the electronic component based at least in part on the step of determining the voltage error; and A method comprising:

11. The method of claim 10 , wherein the electronic component comprises at least one of a processor or a system on a chip (SoC).

12. the power supply is a switched mode power supply; the input voltage corresponds to direct current (DC); the low-pass filter removing at least a portion of alternating current (AC) noise from the input voltage to produce the filtered input voltage; The method of claim 10.

13. the high-frequency voltage error detector and the low-frequency voltage error detector are arranged in parallel; the steps of comparing using the high frequency voltage error detector and comparing using the low frequency voltage error detector are performed at least partially simultaneously. The method of claim 10.

14. The method of claim 10 , wherein at least one of the high frequency OV threshold, the high frequency UV threshold, the low frequency OV threshold, and the low frequency UV threshold is reprogrammable.

15. A voltage monitor comprising: receiving an input voltage from a power supply electrically coupled to an electronic component, the power supply providing the input voltage to the electronic component; using a high frequency voltage error detector to compare the input voltage to at least one of a high frequency overvoltage (OV) threshold or a high frequency undervoltage (UV) threshold; filtering the input voltage using a low frequency voltage error detector to produce a filtered input voltage; using the low frequency voltage error detector to compare the filtered voltage to at least one of a low frequency OV threshold or a low frequency UV threshold; and upon detecting a voltage error based on at least one of the input voltage being greater than the high-frequency OV threshold, the input voltage being less than the high-frequency UV threshold, the filtered input voltage being greater than the low-frequency OV threshold, or the filtered input voltage being less than the low-frequency UV threshold, indicating the voltage error to a safety manager of a system comprising the electronic component, the power supply, and the voltage monitor.

1. A voltage monitor comprising: a voltage monitor;

16. The voltage monitor of claim 15 , wherein the indication of the voltage error causes a change to an electronic component communicatively coupled to the safety manager.

17. 16. The voltage monitor of claim 15, wherein the filtered input voltage is generated using a low pass filter of the low frequency voltage error detector.

18. the power supply is a switched mode power supply; the input voltage corresponds to direct current (DC); the low-pass filter removing at least a portion of alternating current (AC) noise from the input voltage to produce the filtered input voltage; 18. The voltage monitor of claim 17.

19. 16. The voltage monitor of claim 15, wherein the comparison of the input voltage is performed using a first comparator and the comparison of the filtered input voltage is performed using a second comparator.

20. The voltage monitor Control systems for autonomous or semi-autonomous machines, Perception systems for autonomous or semi-autonomous machines, a system for performing a simulation operation; a system for performing deep learning operations; a system implemented using edge devices; Systems implemented using robots, a system incorporating one or more virtual machines (VMs); a system at least partially implemented in a data center; or Systems implemented at least in part using cloud computing resources 10. The voltage monitor of claim 1, wherein the voltage monitor is included in at least one of:

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