Power Conversion Device

Abstract

To provide a power conversion device which operates with high efficiency in a normal time when instantaneous voltage drops are not occurring and expands a voltage compensation range during instantaneous voltage drops without adding a large component.SOLUTION: A power conversion device has a PFC circuit 11 that converts a voltage Vac supplied from a system 2 to a voltage Ed1, and a DC / DC converter 12 that converts the voltage Ed1 to a voltage Ed2. The DC / DC converter 12 has a capacitor 121, an inductor 122, an isolation transformer 126, and an inductance switching circuit 123 connected in parallel to the primary or secondary side. The inductance switching circuit 123, which is a serial connection body of a switch section 125 and an inductor 124 that is smaller in size than the isolation transformer 126, controls the switch 125 to turn on and maintain the voltage Ed2 for a predetermined period of time when the voltage Vac is lower than a first threshold and the voltage Ed1 is lower than a second threshold.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a power conversion device that compensates for an output voltage during, for example, a momentary sag. [Background technology]

[0002] Known power conversion devices that convert commercial AC voltages into desired DC voltages include those described in, for example, Patent Document 1 and Patent Document 2. Note that the reference symbols in parentheses below are the reference symbols used in these patent documents. Patent Document 1 describes a current resonant converter that can accommodate a wide range of input voltages, that is, can accommodate a wide range, by switching between half-bridge operation and full-bridge operation depending on the input voltage. Patent Document 2 describes a DC voltage converter (100) that can accommodate a wide range and suppress losses near the rated voltage by connecting an adjustment coil (51) in parallel to a coil (33) using a switch (SW5). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2004-112925 [Patent Document 2] Japanese Patent Application Laid-Open No. 2015-177595 Summary of the Invention [Problem to be solved by the invention]

[0004] However, the technology described in Patent Document 1 has a problem in that the output voltage is prone to fluctuation when switching between half-bridge operation and full-bridge operation. Therefore, if an instantaneous voltage drop occurs in the input voltage, the output voltage may not be able to be maintained. Furthermore, in the technology described in Patent Document 2, when the inductance of the adjustment coil (51) connected in parallel to the coil (33) by the switch (SW5) is approximately the same, the adjustment coil (51) generates a voltage and current debt of the same order as the coil (33). Therefore, the size of the adjustment coil (51) needs to be approximately the same as the size of the coil (33), which causes a problem of an increased size of the device.

[0005] In view of these circumstances, an object of the present invention is to provide a technology for realizing a power conversion device that can operate with high efficiency during normal operation when no voltage sag occurs, and that can expand the voltage compensation range during a voltage sag, without adding any large components. [Means for solving the problem]

[0006] A power conversion device according to one aspect of the present invention includes a PFC circuit that converts a first voltage supplied from a commercial power source into a second voltage, and a current resonant converter that converts the second voltage into a third voltage, wherein the current resonant converter includes at least a first inductor, a capacitor, and an isolation transformer, and an inductance switching circuit connected in parallel to the primary side or the secondary side of the isolation transformer, and the inductance switching circuit is a series connection of a switch unit and a second inductor that is smaller in size than the isolation transformer, and is controlled so that when the first voltage becomes lower than a first threshold value and the second voltage becomes lower than a second threshold value, the switch unit is turned on for a predetermined period of time to maintain the third voltage. According to the power conversion device of this aspect, a power conversion device that operates with high efficiency under normal conditions and can expand the voltage compensation range during a voltage sag can be realized without adding any large components. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a diagram illustrating an overview of a system including a power conversion device according to an embodiment. [Figure 2] FIG. 2 is a diagram illustrating a detailed configuration of the system. [Figure 3] 1 is a diagram illustrating the operation of a switch unit in a DC / DC converter. [Figure 4] 1 is a diagram illustrating the operation of a switch unit in a DC / DC converter. [Figure 5] FIG. 10 is a diagram illustrating voltage transfer characteristics in a resonant circuit. [Figure 6] 1A and 1B are diagrams illustrating the operation of a power conversion device during normal operation and during a voltage sag. [Figure 7] FIG. 2 illustrates an example of a switch unit. [Figure 8] FIG. 10 is a diagram illustrating an example of a logic circuit in a switch unit. [Figure 9] This is an example of a configuration in which a power supply voltage is supplied to a logic circuit. [Figure 10] 10 is another example of a configuration for supplying a power supply voltage to a logic circuit. [Figure 11] FIG. 10 is a diagram illustrating an example of an off operation of the inductance switching circuit. [Figure 12] FIG. 10 is a diagram illustrating an example of an off operation of the inductance switching circuit. [Figure 13] FIG. 4 is a diagram illustrating the sizes of an isolation transformer and an inductance switching circuit. [Figure 14] FIG. 10 is a diagram illustrating a configuration of a DC / DC converter according to a modified example. [Figure 15] FIG. 1 is a diagram showing the configuration of a DC / DC converter that does not have an inductance switching circuit. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, a power conversion device according to an embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a block diagram showing the configuration of a system 1 including this power conversion device 10, and Fig. 2 is a diagram showing the detailed configuration of the system 1. As shown in these figures, a power conversion device 10 includes a power factor correction (hereinafter abbreviated as “PFC”) circuit 11, a DC / DC converter 12, and a control device 20.

[0009] In FIG. 1, a system 1 converts an AC voltage Vac (first voltage) in a system 2 into a DC voltage Ed1 (second voltage) by a PFC circuit 11, reconverts the voltage Ed1 into a voltage Ed2 (third voltage), and applies the voltage Ed2 to a load 4. Specifically, system 2 is an AC commercial power supply. Capacitor 51 is used to smooth voltage Ed1, and capacitor 52 is used to smooth voltage Ed2.

[0010] 2, PFC circuit 11 includes bridge-type diodes D1 to D4 that full-wave rectify the AC current of system 2, inductor 111 inserted in series in the current path, smoothing capacitor 112 connected in parallel to the current path, and transistor 113 connected in parallel to the current path. In PFC circuit 11, transistor 113 is turned on and off under the control of control device 20, so that the phase of the current flowing in the current path approaches the phase of the voltage, and voltage Ed1 is maintained substantially constant.

[0011] The DC voltage output from the PFC circuit 11 and smoothed by the capacitor 51, that is, the voltage input to the DC / DC converter 12, is Ed1. It should be noted that the PFC circuit 11 shown in FIG. 2 is merely an example, and is not limited to the illustrated configuration as long as it has the function of improving the power factor and the function of maintaining the voltage Ed1 substantially constant.

[0012] DC / DC converter 12 is a bidirectional current resonant converter including transistors Q1 to Q4, a resonant circuit 120, and transistors Q5 to Q8. In this embodiment, MOSFETs are used as transistors Q1 to Q8, but FETs or IGBTs may also be used. In the DC / DC converter 12, the various elements except for the inductance switching circuit 123 are arranged symmetrically with respect to the insulating transformer 126 included in the resonant circuit 120. For convenience, the bidirectional DC / DC converter 12 will be described taking as an example a case where the transistors Q1 to Q4 are on the input side and the transistors Q5 to Q8 are on the output side.

[0013] Of the transistors Q1 to Q4, the transistors Q1 and Q4 and the transistors Q2 and Q3 form pairs, respectively, and the control device 20 alternately and exclusively turns on each pair. Specifically, when transistors Q2 and Q3 are off and transistors Q1 and Q4 are on, node p becomes higher than node q, and when transistors Q1 and Q4 are off and transistors Q2 and Q3 are on, node p becomes lower than node q. By repeating such switching of the transistors Q1 to Q4, the direct current of the voltage Ed1 is converted into alternating current, which is output from the nodes p and q. Therefore, the transistors Q1 to Q4 function as a switching circuit.

[0014] The resonant circuit 120 includes a resonant capacitor 121 (first capacitor) 128 , a resonant inductor 122 (first inductor) 127 , an insulating transformer 126 , and an inductance switching circuit 123 . Specifically, in resonant circuit 120, one end of capacitor 121 is connected to node p, and the other end of capacitor 121 is connected to one end of inductor 122. The other end of inductor 122 is connected to one end of the primary side of isolation transformer 126, and the other end of the primary side of isolation transformer 126 is connected to node q. The capacitance of the capacitor 121 is Cr1, and the inductance of the inductor 122 is Ls1.

[0015] The inductance switching circuit 123 is configured by a series connection of an inductor 124 (second inductor) and a switch section 125, and the series connection is connected in parallel to the primary side of an insulating transformer 126. Specifically, one end of inductor 124 is connected to the other end of inductor 122 and one end of the primary side of isolation transformer 126, and the other end of inductor 124 is connected to one end of switch unit 125. The other end of switch unit 125 is connected to the other end of the primary side of isolation transformer 126 and node q. The inductance of the inductor 124 is represented as Lm1.

[0016] When the switch unit 125 is off (open), the inductor 124 is disconnected from the primary side of the insulating transformer 126, and when the switch unit 125 is on (closed), the inductor 124 is connected in parallel to the primary side of the insulating transformer 126. Therefore, the inductance switching circuit 123 has a function of switching the excitation inductance by turning the switch section 125 on and off. In a broad sense, switch section 125 includes a logic circuit for controlling on / off and a diode for preventing backflow, but in a narrow sense, it simply means a switch that turns on / off between the other end of inductor 124 and the other end of the primary side of inductor 124.

[0017] One end of the secondary side of the insulating transformer 126 is connected to a node r via an inductor 127 and a capacitor 128 in this order, and the other end of the secondary side of the insulating transformer 126 is connected to a node s. The inductance of the inductor 127 is denoted by Ls2, the capacitance of the capacitor 128 is denoted by Cr2, and the turns ratio of the insulating transformer 126 is denoted by n.

[0018] Of the transistors Q5 to Q8, the transistors Q5 and Q8 and the transistors Q6 and Q7 form a pair, respectively, and the control device 20 alternately turns on each pair exclusively. Specifically, in the AC output from nodes r and s, if node r is higher in potential than node s, transistors Q6 and Q7 are off and transistors Q5 and Q8 are on, and if node r is lower in potential than node s, transistors Q5 and Q8 are off and transistors Q6 and Q8 are on. By repeating this switching of transistors Q5 to Q8, the AC output from nodes r and s is converted into DC voltage Ed2 and applied to load 4. Therefore, transistors Q5 to Q8 function as a rectifier circuit.

[0019] In order to adjust the phase of the current in the PFC circuit 11, the control device 20 monitors the voltage Vac of the system 2 and controls the on and off of the transistor 113. The control device 20 also monitors the voltages Ed1 and Ed2 and controls the on and off of the transistors Q1 to Q8, respectively.

[0020] In the DC / DC converter 12, the path through which the excitation current flows varies depending on whether the switch section 125 in the inductance switching circuit 123 is turned on or off. 3 is a diagram showing a path through which the excitation current flows when switch unit 125 is off. As shown in this diagram, when switch unit 125 is off, the excitation current does not flow through inductor 124, but flows only through the primary side of isolated transformer 126. Here, the excitation inductance of the insulating transformer 126 is set to Lm.

[0021] 4 is a diagram showing the path through which the excitation current flows when switch unit 125 is on. As shown in this diagram, when switch unit 125 is on, inductor 124 is connected in parallel to the primary side of isolation transformer 126. Therefore, the excitation current flows through both the primary side of isolation transformer 126 and inductor 124. If the inductance Lm1 of the inductor 124 is equal to Lm, the apparent exciting inductance of the isolation transformer 126 becomes the product of the sum, which is Lm / 2 (= Lm×Lm1 / (Lm + Lm1)), and is half of the case where the switch section 125 is off.

[0022] FIG. 5 is a diagram showing the voltage transfer characteristics (gain characteristics) of the resonance circuit 120 when the exciting inductance is Lm and when it becomes half of Lm / 2. Specifically, in FIG. 5, the characteristic indicated by the two-dot chain line shows the voltage transfer characteristics of the resonance circuit 120 when the exciting inductance is Lm due to the off state of the switch section 125, and the characteristic indicated by the solid line shows the voltage transfer characteristics of the resonance circuit 120 when the exciting inductance is Lm / 2 due to the on state of the switch section 125. In FIG. 5, the vertical axis is the boost ratio (n·Ed2 / Ed1) in the resonance circuit 120, and the horizontal axis is the ratio (f / f0) of the driving frequency f to the resonance frequency f0 of the resonance circuit 120.

[0023] Generally, the output voltage of the current resonance type converter is adjusted by the driving frequency f of the transistors Q1 to Q4. If it is designed so that the boost ratio at the rated value becomes "1", the power factor at the rated value becomes "1", and the efficiency becomes high. Therefore, in this embodiment, normally, the control device 20 operates the DC / DC converter 12 in the critical mode (f / f0 = 1) where the driving frequency f is the resonance frequency f0. Note that boosting is achieved by driving at a frequency lower than the resonance frequency f0, for example, driving the driving frequency f at a frequency f1 (f1 < f0), but the efficiency decreases as the driving frequency moves away from the resonance frequency f0. Therefore, in order to maintain the output voltage Ed2 substantially constant with respect to the fluctuation of the input voltage Ed1, the configuration for adjusting the driving frequency f of the DC / DC converter 12 leads to a decrease in efficiency and is difficult to adopt.

[0024] Therefore, in this embodiment, in order to maintain high-efficiency operation of the current resonant DC / DC converter 12 even if the voltage of the system 2 fluctuates, the control device 20 controls the PFC circuit 11 so that the voltage Ed1 that is input to the DC / DC converter 12 is constant. However, if the voltage Vac of system 2 drops due to a voltage sag and exceeds the voltage regulation capability of the PFC circuit 11, the voltage Ed1 drops and it becomes impossible to maintain the voltage Ed1 substantially constant.

[0025] Therefore, in this embodiment, when the voltages Vac and Ed1 drop, the switch unit 125 is turned on to switch the excitation inductance in the resonant circuit 120 from Lm to Lm / 2, as will be described in detail later. When the exciting inductance is halved to Lm / 2, the drive frequency f falls below f1, as shown by the solid line in FIG. 5, and the boost ratio increases from "1". Therefore, the decrease in voltage Ed1 is compensated for by the increase in the step-up ratio of DC / DC converter 12, and voltage Ed2 can be kept almost constant.

[0026] In a configuration that does not have the inductance switching circuit 123, specifically, in a configuration in which the excitation inductance is fixed at Lm as shown in FIG. 15, the increase in the step-up ratio caused by lowering the drive frequency f below f1 is smaller, as shown by the two-dot chain line in FIG. 5, compared to a configuration in which the excitation inductance is switched by the inductance switching circuit 123 as in this embodiment. For this reason, in the configuration shown in FIG. 15, the decrease in voltage Ed1 cannot be compensated for by increasing the step-up ratio of DC / DC converter 12, and the possibility of voltage Ed2 being decreased increases compared to this embodiment.

[0027] Fig. 6 is a diagram showing waveforms of various parts when a voltage sag occurs in this embodiment. In detail, in Fig. 6, the upper column shows waveforms of voltages Ed1 and Ed2 when a voltage sag occurs, when the excitation inductance Lm is changed (when the switch unit 125 is on) and when it is not changed (when the switch unit 125 is off or when the configuration shown in Fig. 15 is used), the middle column shows when the excitation inductance Lm is changed and when it is not changed with respect to the drive frequency ratio (f / f0), and the lower column shows the off or on state of the switch unit 125.

[0028] The waveforms in FIG. 6 are an example of the results of a simulation in which the design constants of the resonant circuit 120 are the following values: Ls1=Ls2=8.3μH Cr1=Cr2=0.11μF Lm = 44μF Lm1=44μF n =1 f0 =166.6kHz Maximum boost value (without Lm switching) G1=2 Maximum boost value (with Lm switching) G2=3 Voltage sag compensation period = 10 ms (approximately half the grid voltage cycle)

[0029] Under normal conditions (rated voltage), grid voltage fluctuations are within a few percent. Therefore, voltage Ed1 is maintained at 400 V by PFC circuit 11 as shown in the top row of Figure 6, and DC / DC converter 12 operates in highly efficient critical mode (f / f0 = 1) as shown in the middle row of the figure, outputting voltage Ed2 at a nearly constant 400 V as shown in the top row.

[0030] When a momentary voltage drop occurs and exceeds the voltage regulation capacity of the PFC circuit 11, the voltage Ed1 gradually decreases from 400V. When the voltage Ed1 drops to the threshold value of 300V, in this embodiment, as shown in the lower part of FIG. 6, the switch part 125 in the inductance switching circuit 123 turns on, and as shown in the middle part of FIG. 6, the control device 20 makes the drive frequency f lower than the resonance frequency f0 (f / f0 < 1). Thereby, the DC / DC converter 12 performs a boosting operation to make Ed1 < Ed2.

[0031] When the switch part 125 turns on and the drive frequency f decreases, the boost ratio increases as shown by the solid line in FIG. 5, so the voltage Ed2 recovers. In this embodiment, since the maximum boost ratio G3 is "3", the voltage Ed2 can be maintained at 400V even when the voltage Ed1 drops to about 150V. When the momentary voltage drop subsides and the voltage Ed1 gradually rises and recovers to 300V, the switch part 125 turns off, and the control device 20 resumes the high-efficiency operation of the DC / DC converter 12 in the critical mode. Thereby, the voltage Ed2 is output almost constantly at 400V as shown in the upper part.

[0032] In a configuration where the inductance switching circuit 123 does not exist, even when a momentary voltage drop occurs, the excitation inductance does not change from Lm. In a configuration where the excitation inductance does not change from Lm, since the maximum boost ratio G2 is "2" as shown by the dashed two-dot line in FIG. 5, when the voltage Ed1 falls below 200V, the voltage Ed1 cannot be maintained at 400V.

[0033] Next, a main part in the inductance switching circuit 123, particularly a specific example of the switch part 125, will be described. FIG. 7 is a diagram showing an example of the configuration of the switch part 125. In this figure, the switch part 125 includes a high-side transistor Q11, a low-side transistor Q12, diodes D11, D12, a sensor S1, and a logic circuit 1250. Note that, for example, MOSFETs are used as the high-side transistor Q11 and the low-side transistor Q12. The drain of the high-side transistor Q11 is connected to the other end of the inductor 124, and the source of the high-side transistor Q11 is connected to the source of the low-side transistor Q12. For convenience, the common connection point of the sources of the high-side transistor Q11 and the low-side transistor Q12 is referred to as node N.

[0034] A control signal Gt1 output from the logic circuit 1250 is supplied to the gate of the high-side transistor Q11. The anode of diode D11 (first diode) is connected to the source of high-side transistor Q11, and the cathode of diode D11 is connected to the drain of high-side transistor Q11. Therefore, diode D11 passes a forward current from the source to the drain of high-side transistor Q11.

[0035] The drain of the low-side transistor Q12 is connected to a node q together with the other end of the isolation transformer 126, which is omitted in Fig. 7. A control signal Gt2 output from a logic circuit 1250 is supplied to the gate of the low-side transistor Q12. The anode of diode D12 (second diode) is connected to the source of low-side transistor Q12, and the cathode of diode D12 is connected to the drain of low-side transistor Q12. Therefore, diode D12 passes a forward current from the source to the drain of low-side transistor Q12.

[0036] The sensor S1 detects the current ILm1 flowing through the inductor 124, and outputs a voltage signal Eim indicating the magnitude and direction of the current ILm1. If the current ILm1 flows in the direction shown in Figure 7, the voltage of the signal Eim is output as a positive value, and if the current ILm1 flows in the opposite direction to the direction shown in Figure 7, the voltage of the signal Eim is output as a negative value. Also, the absolute value of the voltage of the signal Ei is proportional to the magnitude of the current ILm1. Therefore, if the current ILm1 is zero, the voltage of the signal Ei is also zero.

[0037] The logic circuit 1250 outputs control signals Gt1 and Gt2 in response to the voltage Vac, the voltage Ed1, and the signal Eim, respectively.

[0038] 8 is a diagram showing an example of such a logic circuit 1250. In this diagram, the logic circuit 1250 includes comparison circuits Cmp1 to Cmp4, a logical product circuit And, and flip-flop circuits Df1 and Df2. Each of the comparison circuits Cmp1 to Cmp4 outputs an H-level signal when the voltage of the signal supplied to the input terminal (+) is higher than the voltage applied to the input terminal (-), and outputs an L-level signal otherwise.

[0039] A threshold voltage Vth is applied to the input terminal (+) of the comparator circuit Cmp1, and a voltage Ed1 output from the PFC circuit 11 is applied to the input terminal (-). The voltage Ed1 is actually a high voltage. For this reason, a voltage lower than the withstand voltage of the comparator circuit Cmp1 is used as the voltage Ed1 at the input terminal (-) of the comparator circuit Cmp1. For example, if the voltage Ed1 is lowered to 1 / 100 and applied to the input terminal (-) of the comparator circuit Cmp1, and a state in which the voltage Ed1 becomes lower than 300 V is to be detected, a DC voltage of 3.00 V is used as the threshold voltage Vth.

[0040] In the comparator circuit Cmp2, a threshold voltage Sac is applied to the input terminal (+) and the voltage Vac of system 2 is applied to the input terminal (-). The voltage Vac is actually a high voltage AC voltage. In order to compare such a high AC voltage in absolute value, a voltage lower than the withstand voltage of the comparator circuit Cmp2, which is obtained by full-wave rectifying the voltage Vac and reducing it, is used for the input terminal (-) of the comparator circuit Cmp2. The threshold voltage Sac is a sine wave signal with approximately the same frequency and phase as the voltage Vac, and serves as a reference voltage signal for detecting a drop in the voltage Vac. For example, when detecting that the absolute value of the instantaneous voltage Vac falls below 75%, if the voltage Vac is applied to the input terminal (-) of the comparator circuit Cmp2 at a step-down factor b, the amplitude of the threshold voltage Sac is set to a value obtained by multiplying the amplitude of the voltage Vac by 0.75b. Note that since the voltage Vac may not be an ideal sine wave, a step-down voltage waveform delayed by one cycle of the voltage Vac may be used as the threshold voltage Sac. Furthermore, the threshold voltages Vth and Sac are set in accordance with the step-down of the voltages Vac and Ed1, but for the sake of convenience, the following description will be given assuming that the voltages Vac and Ed1 are not stepped down.

[0041] The AND circuit And supplies a signal indicating the logical AND of the output signal of the comparison circuit Cmp1 and the output signal of the comparison circuit Cmp2 to the input terminal D of the flip-flop circuit Df1 and the input terminal D of the flip-flop circuit Df2, respectively. The output signal of the AND circuit And becomes H level when the voltage Ed1 output from the PFC circuit 11 is lower than the threshold voltage Vth and the voltage Vac of system 2 is lower than the threshold voltage Sac.

[0042] A voltage of zero is applied to the input terminal (+) of the comparator circuit Cmp3 as a threshold voltage, and a signal Eim is supplied to the input terminal (-). Therefore, the output signal of the comparator circuit Cmp3 becomes H level when the current ILm1 flowing through the inductor 124 is negative, and becomes L level otherwise. Such an output signal of the comparator circuit Cmp3 is supplied to the clock input terminal CK of the flip-flop circuit Df1.

[0043] A signal Eim is supplied to the input terminal (+) of the comparator circuit Cmp4, and a voltage of zero is applied to the input terminal (-) as a threshold voltage. Therefore, the output signal of the comparator circuit Cmp4 becomes H level when the current ILm1 flowing through the inductor 124 is positive, and becomes L level otherwise. Such an output signal of the comparator circuit Cmp4 is supplied to the clock input terminal CK of the flip-flop circuit Df2.

[0044] A control signal Gt1 is output from the output terminal Q of the flip-flop circuit Df1 and is supplied to the gate of the high-side transistor Q11. A control signal Gt2 is output from the output terminal Q of the flip-flop circuit Df2 and is supplied to the gate of the low-side transistor Q12. The output terminal Q of the flip-flop circuit Df1 and the output terminal Q of the flip-flop circuit Df2 are set to the L level as an initial state.

[0045] The power supply voltage of the logic circuit 1250 can be generated by, for example, the configurations shown in Figures 9 and 10. The power supply voltage of the logic circuit 1250 refers to the power supply voltage required to operate the comparison circuits Cmp1 to Cmp4, the AND circuit And, and the flip-flop circuits Df1 and Df2.

[0046] As shown in FIG. 9, an auxiliary winding 126b may be provided in the isolation transformer 126, and the AC voltage induced in the auxiliary winding 126b may be half-wave rectified by a diode D21 and smoothed by a capacitor 53, and the smoothed voltage may be used as the power supply voltage for the logic circuit 1250. Alternatively, as shown in FIG. 10, the AC voltage induced in the auxiliary winding 126b may be half-wave rectified by a diode D21 and smoothed by a capacitor 53, and the resulting voltage may be used as the input voltage to a three-terminal regulator T3, and the constant voltage output from the three-terminal regulator T3 may be used as the power supply voltage for the logic circuit 1250.

[0047] 9 or 10, the negative side of the power supply voltage in logic circuit 1250 is connected to node N, which is the common connection point between the source of high-side transistor Q11 and the source of low-side transistor Q12. The advantages of such a connection will be described.

[0048] Instead of the configuration of this embodiment, the following configuration is also possible: the source of the N-channel high-side transistor Q11 is connected to the other end of the inductor 124, and the drain of the high-side transistor Q11 is connected to the source of the low-side transistor Q12. However, this configuration requires a separate bootstrap circuit or a power supply voltage with three or more levels. In a configuration in which the high-side transistor Q11 and the low-side transistor Q12 are the same N-channel type and their sources are commonly connected, as in this embodiment, a single power supply voltage is sufficient for the circuits that generate the control signals Gt1 and Gt2, which simplifies the configuration and reduces costs.

[0049] In logic circuit 1250, when voltage Ed1 is higher than threshold voltage Vth or when voltage Vac is higher than threshold voltage Sac, control signals Gt1 and Gt2 are both at L level, and therefore high-side transistor Q11 and low-side transistor Q12 are both off. Therefore, switch unit 125 (narrowly defined), which is a series connection of high-side transistor Q11 and low-side transistor Q12, is off, so no current flows through inductor 124 and the excitation inductance is Lm. In this case, DC / DC converter 12 operates in critical mode, resulting in high-efficiency operation, as described above.

[0050] In the logic circuit 1250, when the voltage Ed1 falls below the threshold voltage Vth and the voltage Vac falls below the threshold voltage Sac, the control signals Gt1 and Gt2 both change to H level, turning on the switch unit 125. As a result, the excitation inductance is switched to half, Lm / 2, by the inductance switching circuit 123. In this case, as described above, the DC / DC converter 12 performs a boost operation by driving at a drive frequency f lower than the resonance frequency f0, and the voltage Ed2 is maintained at the same level as before the instantaneous drop.

[0051] The following describes the case where voltage Ed1 becomes higher than threshold voltage Vth, or where voltage Vac becomes higher than threshold voltage Sac, i.e., where the voltage sag has subsided. In this case, if the current flowing through inductor 124 is suddenly cut off, an overvoltage will occur across inductor 124, which may damage other elements. Therefore, a configuration that turns off inductor 124 by natural commutation is preferable.

[0052] Specifically, when the voltage sag subsides, the output signal of the AND circuit And goes low. In this case, if the current ILm1 flowing through the inductor 124 is positive, the output signal of the comparator Cmp4 goes high. As a result, the control signal Gt2 goes low while the control signal Gt1 remains high. As a result, the low-side transistor Q12 turns off while the high-side transistor Q11 remains on, as shown in FIG. 11(a). As a result, a positive current ILm1 flows sequentially through the high-side transistor Q11 and diode D12.

[0053] When the current ILm1 eventually reaches zero, the output signal of the comparator circuit Cmp4 goes high, causing the control signal Gt1 to go low, turning off the high-side transistor Q11. In this way, when the voltage sag subsides, if the current ILm1 flowing through the inductor 124 is a positive value, the low-side transistor Q12 is turned off first, and at timing t1 when the current ILm1 becomes zero as shown in FIG. 12, the high-side transistor Q11 is turned off.

[0054] Furthermore, when the voltage sag subsides and the output signal of the AND circuit And goes low, if the current ILm1 flowing through the inductor 124 is negative, the output signal of the comparator circuit Cmp3 goes high. Therefore, the control signal Gt1 goes low while the control signal Gt2 remains high. As a result, the high-side transistor Q11 turns off while the low-side transistor Q12 remains on, as shown in FIG. 11(b). This causes the negative current ILm1 to flow sequentially through the low-side transistor Q12 and diode D11.

[0055] When the current ILm1 eventually becomes zero, the output signal of the comparator circuit Cmp4 goes high, causing the control signal Gt2 to go low, turning off the low-side transistor Q12. In this way, when the voltage sag subsides, if the current ILm1 flowing through the inductor 124 is negative, the high-side transistor Q11 is turned off first, and at timing t2 when the negative current ILm1 becomes zero as shown in FIG. 12, the low-side transistor Q12 is turned off.

[0056] When the voltage sag subsides, high-side transistor Q11 and low-side transistor Q12 are both turned off in switch section 125, and DC / DC converter 12 resumes highly efficient operation in critical mode.

[0057] According to such logic circuit 1250, when voltage Vac becomes lower than threshold voltage Sac and voltage Ed1 becomes lower than threshold voltage Vth, switch unit 125 in inductance switching circuit 123 turns on.

[0058] In other words, even if the voltage Vac becomes lower than the threshold voltage Sac, if the voltage Ed1 is higher than the threshold voltage Vth, that is, if it is within the range of the voltage regulation capability of the PFC circuit 11, the switch unit 125 will not be turned on. Therefore, the DC / DC converter 12 is operated in critical mode and continues to operate at high efficiency.

[0059] Furthermore, if the voltage Vac does not become higher than the threshold voltage Sac or the voltage Ed1 does not become higher than the threshold voltage Vth even after the sag compensation period has elapsed, the control device 20 stops the operation of the PFC circuit 11 and the DC / DC converter 12.

[0060] In this embodiment, the voltage sag compensation period is assumed to be about half the voltage cycle of system 2, and specifically, if the frequency of system 2 is 50 Hz, it is assumed to be about 10 milliseconds.

[0061] According to the logic circuit 1250 of this embodiment, when the voltage sag subsides, the current flowing through the inductor 124 is cut off by natural commutation, thereby suppressing the occurrence of an overvoltage across the inductor 124. This makes it possible to prevent damage to elements due to an overvoltage.

[0062] In the embodiment, a voltage of zero is applied to the input terminal (+) of the comparator circuit Cmp3 and the input terminal (-) of the comparator circuit Cmp4. The reason for this is that when the voltage sag subsides, one of the high-side transistor Q11 and the low-side transistor Q12 is turned off depending on the direction of the current ILm1, and then the other of the high-side transistor Q11 and the low-side transistor Q12 is turned off when the current ILm1 becomes zero. However, if current ILm1 contains minute noise, chattering may occur near the zero crossing, causing the high-side transistor Q11 and the low-side transistor Q12 to malfunction. As a preventative measure, when the voltage sag subsides, one of the high-side transistor Q11 or the low-side transistor Q12 may be turned off depending on the direction of current ILm1, and then, if the absolute value of current ILm1 becomes smaller than a threshold value (third threshold value), the other of the high-side transistor Q11 or the low-side transistor Q12 may be turned off, and then both high-side transistor Q11 and low-side transistor Q12 may remain off even if the absolute value of current ILm1 becomes larger than the threshold value.

[0063] In this embodiment, the voltage sag compensation period is assumed to be about half the period (about 10 milliseconds) of the voltage cycle of the system 2, as described above, so the power capacity of the inductor 124 can be small. This makes it possible to avoid an increase in the size of the power conversion device 10.

[0064] Generally, the cross-sectional area of ​​the windings in inductors, transformers, and other coils is proportional to the allowable current value, but if the current flow period is very short, the instantaneous allowable current applies. This instantaneous allowable current is proportional to 1 / √Ts (Ts: current flow period), so if the current flow period is short, the allowable current can be made large and the cross-sectional area of ​​the winding can be made smaller. Similarly, in switch unit 125, if the conduction period is very short, peak current capacity rather than current capacity is applied, so elements with small capacitance can be selected. Specifically, elements with small power capacity can be selected for high-side transistor Q11 and low-side transistor Q12.

[0065] Fig. 13 is a diagram for comparing the sizes of inductance switching circuit 123 and isolated transformer 126. Isolated transformer 126 is composed of coil winding 1262, I core 1264 molded from a magnetic material, and E core 1266 also molded from a magnetic material. Note that Fig. 13 shows the coil winding 1262 in a planar form to make it easier to understand the winding state of coil winding 1262, but in reality, the primary coil and secondary coil are wound around center 1267 of E core 1266 while maintaining insulation.

[0066] A rated current normally flows through the coil winding 1262, so the cross-sectional area of ​​the winding must be large enough. In contrast, the inductor 124 in the inductance switching circuit 123 is expected to have a momentary sag compensation period that is about half the voltage cycle of system 2 (about 10 milliseconds), so it only needs to be a fraction of the size of the isolated transformer 126. Specifically, if the inductor 124 is an air-core inductor, it will have a diameter of about 14 mm, a height of about 14 mm, and a coil with about 68 windings. In this description, the size of the inductor 124 and the size of the isolation transformer 126 typically refer to the volume of the external shape, but may also refer to the cross-sectional area of ​​the winding of the coil.

[0067] In this embodiment, since PFC circuit 11 is provided in the upstream stage of DC / DC converter 12, DC / DC converter 12 only needs to operate for a very short time (about half the voltage cycle of system 2) during an input instantaneous sag. Therefore, a decrease in efficiency of DC / DC converter 12 does not pose a problem when inductance switching circuit 123 is operating (when switch unit 125 is turned on).

[0068] In the above-described embodiment, the series connection of inductor 124 and switch unit 125 in inductance switching circuit 123 is connected in parallel to the primary side of isolation transformer 126, but it may also be connected in parallel to the secondary side of isolation transformer 126. Even in a configuration in which inductance switching circuit 123 is connected in parallel to the secondary side of isolation transformer 126, the conditions for closing and opening switch unit 125 are the same as those in the embodiment. Furthermore, as long as the current resonant converter is a converter, it is not limited to a bidirectional configuration as in the embodiment, and may be a unidirectional configuration. Fig. 14 shows an example of a unidirectional configuration in which a series connection of inductor 124 and switch unit 125 in inductance switching circuit 123 is connected in parallel to the secondary side of isolated transformer 126. Note that in a unidirectional current resonant converter, unlike a bidirectional converter, there is no need to interchange the switching circuit and rectifier circuit, and therefore, in the rectifier circuit on the secondary side of isolated transformer 126, transistors Q15 to Q18 in Fig. 2 are replaced with diodes D25 to D28 in Fig. 14. [Explanation of symbols]

[0069] 1...System, 2...System (commercial power supply), 4...Load, 10...Power conversion device, 11...PFC circuit, 12...DC / DC converter (current resonant converter), 120...Resonant circuit, 121...Capacitor, 122...Inductor (first inductor), 123...Inductance switching circuit, 124...Inductor (second inductor), 125...Switch section, 126...Isolated transformer, Q1 to Q4...Transistor (switching circuit), Q5 to Q8...Transistor (rectifier circuit), Q11...High-side transistor, Q12...Low-side transistor, D11...Diode (first diode), D12...Diode (second diode), 1250...Logic circuit.

Claims

1. a PFC circuit that converts a first voltage supplied from a commercial power supply into a second voltage; a current resonant converter that converts the second voltage into a third voltage; Including, the current resonant converter includes at least a first inductor, a capacitor, an isolation transformer, and an inductance switching circuit connected in parallel to a primary side or a secondary side of the isolation transformer; the inductance switching circuit includes a series connection of a switch unit and a second inductor smaller in size than the isolation transformer, When the first voltage becomes lower than a first threshold value and the second voltage becomes lower than a second threshold value, the switch unit is controlled to be turned on for a predetermined period of time to maintain the third voltage. A power conversion device characterized by:

2. The current resonant converter comprises: converting the second voltage to a first alternating current by a switching circuit; the first AC current is supplied to a primary side of the isolation transformer after undergoing resonance by at least the first inductor and the capacitor; a rectifier circuit rectifies a second AC voltage output from the secondary side of the isolation transformer and outputs the rectified second AC voltage as the third voltage; When the switch unit is turned on, the drive frequency of the switching circuit is controlled so as to maintain the third voltage.

2. The power conversion device according to claim 1.

3. The switch unit The high-side transistor A low-side transistor, A logic circuit; Including, In the series-connected body, the second inductor, the high-side transistor, and the low-side transistor are connected in series; the source of the high-side transistor and the source of the low-side transistor are connected; The logic circuit When the first voltage becomes lower than the first threshold value and the second voltage becomes lower than the second threshold value, the high-side transistor and the low-side transistor are turned on.

3. The power conversion device according to claim 1 or 2.

4. The switch unit a first diode that passes a current from the source to the drain of the high-side transistor as a forward current; a second diode that passes a current from the source to the drain of the low-side transistor as a forward current; Including, The logic circuit After turning on the high-side transistor and the low-side transistor, when the first voltage becomes higher than the first threshold, or When the second voltage becomes higher than the second threshold value, If the direction of the current flowing through the second inductor is from the drain to the source of the high-side transistor, the low-side transistor is turned off; If the direction of the current flowing through the second inductor is from the drain to the source of the low-side transistor, the high-side transistor is turned off.

4. The power conversion device according to claim 3.

5. The logic circuit after turning off the low-side transistor, if the current flowing through the second inductor becomes zero or is smaller than a third threshold, turning off the high-side transistor; After the high-side transistor is turned off, if the current flowing through the second inductor becomes zero or is smaller than the third threshold value, the low-side transistor is turned off.

5. The power conversion device according to claim 4.

6. In the logic circuit, A connection point between the source of the high-side transistor and the source of the low-side transistor is connected to one side of a power supply voltage.

6. The power conversion device according to claim 3, 4 or 5.

7. The predetermined period is half the voltage cycle of the commercial power supply.

7. The power conversion device according to claim 1, wherein:

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