Program, information processing system and information processing method

Abstract

The purpose is to reduce the burden of ensuring system quality. [Solution] This is a program for causing a computer to execute a first acquisition step of acquiring test code that describes one or more logical elements 2 to be tested and the test content for the one or more logical elements 2, a second acquisition step of acquiring the results of the test using the test code, and a generation step of generating presentation information that indicates the correspondence between the test indicated by the test code and each of the one or more logical elements 2, and the results of the test using the test code.

Description

[Technical Field]

[0001] The present invention relates to a program, an information processing system, and an information processing method. [Background technology]

[0002] When building a system, the processes are carried out in the order of designing a model, implementing the designed model using code, and verifying the implemented code, and the code is modified depending on the verification results. Note that a technology for verifying software programs has been proposed, for example, as described in Patent Document 1.

[0003] Patent Document 1 discloses a method and system for verifying a software program in an integrated development environment. The method for verifying a software program in an integrated development environment includes generating source code for the software program, including logging statements, based on a specification of the software program. The method further includes executing the source code having the logging statements and generating one or more log files during execution of the source code based on the logging statements. The method further includes generating a representation of the source code in a modeling language using the one or more log files. The method includes verifying that the source code complies with the specification by comparing the representation of the source code in the modeling language with the specification in the modeling language. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Special Publication No. 2020-505710 Summary of the Invention [Problem to be solved by the invention]

[0005] However, modern systems are constructed from a large number of interrelated modules, and even if there are no problems in verifying a module alone, problems may arise when that module is linked to other modules. Prior art has not disclosed a method for intuitively grasping the relationships between such multiple modules, and the difficulty of grasping the relationships between modules has placed a burden on ensuring the quality of the system.

[0006] The present invention has been made in view of the above circumstances, and aims to reduce the burden of ensuring the quality of a system. [Means for solving the problem]

[0007] In a first aspect of the present invention, the program includes a first acquisition step of acquiring test code that describes one or more logic elements to be tested and test content for the one or more logic elements; A second acquisition step of acquiring the results of the test using the test code, and a display control step of controlling the display of presentation information indicating the correspondence between the test indicated by the test code and each of the one or more logical elements, and the results of the test using the test code, are executed.

[0008] The presentation information may further include a result of a test indicated by the test code for each of the one or more logic elements.

[0009] If the result of the test using the test code indicates failure, the display control step may control to display presentation information indicating that the test using the test code has failed for each of the one or more logical elements.

[0010] In the display control step, control may be performed to display presentation information including nodes indicating the test indicated by the test code and each of the one or more logical elements, and edges indicating the correspondence between the test indicated by the test code and each of the one or more logical elements.

[0011] In the display control step, the presentation information is displayed in a different display manner according to a success rate of a test associated with each of the one or more logical elements.

[0012] The method may further include an identification step of identifying a verification element for each of a plurality of verification items included in the test code and the one or more logical elements that each of the plurality of verification items is to verify, and in the display control step, the presentation information may be displayed that indicates the correspondence between the one or more verification elements and the one or more logical elements, and, for each of the one or more logical elements, the verification result of the verification item that is to verify that logical element.

[0013] An information processing system according to a second aspect of the present invention includes a first acquisition unit that acquires test code that describes test content for the one or more logical elements, a second acquisition unit that acquires results of tests performed using the test code, and a display control unit that controls the display of presentation information that indicates the correspondence between the tests indicated by the test code and each of the one or more logical elements, and the results of the tests performed using the test code.

[0014] An information processing method of a third aspect of the present invention includes a first acquisition step executed by a computer to acquire test code that describes one or more logical elements to be tested and test content for the one or more logical elements, a second acquisition step to acquire results of tests performed using the test code, and a display control step to control the display of presentation information that indicates the correspondence between the tests indicated by the test code and each of the one or more logical elements, and the results of tests performed using the test code. [Effects of the Invention]

[0015] According to the present invention, it is possible to present information for reducing the burden of ensuring the quality of a system. [Brief explanation of the drawings]

[0016] [Figure 1] 1 is a diagram showing a configuration of an information processing device 1. FIG. [Figure 2] 1 is a block diagram showing a functional configuration of an information processing device 1. FIG. [Figure 3] FIG. 2 is a block diagram showing the functional configuration of a reflection unit 140. [Figure 4] 1 is a flowchart showing an outline of processing executed by the information processing device 1. [Figure 5] 10 is a flowchart showing the flow of operations of the reflection unit 140. [Figure 6] 10 is a diagram for explaining the operation of a reflection unit 140. FIG. [Figure 7] FIG. 10 is a diagram showing an example of presentation information. [Figure 8] FIG. 10 is a diagram showing an example of presentation information in which a verification result is reflected. [Figure 9] 10A and 10B are diagrams illustrating examples of presentation information of logic elements including progress information and the like. [Figure 10] 10A and 10B are diagrams illustrating examples of presentation information of logic elements including progress information and the like. [Figure 11] FIG. 10 is a diagram illustrating an example of extension of presentation information. [Figure 12] This is a diagram showing the flow of integrating design and implementation. [Figure 13] FIG. 10 is a diagram for explaining the operation of a reflection unit 140 according to the second embodiment. [Figure 14] 10 is a flowchart showing an outline of processing executed by an information processing device 1 according to a second embodiment. [Figure 15] FIG. 10 is a diagram illustrating an example of presentation information according to the second embodiment. [Figure 16] FIG. 10 is a diagram illustrating an example of presentation information according to the second embodiment. [Figure 17] FIG. 10 is a diagram illustrating an example of matrix information. DETAILED DESCRIPTION OF THE INVENTION

[0017] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Various features shown in the following embodiments can be combined with each other.

[0018] Incidentally, the program for realizing the software appearing in one embodiment may be provided as a non-transitory computer-readable medium, or may be provided so that it can be downloaded from an external server, or may be provided so that the program is started on an external computer and its functions are realized on a client terminal (so-called cloud computing).

[0019] Furthermore, various information processing according to an embodiment may realize input and output corresponding to the input. Here, the form of information referenced in such information processing (hereinafter referred to as reference information) is not limited as long as an output is obtained as a result of the input. The reference information may be, for example, rule-based information such as a database, a lookup table, or a predetermined function (including a decision formula such as a regression formula constructed using a statistical method), a trained model that has previously trained the correlation between input and output, or a generative AI such as a large-scale language model or a visual language model that can output a desired result in response to a prompt input.

[0020] In one embodiment, a "unit" may include, for example, a combination of hardware resources implemented by a circuit in the broad sense and software information processing that can be specifically realized by these hardware resources. In one embodiment, various information is handled, and this information is represented, for example, by physical values ​​of signal values ​​representing voltage and current, high and low signal values ​​as a binary bit set consisting of 0 or 1, or quantum superposition (so-called quantum bits), and communication and calculations can be performed on a circuit in the broad sense.

[0021] Furthermore, a circuit in the broad sense is a circuit realized by at least an appropriate combination of a circuit, circuitry, processor, memory, etc. The processor may be a general-purpose processor or a dedicated circuit. That is, it includes an application specific integrated circuit (ASIC), a programmable logic device (e.g., a simple programmable logic device (SPLD), a complex programmable logic device (CPLD), and a field programmable gate array (FPGA)), etc.

[0022] [First embodiment] 1. Configuration of information processing device 1 is a diagram showing the configuration of an information processing device 1. As shown in the figure, the information processing device 1 has a processor 11, a storage unit 12, a temporary storage unit 13, an external device connection unit 14, and a communication unit 15, and these components are electrically connected within the information processing device 1 via a communication bus 16.

[0023] The processor 11 is realized by, for example, a central processing unit (CPU), and operates in accordance with a predetermined program stored in the storage unit 12 to realize various functions. That is, information processing by software stored in the storage unit 12 is specifically realized by the processor 11, which is an example of hardware, and can be executed as each functional unit included in the processor 11. These will be described in more detail in the next section. The processor 11 is not limited to being a single processor, and may be implemented with multiple processors 11 for each function. A combination of these may also be used.

[0024] The storage unit 12 is a non-volatile storage medium that stores various information. This is realized by a storage device such as a hard disk drive (HDD) or a solid state drive (SSD). Note that the storage unit 12 can also be arranged in another device that can communicate with the information processing device 1.

[0025] The temporary storage unit 13 is a volatile storage medium, which is realized by a memory such as a random access memory (RAM), and stores information (arguments, arrays, etc.) that is temporarily required when the processor 11 operates.

[0026] The external device connection unit 14 is a connection unit that conforms to standards such as Universal Serial Bus (USB) and High-Definition Multimedia Interface (HDMI (registered trademark)), and allows connection of input devices such as keyboards and display devices such as monitors.

[0027] The communication unit 15 is a communication means conforming to, for example, a local area network (LAN) standard, and realizes communication between the information processing device 1 and the local area network or a network such as the Internet via the local area network.

[0028] It should be noted that the information processing device 1 can be a general-purpose server computer, a personal computer, or the like, and the information processing device 1 can also be configured using a plurality of computers.

[0029] 2. Functions of the information processing device 1 Next, an information processing system will be described. The information processing system is an information processing system consisting of at least one device, and has at least one processor capable of executing each step of a program described below. Here, an information processing system is one consisting of one or more devices or components. Therefore, even an information processing device 1 alone is included in the information processing system. In other words, a device constituting the information processing system is, for example, the information processing device 1, and the information processing system is realized by one or more information processing devices 1. Note that the following description will be given taking as an example a case where an information processing system is constituted by one information processing device 1.

[0030] The functions of the information processing device 1 will now be described. The information processing device 1 operates in accordance with a program to realize each of the functional units described below. This program causes at least one computer to execute each of the steps described below. Specifically, the processor 11, which is hardware, operates based on a program stored in the storage unit 12, i.e., software, to realize each of the functional units described below. At this time, the processor 11 operates the storage unit 12, temporary storage unit 13, external device connection unit 14, and communication unit 15 as necessary.

[0031] 2 is a block diagram showing the functional configuration of the information processing device 1. As shown in the figure, the information processing device 1 includes a design unit 110, an implementation unit 120, a verification unit 130, and a reflection unit 140. That is, information processing by software stored in the storage unit 12 is specifically realized by a processor 11, which is an example of hardware, and can be executed as each functional unit included in the processor 11.

[0032] Specifically, the design unit 110 is a functional unit that designs a model, the implementation unit 120 is a functional unit that implements the model designed by the design unit 110 using code, the verification unit 130 is a functional unit that verifies the code implemented by the implementation unit 120, and the reflection unit 140 is a functional unit that reflects the verification results by the verification unit 130 in the model designed by the design unit 110. Note that the design unit 110, the implementation unit 120, and the verification unit 130 can each be realized by general-purpose software. In that case, depending on the specifications of each software, it is also possible for information to be passed from the design unit 110 to the reflection unit 140 or from the implementation unit 120 to the reflection unit 140, as shown by the dashed arrows in FIG. 2.

[0033] Next, the function of the reflection unit 140 will be described. FIG. 3 is a block diagram showing the functional configuration of the reflection unit 140. As shown in FIG. 3, the reflection unit 140 includes an identification unit 141, an acquisition unit 142, and a generation unit 143. The identification unit 141 executes an identification step, in which the identification step identifies logical elements to be verified and verification items for the logical elements from code implemented based on a model. The identification unit 141 may also acquire test code and, based on the acquired test code, identify one or more logical elements to be tested and verification items for each of the one or more logical elements. The test code describes one or more logical elements to be tested and verification items for the one or more logical elements. For example, the verification items describe the name of the verification item, the content of the test, and a method for determining whether the test is successful. The test code may include multiple verification items. The identification unit 141 may also acquire multiple test codes. The acquisition unit 142 executes an acquisition step, in which the acquisition step acquires verification results for the logical elements. The generation unit 143 executes a generation step, in which the verification results are associated with the logical elements to generate presentation information in which the model is represented as a diagram. The model represented as a diagram, i.e., the model designed by the design unit 110, is, for example, written in a modeling language or written as a model on a modeling tool. According to this embodiment, various verification functions of the program, which will be described later, can be realized for the model written in a modeling language or the model written as a model on a modeling tool.

[0034] 3. Information Processing Method This section describes an information processing method executed by an information processing system (here, information processing device 1). Note that the order of processes included in the information processing method can be changed as appropriate, multiple processes may be executed simultaneously, or some processes may be omitted.

[0035] 3.1 Overview As described above, the information processing device 1 includes at least one processor 11, which functions as each of the following units by reading a program. In other words, the information processing method includes steps corresponding to each unit of the information processing system. From another perspective, the program causes a computer to execute steps corresponding to each unit of the information processing system. FIG. 4 is a flowchart showing an outline of the processing executed by the information processing device 1. Each step shown in FIG. 4 will be described below.

[0036] First, in the process shown in FIG. 4 , the identification step identifies a logic element 2 to be verified from code implemented based on a model and the verification items 3 for the logic element 2 (step S001). The acquisition step acquires the verification results 4 for the logic element 2 (step S002). The generation step associates the verification results 4 with the logic element 2 and generates presentation information representing the model in a diagram (step S003). This aspect allows the verification results of the implemented code to be reflected in the designed model, making it possible to verify the consistency between design and implementation. Providing this means for verifying the consistency between design and implementation leads to a development system that maintains the consistency between design and implementation over the long term, ultimately realizing an environment that continuously produces high-quality development deliverables. Furthermore, the ability to reflect a large number of verification results in the design model all at once makes it possible to prevent discrepancies between the design model and the implemented code.

[0037] 3.2 Specific examples Specific examples may be included within the scope defined in the above-mentioned overview. Fig. 5 is a flowchart showing the flow of the operation of the reflection unit 140. Fig. 6 is a diagram for explaining the operation of the reflection unit 140. In the specific examples, it is assumed that a user who has implemented source code and test code in an implementation environment included in this program tests the source code. Specifically, a test is executed when the user presses (e.g., clicks, taps, etc.) a button for executing a test, which is included in the user interface of the implementation environment.

[0038] When the initial pressing operation is performed, the identification unit 141 first identifies a logical element 2 from the source code and test code implemented by the implementation unit 120 (step S101), and then identifies a verification item 3 for the identified logical element 2 (step S102). In other words, as the identification step, the identification unit 141 identifies the logical element 2 to be verified and the verification item 3 for the logical element 2 from the code implemented based on the model. Because the source code and test code are written according to predetermined rules, the logical element 2 and the verification item 3 can be identified according to the rules, specifications, etc. of the corresponding programming language.

[0039] Next, the reflection unit 140 causes the verification unit 130 to execute verification and waits for the verification to finish (step S103). Note that step S103 in Fig. 3 is not an operation of the reflection unit 140, but is described for the sake of explanation.

[0040] When the verification by the verification unit 130 is completed, the acquisition unit 142 of the reflection unit 140 acquires the verification result 4 and records it in association with the corresponding test item (step S104). In other words, the acquisition unit 142 acquires the verification result 4 of the logic element 2 as an acquisition step.

[0041] Next, in response to an operation by the user, the screen transitions from the implementation environment screen to the model design environment screen (step S105).

[0042] Next, in response to a user operation, the identification unit 141 analyzes the contents of the implemented test code and extracts a list of verification items 3, which previously had to be done manually, on the user interface of the model design environment (step S106).

[0043] Then, the generation unit 143 generates presentation information in a manner that allows the list of verification items 3 to be grasped (step S107). The generated presentation information may be displayed on a display (not shown) connected via the external device connection unit 14. The generation unit 143 may also control the display of the presentation information on another device via the communication unit 15. This allows the user to grasp the verification items 3 automatically listed as described above and the corresponding verification results 4 in the model design environment via the generated presentation information. Details will be explained further in the next section. In other words, as a generation step, the generation unit 143 generates presentation information that associates the verification results 4 with the logical elements 2 and represents the model in a diagram.

[0044] The above is the process flow according to the specific example. Note that the above assumptions and process flow are merely examples and are not limited to these. For example, step S107 may be executed before steps S105 and S106. In either case, the user can understand the verification items 3 automatically listed as described above and the corresponding verification results 4 in the model design environment via the generated presentation information. Conventionally, it has not been possible to visually confirm the consistency between design and implementation. However, according to the above-described aspect, it is possible to prevent a deviation between the design model and the implemented code, which is caused by the conventional independent processes.

[0045] 4. Presentation information Next, the presentation information generated by the generation unit 143 will be described. FIG. 7 is a diagram showing an example of the presentation information. The presentation information shown in FIG. 7 is a diagram representing the model designed by the design unit 110, and is composed of a logic element 201, a logic element 202, a logic element 203, a logic element 204, a logic element 205, and a logic element 206. It also shows that the logic element 201 is composed of a logic element 202, a logic element 203, a logic element 204, a logic element 205, and a logic element 206. Each logic element 2 has a corresponding verification item 3, and the verification items 3 are automatically listed in the user interface of the model design environment. For example, when the logic element 202 is referenced, the verification items 3, such as fff(), ggg(), and hhh(), are automatically listed. For example, if there are 1,000 verification items 3, it would be time-consuming to input all 1,000 verification items 3 in the model design environment, but this program eliminates this time-consuming effort. In particular, because the relationships between multiple logical elements 2 can be visually grasped, for example, if there are consecutive logical elements 2, if the verification of the preceding logical element 2 fails, the subsequent logical element 2 will also fail. This allows for visual and intuitive understanding. Furthermore, not only does it ensure consistency between design and implementation, but it also makes it possible to judge the validity of verification on the design model. In other words, it creates an environment in which logical consistency can be grasped in a seamless manner throughout the entire process of design, implementation, and verification. The relationships between logical elements in the presented information may be generated based on the interrelationships between logical elements described in the source code.

[0046] Furthermore, when verification is performed by the verification unit 130, the presentation information generated by the generation unit 143 reflects the verification result. FIG. 8 is a diagram illustrating an example of presentation information reflecting the verification result. In the presentation information, for example, logical elements are represented in different ways (e.g., different colors) depending on whether the verification result is successful, i.e., the verification is passed, or whether the verification result is unsuccessful, i.e., the verification is failed. In the example illustrated in FIG. 8, logical elements 202 and 204 have been verified successfully and are represented in a color indicating successful verification, e.g., green. On the other hand, logical elements 201, 203, and 205 are represented in a color indicating unsuccessful verification, e.g., red. According to this aspect, the success or failure of the verification result of the implemented code can be recognized through easy-to-understand visual information, i.e., the difference in color.

[0047] Furthermore, in the presented information, the color representing the logical elements corresponding to the verification result is different from the color representing the logical elements not corresponding to the verification result. In the example shown in FIG. 8, the logical element 206 does not correspond to the verification result, so it is represented in a color different from the logical elements 201 and 202, for example, white. According to this aspect, the verification result of the implemented code can be recognized through easy-to-understand visual information such as the difference in color. Note that the verification by the verification unit 130 may be performed repeatedly. In this case, the presented information may be displayed in a manner that maintains the color representing the logical elements not corresponding to the verification result the same as the previous color. According to this aspect, by not changing the color of the logical elements not corresponding to the verification result among the verification results of the implemented code, the user can recognize the verification result more clearly.

[0048] Meanwhile, verification by the verification unit 130 is performed for each verification item, but a logical element may include multiple verification items. In this case, the colors of the logical elements indicated by the presentation information may not only be different for successful verification and unsuccessful verification, but may also be a color indicating that more than half of the verification items have been successfully verified, such as yellow. Furthermore, the presentation information may be configured to indicate the colors representing the logical elements in colors corresponding to the percentage of successful verification results. According to this aspect, multiple verification items can be recognized from the verification results of the implemented code through easy-to-understand visual information such as different colors.

[0049] Furthermore, when a logic element includes multiple verification items, the presented information may be configured to display progress information indicating the percentage of verification results that have been successful in association with the logic element corresponding to the progress information. Alternatively, the presented information may be displayed in a manner in which a character string indicating the verification result (e.g., success or failure) is associated with the logic element corresponding to the verification result. This configuration allows the user to easily grasp the progress of multiple verification items and more clearly recognize the verification results. FIGS. 9 and 10 are diagrams showing examples of presented information for a logic element including progress information, etc. As shown in the diagrams, a logic element 210 includes a name 211, summary information 212, progress status information 213, and verification result information 214. This logic element 210 can be used as a substitute for the logic elements 201, 202, etc. shown in FIG. 8.

[0050] The name 211 is the name of the logic element 210, and the summary information 212 is information that indicates an overview of the definition information, functions, and the like included in the logic element 210. The progress status information 213 indicates the percentage of verification items that have been successfully verified by the verification unit 130 as progress (represented as test success rate in the figure). For example, if there are 10 verification items and 5 of them have been successfully verified, the progress status is 50%. The verification result information 214 is character string information that indicates the verification result. Note that by changing the color of the bar 213B indicating the progress status included in the progress status information 213 to the color (e.g., green) that is used when the progress information of the logic element 210 reaches 100%, that is, when verification of all verification items has been successful, the color of the logic element 210 is unified as shown in FIG. 10, and the visibility of the diagram including the logic element 210 is improved.

[0051] 5. Expanded display information Here, an example of extension of the presentation information will be described. FIG. 11 is a diagram showing an example of extension of the presentation information. As shown in FIG. 11, when progress status information is included in the logical elements included in the diagram of the presentation information, the progress information can be displayed in the form of a graph as the presentation information. This graph is generated for each logical element, and graphs showing the progress information of each of the logical elements can also be displayed side by side. According to this embodiment, the progress of multiple verification items can be easily grasped through easy-to-understand visual information such as a graph. In this example, the number of successes is 110, while the number of failures is 7. In particular, when there are a huge number of verification items, such as more than 100, the success rate can be instantly grasped by visual information such as a graph.

[0052] 6. Integrating Design and Implementation As described above, by using the information processing device 1, it is possible to display verification results indicating the validity of the implementation in the model in the design area, thereby preventing deviation between the design and implementation and promoting development. As a result, it is possible to integrate the designed model with the implementation based on that model. FIG. 12 is a diagram showing the flow of integrating design and implementation. If the design and implementation are not integrated, there are issues such as the design information not being updated even though the design and implementation are completely different, the inability to grasp the comprehensiveness of the verification for the entire system, and the repetition of ad hoc verification with no end in sight. One of the causes of these issues is the gradual loss of opportunities to access design information during the design, implementation, and verification processes.

[0053] In contrast, if design and implementation are integrated, · Reflecting a large amount of unit test results in the design model (UML, SysML) all at once - Unit test date and time, and the location and cause of failure when a test fails can also be reflected. -Successful elements are green, and failed elements are red, allowing you to instantly distinguish between them. -Supports large-scale development · Contributes to updating design information in organizations working on design, implementation, and verification Ideal for building a system that ensures consistency between design, implementation, and verification - Implementation can be visually confirmed on the design information, making it easy to grasp the implementation status. - Visual judgment helps maintain motivation at the development site This makes it possible to:

[0054] 7.Other The information processing system according to the above embodiment may adopt the following aspects.

[0055] At least one of the devices included in the information processing system (e.g., the information processing device 1) may be installed outside Japan. For example, the information processing device 1 may be installed outside Japan, and a user terminal connected to the information processing device 1 via a network may be installed inside Japan. Similarly, a user may access the information processing device 1 installed inside Japan from outside Japan using their own user terminal. This configuration may be, for example, a type of SaaS using a website provided by the information processing device 1. In such a service, a user may access the website and upload predetermined information such as test code, thereby obtaining presented information in which the verification result 4 is reflected in a model. In other words, according to this configuration, a more convenient experience can be provided to the user through various management configurations.

[0056] In one embodiment, the various functional units are described as functional units implemented by the processor 11 of the information processing device 1, but at least some of these may be implemented as functional units implemented by a server other than the information processing device 1. Alternatively, they may be implemented as functional units implemented by a processor of a user terminal. Furthermore, the various pieces of information described in the above example may be stored not only in the storage unit 12 of the information processing device 1 but also in a distributed manner in other external devices using blockchain technology or the like.

[0057] [Second embodiment] Next, an information processing device 1 according to a second embodiment will be described. In the following, the same components as those according to the first embodiment will be assigned the same reference numerals, and their description will be omitted. The information processing device 1 according to the second embodiment differs from the information processing device 1 according to the first embodiment in that it displays presented information indicating the relationship between logic elements 2 and test code. By having a configuration according to such a difference, the second embodiment can present information that makes it easier to understand the relationship between logic elements 2 that are interrelated via test code.

[0058] The operation of the information processing device 1 according to the second embodiment will be described with reference to Fig. 13 and Fig. 14. Fig. 13 is a diagram for explaining the operation of the reflection unit 140 according to the second embodiment. Fig. 14 is a flowchart showing an outline of the processing executed by the information processing device 1 according to the second embodiment. As an example, the flowchart shown in Fig. 14 is started when an operation for executing a test is performed.

[0059] The acquiring unit 142 acquires test code (S201). The acquiring unit 142 may acquire multiple test codes. The identifying unit 141 analyzes the syntax of the acquired test code and identifies one or more logic elements 2 to be verified in the test code and verification items 3 (S202). As an example, the identifying unit 141 may analyze target class names and function names from test code written in a general unit test framework such as JUnit or pytest to automatically acquire associations with the corresponding logic elements 2. The identifying unit 141 may also identify logic elements 2 and verification items 3 for the logic elements 2 based on the source code as described above.

[0060] The identification unit 141 may identify a verification element 5. A verification element 5 is an element obtained by grouping one or more verification items 3 according to the target or purpose of the test. For example, the identification unit 141 identifies the verification element 510 and the verification items 3 included in the verification element 5 based on the unit in which the verification items 3 are described in the test code. Furthermore, the verification element 5 to which each verification item 3 belongs may be specified in advance in the test code. Note that there may be a one-to-one relationship between the verification element 5 and the verification item 3, or there may be a one-to-one relationship between the test code and the verification element 5.

[0061] Next, the verification unit 130 executes the test code acquired by the acquisition unit 142 (S203). As an example, the verification unit 130 stores the verification results for each verification item 3 indicated by the test code in the storage unit 12. The verification unit 130 may output the verification results to the acquisition unit 142. The acquisition unit 142 acquires the results of the test performed by the test code executed by the verification unit 130 (S204).

[0062] The generation unit 143 generates presentation information indicating (1) the correspondence between the test indicated by the test code and each of one or more logic elements 2, and (2) the result of the test by the test code (S205). The generation unit 143 controls the presentation information to be displayed on a display or the like (not shown) connected via the external device connection unit 14 (S206). Note that the generation unit 143 may also control the presentation information to be displayed on another device via the communication unit 15.

[0063] The presented information in the second embodiment will be described with reference to Fig. 15. The presented information includes the identified logic element 210 and the verification element 510. The information displayed in the logic element 210 has already been described.

[0064] For example, the verification element 510 includes a test name 511, progress status information 512, and verification result information 513. The test name 511 is a name assigned to the verification element 510. The progress status information 512 is information for quantitatively indicating the progress of the verification items included in the verification element 510. The generation unit 143 calculates the success rate of each verification element 510 based on the verification result of verification item 3 associated with the verification element 510. For example, if 98 out of 100 verification items included in the verification element 510 are successful, the success rate of the verification element 510 is set to 98%. In other words, the presentation information includes information that numerically indicates the success rate of the verification result for each logic element 2 and verification element 510. According to this aspect, the verification results for each logic element and each verification element can be quantitatively evaluated, making it possible to numerically identify quality bottlenecks and provide objective indicators that contribute to continuous improvement.

[0065] 15 , the presentation information may be configured to include a directional line indicating the correspondence between the test code and the logic element 210. Specifically, as shown in FIG. 15 , the presentation information is configured to display the logic element 210 and the verification element 510 as nodes, and display the relationship between the verification element 510 and the logic element 210 that is the verification target of the verification item indicated by the verification result information 513 included in the verification element 510 as an edge, thereby making it possible to visually grasp the correspondence between the test code and the logic element 210.

[0066] Specifically, the verification element 510 and the logic element 210 that is the verification target of the verification item included in the verification element 510 are connected by a directional edge 230 that indicates the relationship between the test and the test target. As an example, the start point of the edge 230 is the verification element 510, and the end point of the edge 230 is the logic element 210. As an example, a tag indicating that the relationship indicated by the edge 230 is between the test and the test target is superimposed on the edge 230. By configuring the information processing device 1 to generate such presentation information, it is possible to easily intuitively understand which logic element 210 is affected by the failure of a verification item described in a specific test code, and as a result, it is possible to intuitively grasp the relationship between the logic elements 210 that are indirectly related via the test.

[0067] 15 shows that the verification items included in the verification element 510B target the logic elements 210A, 210B, and 210C. In this way, the arrows connecting the respective elements allow the interdependence between them to be visually understood. Furthermore, when there are multiple related logic elements 210, the degree of influence may be indicated by the color or thickness of the related arrows.

[0068] The generating unit 143 may be configured to generate presentation information in which logic elements 210 that are indirectly related to each other via a verification element 510 are connected by an edge. That is, the generating unit 143 generates presentation information in which logic elements that are targets of verification for the same verification item are connected by an edge. In this case, when logic elements 210 are commonly associated with a plurality of verification elements 510, the presentation information may be configured to show the edge in different modes (different colors or thicknesses) depending on the number of commonly associated verification elements 510. By configuring the information processing device 1 to generate and display such presentation information, it is possible to provide a user with information that enables them to easily grasp the degree of influence between the logic elements 210.

[0069] If the result of the test using the test code indicates failure, the generation unit 143 generates presentation information indicating that the test using the test code has failed for each of one or more logic elements 210. In the presentation information shown in Fig. 15, if the test for a verification item has failed, information indicating that the verification item has failed is displayed for each verification element 510 corresponding to the verification item and for each logic element 210 associated with the verification element 510. By configuring the information processing device 1 in this way, it is possible to provide information for visually understanding the degree of influence between logic elements 210 via a test.

[0070] The presentation information may be configured so that, when a specific verification element 510 is selected, the logic element 210 to be verified by the selected verification element 510 is displayed in a different manner (for example, a different color) from the other logic elements 210. This configuration allows the user to intuitively understand the relationship between the verification element 510 and the logic elements 210. In this case, the generation unit 143 generates presentation information configured to allow the verification element 510 to be selected, and configured so that, when the verification element 510 is selected, the logic element 210 to be verified by the verification element 510 is displayed in a different color from the other logic elements 210.

[0071] The information processing device 1 may be configured to display the presentation information in different ways (e.g., different colors) for the logic elements 2 and the verification elements 5 depending on the success rate. This configuration makes it possible to provide information that allows the user to easily understand the relevance of the logic elements 2 related to a specific verification item 3. That is, the generation unit 143 generates presentation information for displaying each of the logic elements 2 in different display ways depending on the success rate of the test that is the verification target for each of the logic elements 2. The presentation information generated in this case is shown in FIG. 16.

[0072] In the presented information shown in FIG. 16 , the success rate of each logic element 210 and each verification element 510 is displayed numerically, and each logic element 210 and each verification element 510 is displayed in a different color depending on the success rate. For example, logic elements 210 and verification elements 510 with a 100% success rate are displayed in green, those with a success rate of less than 100% are displayed in orange, and those with a success rate of less than 50% are displayed in red. This allows the user to quickly identify the location of an anomaly. With this configuration, if a specific verification item has an anomaly, the logic element 210 associated with that verification item can be identified by visually checking the color. This allows the user to visually easily understand the relationship between the logic elements 210 related to the specific verification item. Furthermore, this aspect allows the user to intuitively understand the pass / fail of the verification result of each logic element 210 by color, improving visibility and allowing the user to quickly detect anomalies and assess progress. The ability to quickly identify components with particularly noticeable failures is expected to improve the efficiency of debugging and correction work.

[0073] The generation unit 143 may be configured to generate matrix information for displaying the verification results for each logic element 210 in a matrix format and to display the generated matrix information. An example of the matrix information is shown in FIG. 17. In the matrix information, test codes are arranged in rows and logic elements 210 are arranged in columns, with the progress of the test being shown in each column. This embodiment makes it possible to comprehensively grasp the correspondence between the test codes and the logic elements 210, and to quantitatively and systematically check whether there are any omissions in the verification and the success / failure status. This is particularly effective for checking the coverage of multiple tests.

[0074] The identifying unit 141 may cooperate with a configuration management system (not shown) to acquire version information and the development manager of each logical element 210 in the acquisition step. In this case, the generating unit 143 may generate presentation information that further includes the version information and development manager information of each logical element 210 acquired in the acquisition step. By configuring the information processing device 1 in this way, it is possible to provide information that makes it easy to guarantee the quality of the system.

[0075] As described above, the information processing device according to the second embodiment automatically extracts the correspondence between the test code and the logic elements 210 and visually presents the verification results, thereby enabling a unified understanding of the verification status, accelerating quality evaluation, and improving debugging efficiency. In particular, by visually displaying the relationship between the logic elements 210 and the verification items and displaying the results according to the test pass status, it is possible to visualize the indirect relationships between the logic elements 210.

[0076] [others] At least some of the components included in the information processing system may be installed outside of Japan. For example, a server that performs visualization processing and test code execution processing may be configured on the cloud, and client terminals may be located within Japan. This configuration makes it possible to provide high-performance verification and visualization processing without being subject to geographical restrictions.

[0077] In one embodiment, the processor is described as being configured in a server device, but at least a part of the processing may be executed on a user terminal or in a local environment. In particular, since execution and visualization of test code can be sufficiently performed on a development terminal alone, the processing may be performed in an environment that does not require a network connection. This aspect allows for flexible application even in cases where there are internal confidentiality or restrictions on taking source code out of the company.

[0078] The test code history and verification results may be recorded in a distributed ledger such as a blockchain. This configuration makes it possible to prevent tampering of test results and strictly maintain quality traceability, which is particularly useful in areas where safety is required, such as medical devices, automobiles, and aviation.

[0079] In one embodiment, the system is intended for use by a single development team, but in large-scale projects involving multiple teams and development vendors, the visualization may be divided into modules for each team and then integrated for display. This allows the system to manage the quality status of each team individually while centrally understanding overall dependencies and progress.

[0080] It is also possible to visualize logical elements using not only test code but also static analysis results, code coverage results, performance profile information, etc. In this manner, it functions as a general-purpose visualization platform that can evaluate and improve software quality from multiple angles, including perspectives other than testing.

[0081] The acquired test results and success rates may be compared with past verification history to display improvement or deterioration trends. According to this aspect, in a continuous integration (CI) / continuous delivery (CD) environment, the quality transition for each build can be visualized, promoting improvement of the entire development process.

[0082] Finally, while various embodiments of the present invention have been described, these are presented by way of example only and are not intended to limit the scope of the invention. The novel embodiments may be embodied in various other forms, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. Such embodiments and modifications are intended to be included within the scope and spirit of the invention, as well as within the scope of the inventions and their equivalents as defined in the accompanying claims.

Claims

1. On the computer, a first acquisition step of acquiring test code that describes one or more logic elements to be tested and test content for the one or more logic elements; a second acquisition step of acquiring a result of the test by the test code; a display control step of controlling the display of presentation information indicating a correspondence between the test indicated by the test code and each of the one or more logic elements, and a result of the test by the test code; Execute In the display control step, control is performed to display presentation information including nodes indicating the test indicated by the test code and each of the one or more logical elements, and edges indicating correspondence between the test indicated by the test code and each of the one or more logical elements. program.

2. On the computer, a first acquisition step of acquiring test code that describes one or more logic elements to be tested and test content for the one or more logic elements; a second acquisition step of acquiring a result of the test by the test code; a display control step of controlling the display of presentation information indicating a correspondence between the test indicated by the test code and each of the one or more logic elements, and a result of the test by the test code; Execute In the display control step, the presentation information is displayed in a different display mode depending on a success rate of a test for verifying each of the one or more logic elements. program.

3. the presentation information further includes a result of a test indicated by the test code for each of the one or more logic elements. The program according to claim 1 or 2.

4. When the result of the test by the test code indicates failure, the display control step controls to display the presentation information indicating that the test by the test code has failed for each of the one or more logic elements. The program according to claim 1 or 2.

5. The method further includes a step of identifying a verification element for each of a plurality of verification items included in the test code and the one or more logic elements to be verified by each of the plurality of verification items, In the display control step, the presentation information indicating a correspondence between the verification element and the one or more logical elements to be verified by the verification element, and a verification result of a verification item for which the logical element is to be verified, for each of the one or more logical elements, is displayed. The program according to claim 1 or 2.

6. An information processing system comprising at least one device, The program according to claim 1 or 2, further comprising at least one processor capable of executing the steps of the program. Information processing system.

7. The computer executes The program according to claim 1 or 2, Information processing methods.

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