Output potential switching circuit

Abstract

To construct an output potential switching circuit that is applied to a multilevel inverter by using general-purpose semiconductor modules.SOLUTION: An output potential switching circuit (30) is applied to a multilevel inverter, receives input of multilevel potentials and switches the output potential to any one of the multilevel potentials. The output potential switching circuit comprises a plurality of semiconductor modules (40A, 40B) each comprising: a first switching element (41) to which a first diode (42) is antiparallel-connected; a second switching element (43) to which a second diode (44) is antiparallel-connected; a P-terminal to which a positive electrode terminal of the first switching element is connected; an O-terminal to which a negative electrode of the first switching element and a positive electrode terminal of the second switching element are connected; and a N-terminal to which the negative electrode terminal of the second switching element is connected. The P-terminal of one semiconductor module (40A) and the O-terminal of the other one semiconductor module (40B) are connected to each other.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to an output potential switching circuit applied to a multilevel inverter. [Background technology]

[0002] Conventionally, in a semiconductor module applied to a three-level inverter, there is one in which a series-connected circuit of IGBTs connected between the P and N terminals of a DC power supply and an AC switch element connected between the series connection point of this series-connected circuit and the neutral point of the DC power supply are built into a single package (see Patent Document 1). This configuration is said to reduce wiring inductance and lower the cost of the device. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-193779 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in order to produce the semiconductor module (output potential switching circuit) described in Patent Document 1, it is necessary to develop a dedicated semiconductor module and set up a new production line, which may increase the total cost of producing the semiconductor module.

[0005] The present invention has been made to solve the above-mentioned problems, and a main object of the present invention is to configure an output potential switching circuit that is applied to a multilevel inverter using a general-purpose semiconductor module. [Means for solving the problem]

[0006] The first means for solving the above problem is: An output potential switching circuit (30, 30A) applied to a multilevel inverter, which receives a multilevel potential and switches an output potential to one of the multilevel potentials, a plurality of semiconductor modules (40, 40A, 40B, 40C, 40D) each including a first switching element (41) having a first diode (42) connected in anti-parallel, a second switching element (43) having a second diode (44) connected in anti-parallel, a P terminal to which a positive terminal of the first switching element is connected, an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected, and an N terminal to which a negative terminal of the second switching element is connected; The P terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is connected to the O terminal of another of the semiconductor modules (40B, 40C, 40D).

[0007] According to the above configuration, the output potential switching circuit is applied to a multilevel inverter, receives multilevel potentials as input, and switches the output potential to one of the multilevel potentials.

[0008] Here, the output potential switching circuit includes a first switching element having a first diode connected in anti-parallel, a second switching element having a second diode connected in anti-parallel, a P terminal connected to the positive terminal of the first switching element, an O terminal connected to the negative terminal of the first switching element and the positive terminal of the second switching element, and an N terminal connected to the negative terminal of the second switching element (hereinafter referred to as "general-purpose semiconductor modules"). The general-purpose semiconductor modules are semiconductor modules that are generally used in three-phase two-level inverters and the like, and constitute a circuit for one phase.

[0009] The P terminal of one of the semiconductor modules (hereinafter referred to as the "first semiconductor module") is connected to the O terminal of the other of the semiconductor modules (hereinafter referred to as the "second semiconductor module"). Therefore, for example, if an output potential switching circuit is composed of only a first semiconductor module and a second semiconductor module, a positive potential can be input to the P terminal of the second semiconductor module, a neutral potential can be input to the N terminal of the second semiconductor module, and a negative potential can be input to the N terminal of the first semiconductor module. By operating the switching elements of the first and second semiconductor modules, the output potential output from the O terminal of the first semiconductor module can be switched to any one of the positive potential, neutral potential, and negative potential. Therefore, an output potential switching circuit applicable to a multilevel inverter can be configured using general-purpose semiconductor modules.

[0010] When the P terminal of a second semiconductor module (one of the semiconductor modules) is connected to the O terminal of another one of the semiconductor modules (hereinafter referred to as the "third semiconductor module"), an output potential switching circuit applicable to a four-level inverter can be configured by inputting a positive potential to the P terminal of the third semiconductor module, a first intermediate potential to the N terminal of the third semiconductor module, a second intermediate potential to the N terminal of the second semiconductor module, and a negative potential to the N terminal of the first semiconductor module. Similarly, by adding further general-purpose semiconductor modules, an output potential switching circuit applicable to a five-level or higher inverter can also be configured.

[0011] In the second method, the semiconductor module is formed in a plate shape, and the P terminal, the N terminal, and the O terminal are arranged in this order at an end (49a) of the semiconductor module in a predetermined direction, and the one semiconductor module and the other one semiconductor module are arranged in an inverted, stacked manner in the plate thickness direction so that the P terminal of the one semiconductor module faces the O terminal of the other one semiconductor module.

[0012] According to the above configuration, the P terminal of the one semiconductor module faces the O terminal of the other one of the semiconductor modules, making it easier to connect the P terminal of the one semiconductor module and the O terminal of the other one of the semiconductor modules. Furthermore, because the direction of current flow through the P terminal of the one semiconductor module is opposite to the direction of current flow through the O terminal of the other one of the semiconductor modules, the inductance of these terminals can be reduced, thereby reducing loss. Moreover, because the one semiconductor module and the other one of the semiconductor modules are arranged facing upside down and stacked in the thickness direction, the arrangement space for multiple semiconductor modules can be reduced.

[0013] In a third method, the semiconductor module is formed in a plate shape, and the P terminal, the N terminal, and the O terminal are arranged in this order at an end of the semiconductor module in a predetermined direction, and the one semiconductor module and the other one of the semiconductor modules are arranged side by side in the plate thickness direction with the front and back facing the same direction so that the P terminal of the one semiconductor module faces the O terminal of the other one of the semiconductor modules.

[0014] According to the above configuration, the P terminal of the one semiconductor module faces the O terminal of the other one of the semiconductor modules, making it easier to connect the P terminal of the one semiconductor module to the O terminal of the other one of the semiconductor modules. Furthermore, because the direction of current flowing through the P terminal of the one semiconductor module is opposite to the direction of current flowing through the O terminal of the other one of the semiconductor modules, the inductance of these terminals can be reduced, thereby reducing losses.

[0015] In a fourth means, the semiconductor module is formed in a plate shape, and the P terminal, the N terminal, and the O terminal are arranged in this order at an end of the semiconductor module in a predetermined direction, and the one semiconductor module and the other one of the semiconductor modules are arranged with the front and back facing the same direction, in the arrangement direction of the P terminal, the N terminal, and the O terminal, so that the P terminal of the one semiconductor module and the O terminal of the other one of the semiconductor modules are adjacent to each other.

[0016] According to the above configuration, since the P terminal of the one semiconductor module and the O terminal of the other one of the semiconductor modules are adjacent to each other, it is easy to connect the P terminal of the one semiconductor module and the O terminal of the other one of the semiconductor modules. Furthermore, since the direction of current flowing through the P terminal of the one semiconductor module is opposite to the direction of current flowing through the O terminal of the other one of the semiconductor modules, the inductance of these terminals can be reduced, thereby reducing loss.

[0017] In a fifth means, the semiconductor module is formed in a plate shape, and the P terminal, the O terminal, and the N terminal are arranged in this order at the end of the semiconductor module in a predetermined direction, and the one semiconductor module and the other semiconductor module are arranged side by side in the plate thickness direction with the front and back facing the same or opposite sides so that the P terminal of the one semiconductor module faces the O terminal of the other semiconductor module.

[0018] According to the above configuration, the P terminal of the one semiconductor module faces the O terminal of the other one of the semiconductor modules, making it easier to connect the P terminal of the one semiconductor module to the O terminal of the other one of the semiconductor modules. Furthermore, because the direction of current flowing through the P terminal of the one semiconductor module is opposite to the direction of current flowing through the O terminal of the other one of the semiconductor modules, the inductance of these terminals can be reduced, thereby reducing losses.

[0019] Specifically, as in the sixth aspect, a configuration can be adopted in which the O terminal of the semiconductor module to which the lowest potential of the multi-level potentials is input to the N terminal is connected to one phase coil of a rotating electric machine, and a potential of the multi-level potentials higher than the potential input to the N terminal of one of the semiconductor modules is input to the N terminal of the other one of the semiconductor modules. With this configuration, one output potential switching circuit is associated with one phase coil of the rotating electric machine, and the potential output to one phase coil of the rotating electric machine can be switched to a multi-level potential.

[0020] The seventh measure is: An output potential switching circuit (50, 50A) applied to a multilevel inverter, which receives a multilevel potential and switches an output potential to one of the multilevel potentials, a plurality of semiconductor modules (40, 40A, 40B, 40C, 40D) each including a first switching element (41) having a first diode (42) connected in anti-parallel, a second switching element (43) having a second diode (44) connected in anti-parallel, a P terminal to which a positive terminal of the first switching element is connected, an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected, and an N terminal to which a negative terminal of the second switching element is connected; The N terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is connected to the O terminal of another of the semiconductor modules (40B, 40C, 40D).

[0021] According to the above configuration, as with the first aspect, the output potential switching circuit includes a plurality of general-purpose semiconductor modules. The N terminal of one of the semiconductor modules (hereinafter referred to as the "first semiconductor module") is connected to the O terminal of the other of the semiconductor modules (hereinafter referred to as the "second semiconductor module"). Therefore, for example, if the output potential switching circuit is composed only of a first semiconductor module and a second semiconductor module, a positive potential can be input to the P terminal of the first semiconductor module, a neutral potential can be input to the P terminal of the second semiconductor module, and a negative potential can be input to the N terminal of the second semiconductor module. By operating the switching elements of the first and second semiconductor modules, the output potential output from the O terminal of the first semiconductor module can be switched to any one of the positive potential, neutral potential, and negative potential. Therefore, an output potential switching circuit applicable to a multilevel inverter can be configured using general-purpose semiconductor modules.

[0022] When the O terminal of another semiconductor module (hereinafter referred to as the "third semiconductor module") is connected to the N terminal of a second semiconductor module (one of the semiconductor modules), an output potential switching circuit applicable to a four-level inverter can be configured by inputting a positive potential to the P terminal of the first semiconductor module, a first intermediate potential to the P terminal of the second semiconductor module, a second intermediate potential to the P terminal of the third semiconductor module, and a negative potential to the N terminal of the third semiconductor module. Similarly, by adding further general-purpose semiconductor modules, an output potential switching circuit applicable to a five-level or higher inverter can also be configured.

[0023] In the eighth means, the semiconductor module is formed in a plate shape, and the N terminal, the P terminal, and the O terminal are arranged in this order at an end (49a) of the semiconductor module in a predetermined direction, and the one semiconductor module and the other one semiconductor module are arranged in an inverted, stacked manner in the plate thickness direction so that the N terminal of the one semiconductor module faces the O terminal of the other one semiconductor module.

[0024] According to the above configuration, the N terminal of the one semiconductor module faces the O terminal of the other one of the semiconductor modules, making it easier to connect the N terminal of the one semiconductor module to the O terminal of the other one of the semiconductor modules. Furthermore, because the direction of current flow through the N terminal of the one semiconductor module is opposite to the direction of current flow through the O terminal of the other one of the semiconductor modules, the inductance of these terminals can be reduced, thereby reducing losses. Moreover, because the one semiconductor module and the other one of the semiconductor modules are arranged facing upside down and stacked in the thickness direction, the arrangement space for multiple semiconductor modules can be reduced.

[0025] In the ninth means, the semiconductor module is formed in a plate shape, and the N terminal, the P terminal, and the O terminal are arranged in this order at an end of the semiconductor module in a predetermined direction, and the one semiconductor module and the other one of the semiconductor modules are arranged side by side in the plate thickness direction with the front and back facing the same direction so that the N terminal of the one semiconductor module faces the O terminal of the other one of the semiconductor modules.

[0026] According to the above configuration, the N terminal of the one semiconductor module faces the O terminal of the other one of the semiconductor modules, making it easier to connect the N terminal of the one semiconductor module to the O terminal of the other one of the semiconductor modules. Furthermore, because the direction of current flow through the N terminal of the one semiconductor module is opposite to the direction of current flow through the O terminal of the other one of the semiconductor modules, the inductance of these terminals can be reduced, thereby reducing loss.

[0027] In the tenth means, the semiconductor module is formed in a plate shape, and the N terminal, the P terminal, and the O terminal are arranged in this order at an end of the semiconductor module in a predetermined direction, and the one semiconductor module and the other one of the semiconductor modules are arranged with the front and back facing the same, in the arrangement direction of the N terminal, the P terminal, and the O terminal, so that the N terminal of the one semiconductor module and the O terminal of the other one of the semiconductor modules are adjacent to each other.

[0028] According to the above configuration, since the N terminal of the one semiconductor module and the O terminal of the other one of the semiconductor modules are adjacent to each other, it is easy to connect the N terminal of the one semiconductor module and the O terminal of the other one of the semiconductor modules. Furthermore, since the direction of current flowing through the N terminal of the one semiconductor module is opposite to the direction of current flowing through the O terminal of the other one of the semiconductor modules, the inductance of these terminals can be reduced, thereby reducing loss.

[0029] In the eleventh means, the semiconductor module is formed in a plate shape, and the P terminal, the O terminal, and the N terminal are arranged in this order at the end of the semiconductor module in a predetermined direction, and the one semiconductor module and the other semiconductor module are arranged side by side in the plate thickness direction with the front and back facing the same or opposite sides so that the N terminal of the one semiconductor module faces the O terminal of the other semiconductor module.

[0030] According to the above configuration, the N terminal of the one semiconductor module faces the O terminal of the other one of the semiconductor modules, making it easier to connect the N terminal of the one semiconductor module to the O terminal of the other one of the semiconductor modules. Furthermore, because the direction of current flow through the N terminal of the one semiconductor module is opposite to the direction of current flow through the O terminal of the other one of the semiconductor modules, the inductance of these terminals can be reduced, thereby reducing loss.

[0031] Specifically, as in the twelfth aspect, a configuration can be adopted in which the O terminal of the semiconductor module to which the highest potential of the multi-level potentials is input to the P terminal is connected to one phase coil of a rotating electric machine, and a potential of the multi-level potentials lower than the potential input to the P terminal of one of the semiconductor modules is input to the P terminal of the other one of the semiconductor modules. With this configuration, one output potential switching circuit is associated with one phase coil of the rotating electric machine, and the potential output to one phase coil of the rotating electric machine can be switched to a multi-level potential.

[0032] The thirteenth measure is: An output potential switching circuit (30, 30A, 50, 50A) applied to a multilevel inverter, inputting a multilevel potential and switching an output potential to any one of the multilevel potentials, a plurality of semiconductor modules (40, 40A, 40B, 40C, 40D) each including a first switching element (41) having a first diode (42) connected in anti-parallel, a second switching element (43) having a second diode (44) connected in anti-parallel, a P terminal to which a positive terminal of the first switching element is connected, an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected, and an N terminal to which a negative terminal of the second switching element is connected; The power supply circuit includes only the first diode, the first switching element, the second diode, and the second switching element as elements, and does not include any other elements.

[0033] According to the above configuration, like the first aspect, the output potential switching circuit includes a plurality of general-purpose semiconductor modules. For example, by connecting the P terminal of one of the semiconductor modules (hereinafter referred to as the "first semiconductor module") to the O terminal of another of the semiconductor modules (hereinafter referred to as the "second semiconductor module"), the same effects as those of the first aspect can be achieved. Furthermore, by connecting the N terminal of the first semiconductor module to the O terminal of the second semiconductor module, the same effects as those of the seventh aspect can be achieved. Furthermore, the output potential switching circuit includes only the first diode, the first switching element, the second diode, and the second switching element as elements, and does not include any other elements. Therefore, the output potential switching circuit can be configured without requiring any elements other than those included in the general-purpose semiconductor modules. [Brief explanation of the drawings]

[0034] [Figure 1] FIG. 2 is a schematic diagram showing the circuit configuration of a power card. [Figure 2] Schematic diagram showing the front of a power card. [Figure 3] FIG. 2 is a schematic diagram showing the top surface of a power card. [Figure 4] 1 is a circuit diagram showing an output potential switching circuit applied to a three-level inverter according to a first embodiment. [Figure 5] FIG. [Figure 6] FIG. 2 is a circuit diagram showing an output potential switching circuit and its peripheral configuration according to the first embodiment. [Figure 7] FIG. 4 is a circuit diagram showing the flow of current when a switching element is switched. [Figure 8] FIG. 1 is a circuit diagram showing an output potential switching circuit applied to a five-level inverter. [Figure 9] FIG. 10 is a plan view showing a modified example of the arrangement of power cards. [Figure 10] FIG. 10 is a plan view showing another modified example of the arrangement of power cards. [Figure 11] FIG. 10 is a schematic diagram showing the front of a modified example of a power card. [Figure 12] FIG. 10 is a plan view showing another modified example of the arrangement of power cards. [Figure 13] FIG. 10 is a circuit diagram showing an output potential switching circuit applied to a three-level inverter according to a second embodiment. [Figure 14] Schematic diagram showing the front of a power card. [Figure 15] FIG. [Figure 16] FIG. 10 is a circuit diagram showing an output potential switching circuit and its peripheral configuration according to a second embodiment. [Figure 17] FIG. 4 is a circuit diagram showing the flow of current when a switching element is switched. [Figure 18] FIG. 1 is a circuit diagram showing an output potential switching circuit applied to a five-level inverter. [Figure 19] FIG. 10 is a plan view showing a modified example of the arrangement of power cards. [Figure 20] FIG. 10 is a plan view showing another modified example of the arrangement of power cards. [Figure 21] FIG. 10 is a plan view showing another modified example of the arrangement of power cards. [Figure 22] FIG. 10 is a schematic diagram showing a modified example of the circuit configuration of the power card. [Figure 23] FIG. 1 is a circuit diagram showing a conventional three-level inverter and its peripheral configuration. DETAILED DESCRIPTION OF THE INVENTION

[0035] (First embodiment) Hereinafter, a first embodiment will be described with reference to the drawings, in which the output potential switching circuit is applied to a three-level inverter (multilevel inverter) that converts power between a DC power supply and a rotating electric machine mounted on a vehicle. The vehicle is an electric vehicle, a hybrid vehicle, etc. The rotating electric machine is a motor, a generator, a motor generator (MG), etc.

[0036] 23 is a circuit diagram showing a conventional three-level inverter and its peripheral configuration. The voltage Vh of the battery 11 is divided by capacitors C1 and C2 into voltages of Vh / 2 each, and supplied to the inverter 120. As a result, the capacitors C1 and C2 function as a DC power supply 13 that outputs three levels of potential. Here, the potential on the positive electrode side of capacitor C1 is set to positive electrode potential Vp, the potential on the negative electrode side of capacitor C2 is set to negative electrode potential Vn, and the potential at the connection point (neutral point M) between the negative electrode side of capacitor C1 and the positive electrode side of capacitor C2 is set to neutral point potential Vm.

[0037] Three phases of series-connected circuits of MOSFETs with diodes connected in anti-parallel are connected between positive electrode potential Vp and negative electrode potential Vn. That is, U-phase series-connected circuit 160 is configured with a series-connected circuit of an upper arm made of MOSFET 111 with diode 112 connected in anti-parallel and a lower arm made of MOSFET 113 with diode 114 connected in anti-parallel. V-phase series-connected circuit 161 is configured with a series-connected circuit of an upper arm made of MOSFET 121 with diode 122 connected in anti-parallel and a lower arm made of MOSFET 123 with diode 124 connected in anti-parallel. W-phase series-connected circuit 162 is configured with a series-connected circuit of an upper arm made of MOSFET 131 with diode 132 connected in anti-parallel and a lower arm made of MOSFET 133 with diode 134 connected in anti-parallel.

[0038] An AC switch having MOSFETs connected in anti-series with diodes connected in anti-parallel is connected between the series connection point of the upper arm and the lower arm of the series connection circuit of each phase and neutral point potential Vm. That is, an AC switch circuit 163 having a configuration in which a source of MOSFET 181 with a diode 182 connected in anti-parallel and a source of MOSFET 183 with a diode 184 connected in anti-parallel are connected between the series connection point of the series connection circuit 160 for the U phase and neutral point M of the DC power supply 13. An AC switch circuit 164 having a configuration in which a source of MOSFET 185 with a diode 186 connected in anti-parallel and a source of MOSFET 187 with a diode 188 connected in anti-parallel are connected between the series connection point of the series connection circuit 161 for the V phase and neutral point M of the DC power supply 13 are connected. An AC switch circuit 165 is connected between the series connection point of the W-phase series connection circuit 162 and the neutral point M of the DC power supply 13. The AC switch circuit 165 has a configuration in which a source of a MOSFET 189 with a diode 190 connected in anti-parallel and a source of a MOSFET 191 with a diode 192 connected in anti-parallel are connected. The series connection points of the series connection circuits 160, 161, and 162 become AC outputs and are connected to the respective phase coils 12u, 12v, and 12w of the rotating electric machine 12.

[0039] According to the above configuration, the series connection points of the series connection circuits 160, 161, 162 can output a positive electrode potential Vp, a negative electrode potential Vn, and a neutral point potential Vm, resulting in a three-level inverter output.

[0040] In this embodiment, for example, one phase circuit 170, which is made up of a W-phase series connection circuit 162 and an AC switch circuit 165, is configured by two power cards. The power card (general-purpose semiconductor module, semiconductor module) is a semiconductor module that is generally used in a three-phase two-level inverter or the like and configures one phase circuit.

[0041] FIG. 1 is a schematic diagram showing the circuit configuration of a power card 40. The power card 40 (2-in-1 module) includes a first switching element 41, a first diode 42, a second switching element 43, a second diode 44, a P terminal, an O terminal, an N terminal, and a molded resin 49. The first switching element 41 is a semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). Here, an IGBT will be used as an example. The first switching element 41 is connected in anti-parallel to the first diode 42. The second switching element 43 is connected in anti-parallel to the second diode 44. The collector (positive terminal) of the first switching element 41 is connected to the P terminal. The emitter (negative terminal) of the first switching element 41 is connected to the collector (positive terminal) of the second switching element 43. The emitter of the first switching element 41 and the collector of the second switching element 43 are connected to the O terminal. That is, a series connection point 45 between the first switching element 41 and the second switching element 43 is connected to the O terminal. The N terminal is connected to the emitter (negative terminal) of the second switching element 43. The first switching element 41, the first diode 42, the second switching element 43, and the second diode 44 are sealed with a mold resin 49 (sealing resin).

[0042] FIG. 2 is a schematic diagram showing the front of the power card 40, and FIG. 3 is a schematic diagram showing the top of the power card 40. The molded resin 49 (power card 40) is formed in a rectangular plate (plate-like). A P terminal, an N terminal, and an O terminal are arranged side by side in this order at an end 49a (an end in a predetermined direction) along one long side of the molded resin 49 (power card 40). The P terminal, the N terminal, and the O terminal are formed in a rectangular plate (plate-like, rod-like) shape from a metal alloy (conductor). The P terminal, the N terminal, and the O terminal are exposed to the outside from the molded resin 49. The P terminal and the O terminal are arranged at both ends (near both ends) of the molded resin 49 in the longitudinal direction. The N terminal is arranged in the center (near the center) of the molded resin 49 in the longitudinal direction.

[0043] 4 is a circuit diagram showing the output potential switching circuit 30. The output potential switching circuit 30 is a circuit equivalent to the circuit 170 for one phase configured by the series connection circuit 162 and the AC switch circuit 165 in FIG. 23. The output potential switching circuit 30 includes a first power card 40A and a second power card 40B as power cards 40. The output potential switching circuit 30 includes only a first diode 42, a first switching element 41, a second diode 44, and a second switching element 43, i.e., only the elements included in each power card 40A, 40B, and does not include any other elements. The P terminal of the first power card 40A (first semiconductor module, one semiconductor module) is connected to the O terminal of the second power card 40B (second semiconductor module, another semiconductor module).

[0044] As shown in FIG. 5, the first power card 40A and the second power card 40B are arranged in opposite directions, stacked in the thickness direction, so that the P terminal of the first power card 40A faces the O terminal of the second power card 40B. Specifically, the first power card 40A and the second power card 40B are arranged adjacent to each other in opposite directions, with the ends 49a on which the terminals are arranged facing the same direction. In a front view of the first power card 40A (projected in a direction perpendicular to the board surface), the outer edge of the first power card 40A and the outer edge of the second power card 40B are aligned. As indicated by the dashed circle, the P terminal of the first power card 40A and the O terminal of the second power card 40B are connected. The N terminal of the first power card 40A and the N terminal of the second power card 40B face each other, and the O terminal of the first power card 40A and the P terminal of the second power card 40B face each other.

[0045] 6 is a circuit diagram showing the output potential switching circuit 30 and its peripheral configuration. Note that parts that can be considered the same as those in FIG. 23 are given the same reference numerals and descriptions thereof will be omitted.

[0046] A positive electrode potential Vp is input to the P terminal of the second power card 40B, a neutral point potential Vm is input to the N terminal of the second power card 40B, and a negative electrode potential Vn is input to the N terminal of the first power card 40A. The output potential switching circuit 30 is applied to a three-level (multilevel) inverter, receives three level potentials, and switches the output potential Vo to one phase coil of the rotating electrical machine 12 to one of the three level potentials. Specifically, the first switching element 41 of the second power card 40B and the first switching element 41 of the first power card 40A are turned ON, and the second switching element 43 of the second power card 40B and the second switching element 43 of the first power card 40A are turned OFF, thereby outputting the output potential Vp from the O terminal of the first power card 40A. By turning on the second switching element 43 of the second power card 40B and the first switching element 41 of the first power card 40A and turning off the first switching element 41 of the second power card 40B and the second switching element 43 of the first power card 40A, a neutral point potential Vm is output from the O terminal of the first power card 40A. By turning off the first switching element 41 of the first power card 40A and turning on the second switching element 43 of the first power card 40A, a negative electrode potential Vn is output from the O terminal of the first power card 40A.

[0047] In the above configuration, current flows out from the O terminal of the second power card 40B and into the P terminal of the first power card 40A. Therefore, the direction of current flowing into the O terminal of the second power card 40B is opposite to the direction of current flowing into the P terminal of the first power card 40A. The P terminal of the first power card 40A and the O terminal of the second power card 40B face each other. Therefore, mutual inductance occurs between the O terminal of the second power card 40B and the P terminal of the first power card 40A, reducing the inductance between the O terminal of the second power card 40B and the P terminal of the first power card 40A.

[0048] As shown in FIG. 7 , when the first power card 40A is switched from a state in which the first switching element 41 of the second power card 40B is OFF and the second switching element 43 of the second power card 40B is ON, and the first switching element 41 of the first power card 40A is ON and the second switching element 43 of the first power card 40A is OFF to a state in which the first switching element 41 of the first power card 40A is OFF and the second switching element 43 of the first power card 40A is ON, a surge current flows as indicated by the arrow. Here, the inductance between the O terminal of the second power card 40B and the P terminal of the first power card 40A is reduced, so this surge current can be suppressed. Furthermore, the direction of current flowing through the N terminal of the second power card 40B is opposite to the direction of current flowing through the N terminal of the first power card 40A. As shown in FIG. 5 , the N terminal of the first power card 40A and the N terminal of the second power card 40B face each other. This reduces the inductance between the N terminals of the first power card 40A and the second power card 40B, thereby suppressing the surge current.

[0049] 8 is a circuit diagram showing an output potential switching circuit 30A applied to a five-level inverter. The output potential switching circuit 30A includes a first power card 40A, a second power card 40B, a third power card 40C, and a fourth power card 40D as power cards 40. The output potential switching circuit 30A includes only a first diode 42, a first switching element 41, a second diode 44, and a second switching element 43, i.e., only the elements included in each of the power cards 40A to 40D, and does not include any other elements.

[0050] The output potential switching circuit 30A is applied to a five-level (multilevel) inverter, receives five-level potentials as input, and switches the output potential Vo to one phase coil of the rotating electrical machine 12 to one of the five-level potentials. In this case, the P terminal of a first power card 40A (one semiconductor module) is connected to the O terminal of a second power card 40B (another semiconductor module). The P terminal of the second power card 40B (one semiconductor module) is connected to the O terminal of a third power card 40C (another semiconductor module). The P terminal of the third power card 40C (one semiconductor module) is connected to the O terminal of a fourth power card 40D (another semiconductor module). In other words, the P terminal of one power card 40 (one semiconductor module) is connected to the O terminal of another power card 40 (another semiconductor module).

[0051] In this case, as indicated by dots in FIG. 5 , the second power card 40B and the third power card 40C are arranged in opposite front-to-back positions, overlapping in the thickness direction, so that the P terminal of the second power card 40B (one semiconductor module) faces the O terminal of the third power card 40C (another semiconductor module). That is, the third power card 40C is arranged in the same front-to-back position as the first power card 40A, overlapping the second power card 40B in the thickness direction. Furthermore, the third power card 40C and the fourth power card 40D are arranged in opposite front-to-back positions, overlapping in the thickness direction, so that the P terminal of the third power card 40C (one semiconductor module) faces the O terminal of the fourth power card 40D (another semiconductor module). That is, the fourth power card 40D is arranged in the same front-to-back position as the second power card 40B, overlapping the third power card 40C in the thickness direction.

[0052] 8, a positive electrode potential Vp is input to the P terminal of a fourth power card 40D, a first neutral point potential Vm1 is input to the N terminal of the fourth power card 40D, a second neutral point potential Vm2 is input to the N terminal of a third power card 40C, a third neutral point potential Vm3 is input to the N terminal of a second power card 40B, and a negative electrode potential Vn is input to the N terminal of a first power card 40A (Vp>Vm1>Vm2>Vm3>Vn). That is, the O terminal of the first power card 40A, to whose N terminal a negative electrode potential Vn (the lowest potential) of the multi-level potentials is input, is connected to one phase coil of the rotating electrical machine 12, and a potential of the multi-level potentials higher than the potential input to the N terminal of one power card 40 (one semiconductor module) is input to the N terminal of another power card 40 (one other semiconductor module).

[0053] 23, a circuit for one phase configured by the series connection circuit 160 and AC switch circuit 163 for the U phase can also be configured by the output potential switching circuit 30. Similarly, a circuit for one phase configured by the series connection circuit 161 and AC switch circuit 164 for the V phase can also be configured by the output potential switching circuit 30. The positional relationship (arrangement) between the output potential switching circuit 30 for the U phase, the output potential switching circuit 30 for the V phase, and the output potential switching circuit 30 for the W phase is arbitrary.

[0054] The present embodiment described above in detail has the following advantages.

[0055] The P terminal of the first power card 40A (one of the power cards 40) is connected to the O terminal of the second power card 40B (another power card 40). Therefore, by inputting a positive electrode potential Vp to the P terminal of the second power card 40B, inputting a neutral point potential Vm to the N terminal of the second power card 40B, and inputting a negative electrode potential Vn to the N terminal of the first power card 40A, and operating the switching elements 41 and 43 of the first and second power cards 40A and 40B, the output potential Vo output from the O terminal of the first power card 40A can be switched to any one of the positive electrode potential Vp, the neutral point potential Vm, and the negative electrode potential Vn. Therefore, a general-purpose power card 40 can be used to configure an output potential switching circuit 30 applicable to a three-level inverter.

[0056] By adding the power card 40, it is possible to configure an output potential switching circuit 30A that is applicable to a five-level inverter (an inverter with four or more levels).

[0057] Because the P terminal of the first power card 40A (one of the power cards 40) faces the O terminal of the second power card 40B (another power card 40), it is easy to connect the P terminal of the first power card 40A and the O terminal of the second power card 40B. Furthermore, because the direction of current flowing through the P terminal of the first power card 40A is opposite to the direction of current flowing through the O terminal of the second power card 40B, the inductance of these terminals can be reduced, thereby reducing loss. Moreover, because the first power card 40A and the second power card 40B are arranged facing inversely and stacked in the thickness direction, the arrangement space for multiple power cards 40 can be reduced.

[0058] When switching from a state in which the first switching element 41 of the second power card 40B is OFF and the second switching element 43 is ON, and the first switching element 41 of the first power card 40A is ON and the second switching element 43 is OFF to a state in which the first switching element 41 of the first power card 40A is OFF and the second switching element 43 is ON, the direction of current flow through the N terminal of the second power card 40B is opposite to the direction of current flow through the N terminal of the first power card 40A. The N terminal of the first power card 40A and the N terminal of the second power card 40B face each other. This reduces the inductance of the N terminals of the first power card 40A and the second power card 40B, thereby suppressing surge currents.

[0059] The output potential switching circuit 30 includes only the first diode 42, the first switching element 41, the second diode 44, and the second switching element 43, and does not include any other elements. Therefore, the output potential switching circuit 30 can be configured without requiring any elements other than those included in the power card 40.

[0060] The first embodiment can also be modified as follows: The same parts as those in the first embodiment are denoted by the same reference numerals and the description thereof will be omitted.

[0061] 9, the first power card 40A and the second power card 40B may be arranged side by side in the thickness direction with their front and backs facing the same direction so that the P terminal of the first power card 40A (one semiconductor module) faces the O terminal of the second power card 40B (another semiconductor module). Specifically, the first power card 40A and the second power card 40B are arranged with their front and backs facing the same direction, with their ends 49a, on which the terminals are arranged, facing in the same direction, and with partial overlapping (adjacent) portions.

[0062] According to the above configuration, the P terminal of the first power card 40A (one semiconductor module) faces the O terminal of the second power card 40B (another semiconductor module), making it easy to connect the P terminal of the first power card 40A and the O terminal of the second power card 40B. Furthermore, the direction in which current flows through the P terminal of the first power card 40A (from the P terminal to the inside of the first power card 40A) is opposite to the direction in which current flows through the O terminal of the second power card 40B (from the inside of the second power card 40B to the O terminal), reducing the inductance of these terminals and reducing losses.

[0063] 7, when switching from a state in which the first switching element 41 of the second power card 40B is OFF and the second switching element 43 is ON, and the first switching element 41 of the first power card 40A is ON and the second switching element 43 is OFF to a state in which the first switching element 41 of the first power card 40A is OFF and the second switching element 43 is ON, the direction of current flowing through the N terminal of the second power card 40B is opposite to the direction of current flowing through the N terminal of the first power card 40A. Therefore, if the first power card 40A and the second power card 40B are arranged side by side in the thickness direction with the front and back facing the same so that the N terminal of the first power card 40A faces the N terminal of the second power card 40B, the inductance of the N terminal of the first power card 40A and the N terminal of the second power card 40B can be reduced, and surge current can be suppressed.

[0064] 10, the first power card 40A and the second power card 40B may be arranged with the front and back facing the same direction and aligned in the direction in which the P, N, and O terminals are arranged, so that the P terminal of the first power card 40A (one semiconductor module) and the O terminal of the second power card 40B (another semiconductor module) are adjacent to each other. Specifically, the first power card 40A and the second power card 40B are arranged adjacent to each other with the front and back facing the same direction, with the ends 49a on which the terminals are arranged facing the same direction.

[0065] According to the above configuration, the P terminal of the first power card 40A (one semiconductor module) and the O terminal of the second power card 40B (another semiconductor module) are adjacent to each other, making it easier to connect the P terminal of the first power card 40A and the O terminal of the second power card 40B. Furthermore, the direction in which current flows through the P terminal of the first power card 40A (from the P terminal to the inside of the first power card 40A) is opposite to the direction in which current flows through the O terminal of the second power card 40B (from the inside of the second power card 40B to the O terminal), reducing the inductance of these terminals and reducing losses.

[0066] 11, a P terminal, an O terminal, and an N terminal may be arranged in this order at an end 49a (end in a predetermined direction) along one long side of the molded resin 49 (power card 40). The P terminal and the N terminal are arranged at both ends (near both ends) of the molded resin 49 in the longitudinal direction. The O terminal is arranged in the center (near the center) of the molded resin 49 in the longitudinal direction.

[0067] 12, the first power card 40A and the second power card 40B may be arranged side by side in the thickness direction with their front and backs facing the same direction so that the P terminal of the first power card 40A (one semiconductor module) faces the O terminal of the second power card 40B (another semiconductor module). Specifically, the first power card 40A and the second power card 40B are arranged with their front and backs facing the same direction, with their ends 49a, on which the terminals are arranged, facing in the same direction, and with partial overlapping (adjacent) portions.

[0068] According to the above configuration, the P terminal of the first power card 40A (one semiconductor module) faces the O terminal of the second power card 40B (the other semiconductor module), making it easier to connect the P terminal of the first power card 40A and the O terminal of the second power card 40B. Furthermore, the direction of current flow through the P terminal of the first power card 40A (from the P terminal to the inside of the first power card 40A) is opposite to the direction of current flow through the O terminal of the second power card 40B (from the inside of the second power card 40B to the O terminal), reducing the inductance of these terminals and reducing loss. Note that the same effects can be achieved even if the first power card 40A and the second power card 40B are arranged side by side in the thickness direction with their front and backs facing in opposite directions so that the P terminal of the first power card 40A (one semiconductor module) faces the O terminal of the second power card 40B (the other semiconductor module).

[0069] (Second embodiment) In this embodiment, a circuit equivalent to one phase circuit 170 constituted by the series connection circuit 162 and the AC switch circuit 165 in Fig. 23 is constituted by the output potential switching circuit 50 shown in Fig. 13. Note that the same parts as those in the first embodiment are denoted by the same reference numerals and description thereof will be omitted.

[0070] The output potential switching circuit 50 includes a first power card 40A and a second power card 40B as power cards 40. The output potential switching circuit 50 includes only a first diode 42, a first switching element 41, a second diode 44, and a second switching element 43, i.e., only the elements included in each power card 40A, 40B, and does not include any other elements. The N terminal of the first power card 40A (first semiconductor module, one semiconductor module) is connected to the O terminal of the second power card 40B (second semiconductor module, another semiconductor module).

[0071] 14, an N terminal, a P terminal, and an O terminal are arranged side by side in this order at an end 49a (end in a predetermined direction) along one long side of molded resin 49 (power card 40). The N terminal and the O terminal are arranged at both ends (near both ends) in the longitudinal direction of molded resin 49. The P terminal is arranged in the center (near the center) of molded resin 49 in the longitudinal direction.

[0072] As shown in FIG. 15 , the first power card 40A and the second power card 40B are arranged in opposite directions, stacked in the thickness direction, so that the N terminal of the first power card 40A faces the O terminal of the second power card 40B. Specifically, the first power card 40A and the second power card 40B are arranged adjacent to each other in opposite directions, with the ends 49a on which the terminals are arranged facing the same direction. In a front view of the first power card 40A (projected in a direction perpendicular to the board surface), the outer edge of the first power card 40A and the outer edge of the second power card 40B are aligned. As indicated by the dashed circle, the N terminal of the first power card 40A and the O terminal of the second power card 40B are connected. The P terminal of the first power card 40A faces the P terminal of the second power card 40B, and the O terminal of the first power card 40A faces the N terminal of the second power card 40B.

[0073] 16, a positive electrode potential Vp is input to the P terminal of the first power card 40A, a neutral point potential Vm is input to the P terminal of the second power card 40B, and a negative electrode potential Vn is input to the N terminal of the second power card 40B. The output potential switching circuit 50 also receives three levels of potential, and operates the switching elements 41 and 43 of the first and second power cards 40A and 40B to switch the output potential Vo to one phase coil of the rotating electric machine 12 to one of the three levels of potential.

[0074] In the above configuration, current flows out from the O terminal of the second power card 40B and into the N terminal of the first power card 40A. Therefore, the direction of current flowing into the O terminal of the second power card 40B is opposite to the direction of current flowing into the N terminal of the first power card 40A. The N terminal of the first power card 40A and the O terminal of the second power card 40B face each other. Therefore, mutual inductance occurs between the O terminal of the second power card 40B and the N terminal of the first power card 40A, reducing the inductance between the O terminal of the second power card 40B and the N terminal of the first power card 40A.

[0075] As shown in FIG. 17 , when the first power card 40A is switched from a state in which the first switching element 41 of the second power card 40B is ON and the second switching element 43 of the second power card 40B is OFF and the first switching element 41 of the first power card 40A is ON and the second switching element 43 of the second power card 40B is OFF to a state in which the first switching element 41 of the first power card 40A is OFF and the second switching element 43 of the first power card 40A is ON, a surge current flows as indicated by the arrow. Here, the inductance between the O terminal of the second power card 40B and the N terminal of the first power card 40A is reduced, so this surge current can be suppressed. Furthermore, the direction of current flowing through the P terminal of the first power card 40A is opposite to the direction of current flowing through the P terminal of the second power card 40B. As shown in FIG. 15 , the P terminal of the first power card 40A and the P terminal of the second power card 40B face each other. This reduces the inductance between the P terminal of the first power card 40A and the P terminal of the second power card 40B, thereby suppressing the surge current.

[0076] 18 is a circuit diagram showing an output potential switching circuit 50A applied to a five-level inverter. The output potential switching circuit 50A includes a first power card 40A, a second power card 40B, a third power card 40C, and a fourth power card 40D as power cards 40. The output potential switching circuit 50A includes only a first diode 42, a first switching element 41, a second diode 44, and a second switching element 43, i.e., only the elements included in each of the power cards 40A to 40D, and does not include any other elements.

[0077] The output potential switching circuit 50A is applied to a five-level (multilevel) inverter, receives five-level potentials as input, and switches the output potential Vo to one phase coil of the rotating electrical machine 12 to one of the five-level potentials. In this case, the N terminal of a first power card 40A (one semiconductor module) is connected to the O terminal of a second power card 40B (another semiconductor module). The N terminal of the second power card 40B (one semiconductor module) is connected to the O terminal of a third power card 40C (another semiconductor module). The N terminal of the third power card 40C (one semiconductor module) is connected to the O terminal of a fourth power card 40D (another semiconductor module). In other words, the N terminal of one power card 40 (one semiconductor module) is connected to the O terminal of the other power card 40.

[0078] In this case, as indicated by dots in Figure 15, the second power card 40B and the third power card 40C are arranged in opposite front-to-back positions, overlapping in the thickness direction, so that the N terminal of the second power card 40B (one semiconductor module) faces the O terminal of the third power card 40C (another semiconductor module). That is, the third power card 40C is arranged in the same front-to-back position as the first power card 40A, overlapping the second power card 40B in the thickness direction. Furthermore, the third power card 40C and the fourth power card 40D are arranged in opposite front-to-back positions, overlapping in the thickness direction, so that the N terminal of the third power card 40C (one semiconductor module) faces the O terminal of the fourth power card 40D (another semiconductor module). That is, the fourth power card 40D is arranged in the same front-to-back position as the second power card 40B, overlapping the third power card 40C in the thickness direction.

[0079] 18, a positive electrode potential Vp is input to the P terminal of a first power card 40A, a first neutral point potential Vm1 is input to the P terminal of a second power card 40B, a second neutral point potential Vm2 is input to the P terminal of a third power card 40C, a third neutral point potential Vm3 is input to the P terminal of a fourth power card 40D, and a negative electrode potential Vn is input to the P terminal of the fourth power card 40D (Vp>Vm1>Vm2>Vm3>Vn). That is, the O terminal of the first power card 40A, to whose P terminal a positive electrode potential Vp (the highest potential) of the multi-level potentials is input, is connected to one phase coil of the rotating electrical machine 12, and a potential of the multi-level potentials lower than the potential input to the P terminal of one power card 40 (one semiconductor module) is input to the P terminal of another power card 40 (one other semiconductor module).

[0080] Similarly, a circuit for one phase configured by the series connection circuit 160 and AC switch circuit 163 for the U phase in Fig. 23 can also be configured by the output potential switching circuit 50. Similarly, a circuit for one phase configured by the series connection circuit 161 and AC switch circuit 164 for the V phase in Fig. 23 can also be configured by the output potential switching circuit 50. The positional relationship (arrangement) between the output potential switching circuit 50 for the U phase, the output potential switching circuit 50 for the V phase, and the output potential switching circuit 50 for the W phase is arbitrary.

[0081] The present embodiment described above in detail has the following advantages.

[0082] The N terminal of the first power card 40A (one of the power cards 40) is connected to the O terminal of the second power card 40B (another power card 40). Therefore, by inputting a positive electrode potential Vp to the P terminal of the first power card 40A, inputting a neutral point potential Vm to the P terminal of the second power card 40B, and inputting a negative electrode potential Vn to the N terminal of the second power card 40B, and operating the switching elements 41 and 43 of the first and second power cards 40A and 40B, the output potential Vo output from the O terminal of the first power card 40A can be switched to any one of the positive electrode potential Vp, the neutral point potential Vm, and the negative electrode potential Vn. Therefore, an output potential switching circuit 50 applicable to a three-level inverter can be configured using a general-purpose power card 40.

[0083] By adding the power card 40, an output potential switching circuit 50A that is applicable to a five-level inverter (an inverter with four or more levels) can also be configured.

[0084] Because the N terminal of the first power card 40A (one of the power cards 40) faces the O terminal of the second power card 40B (another power card 40), it is easy to connect the N terminal of the first power card 40A and the O terminal of the second power card 40B. Furthermore, because the direction of current flowing through the N terminal of the first power card 40A is opposite to the direction of current flowing through the O terminal of the second power card 40B, the inductance of these terminals can be reduced, thereby reducing loss. Moreover, because the first power card 40A and the second power card 40B are arranged facing inversely and stacked in the thickness direction, the arrangement space for multiple power cards 40 can be reduced.

[0085] When switching from a state in which the first switching element 41 of the second power card 40B is ON and the second switching element 43 is OFF, and the first switching element 41 of the first power card 40A is ON and the second switching element 43 is OFF, to a state in which the first switching element 41 of the first power card 40A is OFF and the second switching element 43 is ON, the direction of current flow through the P terminal of the first power card 40A is opposite to the direction of current flow through the P terminal of the second power card 40B. The P terminal of the first power card 40A and the P terminal of the second power card 40B are opposed to each other. This reduces the inductance of the P terminals of the first power card 40A and the second power card 40B, thereby suppressing surge currents.

[0086] The output potential switching circuit 50 includes only the first diode 42, the first switching element 41, the second diode 44, and the second switching element 43, and does not include any other elements. Therefore, the output potential switching circuit 50 can be configured without requiring any elements other than those included in the power card 40.

[0087] The second embodiment can also be modified as follows: The same parts as those in the second embodiment are denoted by the same reference numerals and the description thereof will be omitted.

[0088] As shown in Fig. 19, the first power card 40A and the second power card 40B may be arranged side by side in the thickness direction with their front and backs facing the same direction, so that the N terminal of the first power card 40A (one semiconductor module) faces the O terminal of the second power card 40B (another semiconductor module). Specifically, the first power card 40A and the second power card 40B are arranged with their front and backs facing the same direction, with their ends 49a, on which the terminals are arranged, facing in the same direction, and with partial overlapping (adjacent) portions. This configuration can achieve the same effects as those shown in Fig. 9.

[0089] As shown in Fig. 20, the first power card 40A and the second power card 40B may be arranged with the front and back facing the same direction, with the N terminal of the first power card 40A (one semiconductor module) and the O terminal of the second power card 40B (another semiconductor module) adjacent to each other, and the N terminal, P terminal, and O terminal are aligned in the same direction. Specifically, the first power card 40A and the second power card 40B are arranged adjacent to each other with the front and back facing the same direction, with the ends 49a on which the terminals are arranged facing the same direction. This configuration can achieve the same effects as those shown in Fig. 10.

[0090] 11, a P terminal, an O terminal, and an N terminal may be arranged in this order at an end 49a (end in a predetermined direction) along one long side of the molded resin 49 (power card 40). The P terminal and the N terminal are arranged at both ends (near both ends) of the molded resin 49 in the longitudinal direction. The O terminal is arranged in the center (near the center) of the molded resin 49 in the longitudinal direction.

[0091] 21, the first power card 40A and the second power card 40B may be arranged side by side in the board thickness direction with their front and backs facing the same direction so that the N terminal of the first power card 40A (one semiconductor module) faces the O terminal of the second power card 40B (another semiconductor module). Specifically, the first power card 40A and the second power card 40B are arranged with their front and backs facing the same direction and partially overlapping (adjacent) with their ends 49a, on which the terminals are arranged, facing the same direction. This configuration can achieve the same effects as those shown in FIG. 12. Note that the same effects can be achieved even if the first power card 40A and the second power card 40B are arranged side by side in the board thickness direction with their front and backs facing inversely so that the N terminal of the first power card 40A (one semiconductor module) faces the O terminal of the second power card 40B (another semiconductor module).

[0092] Furthermore, in the first embodiment and its modified examples, and the second embodiment and its modified examples, a power card 60 shown in FIG. 22 may be employed. The power card 60 includes a first switching element 41, a first diode 42, a second switching element 43, and a second diode 44, but does not include a P terminal, a wire connecting the first switching element 41 and the second switching element 43, an O terminal, or an N terminal. The power card 40 may be configured by providing the P terminal, the wire connecting the first switching element 41 and the second switching element 43, the O terminal, and the N terminal externally to the power card 60. Note that a power card may also be employed that includes the first switching element 41, the first diode 42, the second switching element 43, and the second diode 44, but does not include at least one of the P terminal, the wire connecting the first switching element 41 and the second switching element 43, the O terminal, or the N terminal. The power card 40 may be configured by providing externally components that are not included in the power card.

[0093] The above modifications may be implemented in combination. [Explanation of symbols]

[0094] 30...output potential switching circuit, 30A...output potential switching circuit, 40...power card, 40A...first power card, 40B...second power card, 40C...third power card, 40D...fourth power card, 41...first switching element, 42...first diode, 43...second switching element, 44...second diode, 50...output potential switching circuit, 50A...output potential switching circuit.

Claims

1. An output potential switching circuit (30, 30A) applied to a multilevel inverter, inputting a multilevel potential and switching an output potential to one of the multilevel potentials, a first switching element (41) having a first diode (42) connected in anti-parallel; a second switching element (43) having a second diode (44) connected in anti-parallel; a P terminal to which a positive terminal of the first switching element is connected; an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected; and an N terminal to which a negative terminal of the second switching element is connected; the P terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is connected to the O terminal of another of the semiconductor modules (40B, 40C, 40D), The semiconductor module is formed in a plate shape, and the P terminal, the N terminal, and the O terminal are arranged in this order at an end (49a) of the semiconductor module in a predetermined direction, An output potential switching circuit in which the one semiconductor module and the other one of the semiconductor modules are arranged in an inverted, stacked manner in the thickness direction of the board, with the front and back facing each other, so that the P terminal of the one of the semiconductor modules faces the O terminal of the other one of the semiconductor modules.

2. An output potential switching circuit (30, 30A) applied to a multilevel inverter, inputting multilevel potentials and switching an output potential to one of the multilevel potentials, a first switching element (41) having a first diode (42) connected in anti-parallel; a second switching element (43) having a second diode (44) connected in anti-parallel; a P terminal to which a positive terminal of the first switching element is connected; an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected; and an N terminal to which a negative terminal of the second switching element is connected; the P terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is connected to the O terminal of another of the semiconductor modules (40B, 40C, 40D), the semiconductor module is formed in a plate shape, and the P terminal, the N terminal, and the O terminal are arranged in this order at an end of the semiconductor module in a predetermined direction; An output potential switching circuit in which the one semiconductor module and the other one of the semiconductor modules are arranged side by side in the thickness direction with the front and back facing the same direction so that the P terminal of the one semiconductor module faces the O terminal of the other one of the semiconductor modules.

3. An output potential switching circuit (30, 30A) applied to a multilevel inverter, inputting multilevel potentials and switching an output potential to one of the multilevel potentials, a first switching element (41) having a first diode (42) connected in anti-parallel; a second switching element (43) having a second diode (44) connected in anti-parallel; a P terminal to which a positive terminal of the first switching element is connected; an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected; and an N terminal to which a negative terminal of the second switching element is connected; the P terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is connected to the O terminal of another of the semiconductor modules (40B, 40C, 40D), the semiconductor module is formed in a plate shape, and the P terminal, the N terminal, and the O terminal are arranged in this order at an end of the semiconductor module in a predetermined direction; an output potential switching circuit in which the one semiconductor module and the other one of the semiconductor modules are arranged with the front and back facing the same direction, in the arrangement direction of the P terminal, the N terminal, and the O terminal, so that the P terminal of the one of the semiconductor modules and the O terminal of the other one of the semiconductor modules are adjacent to each other.

4. An output potential switching circuit (30, 30A) applied to a multilevel inverter, inputting multilevel potentials and switching an output potential to one of the multilevel potentials, a first switching element (41) having a first diode (42) connected in anti-parallel; a second switching element (43) having a second diode (44) connected in anti-parallel; a P terminal to which a positive terminal of the first switching element is connected; an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected; and an N terminal to which a negative terminal of the second switching element is connected; the P terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is connected to the O terminal of another of the semiconductor modules (40B, 40C, 40D), the semiconductor module is formed in a plate shape, and the P terminal, the O terminal, and the N terminal are arranged in this order at an end of the semiconductor module in a predetermined direction; An output potential switching circuit in which the one semiconductor module and the other semiconductor module are arranged side by side in the thickness direction with their front and backs facing the same or opposite, so that the P terminal of the one semiconductor module faces the O terminal of the other semiconductor module.

5. 5. The output potential switching circuit according to claim 1, wherein the O terminal of the semiconductor module (40A), to which the lowest potential of the multi-level potentials is input, is connected to one phase coil of a rotating electric machine (12), and a potential of the multi-level potentials that is higher than the potential input to the N terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is input to the N terminal of each of the other semiconductor modules (40B, 40C, 40D).

6. An output potential switching circuit (50, 50A) applied to a multilevel inverter, inputting a multilevel potential and switching an output potential to one of the multilevel potentials, a first switching element (41) having a first diode (42) connected in anti-parallel; a second switching element (43) having a second diode (44) connected in anti-parallel; a P terminal to which a positive terminal of the first switching element is connected; an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected; and an N terminal to which a negative terminal of the second switching element is connected; the N terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is connected to the O terminal of another of the semiconductor modules (40B, 40C, 40D), The semiconductor module is formed in a plate shape, and the N terminal, the P terminal, and the O terminal are arranged in this order at an end (49a) of the semiconductor module in a predetermined direction, An output potential switching circuit in which the one semiconductor module and the other one of the semiconductor modules are arranged in an inverted, stacked manner in the thickness direction of the board, so that the N terminal of the one of the semiconductor modules faces the O terminal of the other one of the semiconductor modules.

7. An output potential switching circuit (50, 50A) applied to a multilevel inverter, inputting multilevel potentials and switching an output potential to one of the multilevel potentials, a first switching element (41) having a first diode (42) connected in anti-parallel; a second switching element (43) having a second diode (44) connected in anti-parallel; a P terminal to which a positive terminal of the first switching element is connected; an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected; and an N terminal to which a negative terminal of the second switching element is connected; the N terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is connected to the O terminal of another of the semiconductor modules (40B, 40C, 40D), the semiconductor module is formed in a plate shape, and the N terminal, the P terminal, and the O terminal are arranged in this order at an end of the semiconductor module in a predetermined direction; An output potential switching circuit in which the one semiconductor module and the other one of the semiconductor modules are arranged side by side in the thickness direction with the front and back facing the same direction so that the N terminal of the one semiconductor module faces the O terminal of the other one of the semiconductor modules.

8. An output potential switching circuit (50, 50A) applied to a multilevel inverter, inputting multilevel potentials and switching an output potential to one of the multilevel potentials, a first switching element (41) having a first diode (42) connected in anti-parallel; a second switching element (43) having a second diode (44) connected in anti-parallel; a P terminal to which a positive terminal of the first switching element is connected; an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected; and an N terminal to which a negative terminal of the second switching element is connected; the N terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is connected to the O terminal of another of the semiconductor modules (40B, 40C, 40D), the semiconductor module is formed in a plate shape, and the N terminal, the P terminal, and the O terminal are arranged in this order at an end of the semiconductor module in a predetermined direction; an output potential switching circuit in which the one semiconductor module and the other one of the semiconductor modules are arranged with the front and back facing the same direction, in the arrangement direction of the N terminal, the P terminal, and the O terminal, so that the N terminal of the one of the semiconductor modules and the O terminal of the other one of the semiconductor modules are adjacent to each other.

9. An output potential switching circuit (50, 50A) applied to a multilevel inverter, inputting multilevel potentials and switching an output potential to one of the multilevel potentials, a first switching element (41) having a first diode (42) connected in anti-parallel; a second switching element (43) having a second diode (44) connected in anti-parallel; a P terminal to which a positive terminal of the first switching element is connected; an O terminal to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected; and an N terminal to which a negative terminal of the second switching element is connected; the N terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is connected to the O terminal of another of the semiconductor modules (40B, 40C, 40D), the semiconductor module is formed in a plate shape, and the P terminal, the O terminal, and the N terminal are arranged in this order at an end of the semiconductor module in a predetermined direction; An output potential switching circuit in which the one semiconductor module and the other semiconductor module are arranged side by side in the thickness direction with their front and backs facing the same or opposite, so that the N terminal of the one semiconductor module faces the O terminal of the other semiconductor module.

10. An output potential switching circuit as described in any one of claims 6 to 9, wherein the O terminal of the semiconductor module (40A) to which the highest potential of the multi-level potential is input to the P terminal is connected to one phase coil of a rotating electric machine (12), and a potential of the multi-level potential that is lower than the potential input to the P terminal of one of the semiconductor modules (40A, 40B, 40C, 40D) is input to the P terminal of each of the other semiconductor modules (40B, 40C, 40D).

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