Semiconductor equipment

Abstract

To provide a light-emitting device capable of preventing afterimage from being displayed.SOLUTION: A plurality of pixels arranged in n rows and m columns (n and m are each an integer of 2 or more) is supplied with a first signal containing image information and a second signal for initializing the pixels. Each pixel includes a first transistor for controlling input of the first signal and a second transistor for controlling input of the second signal. The first transistor in pixels in a k-th row (k is an integer of 1 or more and n or less) and the second transistor in pixels in a (k+1)th row are turned on at the same time, so that the pixels are initialized and images are displayed effectively.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a product, method, or method of manufacture. Alternatively, the present invention relates to a process, machine, or manufacture. This invention relates to a substance or composition of matter. One embodiment includes semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, and methods for driving them. This relates to methods for manufacturing them. In particular, one aspect of the present invention relates to semiconductor devices including oxide semiconductors. This relates to a display device or a light-emitting device.

[0002] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This refers to all types of devices. Display devices, electro-optical devices, semiconductor circuits, and electronic devices include semiconductor devices. There are cases where this is the case. [Background technology]

[0003] Light-emitting devices using light-emitting elements offer high visibility and are ideal for thinning, but they also have limitations in terms of viewing angle. Because it lacks a display, it replaces CRT (cathode ray tube) and liquid crystal display devices. It is attracting attention as a device. Active matrix type display devices using light-emitting elements are The proposed configurations vary by manufacturer, but typically include at least a light-emitting element, A transistor (switching transistor) that controls the input of image signals to the pixels, and A transistor (driving transistor) that controls the current value supplied to the light-emitting element is located at each corner. It is provided as a basic feature.

[0004] Furthermore, in recent years, high mobility has been obtained from polysilicon and microcrystalline silicon, and amorphous silicon As a new semiconductor that combines the uniform device characteristics obtained with silicon, oxide Semiconductors are attracting attention. Oxide semiconductors can be formed on substrates with low strain points such as glass substrates, and can also be applied to large substrates of the fifth generation (one side exceeding 1000 mm) or more. And, instead of conventional semiconductors such as silicon and germanium that have been used, a light-emitting device in which the above oxide semiconductor is used for the transistors of pixels is being put into practical use.

[0005] In Patent Document 1 below, an example is described in which a TFT containing an oxide semiconductor in the active layer is used for a TFT that drives an organic EL element. Also, Patent Document 2 below describes an organic electroluminescence display device in which the active layer of a thin film transistor is formed of an oxide semiconductor.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0007] By the way, a transistor using an oxide semiconductor has the characteristic that the off-current is extremely small. By using a transistor having the above characteristics for the pixels of a light-emitting device, once the input image information can be continuously held in the pixels, and as long as a still image is continuously displayed, the frequency of rewriting the image information can be reduced, and power saving of the display device can be achieved. However, in the above-described light-emitting device, if the image information is continuously held for a long time, then different image information Even if you input this into a pixel, you cannot completely rewrite the image information, and the image information before rewriting Sometimes, these particles remain in the pixels and are displayed as afterimages.

[0008] Against the technical background described above, one aspect of the present invention provides a novel semiconductor device and the like. To provide a light-emitting device that can prevent the display of afterimages, or The objective is to provide a method for driving a light-emitting device that can prevent the display of afterimages. Let it be one.

[0009] Furthermore, one aspect of the present invention provides a light-emitting device capable of displaying image information even at high scanning frequencies. To do so, or a method for driving a light-emitting device that can display image information even at high scanning frequencies. Providing this service is one of our challenges.

[0010] Furthermore, the description of multiple problems does not preclude the existence of each other. The embodiment does not need to solve all of these problems. Furthermore, if there are problems other than those listed, the specification These issues will become clear from the drawings, claims, etc., and these issues will also be addressed in this invention. This could become a challenge for one aspect of the Ming Dynasty. [Means for solving the problem]

[0011] One aspect of the present invention comprises a first transistor, a second transistor, a third transistor, and 4 transistors, 5 transistor, 6 transistor, 1 light-emitting element, 2 An optical element and a first wiring, a second wiring, a third wiring, a fourth wiring, and a fifth wiring are included. An optical device in which the gate of the first transistor is connected to the second wiring, and the first transistor One of the source and drain of the first transistor is connected to the fourth wire, and the source and drain of the first transistor The other end of the rain is connected to the gate of the third transistor, and the gate of the second transistor is connected to the gate of the second transistor. The first wire is connected, and one of the sources and drains of the second transistor is connected to the fifth wire. The source and drain of the second transistor are connected to the gate of the third transistor. The source and drain of the third transistor are connected to the first terminal of the first light-emitting element. Next, the source and drain of the third transistor are given a first potential, and the first The second terminal of the optical element is supplied with the second potential, and the gate of the fourth transistor is connected to the third wiring. Furthermore, one of the sources and drains of the fourth transistor is connected to the fourth wiring, and the fourth transistor The source and drain of the transistor are connected to the gate of the sixth transistor, and the fifth transistor The gate of the transistor is connected to the second wiring, and the source and drain of the fifth transistor are One end is connected to the fifth wire, and the other end of the source and drain of the fifth transistor is connected to the sixth transistor. Connected to the gate of the transistor, one of the source and drain of the sixth transistor is connected to the second The first terminal of the light-emitting element is connected, and the source and the other drain of the sixth transistor are connected to the first A potential is applied, the second terminal of the second light-emitting element is given a second potential, and the fourth wiring receives image information. Given a signal, the fifth wire is given a third potential.

[0012] One aspect of the present invention comprises a first transistor, a second transistor, a third transistor, and 4 transistors, 5 transistor, 6 transistor, 1 light-emitting element, 2 An optical element and a first wiring, a second wiring, a third wiring, a fourth wiring, and a fifth wiring are included. An optical device in which the gate of the first transistor is connected to the second wiring, and the first transistor One of the source and drain of the first transistor is connected to the fourth wire, and the source and drain of the first transistor The other end of the rain is connected to the gate of the third transistor, and the gate of the second transistor is connected to the gate of the second transistor. The first wire is connected, and one of the sources and drains of the second transistor is connected to the fifth wire. The source and drain of the second transistor are connected to the gate of the third transistor. The source and drain of the third transistor are connected to the first terminal of the first light-emitting element. Next, the source and drain of the third transistor are given a first potential, and the first The second terminal of the optical element is supplied with the second potential, and the gate of the fourth transistor is connected to the third wiring. Furthermore, one of the sources and drains of the fourth transistor is connected to the fourth wiring, and the fourth transistor The source and drain of the transistor are connected to the gate of the sixth transistor, and the fifth transistor The gate of the transistor is connected to the second wiring, and the source and drain of the fifth transistor are One end is connected to the fifth wire, and the other end of the source and drain of the fifth transistor is connected to the sixth transistor. Connected to the gate of the transistor, one of the source and drain of the sixth transistor is connected to the second The first terminal of the light-emitting element is connected, and the source and the other drain of the sixth transistor are connected to the first A potential is applied, the second terminal of the second light-emitting element is given a second potential, and the fourth wiring receives image information. Given a signal, the fifth wire is given the second potential.

[0013] One aspect of the present invention comprises a first transistor, a second transistor, a third transistor, and 4 transistors, 5 transistor, 6 transistor, 1 capacitance element, 2 capacitance The element consists of a first light-emitting element, a second light-emitting element, a first wire, a second wire, a third wire, and A light-emitting device having 4 wires, wherein the gate of the first transistor is connected to the second wire. Then, one of the sources and drains of the first transistor is connected to the fourth wiring, and the first transistor The source and drain of the transistor are connected to the gate of the third transistor, and the other is connected to the gate of the second transistor. The gate of the transistor is connected to the first wiring, and the source and drain of the second transistor are connected. One side is connected to either the source or drain of the third transistor, and the other side is connected to the source of the second transistor. The other end of the drain is connected to the gate of the third transistor, and the third transistor One of the source and drain is connected to the first terminal of the first light-emitting element, and the third transistor The source and the other drain are given a first potential, and the first terminal of the first capacitive element is the third Connected to the gate of the transistor, the second terminal of the first capacitance element is connected to the source of the third transistor. And connected to one of the drains, the second terminal of the first light-emitting element is given a second potential, and the fourth The gate of the transistor is connected to the third wire, and the source and drain of the fourth transistor are connected. One end is connected to the fourth wire, and the other end of the source and drain of the fourth transistor is connected to the sixth transistor. The gate of the fifth transistor is connected to the gate of the transistor, and the gate of the fifth transistor is connected to the second wiring, One of the sources and drains of transistor 5 connects to the source and drain of transistor 6. One side is connected to the source and drain of the fifth transistor, and the other side is connected to the sixth transistor. Connected to the gate, one of the sources and drains of the sixth transistor is connected to the second light-emitting element. Connected to the first terminal, the source and the other drain of the sixth transistor are given the first potential. The first terminal of the second capacitance element is connected to the gate of the sixth transistor, and the second capacitance element The second terminal is connected to either the source or drain of the sixth transistor, and the second light-emitting element The second terminal is supplied with a second potential, and the fourth wire is supplied with a signal containing image information.

[0014] One aspect of the present invention comprises a first transistor, a second transistor, a third transistor, and 4 transistors, 5 transistor, 6 transistor, 1 light-emitting element, 2 An optical element and a first wiring, a second wiring, a third wiring, a fourth wiring, and a fifth wiring are included. An optical device in which the gate of the first transistor is connected to the second wiring, and the first transistor One of the source and drain of the first transistor is connected to the fourth wire, and the source and drain of the first transistor The other end of the rain is connected to the gate of the third transistor, and the gate of the second transistor is connected to the gate of the second transistor. The first wire is connected, and one of the sources and drains of the second transistor is connected to the fifth wire. The source and drain of the second transistor are connected to the gate of the third transistor. The source and drain of the third transistor are connected to the first terminal of the first light-emitting element. Next, the source and drain of the third transistor are given a first potential, and the first The second terminal of the optical element is supplied with the second potential, and the gate of the fourth transistor is connected to the third wiring. Furthermore, one of the sources and drains of the fourth transistor is connected to the fourth wiring, and the fourth transistor The source and drain of the transistor are connected to the gate of the sixth transistor, and the fifth transistor The gate of the transistor is connected to the second wiring, and the source and drain of the fifth transistor are One end is connected to the fifth wire, and the other end of the source and drain of the fifth transistor is connected to the sixth transistor. Connected to the gate of the transistor, one of the source and drain of the sixth transistor is connected to the second The first terminal of the light-emitting element is connected, and the source and the other drain of the sixth transistor are connected to the first A potential is applied, the second terminal of the second light-emitting element is given a second potential, and the fourth wiring receives image information. Given that a first signal is provided, the first wire is selected rather than the first signal being provided to the fourth wire. The first signal is supplied to the fifth wiring at an earlier timing during that period.

[0015] In the above embodiment, the first to sixth transistors include an oxide semiconductor in the channel formation region. It is preferable.

[0016] In the above embodiment, the oxide semiconductor is indium, zinc, M (where M is Ga, Sn, Hf, A) It is preferable that it contains l or Zr.

[0017] One aspect of the present invention comprises the light-emitting device described in the above aspect, a microphone, and an operating key. It is an electronic device.

[0018] In this specification, "connection" means an electrical connection, and current, voltage, or potential is... This corresponds to a circuit configuration that can be made available for supply or transmission. And the connected circuit configuration does not necessarily refer to the directly connected circuit configuration. Resistors, diodes, etc., so that current, voltage, or potential can be supplied or transmitted. , circuits that are indirectly connected via circuit elements such as transistors, inductors, and capacitive elements. The circuit configuration is also included in that category. Therefore, pixel 101 uses transistors and dies as needed. Even if it has other circuit elements such as diodes, resistors, capacitive elements, and inductors good.

[0019] Furthermore, even if components that appear independent on the circuit diagram are connected to each other, in reality For example, when a part of the wiring also functions as an electrode, one conductive film can function as multiple components. It may also have the functions of a single conductive device. In this specification, connection means such a single conductive device. This category also includes cases where a membrane possesses the functions of multiple components.

[0020] Furthermore, the source terminal of a transistor is the source region, which is part of the active layer, or the active layer. It refers to the connected source electrode. Similarly, the drain terminal of a transistor refers to the active layer This refers to a drain region, or a drain electrode connected to the active layer.

[0021] Furthermore, the source and drain terminals of a transistor are related to the channel type of the transistor. The terminology used for the source and drain terminals changes depending on the potential difference between them. Generally, in an n-channel transistor, the lower of the two terminals, source terminal and drain terminal, The terminal to which the potential is applied is called the source terminal, and the terminal to which a higher potential is applied is called the drain terminal. It will be discovered. Also, in p-channel transistors, of the source terminal and drain terminal, the low The terminal to which a lower potential is applied is called the drain terminal, and the terminal to which a higher potential is applied is called the source terminal. This is referred to as such. In this specification, for convenience, the source terminal and drain terminal are fixed. Sometimes, the connection relationships of transistors are explained by making assumptions, but in reality, the above potential relationships are... Therefore, the names of the source terminal and drain terminal are reversed. [Effects of the Invention]

[0022] According to one aspect of the present invention, a novel semiconductor device is provided, or a device is provided that displays afterimages. To provide a light-emitting device that can prevent afterimages from being displayed. This makes it possible to provide a method for driving a light-emitting device that can do the above.

[0023] Alternatively, according to one aspect of the present invention, a light-emitting device capable of displaying image information even at high scanning frequencies. To provide, or to drive a light-emitting device that can display image information even at high scanning frequencies. It becomes possible to provide a method.

[0024] Furthermore, the description of these effects does not preclude the existence of other effects. The embodiment does not need to have all of these effects. Other effects are described in the specification. This will become clear from the descriptions in the drawings and claims, and the specification, drawings, and claims will be clear from the description, drawings, and claims. It is possible to extract other effects from any of these descriptions. [Brief explanation of the drawing]

[0025] [Figure 1] A diagram showing the configuration of the light-emitting device and the configuration of the pixels. [Figure 2] A diagram illustrating the operation of pixels. [Figure 3] Circuit diagram of the pixel section. [Figure 4] Pixel timing chart. [Figure 5] Circuit diagram of the pixel section. [Figure 6] Circuit diagram of the pixel section. [Figure 7] Circuit diagram of the pixel section. [Figure 8] Circuit diagram of the pixel section. [Figure 9] Pixel timing chart. [Figure 10] A diagram showing the configuration of the light-emitting device. [Figure 11] Cross-sectional view of a pixel. [Figure 12] Top view of a pixel. [Figure 13] Cross-section of a transistor. [Figure 14] Perspective view of the light-emitting device. [Figure 15] A diagram of an electronic device. [Figure 16]Top view and cross-sectional view of a transistor. [Modes for carrying out the invention]

[0026] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is... Not limited to the following description, the present invention may have forms and characteristics that do not depart from the spirit and scope of the invention. Those skilled in the art will readily understand that the details can be modified in various ways. Therefore, the present invention The description of the embodiments shown below is not to be limited to the following.

[0027] Furthermore, in the embodiments described below, the same part or a part having a similar function is used. The same symbol is used across different drawings, and explanations of its repetition are omitted.

[0028] Furthermore, when using the same symbol, especially when it is necessary to distinguish between them, the symbol should be marked with " Identifying codes such as "(n)" and "(m, n)" may be added to the notation.

[0029] (Embodiment 1) Figure 1(A) shows an example block diagram illustrating the configuration of a light-emitting device according to one aspect of the present invention. Oh, in a block diagram, the components are classified by function and shown as independent blocks. However, it is difficult to completely separate the actual components by function, and one component It is possible that this may be involved in multiple functions.

[0030] The light-emitting device 100 shown in Figure 1(A) comprises a pixel section 102 having multiple pixels 101, and a signal line drive A source driver circuit 124 and a gate driver circuit 125, It has at least a panel 103, a controller 104, and a power supply circuit 105. Pixel 101 comprises a light-emitting element and a transistor that controls the operation of the light-emitting element. To possess

[0031] When the controller 104 receives a signal Sig0 containing image information, the panel 103 Signal processing is applied to signal Sig0 according to the specifications, and it is supplied to panel 103 as signal Sig1. It has the function of supplying. In addition, the controller 104 has the function of supplying the signal Sig2 which does not contain image information. It has the function of generating and supplying to panel 103.

[0032] The power supply circuit 105 receives the voltage Vp input to the light-emitting device 100, and controls the panel 103 and the control panel. The 104 has the function of generating voltage to supply to various other circuits within the light-emitting device 100. Furthermore, the power supply circuit 105 supplies voltage VDD to the multiple pixels 101 of the pixel unit 102. Each has a function to supply power to it. Specifically, in Figure 1(A), the voltage VDD is at the ground potential. A fixed potential Vcom and a potential Vel are used as the potential difference for each of the multiple pixels 101. The controller 104 supplies the voltage VD to the multiple pixels 101 via the power supply circuit 105. It has a function to select whether or not to supply D.

[0033] The power supply circuit 105 has a function to control the supply of voltage to the various circuits of the panel 103. It is acceptable to have it.

[0034] The scan line driving circuit 125 selects a plurality of pixels 101 of the pixel unit 102 row by row. It has a function.

[0035] The signal line drive circuit 124 receives signal Sig1 or signal S from the controller 104. It has the function of supplying ig2 to the pixels 101 of the row selected by the scan line drive circuit 125. do.

[0036] Here, signal Sig2 is assumed to be a constant potential that does not contain image information. In this case, this potential This may be generated by the signal line drive circuit 124 or by the power supply circuit 105. The signal Sig2 may be given a potential Vcom or a potential Vel.

[0037] Next, Figure 1(B) shows an example of the specific configuration of pixel 101. Pixel shown in Figure 1(B) 101 consists of a light-emitting element EL1, transistor M1, transistor M2, and transistor It has at least M3.

[0038] The light-emitting element EL1 includes elements whose brightness is controlled by current or voltage. For example, using an OLED (organic light-emitting diode) as the light-emitting element EL1. This is possible. An OLED has at least an EL layer, an anode, and a cathode. The EL layer is a It consists of one or more layers placed between the electrode and the cathode, and within these layers, It includes at least a light-emitting layer containing a photoluminescent material. The EL layer is, with reference to the cathode, When the potential difference between the cathode and anode becomes greater than or equal to the threshold voltage Vthe of the light-emitting element EL1, it is supplied. Electroluminescence is obtained by the electric current. , luminescence (fluorescence) when returning from the singlet excited state to the ground state and when returning from the triplet excited state to the ground state This includes the luminescence (phosphorescence) that occurs when the light returns.

[0039] Transistor M3 emits light from the power supply voltage, which corresponds to the potential difference between potential Vcom and potential Vel. It has a function to control the supply to child EL1. That is, the above power supply voltage is controlled by transistor M It is supplied to the light-emitting element EL1 via 3.

[0040] Transistor M1 receives the signal Sig1 from the controller 104 to the panel 103. It has the function of controlling the input to the gate electrode of transistor M3.

[0041] Transistor M2 receives the signal Sig2, which is supplied to panel 103 by controller 104. It has the function of controlling the input to the gate electrode of transistor M3.

[0042] Specifically, in pixel 101, the source terminal and drain terminal of transistor M3 are Either one is connected to wiring ANL to which a potential Vel is applied, and the other is connected to the light-emitting element E It is connected to either the anode or cathode of L1. Also, the anode and cathode of the light-emitting element EL1 The other end of either terminal is connected to terminal CTL to which the potential Vcom is applied. The source and drain terminals of the transistor M1 are such that either one of them is connected to the signal Sig1. One end is connected to wiring SL1, to which a potential is applied, and the other end is connected to the gate electrode of transistor M3. The gate electrode of transistor M1 is connected to the ON or ON state of transistor M1. A signal is input to select OFF. Furthermore, the source terminal of transistor M2 Either the drain terminal or the other terminal is connected to wiring SL2, to which the potential of signal Sig2 is applied. And the other end is connected to the gate electrode of transistor M3. Transistor M2 has A signal is input to the gate electrode to select whether transistor M2 is on or off. It can be done.

[0043] Furthermore, in one aspect of the present invention, in a normal operating state in which an image is displayed on the pixel unit 102 A signal Sig1 containing image information is supplied to wiring SL1. Also, an image information signal Sig1 is supplied to wiring SL2. A signal Sig2 is given that does not carry any information.

[0044] Using Figure 2, we will explain an example of the operation of pixel 101 shown in Figure 1(B). Figure 2(A) Figures 2(A) through 2(D) schematically show the operation of pixel 101. In this case, a capacitive element C1 for maintaining the gate voltage of transistor M3 is provided in pixel 101. The example shows the case where it is being cut, between the gate electrode (G) and the active layer of transistor M3. If the gate capacitance formed therein, or the parasitic capacitance of the gate electrode, is sufficiently large, it does not necessarily mean that it is a capacitive element. It is not necessary to provide C1 at pixel 101. Also, in Figures 2(A) to 2(D), The transistors M1 and M2 are shown as switches. Also, Figure 2(A) to In Figure 2(D), the drain terminal (D) of transistor M3 is connected to wiring ANL, and the same This shows an example where terminal (S) is connected to the light-emitting element EL1.

[0045] Figure 2(A) shows the case where a signal Sig1 containing image information is input to pixel 101. The operation of 1 is schematically shown. In Figure 2(A), the signal Si is transmitted through the ON transistor M1. The potential of g1 is supplied from wiring SL1 to the gate electrode of transistor M3. Capacitor element C Charge accumulates in point 1 according to the above potential. Then, electricity is charged between terminal CTL and wiring ANL. When a source voltage is applied, the drain current value of transistor M3 is equal to the signal Sig1. The brightness of the light-emitting element EL1 is determined according to the potential, and according to the value of the drain current mentioned above.

[0046] Figure 2(B) schematically shows the operation of pixel 101 when it holds the signal Sig1. As shown in Figure 2(B), when transistor M1 is turned off, the wiring SL1 and the transistor The gate electrode of M3 is electrically disconnected. Therefore, in the capacitive element C1, the stored The charge is retained, and the potential of the gate electrode of transistor M3 is also retained. Then, terminal CT When a power supply voltage is applied between L and wiring ANL, it is determined according to the potential of signal Sig1. The drain current value of transistor M3 and the brightness of light-emitting element EL1 are determined by the value of transistor M It remains active even after setting 1 to OFF.

[0047] If the off-current of transistor M1 is extremely small, the capacitive element C will be affected via transistor M1. This prevents the charge held in 1 from leaking out. In this case, transistor M After the input of signal Sig1 to pixel 101 ends when 1 is turned off, transistor M3 The potential of the gate electrode is less likely to fluctuate, and therefore the brightness of the light-emitting element EL1 does not change. It can be prevented.

[0048] However, if the off-current of transistor M1 is extremely small, the electricity stored in capacitive element C1 The load is held in place, and then a signal Sig1 with different image information from Figure 2(A) is input. However, it is not possible to completely replace the charge held in the capacitive element C1, and the previous image information However, this can sometimes be displayed as an afterimage in the pixel area 102. For example, Figure 2(C) shows Turning off the transistor M3 and sending the signal Sig1 to turn off the light-emitting element EL1 to pixel 101 This schematically shows the operation when the signal Sig1 is input, and the capacitive element C1 Unable to completely extinguish the retained charge, transistor M3 remains on. Maintaining this state, current continues to be supplied to the light-emitting element EL1, and an afterimage is displayed in the pixel section 102. It ends up happening.

[0049] Therefore, in one aspect of the present invention, in the state immediately before the signal Sig1 is supplied to the pixel 101, Then, the signal Sig2, which does not contain image information, is input to pixel 101, and the gate of transistor M3 Initialize the potential of the electrodes.

[0050] Figure 2(D) shows the case where a signal Sig2 that does not contain image information is input to pixel 101. The operation of 01 is schematically shown. In Figure 2(D), the signal S is transmitted through the ON transistor M2. The potential of ig2 is applied from wiring SL2 to the gate electrode of transistor M3. If transistor M3 is an n-channel type, the potential of signal Sig2 is the gate of transistor M3. The voltage is set to a height that is equal to or lower than the threshold voltage. Transistor M3 is p In the case of a channel type, the potential of signal Sig2 is the gate voltage of transistor M3, and the threshold voltage is... The height should be equal to or higher than the voltage.

[0051] Therefore, if charge is accumulated in the capacitive element C1 according to the potential of the signal Sig1, the signal When the potential of Sig2 is input to pixel 101, the charge is released. The M3 inverter is turned off, and the EL1 light-emitting element does not emit light.

[0052] Subsequently, the signal Sig1 is input to pixel 101 again, and the light-emitting element responds to the potential of the signal Sig1. The brightness of child EL1 is determined. At this time, pixel 101 is pre-initialized by signal Sig2. Therefore, afterimages are not displayed in the pixel area 102.

[0053] Note that Figure 1(B) shows an example where transistors M1 to M3 have a single-gate structure. As shown, these transistors have multiple electrically connected gate electrodes. Therefore, it may also be a multi-gate structure having multiple channel-forming regions.

[0054] Next, an example of the configuration of the pixel section 102 will be described. Figure 3 shows the specific configuration of the pixel section 102. An example of a circuit diagram is shown.

[0055] As shown in Figure 3, the pixel section 102 consists of multiple wirings GL, multiple wirings SL1, and multiple wirings It has a line SL2, wiring ANL, and multiple pixels 101. As an example, pixel section 1 02 is configured by arranging pixels 101 in n rows vertically and m columns horizontally (where n and m are integers greater than or equal to 2). The pixel section 102 is arranged in order from the top pixel 101 in Figure 3, to the first row, second row, and so on. We will count them in order from the leftmost pixel in Figure 3, starting as the 1st column, the 2nd column, and so on, as the mth column. GL is assigned the signs GL(0), GL(1), GL(2), and so on, from top to bottom. It is as follows. Also, the wiring SL1 is SL1(1), SL1(2) to SL1(m) from left to right. They are given the designation, and similarly, the wiring SL2 is labeled SL2(1), SL2(2), and so on from left to right. It is designated as L2(m). Also, each pixel 101 has an electrical signal at terminal CTL. They are directly connected.

[0056] In the case of the light-emitting device 100 shown in Figure 1(A), the multiple wires SL1 are connected to the signal line drive circuit 124. Multiple wirings GL are connected to the scan line drive circuit 125, and wiring A NL and terminal CTL are connected to the power supply circuit 105. And each pixel 101 is multi One of the numbered wires SL1, two of the multiple wires GL, one of the multiple wires SL2, and wire A It is connected to NL. All pixels 101 are connected to terminal CTL.

[0057] In pixel 101 of the kth row (where k is an integer greater than or equal to 1), the gate electrode of transistor M1 is It is connected to wire GL(k). That is, transistor M1 is selected when wiring GL(k) is selected. When this occurs, it turns on and transmits from wiring SL1 to the k-th row pixel 101 via transistor M1. The signal Sig1 is input.

[0058] Furthermore, in pixel 101 of the (k+1)th row, the gate electrode of transistor M2 is in the row above. It is connected to the wiring GL(k) that exists. That is, transistor M2 is connected to wiring GL( When k) is selected, it turns on and the wiring SL2 is connected to transistor M2 via the k+1 The signal Sig2 is input to pixel 101 of the row, and pixel 101 is initialized.

[0059] When a signal Sig1 containing image information is input to pixel 101, the potential of signal Sig1 is determined according to the Then, the light emission state of the light-emitting element EL1 is determined. Specifically, according to the potential of the signal Sig1, When the transistor M3 is turned on, the light-emitting element EL1 is supplied with current and emits light. This is the result. Also, according to the potential of signal Sig1 or signal Sig2, transistor M3 is O When this setting is enabled, no current is supplied to the light-emitting element EL1, and the light-emitting element EL1 does not emit light. It becomes a state of light.

[0060] The operation of the pixel unit 102 will be explained using the timing chart shown in Figure 4. Figure 4 This refers to the potential supplied to the multiple wirings GL (GL(0) to GL(n)) shown in Figure 3, and Figure 3 The signal Sig1 supplied to the wiring SL1 shown in Figure 3, and the signal supplied to the wiring SL2 shown in Figure 3. The timing chart for Sig2 is shown as an example. Figure 4 shows the timing within one frame period. This represents a scalar chart, where one frame period is divided into n+1 periods from period p0 to period pn. It is included. Note that the timing chart shown in Figure 4 is included in the pixel section 102 shown in Figure 3. This example illustrates the case where the transistor is of the n-channel type.

[0061] The signal Sig2 is maintained at a constant potential throughout the period from p0 to pn.

[0062] First, during period p0, the wiring GL(0) is selected, which signals the first row of pixel 101. The signal Sig2 is input, and the corresponding pixel is initialized.

[0063] Next, during period p1, wiring GL(0) becomes unselected (a low-level potential is applied). ), wiring GL(1) is selected. When wiring GL(1) is selected, the first row of pixels 101 The signal Sig1 is input to it. At the same time, the signal Sig2 is applied to pixel 101 of the second row. Then, the corresponding pixel is initialized.

[0064] Next, during period p2, wiring GL(1) becomes unselected, and pixel 101 of the first row becomes the following The state of period p1 is maintained until a signal is input. When wiring GL(2) is selected, The signal Sig1 is input to the second row of pixels 101. At the same time, the signal is also input to the third row of pixels 101. The pixel Sig2 is given and initialized.

[0065] The above operation is performed until wiring GL(n) is selected, and initialization by signal Sig2 and The signal Sig1 is input sequentially from pixel 101 of the first row to pixel 101 of the nth row, and the image An image can be displayed on the element unit 102.

[0066] As described above, the timing at which the signal Sig2 is input to the pixel is placed on the row above. By synchronizing with the selection of wiring GL, when the scanning frequency of the light-emitting device 100 is set to a high frequency... Even in this case, the signal Sig2 can be input to pixel 101 without delay.

[0067] Figure 5 shows the same circuit diagram as in Figure 3, but without changing the connection relationships between each element and the wiring, and with the wiring ANL changed to pixels. This is a circuit diagram showing the case where section 102 is arranged horizontally.

[0068] In the circuit diagrams of Figure 3 or Figure 5, the wiring SL2 is connected, for example, to terminal CTL. They may be present (see Figure 6).

[0069] Alternatively, in the circuit diagram of Figure 3 or Figure 5, for example, without providing wiring SL2, the transistor The source terminal and drain terminal of M2 are such that one of them is connected to terminal CTL, and the other is connected to terminal CTL. Alternatively, this may be connected to the gate electrode of transistor M3 (see Figure 7).

[0070] Alternatively, in the circuit diagram of Figure 3 or Figure 5, for example, without providing wiring SL2, the transistor The source and drain terminals of M2 are such that either one is the source of transistor M3. One end may be connected to the other, and the other end may be connected to the gate electrode of transistor M3 (see Figure 8). ). In this way, when transistor M2 is turned on, the capacitive element C1 is short-circuited. In this state, pixel 101 is initialized.

[0071] Furthermore, this embodiment can be implemented in appropriate combination with other embodiments.

[0072] (Embodiment 2) In this embodiment, one aspect of the present invention will be described with reference to Figure 9. This is effective, for example, when the signal Sig1 is input at a high scanning frequency, such as in double-speed drive. As the scanning frequency increases, the period given to the input signal Sig1 becomes shorter, and the pixels In some cases, the potential relative to Sig1 cannot be sufficiently written, but in one aspect of the present invention, the above problem is addressed. The problem can be solved.

[0073] Figure 9 shows a timing chart illustrating one aspect of the present invention. Figure 9 shows the timing chart in Embodiment 1. The signal Sig1 is applied to wiring SL1 earlier than the period during which wiring GL is selected. When timing, if the same signal as signal Sig1 is input to wiring SL2 as signal Sig2: This shows the timing chart. The data for signals Sig1 and Sig2 are split. We will refer to each period as signal S1, S2, S3, and so on, until Sn.

[0074] In the period p0 shown in Figure 9, with wiring GL(0) selected, the signal Sig2 is set to signal When S1 is applied to wiring SL2, signal S1 is input to pixel 101 of the first row. During period p0... The gate electrode of transistor M3 of pixel 101 in the first row is precharged by signal S1. It will be in that state.

[0075] Next, during period p1, with wiring GL(1) selected, signal S is set as signal Sig1. The signal 1 is input again to the first row pixel 101 via transistor M1. S1 is input to the first row's pixel 101 over two periods, from period p0 to period p1. Also, during period p1, the signal Sig2 is used to signal the transistor M3 of the second row of pixel 101. The gate electrode precharges simultaneously.

[0076] For example, even if the period applied to the input of signal Sig1 is halved due to double-speed driving Because the input from signal Sig2 is supplemented, the total input period of signal S1 is not halved. The input of signal S1 is successful.

[0077] By performing the above operation until wiring GL(n) is selected, even in double-speed drive, the signal S1 can be transmitted. The data up to number Sn can be input to the pixel unit 102 without any problems.

[0078] Furthermore, this embodiment can be implemented in appropriate combination with other embodiments.

[0079] (Embodiment 3) In this embodiment, we will describe a more detailed example of the configuration of the light-emitting device 100 shown in Figure 1(A). I will explain.

[0080] Figure 10 shows, as an example, the configuration of a light-emitting device according to one aspect of the present invention, in a block diagram. The light-emitting device 100 shown in 0 has a pixel section having multiple pixels 101, similar to the case in Figure 1(A). 102, signal line drive circuit (source driver) 124, and scan line drive circuit (gate driver) A panel 103 having a wire (125), a controller 104, and a power supply circuit 105. Furthermore, the light-emitting device 100 shown in Figure 10 includes an input device 120 and a CPU 121 It also includes an image processing circuit 122 and an image memory 123.

[0081] The input device 120 has the function of providing information and commands to the CPU 121 of the light-emitting device 100. It has. For example, the input device 120 can transition the pixel unit 102 from an operating state to a non-operating state. A command to perform an action, or a command to transition the pixel unit 102 from a non-operating state to an operating state. Commands can be given to the CPU 121. Input devices 120 include a keyboard and a pointer. Touch devices, touch panels, etc., can be used.

[0082] The CPU 121 decodes the instruction input from the input device 120, and the light-emitting device 100 It has the function of executing the command by comprehensively controlling the operation of various circuits.

[0083] For example, an input device 120 may issue a command to switch the pixel unit 102 from an operating state to a non-operating state. If a signal is received, the CPU 121 will determine the power supply voltage from the power supply circuit 105 to the pixel unit 102. A command is sent to the controller 104 to stop the supply.

[0084] Alternatively, the input device 120 may issue a command to switch the pixel unit 102 from a non-operating state to an operating state. If a signal is received, the CPU 121 will determine the power supply voltage from the power supply circuit 105 to the pixel unit 102. A command is sent to controller 104 to resume supply.

[0085] The image memory 123 has the function of storing the image data 126 input to the light-emitting device 100. It has. Note that in Figure 10, the case in which only one image memory 123 is provided in the light-emitting device 100 is shown. Although illustrated, multiple image memories 123 may be provided in the light-emitting device 100. For example, three image data 126 corresponding to hues such as red, blue, and green, are used to determine the pixel area. When a full-color image is displayed in 102, the image memory corresponding to each image data 126 You could also set up 1, 2, and 3 respectively.

[0086] Image memory 123 includes, for example, DRAM (Dynamic Random Access). Memory), SRAM (Static Random Access Memory), SRAM (Static Random Access Memory) A memory circuit such as y) can be used. Alternatively, VRAM (Vi) can be used in the image memory 123. You may also use deo RAM.

[0087] The image processing circuit 122 processes the image data 126 according to the command from the controller 104. Write to memory 123 and read image data 126 from image memory 123. It has the function of generating signal Sig1 from image data 126.

[0088] The controller 104 also drives the signal line drive circuit 124 and the scan line drive circuit 125, etc. It has the function of supplying various drive signals used in the system to the panel 103. The drive signals include: The start pulse signal SSP and clock signal SCK control the operation of the signal line drive circuit 124. , latch signal LP, start pulse signal GSP which controls the operation of scan line drive circuit 125, This includes the clock signal GCK, etc.

[0089] Furthermore, this embodiment can be implemented in appropriate combination with other embodiments.

[0090] (Embodiment 4) In this embodiment, the light-emitting device and the cross-sectional structure of the transistor shown in the above embodiment and The layout will be explained using diagrams.

[0091] <Cross-sectional structure of a light-emitting device> Figure 11 shows, as an example, the cross-sectional structure of the pixel portion of a light-emitting device according to one aspect of the present invention. In Figure 11, the pixel 101 shown in Figure 3 has a transistor M3, a capacitive element C1, and This shows an example of the cross-sectional structure of the light-emitting element EL1.

[0092] Specifically, the light-emitting device shown in Figure 11 consists of a transistor M3 and a capacitive element C1 on a substrate 400. The transistor M3 has a conductive film 401 that functions as a gate, and the conductive film 401 The insulating film 402 on top, and the semiconductor film 403 which overlaps the conductive film 401 with the insulating film 402 in between. , conductive film 40 which functions as a source or drain electrically connected to semiconductor film 403 It has 4 and a conductive film 405.

[0093] The capacitive element C1 has a conductive film 401 that functions as an electrode, and an insulating film 402 on the conductive film 401. The conductive film overlaps with the conductive film 401 with an insulating film 402 in between, and also functions as an electrode. It has 404.

[0094] The insulating film 402 can be aluminum oxide, magnesium oxide, silicon oxide, or silicon oxide nitride. Silicon nitride, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, oxide Zirconium, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide (one of these) The insulating film, including the above, may be used as a single layer or in a laminated configuration. In this specification, Oxiditrides refer to materials whose composition contains more oxygen than nitrogen, and nitride oxides. This refers to a material whose composition contains more nitrogen than oxygen.

[0095] Furthermore, insulating film 411 is provided on the semiconductor film 403, conductive film 404, and conductive film 405. When an oxide semiconductor is used as the semiconductor film 403, the insulating film 411 is the semiconductor film 4 It is desirable to use a material that can supply oxygen to O3. The above material is used as an insulating film 4 By using it in 11, the oxygen contained in the insulating film 411 can be moved to the semiconductor film 403. This is possible, and the amount of oxygen vacancy in the semiconductor film 403 can be reduced. The insulating film 411 contains The transfer of oxygen to the semiconductor film 403 occurs after the insulating film 411 is formed by performing a heat treatment. This can be done efficiently.

[0096] An insulating film 420 is provided on the insulating film 411, and a conductive film 424 is provided on the insulating film 420. It is provided. The conductive film 424 is provided in the openings provided in the insulating film 411 and the insulating film 420. It is connected to the conductive film 404.

[0097] An insulating film 425 is provided on the insulating film 420 and the conductive film 424. The insulating film 425 is It has an opening in a position that overlaps with the conductive film 424. Also, on the insulating film 425, the insulating film 4 An insulating film 426 is provided at a different location from the 25 openings. And insulating film 425 And on the insulating film 426, the EL layer 427 and the conductive film 428 are provided to be stacked in order. The portion of the EL layer 427 that is in contact with the upper surface of the conductive film 424 and the lower surface of the conductive film 428 It functions as a light-emitting element EL1. And conductive film 424 and conductive film 428, one of which is positive One pole functions as the electrode, and the other functions as the cathode.

[0098] Furthermore, the light-emitting device has a substrate 430 facing the substrate 400 with the light-emitting element EL1 in between. To do so, light is directed onto the substrate 430, that is, onto the surface of the substrate 430 that is closer to the light-emitting element EL1. A shielding film 431 having a shielding function is provided. The shielding film 431 is made of light-emitting elements It has an opening in the region that overlaps with the sub-EL1. In the opening that overlaps with the light-emitting element EL1, A colored layer 432 that transmits visible light in a specific wavelength range is provided on the substrate 430.

[0099] The insulating film 426 adjusts the distance between the light-emitting element EL1 and the substrate 430. Depending on the context, it may be omitted.

[0100] Furthermore, in this embodiment, the light from the light-emitting element EL1 is extracted from the side opposite to the element substrate. The emission structure is shown, but the light from the light-emitting element EL1 is extracted from the element substrate side. Mission structure, or the light from the light-emitting element EL1 from the element substrate side and the opposite side of the element substrate. A dual emission structure that allows extraction from the side can also be one aspect of the present invention.

[0101] <Pixel layout> Next, we will explain an example of the layout of pixel 101 shown in Figure 5. Figure 12 is shown in Figure 5. The top view of pixel 101 shown in Figure 12 is shown as an example. Note that in Figure 12, the rays of pixel 101 To clarify the output, various insulating films and light-emitting element EL1 (conductive film 424, EL layer 4 The phrases "27 and conductive film 428" are omitted.

[0102] Figure 12 shows the layout of pixels 101a and 101b, which are arranged vertically.

[0103] In pixel 101a, transistor M1 is connected to a conductive film 501 which functions as a gate. The semiconductor film 511 and the semiconductor film 511 are electrically connected to it and serve as source or drain. It has conductive films 521 and 524 that have the function of the wiring GL and It has the function of being a .

[0104] In pixel 101a, transistor M2 is connected to a conductive film 502 which functions as a gate. The semiconductor film 512 and the semiconductor film 512 are electrically connected to it and serve as a source or drain. It has conductive films 522 and 524 which have the function of conductive film 502. It is electrically connected via 3 to the wiring GL (not shown) of the pixel above it.

[0105] In pixel 101a, transistor M3 is connected to a conductive film 503 which functions as a gate. The semiconductor film 513 and the semiconductor film 513 are electrically connected to it and serve as a source or drain. It has conductive films 525 and 526 which have the function of conductive film 50. It is electrically connected to 4.

[0106] In pixel 101a, the capacitive element C1 consists of conductive film 503, conductive film 525, and conductive film 50 It has an insulating film (not shown) provided between 3 and the conductive film 525. The conductive film 503 is conductive It is electrically connected to film 524.

[0107] In pixel 101a, the conductive film 504 functions as a wiring ANL.

[0108] In pixel 101a, the conductive film 501 is electrically connected to the conductive film 527.

[0109] In pixel 101b, transistor M1 is connected to a conductive film 505 which functions as a gate. The semiconductor film 514 and the semiconductor film 514 are electrically connected to it and serve as source or drain. It has conductive films 521 and 528 that have the function of the wiring GL and It has the function of being a .

[0110] In pixel 101b, transistor M2 is connected to a conductive film 506 which functions as a gate. The semiconductor film 515 and the semiconductor film 515 are electrically connected to it and serve as source or drain. It has conductive films 522 and 528 which have the function of conductive film 506. It is electrically connected to the conductive film 501 of the pixel 101a via 7.

[0111] In pixel 101b, transistor M3 is connected to a conductive film 507 which functions as a gate. The semiconductor film 516 and the semiconductor film 516 are electrically connected and serve as source or drain. It has conductive films 529 and 530 which have the same function. Conductive film 530 is conductive film 50 It is electrically connected to 8.

[0112] In pixel 101b, the capacitive element C1 consists of conductive film 507, conductive film 529, and conductive film 50 It has an insulating film (not shown) provided between 7 and the conductive film 529. The conductive film 507 is conductive It is electrically connected to film 528.

[0113] In pixel 101b, the conductive film 508 functions as a wiring ANL.

[0114] In pixel 101b, the conductive film 505 is included in the pixel below it via the conductive film 531. It is electrically connected to the gate of transistor M2.

[0115] The conductive films 501 to 508 can be manufactured using the same process.

[0116] The semiconductor films 511 to 516 can be manufactured using the same process.

[0117] The conductive films 521 to 531 can be manufactured using the same process.

[0118] The conductive film 521 functions as wiring SL1.

[0119] The conductive film 522 functions as wiring SL2.

[0120] Figure 12 shows that the pixels located above and below each other are electrically connected via conductive films 523, 527, and 531. Although connected, instead of conductive films 523, 527, and 531, for example, conductive film 42 in Figure 11 Pixels may be electrically connected to each other via a conductive film produced using the same process as in step 4.

[0121] <Transistor Structure> Next, as an example, we will describe the configuration of a transistor 70 having a channel formation region in an oxide semiconductor film. To show.

[0122] The transistor 70 shown in Figure 13(A) has a conductive film 80 that functions as a gate, and a conductive film 8 An insulating film 81 on the surface, and an oxide semiconductor film 82 that overlaps with the conductive film 80 with the insulating film 81 in between. , conductive films 83 and 82 connected to the oxide semiconductor film 82, which function as source and drain. It has a conductive film 84. Also, the transistor 70 shown in Figure 13(A) has an oxide semiconductor film 82, comprising insulating films 85 to 87 sequentially laminated on conductive films 83 and 84. ru.

[0123] In Figure 13(A), the oxide semiconductor film 82, conductive film 83, and conductive film 84 are sequentially deposited. Although the example shows a case where layered insulating films 85 to 87 are provided, oxide semiconductors The insulating film provided on the body film 82, conductive film 83, and conductive film 84 may be one or two layers. That's fine, and having three or more layers is also acceptable.

[0124] The insulating film 86 contains oxygen in a quantity greater than the stoichiometric composition, and heating removes some of the above oxygen. It is desirable that the insulating film has the function of supplying to the oxide semiconductor film 82. 86 is preferable to have few defects, and typically, it is due to the dangling bond of silicone. The density of spins of the ESR spectrum (an asymmetric ESR spectrum with a g value appearing near 2.01) to be obtained of the pins is preferably 1×10 18 spins / cm 3 or less. However, when the insulating film 86 is provided directly on the oxide semiconductor film 82, the oxide semiconductor film 8 2 may be damaged during the formation of the insulating film 86. As shown in FIG. 13(A), the insulating film 85 may be provided between the oxide semiconductor film 82 and the insulating film 86. The insulating film 85 causes less damage to the oxide semiconductor film 8 2 during its formation than the insulating film 86, and is preferably an insulating film having a function of permeating oxygen. However, since the insulating film 86 can be directly formed on the oxide semiconductor film 82 while suppressing the damage to the oxide semiconductor film 82 to a small level if possible, the insulating film 85 does not necessarily have to be provided.

[0125] The insulating film 85 preferably has few defects. Typically, the density of spins near g = 2.001 derived from the dangling bonds of silicon obtained by ESR measurement is 3×10 17 spins / cm 3 or less. This is because if the density of defects contained in the insulating film 85 is high, oxygen binds to the defects, resulting in a decrease in the amount of oxygen permeated through the insulating film 85

[0126] Also, it is preferable that there are few defects at the interface between the insulating film 85 and the oxide semiconductor film 82. Typically by ESR measurement in which the magnetic field is applied parallel to the film surface, the density of spins having a g value derived from oxygen deficiency in the oxide semiconductor used for the oxide semiconductor film 82 is 1.89 or more and 1.96 or less is 1×10 17 spins / cm3 Furthermore, it must be below the detection limit. It is preferable.

[0127] Furthermore, it is desirable that the insulating film 87 has a blocking effect that prevents the diffusion of oxygen, hydrogen, and water. It seems that the insulating film 87 has a blocking effect that prevents the diffusion of hydrogen and water. ,desirable.

[0128] The more dense and compact an insulating film is, and the fewer unbonded bonds it has and the more chemically stable it is, the better it performs. It exhibits a very high blocking effect. It exhibits an insulating effect that prevents the diffusion of oxygen, hydrogen, and water. The border film is, for example, aluminum oxide, aluminum oxide nitride, gallium oxide, gallium oxide nitride Yttrium, yttrium oxide, yttrium oxidized nitride, hafnium oxide, hafnium oxidized nitride It can be formed using materials such as MU. It exhibits a blocking effect that prevents the diffusion of hydrogen and water. The border film can be made of, for example, silicon nitride, silicon oxide nitride, or the like.

[0129] If the insulating film 87 has a blocking effect that prevents the diffusion of water, hydrogen, etc., the resin inside the panel Alternatively, impurities such as water and hydrogen present outside the panel can penetrate the oxide semiconductor film 82. This can be prevented. When an oxide semiconductor is used for the oxide semiconductor film 82, the oxide semiconductor Some of the water or hydrogen that enters becomes an electron donor, thus causing the blocking effect described above. By using an insulating film 87 having the above properties, the threshold voltage of transistor 70 is reduced by the generation of donors. This can prevent shifting.

[0130] Furthermore, when an oxide semiconductor is used for the oxide semiconductor film 82, the insulating film 87 prevents the diffusion of oxygen. By having a blocking effect, it prevents oxygen from diffusing from the oxide semiconductor to the outside. This is possible. Therefore, the oxygen vacancies that serve as donors in oxide semiconductors are reduced. This prevents the threshold voltage of transistor 70 from shifting due to donor generation.

[0131] In Figure 13(A), the oxide semiconductor film 82 is composed of three stacked oxide semiconductor films. This illustrates a case where this is achieved. Specifically, in the transistor 70 shown in Figure 13(A) In this case, the oxide semiconductor film 82 is an oxide semiconductor film 82a to an oxide semiconductor film 82c, The layers are stacked sequentially from the edge film 81 side. The oxide semiconductor film 82 of the transistor 70 is stacked It is not necessarily composed of multiple oxide semiconductor films, but rather of a single oxide semiconductor film. It's okay if it's included.

[0132] Furthermore, the oxide semiconductor film 82a and the oxide semiconductor film 82c constitute the oxide semiconductor film 82b. It contains at least one of the constituent metal elements, and the energy at the lower end of the conduction band is acid 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0 0.15eV or greater, and 2eV or less, 1eV or less, 0.5eV or less, or 0.4eV or less, true It is an oxide film close to an empty state. Furthermore, the oxide semiconductor film 82b contains at least indium Including this is preferable because it increases carrier mobility.

[0133] Furthermore, as shown in Figure 13(B), the transistor 70 has an oxide semiconductor film 82c which is a conductive film. The configuration is such that 83 and the conductive film 84 are superimposed on the insulating film 85. It's okay to be there.

[0134] Furthermore, impurities such as water or hydrogen, which act as electron donors, are reduced, and acid An oxide semiconductor (purified Oxide Semiconductor) purified by reducing elemental deficiencies has few carrier generation sources, so it can be of type i (intrinsic semiconductor) or very close to type i. Therefore, a transistor having a channel formation region in the purified oxide semiconductor film has extremely small off-current and high reliability. And a transistor in which a channel formation region is formed in the oxide semiconductor film tends to have electrical characteristics (also referred to as normally-off characteristics) with a positive threshold voltage. Specifically, the small off-current of a transistor having a channel formation region in a purified oxide semiconductor film can be proven by various experiments. For example, even in an element with a channel width of 1×10μm and a channel length of 10μm, when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, the off-current can be below the measurement limit of a semiconductor parameter analyzer, that is, 1×10A or less. In this case, it can be seen that the off-current normalized by the channel width of the transistor is 100zA / μm or less. Also, a circuit is used in which a capacitor element and a transistor are connected and the charge flowing into or out of the capacitor element is controlled by the transistor to measure the off-current. In this measurement, the purified oxide semiconductor film is used for the channel formation region of the transistor, and the off-current of the transistor is measured from the change in the charge amount per unit time of the capacitor element. As a result, it was found that when the voltage between the source electrode and the drain electrode of the transistor is 3V, an even smaller off-current of several tens of yA / μm can be obtained. And a transistor in which a channel formation region is formed in the oxide semiconductor film tends to have electrical characteristics (also referred to as normally-off characteristics) with a positive threshold voltage. Specifically, the small off-current of a transistor having a channel formation region in a purified oxide semiconductor film can be proven by various experiments. For example, even in an element with a channel width of 1×10μm and a channel length of 10μm, when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, the off-current can be below the measurement limit of a semiconductor parameter analyzer, that is, 1×10A or less.

[0135] In this case, it can be seen that the off-current normalized by the channel width of the transistor is 100zA / μm or less. Also, a circuit is used in which a capacitor element and a transistor are connected and the charge flowing into or out of the capacitor element is controlled by the transistor to measure the off-current. In this measurement, the purified oxide semiconductor film is used for the channel formation region of the transistor, and the off-current of the transistor is measured from the change in the charge amount per unit time of the capacitor element. As a result, it was found that when the voltage between the source electrode and the drain electrode of the transistor is 3V, an even smaller off-current of several tens of yA / μm can be obtained. For example, even in an element with a channel width of 1×1 0 6 μm and a channel length of 10μm, when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, the off-current can be below the measurement limit of a semiconductor parameter analyzer, that is, 1×10 A or less. In this case, it can be seen that the off-current normalized by the channel width of the transistor is 100zA / μm or less. Also, a circuit is used in which a capacitor element and a transistor are connected and the charge flowing into or out of the capacitor element is controlled by the transistor to measure the off-current. In this measurement, the purified oxide semiconductor film is used for the channel formation region of the transistor, and the off-current of the transistor is measured from the change in the charge amount per unit time of the capacitor element. As a result, it was found that when the voltage between the source electrode and the drain electrode of the transistor is 3V, an even smaller off-current of several tens of yA / μm can be obtained. -13 Specifically, the small off-current of a transistor having a channel formation region in a purified oxide semiconductor film can be proven by various experiments. For example, even in an element with a channel width of 1×10μm and a channel length of 10μm, when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, the off-current can be below the measurement limit of a semiconductor parameter analyzer, that is, 1×10A or less. And a transistor in which a channel formation region is formed in the oxide semiconductor film tends to have electrical characteristics (also referred to as normally-off characteristics) with a positive threshold voltage. In this case, it can be seen that the off-current normalized by the channel width of the transistor is 100zA / μm or less. Also, a circuit is used in which a capacitor element and a transistor are connected and the charge flowing into or out of the capacitor element is controlled by the transistor to measure the off-current. In this measurement, the purified oxide semiconductor film is used for the channel formation region of the transistor, and the off-current of the transistor is measured from the change in the charge amount per unit time of the capacitor element. As a result, it was found that when the voltage between the source electrode and the drain electrode of the transistor is 3V, an even smaller off-current of several tens of yA / μm can be obtained. Also, a circuit is used in which a capacitor element and a transistor are connected and the charge flowing into or out of the capacitor element is controlled by the transistor to measure the off-current. In this measurement, the purified oxide semiconductor film is used for the channel formation region of the transistor, and the off-current of the transistor is measured from the change in the charge amount per unit time of the capacitor element. In this measurement, the purified oxide semiconductor film is used for the channel formation region of the transistor, and the off-current of the transistor is measured from the change in the charge amount per unit time of the capacitor element. As a result, it was found that when the voltage between the source electrode and the drain electrode of the transistor is 3V, an even smaller off-current of several tens of yA / μm can be obtained. Specifically, the small off-current of a transistor having a channel formation region in a purified oxide semiconductor film can be proven by various experiments. For example, even in an element with a channel width of 1×10μm and a channel length of 10μm, when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, the off-current can be below the measurement limit of a semiconductor parameter analyzer, that is, 1×10A or less. As a result, it was found that when the voltage between the source electrode and the drain electrode of the transistor is 3V, an even smaller off-current of several tens of yA / μm can be obtained. Therefore, transistors that use a highly purified oxide semiconductor film in the channel formation region are off-voltage. The current is significantly lower compared to transistors using crystalline silicon.

[0136] Furthermore, when using an oxide semiconductor film as the semiconductor film, the oxide semiconductor must be at least It is preferable that the oxide semiconductor contains indium (In) or zinc (Zn). As a stabilizer to reduce variations in the electrical characteristics of film-based transistors, In addition to those, it is preferable to have gallium (Ga). Also, as a stabilizer It is preferable to have tin (Sn). Also, hafnium (Hf) as a stabilizer. It is preferable to have this. Also, it is preferable to have aluminum (Al) as a stabilizer. This is preferable. It is also preferable to include zirconium (Zr) as a stabilizer. .

[0137] Among oxide semiconductors, In-Ga-Zn oxides and In-Sn-Zn oxides are carbon Unlike silicon dioxide, gallium nitride, or gallium oxide, sputtering and wet processes This makes it possible to fabricate transistors with excellent electrical characteristics, and offers superior mass-producibility. These are some of the advantages. Also, unlike silicon carbide, gallium nitride, or gallium oxide The above In-Ga-Zn oxide is used to form transistors with excellent electrical properties on a glass substrate. It is possible to manufacture these. Furthermore, it can accommodate larger substrate sizes.

[0138] Also, other stabilizers include lanthanides such as lanthanum (La) and cerium ( Ce, praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol Mium (Ho), Erbium (Er), Thulium (Tm), Ytterbium (Yb), Lu It may contain one or more types of tecium (Lu).

[0139] For example, as oxide semiconductors, indium oxide, gallium oxide, tin oxide, zinc oxide, I n-Zn oxides, Sn-Zn oxides, Al-Zn oxides, Zn-Mg oxides, S n-Mg oxides, In-Mg oxides, In-Ga oxides, In-Ga-Zn oxides Materials (also written as IGZO), In-Al-Zn oxides, In-Sn-Zn oxides, Sn-Ga-Zn oxides, Al-Ga-Zn oxides, Sn-Al-Zn oxides, I n-Hf-Zn oxides, In-La-Zn oxides, In-Pr-Zn oxides, In -Nd-Zn oxides, In-Ce-Zn oxides, In-Sm-Zn oxides, In- Eu-Zn oxides, In-Gd-Zn oxides, In-Tb-Zn oxides, In-D y-Zn oxides, In-Ho-Zn oxides, In-Er-Zn oxides, In-Tm -Zn oxides, In-Yb-Zn oxides, In-Lu-Zn ​​oxides, In-Sn- Ga-Zn oxides, In-Hf-Ga-Zn oxides, In-Al-Ga-Zn oxides Substances, In-Sn-Al-Zn oxides, In-Sn-Hf-Zn oxides, In-Hf- Al-Zn oxides can be used.

[0140] For example, an In-Ga-Zn oxide is an oxide containing In, Ga, and Zn. This is about taste, and the ratio of In, Ga, and Zn is not important. Also, metal elements other than In, Ga, and Zn are not considered. It may contain. In-Ga-Zn oxides have sufficiently high resistance in the absence of an electric field and are off-electric. It is possible to significantly reduce the flow rate, and it also has high mobility.

[0141] For example, high mobility can be obtained relatively easily with In-Sn-Zn oxides. However, Furthermore, even with In-Ga-Zn oxides, mobility can be increased by reducing the bulk defect density. It is possible to do so.

[0142] Oxide semiconductors are produced by the CVD (Chemical Vapor Deposition) method. MOCVD(Metal Organic Chemical Vapor Depos) ition) method, ALD (Atomic Layer Deposition) method, thermal C VD method or PECVD (Plasma Enhanced Chemical Vapor) This includes, but is not limited to, the MBE (Molecule Deposition) method. (Lar Beam Epitaxy) or PLD (Pulsed Laser Deposition) It is also possible to deposit films using the position method. In particular, MOCVD and ALD Using the thermal CVD method, or the method without plasma, damages oxide semiconductors. This makes it difficult to reduce leakage current in the transistor's off state, thus keeping it low.

[0143] In-Ga-Zn oxide films are deposited using thermal CVD methods such as MOVCD and ALD. In such cases, trimethylindium, trimethylgallium, and dimethylzinc are used. The chemical formula for trimethylindium is In(CH3)3. The chemical formula for lium is Ga(CH3)3. The chemical formula for dimethylzinc is Zn(C It is H3)2. Furthermore, it is not limited to these combinations, and trimethylgallium can be substituted with Triethylgallium (chemical formula Ga(C2H5)3) can also be used, along with dimethylzinc. Alternatively, diethylzinc (chemical formula Zn(C2H5)2) can be used.

[0144] The structure of oxide semiconductor films will be described below.

[0145] Oxide semiconductor films are broadly classified into single-crystal oxide semiconductor films and non-single-crystal oxide semiconductor films. Single-crystal oxide semiconductor films include amorphous oxide semiconductor films, microcrystalline oxide semiconductor films, and polycrystalline oxide films. This refers to monocrystalline semiconductor films, CAAC-OS films, etc.

[0146] Amorphous oxide semiconductor films have an irregular arrangement of atoms within the film and do not contain crystalline components. It is a crystalline semiconductor film. Even in minute regions, it does not have crystalline areas; the entire film has a completely amorphous structure. Oxide semiconductor films are a typical example.

[0147] Microcrystalline oxide semiconductor films are, for example, microcrystals (nanocrystals) with a size of 1 nm to less than 10 nm. It is also called. ) contains. Therefore, microcrystalline oxide semiconductor films are more fundamental than amorphous oxide semiconductor films. The arrangement of the microcrystalline elements is highly regular. Therefore, microcrystalline oxide semiconductor films are superior to amorphous oxide semiconductor films. It also has the characteristic of having a low defect level density.

[0148] CAAC-OS film is one of the oxide semiconductor films having multiple crystalline regions, and most of the bonds The crystal portion is small enough to fit within a cube with sides less than 100 nm. Therefore, CAAC-O The crystalline portion contained in the S film is within a cube with sides less than 10 nm, less than 5 nm, or less than 3 nm. This also includes cases where the size fits within the given space. CAAC-OS films have fewer defects than microcrystalline oxide semiconductor films. It is characterized by a low void density. CAAC-OS film is examined using a transmission electron microscope (TEM:T). Observed using a transmission electron microscope. Then, we can confirm the clear boundaries between the crystalline parts, that is, the grain boundaries (also called grain boundaries). It is not possible. Therefore, the CAAC-OS film has an electron mobility due to grain boundaries. It can be said that a decline is unlikely to occur.

[0149] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). ) This confirms that metal atoms are arranged in layers in the crystalline region. Each layer has irregularities on the surface (also called the surface to be formed) or the upper surface that forms the CAAC-OS film. The shape reflects this, and the elements are arranged parallel to the surface or top surface of the CAAC-OS film.

[0150] In this specification, "parallel" means that two straight lines are positioned at an angle of -10° or more and 10° or less. This refers to a state where something is positioned vertically. Therefore, it also includes cases where the angle is between -5° and 5°. This refers to a state where two straight lines are positioned at an angle of 80° to 100°. Therefore, This also includes cases where the angle is between 85° and 95°.

[0151] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (planar TEM). (M observation) In the crystalline region, metal atoms are arranged in a triangular or hexagonal shape. This can be confirmed. However, no regularity is observed in the arrangement of metal atoms between different crystalline regions. stomach.

[0152] Cross-sectional TEM observation and planar TEM observation revealed that the crystalline portion of the CAAC-OS film exhibits orientation. You can tell they are there.

[0153] X-ray diffraction (XRD) applied to the CAAC-OS film. When structural analysis is performed using this method, for example, a CAAC-OS film having InGaZnO4 crystals is found. In the out-of-plane analysis, the diffraction angle (2θ) shows a peak near 31°. This peak may appear. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have c-axis orientation, and the c-axis is generally aligned with the surface to be formed or the upper surface. It can be confirmed that it is facing in a nearly vertical direction.

[0154] On the other hand, in-pl X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In analysis using the ANE method, a peak may appear when 2θ is around 56°. This peak is It is attributed to the (110) plane of the InGaZnO4 crystal. Single crystal oxidation of InGaZnO4 For a solid semiconductor film, fix 2θ to around 56°, and use the normal vector of the sample surface as the axis (φ axis). When the sample is rotated while the analysis (φ scan) is performed, the crystal plane equivalent to the (110) plane is found. Six attributed peaks are observed. In contrast, in the case of the CAAC-OS film, 2θ is set to 5 Even when fixed at approximately 6° and scanned using the φ scan function, no clear peak appears.

[0155] From the above, it can be concluded that in CAAC-OS films, the orientation of the a-axis and b-axis is inconsistent between different crystalline regions. It is a rule, but it has c-axis orientation and the c-axis is parallel to the normal vector of the surface to be formed or the upper surface. It can be seen that it is facing in a certain direction. Therefore, it is arranged in layers as confirmed by the aforementioned cross-sectional TEM observation. Each layer of arranged metal atoms is a plane parallel to the ab-plane of the crystal.

[0156] The crystalline portion is formed when the CAAC-OS film is deposited, or when crystallization treatment such as heat treatment is performed. It is formed when this occurs. As mentioned above, the c-axis of the crystal is the surface on which the CAAC-OS film is formed or It is oriented in a direction parallel to the normal vector of the upper surface. Therefore, for example, the shape of the CAAC-OS film When the shape is altered by etching or other means, the c-axis of the crystal becomes the surface on which the CAAC-OS film is formed. Alternatively, it may not be parallel to the normal vector of the top surface.

[0157] Furthermore, the degree of crystallinity in the CAAC-OS film does not need to be uniform. For example, the CAAC-OS film When the crystalline portion is formed by crystal growth from near the upper surface of the CAAC-OS film, the upper surface The nearby region may have a higher degree of crystallinity than the region near the surface being formed. Also, CAA When impurities are added to a C-OS film, the degree of crystallinity in the region where the impurities are added changes, and some areas Regions with different degrees of crystallinity may also be formed.

[0158] Furthermore, the out-of-plane method for CAAC-OS films containing InGaZnO4 crystals. Analysis revealed that in addition to a peak near 2θ = 31°, a peak also appeared near 2θ = 36°. In some cases, this may occur. Peaks near 36° 2θ indicate c-axis orientation in a portion of the CAAC-OS film. This indicates that it contains crystals that do not have [the specified characteristic]. The CAAC-OS film has 2θ near 31°. It is preferable that a peak is observed, and that no peak is observed near 36° for 2θ.

[0159] Transistors using CAAC-OS film exhibit changes in electrical characteristics due to irradiation with visible light or ultraviolet light. The dynamics are small. Therefore, this transistor is highly reliable.

[0160] Furthermore, transistors using CAAC-OS films are resistant to external forces such as deformation caused by bending of the substrate. Its resistance to this is stronger than that of poly-si transistors or single-crystal si transistors, for example. It is suitable for highly flexible substrates such as plastics.

[0161] Note that oxide semiconductor films include, for example, amorphous oxide semiconductor films, microcrystalline oxide semiconductor films, and CA The AC-OS film may be a multilayer film having two or more types.

[0162] Furthermore, in order to deposit the CAAC-OS film by sputtering, the following conditions must be applied. This is preferable.

[0163] By reducing the inclusion of impurities during film formation, it is possible to suppress the disruption of the crystalline state due to impurities. For example, the concentration of impurities present in the processing room (hydrogen, water, carbon dioxide, and nitrogen, etc.) It would be good to reduce it. Also, it would be good to reduce the impurity concentration in the film formation gas. Specifically, the dew point is A film-forming gas with a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0164] Furthermore, by increasing the substrate heating temperature during film deposition, the sputtering particles can be prevented from migrating after reaching the substrate. A reaction occurs. Specifically, the substrate heating temperature is preferably between 100°C and 740°C. The film is deposited at a temperature between 200°C and 500°C. By increasing the substrate heating temperature during film deposition, the flat When plate-shaped or pellet-shaped sputtering particles reach the substrate, migration occurs on the substrate. A reaction occurs, and the flat surface of the sputtered particles adheres to the substrate.

[0165] Furthermore, by increasing the oxygen content in the deposition gas and optimizing the power, plasma damage during film deposition can be reduced. It is preferable to reduce this. The oxygen content in the film-forming gas is 30% by volume or more, preferably 100% by volume. Let the product be %.

[0166] As an example of the target, an In-Ga-Zn-based oxide target is shown below.

[0167] InO X powder, GaO Y powder, and ZnO Z powders are mixed at a predetermined molar ratio, and after pressure treatment heat treatment is performed at a temperature of 1000 °C or higher and 1500 °C or lower to obtain a polycrystalline In-Ga -Zn-based oxide target. Here, X, Y, and Z are arbitrary positive numbers. Here, the predetermined molar ratio is, for example, InO X powder, GaO Y powder, and ZnO Z powders are 2:2: 1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, 1:4:4, or 3:1:2 are. Note that the types of powders and the molar ratio for mixing them may be appropriately changed depending on the target to be produced.

[0168] Note that since alkali metals are not elements constituting the oxide semiconductor, they are impurities. Alkaline earth metals also become impurities when they are not elements constituting the oxide semiconductor. In particular , among alkali metals, Na diffuses into the insulating film when the insulating film in contact with the oxide semiconductor film is an oxide, and becomes Na + . Further, Na breaks or interrupts the bond between the metal and oxygen constituting the oxide semiconductor within the oxide semiconductor film. As a result , for example, abnormal ionization occurs due to a shift in the threshold voltage in the negative direction, and the mobility decreases . As a result, deterioration of the electrical characteristics of the transistor, such as a decrease in mobility, occurs, and in addition, variations in characteristics also occur. Specifically, the measured value of the Na concentration by secondary ion mass spectrometry is 5×10 16 / cm 3 or less , preferably 1×1016 / cm 3 More preferably 1 × 10 15 / cm 3 The following It would be good to do so. Similarly, the measured value of Li concentration is 5 × 10 15 / cm 3 The following is preferably 1×1 0 15 / cm 3 The following is recommended. Similarly, the measured value of the K concentration is 5 × 10 15 / cm 3 Below Below, preferably 1 × 10 15 / cm 3 The following is recommended.

[0169] Furthermore, when metal oxides containing indium are used, the bond energy with oxygen is Larger silicon and carbon atoms than indium break the bond between indium and oxygen, resulting in an oxygen deficiency. This can form. Therefore, if silicon or carbon is mixed into the oxide semiconductor film, Similar to alkali metals and alkaline earth metals, degradation of the transistor's electrical characteristics occurs. It is prone to stiffness. Therefore, it is desirable that the concentrations of silicon and carbon in oxide semiconductor films be low. Specifically, the measured values ​​of C concentration or Si concentration by secondary ion mass spectrometry. is 1 × 10 18 / cm 3 The following is preferable. With the above configuration, the electrical characteristics of the transistor This can prevent degradation of performance and improve the reliability of semiconductor devices.

[0170] Furthermore, depending on the conductive material used for the source electrode and drain electrode, the source electrode and The metal in the drain electrode may extract oxygen from the oxide semiconductor film. In this case, acid In the semiconductor film, the regions in contact with the source electrode and drain electrode are affected by the formation of oxygen vacancies. It will be converted to the n-type.

[0171] Because the n-type region functions as either a source region or a drain region, in oxide semiconductors... This can reduce the contact resistance between the film and the source and drain electrodes. Therefore, the formation of an n-type region increases the transistor's mobility and on-current. This makes it possible to achieve high-speed operation of semiconductor devices using transistors. It is possible.

[0172] Furthermore, the extraction of oxygen by metal in the source electrode and drain electrode is performed by the source electrode and drain electrode. This can occur when forming the rain electrode by sputtering or other methods, and the source electrode and the do This can also occur due to the heat treatment performed after the formation of the rain electrode.

[0173] Furthermore, the n-type region is made of a conductive material that readily bonds with oxygen, and is used as both the source electrode and the drain electrode. Using it makes it easier to form. Examples of the conductive materials mentioned above include Al and C. Examples include r, Cu, Ta, Ti, Mo, and W.

[0174] Furthermore, oxide semiconductor films are not necessarily composed of a single metal oxide film, but rather are stacked It may be composed of multiple metal oxide films. For example, the first to third metal oxide films may be arranged sequentially. In the case of semiconductor films stacked on a substrate, the first metal oxide film and the third metal oxide film are the second The metal oxide film contains at least one of the metal elements that make up the metal oxide film, and the conduction band The edge energy is 0.05 eV or more, 0.07 eV or more, and 0.07 eV or more than the second metal oxide film. 1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less, The first oxide film is below 0.4 eV, close to the vacuum level. Furthermore, the second metal oxide film is small Even if indium is not present, it is preferable because it increases carrier mobility.

[0175] When a transistor has a semiconductor film with the above configuration, applying a voltage to the gate electrode allows the transistor to... When an electric field is applied to a semiconductor film, the second gold layer of the semiconductor film, which has low energy at the lower end of the conduction band, is formed. A channel-forming region is formed in the metal oxide film. That is, the second metal oxide film and the gate insulating film. A third metal oxide film is provided between it and the gate insulating film, thus separating it from the gate insulating film. A channel-forming region can be formed in the second metal oxide film.

[0176] Furthermore, the third metal oxide film is composed of at least one of the metal elements that make up the second metal oxide film. Because it contains as a component, at the interface between the second metal oxide film and the third metal oxide film, Scattering is less likely to occur. Therefore, carrier movement is less likely to be hindered at the interface, The field-effect mobility of the transistor increases.

[0177] Furthermore, when an interface state is formed at the interface between the second metal oxide film and the first metal oxide film, the interface Because a channel formation region is also formed in the neighboring region, the threshold voltage of the transistor fluctuates. However, the first metal oxide film has a small amount of metal elements that make up the second metal oxide film. Since it contains at least one of its components, the boundary between the second metal oxide film and the first metal oxide film Interface states are less likely to form on the surface. Therefore, with the above configuration, the threshold voltage of the transistor Variations in electrical characteristics such as these can be reduced.

[0178] Furthermore, the presence of impurities between the metal oxide films creates a carrier flow at the interface of each film. Multiple oxide semiconductor films are stacked to prevent the formation of interfering interface states. This is desirable. If impurities are present between the stacked metal oxide films, the metal oxide films will The energy continuity at the lower end of the conduction band is lost, and near the interface, carriers are traction This is because they are either removed or eliminated through recombination. By reducing this, multiple metal oxide films having at least one main metal component together are created. Rather than simply stacking layers, continuous bonding (in this case, especially the energy at the lower end of the conduction band between each film) is preferable. This makes it easier for a state with a continuously changing U-shaped well structure to form.

[0179] To form continuous bonds, a multi-chamber deposition apparatus equipped with a load-lock chamber is required. (Using a sputtering device) to continuously stack each film without exposing it to the atmosphere. This is necessary. Each chamber in the sputtering apparatus is impure for oxide semiconductors. To remove as much of the water and other materials as possible, an adsorption-type vacuum pump such as a cryopump is used. Using high vacuum evacuation (5×10 -7 Pa or more, 1×10 -4 (Pa or less) is preferable. Alternatively, a turbomolecular pump and a cold trap can be combined to run air from the exhaust system into the chamber. It is preferable to prevent gas from flowing back into the system.

[0180] To obtain high-purity, intrinsic oxide semiconductors, it is not enough to simply evacuate each chamber to a high vacuum. Furthermore, increasing the purity of the gas used in sputtering is also important. The oxygen gas used as the above gas The dew point of the argon gas is set to -40°C or lower, preferably -80°C or lower, more preferably - By keeping the temperature below 100°C and increasing the purity of the gas used, moisture and other substances are prevented from being absorbed into the oxide semiconductor film. This can prevent it from being incorporated as much as possible. Specifically, the second metal oxide film is In- In the case of M-Zn oxide (where M is Ga, Y, Zr, La, Ce, or Nd), the second metal In a target used to form an oxide film, the atomic ratio of metal elements is In:M: If Zn = x1:y1:z1, then 、 x1 / y1 is between 1 / 3 and 6, and also between 1 and 6. The following conditions apply, and it is preferable that z1 / y1 is between 1 / 3 and 6, and moreover, between 1 and 6. It seems so. Furthermore, by setting z1 / y1 to between 1 and 6, the second metal oxide film is CA AC-OS films are more easily formed. Typical examples of atomic ratios of target metal elements include Examples include In:M:Zn=1:1:1 and In:M:Zn=3:1:2.

[0181] Specifically, the first metal oxide film and the third metal oxide film are In-M-Zn oxide (where M is G In the case of a, Y, Zr, La, Ce, or Nd, the first metal oxide film, the third metal oxide In a target used for forming a metal film, the atomic ratio of metal elements is In:M:Zn Let =x2:y2:z2 、 x2 / y2 <x1 / y1であって、z2 / y2は、1 / 3 It is preferable that z2 / y2 be 6 or less, and more preferably 1 or more and 6 or less. By doing the following, the CAAC-OS film is formed as the first metal oxide film and the third metal oxide film. It becomes easier to form. A typical example of the atomic ratio of the target metal elements is In:M:Z n=1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, In:M Examples include Zn=1:3:8.

[0182] The thickness of the first metal oxide film and the third metal oxide film is between 3 nm and 100 nm. Preferably, the thickness of the second metal oxide film is 3nm or more and 50nm or less. m or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably The range is between 3nm and 50nm.

[0183] In a three-layer semiconductor film, the first to third metal oxide films are amorphous. It can take both crystalline and non-crystalline forms. However, the second metal in which the channel-forming region is formed The crystalline nature of the oxide film provides stable electrical characteristics to the transistor. Therefore, it is preferable that the second metal oxide film be crystalline.

[0184] The channel formation region is the part of the transistor's semiconductor film that overlaps with the gate electrode. This refers to the region sandwiched between the source electrode and the drain electrode. The channel region is also defined as the channel region. This refers to the region within the Nell formation area where electric current primarily flows.

[0185] For example, the first metal oxide film and the third metal oxide film are shaped by the sputtering method. When using the resulting In-Ga-Zn oxide film, the first metal oxide film and the third metal acid For the deposition of oxide films, In-Ga-Zn oxides (In:Ga:Zn=1:3:2 [number of atoms]) are used. A target with a ratio of [ ] can be used. The film deposition conditions are, for example, using as the deposition gas. Using 30 sccm of argon gas and 15 sccm of oxygen gas, at a pressure of 0.4 Pa, the substrate temperature was... The temperature should be set to 200°C and the DC power to 0.5kW.

[0186] Furthermore, when the second metal oxide film is a CAAC-OS film, the deposition of the second metal oxide film is required. It is an In-Ga-Zn oxide (In:Ga:Zn = 1:1:1 [atomic ratio]), It is preferable to use a target containing a polycrystalline In-Ga-Zn oxide. Film deposition conditions For example, 30 sccm of argon gas and 15 sccm of oxygen gas are used as the film-forming gas. The pressure can be set to 0.4 Pa, the substrate temperature to 300°C, and the DC power to 0.5 kW. Cut.

[0187] Furthermore, the transistor may have a structure in which the edges of the semiconductor film are sloped, The body membrane may have a structure in which the ends are rounded.

[0188] Furthermore, when using a semiconductor film having multiple stacked metal oxide films in a transistor, Even if the source electrode and drain electrode are in contact with each other, the regions in contact with each other may be n-type. This improves the mobility and on-current of transistors, and enables the creation of semiconductor devices using transistors. This enables high-speed operation. Furthermore, a semiconductor having multiple stacked metal oxide films When a conductive film is used in a transistor, the region that becomes n-type is the second channel formation region. The fact that it reaches the metal oxide film increases the mobility and on-current of the transistor, and semicircular This is more preferable for achieving even faster operation of the conductor device.

[0189] This embodiment can be implemented in appropriate combination with other embodiments.

[0190] (Embodiment 5) Figure 14 is an example of a perspective view of a light-emitting device according to one aspect of the present invention.

[0191] The light-emitting device shown in Figure 14 consists of a panel 1601, a controller, a power supply circuit, an image processing circuit, The device has a circuit board 1602 on which image memory, a CPU, etc., and a connection section 1603. Panel 1601 has a pixel section 1604 with multiple pixels, and multiple pixels arranged in rows. Select scan line drive circuit 1605 and signal Sig1 or signal to the pixels in the selected row It includes a signal line drive circuit 1606 that controls the input of Sig2.

[0192] From the circuit board 1602, various signals and the power supply potential are transmitted via the connection part 1603 to the panel. Input is sent to 1601. Connection part 1603 is FPC (Flexible Printer). d Circuit) etc. can be used. Also, COF tape can be used on connection part 1603. When using this method, some circuits within the circuit board 1602, or the scan lines of the panel 1601 The drive circuit 1605 and part of the signal line drive circuit 1606 are formed on a separately prepared chip. Next, the chip is connected to the COF tape using the COF (Chip On Film) method. You can do that.

[0193] This embodiment can be implemented in appropriate combination with other embodiments.

[0194] (Embodiment 6) A light-emitting device according to one aspect of the present invention is a display device, a notebook personal computer, and a recording medium Image playback device equipped with a body (typically DVD: Digital Versatile DVD) (Used in a device that plays back recording media such as ISC and has a display capable of displaying the images.) In addition, electronic devices that can use the light-emitting device according to one aspect of the present invention As devices, mobile phones, portable game consoles, personal digital assistants, e-readers, video cameras, etc. Digital still cameras and other cameras, goggle-type displays (head-mounted displays) i) Navigation systems, sound playback devices (car audio, digital audio players) Layers, etc.), photocopiers, fax machines, printers, multifunction printers, ATMs Examples include ATMs and vending machines. Specific examples of these electronic devices are shown in Figure 15. show.

[0195] Figure 15(A) shows a display device, which includes a housing 5001, a display unit 5002, a support base 5003, etc. The light-emitting device according to one aspect of the present invention can be used in the display unit 5002. Display devices include all types of information, such as those for personal computers, TV broadcast reception, and advertising displays. It includes a display device for information display.

[0196] Figure 15(B) shows a portable information terminal, consisting of a housing 5101, a display unit 5102, and operation keys 5103. The present invention has the following features. A light-emitting device according to one aspect of the present invention can be used in the display unit 5102.

[0197] Figure 15(C) shows a display device, which has a curved housing 5701, a display unit 5702, etc. By using a flexible substrate in a light-emitting device according to one aspect of the present invention, a curved housing can be used. The light-emitting device can be used in the display unit 5702 supported by the body 5701, and flex We can provide a lightweight, user-friendly display device.

[0198] Figure 15(D) shows a portable game console, consisting of a casing 5301, casing 5302, display unit 5303, Display unit 5304, microphone 5305, speaker 5306, operation keys 5307, stand It has illustration 5308, etc. A light-emitting device according to one aspect of the present invention has a display unit 5303 or a display unit 5303 or It can be used in the display unit 5304. The present invention can be used in the display unit 5303 or the display unit 5304. By using the light-emitting device described in this embodiment, the user experience is superior and quality degradation is less likely to occur. A portable game console can be provided. Note that the portable game console shown in Figure 15(D) is... It has two display units 5303 and 5304, but a portable game console has The number of display units is not limited to this.

[0199] Figure 15(E) shows an e-book reader, which has a housing 5601, a display unit 5602, etc. This invention... A light-emitting device according to one embodiment can be used in the display unit 5602. And, having flexibility By using such a substrate, the light-emitting device can be made flexible. Furthermore, it allows us to provide a lightweight and user-friendly e-reader.

[0200] Figure 15(F) shows a mobile phone, with a housing 5901 containing a display unit 5902, a microphone 5907, and a microphone. The speaker 5904, camera 5903, external connection unit 5906, and operation buttons 5905 are provided. It is provided. A light-emitting device according to one aspect of the present invention can be used in the display unit 5902. Furthermore, when a light-emitting device according to one aspect of the present invention is formed on a flexible substrate, Figure 15( The light-emitting device can be applied to a display unit 5902 having a curved surface as shown in F). ru.

[0201] This embodiment can be implemented in appropriate combination with other embodiments.

[0202] (Embodiment 7) In this embodiment, the transistors M1 to M3 shown in Embodiment 1 and Embodiment 2 are used An example of a transistor that can function in this way will be explained using Figure 16.

[0203] Figure 16(A) is a top view of transistor 300, and Figure 16(B) is a top view of Figure 16(A). This is a cross-sectional view between the dashed line X1-X2, and Figure 16(C) is a cross-sectional view of the dashed line Y1-Y in Figure 16(A). This is a cross-sectional view between the two. Also, Figure 16(B) is a cross-section of transistor 300 in the channel length direction. This is a top view, and Figure 16(C) is a cross-sectional view of transistor 300 in the channel width direction. Oh, in Figure 16(A), some of the components are omitted for clarity.

[0204] The transistor 300 has a conductive film 361 formed on the substrate 362, and the substrate 362 and conductive An insulating film 364 on film 361, an oxide semiconductor film 366 on insulating film 364, and an oxide semiconductor The conductive film 370a, conductive film 370b, and insulating film 372 are in contact with film 366, and the insulating film 372 It has a conductive film 374 that overlaps with the oxide semiconductor film 366 via a barrier. An insulating film 376 is provided on the surface.

[0205] In transistor 300, the conductive film 374 functions as the first gate electrode. The film 361 functions as a second gate electrode. The insulating film 372 functions as a first gate electrode. The insulating film 364 functions as a gate insulating film, and the insulating film 364 functions as a second gate insulating film. .

[0206] In transistor 300, the conductive film 370a is used as either the source electrode or the drain electrode. The conductive film 370b has the function of being the other of the source electrode and drain electrode. do.

[0207] As shown in Figure 16(C), the conductive film 374 is provided on the insulating film 372 and the insulating film 364. It is connected to the conductive film 361 through the opening 389. Transistor 300 is the first Since the same potential is applied to the gate electrode and the second gate electrode, the on-current increases, and the initial characteristics increase. Reduction of variability, -GBT (minus Gate Bias Temperature) e) Suppression of stress test degradation and on-current rise at different drain voltages Voltage fluctuations can be suppressed.

[0208] Furthermore, transistor 300 does not connect conductive film 374 and conductive film 361, and each is different A potential may be applied. In this way, the threshold voltage of transistor 300 It can be controlled. Note that the conductive film 361 may be omitted depending on the circumstances.

[0209] In the oxide semiconductor film 366, conductive film 370a, conductive film 370b and conductive film 374 overlap The region that does not contain oxygen vacancies contains elements that form oxygen vacancies. Below, the elements that form oxygen vacancies are These are explained as impurity elements. Typical examples of impurity elements include hydrogen and noble gas elements. Representative examples of noble gas elements include helium, neon, argon, krypton, and xenon. Furthermore, it contains boron, carbon, nitrogen, fluorine, aluminum, and silicon as impurity elements. Phosphorus, chlorine, etc., may be included in the oxide semiconductor film 366.

[0210] Furthermore, insulating film 376 is a film containing hydrogen, and a typical example is a nitride insulating film. When 6 comes into contact with the oxide semiconductor film 366, the hydrogen contained in the insulating film 376 comes into contact with the oxide semiconductor It diffuses into film 366. As a result, in the region where the oxide semiconductor film 366 is in contact with the insulating film 376 It contains a lot of hydrogen.

[0211] When noble gas elements are added to an oxide semiconductor film as impurity elements, the gold in the oxide semiconductor film The bonds between the group element and oxygen are broken, and an oxygen vacancy is formed. The interaction between elementary defects and hydrogen causes oxide semiconductor films to have high conductivity. Specifically, oxidation When hydrogen enters an oxygen vacancy in a semiconductor film, a carrier (electron) is generated. As a result, the conductivity increases.

[0212] Examples of substrates applicable to substrate 362 include glass substrates, quartz substrates, and plastic substrates. Plates, metal substrates, stainless steel substrates, substrates having stainless steel foil, Tungsten substrate, substrate with tungsten foil, flexible substrate, laminated film Examples include paper containing fibrous materials, or substrate films. As an example of a glass substrate... These are barium borosilicate glass, aluminoborosilicate glass, or soda-lime glass. Examples of flexible substrates include polyethylene terephthalate (PET) and polyethylene. Positive compounds such as ethylene naphthalate (PEN) and polyethersulfone (PES) Examples include flexible synthetic resins such as plastic or acrylic. The laminated film is made of Fill made of polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, etc. It is also possible to use a substrate film such as an inorganic vapor-deposited film. An example of a substrate film is: Polyester, polyamide, polyimide, aramid, epoxy, inorganic vapor-deposited film, or There are paper products, etc.

[0213] Furthermore, the substrate 362 is not merely a support, but also contains other elements such as transistors and capacitors. It may be a substrate on which a surface is formed.

[0214] The materials used for conductive films 361 and 374 include aluminum, chromium, copper, and tan. Metal elements selected from tul, titanium, molybdenum, and tungsten, or the aforementioned metal elements It can be formed using an alloy with the element as its component, or an alloy combining the aforementioned metal elements. Yes, it is possible. Furthermore, the materials used for conductive films 361 and 374 can be single-layer or two-layer or more. A laminated structure may also be used. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, or a nitrogen film. A two-layer structure in which a titanium film is laminated on a titanium nitride film, and a tungsten film is laminated on a titanium nitride film. A two-layer structure, where a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film. Layered structure, titanium film, aluminum film laminated on top of the titanium film, and then titanium on top of that. There are three-layer structures that form a film, etc. Also, aluminum is combined with titanium, tantalum, and tungsten. A combination of one or more selected from chromium, molybdenum, neodymium, and scandium. A composite alloy film or nitride film may be used. Also, conductive films 361 and 374 may be used For example, the material can be formed using the sputtering method.

[0215] Furthermore, the conductive films that can be used for conductive films 361 and 374 include indium You can use an oxide containing tungsten oxide. For example, indium oxide containing tungsten oxide, oxide Indium zinc oxide containing tungsten, indium oxide containing titanium oxide, titanium oxide Indium tin oxide containing tan, indium tin oxide (hereinafter referred to as ITO), indium Translucent conductive materials such as zinc oxide and indium tin oxide with added silicon dioxide. Materials can be used.

[0216] Materials that can be used for conductive films 370a and 370b include aluminum, Titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum A single metal consisting of tungsten or an alloy with tungsten as the main component, in a single-layer structure. It can also be used as a laminated structure. In particular, aluminum, chromium, copper, tantalum Preferably, it contains one or more elements selected from titanium, molybdenum, and tungsten. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, or a titanium film on a tungsten film. A two-layer structure with stacked films, a two-layer structure with a copper film stacked on top of a copper-magnesium-aluminum alloy film. The structure consists of a titanium film or titanium nitride film, and an aluminum layer superimposed on the titanium film or titanium nitride film. A titanium film or copper film is laminated, and then a titanium film or titanium nitride film is formed on top of it. Three-layer structure, molybdenum film or molybdenum nitride film, and the molybdenum film or molybdenum nitride An aluminum film or copper film is laminated on top of the molybdenum film, and then a molybdenum film is placed on top of that. It has a three-layer structure that forms a molybdenum nitride film, etc. Furthermore, indium oxide, tin oxide or A transparent conductive material containing zinc oxide may be used. Furthermore, the conductive film may be formed by, for example, sputtering. It can be formed using the law.

[0217] For details of the oxide semiconductor film 366, please refer to the description of the oxide semiconductor film 82 in Figure 13.

[0218] The insulating film 364 can be formed by a single layer or a stack of oxide insulating films or nitride insulating films. Furthermore, in order to improve the interfacial properties with the oxide semiconductor film 366, the insulating film 364 is It is preferable that at least the region in contact with the oxide semiconductor film 366 be formed of an oxide insulating film. Furthermore, by using an oxide insulating film that releases oxygen upon heating as the insulating film 364, Heat treatment can move oxygen contained in the insulating film 364 to the oxide semiconductor film 366. It is possible.

[0219] The thickness of insulating film 364 is 50 nm or more, or 100 nm to 3000 nm, or 20 It can be between 0 nm and 1000 nm. By increasing the thickness of the insulating film 364, insulation is achieved. This can increase the amount of oxygen released from the film 364, and also improve the relationship between the insulating film 364 and the oxide semiconductor film. The interface states at the interface with 366, and the channel formation region of the oxide semiconductor film 366 are included. It is possible to reduce the oxygen deficiency that occurs.

[0220] Examples of insulating film 364 include silicon oxide, silicon oxide nitride, silicon nitride oxide, and silicon nitride You can use silicon, aluminum oxide, hafnium oxide, or gallium oxide, etc. They can be provided in layers or stacks.

[0221] The insulating film 372 can be formed by a single layer or a stack of oxide insulating films or nitride insulating films. Furthermore, in order to improve the interfacial properties with the oxide semiconductor film 366, the insulating film 372 is It is preferable to form at least the region in contact with the oxide semiconductor film 366 using an oxide insulating film. It seems so. As insulating film 372, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride If you use silicon nitride, aluminum oxide, hafnium oxide, or gallium oxide, They can often be constructed in a single layer or in multiple layers.

[0222] Furthermore, the insulating film 372 is provided as an insulating film having a blocking effect against oxygen, hydrogen, water, etc. This allows for the diffusion of oxygen from the oxide semiconductor film 366 to the outside, and from the outside the oxide semiconductor film It can prevent hydrogen, water, etc. from entering 366. Blocking effect of oxygen, hydrogen, water, etc. Examples of insulating films include aluminum oxide, aluminum oxide nitride, gallium oxide, and acid Gallium nitride, yttrium oxide, yttrium oxide nitride, hafnium oxide, oxide nitride Examples include hafnium.

[0223] Furthermore, as the insulating film 372, hafnium silicate (HfSiO x ), nitrogen added Hafnium silicate (HfSi x O y N z ), nitrogen-added hafnium aluminium (HfAl) x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this method, gate leakage in transistors can be reduced.

[0224] Furthermore, by using an oxide insulating film that releases oxygen upon heating as the insulating film 372, Heat treatment can move oxygen contained in the insulating film 372 to the oxide semiconductor film 366. It is possible.

[0225] The thickness of the insulating film 372 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less, This can be between 10 nm and 250 nm.

[0226] This embodiment can be implemented in appropriate combination with other embodiments. [Explanation of Symbols]

[0227] C1 Capacitive element M1 Transistor M2 Transistor M3 Transistor p0 period p1 Period p2 Period S1 signal Sig0 signal Sig1 signal Sig2 signal SL1 Wiring SL2 Wiring 70 transistors 80 Conductive film 81 Insulating Film 82 Oxide semiconductor film 82a Oxide semiconductor film 82b Oxide semiconductor film 82c oxide semiconductor film 83 Conductive film 84 Conductive film 85 Insulating film 86 Insulating film 87 Insulating Film 100 Light-emitting devices 101 pixels 101a pixels 101b pixels 102 pixel section 103 Panels 104 Controller 105 Power supply circuit 120 Input devices 121 CPU 122 Image Processing Circuit 123 Image memory 124 Signal Line Drive Circuit 125 Scan line drive circuit 126 Image Data 300 transistors 361 Conductive film 362 circuit boards 364 Insulating Film 366 oxide semiconductor film 370a conductive film 370b Conductive film 372 Insulating film 374 Conductive film 376 Insulating Film 389 Aperture 400 circuit boards 401 Conductive film 402 Insulating film 403 Semiconductor film 404 Conductive film 405 Conductive film 411 Insulating film 420 Insulating film 424 Conductive film 425 Insulating film 426 Insulating film 427 EL layer 428 Conductive film 430 circuit boards 431 Shielding membrane 432 Colored layer 501 Conductive film 502 Conductive film 503 Conductive film 504 Conductive film 505 Conductive film 506 Conductive film 507 Conductive film 508 Conductive film 511 Semiconductor film 512 Semiconductor film 513 Semiconductor film 514 Semiconductor film 515 Semiconductor film 516 Semiconductor film 521 Conductive film 522 Conductive film 523 Conductive film 524 Conductive film 525 Conductive film 526 Conductive film 527 Conductive film 528 Conductive film 529 Conductive film 530 Conductive film 531 Conductive film 1601 Panel 1602 Circuit board 1603 Connection part 1604 pixel section 1605 Scan Line Drive Circuit 1606 Signal Line Drive Circuit 5001 enclosure 5002 Display section 5003 Support stand 5101 enclosure 5102 Display section 5103 Operation Keys 5301 enclosure 5302 enclosure 5303 Display section 5304 Display section 5305 Microphone 5306 Speaker 5307 Operation Keys 5308 Stylus 5601 enclosure 5602 Display section 5701 enclosure 5702 Display section 5901 enclosure 5902 Display section 5903 Camera 5904 Speaker 5905 button 5906 External connection section 5907 Mike

Claims

1. A device comprising: a light-emitting element, a capacitive element, a first transistor, a second transistor, a third transistor, a signal line to which a signal having image information is supplied, a power line, a first wiring, a first conductive film, a second conductive film, and a third conductive film, Either the source or the drain of the first transistor is electrically connected to the signal line. The source or drain of the first transistor is electrically connected to the capacitive element. Either the source or the drain of the second transistor is electrically connected to the first wiring. The source or drain of the second transistor, the other of which is electrically connected to the capacitive element, The source or drain of the second transistor, the other of which is electrically connected to the gate of the third transistor, The capacitive element has the function of maintaining the gate potential of the third transistor. A signal corresponding to the image information is applied to the gate of the third transistor. Either the source or the drain of the third transistor is electrically connected to the power line. When the power line is connected to the light-emitting element via the source and drain of the third transistor, a current corresponding to the image information is supplied to the light-emitting element. The first conductive film functions as the gate of the first transistor. The second conductive film functions as the gate of the second transistor. In a plan view, the channel length direction of the first transistor is along the first direction, In a plan view, the channel length direction of the third transistor is aligned with the first direction. In a plan view, the signal line has a region extending in the first direction, In a plan view, the first wiring has a region extending in the first direction, In a plan view, the power line has a region that intersects with the signal line and a region that intersects with the first wiring. The third conductive film functions as the gate of the third transistor and as one electrode of the capacitive element. The first conductive film has a region in contact with the insulating surface, The second conductive film has a region in contact with the insulating surface, The semiconductor device comprises a third conductive film having a region in contact with the insulating surface.

2. In Claim 1, When the first transistor is turned on, the second transistor is turned off. A semiconductor device in which the first transistor turns off when the second transistor is turned on.

3. In claim 1 or 2, A semiconductor device to which a signal without image information is supplied to the first wiring.

4. In any one of claims 1 to 3, A semiconductor device in which the gate potential of the third transistor is initialized when the second transistor is turned on.

Images