Optoelectronic structural elements, pixels, display arrangement structures, and methods related thereto

Abstract

To provide a display arrangement structure body in which an optical cross talk is reduced.SOLUTION: The present invention provides a photoelectron structure element 10 having at least one semiconductor element 12 having an active zone formed so as to generate a light. A structure element is arranged onto a first main front surface 14 of at least the semiconductor element, and contains: a dielectric filter 18 that is formed so as to only penetrate a light to a predetermined direction; and a reflection material 19 that is arranged to at least one side surface 16 of at least one semiconductor element and at least one side surface of the dielectric filter.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This patent application claims priority to German Patent Application Publication No. 102019112604.5 dated 14 May 2019, priority to German Patent Application Publication No. 102019113792.6 dated 23 May 2019, priority to German Patent Application Publication No. 102019129209.3 dated 29 October 2019, priority to German Patent Application Publication No. 102019131506.9 dated 21 November 2019, and priority to International Application PCT / EP2020 / 052191 dated 29 January 2020, the disclosures of which are incorporated herein by reference.

[0002] The present invention relates to a photoelectronic structure element and a pixel equipped with a photoelectronic structure element. The present invention further relates to a display arrangement structure and a method for manufacturing the same.

[0003] Background technology In many applications, such as displays, optoelectronic structures are assembled monolithically. Therefore, instead of individual structures being placed on a board or backplane, the optoelectronic structures are integrated into the substrate, allowing for individual drive and control of these elements. This not only enables miniaturization but also reduces the need for transfer and soldering processes. Furthermore, such monolithic modules can be easily scaled in terms of both the size of individual structures and the size of the module. The structures can be arranged in a freely defined matrix. This scaling effect is particularly effective in mass production.

[0004] Different applications require different radiation patterns. In some applications, optoelectronic structures should have a Lambert radiation pattern, while in others, it is desirable for the radiation to be as directional as possible.

[0005] In a monolithic design, on the one hand, the drive control electronic circuit (Ansteuerelektronik) can be integrated into the substrate on which the optoelectronic structural elements are manufactured. On the other hand, the circuit and optoelectronic structural elements can be manufactured separately and then combined. In this case, ensuring the correct spatial relationship is crucial.

[0006] This application deals in particular with several embodiments of monolithic displays relating to redundancy, radiation patterns, and drive control in the event of failure of optoelectronic structural elements.

[0007] Summary of the Invention One embodiment relates to improving the radiation pattern of an LED with a dielectric filter that has an added reflective surface. A photoelectronic device, in particular an LED, according to a first embodiment of the present disclosure includes at least one semiconductor device, one dielectric filter, and one reflective material.

[0008] At least one semiconductor element includes an active zone formed to generate light. In particular, this may be configured as a vertical or horizontal LED. Measures can be taken to increase the efficiency of the structural element. Furthermore, at least one semiconductor element has a first main surface, a second main surface opposite the first main surface, and sides extending between the two main surfaces. For example, at least one semiconductor element may have three or four or more sides. However, it is also conceivable that at least one semiconductor element has a circular main surface and therefore has only one embodiment.

[0009] The dielectric filter is placed on the first main surface of at least one semiconductor element and is configured to transmit or pass through only light incident on the dielectric filter in a predetermined direction.

[0010] For example, a dielectric filter may be configured to transmit light only at a predetermined cone angle (Winkelkegel). The cone angle is oriented such that its axis is perpendicular to the first principal surface of at least one semiconductor element. The angle between the outer surface or matrix of the cone and the axis of the cone, i.e., half of the cone's aperture angle, may have a predetermined value. For example, half of the cone's aperture angle can be at most 5°, at most 15°, at most 30°, or at most 60°. Light components incident from the semiconductor element to the dielectric filter at an angle within the predetermined cone angle range are transmitted, while the remaining light components are substantially not transmitted and are reflected back, for example, to the semiconductor element. This enables high directivity of the light emitted from the optoelectronic device.

[0011] The dielectric filter may be configured to have an aperture angle with a very small cone angle, so that only light emitting from the semiconductor element perpendicular to the first main surface is transmitted through the dielectric filter.

[0012] In one embodiment, the dielectric filter may be composed of a stack of dielectric layers, which are applied to a semiconductor device by coating and have particularly high transmittance. For example, the dielectric layers in the stack may alternate between low and high refractive indices. As the material for the high refractive index dielectric layer, for example, Nb2O5, TiO2, ZrO2, HfO2, Al2O3, Ta2O5, or ZnO can be used. As the low refractive index dielectric layer, for example, SiO2, SiN, SiON, or MgF2 can be used. The stack of dielectric layers having alternating high and low refractive indices may be configured as a Bragg filter. Furthermore, the dielectric filter may be a photonic crystal.

[0013] On at least one side of at least one semiconductor element and one or more dielectric filters, a reflective material is deposited. The reflective material may be provided to cover at least one or all sides of at least one semiconductor element. Similarly, the reflective material may cover at least one or all sides of the dielectric filter. In one configuration, the reflective material completely surrounds both the at least one semiconductor element and the dielectric filter laterally.

[0014] The reflective material may be reflective to light emitted from at least one semiconductor element or at least a part of the wavelength range of this light. As a result, the light emitted through the side of at least one semiconductor element or the dielectric filter is reflected back, improving the efficiency of the optoelectronic structure element.

[0015] A plurality of structural elements may be proposed. These also have one or more monolithically assembled semiconductor elements each having the above-described characteristics. A dielectric filter is disposed on each semiconductor element. Further, the semiconductor element is surrounded by a reflective material. Additionally or alternatively, a plurality of structural elements including semiconductor elements may be surrounded by such mirrors. For example, in such a configuration, redundancy can be provided so that even if one semiconductor element fails, a redundant semiconductor element can take over its function. For example, the semiconductor elements may be arranged in an array, that is, in a regular arrangement structure of a monolithic display.

[0016] The optoelectronic structure element may be incorporated in a display, that is, a display device. Each of the semiconductor elements can represent or constitute one pixel of the display. Further, each of the semiconductor elements can represent a sub-pixel of the pixel, and each pixel is formed from, for example, a plurality of sub-pixels that emit light having red, green, and blue.

[0017] High contrast can be achieved between adjacent pixels by reflective material that laterally surrounds each semiconductor element and its respective dielectric filter. Furthermore, high pixel density is also possible. In one configuration, the semiconductor elements are configured as LEDs. LEDs have a small lateral spread of the light-emitting surface, especially in the range of 140 μm to 750 μm. Unlike individual LEDs, the elements in a monolithic array structure each form a self-contained unit. The light emitted by the semiconductor elements can be, for example, visible light, ultraviolet (UV) light, and / or infrared (IR) light.

[0018] In addition to displays, the optoelectronic structural elements according to the first aspect of this application can also be used, for example, in AR (augmented reality) applications and other applications of pixelated arrays or pixelated light sources.

[0019] In one configuration, at least one or all sides of at least one semiconductor element extend inclined at the height of the active zone. That is, at least a portion of each side forms an angle with the first main surface of at least one semiconductor element, and this angle is not 90°, but in particular less than 90°. At least one semiconductor element may be chamfered over its entire height or only partially, but in either case, the active zone is preferably in the chamfered region. The fully or partially chamfered sides may form an interface with a low refractive index insulating layer. Light emitted horizontally is reflected toward the surface of the component by the chamfered sides.

[0020] At least one semiconductor element may have a first electrical terminal and a second electrical terminal. For example, one terminal may represent the cathode and the other terminal may represent the anode. Furthermore, the reflective material may be conductive and electrically coupled to the first terminal of at least one semiconductor element. In particular, the first terminal may be connected to an n-type doped region of at least one semiconductor element. As a result, the reflective material provides optical separation between adjacent pixels while simultaneously providing electrical contact to at least one semiconductor element.

[0021] When multiple optoelectronic structures comprising numerous semiconductor elements are proposed, the reflective and conductive materials surrounding each semiconductor element may be interconnected, thereby enabling the first terminals of the semiconductor elements to be controlled collectively from the outside. In this case, the second contacts of the semiconductor elements may be individually driveable and controllable, for example, via the underside of the semiconductor element. This configuration is advantageous from a manufacturing perspective because only one contact needs to be defined with good resolution, and it facilitates the manufacture of very small pixels where there would be insufficient area if two mutually isolated contacts were provided on the underside of the chip. The reflective material may be, for example, a metal, contain a metal, or be electrodeposited.

[0022] The reflective layer may be located beneath the second main surface of at least one semiconductor element. This allows light that passes through the second main surface to be reflected back to the semiconductor element and completely exit the photoelectronic structure through the top surface. Furthermore, the reflective layer may be conductive and electrically coupled to the second terminal of at least one semiconductor element. For example, the second terminal may be connected to a p-type doped region of at least one semiconductor element. As a result, in addition to its reflective properties, the reflective layer also plays a role in establishing an electrical contact with at least one semiconductor element. It may also be proposed to allow individual drive control of the second terminal of each semiconductor element.

[0023] The reflective layer may be made of the same material as the reflective material, but it does not have to be. For example, a metal can be used for the reflective layer.

[0024] Alternatively, the reflective layer may be electrically insulated, and one or more conductive layers may be placed above and / or below the reflective layer, particularly coupled to the second contact of at least one semiconductor element. In this case, the reflective layer may be, for example, a dielectric mirror, and may be placed on a metal layer. The electrical contact connection is then made through a feedthrough penetrating the dielectric layer or through the sides of the dielectric layer. Furthermore, a conductive and transparent layer may be placed above the reflective layer, i.e., between at least one semiconductor element and the reflective layer. As the material for the conductive and transparent layer, for example, indium tin oxide (ITO) can be used.

[0025] In one configuration, for example, a silver mirror is placed beneath a conductive and transparent layer of indium tin oxide and a dielectric mirror. Alternatively, only a conductive and transparent layer of indium tin oxide and a silver mirror may be placed beneath at least one semiconductor element.

[0026] A first electrically insulating material may be placed between the reflective material and the reflective layer. Furthermore, the first electrically insulating material may be in direct contact with one or more sides of at least one semiconductor element, particularly with the chamfered portion of the side. Furthermore, the first electrically insulating material may have a lower refractive index than at least one semiconductor element, particularly in the region of the interface with the first electrically insulating material. As a result, the first electrically insulating material causes electrical insulation between the first terminal and the second terminal of at least one semiconductor element. Furthermore, due to the refractive index contrast, light can be reflected back at the interface between at least one semiconductor element and the first electrically insulating material.

[0027] The first electrically insulating material is, for example, SiO2 and may be deposited by vapor deposition using, for example, TEOS (tetraethyl orthosilicate) or another method based on, for example, silane, so as to satisfy a high aspect ratio.

[0028] A layer having a roughened surface configured to change the direction of light to other spatial directions or to scatter light may be placed between at least one semiconductor element and a dielectric filter, i.e., on the first main surface of at least one semiconductor element. This layer may have a Lambert radiation pattern. Furthermore, the layer may be formed so that light components at angles exceeding the critical angle of total internal reflection are redirected, so in principle all components can be extracted and not remain "confined" within the component.

[0029] The aforementioned layers may consist, for example, of a randomly or deterministically patterned semiconductor surface. The surface may have a roughened structure with inclined flanks, the height of which may be up to several hundred nanometers. The roughened structure can be created, for example, by etching.

[0030] Furthermore, it is also possible to roughen the first main surface of at least one semiconductor device without using the aforementioned layers. For this purpose, for example, a random or deterministic topology can be etched onto the first main surface, particularly to realize a Lambert radiation pattern. The roughened first main surface of at least one semiconductor device can have the same properties as the roughened surface of the aforementioned layers.

[0031] A further layer, for example made of SiO2, having a refractive index different from that of the underlying layer and having a flat top surface, may be deposited on the roughened surface of at least one semiconductor element or a layer disposed on such semiconductor element. This additional layer can be used as a dielectric filter by its flat top surface, while simultaneously maintaining the functionality of the roughened surface of the underlying layer due to the refractive index difference.

[0032] By having a lateral spread of pixels in the range of, for example, 140 μm to 750 μm, it is possible to reduce the height of at least one semiconductor element by a range of several μm. In particular, at least one semiconductor element can have a height in the range of 3 μm to 30 μm.

[0033] As described above, the device may include a plurality of optoelectronic structural elements that may have the configurations described in this application. Each semiconductor element of the structural element may be completely surrounded laterally by a reflective material, together with an associated dielectric filter and a reflective layer disposed beneath each semiconductor element. In one configuration, the semiconductor elements are arranged in an array, and adjacent semiconductor elements are separated from each other by the reflective material. As a result, the reflective material forms a lattice, and adjacent semiconductor elements are separated from each other only by the lattice.

[0034] If the reflective material is also conductive, the first terminals of all semiconductor elements may be connected to a common external terminal via the reflective material. The second terminals of the semiconductor elements may be individually driveable and controllable.

[0035] In the alternative configuration, multiple semiconductor elements, each laterally surrounded by a reflective material, are arranged side by side, with a second electrically insulating material placed between adjacent semiconductor elements. For example, the second electrically insulating material may be a potting material.

[0036] In this configuration, the reflective material may be conductive. To connect the first terminal of the semiconductor element to a common external terminal, a conductive track connecting the first terminal of the semiconductor element to the common external terminal may extend above and / or below and / or inside the electrically insulating second material. The second terminal of the semiconductor element may be individually driveable and controllable.

[0037] For drive control, an additional substrate may be prepared, and contacts may be arranged on the substrate to connect the terminals of semiconductor structural elements.

[0038] A method according to a second aspect of this application is used for manufacturing a photoelectronic structure element. The method includes providing at least one semiconductor element having an active zone configured to generate light, and placing a dielectric filter on a first main surface of the at least one semiconductor element. The dielectric filter is configured to transmit only light in a predetermined direction. Furthermore, a reflective material is placed or deposited on at least one side surface of the at least one semiconductor element and at least one side surface of the dielectric filter.

[0039] A method for manufacturing an optoelectronic device according to a second aspect of this application may have the above-described configuration of the optoelectronic structural element according to these aspects of this application.

[0040] The following sections will examine in detail aspects of processes and methods for manufacturing LEDs, displays, or modules. As already explained, these processes include the processing of semiconductor structures or materials, and vice versa. In this regard, the following points can be easily combined with those discussed previously.

[0041] Due to the manufacturing process and the extremely small dimensions of individual optical elements, individual pixel elements can become defective among the many pixels in a display. This problem has a greater impact in monolithic display modules because manufacturing defects and variations are difficult to repair or correct because they are integrated. In particular, with monolithic displays, it is not possible to replace each defective pixel individually, so if the defect density becomes high, the entire module must be replaced.

[0042] For example, known solutions attempt to compensate for the missing light from a defective pixel by setting the brightness of surrounding or adjacent pixels to a higher level. In many cases, replacing or repairing these defective pixels does not seem economically or process-wise worthwhile, so it is desirable that the manufactured display can be used with sufficient quality even if there are individual defective pixels.

[0043] The following embodiments of a pixel element having electrically isolated and optically coupled subpixels can compensate for such small defects, thereby improving yield while maintaining the quality of the display or display module. It should be noted here that the concept presented here can also be applied to the aforementioned structural elements, in that the material attached to the sides plays a role in optical and electrical isolation, as will be discussed later.

[0044] These embodiments take into consideration the use of measures suitable for preventing optical crosstalk. Therefore, in this respect, the means proposed below are not only suitable for the above-mentioned problems, but the reduction of optical crosstalk has further advantages, especially in monolithic structures where optically active regions are very close to each other and good optical separation needs to be achieved. In the case of very densely arranged monolithic arrays or displays or display modules, clean optical separation between pixels is necessary so that the light emitted from optically active elements, i.e., LEDs, does not radiate into the region of adjacent pixels. To reduce optical crosstalk, trenches (more generally, optically separating structures) are often provided between two LEDs. On the one hand, it is necessary to suppress optical crosstalk in order to achieve sufficiently good high-contrast image quality, but this can sometimes make pixel failures very noticeable.

[0045] Therefore, an optical pixel element for generating display pixels, formed by at least two subpixels, is proposed. In one embodiment, a single pixel element is provided with 2, 4, 6, 9, 12, or 16 subpixels. In other words, here, two subpixels receive the same drive control information and are implemented to match the same wavelength, for example, providing redundancy. Therefore, even if one of these at least two subpixels fails, the pixel element can still emit light of that wavelength. In one embodiment, the amount of light deficiency from the failed subpixel can be compensated for by adjusting the brightness of the subpixel. In one embodiment, the subpixels are implemented as so-called fields. For example, if the pixel element is implemented in a rectangular structure, the subpixels within the structure of the pixel element are formed by dividing it again into fields. Each of these subpixels can be driven and controlled independently of the subpixels in other fields.

[0046] Each subpixel has an optical emitter region. This is intended to allow each subpixel to be individually driveable and autonomously function. The emitter region includes a pn junction, one or more quantum well structures, or other active layers provided for generating light. Contacts are mounted on the underside of the emitter region for connection to a control unit or drive control electronics.

[0047] The drive control electronic circuit is configured to electrically control individual pixel elements and individual subpixels. For example, the drive control electronic circuit or control device may be configured to detect defects in subpixels and subsequently prevent the use of defective subpixels. Furthermore, according to one embodiment, the drive control electronic circuit may be configured to drive adjacent subpixels to increase their brightness so that the brightness of adjacent faulty subpixels is compensated. For this purpose, for example, a memory unit for storing the operating state of subpixels may be provided in the drive control electronic circuit. In other words, in this case, subpixels detected as defective can be centrally detected in order to adjust brightness or compensate for defects by turning adjacent subpixels or pixel elements on / off as needed. In other configurations, for example, the time a subpixel is active may be extended to compensate for a faulty subpixel. On the other hand, when all subpixels are functioning, the drive control circuit can also drive all subpixels individually by reducing their brightness, shortening their duration, or multiplexing them. By utilizing functional subpixels with low current and / or duration, it is possible to extend the lifespan of subpixels.

[0048] A sub-pixel isolation element is provided to separate two adjacent subpixels within a pixel element. This means the sub-pixel isolation element provides electrical isolation with respect to the drive control of each emitter chip or the drive control of the subpixels. In other words, this sub-pixel isolation element may be configured to prevent electrical interaction between the emitter chips of adjacent subpixels.

[0049] In particular, because semiconductors are used and the distance between the emitter regions of individual subpixels is short (in the μm range), driving and controlling the emitter chip can potentially cause secondary electrical or electromagnetic effects on spatially adjacent or surrounding regions. This means that, depending on the situation, driving and controlling the primary emitter chip may also activate adjacent emitter chips. Therefore, subpixel isolation elements are configured to prevent electrical or optical crosstalk to adjacent subpixels and to prevent potential activation of adjacent subpixels.

[0050] On the other hand, subpixel separators are configured to optically couple light emitted from the emitter chips of adjacent subpixels, thereby counteracting the visual impression that individual subpixels are turned off. Optical coupling means that light generated by the primary emitter chip or primary subpixel can penetrate adjacent subpixels through optical crosstalk. In this way, the formation of black dots or black spots due to subpixel defects can be advantageously prevented. Alternatively, light can penetrate from adjacent subpixels and radiate in the direction of emission, starting from the defective subpixel. This can advantageously compensate for the visible effect of the defective subpixel. Therefore, subpixel separators do not have, nor do they achieve, optical separation.

[0051] This is advantageous in the event of a failure in one subpixel. Because they are not optically separated, the pixels are still perceived as a whole and do not give a different visual impression than when both subpixels are active. In one embodiment, the subpixel separator may provide electrical separation but not optical separation, or may even facilitate optical crosstalk. In one variation, the subpixel separator is only retracted to just before or within the active layer of the two subpixels. In other words, the subpixel separator electrically separates two subpixel elements connected via a common layer.

[0052] In one embodiment, subpixels have a common epitaxial layer. Often, the pixel element or the entire display is configured such that a common layer or multiple superimposed layers grow, connecting multiple subpixels and / or pixel elements to each other. This can also be used, for example, to provide a common electrical contact or connection. According to one embodiment, the epitaxial layer has a group III element gallium, indium, or aluminum and a group V element nitrogen, arsenic, or phosphorus, or a combination thereof, or a material system having the aforementioned elements. This can, in particular, affect the color and wavelength of the light emitted by the light-emitting diode. The epitaxial layer may also have an active semiconductor layer, i.e., a p-type doped region and an n-type doped region including an active boundary region.

[0053] For example, an emitter chip is positioned on the first surface of the epitaxial layer, which is lateral to the longitudinally extending portion of the epitaxial layer plane. In this case, the light from the emitter chip is emitted lateral to the epitaxial layer toward the second opposing surface of the epitaxial layer and radiated from there. The subpixel separator element extends trench-like within the epitaxial layer in a lateral direction relative to the epitaxial layer plane, starting from the first surface of the epitaxial layer on which the emitter chip or LED is positioned.

[0054] In other words, the subpixel isolation element is implemented here as a structure such as a recess, gap, or slot, and may be further filled with an electrically insulating material. The insulating material is also preferably optically transparent to facilitate optical crosstalk. According to one embodiment, the trench length is selected so that a drive control signal to one subpixel does not electrically crosstalk with a second adjacent subpixel of the same pixel. In particular, such a trench-like structure causes electrical decoupling due to increased electrical resistance resulting from a significantly extended current flow path.

[0055] The optical effects of the emitted light are also related to the region of the epitaxial layer that is located further in the center of the epitaxial layer or to the region of the epitaxial layer that is directed toward a second, more distant surface. That is, the depth of the trench is selected so as to ensure electrical decoupling, while the trench terminates before reaching the region of the epitaxial layer from which light can travel between two adjacent subpixels. The emission direction of the emitter chip is, for example, extended across the epitaxial layer, allowing light to exit from a second, opposing surface.

[0056] In one embodiment, the trench extends perpendicular to the epitaxial layer plane. Assuming the trench extends in this way, in another example, the trench length d1 is less than the total thickness of the epitaxial layer. In this case, the epitaxial layer is assumed to have at least approximately the same total thickness across multiple pixel elements and subpixels. In another example, the trench length d1 between pixel elements is the same as the thickness of the epitaxial layer. In other words, the trench extends continuously from the first surface to the second surface of the epitaxial layer. In yet another example, the trench extends continuously obliquely into the epitaxial layer at an angle of 0 to 90° with respect to the epitaxial layer plane.

[0057] In one embodiment, each pixel element or its sub-pixel elements includes a plurality of semiconductor layers in the form of a layer sequence, and further provided is an active layer for generating light. The active layer may include structures such as quantum wells prepared for generating light. In one embodiment, one or more layers extend across a plurality of pixels or sub-pixels. For example, it may be proposed that the active layer extends across a plurality of sub-pixels of color.

[0058] In one embodiment, subpixels or pixel elements can be electrically contacted and / or driven independently of each other. For this purpose, for example, contacts may be provided on the surface of the subpixel away from the epitaxial layer. These may be, for example, mechanical contacts, solder connections, or clamp connections. The important point here is that each subpixel can be contacted and electrically operated without substantially interacting with adjacent subpixels of the adjacent subpixel. This is particularly advantageous for detecting the functional or operating state of subpixels, because diagnostic information can be generated individually for each individual subpixel. Similarly, it is also convenient to turn individual subpixels on / off without going through adjacent subpixels. This allows multiple subpixels to operate simultaneously at lower luminosities, thereby reducing thermal or other stress on the subpixels even at higher luminosities.

[0059] In a further embodiment, individual subpixels are connected in contact via a carrier substrate. The carrier substrate is intended to provide mechanical stability on the one hand, and at the same time incorporate a fine conductive structure for individually connecting the individual subpixels in contact. Further elements, such as drive control electronic circuits or driver circuits, can also be incorporated into the carrier substrate, particularly the silicon wafer. These may have the same material system, or they may have different material systems separated by a matching layer. Thus, silicon can also be used as the carrier material. This allows for easy implementation of drive control circuits, in particular, on this carrier.

[0060] In one embodiment, the brightness of a pixel element can be adjusted by turning individual subpixels on or off. An advantage here is that effective brightness control is already possible with a single on / off switch. This significantly simplifies, for example, the drive control electronic circuit or control unit. In another example, the brightness of one or more subpixels of a pixel element can be additionally adjusted. This allows for finer gradation of brightness and more accurate adjustment or calibration of the color spectrum through interaction between different wavelengths of subpixels in the same pixel element. Brightness adjustment can be performed using PWM drive control. Even if a subpixel fails, equivalent brightness can be maintained by appropriately extending the PWM drive control. Conversely, if there are no problems with the subpixels, adjusting the PWM drive control allows the subpixels to operate at their maximum efficiency, reducing thermal stress and potentially extending their lifespan.

[0061] For example, if eight subpixels are patterned on one pixel element, without further changing control parameters such as current or on-time, 2 3 (2^3) levels of luminance dynamic range can be achieved. In other words, in this modified configuration, the dynamic range is 2 3 It can be increased by (2^3) times. This, in turn, can reduce the complexity of electronically controlled devices and the associated costs.

[0062] In another embodiment, a display having multiple pixel elements as described above and below is proposed. According to one embodiment, such a display may be an optical semiconductor display for applications in the augmented reality field or the automotive field, for example, where a small display with very high resolution is used. Similarly, such a display can be used in wearable devices such as smartwatches or wearables.

[0063] A pixel element isolation layer is provided between two adjacent pixel elements. This is configured to electrically isolate adjacent pixel elements for the purposes of driving and controlling each pixel element. Furthermore, the pixel element isolation layer is configured to optically isolate the light emitted from the pixel elements. Abstractly, a pixel element isolation layer can be understood as any structure or material that separates two pixel elements from each other. Typically, a number of such pixel elements are arranged side by side on a plane, such as a support surface, and connected to the driving and control electronic circuit via contacts. In this way, a display can be formed as a whole.

[0064] Electrical and electromagnetic isolation ensures that pixel elements can be driven and controlled independently of adjacent pixel elements, guaranteeing minimal or no electrical or electromagnetic interaction, and especially no optical interaction. This is crucial for the sole reason that each pixel can be generated independently of the others to display specific image content on the display. This optical isolation is also necessary for individual pixels on the display to obtain sufficient sharpness, contrast, or detail from each other.

[0065] In one embodiment, multiple pixel elements share a common epitaxial layer. The pixel element isolation layer is configured in a trench-like manner and extends laterally to the epitaxial layer surface in the direction of light emission from the emitter chip. In other words, the pixel element isolation layer is configured as a recess such as a trench, slit, or slot and does not contain a solid material, or contains a material that is, for example, reflective or absorptive. In one example, the pixel isolation element is filled with an insulating material incorporating a mirror layer. The insulating material electrically isolates two adjacent pixels, and the mirror element prevents optical crosstalk. In some configurations, the mirror element also provides for or facilitates optical collimation.

[0066] The pixel element isolation layer is intended to prevent electrical or electromagnetic signals from being transmitted from one pixel element to another. At the same time, the pixel element isolation layer is intended to minimize, or eliminate, the emission of light from one pixel element to an adjacent pixel element. In one example, the pixel element isolation layer can only be formed by positioning two isolated pixel elements adjacent to each other during configuration, thereby creating a corresponding insulating or reflective interface layer. In one embodiment, the trench is perpendicular to the epitaxial layer plane, and the length of the pixel element isolation layer is less than or equal to the thickness of the epitaxial layer.

[0067] In a further embodiment, the trench depth of the pixel element isolation layer is greater than the trench depth of the sub-pixel isolation layer. This has the advantage that, in particular, the longer length of the pixel element isolation layer allows for both electrical and optical isolation. On the other hand, if the trench depth between sub-pixels is shallow, while optical crosstalk is certainly desirable, only electrical isolation can be obtained. In some embodiments, the depth of the pixel element isolation layer extends through the active layer of a second adjacent pixel to isolate it. Furthermore, the pixel element isolation layer may extend to the radiating surface or just below it.

[0068] In another embodiment, a method for calibrating pixel elements has been proposed. This method is based on the idea that optimal drive control should be possible when the display is powered on. That is, for example, a defective subpixel is detected as such, and then no further drive control is performed as necessary. This can avoid, for example, error messages or malfunctions. Depending on the structure of the pixel element having subpixels, each subpixel can be individually driven and tested.

[0069] Therefore, in the first step, the subpixels of the pixel element are driven and controlled, for example, by a drive control electronic circuit or control unit. In the next step, defect information of the subpixels is detected. In other words, the drive control electronic circuit may be designed and configured to detect malfunctions or defects. For this purpose, for example, current strength may be measured or other electrical parameters may be evaluated.

[0070] In a further step, defect information is stored in the control unit's memory unit. This information can be used, for example, to perform optimal drive control by the drive control electronic circuit. For example, if a specific brightness is to be achieved and it is known that a specific subpixel has a defect, the drive control electronic circuit can appropriately distinguish and drive adjacent subpixels to correct the brightness. As a result, even if a subpixel has a defect, the intensity of light emitted from the pixel element does not change at all, or changes very little, and goes unnoticed by the viewer.

[0071] In another aspect of this method, drive control, detection, and storage are performed sequentially for all individual subpixels of the pixel element. In other words, the drive control electronic circuit may be configured to sequentially check all subpixels available by individually addressable emitter chips in order to detect the functional state of the entire pixel element. According to one embodiment, this may be performed only once when the display is powered on, or after a certain period of time has elapsed.

[0072] Extensions to pixelated emitters or other emitters that reduce optical and electrical crosstalk are presented in the following concepts:

[0073] In conventional monolithic pixel arrays, in some embodiments, it is common practice to etch the active zone to isolate individual pixels and make them individually addressable. However, the etching process of the active layer can introduce defects that can lead to increased leakage current at the edges or further non-radiative recombination. The smaller the pixel, the larger the relative damaged area becomes. Traditionally, the edges of etched active zones have been passivated in various ways. These methods include regrowth, deposition of in situ passivation layers, diffusion of seeds to shift the pn junction and increase the band gap around the active zone, and wet etching and washing to remove as much damage as possible.

[0074] According to the proposed principle, a pixel structure having a material bridge including at least an active layer is proposed. This makes it possible to suppress the increase in defect density in the active layer region.

[0075] Thus, the array of photoelectron pixels or subpixels includes each pixel or subpixel that forms an active zone between the n-type doped layer and the p-type doped layer. According to the proposed principle, between two adjacently formed pixels, the material of the layer sequence is interrupted or removed from the n-type doped side and the p-type doped side to or within the cladding layer, or to or at least partially within the active zone. In this way, the maximum thickness d c A material transition zone is formed, which reduces the electrical and / or optical conductivity in the material transition zone.

[0076] According to a second embodiment, a method for manufacturing an array of photoelectron pixels or subpixels is proposed, in which, in a first step, an overall planar layer sequence having n-type doped layers and p-type doped layers is provided along the array, and an active zone suitable for light emission is formed between these layers. Subsequently, between adjacently formed pixels, the material of the layer sequence is removed from the n-type doped side and the p-type doped side to or within the undoped cladding layer, or to just before or within the active zone. This removal may be performed by an etching process.

[0077] However, even after removal, a material transition region remains between adjacent pixels, which includes an active zone and optionally small regions on the upper, lower, or both sides. This is the maximum thickness d in which the electrical and / or optical conductivity is effectively reduced by the material transition region. c Includes.

[0078] In the proposed concept, on the one hand, an array of pixels can be generated in a planar manner. Although the material is removed by the etching process, a material transition zone containing the active layer remains between adjacent pixels or subpixels. Therefore, the etching process does not increase the defect density in the active layer region, particularly in the pixel region. Nevertheless, individual pixels or subpixels are optically and electrically isolated from each other. Thus, it is proposed to manufacture the pixel-emitter-array without etching through the active zone, in order to avoid optical and electrical crosstalk and a decrease in the performance and reliability of the etched active zone. In this way, etching defects are avoided or the number of defects is effectively reduced.

[0079] In this context, each pixel or subpixel contains at least one photoelectronic structure element or LED that emits light when in operation. In principle, multiple subpixels of different colors are combined to form a single pixel, which is also called an image element.

[0080] According to one configuration, the removed material may be replaced at least partially with a filler material. In other words, a planar surface is obtained by partially removing a material, particularly an n-type dope or p-type dope layer, and then refilling the resulting space. This can provide mechanical support, bonding, and / or electrical insulation functions.

[0081] In a further configuration, the removed material may be at least partially replaced with a material having a relatively small band gap and thus absorbing light in the active zone. This effectively reduces optical crosstalk. Alternatively, at least a portion of the removed material may be replaced with a material having a high refractive index, particularly one higher than the refractive index of the cladding layer or the active zone. This effectively creates a high refractive index interface that hinders the propagation of fundamental modes. Furthermore, alternatively, in one embodiment, a light-absorbing material and / or a high refractive index material may be applied to each material transition. In this way, crosstalk can be prevented by such materials influencing the waveguide (Wellenleitung) of the material transition.

[0082] According to further configurations, materials with a high refractive index can be formed by diffusing or injecting the material into the filler material, particularly into each cladding layer. In this way, the array can be effectively improved with respect to crosstalk in a simple manner that does not require etching.

[0083] Another perspective concerns the reduction of electrical crosstalk. Based on this, materials that increase light absorption and / or electrical resistance can be introduced into the active zones of the respective material transition zones. The corresponding methods can be carried out relatively easily. Thus, the array can be effectively improved in terms of crosstalk using a simple method that does not require etching.

[0084] Depending on the further configuration, at least one optical structure, in particular a photonic crystal and / or a Bragg mirror, may be fabricated along, on or within, the material transition zone. These are particularly effective elements for reducing optical crosstalk. Such photonic crystals or structures can also be used to improve optical collimation.

[0085] In other embodiments, an electrical bias may be applied to the two main surfaces of the material transition region by two opposing electrical contacts, generating an electric field through each material transition region. This is an effective element for reducing optical crosstalk. In this case, the electric field is generated by applying a bias, which may originate from, for example, the voltage used to operate the pixels. However, in some embodiments, such a field may be determined by the inherent material properties. Thus, in one embodiment, it is proposed that an electric field be generated in each material transition region by an n-type doped material and / or p-type doped material applied to or grown on at least one of the two main surfaces of the material transition region. In this way, the electric field is introduced into the corresponding array, eliminating the need to apply a voltage.

[0086] In a further configuration, the exposed main surface of the material transition region and / or the exposed surface region of the pixel may be electrically insulated and passivated by their respective passivation layers, particularly those having silicon dioxide. In this way, current flow through selected regions of the array, particularly current flow through material transitions that function as waveguides (Wellenleiter), can be effectively and specifically prevented. A vertical optical structure element can be fabricated by electrically contacting the main surfaces of the pixels with a contact layer, where one main surface may be electrically connected to the other via a shared layer. In a further configuration, the material and / or material transition regions between one pixel and its adjacent pixels may be formed differently from each other, particularly depending on the direction.

[0087] OLEDs were specifically proposed for displays with active light sources at the pixel size. However, they suffer from low brightness and limited lifespan. As an alternative to self-emissive light sources that offer long lifespan, high efficiency, and fast response, there are, for example, GaN or InGaN-based LEDs arranged in a matrix. These are particularly suitable for display arrangement structures with high packing density to form high-resolution displays.

[0088] The starting point of this study is a display arrangement structure including an IC substrate component and a monolithic pixelated optochip mounted on the component. In this specification, a monolithic pixelated optochip is understood to be a matrix arrangement of light-emitting optoelectronic structural elements formed on a coherent chip substrate by a common manufacturing process. The IC substrate component has a monolithic integrated circuit, which is also obtained from a common manufacturing process. Furthermore, a matrix arrangement of IC substrate contacts exists on the upper surface of the IC substrate component facing the monolithic pixelated optochip.

[0089] A monolithic pixelated optochip includes a semiconductor layer sequence having a first semiconductor layer having a first doping and a second semiconductor layer having a second doping, wherein the polarity of the charge carriers in the first semiconductor layer is different from the polarity of the charge carriers in the second semiconductor layer. Preferably, the first and second semiconductor layers extend laterally across the entire monolithic pixelated optochip. In one configuration, the first semiconductor layer may have p-type doping and the second semiconductor layer may have n-type doping. Reverse doping is also possible, and it is equally possible to use multiple sublayers of the same doping for at least one semiconductor layer that differs in doping strength and / or semiconductor material. In particular, the semiconductor layer sequence may form a double heterostructure. Between the first and second semiconductor layers, there is a region having a junction where an luminescence-active zone is formed when the display is in operation. In one possible configuration, the active zone is located in a doped or undoped active layer, which is placed between a first semiconductor layer and a second semiconductor layer and has, for example, one or more quantum well structures.

[0090] Each light-emitting photoelectron light source in the pixelated optochip represents an LED arranged in a matrix, and each LED has an LED back surface facing the IC substrate component and a first light source contact, the first light source contact adjacent to the first semiconductor layer in contact with each of the IC substrate contacts, and is electrically connected to one of them. In other words, each LED in the pixelated optochip is formed to constitute a region of one of the above-mentioned active layers. Between adjacent LEDs, the active layer or the other layer may be interrupted to avoid crosstalk.

[0091] The inventors have recognized that if the projected area of ​​the first light source contact onto the back of the LED is at most half the area of ​​the back of the LED, and the first light source contact is surrounded laterally by a back-side absorber, a display arrangement structure with high packing density and simplified manufacturing can be realized. In this specification, "lateral direction" is understood to mean the direction perpendicular to the stacking direction determined by averaging the surface normals of the semiconductor layer sequence.

[0092] The current path of the semiconductor layer stack is narrowed in the lateral direction by the first light source contact applied with a small area significantly smaller than the pixel area of the associated LED. As a result, the lateral expansion of the active zone is limited to the μm dimension, and the locally drivable LEDs are separated from each other by the local recombination zones in the semiconductor layer stack. Here, it is advantageous that the pixel size of each LED defined as the maximum diagonal area on the back side of the LED is selected to be less than 1500 μm, preferably less than 900 μm, particularly in the range of 200 μm to 1200 μm. Also, the preferred first light source contact is small, and in an advantageous configuration, the projected area of the first light source contact on the back side of the LED occupies a maximum of 25%, preferably a maximum of 10%, of the area of the back side of the LED.

[0093] To limit the lateral expansion of the active zone, preferably, the first semiconductor layer and the second semiconductor layer are formed with a p-type or n-type conductivity smaller than 10 4 Sm -1 more preferably smaller than 3·10 3 Sm -1 even more preferably smaller than 10 3 Sm -1 Also, the layer thickness of the first semiconductor layer in the stacking direction is advantageously at most 10 times, preferably at most 5 times, the maximum diagonal of the first light source contact in the lateral direction.

[0094] As a further design, the contact of the first light source on the monolithic pixelated optochip is not directly adjacent to the associated IC substrate contact. Instead, with respect to the stacking direction, there is an actual optochip contact element with a larger cross-sectional area than the first light source contact under the first light source contact. This measure simplifies the positioning and mutual contact connection of the monolithic pixelated optochip on the IC substrate components without deteriorating the lateral limitation of the current path.

[0095] According to the present invention, a back-side absorber is positioned to reduce optical crosstalk between adjacent LEDs by utilizing the region of the first light source contact in a miniature structure. In particular, downward electromagnetic radiation emitted at an angular position from the active zone is absorbed insofar as it exceeds a limiting angle with respect to the stacking direction. The back-side absorber material is preferably a patterned layer having silicon, germanium, and gallium arsenide. It is also possible to incorporate graphene or carbon black particles into the back-side absorber.

[0096] The back absorber surrounds the first light source contact laterally and extends laterally from the first light source contact, and the back absorbers of adjacent LEDs are adjacent to each other and preferably integrally formed. In one configuration, the back absorber extends at least to the first semiconductor layer in the stacking direction. As a further design, a portion of the back absorber extends into the first semiconductor layer, which is appropriately patterned, to shield the boundary region between adjacent LEDs. For this purpose, reflective light-shielding materials such as aluminum, gold, or silver, or dielectric materials with a refractive index lower than that of the first semiconductor layer, can be used additionally or alternatively. As a further design, the back absorber not only performs an optical function but also functions as an electrical insulator that restricts the current path laterally.

[0097] This display arrangement structure has a second light source contact on the second semiconductor layer of each LED, oriented in the stacking direction. This contact is made of a transparent material such as ITO (indium tin oxide) and is electrically connected to a transparent, flat, extended contact layer on the front side of the pixelated optochip. In an advantageous configuration, the second light source contact is formed by the large-area contact layer itself, so that the entire set of second light source contacts for matrix-arranged LEDs can be applied as a common area contact. In an alternative configuration that further reduces optical crosstalk, the second light source contacts are adjacent to each other, each in contact with one contact layer, and the second light source contacts of adjacent LEDs are separated from each other by a front-side absorber in the lateral direction, pointing perpendicular to the stacking direction. The front-side absorber may be made of a material that absorbs or reflects electromagnetic radiation emitted from the active zone. Additionally or alternatively, the front-side absorber may function as an electrical insulator and contribute to restricting the current path laterally in order to localize the recombination zone to a micrometer dimension.

[0098] As a further possible design, the front absorber extends in the opposite direction to the stacking direction in at least a portion of the second semiconductor layer. Furthermore, the lower and / or upper surfaces of the second light source contact and / or the contact layer and / or the upper surface of the second semiconductor layer may have optically effective patterning to improve light extraction.

[0099] In the proposed method for manufacturing a display arrangement structure, an IC substrate component having a monolithic integrated circuit and matrix-arranged IC substrate contacts is electrically connected to a monolithic pixelated optochip. In the manufacturing of the monolithic pixelated optochip, it is preferable to epitaxially grow a semiconductor layer sequence having a first semiconductor layer having a first doping and a second semiconductor layer having a second doping, wherein the polarity of the charge carriers in the first semiconductor layer differs from the polarity of the charge carriers in the second semiconductor layer, and the semiconductor layer sequence defines the stacking direction. Furthermore, LEDs are arranged in a matrix in the pixelated optochip, and each LED has a back surface facing the IC substrate component and a first light source contact, the first light source contacts adjacent to the first semiconductor layer in contact with it and electrically connected to one of the contacts on the IC substrate. According to the present invention, the first light source contacts are formed to such a size that the projected area having a surface normal perpendicular to the stacking direction occupies at most half the area of ​​the back surface of the LED. Furthermore, the first light source contact is surrounded by a rear-side absorber in the lateral direction, which is perpendicular to the stacking direction.

[0100] The present invention will be described in more detail below with reference to the drawings. [Brief explanation of the drawing]

[0101] [Figure 1] This figure shows an example configuration of an optoelectronic device comprising an LED semiconductor element and a dielectric filter, according to several aspects of the proposed principle. [Figure 2A] This figure shows an example configuration of an optoelectronic device having an array of multiple semiconductor elements. [Figure 2B] This figure shows an example configuration of an optoelectronic device having an array of multiple semiconductor elements. [Figure 3A] This figure shows two further configuration examples of an optoelectronic device having multiple LEDs, according to several embodiments. [Figure 3B]This figure shows two further configuration examples of an optoelectronic device having multiple LEDs, according to several embodiments. [Figure 3C] This figure shows two further configuration examples of an optoelectronic device having multiple LEDs, according to several embodiments. [Figure 3D] This figure shows two further configuration examples of an optoelectronic device having multiple LEDs, according to several embodiments. [Figure 3E] This figure shows two further configuration examples of an optoelectronic device having multiple LEDs, according to several embodiments. [Figure 4] This diagram shows a simplified structure of a display in which pixel elements are arranged in rows and columns. [Figure 5] This is a magnified view of the pixel elements and subpixels of a display, following the previous figure. [Figure 6] This is a schematic vertical cross-sectional view of a portion of a display according to the concept proposal, which has a pixel element isolation layer and sub-pixel isolation elements. [Figure 7] This figure shows the steps for a method of calibrating a pixel element having a pixel element isolation layer and sub-pixel isolation elements. [Figure 8] This figure shows a first example of a pixel array configuration according to several aspects of the proposed principle, in which adjacent pixels are connected by thin bridges of material. [Figure 9] This figure shows a second example configuration of a pixel array in which two LEDs are connected by a material bridge. [Figure 10A] This figure shows a third example configuration of a pixel array having several aspects according to the proposed principle. [Figure 10B] This figure shows the energy curve related to the material bridge, as shown in the previous example configuration. [Figure 11] This figure shows a fourth example configuration of a pixel array having several embodiments based on the proposed principle. [Figure 12A] This figure shows a fifth example of the pixel array configuration. [Figure 12B]This figure shows one configuration of a pixel array having adjacent LEDs and a material bridge, with additional extraction structures provided according to some aspects disclosed herein. [Figure 13] This figure shows a sixth example of a pixel array configuration. [Figure 14] This figure shows a seventh example of a pixel array having further embodiments. [Figure 15] This figure shows an eighth example of a pixel array configuration. [Figure 16] This figure shows a ninth example of a pixel array configuration. [Figure 17] This figure shows an example configuration comprising various steps for manufacturing a pixel array according to the proposed concept. [Figure 18] This cross-sectional view shows one example configuration of a display device consisting of a monolithic pixel array equipped with a monolithic IC, following several aspects of the proposed concept. [Figure 19] The aforementioned example configuration of the proposed display device is shown in a cross-sectional view, illustrating possible optical paths. [Figure 20] A cross-sectional view shows a second configuration example of the proposed display device comprising a monolithic pixel array and an IC. [Figure 21] This cross-sectional view shows a fourth configuration example of the proposed display device, which includes additional light induction means.

[0102] Detailed explanation The following configurations primarily relate to display devices and displays, and by extension, base units and modules having monolithically integrated optoelectronic structural elements. However, the present invention is not limited to this application or the illustrated monolithic configurations. Rather, the presented principles and configurations can be generalized to suit a wide range of electronic applications and uses where scaling is required. In particular, the aspects relating to directional radiation can be combined with the aspects relating to pixel redundancy and viewpoints in Figure 18. The same applies to the configurations in Figures 18-21, whose principles are suitable, for example, in combination with the configurations in Figures 5 and 6 or Figures 8-16. The examples shown here can also be combined with mirrors, as in Figure 1 or Figure 2B. This applies not only to the configurations but also to the features of these embodiments, which are primarily described in the claims.

[0103] In monolithic displays, individual optoelectronic elements are separated by a defined distance, so a defined radiation pattern is required for some applications. Other applications requiring Lambert radiators can be easily modified based on directional radiation by adding diffuser elements. Therefore, a solution that improves the radiation pattern of LEDs, makes them directional, and adds a dielectric filter with a reflective surface serves as a suitable starting point for various monolithic display applications.

[0104] Figure 1 shows a schematic cross-sectional view of the photoelectronic structure element 10. The structure, operating mode, and manufacturing of the photoelectronic structure element 10 are described below.

[0105] The photoelectronic structure element 10 includes a pixel 11 having a photoelectronic structure element in the form of an LED, also called an LED semiconductor element 12. The LED semiconductor element 12 includes an active zone 13 configured to generate light and has a height in the range of 1 to 2 μm. The LED semiconductor element 12 has a first main surface 14, a second main surface 15 opposite the first main surface 14, and, for example, four side surfaces 16. Each of the side surfaces 16 is chamfered in its lower region, and the side surface 16 forms an angle α of less than 90° with the first main surface 14 in this chamfered region. The active zone 13 is located at the height of the chamfered region.

[0106] The first main surface 14 of the LED semiconductor element 12 has a layer 17 containing a random or deterministic topology. Alternatively, the corresponding topology may be etched onto the first main surface 14 of the LED semiconductor element 12.

[0107] Although not shown in Figure 1, a further layer having a different refractive index than layer 17 is deposited on top of layer 17. Layer 17, in combination with the layer deposited on top of it, deflects light that does not emanate perpendicularly from the LED semiconductor element 12 to the first main surface 14 in other directions, for example, through reflection at the interface between layer 17 and the layer placed on top of it. Furthermore, the layer placed on top of layer 17 has the function of providing a smooth surface to which a dielectric mirror layer can be applied.

[0108] A dielectric filter 18, consisting of a stack of dielectric layers, is present on layer 17 and the layer above it which has a smooth upper surface. This filter is configured to transmit only light components within a predetermined cone angle and reflect flatter beams. This cone angle is oriented such that its axis is perpendicular to the first main surface 14 of the LED semiconductor element 12.

[0109] Furthermore, a conductive reflective material 19, for example made of metal, is deposited on all sides 16 of the LED semiconductor element 12. The reflective material 19 is in contact with the n-type doped region of the LED semiconductor element 12. Below the second main surface 15 of the LED semiconductor element 12, there is a conductive reflective layer 20. The reflective layer 20 is in contact with the p-type doped region of the LED semiconductor element 12.

[0110] The chamfered side surface 16 of the LED semiconductor element 12 is covered with an electrically insulating first material 21. The electrically insulating first material 21 is placed between material 19 and layer 20 and provides electrical insulation between the n-type contact and p-type contact of the LED semiconductor element 12. Furthermore, material 21 has a low refractive index so as to reflect light emitted from the LED semiconductor element 12 at the chamfered side surface 16.

[0111] The layer formed from the reflective material 19 completely surrounds the pixel 11 in the horizontal direction and extends across the entire pixel 11 in the vertical direction. That is, the layer made of the reflective material 19 extends from below the first electrically insulating material 21 covering the LED semiconductor element 12 to above the dielectric filter 18. Light emitted laterally from the pixel 11 is reflected back by the reflective material 19, so highly directional light can only be emitted above the optoelectronic device 10.

[0112] Figures 2A and 2B schematically show the photoelectronic structure element 30 as a top view plan and cross view, respectively. As described above, the photoelectronic structure element 30 includes a plurality of pixels 11. The pixels 11 are arranged in an array and separated from each other by a reflective material 19 that spreads in a grid pattern through the photoelectronic structure element 30. An external terminal 31 is provided on one side of the photoelectronic structure element 30, and this external terminal 31 allows the n-type region of the LED semiconductor element 12 to be brought into contact with the photoelectronic structure element 30 from the outside. In this configuration example, the anodes of the LED semiconductor elements 12 are connected to each other, which is called a common anode configuration. Similarly, a common cathode configuration in which the cathodes are connected to each other is also possible.

[0113] The array of pixels 11 is arranged on a carrier 32. The carrier 32 has p-type contact terminals 33 for each p-type contact, allowing the p-type contacts of each pixel 11 to be individually driven and controlled, for example, by an IC. The optoelectronic device 30 enables a very high pixel density. Furthermore, the monolithic design allows for extensive scaling of the arrangement structure.

[0114] Figures 3A, 3B, and 3C show the optoelectronic structural element 40 as a top view plan and cross view, respectively, with Figures 3B and 3C showing two different modifications.

[0115] The photoelectronic structure element 40 includes a plurality of pixels 11, which are not directly adjacent to each other but spaced apart, as in the photoelectronic structure element 30 shown in Figures 2A and 2B. Each pixel 11 is completely covered on all four sides by a reflective material 19 within the photoelectronic structure element 40. The space between the pixels 11 is filled with an electrically insulating second material 41, such as a potting material.

[0116] The n-type contacts of the LEDs within the pixel 11 may be connected on the underside, the upper side, or between the upper and lower sides of the photoelectronic structure element 40. In Figure 3B, the pixel 11 is placed on a carrier 42 that incorporates n-type contact terminals 43 that connect the n-type contacts of the pixel 11 to each other. Furthermore, the carrier 42 has p-type contact terminals 44 for each p-type contact so that the p-type contacts of each pixel 11 can be individually driven and controlled. The carrier 42 may also have an integrated circuit (IC) built in. The arrangement structure of the LED semiconductor elements 12 within the photoelectronic device 40, with spacing between them, further enables contact connections that allow for individual driving and control of both the n-type and p-type contacts of each pixel 11.

[0117] Figure 3C shows an alternative modification in which the carrier 45 includes only the individual p-type contact terminals 46 of each pixel 11 placed on the carrier 45. Of course, it is also possible to swap the p-type doped layer and the n-type doped layer. Conductor tracks 47 are arranged in a grid on the second electrically insulating material 41, and these conductor tracks 47 connect the n-type contacts of the pixels 11 to each other and are wired to an external terminal 48 located on one side of the optoelectronic device 40, as shown in Figure 3A.

[0118] Figure 3D shows a configuration in which the dielectric layer 19' is formed on two opposing sides of a substantially rectangular semiconductor element or LED 12. From the plan view in Figure 3E, it can be seen that the dielectric elements 19 and 19' alternately enclose the semiconductor element 12 and the dielectric filter 18. Dielectric elements 19 and 19' have different configurations. Element 19' includes at least one conductive subregion, for example, in the form of a surface along the sidewall of the LED 12, or in the form of multiple strips extending along the sidewall. Element 19 is not electrically connected to the LED 12, that is, it does not contribute to supplying current to element 12.

[0119] In Figure 3D, the direction of the current is indicated by an arrow. The current flows to the surface, or from the surface through the dielectric filter 18 into the semiconductor layer and flows into the active region. Alternatively, a conductive portion of the dielectric element may be connected to the contact layer of the LED. The contact layer may be located, for example, between the dielectric filter and the LED, and may be configured as a cover electrode, as shown in Figure 3A by the thin, unlabeled layer between elements 12 and 18. In either case, the contact layer plays a role in spreading the current across the entire surface.

[0120] The following configuration relates to various forms of processing that can be used on semiconductor structures to improve their properties or to create new application areas or feasibility.

[0121] Figure 4 shows a simplified schematic diagram of an electronic display 10, such as those frequently used in monitors, televisions, display panels, or small devices like smartwatches and smartphones, to illustrate an embodiment of a pixel element having electrically isolated subpixels and optically coupled subpixels. In this embodiment, the basic structure is known to be realized by arranging multiple pixels or pixel elements 12 closely adjacent to each other in a plane. The pixel elements 12 are configured in rows and columns and can be individually driven and controlled electronically. The driving control is performed so that not only the light intensity of the pixel elements 12 but also the color tone and emission wavelength are changed in this way. In the latter case, each pixel often contains three subpixels, each subpixel configured to emit a different wavelength. The pixel elements 12 are often provided on a substrate or carrier structure 14, and in this embodiment, it is mainly necessary to ensure the mechanical stability of the arrangement structure.

[0122] This diagram clearly shows that in order to produce sufficiently high resolution, millions of pixel elements 12 must be not only densely packed and mechanically arranged in space, but also electrically connected. At the same time, defective pixels 12 often appear as dark dots between active pixels. In particular, for very small dimensions such as those for LEDs, the density and resolution of such displays are improved, while at the same time, error-free functionality and low defect rates are required.

[0123] Figure 5 shows an enlarged view of section AA shown in Figure 4 to more accurately illustrate the features of the solution described herein. Thus, a substrate 14 is shown that includes a drive control element and also functions as a carrier structure for pixels. Individual pixel elements 12 are provided on the substrate 14, which are rectangular in shape and of the same size. While these identical sizes of pixel elements 12 are often advantageous for manufacturing reasons, according to one embodiment, they may be composed of different shapes or sizes. In the example shown here, the pixel elements 12 have a length l1 and a width b1. A pixel element isolation layer 16 is provided between the pixel elements 12. The pixel element isolation layer 16 is in the range of several micrometers, for example, in the range of 2 μm to 100 μm.

[0124] The pixel element isolation layer 16 is configured so that adjacent pixel elements 12 are electrically isolated with respect to the drive control of each pixel element. Figure 6 shows a cross-sectional view of a section of the pixel elements. The pixel elements 12 are isolated by the pixel element isolation layer 16 and each contains a subpixel 18. The pixel element isolation layer 16 provides electrical and optical isolation between the pixel elements 12. This is to prevent optical crosstalk, which prevents light emitted from one pixel element 12 from entering and being emitted from an adjacent pixel element 12.

[0125] In the pixel element 12, a further subdivision of a selected pixel element 12 into subpixels 18 according to the present invention is illustrated here. The subpixels 18, also called so-called fields, here have the same size and shape. The length l2 of the subpixels 18 is defined, and according to one embodiment, the length l1 of the pixel element 12 can be obtained from multiples of the length l2 of the same-sized subpixels 12, possibly including gaps. Similarly, the width b2 of the subpixels is shown, and again, according to one embodiment, the width b1 of the pixel element can be obtained from approximately multiples of the width b2 of each of the same-sized subpixels 18, possibly including gaps. In the selected figure here, the subdivision of the pixel element 12 into subpixels 18, or so-called fields, is shown for only one pixel element 12. However, the patterning is applicable to all pixel elements 12 arranged in the display 10.

[0126] Furthermore, a sub-pixel isolation element 20 is provided between two adjacent sub-pixels 18 of the same pixel element 12. This sub-pixel isolation element 20 is configured to provide electrical isolation with respect to the drive control of the associated sub-pixel (length l2) (see Figure 6). The sub-pixel isolation element 20 is further configured to enable optical coupling or optical crosstalk with respect to the light emitted by the sub-pixels 18. In other words, a photon or light from one sub-pixel 18 within one pixel element 12 can crosstalk with one or more sub-pixels 18 present within the same pixel element 12, but crosstalk cannot occur between two pixel elements 12.

[0127] For example, the generation of different colors that the pixel element 12 can emit can be achieved by combinations of the basic colors red, green, and blue. As a result, the pixel element 12 can include subpixels 18 that can emit light of different wavelengths. In Figure 5, a total of nine subpixels 18 are marked with the initial letters A to K as an example. In one embodiment, subpixels A, D, and G are configured as red LEDs, subpixels B, E, and H as green LEDs, and subpixels C, F, and K as blue LEDs. For example, if it is desired that the pixel element 12 emit red light, the drive control electronic circuit simultaneously drives and controls subpixels A, D, and G. In some cases, the drive control electronic circuit can be used to test whether all subpixels A, D, and G are functioning correctly. In this way, the desired brightness can be set.

[0128] For example, even if one of subpixels A, D, or G is defective, the remaining pixels can be driven and controlled normally because they are electrically isolated. However, due to optical crosstalk enabled by the subpixel isolation element 20, the missing light from a defective subpixel 18 can be compensated for by adjacent subpixels 18. In other words, as long as one subpixel 18 of the same color in a group is functioning and the remaining subpixels 18 in that group are defective, the remaining functioning subpixels 18 can compensate for the failure of the defective subpixel, thereby guaranteeing the function of the pixel element 12 through redundancy. As an example, optical crosstalk can also occur between multiple subpixels within the pixel element 12. As another arrangement, for example, it is possible to assign each of three subpixels 18 to one of the basic colors: red, green, or blue. Examples of this include groupings such as A / B / C, D / E / F, and G / H / K. However, it is also possible to assign them diagonally, in which case optical crosstalk may be advantageous.

[0129] Figure 6 is a cross-sectional view showing a portion of the display 10. A substrate 14 is shown at the bottom of the figure, which is particularly intended to provide a sufficiently mechanically stable carrier structure for housing other structural elements. According to one embodiment, this may be a silicon IC wafer. The substrate 14 may further have driver circuits or drive control electronic circuits (not shown) and various electrical terminals. These may be realized, for example, by conductive structures within an integrated circuit. Furthermore, a contact structure 24 is provided which can be used to drive and control subpixel regions 26. In this example, the subpixel regions 26 are located in direct contact with the contact structure 24. The emitter chip 26 can be individually and selectively driven and controlled by the drive control electronic circuit via the contact structure 24.

[0130] The epitaxial layer 26 has various different layers, for example, to enable the functionality of a light-emitting diode. For example, the pn junction may be implemented with correspondingly different doping layers, or it may have one or more quantum well structures. For schematic and simplified purposes, the region of the pn junction 28 is shown here with a dashed line. In addition, the structures of the pixel element 12 and sub-pixel 18 are introduced into the epitaxial layer 26.

[0131] In detail, each pixel element 12 is identifiable via a pixel element isolation layer 16. Each of these has a length l1 corresponding to the distance between two pixel element isolation layers 16. In this case, the pixel element 12 can be divided into three subpixels 18 in the longitudinal direction. Each of these subpixels 18 has a length l2. Subpixel isolation elements 20 are placed between each of the subpixels 18.

[0132] In the example shown here, the pixel element isolation layer 16 and the sub-pixel isolation element 20 are each configured as structures such as trenches. In other words, the pixel element isolation layer 16 and the sub-pixel isolation element 20 are introduced into the epitaxial layer 26 as structures such as trenches and gaps, respectively, by, for example, etching. Next, an electrical insulating material, such as SiO2, is deposited in the trenches. At that time, for example, in order to determine the electrical and optical properties of these trenches, the trench depth d1 of the pixel element isolation layer 16 is selected to be greater than the trench depth d2 of the sub-pixel isolation element 20. As a result, by reducing the trench depth d2 of the sub-pixel isolation element 20, optical crosstalk between the sub-pixels 18 can be enabled.

[0133] On the other hand, between the two pixel elements 12, the trench d1 of the pixel element isolation layer 16 deepens, preventing both optical crosstalk 30 and electrical crosstalk. In one embodiment, the trench depth d2 of the sub-pixel isolation element 20 is selected to pass through the region of the pn junction 28. This advantageously prevents two adjacent sub-pixels 18 or associated emitter chips 22 from electrically interacting and / or from experiencing electrical or optical crosstalk.

[0134] In the example above, the pixel element isolation layer 16 extends through the active layer to the edge of the opposite radiating surface, but does not cut through the surface. Thus, the region near the surface may be formed as a common contact that potentially connects all pixels and subpixels. Furthermore, the pixel element isolation layer 16 may include a mirror layer to optically deflect the light generated by the pixels. In the example in Figure 133, the subpixel isolation element 20 is shown to extend through the active layer but then terminate immediately thereafter. This prevents electrical crosstalk but not optical crosstalk. Depending on the design and manufacturing parameters, the subpixel isolation element 20 may extend only as far as the active layer, or even slightly into its interior.

[0135] In this configuration, the pixel element isolation layer 16 and the sub-pixel isolation element 20 are configured as trenches with substantially vertical sidewalls, but the present invention is not limited thereto. Other shapes can be intentionally selected to have additional functions, such as light collimation or light induction. An example related to this is the inclined sidewalls of the pixel element isolation layer 16.

[0136] Figure 7 shows a method 100 according to the present invention for calibrating a pixel element 12. In this regard, in the first step 110, the subpixels 18 of the pixel element 12 are driven and controlled as described above and below. This driving and controlling of the subpixels 18 is to enable testing of the function of the subpixels 18. This can be done, for example, by a control signal of a driving and controlling electronic circuit, which may make it possible to individually contact and connect the individual subpixels 18. In the subsequent step 120, defect information of the subpixels 18 is detected. In other words, information is generated here on whether the subpixels 18 are functioning correctly.

[0137] Such defect information may be, for example, a flag or a specific value containing information about the normal function of the subpixel 18. According to the next step 130, this defect information can be stored, for example, in the memory unit of the drive control electronic circuit. This allows the defective subpixel to be corrected by appropriately adjusting the drive control signals of related subpixels of the same wavelength, thereby achieving normal function of the entire pixel element 12.

[0138] In one example, the subpixel separation element 20 may be configured to allow optical crosstalk between subpixels 18 of the same color or wavelength, or the subpixel separation element 20 may be configured to optically separate subpixels 18 of different colors or wavelengths.

[0139] Figure 8 shows a magnified view of a pixelated or other emitter where optical and electrical crosstalk between pixels of an array is prevented by a pixel structure with a material bridge. This is a cross-sectional view of a section of array A where two adjacent photoelectron pixels P are connected by a material bridge.

[0140] Array A has two photoelectron pixels P that are fabricated in a planar manner in the form of vertical LEDs. Each pixel P includes an n-type doped layer 1, a p-type doped layer 3, and an active zone 5 suitable for light emission. Between the two formed pixels P, the material of the layer sequence was removed from the n-type doped side and the p-type doped side. The maximum thickness d includes the active layer 5 and a thin cladding layer 7. c Only a thin material transition zone 9 remains. From a manufacturing technology standpoint, the cladding layer can be formed from the same material as layer 3 or 5. This material transition zone is considerably longer than the thickness d. c This is selected so that electromagnetic waves do not propagate in the material transition zone. In this way, optical modes are suppressed. In other words, the electrical and / or optical conductivity of the material transition zone 9 in Figure 8 is effectively reduced in the horizontal direction.

[0141] The two main surfaces of the material transition region 9, exposed as a result of removing the material from the layer sequence, and the exposed surface region 11 of the pixel P are electrically insulated and passivated by their respective passivation layers 13, each having silicon dioxide in particular. Furthermore, the region from which the material from the layer sequence was removed is filled with a filler material 15. Finally, the two main surfaces of the pixel P are electrically connected by a contact layer 33 that can form an edge contact. The contact layer 33 may have a transparent material, such as ITO, so that light generated or received at the pixel P can pass through the transparent material.

[0142] The active zone 5 contains one or more structures, such as quantum wells. Its band gap is tuned to the desired wavelength of the emitted light. Maximum thickness d cThis is selected to prevent all basic modes from propagating along the active zone 5 of the material transition section 9 to the next pixel P. The maximum thickness d of the active zone 5 of the material transition section 9 under this condition. c This depends on the refractive index difference between the active zone 5 of the material transition section 9 corresponding to the waveguide and the cladding layer 7. Generally, this means that it is desirable for the material transition section to be as thin as possible. This makes crosstalk of optical modes difficult, on the one hand, because waves cannot propagate horizontally. On the other hand, the maximum thickness d c The smaller the gap, the less likely further electrical crosstalk is to occur. The thin cladding layer 7 of the active zone 5 surrounding the active zone generally exhibits high sheet resistance and can only allow a small current to flow. Making it even thinner increases the resistance in this case as well, thus reducing electrical crosstalk.

[0143] Furthermore, the maximum thickness d c This depends on the refractive index and the thickness of the active zone 5. Here, the maximum thickness d c The thickness is greater than or equal to the thickness of the active zone 5. Maximum thickness d c This also depends on the distance between adjacent pixels P. The longer the distance, the greater the maximum thickness d. c It can be made larger. Maximum thickness d c The recommended range is 100 nm to 4 μm, especially 100 nm to 1 μm.

[0144] The thickness of each layer shown in Figure 8 varies depending on the materials used, including doping materials, the doping profile showing the relationship between concentration and depth, the sidewall angle, pixel size, inter-pixel gaps, and the overall array size. The lower limit of the total thickness is approximately 100 nm.

[0145] Suitable material systems for pixel P include, for example, In(Ga,Al)As(Sb,P), SiGe, Zn(Mg,Cd)S(Se,Te), Ga(Al)N, and HgCdTe. Suitable materials for the contact layer 33 include, for example, metals such as Au, Ag, Ti, Pt, Pd, Cr, Rh, Al, and Ni, either alone or as alloys with Zn, Ge, and Be. Furthermore, by using this material as the filler material 15, it can also serve as a bonding material in addition to its filling function. Moreover, conductive materials can also be expected to have properties such as reflectivity. For example, transparent conductive oxides such as ZnO or ITO(InSnO) can also be used as the contact layer 33 for contact connection, providing a common contact on either the p-side or n-side of the array.

[0146] As a transparent insulator, dielectrics such as fluorides, oxides, and nitrides of Ti, Ta, Hf, Zr, Nb, Al, Si, and Mg can be used. This material can be used in the passivation layer 13. Furthermore, this material can be used as a filler material 15, in which case it can also serve as an electrical insulator in addition to its filler function. The refractive index values ​​of the active zone 5 and the cladding layer 7 depend entirely on the material used.

[0147] Maximum thickness d c This also depends on the refractive index of the dielectric created by the passivation layer 13 and / or the filler material 15. The smaller the refractive index difference between the active zone 5 and the dielectric, the greater the maximum thickness d required for crosstalk to be equal. c It can be made larger.

[0148] Figure 9 shows a cross-sectional view of a second configuration example of pixel array A. Here, array A shown in Figure 9 differs from array A shown in Figure 8 in that a light-absorbing material 17 having a relatively small band gap fills at least partially the region of material from which the layer sequence has been removed. Furthermore, since no passivation layer 13 is formed in the material transition region 9, the light-absorbing material 17 is directly adjacent to the material transition region 9. Only the exposed surface region 11 of the pixel P is electrically insulated and passivated by the respective passivation layer 13. The material of the passivation layer may include, for example, silicon dioxide to prevent electrical short circuits between material 3 and 17.

[0149] Alternatively, in Figure 9—though not shown there—one side of the material transition zone 9 between two pixels P—only the upper or lower side in Figure 9—is filled with the light-absorbing material 17. On the other side, for example, a passivation layer 13 is sandwiched between them, and a filler material 15 is formed in the material transition zone 9. The use of the light-absorbing material 17 further suppresses optical crosstalk. The light-absorbing material 17 between the pixels P reduces the waveguide by absorbing light emitted from the active zone 5 in the region of the material transition zone 9. Waveguide attenuation occurs along the material transition zone 9.

[0150] Suitable light-absorbing materials 17 are metals, alloys, dielectrics, or semiconductors having a band gap smaller than the band gap of the material transition section 9, which initially functions as a waveguide. This increases the energy of the light, which is then absorbed by the material 17. For example, a floating eye (floatendes Auge) that absorbs 50% of red wavelengths can be used. The light-absorbing material 17 is grown in the material transition section 9 by fabricating an epitaxial layer, for example, by CVD (chemical vapor deposition) or PVD (physical vapor deposition). Here, the light-absorbing material 17 was applied or grown on top of the cladding layer 7.

[0151] Figure 10A is a cross-sectional view of a third configuration example of the pixel array A according to the present invention. At the locations of the material in the layer sequence of the pixel array removed from the n-type doped side and / or p-type doped side, a material 19 with a higher refractive index than the removed material, particularly the doped material or filler material 15, is formed. However, it is desirable that this refractive index not be greater than the refractive index of the cladding layer 7 or the active zone 5. This also attenuates the waveguide at the material transition area 9. Finally, the layer sequence on the substrate 35 is covered by a protective top layer 37.

[0152] The material 19 with an increased refractive index is epitaxially grown in the material transition zone 9, for example, by chemical or physical vapor phase growth. The application or growth is carried out after removing the original n-type doped and / or p-type doped layer material between each of the two pixels P, and after passivating the exposed surface regions 11 of the pixels P, particularly the sides, by applying a passivation layer 13.

[0153] Here, a material 19 with a high refractive index is applied or grown on the cladding layer 7. No passivation layer 13 is formed in the material transition area 9. This represents the region below the material transition area 9. For example, GaAs may be grown as the material 19 with a high refractive index on the active zone 5 of the material transition area 9 which has AlGaAs. Alternatively, the material 19 with a high refractive index may be formed by diffusing or injecting a material 21 that increases the refractive index up to the cladding layer 7 or into the filler material 15 within the cladding layer 7. This is represented in Figure 10A as the region above the material transition area 9. The material 19 with a high refractive index may also be formed above and / or below the material transition area 9 in Figure 10A. Regions without the material 19 with a high refractive index may be filled with the filler material 15.

[0154] Figure 10B shows a simulation of light propagation in the material transition region of a third example configuration of a pixel array according to the proposed principle. A cross-sectional view of the material transition region 9 is shown, where only the upper side is etched and filled with a material 19 with a higher refractive index. The material 19 with a higher refractive index has a refractive index equivalent to that of the quantum well material 5. That is, in this graph, the active zone 5 and the material 19 with a higher refractive index are shown in dark gray. The unetched semiconductor material of the cladding layer 7 or n-type doped layer 1 and the filler material 15 are shown in white.

[0155] In this simulation, layers with a thickness of several 0.1 μm are the active zone 5 or the quantum well material region. Layers with a thickness of 0.05 μm are still the "residual cladding" or "residual cladding layer 7". Layers with a thickness of 1 μm are the material with a higher refractive index 19. Depending on the distance between the LED and the selected material, the size of each section can be increased or decreased.

[0156] In the material transition region 9 between two pixels P, an active zone 5 with a refractive index of 3.5 and a thickness of 0.1 μm is located on top of a lower non-etched n-type doped layer 1 with a refractive index of 3. On top of this first inner layer, a cladding layer 7 with a refractive index of 3 and a thickness of 0.05 μm is formed as a second inner layer of the material transition region 9. On top of the cladding layer 7, a relatively thick third inner layer of material 19 is formed, with a refractive index increased to 3.5 and a thickness of 1 μm. The third inner layer is covered with a layer having a filler material 15 with a refractive index of, for example, about 3.

[0157] In this layered structure simulation, the wavelength of vacuum light was assumed to be 0.63 μm. The light generated here may be TM-polarized and / or TE-polarized. When the direction of the magnetic field is perpendicular to the plane formed by the incident vector and the surface normal ("incident plane"), it is called TM polarization (TM = orthogonal magnetic field), and when the electric field is perpendicular to the incident plane, it is called TE polarization (TE = orthogonal electric field).

[0158] In this simulation, Figure 10B shows the value of the spatial extent x in μm along with the x-axis. The y-axis shows the value of the y-component of the electric field strength E. Figure 10B shows how the fundamental mode TE0 originates from the active zone 5 and is stopped by a further optical barrier present between two pixels P above and / or below the material transition section 9, which functions as a waveguide. The optical barrier here is the interface between layers with different refractive indices, according to the layer structure of Figure 10A described above. The fundamental mode TE0 enters the thick third inner layer of the material 19 with a higher refractive index and does not enter the adjacent pixels P.

[0159] In reality, materials with a high refractive index are often highly absorbent, especially due to their small band gap.

[0160] Figure 11 shows a cross-sectional view of a fourth configuration example of pixel array A. In Figure 11, the same reference numerals as in other figures indicate the same features. In contrast to the structure described in Figure 8, here additional materials 23,24 are introduced between the two packed layers 15 and the two passivation layers 13 into the active zone 5 of the material transition section 9, which effectively reduces the electrical and / or optical conductivity of the material transition section 9, which functions as a waveguide. The additional material is, on the one hand, material 23, which increases the light absorption in the active zone 5 of the material transition section 9. The increase in absorption in the active zone 5 between pixels P is achieved by reducing the band gap of the material in the active zone 5. For this purpose, an element that reduces the band gap is injected or diffused into the active zone 5 of the material transition section 9. In particular, a dopant is diffused or injected into the central region of the active zone 5 between pixels P. The reduction in the band gap is achieved by so-called band gap renormalization. The greater the amount of material 23 introduced along the material transition section 9, the greater the light absorption in the active zone 5.

[0161] Alternatively or cumulatively, the additional material is a material 24 that increases the electrical resistance within the active zone 5 of the material transition section 9. For this purpose, an element that increases electrical resistance is injected or diffused into the active zone 5 of the material transition section 9. This further increase in electrical resistance plays a role in further reducing electrical crosstalk from one pixel P to an adjacent pixel P. For example, Fe may be introduced into the active zone 5 of the material transition section 9 having InGaAsP to increase electrical resistance. The greater the amount of material 24 introduced along the material transition section 9, the greater the increase in electrical resistance in the active zone 5 of the material transition section 9 between two pixels P.

[0162] Both materials 23 and 24 are diffused or injected into the active zones 5 of their respective material transition zones 9 prior to the application of the passivation layer 13.

[0163] Figure 12A shows a cross-sectional view of a further configuration example of the pixel array A, in contrast to the structure in Figure 8, in which an optical structure 25 is introduced in the material transition region. The structure 25 is introduced between two packed layers 15 and two passivation layers 13 along the active zone 5 of the material transition region 9. This reduces the photoconductivity of the material transition region 9, which functions as a waveguide between two pixels P. The waveguide is narrowed. The optical structure 25 may be a dielectric structure such as a photonic crystal or a Bragg mirror. The structure 25 forms a periodic refractive index structure along the material transition region 9 above, below, or on both sides of the active zone 5, resulting in an optical band gap, which prevents photon propagation along the material transition region.

[0164] The periodicity of the optical structure depends on the wavelength of light, the size of the optical structure, the length of the patterned material transition section 9, and the refractive index of the material used. In Figure 12A, only one optical structure 25 is shown below the material transition section 9, which functions as a waveguide. This optical structure 25 may also be formed above the material transition section 9, which functions as a waveguide. The optical structure 25 shown in Figure 12A is a Bragg mirror. After the optical structure 25 is formed, a passivation layer 13 is applied.

[0165] Figure 12B shows an extension of the example in Figure 12A. A conversion material 41 or 42 is applied to the surface. Each of the conversion materials 41 and 42 extends to approximately the center between the two LEDs. Because the LED walls themselves are reflective, the light generated in the active layer of the LED is directed towards the conversion material by these walls. The light incident from the LED onto the conversion material is converted there. Crosstalk can be prevented by providing an arbitrary reflective layer between the conversion materials.

[0166] Photonic structures 34 and 37 for guiding light are deposited on the surface of the conversion material of each pixel. Alternatively, dielectric mirrors may be provided as described above.

[0167] Figure 13 shows a cross-sectional view of a sixth configuration example of the pixel array A according to the present invention. In contrast to the structure shown in Figure 13, here, in the two packed layers 15, two opposing electrical contacts 27 are further introduced on both main surfaces of the material transition 9, which function as waveguides, along the active zone 5 of the material transition 9, thereby effectively reducing the electrical and / or optical conductivity of the material transition 9, which function as waveguides between the two pixels P. These opposing electrical contacts 27 apply an electrical bias to both main surfaces of each material transition 9 between the two pixels P.

[0168] The applied electrical bias generates an electrostatic field, which in turn alters the optical properties of the material transition section 9, which initially functions as a waveguide, so that the waveguide along the material transition section 9 is effectively reduced.

[0169] Initially, when an electrical bias (Bias) is applied to the material transition section 9 between pixels P, which functions as a waveguide, the absorption of light in the waveguide is increased by the so-called "quantum confinement Stark" effect (QCSE), which is used, for example, in electroabsorption modulators. In electroabsorption modulators, the basic absorption of the semiconductor is effectively increased by applying an electric field. Accordingly, optical crosstalk between pixels P is reduced. Conventional Schottky contacts or metal insulator contacts are suitable as electrical contacts 27. Furthermore, all types of contacts conventionally used to bend strips without conducting current are suitable.

[0170] After forming two opposing electrical contacts 27, a passivation layer 13 is applied to the surfaces of these two opposing electrical contacts 27, particularly the surfaces where the filler material 15 is formed and adjacent to the pixel P. The same reference numerals as in Figures 8 to 12A indicate the same features in Figure 13.

[0171] Figure 14 shows a cross-sectional view of a seventh configuration example of the pixel array A according to the present invention. In contrast to the configuration in Figure 13, here the electric field is generated intrinsically, i.e., by selecting an appropriate material system. For this purpose, at least one layer of n-type doped material 29 and / or p-type doped material 31 is placed on at least one of the two main surfaces of the material transition section 9 so as to generate an electric field, and as a result the electric field is introduced into the material transition section 9 without further means. If only the layer of doped material is formed on one of the two main surfaces of the material transition section 9, and the layer on the other main surface of the material transition section 9 is not doped, a so-called depletion electric field (Verarmungsfeld) sufficient to increase light absorption within the material transition section 9 is supplied. Alternatively, the electric field for increasing light absorption within the material transition section 9 is generated by forming a layer of n-type doped material 29 on one main surface of the material transition section 9 and a layer of p-type doped material 31 on the opposite main surface of the material transition section 9.

[0172] The materials used to supply the electric field, particularly n-type doped materials 29, p-type doped materials 31, and possibly undoped materials, are epitaxially grown by CVD (chemical vapor deposition) or PVD (physical vapor deposition) to supply a built-in bias between adjacent pixels P on a thin waveguide. For n-type and p-type doping, for example, InGaAlP can be doped with Si and Zn.

[0173] The doped materials 29 and / or 31 supply biases that have the same effect as the configuration shown in Figure 13. Furthermore, since a passivation layer 13 is not required at the material transition 9, the material supplying the electric field is directly adjacent to the material transition 9. Only the exposed surface region 11 of the pixel P is electrically insulated and passivated by its respective passivation layer 13. The material of this layer may be, for example, silicon dioxide. The pixels P are electrically connected by an electrical contact layer 33.

[0174] Figure 15 shows a cross-sectional view of an eighth configuration example of pixel array A. In this case, the active zone 5 was etched in a controlled manner. In other words, damage to the active zone 5 or the formation of defects in the active zone 5 in the material transition region is permitted in a controlled manner here. According to Figure 15, the material transition region 9 completely intersects the two pixels P in its center where the material transition region 9 is formed. The transition region to the two pixels P has a maximum thickness d c A material transition section 9 is formed.

[0175] Figure 16 shows a ninth configuration example of pixel array A. On the left, two different configuration examples that suppress crosstalk between two adjacent pixels P are shown in cross-sectional views. The upper modification V1 shows the first configuration example described in Figure 8, and the lower modification V2 shows the fourth configuration example described in Figure 12A. On the right, a plan view of four adjacent pixels P is shown.

[0176] Each pixel P is assigned four adjacent pixels P, and according to the second modification V2, a material transition section 9 is formed along the x-direction. According to the first modification V1, a material transition section 9 is formed along the y-direction. In principle, each material transition section 9 may be configured differently from other material transition sections 9, particularly according to the configuration examples described in this application. In principle, the material transition sections 9 may have the same configuration along their respective spatial directions. The material transition sections 9 may be formed according to a desired pattern. The configurations of the material transition sections 9 along their respective spatial directions may appear alternately.

[0177] In this way, the array A described in the present application includes not only combinations of the material transition section 9 configuration examples, but also all possible configuration examples or modifications. Based on the plan view of Figure 16, it can be seen that, for example, all combinations of modifications V are possible depending on the direction. This also applies to all possible shapes of the pixel P, which may be rounded or angular, but in this case is particularly rectangular.

[0178] Figure 17 shows an example configuration of the method according to the present invention for manufacturing a pixel array A. The method for manufacturing an array A of photoelectron pixels P comprises the following steps: In the first step S1, an overall planar layer sequence of n-type doped layers 1 and p-type doped layers 3 is fabricated along the array A, with an active zone 5 formed between them. Various techniques are described and disclosed in this application.

[0179] In the second step S2, the material of the layer sequence is removed between the formed pixels P from the n-type doped side and the p-type doped side, particularly by etching. This is done so that at least the active zone remains as a material transition region. Similarly, a thin cladding layer 7 can also be left above, below, or on both sides of the active zone 5 of the material transition region 9. Thus, thickness d c The resistance is significantly reduced, preventing optical modes from propagating laterally between pixels. Similarly, electrical crosstalk is also reduced due to the higher resistance. Overall, the electrical and / or optical conductivity of the material transition section 9 is reduced.

[0180] thickness d c This thickness is sufficient depending on the specifications of array A and the specifications of the desired device, such as brightness or response sensitivity. The thickness of the material transition region depends particularly on the material system and the wavelength of the emitted light.

[0181] In one embodiment, etching is performed from both sides of the active zone 5, either up to or within the thin cladding layer 7 on each side of the active zone 5, or up to the active zone 5, so as to prevent all basic modes from propagating along the active zone 5 to the nearest pixel P. Under this condition, the maximum thickness d of the active zone 5 of the material transition region 9 is c This depends on the refractive index difference between the active zone 5 and the cladding layer 7 of the material transition section 9, which functions as a waveguide.

[0182] Maximum thickness d c Reducing the thickness d allows more light to exit the waveguide, thus reducing optical crosstalk. c Reducing this means reducing electrical crosstalk. The thin, undoped cladding layer 7 of the active zone 5 remaining between individual pixels P can hardly conduct current. Therefore, electrical crosstalk is reduced.

[0183] In the further steps S3 to S5, after etching, the individual pixels P and waveguides can be covered with other necessary materials to further suppress optical and / or electrical crosstalk outside the waveguides. In step S3, the exposed main surface of the material transition area 9 and the exposed surface region 11 of the pixels P are electrically insulated and passivated by their respective passivation layers 13, which in particular have silicon dioxide. Depending on the measures taken in the fourth step S4 to reduce crosstalk, the electrical insulation and passivation of the exposed main surface of the material transition area 9 can be omitted.

[0184] In the fourth step S4, the removed material from the n-type doped side and / or p-type doped side is at least partially replaced by, for example, a filler material 15. In step S5, a contact layer 33 is formed on the main surface of the pixel P, and the structure is electrically connected. According to one configuration, steps S1 to S5 are performed first on one main surface of the array, and then on the other main surface of the array after substrate replacement.

[0185] To further reduce optical and / or electrical crosstalk, the maximum thickness d c In addition to the formation of the material transition region 9 having the above, further measures can be taken in the fourth step S4. Several examples are given here, but other examples for various configurations are described above. Therefore, the areas of material removed from the n-type doped side and / or p-type doped side can be filled instead of the filler material 15 with a light-absorbing material 17 and / or a material with an increased optical refractive index 19. In this case, no passivation layer 13 is formed in the material transition region 9.

[0186] Furthermore, in the fourth step S4, the light absorption and / or electrical resistance of the active zone 5 can be increased alternatively or cumulatively. In this case, it is also desirable to apply the passivation layer 13 to the material transition section 9.

[0187] By applying these concepts, it is possible to manufacture photoelectron pixel arrays A, particularly emitter arrays and detector arrays, without etching through the active zone 5, without causing optical and electrical crosstalk, and without performance and reliability issues compared to solutions in which the active zone is etched.

[0188] High-resolution, particularly monolithic, display arrangement structures are of interest for a variety of applications. For displays with pixel-sized light sources, so-called matrix displays, especially those based on GaN or InGaN, have been proposed.

[0189] Figure 18 shows a cross-sectional view of a display arrangement structure, as a first configuration example, which includes an IC substrate component and a monolithic pixelated optochip mounted thereon. An IC substrate component 1 is shown, comprising monolithic integrated circuits 2.1, 2.1, 2.3 and IC substrate contacts 3.1, 3.2, 3.3 driven and controlled by them. The IC substrate component 1 may have further components for control circuits, power supply circuits, and signal exchange with peripheral devices; here, interface 23 is shown as an example.

[0190] IC substrate contacts 3.1, 3.2, and 3.3 are made of metal and are separated by an insulating layer. A monolithic pixelated optochip 4 is placed on the IC substrate component 1 and is electrically and mechanically connected to the IC substrate contacts 3.1, 3.2, and 3.3. More precisely, contacts 22.1, 22.2, and 22.3 are introduced on the surface of the pixelated optochip 4 so that they face the IC substrate contacts 3.1, 3.2, and 3.3 when precisely positioned on the IC. As shown in the figure, the contacts are all the same size, so even a small offset as shown does not have an adverse effect and short circuits are avoided. Various techniques for such connections are disclosed in this application.

[0191] The monolithic pixelated optochip 4 includes a semiconductor layer sequence 5 having a first p-doped semiconductor layer 6 and a second n-doped semiconductor layer 7, where the first and second semiconductor layers 6 and 7 are applied over a large area and extend substantially throughout the entire monolithic pixelated optochip 4 in the transverse direction perpendicular to the stacking direction 8. Although not shown in detail, there are configuration variations of the semiconductor layers 6 and 7 having multiple separate layers with different doping thicknesses or different semiconductor materials. Between the first and second semiconductor layers 6 and 7 is an active layer having a quantum well, which is not shown in detail, and in this region an active zone 24 is formed that emits electromagnetic radiation when an electric current flows through the semiconductor layer sequence 5 in the stacking direction 8.

[0192] A transparent contact layer 16 made of, for example, ITO (indium tin oxide) is applied two-dimensionally and flatly to the front surface 17 above the semiconductor layer sequence 5. In this configuration, in order to obtain an LED 9 with a small pixel size P of diagonal size of 200 μm to 1200 μm, the first light source contacts 10.1, 10.2, and 10.3 on the underside of the first semiconductor layer 6 facing the IC substrate component 1 are considerably smaller than the pixel size P. In this configuration, a maximum diagonal MD of 20 μm for the first light source contacts 10.1, 10.2, and 10.3 is selected so that the projected area 13 of the first light source contacts 10.1, 10.2, and 10.3 on the back surface 12 is at most half the area of ​​the back surface 12. In this configuration, the projected area 13 is approximately 5% of the area of ​​the back surface 12 when the diagonal is 20 μm. As a result, a laterally restricted current path 25 is formed within the LED 9 between the first light source contact 10.2 and the second light source contact 11 formed by a portion of the transparent contact layer 16, thereby creating a laterally restricted active zone 24. Furthermore, non-radiative recombination is suppressed at the edges of the active zone 24. To improve the lateral restriction of the current path 25, preferably, the dopants of the first semiconductor layer 6 and the second semiconductor layer 7 are such that they are 10 4 Sm -1 Smaller than, preferably 3.10 3 Sm -1 Smaller than, more preferably 10 3 Sm -1 It is selected to have a p-type or n-type conductivity smaller than that. Furthermore, it is advantageous to select a small layer thickness SD for the first semiconductor layer 6. In this case, the layer thickness SD of the first semiconductor layer 6 in the stacking direction 8 is preferably up to 10 times, more preferably up to 5 times, the maximum diagonal MD of the first light source contacts 10.1, 10.2, 10.3 in the transverse direction.

[0193] According to the present invention, the first light source contact 10.2 is surrounded by back-side absorbers 15.1, 15.2 having an optical shielding effect in the lateral direction perpendicular to the stacking direction 8, where the back-side absorbers 15.1, 15.2 are preferably made of silicon, germanium, or gallium arsenide and / or have intercalations of graphene or carbon black particles. From the optical path 26 shown in Figure 19 of the first configuration example, it can be seen that this measure reduces crosstalk from the driven-controlled LED 9 to adjacent pixels.

[0194] In the second configuration example shown in Figure 20, the same reference numerals are used for components that are consistent with the first configuration example. The diagram shows a three-dimensional structure located above the second semiconductor layer 7, which improves the extraction of light to the front surface 17. It can be seen that the degree of total internal reflection is reduced and the extraction cone is larger. In an alternative configuration not shown in detail, a Fresnel lens structure is provided on the front surface 17. In another option, a photonic crystal structure is placed on the surface.

[0195] In the fourth configuration example shown in Figure 21, the front absorbers 21.1, 21.2, 21.3, and 21.4 that laterally surround the second light source contacts 11.1, 11.2, and 11.3 further reduce optical crosstalk between adjacent LEDs 9. Forming the front absorbers 21.1, 21.2, 21.3, and 21.4 electrically insulating further improves the lateral restriction of the current path for localizing the active zone 24.

[0196] In the example configuration shown in the figure, the optochip contact elements 22.1, 22.2, and 22.3 are positioned between the first light source contacts 10.1, 10.2, and 10.3 and their respective associated IC substrate contacts 3.1, 3.2, and 3.3. Since the cross-sectional area of ​​the optochip contact elements 22.1, 22.2, and 22.3 is larger than the cross-sectional area of ​​the first light source contacts 10.1, 10.2, and 10.3, it becomes possible to simplify the contact connection of the monolithic pixelated optochip 4 onto the IC substrate component 1. Further optoelectronic structures, display arrangements, optoelectronic devices, pixels, arrays, and various methods are described below. [Target 1] A photoelectronic structure element, A semiconductor device having an active zone formed to generate light, A dielectric filter is disposed on the first main surface of the at least one semiconductor element and is formed to transmit light only in a predetermined direction, A reflective material disposed on at least one side of the at least one semiconductor element and at least one side of the dielectric filter A photoelectronic structure element having the following characteristics. [Target 2] The optoelectronic structure element according to Object 1, wherein at least one side surface of the at least one semiconductor element extends inclined at the height of the active zone. [Target 3] The at least one semiconductor element has a first terminal and a second terminal, The optoelectronic structure element according to object 1 or 2, wherein the reflective material is conductive and coupled to a first terminal of the at least one semiconductor element. [Target 4] The optoelectronic structure element according to object 3, wherein the reflective material is formed to be conductive only on two opposing sides of the light source so as to contact the first terminal for supplying current. [Target 5] The optoelectronic structure element according to object 4, wherein the reflective material is formed to be non-conductive on the other two sides so as to be insulated from the terminals for supplying current. [Target 6] The optoelectronic structure element according to any one of objects 1 to 5, wherein the dielectric filter is formed at least partially on layers of semiconductor elements adjacent to each other in the radial direction. [Target 7] The photoelectronic structure element according to any one of objects 1 to 6, wherein the dielectric filter has a first region and a second region having different refractive indices, and the conversion material forms the first region. [Target 8] The at least one semiconductor element has a second main surface facing the first main surface, The optoelectronic structure element according to any one of objects 1 to 7, wherein a reflective layer is disposed beneath the second main surface of at least one semiconductor element. [Target 9] The optoelectronic structure element according to any one of objects 1 to 8, wherein the reflective layer is at least partially conductive and coupled to a second terminal of the at least one semiconductor element. [Target 10] The optoelectronic structure element according to object 8, wherein the reflective layer is electrically insulated and one or more conductive layers are disposed above and / or below the reflective layer. [Target 11] The photoelectronic structure element according to any one of objects 1 to 10, wherein an electrically insulating first material is disposed between the reflective material and the reflective layer, and in particular the electrically insulating first material has a refractive index lower than that of the at least one semiconductor element. [Target 12] The optoelectronic structure element according to any one of objects 1 to 11, wherein a layer with a roughened surface is disposed between the at least one semiconductor element and the dielectric filter. [Target 13] The aforementioned photoelectronic structural element, A conversion material having an inorganic dye or quantum dots on its light-emitting surface; or A conversion material located between the dielectric filter and the semiconductor material, having an inorganic dye or quantum dots. A photoelectronic structure element described in any one of the subjects 1 to 12, further including the above. [Target 14] The optoelectronic structure element according to any one of objects 1 to 13, wherein the first main surface of at least one semiconductor element has a roughened surface. [Target 15] The optoelectronic structure element according to any one of objects 1 to 14, wherein at least one semiconductor element has a lateral extent of at least 140 μm and / or a height of at least 5 μm. [Target 16] The optoelectronic structure element according to any one of objects 1 to 15, wherein the at least one semiconductor element includes a plurality of semiconductor elements arranged in an array, and adjacent semiconductor elements are separated from each other by a reflective material. [Target 17] The optoelectronic structure element according to object 11, wherein the reflective material is conductive, and the first terminal of the semiconductor element is connected to a common external terminal via the reflective material. [Target 18] The optoelectronic structure element according to any one of objects 1 to 17, wherein the at least one semiconductor element includes a plurality of juxtaposed semiconductor elements, and a second electrically insulating material is disposed between adjacent semiconductor elements. [Target 19] The optoelectronic structure element according to any one of objects 1 to 18, wherein the reflective material is conductive, and a conductor track extends above and / or below and / or inside the second electrically insulating material, connecting the first terminal of the semiconductor element to a common external terminal. [Target 20] The optoelectronic structure element according to any one of the objects 1 to 19, wherein the second terminal of the semiconductor element can be individually driven and controlled. [Target 21] The photoelectronic structure element according to any one of objects 1 to 20, wherein the photoelectronic structure element further includes a lens disposed on the dielectric filter. [Target 22] A method for manufacturing a photoelectronic structure element, The step of providing at least one semiconductor device according to any one of the above or below described above, having an active zone formed to generate light, A step of placing a dielectric filter on a first main surface of at least one semiconductor element, wherein the dielectric filter is formed to transmit light only in a predetermined direction, and The steps include: placing a reflective material on at least one side of the at least one semiconductor element and at least one side of the dielectric filter; Methods that include... [Target 23] A pixel comprising a photoelectronic structural element for generating pixels of a display, The aforementioned pixel is formed from at least two subpixels, particularly two subpixels that emit light of the same color, and each subpixel is formed by a photoelectronic structure element. A sub-pixel separator is provided between two adjacent sub-pixels of the same pixel element. The sub-pixel separation element is configured to separate the electrically driven control of each sub-pixel, and is configured to optically couple with respect to the light emitted by each sub-pixel, wherein the sub-pixel separation element is configured to separate the electrically driven control of each sub-pixel, and each sub-pixel is configured to optically couple with respect to the light emitted by each sub-pixel. [Target 24] The pixel according to object 23, wherein the subpixels have a common epitaxial layer, and the subpixel separation element extends in a trench-like manner within the epitaxial layer in a direction laterally to the epitaxial layer plane in the main light emission direction. [Target 25] The pixel according to object 23 or 24, wherein the subpixels of the pixel are electrically contactable and / or driveable independently of each other. [Target 26] The pixel according to any one of objects 23 to 25, wherein at least two of the subpixels have a common active layer separated by the subpixel separation element. [Target 27] The pixel according to any one of objects 23 to 26, wherein the sub-pixel separation element extends to the active layer of the pixel, or extends to at least partially penetrate the pixel. [Target 28] The pixel according to any one of objects 23 to 27, wherein the sub-pixel separation element is formed by quantum well intermixing caused by a diffused dopant, particularly in the region of the active layer. [Target 29] A pixel according to any one of objects 23 to 28, wherein the pixel further includes a lens extending across the surface of the pixel. [Target 30] A pixel described in any one of the objects 23 to 29, wherein a transparent conductive layer is formed on its surface. [Target 31] A pixel according to any one of objects 23 to 30, wherein at least one contact surface for bringing at least one subpixel into contact is provided on the surface opposite to the light-emitting surface. [Target 32] A display arrangement structure having multiple pixels as described in any one of the items 23 to 31, A display arrangement structure comprising a pixel element isolation layer provided between two adjacent pixels, wherein the pixel element isolation layer is configured to electrically isolate the adjacent pixels with respect to the driving control of each pixel, and to optically isolate the adjacent pixels with respect to the light emitted by the pixels. [Target 33] The display arrangement structure according to object 32, wherein the pixel and the associated subpixels have a common epitaxial layer, and the pixel element isolation layer extends in a trench-like manner within the epitaxial layer in a direction laterally to the epitaxial layer plane in the main light emission direction. [Target 34] The display arrangement structure according to object 32 or 33, wherein the trench depth d1 of the pixel element isolation layer is greater than the trench depth of the sub-pixel isolation element. [Target 35] The display arrangement structure according to any one of objects 32 to 34, wherein the adjacent pixels or subpixels include an active layer separated by a pixel element isolation layer and / or a subpixel isolation element. [Target 36] The display arrangement structure further includes a carrier layer having a contact region corresponding to the contact region of the pixel, and the carrier layer includes the following elements, i.e. Conductive wire for supplying current to the aforementioned pixel, Current driver circuit or supply circuit, and Control circuit for adjusting brightness A display arrangement structure according to any one of the subjects 32 to 35, wherein at least one of the following is provided. [Target 37] A method for calibrating pixels, the next step being, A step of driving and controlling a subpixel of any one of the pixels listed from target 23 to 31, A step of detecting defect information in subpixels, The steps include storing the defect information in the storage unit of the control unit and Methods that include... [Target 38] The method according to object 37, wherein drive control, detection, and storage are sequentially performed for all individual subpixels of a pixel. [Target 39] In an array having at least two photoelectronic structural elements, where each structural element between the n-type doped layer and the p-type doped layer forms an active zone suitable for light emission, Between two adjacently formed optoelectronic structural elements, from the n-type doped side and the p-type doped side to the cladding layer or into the cladding layer, or to the active zone or at least partially into the active zone, with a maximum thickness d c The material in the layer sequence is interrupted or removed so that a material transition zone is formed, thereby reducing the electrical and / or optical conductivity in the material transition zone. An array characterized by the following features. [Target 40] The array according to object 39, wherein the material transition portion has the active zone and a thin residual layer located on at least one side of the active zone. [Target 41] The array according to object 39 or 40, wherein the removed material is at least partially replaced with filler material. [Target 42] The array according to any one of subjects 39 to 41, wherein the removed material is at least partially replaced with a material having a relatively small band gap and thus absorbing light in the active zone. [Target 43] The array according to any one of subjects 39 to 42, wherein the removed material is at least partially replaced with a material having a high refractive index, particularly a refractive index higher than that of the doped or filler material. [Target 44] The array according to any one of objects 39 to 43, wherein the light-absorbing material and / or the material having a high refractive index are applied to each material transition portion. [Target 45] The array according to any one of objects 39 to 44, wherein the material having a high refractive index is formed by diffusing or injecting a material that increases the refractive index into the filler material, particularly to each cladding layer. [46 subjects] An array according to any one of subjects 39 to 45, wherein a material that enhances light absorption and / or a material that enhances electrical resistance are diffused or injected into the active zone of each material transition portion. [Target 47] The array according to any one of subjects 39 to 46, wherein at least one optical structure, in particular a photonic crystal and / or a Bragg mirror, is fabricated along the material transition portion, on the material transition portion, or within the material transition portion. [Target 48] The array according to any one of the objects 39 to 47, wherein an electrical bias is applied to the two main surfaces of the material transition portion by two mutually opposing electrical contacts, and an electric field is generated through each material transition portion. [Target 49] The array according to any one of objects 39 to 48, wherein an electric field is generated through each material transition portion by an n-type doped material and / or p-type doped material applied to or grown on at least one surface of the two main surfaces of the material transition portion. [Target 50] The array according to any one of objects 39 to 49, wherein the exposed main surface of the material transition portion and / or the exposed surface region of the photoelectronic structural element are electrically insulated and passivated by respective passivation layers having silicon dioxide in particular. [Target 51] The array according to any one of objects 39 to 50, wherein the main surface of the photoelectronic structural element is electrically connected by a contact layer. [Target 52] The array according to any one of objects 39 to 51, wherein the material and / or material transitions between photoelectronic structural elements and adjacent photoelectronic structural elements are formed to differ from each other, particularly depending on the direction. [Target 53] The array according to any one of objects 39 to 52, further comprising a conversion material applied to a surface facing the main radiation direction. [Target 54] A method for manufacturing an array of photoelectron pixels, the next step being, A step of providing an overall planar layer sequence of n-type doped layers and p-type doped layers along an array, wherein an active zone suitable for luminescence is formed between them. - A step of removing at least partially the material between adjacent pixels formed from the n-type doped side and the p-type doped side, thereby achieving a maximum thickness d including the active zone. c The steps include leaving the material transition region and reducing the electrical and / or optical conductivity between adjacent pixels. Methods that include... [Target 55] The method according to object 54, wherein the step of removing the material includes removing the layer sequence from the n-type doped side and the p-type doped side to or within the undoped cladding layer, or to or at least partially within the active zone. [Target 56] The method according to object 54, wherein the material removed from the n-type doped side and / or p-type doped side is at least partially replaced with a filler material. [Target 57] The method according to any one of subjects 54 to 56, wherein the material removed from the n-type doped side and / or p-type doped side is at least partially replaced with a material having a relatively small band gap and thus absorbing light in the active zone. [Target 58] The method according to any one of objects 54 to 57, wherein the material removed from the n-type doped side and / or p-type doped side is replaced with a material having a high refractive index, particularly a refractive index higher than that of the doped material or filler material. [Target 59] The method according to any one of objects 54 to 58, wherein the light-absorbing material and / or the material having a high refractive index are applied to the respective material transition portions. [Target 60] The method according to any one of objects 54 to 59, wherein the material having a high refractive index is formed in the filler material by diffusion or injection, particularly to each cladding layer. [Target 61] The method according to any one of subjects 54 to 60, wherein a material that enhances light absorption and / or a material that enhances electrical resistance are diffused or injected into the active zone from the n-type doped side and / or the p-type doped side. [Target 62] The method according to any one of subjects 54 to 61, wherein at least one optical structure, in particular a photonic crystal and / or a Bragg mirror, is fabricated along the material transition from the n-type doped side and / or p-type doped side, on or within the material transition. [Target 63] The method according to any one of the objects 54 to 62, wherein two opposing electrical contacts are formed from the n-type doped side and the p-type doped side, an electrical bias is applied to the two main surfaces of the material transition portion, and an electric field is generated through each material transition portion. [Target 64] The method according to any one of objects 54 to 63, wherein an electric field is introduced through each material transition portion by an n-type doped material and / or p-type doped material applied to or grown on at least one of the two main surfaces of the material transition portion. [Target 65] The method according to any one of objects 54 to 64, wherein the method comprises electrically insulating and passivating the exposed main surface of the material transition portion and / or the exposed surface region of the pixel with respective passivation layers having silicon dioxide in particular. [Target 66] The method according to any one of objects 54 to 65, wherein the method includes electrically connecting the main surface of the pixel with a contact layer. [Target 67] The method according to any one of objects 54 to 66, wherein the material and / or material transition portions between the pixel and adjacent pixels are formed to differ from each other, particularly depending on the direction. [Target 68] The method according to any one of objects 54 to 67, wherein the step is performed first on one main surface of the array, and then on the other main surface of the array after substrate replacement. [Target 69] A display arrangement structure, An IC substrate component comprising a monolithic integrated circuit and IC substrate contacts arranged in a matrix, A monolithic pixelated optochip comprising a semiconductor layer sequence having a first semiconductor layer having a first doping and a second semiconductor layer having a second doping, wherein the polarity of the charge carriers in the first semiconductor layer is different from the polarity of the charge carriers in the second semiconductor layer, and the semiconductor layer sequence defines the stacking direction. Includes, Within the aforementioned monolithic pixelated optochip, there are photoelectronic structural elements arranged in a matrix. In a display arrangement structure, each optoelectronic structural element has a back surface facing the IC substrate component and a first light source contact, the first light source contacts are adjacent to the first semiconductor layer in contact with it and are electrically connected to one of the IC substrate contacts, The projection area of ​​the first light source contact onto the back surface is at most half the area of ​​the back surface. The first light source contact is surrounded by a rear-side absorber in the lateral direction, which is perpendicular to the stacking direction. A display arrangement structure characterized by the following features. [Target 70] The first semiconductor layer and the second semiconductor layer are 10 4 Sm -1 Less than 3.10 3 Sm -1 Less than, more preferably 10 3 Sm -1 A display arrangement structure according to object 69, having a p-type or n-type conductivity of less than 69. [Target 71] The display arrangement structure according to object 69 or 70, wherein the thickness of the first semiconductor layer in the stacking direction is up to 10 times, preferably up to 5 times, the maximum diagonal of the first light source contact in the transverse direction. [72 subjects] A display arrangement structure according to any one of the objects 69 to 71, wherein the pixel size of the photoelectronic structural element is greater than 100 μm, particularly greater than 120 μm, and particularly in the range of 200 μm to 1000 μm. [Target 73] A display arrangement structure according to any one of objects 69 to 72, wherein the projected area of ​​the first light source contact onto the back surface corresponds to a maximum of 25%, preferably a maximum of 10%, of the area of ​​the back surface. [74 subjects] The display arrangement structure according to any one of the objects 69 to 73, wherein the rear side absorber extends into the semiconductor layer sequence in the stacking direction. [Target 75] A display arrangement structure according to any one of objects 69 to 74, wherein a second light source contact made of a transparent material is arranged on the second semiconductor layer of each optoelectronic structural element in the stacking direction, and the light source contact is electrically connected to a transparent contact layer on the front side of a monolithic pixelated optochip. [76 subjects] The display arrangement structure according to object 75, wherein the second light source contact is formed by the transparent contact layer itself. [77 subjects] The display arrangement structure according to any one of objects 69 to 76, wherein the second light source contact is adjacent to a transparent contact layer, and the second light source contacts of adjacently arranged photoelectronic structural elements are separated from each other by a front-side absorber in a lateral direction perpendicular to the stacking direction. [Target 78] The display arrangement structure according to any one of the objects 69 to 77, wherein the front absorber extends in the opposite direction to the stacking direction to the second semiconductor layer, preferably into the second semiconductor layer. [Target 79] A display arrangement structure according to any one of the objects 69 to 78, wherein, with respect to the stacking direction, an optochip contact element with a larger cross-sectional area than the first light source contact is adjacent to the first light source contact. [Target 80] The display arrangement structure according to any one of the claims 69 to 79, wherein the display arrangement structure further includes an optical conversion element on the surface of the monolithic pixelated optochip. [Target 81] A method for manufacturing a display arrangement structure, An IC substrate component comprising a monolithic integrated circuit and matrix-arranged IC substrate contacts is electrically connected to a monolithic pixelated optochip. Within the monolithic pixelated optochip, a semiconductor layer sequence is grown, having a first semiconductor layer having a first doping and a second semiconductor layer having a second doping, wherein the polarity of the charge carriers in the first semiconductor layer differs from the polarity of the charge carriers in the second semiconductor layer, and the semiconductor layer sequence defines the stacking direction. In the method, a matrix of optoelectronic structural elements is installed within the monolithic pixelated optochip, and each optoelectronic structural element has a back surface facing the IC substrate component and a first light source contact, the first light source contacts are adjacent to the first semiconductor layer in contact with each of the IC substrate contacts, The first light source contact is installed such that its projected area perpendicular to the stacking direction occupies at most half of the area of ​​the back surface. The first light source contact is surrounded by a rear-side absorber in the lateral direction, which is perpendicular to the stacking direction. A method characterized by the following features.

Claims

1. A display arrangement structure, An IC substrate component comprising a monolithic integrated circuit and IC substrate contacts arranged in a matrix, A monolithic pixelated optochip comprising a semiconductor layer sequence having a first semiconductor layer having a first doping and a second semiconductor layer having a second doping, wherein the polarity of the charge carriers in the first semiconductor layer is different from the polarity of the charge carriers in the second semiconductor layer, and the semiconductor layer sequence defines the stacking direction. Includes, Within the aforementioned monolithic pixelated optochip, there are photoelectronic structural elements arranged in a matrix. In a display arrangement structure, each optoelectronic structural element has a back surface facing the IC substrate component and a first light source contact, the first light source contacts are adjacent to the first semiconductor layer in contact with it and are electrically connected to one of the IC substrate contacts, The projection area of ​​the first light source contact onto the back surface is at most half the area of ​​the back surface. The first light source contact is surrounded by a rear-side absorber in the lateral direction, which is perpendicular to the stacking direction. A display arrangement structure characterized by the following features.

2. The display arrangement structure according to claim 1, wherein the first semiconductor layer and the second semiconductor layer have a p-type or n-type conductivity of less than 10⁴Sm⁻¹, preferably less than 3.10³Sm⁻¹, and more preferably less than 10³Sm⁻¹.

3. The display arrangement structure according to claim 1, wherein the thickness of the first semiconductor layer in the stacking direction is up to 10 times, preferably up to 5 times, the maximum diagonal of the first light source contact in the transverse direction.

4. The display arrangement structure according to claim 1, wherein the pixel size of the photoelectronic structural element is greater than 100 μm, more particularly greater than 120 μm, and more particularly in the range of 200 μm to 1000 μm.

5. The display arrangement structure according to claim 1, wherein the projected area of ​​the first light source contact onto the back surface corresponds to a maximum of 25%, preferably a maximum of 10%, of the area of ​​the back surface.

6. The display arrangement structure according to claim 1, wherein the rear side absorber extends into the semiconductor layer sequence in the stacking direction.

7. The display arrangement structure according to claim 1, wherein a second light source contact made of a transparent material is arranged on the second semiconductor layer of each optoelectronic structural element in the stacking direction, and the second light source contact is electrically connected to the transparent contact layer on the front side of the monolithic pixelated optochip.

8. The display arrangement structure according to claim 7, wherein the second light source contact is formed by the transparent contact layer itself.

9. The display arrangement structure according to claim 7, wherein the second light source contact is adjacent to a transparent contact layer, and the second light source contacts of adjacently arranged photoelectronic structural elements are separated from each other by a front-side absorber in a lateral direction perpendicular to the stacking direction.

10. The display arrangement structure according to claim 9, wherein the front absorber extends in the opposite direction to the stacking direction to the second semiconductor layer, preferably into the second semiconductor layer.

11. The display arrangement structure according to claim 1, wherein, with respect to the stacking direction, an optochip contact element with a larger cross-sectional area than the first light source contact is adjacent to the first light source contact.

12. The display arrangement structure according to claim 1, wherein the display arrangement structure further includes an optical conversion element on the surface of the monolithic pixelated optochip.

13. A method for manufacturing a display arrangement structure, An IC substrate component comprising a monolithic integrated circuit and matrix-arranged IC substrate contacts is electrically connected to a monolithic pixelated optochip. Within the monolithic pixelated optochip, a semiconductor layer sequence is grown, having a first semiconductor layer having a first doping and a second semiconductor layer having a second doping, wherein the polarity of the charge carriers in the first semiconductor layer differs from the polarity of the charge carriers in the second semiconductor layer, and the semiconductor layer sequence defines the stacking direction. In the method, a matrix of optoelectronic structural elements is installed within the monolithic pixelated optochip, and each optoelectronic structural element has a back surface facing the IC substrate component and a first light source contact, the first light source contacts are adjacent to the first semiconductor layer in contact with each of the IC substrate contacts, The first light source contact is installed such that its projected area perpendicular to the stacking direction occupies at most half of the area of ​​the back surface. The first light source contact is surrounded by a rear-side absorber in the lateral direction, which is perpendicular to the stacking direction. A method characterized by the following features.

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