Group III element nitride semiconductor substrates and bonded substrates
The Group III nitride semiconductor substrate addresses cracks and fractures by controlling stress distribution through polarized light observation and thickness, enhancing structural integrity for semiconductor devices.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- NGK CORP
- Filing Date
- 2023-01-19
- Publication Date
- 2026-05-08
AI Technical Summary
Group III nitride semiconductor substrates, such as gallium nitride wafers, are prone to cracks and fractures during device fabrication due to residual stress, which conventional evaluation methods like Raman analysis and cathodoluminescence fail to adequately assess throughout the entire substrate, including the back surface and interior.
A Group III nitride semiconductor substrate with a thickness of 200 μm or more, characterized by specific light and dark area transitions in polarized light microscopic observation, and controlled stress distribution across its surface, suppressing crack and fracture occurrence.
The substrate effectively reduces cracks and fractures by ensuring uniform stress distribution, maintaining structural integrity and enabling reliable epitaxial crystal growth for semiconductor devices.
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Abstract
Description
[Technical Field]
[0001] The present invention relates to a group III element nitride semiconductor substrate. More specifically, to a group III element nitride semiconductor substrate having a front surface and a back surface that are in a front-back relationship, and which can suppress the occurrence of cracks and fractures. [Background technology]
[0002] Group III element nitride semiconductor substrates such as gallium nitride (GaN) wafers, aluminum nitride (AlN) wafers, and indium nitride (InN) wafers are used as substrates for various semiconductor devices (for example, Patent Document 1).
[0003] A semiconductor substrate comprises a first surface and a second surface. When the first surface is considered the main surface and the second surface the back surface, the main surface is typically a Group III element polar surface, and the back surface is typically a nitrogen polar surface. Epitaxial crystals can be grown on the main surface, and various devices can be fabricated.
[0004] Group III element nitride semiconductor substrates are used as base substrates for semiconductor devices such as LEDs and LDs.
[0005] In gallium nitride substrates, cracks and fractures are prone to occur during device fabrication. It is known that such cracks and fractures are more likely to occur when there is a large difference in residual stress within the substrate (Patent Documents 2-4).
[0006] Conventionally, Raman analysis of the substrate surface has been used as a method for evaluating residual stress within the substrate, E2 H Residual stress is evaluated based on the wavenumber of the peak corresponding to the phonon mode. It is believed that a larger change in wavenumber corresponds to a larger change in residual stress.
[0007] In Patent Document 2, the area is 10 cm². 2 E2 within the region excluding the area from the periphery of the surface to 5 mm inward. HThe difference between the maximum and minimum values of the Raman shift corresponding to the phonon mode is 0.5 cm -1 A gallium nitride substrate with the following characteristics has been reported.
[0008] In Patent Document 3, a total of five E2s at the center and four peripheral locations on the surface H The difference between the maximum and minimum values of the peak frequency corresponding to the phonon mode is 0.1 cm -1 or more and 1 cm -1 A gallium nitride substrate with a diameter of 150 mm or more and the following characteristics has been reported.
[0009] In Patent Document 4, E2 H The difference between the surface centroid position and the back surface centroid position of the Raman shift amount corresponding to the phonon mode is 0.1 cm -1 or more and 0.5 cm -1 and the difference between the surface centroid position and the periphery is 0.1 cm -1 or more and 0.5 cm -1 A gallium nitride substrate with an area of 18 cm 2 or more and the following characteristics has been reported.
[0010] In addition, as a method for evaluating the residual stress in the substrate, conventionally, the cathodoluminescence method (CL method) on the substrate surface has also been used (Patent Document 5). This is a method of counting crystal defects that affect the residual stress as dislocations that appear on the substrate surface.[[ID=3{3]]
[0011] However, cracks and fractures that occur in the substrate occur not only on the substrate surface but also on the back surface and inside the substrate. Therefore, with the conventional evaluation methods for the substrate surface (Raman analysis and CL method) that measure the substrate surface, a sufficient evaluation of the residual stress in the substrate has not been achieved, and a group III nitride semiconductor substrate with cracks and fractures suppressed has not been provided.
Prior Art Documents
Patent Documents
[0012]
Patent Document 1
[0013] The problem of the present invention is to provide a group III nitride semiconductor substrate having a first surface and a second surface, and suppressing the occurrence of cracks and fractures. [Means for Solving the Problems]
[0014] [1] The group III nitride semiconductor substrate according to an embodiment of the present invention is a group III nitride semiconductor substrate having a first surface and a second surface, and has a thickness of 200 μm or more. In one embodiment, in the cross Nicol image obtained by polarized light microscopic observation of the region including the central portion of the surface of the first surface, the number of light and dark switches N in a line segment with a length of 2 mm drawn therein is 30 or more. [2] In another embodiment, the substrate is Let the number of light and dark switches in a line segment with a length of 2 mm drawn in the cross Nicol image obtained by polarized light microscopic observation of the region including the central portion of the surface of the first surface be N times, Let the number of light and dark switches in a line segment with a length of 2 mm drawn in the cross Nicol image obtained by polarized light microscopic observation of the region including a point at a distance of 10 mm from the outer periphery in the right direction from the central portion when the surface of the first surface is viewed in the plane direction be a times, Let the number of light and dark switches in a line segment with a length of 2 mm drawn in the cross Nicol image obtained by polarized light microscopic observation of the region including a point at a distance of 10 mm from the outer periphery in the left direction from the central portion when the surface of the first surface is viewed in the plane direction be b times, When the surface of the first surface is viewed from a planar direction, the number of times the light and dark areas switch in a 2 mm long line segment drawn within the crossed nicol image obtained by polarizing microscope observation of a region including a point above the center and at a distance of 10 mm from the outer edge is denoted as c. When the surface of the first surface is viewed from a planar direction, and a polarizing microscope is used to observe a region including a point 10 mm from the outer edge, the number of times the light and dark areas change in a 2 mm long line segment drawn within the crossed nicol image is denoted as d. The rate of change of N for each of a, b, c, and d is all within 20%. [3] In the above [1] or [2], the maximum length between the points of light and dark transition is 700 μm or less. [4] In any of the above [1] to [3], the diameter of the substrate is 45 mm or more. [5] In another aspect of the present invention, a bonded substrate is provided, which is formed by bonding a support substrate to any of the Group III element nitride semiconductor substrates described in [1] to [4] above. [Effects of the Invention]
[0015] According to embodiments of the present invention, a group III element nitride semiconductor substrate having a first surface and a second surface can be provided, which suppresses the occurrence of cracks and fractures. [Brief explanation of the drawing]
[0016] [Figure 1] This is a typical schematic cross-sectional view of a group III element nitride semiconductor substrate according to an embodiment of the present invention. [Figure 2] This is a photographic image of a crossed nicol image obtained by crossed nicol observation using a polarizing microscope in a region including the central part of the first surface of wafer (1) obtained in Example 1. [Figure 3] This plot is based on a photograph of a crossed nicol image obtained by crossed nicol observation using a polarizing microscope in a region including the central part of the first surface of wafer (1) obtained in Example 1. [Figure 4]This is a photographic image of a crossed nicol image obtained by crossed nicol observation using a polarizing microscope in a region including the central part of the first surface of the wafer (C1) obtained in Comparative Example 1. [Figure 5] This plot is based on a photograph of a crossed nicol image obtained by crossed nicol observation using a polarizing microscope in a region including the central part of the first surface of the wafer (C1) obtained in Comparative Example 1. [Modes for carrying out the invention]
[0017] Where the term "weight" appears in this specification, it may be interpreted as "mass," which is the commonly used SI unit for weight.
[0018] The Group III element nitride semiconductor substrate according to embodiments of the present invention is typically a self-supporting substrate made of a Group III element nitride crystal. In this specification, "self-supporting substrate" means a substrate that does not deform or break under its own weight when handled and can be handled as a solid object. Self-supporting substrates can be used as substrates for various semiconductor devices such as light-emitting elements and power control elements.
[0019] The group III element nitride semiconductor substrate according to the embodiment of the present invention is typically wafer-shaped (approximately circular). However, it may be processed into other shapes, such as rectangles, as needed.
[0020] The size (diameter) of the group III element nitride semiconductor substrate according to the embodiments of the present invention can be any appropriate size as long as it does not impair the effects of the embodiments of the present invention. Examples of such sizes include 25 mm (approximately 1 inch), 45-55 mm (approximately 2 inches), 95-105 mm (approximately 4 inches), 145-155 mm (approximately 6 inches), 195-205 mm (approximately 8 inches), and 295-305 mm (approximately 12 inches). The size (diameter) of the group III element nitride semiconductor substrate according to the embodiments of the present invention is preferably 45 mm or more, and more preferably 50 mm or more.
[0021] The group III element nitride semiconductor substrate according to the embodiment of the present invention has a thickness of 200 μm or more (or the thickness at the thickest point if the thickness is not constant), preferably 300 μm to 1000 μm.
[0022] Typical examples of Group III element nitrides include gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), or mixed crystals thereof. These may consist of one element or two or more elements.
[0023] Group III element nitrides specifically include GaN, AlN, InN, and Ga x Al 1-x N(1>x>0), Ga x In 1-x N(1>x>0), Al x In 1-x N(1>x>0), Ga x Al y In z These are N(1>x>0, 1>y>0, x+y+z=1). These may be doped with various n-type or p-type dopants.
[0024] Typical p-type dopants include zinc (Zn), manganese (Mn), iron (Fe), beryllium (Be), magnesium (Mg), strontium (Sr), and cadmium (Cd). These may be present individually or in combination of two or more elements.
[0025] Typical n-type dopants include silicon (Si), germanium (Ge), tin (Sn), and oxygen (O). These may be present individually or in combination of two or more.
[0026] The plane orientation of the group III element nitride semiconductor substrate can be the c-plane, m-plane, a-plane, or specific crystal planes tilted from the c-plane, a-plane, or m-plane, respectively. In particular, the effects of the embodiments of the present invention can be more pronounced when the plane is the c-plane. Examples of specific crystal planes tilted from the c-plane, a-plane, or m-plane include so-called semipolar planes such as the {11-22} plane and the {20-21} plane. Furthermore, the plane orientation can include not only so-called just planes perpendicular to the c-plane, a-plane, m-plane, or specific crystal planes tilted from them, but also off-angles within a range of ±5°.
[0027] The Group III element nitride semiconductor substrate according to an embodiment of the present invention is a Group III element nitride semiconductor substrate having a first surface and a second surface. When the first surface is the main surface and the second surface is the back surface, if the surface orientation of the Group III element nitride semiconductor substrate is the c-plane, the main surface is typically the Group III element polar surface, and the back surface is typically the nitrogen polar surface. However, the main surface may be the nitrogen polar surface, or the back surface may be the Group III element polar surface. Epitaxial crystals can be grown on the main surface, and various devices can be fabricated. The back surface can be held by a susceptor or the like, allowing the Group III element nitride semiconductor substrate according to the embodiment of the present invention to be transported.
[0028] In describing the Group III element nitride semiconductor substrate according to embodiments of the present invention, the first surface will be described as the main surface and the second surface as the back surface. Therefore, in this specification, "main surface" may be read as "first surface," "first surface" may be read as "main surface," "back surface" may be read as "second surface," and "second surface" may be read as "back surface."
[0029] The main surface may be mirror-finished or non-mirror-finished. Preferably, the main surface is mirror-finished.
[0030] From the viewpoint of obtaining a semiconductor device with good device characteristics and little variation in device characteristics between devices, it is preferable that the main surface has substantially removed the processed altered layer and has low surface roughness in the microscopic region, achieved by epitaxial growth of the device layer.
[0031] The reverse side may be either mirrored or non-mirror-finished.
[0032] A mirror-finished surface is a surface that has been polished to a mirror finish. After polishing, the surface roughness and waviness have been reduced to the point where light reflects off the polished surface, allowing the viewer to visually confirm the reflection of an object. In other words, the surface roughness and waviness after polishing have been reduced to a level that is negligible with respect to the wavelength of visible light. Epitaxial crystal growth is entirely possible on a mirror-finished surface.
[0033] As for the method of mirror finishing, any suitable method can be adopted as long as it does not impair the effects of the embodiments of the present invention. Examples of such methods include using one or a combination of a polishing device using tape, a lapping device using diamond abrasive grains, or a CMP (Chemical Mechanical Polish) device using a slurry such as colloidal silica and a nonwoven polishing pad to perform mirror finishing. If a processed altered layer remains on the surface after processing, the processed altered layer is removed. Examples of methods for removing the processed altered layer include using RIE (Reactive Ion Etching) or chemical solutions to remove the processed altered layer, or annealing the substrate.
[0034] A non-mirror surface is a surface that has not been polished to a mirror finish, and a typical example is a rough surface obtained through a surface roughening treatment.
[0035] As for the surface roughening treatment method, any suitable method can be adopted as long as it does not impair the effects of the embodiments of the present invention. Examples of such methods include grinding using a grinding wheel, laser texturing, etching using various chemicals or gases, physical or chemical coating, and texturing by machining.
[0036] Figure 1 is a typical schematic cross-sectional view of a group III element nitride semiconductor substrate according to an embodiment of the present invention. As shown in Figure 1, the group III element nitride semiconductor substrate 100 according to an embodiment of the present invention typically has a main surface (group III element polar surface) 10 and a back surface (nitrogen polar surface) 20. The group III element nitride semiconductor substrate 100 according to an embodiment of the present invention may also have a side surface 30.
[0037] The edges of the group III element nitride semiconductor substrate according to the embodiments of the present invention can take any suitable form, as long as it does not impair the effects of the embodiments of the present invention. Examples of the edges of the group III element nitride semiconductor substrate according to the embodiments of the present invention include a shape in which the main surface and back surface are chamfered so that they are flat surfaces, a shape in which the main surface and back surface are chamfered in an R shape, a shape in which only the main surface side of the edge is chamfered so that it is flat surface, and a shape in which only the back surface side of the edge is chamfered so that it is flat surface.
[0038] In the case where the edges of the group III element nitride semiconductor substrate according to an embodiment of the present invention are chamfered, the chamfered portion may be provided over the entire circumference of the outer periphery, or it may be provided only on a part of the outer periphery.
[0039] In the embodiment of the present invention, the number of times N the light and dark switches in a 2 mm long line segment drawn in a crossed nicol image obtained by polarizing microscope observation of a region including the central part of the surface of the first surface is preferably 30 or more, more preferably 50 or more, even more preferably 80 or more, and particularly preferably 100 or more. The upper limit of N is better the larger it is, and in reality it is 300 or less. If the number of times N the light and dark switches in a 2 mm long line segment drawn in a crossed nicol image obtained by polarizing microscope observation of a region including the central part of the surface of the first surface is within the above range, a group III element nitride semiconductor substrate with suppressed crack and fracture occurrence can be provided.
[0040] The number of times the brightness changes in a 2 mm long line segment drawn within a crossed nicol image obtained by polarizing microscope observation of a region including the central part of the first surface can be measured as follows: First, when performing crossed nicol observation with a polarizing microscope, the observation conditions are adjusted so that the brightness in each bright and dark area does not reach the maximum and minimum values. Then, the magnification is set to 50x or less, and the illumination is adjusted so that the entire observation field is uniformly bright without unevenness, and an image of the region including the central part of the first surface of the substrate is obtained. Ten line segments of 2 mm length are drawn on the obtained image so that the image is divided into 11 equal parts in the Y-axis direction, and for each line segment, the position on the line segment is plotted on the horizontal axis and the brightness on the line segment is plotted on the vertical axis. A line is drawn at 20% brightness, with the maximum brightness being 100% and the minimum brightness being 0%, and the number of times the brightness plot crosses the 20% brightness line is counted. In embodiments of the present invention, the average of these counts for each of the 10 line segments is used as the number of times the light and dark areas switch within a 2 mm long line segment drawn in a crossed nicol image obtained by polarizing microscope observation of a region including the central part of the surface of the first surface, and this indicates the frequency of switching between light and dark regions.
[0041] The inventors diligently studied how to suppress the occurrence of cracks and fractures in Group III element nitride semiconductor substrates. They focused on the fact that cracks and fractures occur not only on the substrate surface but also throughout the entire substrate, including the back surface and the interior. Furthermore, they considered that cracks and fractures in the substrate are caused by residual stress present throughout the entire substrate. They then focused on the fact that the distribution of residual stress throughout the entire substrate can be visualized by crossed nicol observation using a polarizing microscope. Since the stress fluctuation was smaller the greater the number of light-dark switching cycles in crossed nicol observation using a polarizing microscope in a region including the central part of the first surface, they arrived at the technical idea that a novel Group III element nitride semiconductor substrate with suppressed crack and fracture occurrence could be provided by designing the Group III element nitride semiconductor substrate based on the number of light-dark switching cycles.
[0042] A group III element nitride semiconductor substrate according to another embodiment of the present invention is (1) Let N be the number of times the light and dark areas change in a 2 mm long line segment drawn within the crossed nicol image obtained by polarizing microscope observation of a region including the central part of the surface of the first surface. (2) When the surface of the first surface is viewed from the plane, the number of times the light and dark areas change in a 2 mm long line segment drawn in the crossed nicol image obtained by polarizing microscope observation of a region that is to the right of the center and 10 mm from the outer edge is denoted as a number of times. (3) When the surface of the first surface is viewed from the planar direction, the number of times the light and dark areas change in a 2 mm long line segment drawn in the crossed nicol image obtained by polarizing microscope observation of a region that is to the left of the center and 10 mm from the outer edge is denoted as b times. (4) When the surface of the first surface is viewed from a planar direction, the number of times the light and dark areas change in a 2 mm long line segment drawn in the crossed nicol image obtained by polarizing microscope observation of a region that is upward from the center and at a distance of 10 mm from the outer edge is denoted as c. (5) When the surface of the first surface is viewed from a planar direction, if the number of times the light and dark areas change in a line segment of length 2 mm drawn in the crossed nicol image obtained by polarizing microscope observation of a region that is downward from the center and at a distance of 10 mm from the outer edge is denoted as d, The rate of change of N for each of a, b, c, and d is preferably within 20%, more preferably within 16%, even more preferably within 12%, and particularly preferably within 8%. If the rates of change of N for each of a, b, c, and d are all within the above ranges, a group III element nitride semiconductor substrate with suppressed crack and fracture occurrence can be provided.
[0043] The number of times the light and dark changes in a 2 mm long line segment drawn in a crossed nicol image obtained by polarizing microscope observation of a region including a point to the right of the center and 10 mm from the outer edge when the surface of the first surface is viewed from the plane, the number of times the light and dark changes in a 2 mm long line segment drawn in a crossed nicol image obtained by polarizing microscope observation of a region including a point to the left of the center and 10 mm from the outer edge when the surface of the first surface is viewed from the plane, and the number of times the light and dark changes in a 2 mm long line segment drawn in a crossed nicol image obtained in a region including a point to the top of the center and 10 mm from the outer edge when the surface of the first surface is viewed from the plane The number of times the light and dark areas switch in a 2 mm long line segment drawn in a crossed nicols image, and the number of times the light and dark areas switch in a 2 mm long line segment drawn in a crossed nicols image obtained by polarizing microscope observation of a region including a point that is downward from the center of the first surface when viewed from a planar direction, can be measured in the same way as the number of times the light and dark areas switch in a 2 mm long line segment drawn in a crossed nicols image obtained by polarizing microscope observation of a region including the center of the first surface, by using the respective regions mentioned above instead of the region including the center of the first surface of the substrate as the location for obtaining the image.
[0044] The inventors diligently investigated alternative evaluation methods to serve as indicators for suppressing the occurrence of cracks and fractures in Group III element nitride semiconductor substrates. They focused on the fact that cracks and fractures occur not only on the substrate surface but also throughout the entire substrate, including the back surface and the interior. Furthermore, considering that cracks and fractures occur in the substrate due to residual stress present throughout the entire substrate, they investigated means to evaluate residual stress throughout the entire substrate. As a result, they focused on the fact that the stress distribution can be confirmed by crossed nicol observation using a polarizing microscope. They arrived at the technical idea that if the rate of change in the number of light-dark transitions in crossed nicol observation using a polarizing microscope in a region including the central part of the first surface is smaller than a predetermined amount, then a Group III element nitride semiconductor substrate with suppressed crack and fracture occurrence can be provided.
[0045] The above points of light and dark transition, that is, the points of light and dark transition in a 2 mm long line segment drawn in a crossed nicol image obtained by polarizing microscope observation of a region including the central part of the surface of the first surface, the points of light and dark transition in a 2 mm long line segment drawn in a crossed nicol image obtained by polarizing microscope observation of a region including a point to the right of the center and 10 mm from the outer edge when the surface of the first surface is viewed from the plane, the points of light and dark transition in a 2 mm long line segment drawn in a crossed nicol image obtained by polarizing microscope observation of a region including a point to the left of the center and 10 mm from the outer edge when the surface of the first surface is viewed from the plane, the first surface When viewing the surface from a planar direction, the maximum length between points of light and dark in a 2 mm long line segment drawn in a crossed nicol image obtained by polarizing microscope observation of a region including a point above the center and at a distance of 10 mm from the outer edge, and when viewing the surface of the first surface from a planar direction, the maximum length between points of light and dark in a 2 mm long line segment drawn in a crossed nicol image obtained by polarizing microscope observation of a region including a point below the center and at a distance of 10 mm from the outer edge, is preferably 700 μm or less, more preferably 200 μm or less, even more preferably 50 μm or less, and particularly preferably 20 μm or less. The lower limit of the maximum length between the above switching points is better as small as possible, and in reality, it is 0.2 μm or more. If the maximum length between points of the above switching number is within the above range, it is possible to provide a group III element nitride semiconductor substrate that further suppresses the occurrence of cracks and fractures.
[0046] The group III element nitride semiconductor substrate according to the embodiment of the present invention can be manufactured by any suitable method without impairing the effects of the embodiment of the present invention. A preferred method for manufacturing the group III element nitride semiconductor substrate according to the embodiment of the present invention will be described below, in terms of enabling the effects of the embodiment of the present invention to be more fully realized.
[0047] In the method for manufacturing a group III element nitride semiconductor substrate according to an embodiment of the present invention, a seed crystal film is typically formed on the main surface of a substrate, and a group III element nitride layer is formed on the group III element polar surface of the seed crystal film. Next, the group III element nitride layer (seed crystal film + group III element nitride layer) that will become a self-supporting substrate is separated from the substrate to obtain a self-supporting substrate having a main surface and a back surface.
[0048] As for the material of the substrate, any suitable material can be used as long as it does not impair the effects according to the embodiments of the present invention. Examples of such materials include sapphire, crystal-oriented alumina, gallium oxide, and Al. x Ga 1-x Examples include N(0≦x≦1), GaAs, and SiC.
[0049] Generally, epi-ready grade substrates (typically epi-ready sapphire substrates) are used as the substrate for manufacturing group III element nitride semiconductor substrates. However, the substrate used for manufacturing group III element nitride semiconductor substrates according to embodiments of the present invention may be cleaned by any appropriate method before the seed crystal film is formed. Examples of such cleaning treatments include APM(SC1) cleaning (ammonia, hydrogen peroxide solution), HPM(SC2) cleaning (hydrochloric acid, hydrogen peroxide solution), SPM cleaning (sulfuric acid, hydrogen peroxide solution), DHF cleaning (diluted hydrofluoric acid solution), FPM cleaning (hydrofluoric acid, hydrogen peroxide solution), ultrapure water cleaning, and ozonated water cleaning. Preferably, the cleaning treatment may be performed to remove contaminants to an extent that does not adversely affect crystal growth. By removing contaminants to this extent, the desired number of light-dark switching cycles can be achieved. More preferably, the seed crystal film can be formed on the substrate immediately after the cleaning treatment. With this configuration, the adhesion of contaminants before the substrate is used can be suppressed or substantially eliminated.
[0050] As for the material of the seed crystal film, any suitable material can be used as long as it does not impair the effects of the embodiments of the present invention. For example, Al x Ga 1-xN(0≦x≦1) or In x Ga 1-x Examples of N(0≦x≦1) include gallium nitride.
[0051] As a method for forming the seed crystal film, any suitable formation method can be adopted as long as it does not impair the effects of the embodiments of the present invention. Examples of such formation methods include vapor phase growth, preferably metal-organic chemical vapor deposition (MOCVD), hydride vapor deposition (HVPE), pulsed excitation deposition (PXD), metal-beam deposition (MBE), and sublimation. Among these, MOCVD is more preferred as a method for forming the seed crystal film.
[0052] The formation of seed crystal films by the MOCVD method is preferably carried out by, for example, depositing a low-temperature growth buffer layer of 20 nm to 50 nm at 450°C to 550°C, followed by stacking films with a thickness of 2 μm to 4 μm at 1000°C to 1200°C.
[0053] As for the growth direction of the group III element nitride crystal layer, any appropriate growth direction can be adopted as long as it does not impair the effects of the embodiments of the present invention. Examples of such growth directions include the direction normal to the c-plane of the wurtzite structure, the directions normal to the a-plane and m-plane respectively, and the directions normal to the planes inclined from the c-plane, a-plane, and m-plane respectively.
[0054] As for the method of forming the group III element nitride crystal layer, any suitable formation method can be adopted as long as it has a crystal orientation that generally follows the crystal orientation of the seed crystal film, without impairing the effects of the embodiments of the present invention. Examples of such formation methods include vapor phase growth methods such as MOCVD, HVPE, PXD, MBE, and sublimation; liquid phase growth methods such as Na flux, amonothermal, hydrothermal, and sol-gel methods; powder growth methods utilizing solid phase growth of powder; and combinations thereof.
[0055] When employing the Na flux method as a method for forming a group III element nitride crystal layer, it is preferable to perform the Na flux method in accordance with the manufacturing method described in Japanese Patent Publication No. 5244628, adjusting the conditions as appropriate to better exhibit the effects of the embodiments of the present invention.
[0056] The formation of a group III element nitride crystal layer by the Na flux method is typically carried out in a nitrogen atmosphere by placing a seed crystal substrate (underlying substrate + seed crystal film) in a crucible serving as a growth container, filling the crucible with a molten composition containing group III elements, metallic Na, and, if necessary, dopants (e.g., n-type dopants such as germanium (Ge), silicon (Si), and oxygen (O); p-type dopants such as beryllium (Be), magnesium (Mg), calcium (Ca), strontium (Sr), zinc (Zn), and cadmium (Cd); etc.), covering the crucible, placing the covered crucible in an outer container, and then placing the outer container in a pressure-resistant container, followed by heating and pressurizing in a nitrogen atmosphere, and then rotating while maintaining the temperature and pressure.
[0057] Next, by separating the group III element nitride crystal layer from the underlying substrate, a self-supporting substrate containing the group III element nitride crystal layer can be obtained.
[0058] As a method for separating the group III element nitride crystal layer from the underlying substrate, any suitable method can be adopted as long as it does not impair the effects of the embodiments of the present invention. Examples of such methods include a method of spontaneously separating the group III element nitride crystal layer from the underlying substrate by using the difference in thermal shrinkage during the cooling process after growing the group III element nitride crystal layer; a method of separating the group III element nitride crystal layer from the underlying substrate by chemical etching; a method of peeling off the group III element nitride crystal layer from the underlying substrate by a laser lift-off method by irradiating the underlying substrate with laser light from the back side of the underlying substrate; and a method of peeling off the group III element nitride crystal layer from the underlying substrate by grinding. Alternatively, a self-supporting substrate containing the group III element nitride crystal layer may be obtained by slicing the group III element nitride crystal layer using a wire saw or the like.
[0059] In this manner, the group III element nitride crystal layer obtained by the Na flux method is preferably flattened by grinding with a grinding wheel or the like, and then smoothed by lapping with diamond abrasive grains or the like.
[0060] Next, the outer periphery of the self-supporting substrate is ground to create a circular shape of the desired diameter.
[0061] The size of the self-supporting substrate can be any appropriate size, as long as it does not impair the effects of the embodiments of the present invention. Examples of such sizes include 25 mm (approximately 1 inch), 45-55 mm (approximately 2 inches), 95-105 mm (approximately 4 inches), 145-155 mm (approximately 6 inches), 195-205 mm (approximately 8 inches), and 295-305 mm (approximately 12 inches).
[0062] Next, the main surface and / or back surface are removed by grinding, lapping, polishing, etc., to thin and flatten the plate to the desired thickness, thereby obtaining a self-supporting substrate.
[0063] When performing surface processing such as grinding, lapping, and polishing, a self-supporting substrate is usually attached to the processing platen using wax or similar means. In this process, the pressure applied to the self-supporting substrate when attaching it to the processing platen, specifically the pressure applied to the self-supporting substrate when attaching it to the processing platen, should be appropriately adjusted.
[0064] The thickness of the self-supporting substrate after polishing (or the thickness at the thickest point if the thickness is not uniform) is preferably 200 μm or more, and more preferably 300 μm to 1000 μm.
[0065] If necessary, the outer edges of the self-supporting substrate are chamfered by grinding. If a processed altered layer remains on the main surface, the processed altered layer is substantially removed. Also, if residual stress remains on the back surface due to the processed altered layer, the residual stress is removed, and finally, a group III element nitride semiconductor substrate according to the embodiment of the present invention is obtained.
[0066] In the Group III element nitride semiconductor substrate according to the embodiment of the present invention, chamfering can be performed by any suitable chamfering method, as long as it does not impair the effects of the embodiment of the present invention. Examples of such chamfering methods include grinding using a diamond grinding wheel, polishing using tape, and CMP (Chemical Mechanical Polish) using a slurry such as colloidal silica and a nonwoven polishing pad.
[0067] The resulting group III element nitride semiconductor substrate allows for epitaxial crystal growth on its main surface (group III element polar surface), enabling the deposition of a functional layer and the creation of a functional device.
[0068] Examples of epitaxial crystals grown on the resulting Group III element nitride semiconductor substrate include gallium nitride, aluminum nitride, indium nitride, or mixed crystals thereof. Specific examples of such epitaxial crystals include GaN, AlN, InN, and Ga x Al 1-x N(1>x>0), Ga x In 1-x N(1>x>0), Al x In 1-x N(1>x>0), Ga x Al y In z One example is N(1>x>0, 1>y>0, x+y+z=1). In addition, functional layers to be provided on the resulting Group III element nitride semiconductor substrate include not only light-emitting layers, but also rectifier layers, switching elements, and power semiconductor layers. Furthermore, after providing the functional layers on the Group III element polar surface of the resulting Group III element nitride semiconductor substrate, the nitrogen polar surface can be processed, for example, by grinding or polishing, to reduce the thickness and thickness distribution of the self-supporting substrate.
[0069] The resulting group III element nitride semiconductor substrate and the support substrate can be bonded together to form a bonded substrate according to an embodiment of the present invention. That is, the bonded substrate according to an embodiment of the present invention is formed by bonding the group III element nitride semiconductor substrate according to an embodiment of the present invention to the support substrate.
[0070] The bonded substrate according to the embodiment of the present invention may further have any suitable layers, as long as they do not impair the effects of the embodiment of the present invention. The type, function, number, combination, arrangement, etc., of such layers can be appropriately determined according to the purpose.
[0071] The thickness of the support substrate can be any appropriate thickness, as long as it does not impair the effects of the embodiments of the present invention. For example, the thickness of the support substrate is 100 μm to 1000 μm.
[0072] Any suitable substrate can be used as the support substrate, as long as it does not impair the effects of the embodiments of the present invention. The support substrate may be made of a single crystal or a polycrystalline material.
[0073] In the bonded substrate according to the embodiment of the present invention, for example, the bonding surface of a group III element nitride semiconductor substrate and the bonding surface of a support substrate are directly bonded. Specifically, for example, the bonding surface of the support substrate and the bonding surface of the group III element nitride semiconductor substrate are placed facing each other, the bonding surface of the support substrate and the bonding surface of the group III element nitride semiconductor substrate are surface activated, and then bonded to obtain the bonded substrate according to the embodiment of the present invention. After this, a desired epitaxial film can be formed on the film deposition surface of the group III element nitride semiconductor substrate.
[0074] In the laminated substrate according to an embodiment of the present invention, for example, a bonding layer can be provided between a group III element nitride semiconductor substrate and a support substrate. Specifically, for example, the bonding surface of the bonding layer on the main surface of the support substrate and the bonding surface of the group III element nitride semiconductor substrate are faced, the bonding surface of the bonding layer and the bonding surface of the group III element nitride semiconductor substrate are surface activated, and then bonding is performed to obtain the laminated substrate according to an embodiment of the present invention. After this, a desired epitaxial film can be formed on the film deposition surface of the group III element nitride semiconductor substrate. Alternatively, the bonding layer may be provided on the main surface of the group III element nitride semiconductor substrate and the bonding surface of the bonding layer may be directly bonded to the bonding surface of the support substrate, or a first bonding layer may be provided on the main surface of the group III element nitride semiconductor substrate and a second bonding layer may be provided on the main surface of the support substrate and the bonding surface of the first bonding layer may be directly bonded to the bonding surface of the second bonding layer.
[0075] In an embodiment of the present invention, if the bonded substrate is provided between a group III element nitride semiconductor substrate and a support substrate, the bonding layer may be tantalum pentoxide, alumina, aluminum nitride, silicon carbide, sialon, or Si (1-x) O x It is preferable that at least one element is selected from the group consisting of (0.008 ≤ x ≤ 0.408). This further improves the bonding strength between the support substrate and the group III element nitride semiconductor substrate.
[0076] Furthermore, Sialon is a ceramic obtained by sintering a mixture of silicon nitride and alumina, and has the following composition. Si 6-z Al z O z N 8-z In other words, SiAlON has a composition in which alumina is mixed in silicon nitride, and z indicates the mixing ratio of alumina. z is more preferably 0.5 or higher. z is more preferably 4.0 or lower. [Examples]
[0077] The present invention will be specifically described below with reference to examples, but the present invention is not limited in any way to these examples. The test and evaluation methods in the examples are as follows. When "parts" is written, it means "parts by weight" unless otherwise specified, and when "%" is written, it means "percent by weight" unless otherwise specified.
[0078] <Measurement of the number of times N (times) of light and dark switching in a 2 mm long line segment drawn within a crossed nicol image obtained by polarizing microscope observation of a region including the central part of the first surface.> A polarizing microscope, the DM8000M from Leica Microsystems, was used. First, when performing cross-nicol observation, the observation conditions were adjusted so that neither the light nor dark areas reached their maximum or minimum brightness values. Specifically, the exposure and gain settings were adjusted, and it was confirmed from the brightness histogram of the entire image that all brightness values were less than 255 and greater than 0. Next, the magnification was set to 50x, and the illumination was adjusted so that the entire observation field had uniform brightness without unevenness. Then, an image was taken of the area including the center of the first surface of the substrate. At this time, the size of the obtained image was set to be 1824 pixels × 1368 pixels or larger. For the obtained image, ten 2mm long line segments were drawn to divide the image into 11 equal parts along the Y-axis. For each line segment, the position on the segment was plotted on the horizontal axis, and the brightness on the segment was plotted on the vertical axis. A 20% brightness line was drawn, with the maximum brightness set to 100% and the minimum brightness to 0%, and the number of times the brightness plot crossed the 20% brightness line was counted. The average of these counts for each of the ten line segments was defined as the number of times the brightness changed in the 2mm long line segment drawn within the crossed nicol image obtained by polarizing microscope observation of the region including the central part of the first surface.
[0079] <Measurement of the number of light and dark switches a (times), b (times), c (times), d (times) in a 2 mm line segment drawn in the cross-Nicol image obtained by polarized light microscopic observation of the region including points at a distance of 10 mm from the outer periphery in the vertical, horizontal, and four directions from the center when the surface of the first side is viewed in the plane direction> <The imaging location was set to each of the four regions including four points at a distance of 10 mm from the outer periphery in the vertical, horizontal, and four directions from the center when the surface of the first side was viewed in the plane direction. Otherwise, the measurement was performed in the same manner as the above <Measurement of the number of light and dark switches N (times) in a 2 mm line segment drawn in the cross-Nicol image obtained by polarized light microscopic observation of the region including the central part of the surface of the first side>.>
[0080] <Calculation of the change rate of each of a, b, c, d with respect to N> <The change rate of a with respect to N was calculated according to the following formula. The change rates of b, c, d with respect to N were also calculated in the same manner.> <Change rate (%) = |(a - N) / N| × 100>
[0081] <Occurrence rate of cracks and fractures> <For the samples for which the number of light and dark switches was evaluated, the locations of cracks and fractures were counted for the entire substrate. Cracks were confirmed by dark-field observation using a microscope. Fractures were observed visually. For each of the examples and comparative examples, 12 samples (n number = 12) were evaluated, and the total number of occurrences of cracks and fractures in all samples was divided by 12, the number of samples, to calculate the occurrence rate of cracks and fractures.>
[0082] [Example 1] A sapphire substrate (epi-ready grade) was cleaned to remove contaminants that could affect crystal growth. Using the cleaned sapphire substrate as a base, a 2 μm thick gallium nitride film was formed by the MOCVD method to create a seed crystal substrate. This seed crystal substrate was placed in an alumina crucible in a glove box under a nitrogen atmosphere. Next, metallic gallium and metallic sodium were filled into the crucible so that Ga / Ga+Na (mol%) = 15 mol%, and the crucible was covered with an alumina plate. The crucible was placed in a stainless steel inner container, which was then placed in a stainless steel outer container that could house it, and the container lid was closed. This outer container was placed on a rotating platform installed in the heating section of the crystal manufacturing apparatus, and the pressure vessel was sealed with a lid. Next, the pressure vessel was evacuated to below 0.1 Pa using a vacuum pump. Then, the upper, middle, and lower heaters were adjusted to heat the heating space to 870°C, while nitrogen gas was introduced from a nitrogen gas cylinder to 4.0 MPa. The outer container was then rotated clockwise and counterclockwise at a constant period of 20 rpm around its central axis. This state was maintained for 40 hours. After that, it was allowed to cool naturally to room temperature and reduced to atmospheric pressure. The lid of the pressure vessel was then opened and the crucible was removed. The solidified metallic sodium inside the crucible was removed, and the gallium nitride crystals that had grown on the seed crystal substrate were recovered. By irradiating the sapphire substrate with an ultraviolet laser, the gallium nitride crystal on the seed crystal substrate was decomposed, and the grown gallium nitride crystal was separated from the sapphire substrate. Next, the separated gallium nitride crystals were ground and polished to produce a wafer (1) as a gallium nitride self-supporting substrate with a diameter of 50.8 mm and a thickness of 400 μm. The number of times N (times) of light and dark switching in a 2 mm long line segment drawn within a crossed nicol image obtained by polarizing microscope observation of a region including the central part of the first surface of wafer (1) was measured. As a result, the crossed nicol image shown in Figure 2 was obtained. Ten 2 mm long line segments were drawn on the obtained image to divide the image into 11 equal parts in the Y-axis direction. For each line segment, the position on the line segment was plotted on the horizontal axis and the brightness on the line segment was plotted on the vertical axis. A line representing 20% brightness was drawn, with the maximum brightness set to 100% and the minimum brightness to 0%, resulting in 10 plot diagrams. Figure 3 is one of the 10 plot diagrams. From the 10 plots obtained, the number of times the light and dark areas switched (N) was calculated to be N = 137. Next, the number of times the light and dark areas switched between light and dark was measured in a 2 mm long line segment drawn within a crossed nicol image obtained by polarizing microscope observation of a region including points in the up, down, left, and right directions from the center and at a distance of 10 mm from the outer edge when the surface of the first surface of wafer (1) is viewed from the planar direction. Similarly to the above, a crossed nicol image and a plot were obtained, and the number of light and dark switching times a (times), b (times), c (times), and d (times) were determined. The results were a=144, b=127, c=141, and d=136, and the rates of change of a, b, c, and d with respect to N were 5%, 7%, 3%, and 1%, respectively. Eleven more wafers were produced using the same manufacturing method as wafer (1). The number of light-dark switching cycles N (times) for all 12 wafers obtained was 30 or more, and the rate of change in the number of switching cycles in the up, down, left, and right directions relative to the number of switching cycles in the center was all within 20%. The incidence of cracks and fractures in the 12 samples, including wafer (1), was 8%.
[0083] [Comparative Example 1] A sapphire substrate (epiledigrade) was used as the base substrate, and a 2 μm thick gallium nitride film was formed by the MOCVD method to create a seed crystal substrate. This seed crystal substrate was placed in an alumina crucible in a glove box under a nitrogen atmosphere. Next, metallic gallium and metallic sodium were filled into the crucible so that Ga / Ga+Na (mol%) = 15 mol%, and the crucible was covered with an alumina plate. The crucible was placed in a stainless steel inner container, which was then placed in a stainless steel outer container that could house it, and the container lid was closed. This outer container was placed on a rotating platform installed in the heating section of the crystal manufacturing apparatus, and the pressure vessel was sealed with a lid. Next, the pressure vessel was evacuated to below 0.1 Pa using a vacuum pump. Then, the upper, middle, and lower heaters were adjusted to heat the heating space to 870°C, while nitrogen gas was introduced from a nitrogen gas cylinder to 4.0 MPa. The outer container was then rotated clockwise and counterclockwise at a constant period of 20 rpm around its central axis. This state was maintained for 40 hours. After that, it was allowed to cool naturally to room temperature and reduced to atmospheric pressure. The lid of the pressure vessel was then opened and the crucible was removed. The solidified metallic sodium inside the crucible was removed, and the gallium nitride crystals that had grown on the seed crystal substrate were recovered. By irradiating the sapphire substrate with an ultraviolet laser, the gallium nitride crystal on the seed crystal substrate was decomposed, and the grown gallium nitride crystal was separated from the sapphire substrate. Next, the separated gallium nitride crystals were ground and polished to produce a wafer (C1) as a gallium nitride self-supporting substrate with a diameter of 50.8 mm and a thickness of 400 μm. The number of times N (times) of light and dark switching in a 2 mm long line segment drawn within a crossed nicol image obtained by polarizing microscope observation of a region including the central part of the first surface of wafer (C1) was measured. As a result, the crossed nicol image shown in Figure 4 was obtained. Ten 2 mm long line segments were drawn on the obtained image to divide the image into 11 equal parts in the Y-axis direction. For each line segment, the position on the line segment was plotted on the horizontal axis and the brightness on the line segment was plotted on the vertical axis. A line representing 20% brightness was drawn, with the maximum brightness set to 100% and the minimum brightness to 0%, resulting in 10 plot figures. Figure 5 is one of the 10 plot figures. From the 10 plots obtained, the number of times the light and dark areas switched (N) was calculated to be N=24. Next, the number of times the light and dark areas switched between light and dark was measured in a 2 mm long line segment drawn within a crossed nicol image obtained by polarizing microscope observation of a region including points 10 mm from the outer edge in the up, down, left, and right directions from the center when the first surface of the wafer (C1) is viewed from the planar direction. Similarly to the above, a crossed nicol image and a plot were obtained, and the number of light and dark switching times a (times), b (times), c (times), and d (times) were determined. The results were a=18, b=26, c=8, and d=28, and the rates of change of a, b, c, and d with respect to N were 25%, 8%, 67%, and 16%, respectively. Eleven more wafers were fabricated using the same manufacturing method as wafer (C1). The number of light-dark switching cycles N (times) for all 12 wafers obtained was 29 or less, and there were measurement points where the rate of change in the switching cycles in the up, down, left, and right directions relative to the switching cycles in the center exceeded 20%. The incidence of cracks and fractures in the 12 samples, including wafer (C1), was 33%. [Industrial applicability]
[0084] The group III element nitride semiconductor substrate according to the embodiment of the present invention can be used as a substrate for various semiconductor devices. [Explanation of symbols]
[0085] 100 Group III element nitride semiconductor substrates 10 Main surface 20 Back side 30 Side view
Claims
1. A semiconductor substrate made of a group III element nitride, comprising a first surface and a second surface, The nitride of Group III elements is gallium nitride. The thickness is 200 μm or more. The number of times N changes between light and dark in a 2 mm long line segment drawn within a crossed nicol image obtained by polarizing microscope observation of a region including the central part of the first surface is 50 or more. Group III element nitride semiconductor substrate.
2. A semiconductor substrate made of a group III element nitride, comprising a first surface and a second surface, The nitride of Group III elements is gallium nitride. The thickness is 200 μm or more. Let N be the number of times the light and dark areas switch in a 2 mm long line segment drawn within the crossed nicol image obtained by polarizing microscope observation of a region including the central part of the surface of the first surface. When the surface of the first surface is viewed from a planar direction, the number of times the light and dark areas change in a 2 mm long line segment drawn within the crossed nicol image obtained by polarizing microscope observation of a region to the right of the center and at a distance of 10 mm from the outer edge is denoted as 'a'. When the surface of the first surface is viewed from a planar direction, the number of times the light and dark areas change in a 2 mm long line segment drawn within the crossed nicol image obtained by polarizing microscope observation of a region including a point to the left of the center and at a distance of 10 mm from the outer edge is denoted as b times. When the surface of the first surface is viewed from a planar direction, the number of times the light and dark areas switch in a 2 mm long line segment drawn within the crossed nicol image obtained by polarizing microscope observation of a region including a point above the center and at a distance of 10 mm from the outer edge is denoted as c. When the surface of the first surface is viewed from a planar direction, and a polarizing microscope is used to observe a region including a point 10 mm from the outer edge, the number of times the light and dark areas change in a 2 mm long line segment drawn within the crossed nicol image is denoted as d. The rate of change of N for each of a, b, c, and d is all within 20%. Group III element nitride semiconductor substrate.
3. The group III element nitride semiconductor substrate according to claim 1 or 2, wherein the maximum length between the points of light and dark transition is 700 μm or less.
4. The group III element nitride semiconductor substrate according to claim 1 or 2, wherein the diameter of the substrate is 45 mm or more.
5. A support substrate is bonded to a group III element nitride semiconductor substrate according to claim 1 or 2. Bonded circuit board.
Citation Information
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