Semiconductor equipment

Abstract

This semiconductor device comprises a conductive substrate, a plurality of first semiconductor elements, and a first conductive member. The conductive substrate has a main surface directed toward one side in the thickness direction thereof. The plurality of first semiconductor elements are joined to the main surface and each have a switching function. The first conductive member includes: a first wiring part extending in an x-direction perpendicular to the thickness direction; a second wiring part which is spaced apart from the first wiring part in a y-direction perpendicular to both the thickness direction and the x-direction, and extends in the x-direction; a third wiring part which is connected to the first wiring part 51 and the second wiring part 52, extends in the y-direction, and is connected to the plurality of first semiconductor elements; a fourth wiring part which is spaced apart from the third wiring part in the x-direction, is connected to the first wiring part and the second wiring part, and extends in the y-direction; and a fifth wiring part which is located between the first wiring part and the second wiring part in the y-direction, and is connected to the third wiring part and the fourth wiring part.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device.

Background Art

[0002] Conventionally, semiconductor devices including power switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors) are known. Such semiconductor devices are mounted in various electronic devices ranging from industrial equipment to home appliances, information terminals, and automotive equipment. Patent Document 1 discloses a conventional semiconductor device (power module). The semiconductor device described in Patent Document 1 includes a semiconductor element and a support substrate. The semiconductor element is, for example, an IGBT made of Si (silicon). The support substrate supports the semiconductor element. The support substrate includes an insulating base material and conductor layers laminated on the front and back surfaces of the base material. The base material is made of, for example, ceramic. Each conductor layer is made of, for example, Cu (copper), and the semiconductor element is joined to one of the conductor layers.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In recent years, higher performance and miniaturization of electronic devices have been demanded. For this purpose, improvement in performance and miniaturization of semiconductor modules mounted in electronic devices are required.

[0005] This disclosure was conceived under the circumstances described above, and one of its objectives is to provide a semiconductor device (semiconductor module) that can meet the aforementioned requirements. Another objective of this disclosure is to provide a semiconductor device suitable for carrying high currents.

[0006] The semiconductor device provided by this disclosure comprises a conductive substrate having a main surface facing one side in the thickness direction and a back surface facing the opposite side from the main surface, a plurality of first semiconductor elements bonded to the main surface and having a switching function, and a first conductive member that constitutes a path for a main circuit current switched by the plurality of first semiconductor elements, wherein the first conductive member includes a first wiring section, a second wiring section, a third wiring section, a fourth wiring section, and a fifth wiring section, the first wiring section extending in a first direction perpendicular to the thickness direction, and the second wiring section extending in the thickness direction and the first direction relative to the first wiring section The third wiring section is separated in a second direction perpendicular to both of the first and second wiring sections and extends in the first direction, the fourth wiring section is separated from the third wiring section in the first direction and extends in the second direction, the fifth wiring section is located between the first and second wiring sections in the second direction and is connected to both the third and fourth wiring sections, and the third wiring section is connected to the plurality of first semiconductor elements. [Effects of the Invention]

[0007] The semiconductor device of this disclosure can, for example, provide a structure that is favorable for conducting large currents.

[0008] Other features and advantages of this disclosure will become more apparent from the detailed description below, with reference to the accompanying drawings. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 is a perspective view showing a semiconductor device according to the first embodiment of this disclosure. [Figure 2] Figure 2 is a perspective view of Figure 1, with the sealing resin omitted. [Figure 3] Figure 3 is a perspective view of Figure 2, with the first conductive member omitted. [Figure 4] Figure 4 is a plan view of the semiconductor device shown in Figure 1. [Figure 5] Figure 5 is a plan view of Figure 4, with the sealing resin indicated by dashed lines. [Figure 6] Figure 6 is a right side view of the semiconductor device shown in Figure 1, with the sealing resin indicated by dashed lines. [Figure 7] Figure 7 is a partially enlarged view of a portion of Figure 5, with the sealing resin omitted. [Figure 8] Figure 8 is a plan view of the first conductive member. [Figure 9] Figure 9 is a plan view of Figure 5, but with the sealing resin and the first conductive member omitted, and the second conductive member indicated by dashed lines. [Figure 10] Figure 10 is a right side view of the semiconductor device shown in Figure 1. [Figure 11] Figure 11 is a bottom view of the semiconductor device shown in Figure 1. [Figure 12] Figure 12 is a cross-sectional view along the line XII-XII in Figure 5. [Figure 13] Figure 13 is a cross-sectional view along the line XIII-XIII in Figure 5. [Figure 14] Figure 14 is a magnified view of a portion of Figure 13. [Figure 15] Figure 15 is a magnified view of a portion of Figure 13. [Figure 16] Figure 16 is a cross-sectional view along the line XVI-XVI in Figure 5. [Figure 17] Figure 17 is a cross-sectional view along the line XVII-XVII in Figure 5. [Figure 18] Figure 18 is a cross-sectional view along the line XVIII-XVIII in Figure 5. [Figure 19] Figure 19 is a plan view similar to Figure 7 (with the sealing resin omitted) showing a semiconductor device according to a modified example of the first embodiment. [Figure 20] Figure 20 is a cross-sectional view taken along line XX-XX of Figure 19. [Figure 21] Figure 21 is a cross-sectional view taken along line XXI-XXI of Figure 19.

Best Mode for Carrying Out the Invention

[0010] Hereinafter, preferred embodiments of the present disclosure will be specifically described with reference to the drawings.

[0011] In the present disclosure, terms such as "first", "second", "third", etc. are merely used as labels and are not necessarily intended to assign an order to their objects.

[0012] In the present disclosure, "a certain object A is formed on a certain object B" and "a certain object A is formed above a certain object B" include, unless otherwise specified, "a certain object A is directly formed on a certain object B" and "a certain object A is formed on a certain object B with another object intervening between a certain object A and a certain object B". Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed above a certain object B" include, unless otherwise specified, "a certain object A is directly disposed on a certain object B" and "a certain object A is disposed on a certain object B with another object intervening between a certain object A and a certain object B". Similarly, "a certain object A is located above a certain object B" includes, unless otherwise specified, "a certain object A is in contact with a certain object B and a certain object A is located above a certain object B" and "a certain object A is located above a certain object B with another object intervening between a certain object A and a certain object B". Further, "a certain object A overlaps a certain object B when viewed in a certain direction" includes, unless otherwise specified, "a certain object A completely overlaps a certain object B" and "a certain object A partially overlaps a certain object B".

[0013] Figures 1 to 18 show a semiconductor device according to the first embodiment of the present disclosure. The semiconductor device A1 of this embodiment comprises a plurality of first semiconductor elements 10A, a plurality of second semiconductor elements 10B, a conductive substrate 2, a support substrate 3, a first terminal 41, a second terminal 42, a plurality of third terminals 43, a fourth terminal 44, a plurality of control terminals 45, a control terminal support 48, a first conductive member 5, a second conductive member 6, and a sealing resin 8.

[0014] Figure 1 is a perspective view of semiconductor device A1. Figure 2 is a perspective view of Figure 1 with the sealing resin 8 omitted. Figure 3 is a perspective view of Figure 2 with the first conductive member 5 omitted. Figure 4 is a plan view of semiconductor device A1. Figure 5 is a plan view of Figure 4 with the sealing resin 8 indicated by dashed lines. Figure 6 is a right side view of semiconductor device A1 with the sealing resin 8 indicated by dashed lines. Figure 7 is a partially enlarged view of a part of Figure 5 with the sealing resin 8 omitted. Figure 8 is a plan view of the first conductive member 5. Figure 9 is a plan view of Figure 5 with the sealing resin 8 and the first conductive member 5 omitted, and the second conductive member 6 indicated by dashed lines. Figure 10 is a right side view of semiconductor device A1. Figure 11 is a bottom view of semiconductor device A1. Figure 12 is a cross-sectional view along line XII-XII in Figure 5. Figure 13 is a cross-sectional view along line XIII-XIII in Figure 5. Figures 14 and 15 are enlarged partial views of a portion of Figure 13. Figure 16 is a cross-sectional view along the line XVI-XVI in Figure 5. Figure 17 is a cross-sectional view along the line XVII-XVII in Figure 5. Figure 18 is a cross-sectional view along the line XVIII-XVIII in Figure 5.

[0015] For the sake of explanation, we will refer to three mutually orthogonal directions (x, y, and z directions). The z direction is, for example, the thickness direction of semiconductor device A1. The x direction is the left-right direction in the plan view of semiconductor device A1 (see Figure 4). The y direction is the up-down direction in the plan view of semiconductor device A1 (see Figure 4). In the following explanation, "plan view" refers to the view in the z direction. The x direction is an example of a "first direction," and the y direction is an example of a "second direction."

[0016] Each of the multiple first semiconductor elements 10A and each of the multiple second semiconductor elements 10B are electronic components that form the functional core of the semiconductor device A1. The constituent material of each first semiconductor element 10A and each second semiconductor element 10B is a semiconductor material mainly composed of, for example, SiC (silicon carbide). This semiconductor material is not limited to SiC, but may also be Si (silicon), GaN (gallium nitride), or C (diamond), etc. Each first semiconductor element 10A and each second semiconductor element 10B are power semiconductor chips having a switching function, such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). In this embodiment, the case where the first semiconductor elements 10A and each second semiconductor element 10B are MOSFETs is shown, but it is not limited to this, and other transistors such as IGBTs (Insulated Gate Bipolar Transistors) may also be used. Each first semiconductor element 10A and each second semiconductor element 10B are all identical elements. Each first semiconductor element 10A and each second semiconductor element 10B are, for example, n-channel type MOSFETs, but may also be p-channel type MOSFETs.

[0017] As shown in Figures 14 and 15, the first semiconductor element 10A and the second semiconductor element 10B each have a main surface 101 and a back surface 102. In each first semiconductor element 10A and each second semiconductor element 10B, the main surface 101 and the back surface 102 are spaced apart in the z direction. The main surface 101 faces in the z2 direction, and the back surface 102 faces in the z1 direction.

[0018] In this embodiment, the semiconductor device A1 comprises four first semiconductor elements 10A and four second semiconductor elements 10B. However, the number of first semiconductor elements 10A and the number of second semiconductor elements 10B are not limited to this configuration and can be appropriately changed according to the performance required of the semiconductor device A1. In the example shown in Figure 9, four first semiconductor elements 10A and four second semiconductor elements 10B are arranged. The number of first semiconductor elements 10A and two second semiconductor elements 10B may be two or three, or five or more. The number of first semiconductor elements 10A and two second semiconductor elements 10B may be equal or different. The number of first semiconductor elements 10A and two second semiconductor elements 10B is determined by the current capacity handled by the semiconductor device A1.

[0019] The semiconductor device A1 is configured, for example, as a half-bridge type switching circuit. In this case, a plurality of second semiconductor elements 10B constitute the upper arm circuit of the semiconductor device A1, and a plurality of first semiconductor elements 10A constitute the lower arm circuit. In the upper arm circuit, the plurality of second semiconductor elements 10B are connected in parallel with each other, and in the lower arm circuit, the plurality of first semiconductor elements 10A are connected in parallel with each other. Each second semiconductor element 10B and each first semiconductor element 10A are connected in series to form a bridge layer.

[0020] Each of the multiple first semiconductor elements 10A is mounted on the conductive substrate 2, as shown in Figures 9 and 17. In the example shown in Figure 9, the multiple first semiconductor elements 10A are arranged, for example, in the y-direction and spaced apart from one another. Each first semiconductor element 10A is electrically bonded to the conductive substrate 2 (the first conductive portion 2A described later) via a conductive bonding material 19. When each first semiconductor element 10A is bonded to the first conductive portion 2A, the back surface 102 of the element faces the first conductive portion 2A.

[0021] Each of the multiple second semiconductor elements 10B is mounted on the conductive substrate 2, as shown in Figures 9 and 18. In the example shown in Figure 9, the multiple second semiconductor elements 10B are arranged, for example, in the y-direction and spaced apart from one another. Each second semiconductor element 10B is electrically bonded to the conductive substrate 2 (the second conductive portion 2B described later) via a conductive bonding material 19. When each second semiconductor element 10B is bonded to the second conductive portion 2B, the back surface 102 of the element faces the second conductive portion 2B. As can be seen from Figure 9, when viewed in the x-direction, the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B overlap, but do not necessarily overlap.

[0022] Each of the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B has a first main surface electrode 11, a second main surface electrode 12, a third main surface electrode 13, and a back surface electrode 15. The configurations of the first main surface electrode 11, the second main surface electrode 12, the third main surface electrode 13, and the back surface electrode 15, as described below, are common to each of the first semiconductor elements 10A and each of the second semiconductor elements 10B. The first main surface electrode 11, the second main surface electrode 12, and the third main surface electrode 13 are provided on the main surface 101 of the element. The first main surface electrode 11, the second main surface electrode 12, and the third main surface electrode 13 are insulated by an insulating film (not shown). The back surface electrode 15 is provided on the back surface 102 of the element.

[0023] The first main surface electrode 11 is, for example, a gate electrode, to which a drive signal (for example, a gate voltage) for driving the first semiconductor element 10A (second semiconductor element 10B) is input. In the first semiconductor element 10A (second semiconductor element 10B), the second main surface electrode 12 is, for example, a source electrode, through which a source current flows. The third main surface electrode 13 is, for example, a source sense electrode, through which a source current flows. The back surface electrode 15 is, for example, a drain electrode, through which a drain current flows. The back surface electrode 15 covers the entire (or substantially the entire) surface of the element back surface 102. The back surface electrode 15 is, for example, made of Ag (silver) plating.

[0024] Each first semiconductor element 10A (each second semiconductor element 10B) switches between a conduction state and an interrupted state in response to a drive signal (gate voltage) input to the first main surface electrode 11 (gate electrode). In the conduction state, current flows from the back surface electrode 15 (drain electrode) to the second main surface electrode 12 (source electrode), and in the interrupted state, this current does not flow. In other words, each first semiconductor element 10A (each second semiconductor element 10B) performs a switching operation. The semiconductor device A1, through the switching function of the multiple first semiconductor elements 10A and multiple second semiconductor elements 10B, converts the DC voltage input between one fourth terminal 44 and two first terminals 41 and second terminals 42 into, for example, an AC voltage, and outputs the AC voltage from the third terminal 43.

[0025] As shown in Figures 5 and 9, semiconductor device A1 includes a thermistor 17. The thermistor 17 is used as a temperature detection sensor.

[0026] The conductive substrate 2 supports a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B. The conductive substrate 2 is bonded to the support substrate 3 via a conductive bonding material 29. The conductive substrate 2 is, for example, rectangular in plan view. Together with the first conductive member 5 and the second conductive member 6, the conductive substrate 2 constitutes a path for the main circuit current switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B.

[0027] The conductive substrate 2 includes a first conductive portion 2A and a second conductive portion 2B. The first conductive portion 2A and the second conductive portion 2B are each metal plate-shaped members. This metal is, for example, Cu (copper) or a Cu alloy. The first conductive portion 2A and the second conductive portion 2B, together with a first terminal 41, a second terminal 42, a plurality of third terminals 43, and a fourth terminal 44, constitute a conductive path to a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B. The first conductive portion 2A and the second conductive portion 2B are each bonded to the support substrate 3 via a conductive bonding material 29, as shown in Figures 12 to 18. A plurality of first semiconductor elements 10A are each bonded to the first conductive portion 2A via the conductive bonding material 19. A plurality of second semiconductor elements 10B are each bonded to the second conductive portion 2B via the conductive bonding material 19. The constituent materials of the conductive bonding material 19 and the conductive bonding material 29 are not particularly limited and may be solder, metal paste, or sintered metal. The first conductive part 2A and the second conductive part 2B are spaced apart in the x-direction, as shown in Figures 3, 9, 12, and 13. In the examples shown in these figures, the first conductive part 2A is located in the x1 direction more than the second conductive part 2B. The first conductive part 2A and the second conductive part 2B are, for example, rectangular in plan view. The first conductive part 2A and the second conductive part 2B overlap when viewed in the x-direction. The first conductive part 2A and the second conductive part 2B have dimensions of, for example, 15 mm to 25 mm in the x-direction, 30 mm to 40 mm in the y-direction, and 1.0 mm to 5.0 mm (preferably about 2.0 mm) in the z-direction.

[0028] The conductive substrate 2 has a main surface 201 and a back surface 202. The main surface 201 and the back surface 202 are spaced apart in the z direction, as shown in Figures 12, 13, and 16-18. The main surface 201 faces in the z2 direction, and the back surface 202 faces in the z1 direction. The main surface 201 is formed by combining the upper surface of the first conductive part 2A and the upper surface of the second conductive part 2B. The back surface 202 is formed by combining the lower surface of the first conductive part 2A and the lower surface of the second conductive part 2B. The back surface 202 is bonded to the support substrate 3 so as to face the support substrate 3.

[0029] The support substrate 3 supports the conductive substrate 2. The support substrate 3 is made of, for example, an AMB (Active Metal Brazing) substrate. The support substrate 3 includes an insulating layer 31, a first metal layer 32, and a second metal layer 33.

[0030] The insulating layer 31 is, for example, a ceramic with excellent thermal conductivity. Such a ceramic is, for example, SiN (silicon nitride). The insulating layer 31 is not limited to ceramics; it may also be an insulating resin sheet or the like. The insulating layer 31 is, for example, rectangular in plan view.

[0031] The first metal layer 32 is formed on the upper surface (the surface facing the z2 direction) of the insulating layer 31. The constituent material of the first metal layer 32 includes, for example, Cu. The constituent material may also include Al (aluminum) instead of Cu. The first metal layer 32 includes a first portion 32A and a second portion 32B. The first portion 32A and the second portion 32B are spaced apart in the x direction. The first portion 32A is located on the x1 side of the second portion 32B. The first portion 32A is joined to and supports the first conductive portion 2A. The second portion 32B is joined to and supports the second conductive portion 2B. The first portion 32A and the second portion 32B are each, for example, rectangular in plan view.

[0032] The second metal layer 33 is formed on the lower surface (the surface facing the z1 direction) of the insulating layer 31. The constituent material of the second metal layer 33 is the same as the constituent material of the first metal layer 32. In the example shown in Figure 11, the lower surface (bottom surface 302, described later) of the second metal layer 33 is exposed from the sealing resin 8, for example. This lower surface may not be exposed from the sealing resin 8, but may be covered by the sealing resin 8. In a plan view, the second metal layer 33 overlaps both the first portion 32A and the second portion 32B.

[0033] As shown in Figures 12 to 18, the support substrate 3 has a support surface 301 and a bottom surface 302. The support surface 301 and the bottom surface 302 are spaced apart in the z direction. The support surface 301 faces in the z2 direction, and the bottom surface 302 faces in the z1 direction. As shown in Figure 11, the bottom surface 302 is exposed from the sealing resin 8. The support surface 301 is the upper surface of the first metal layer 32, and is the sum of the upper surface of the first portion 32A and the upper surface of the second portion 32B. The support surface 301 faces the conductive substrate 2, to which the conductive substrate 2 is bonded. The bottom surface 302 is the lower surface of the second metal layer 33. A heat dissipation member (e.g., a heat sink) not shown can be attached to the bottom surface 302. The z-direction dimension of the support substrate 3 (distance along the z direction from the support surface 301 to the bottom surface 302) is, for example, 0.7 mm to 2.0 mm.

[0034] The first terminal 41, the second terminal 42, the multiple third terminals 43, and the fourth terminal 44 are each made of a plate-shaped metal plate. The material of this metal plate is, for example, Cu or a Cu alloy. In the examples shown in Figures 1 to 5, Figure 9, and Figure 11, the semiconductor device A1 has one first terminal 41, one second terminal 42, and one fourth terminal 44, and two third terminals 43.

[0035] The first terminal 41, the second terminal 42, and the fourth terminal 44 receive a DC voltage to be converted. The fourth terminal 44 is the positive terminal (P terminal), while the first terminal 41 and the second terminal 42 are negative terminals (N terminals). Multiple third terminals 43 output AC voltages converted by the first semiconductor element 10A and the second semiconductor element 10B. The first terminal 41, the second terminal 42, the multiple third terminals 43, and the fourth terminal 44 each include a portion covered by the sealing resin 8 and a portion exposed from the sealing resin 8.

[0036] As shown in Figure 13, the fourth terminal 44 is integrally formed with the second conductive portion 2B. In contrast to this configuration, the fourth terminal 44 may be separated from the second conductive portion 2B and electrically connected to the second conductive portion 2B. As shown in Figure 9 and other figures, the fourth terminal 44 is located on the x2 direction side with respect to the plurality of second semiconductor elements 10B and the second conductive portion 2B (conductive substrate 2). The fourth terminal 44 is electrically connected to the second conductive portion 2B and, via the second conductive portion 2B, is electrically connected to the back electrode 15 (drain electrode) of each second semiconductor element 10B.

[0037] The first terminal 41 and the second terminal 42 are spaced apart from the second conductive portion 2B, as shown in Figure 9. The first conductive member 5 is joined to the first terminal 41 and the second terminal 42, as shown in Figures 5 and 7. The first terminal 41 and the second terminal 42 are located on the x2 side with respect to the plurality of second semiconductor elements 10B and the second conductive portion 2B (conductive substrate 2), as shown in Figures 5, 9, etc. The first terminal 41 and the second terminal 42 are electrically connected to the first conductive member 5 and, via the first conductive member 5, are electrically connected to the second main surface electrode 12 (source electrode) of each first semiconductor element 10A.

[0038] As shown in Figures 1 to 5 and Figure 11, the first terminal 41, the second terminal 42, and the fourth terminal 44 each protrude from the sealing resin 8 in the x2 direction in the semiconductor device A1. The first terminal 41, the second terminal 42, and the fourth terminal 44 are spaced apart from each other. The first terminal 41 and the second terminal 42 are located on opposite sides of the fourth terminal 44 in the y direction. The first terminal 41 is located on the y2 side of the fourth terminal 44, and the second terminal 42 is located on the y1 side of the fourth terminal 44. The first terminal 41, the second terminal 42, and the fourth terminal 44 overlap each other when viewed in the y direction.

[0039] The two third terminals 43 are formed integrally with the first conductive portion 2A, as can be seen from Figures 9 and 12. In contrast to this configuration, the third terminals 43 may be separated from the first conductive portion 2A and electrically connected to the first conductive portion 2A. The two third terminals 43 are located on the x1 side with respect to the plurality of first semiconductor elements 10A and the first conductive portion 2A (conductive substrate 2), as shown in Figure 9 and other figures. Each third terminal 43 is electrically connected to the first conductive portion 2A and, via the first conductive portion 2A, to the back electrode 15 (drain electrode) of each first semiconductor element 10A. The number of third terminals 43 is not limited to two; for example, there may be one or three or more. For example, if there is only one third terminal 43, it is desirable that it is connected to the central portion of the first conductive portion 2A in the y direction.

[0040] Each of the control terminals 45 is a pin-shaped terminal for controlling each first semiconductor element 10A and each second semiconductor element 10B. The control terminals 45 include multiple first control terminals 46A to 46D and multiple second control terminals 47A to 47E. The multiple first control terminals 46A to 46D are used for controlling each first semiconductor element 10A, etc. The multiple second control terminals 47A to 47E are used for controlling each second semiconductor element 10B, etc.

[0041] Multiple first control terminals 46A to 46D are arranged at intervals in the y-direction. Each first control terminal 46A to 46D is supported by the first conductive part 2A via a control terminal support 48 (first support part 48A described later), as shown in Figures 9 and 13. Each first control terminal 46A to 46D is located in the x-direction between multiple first semiconductor elements 10A and two third terminals 43, as shown in Figures 5 and 9.

[0042] The first control terminal 46A is a terminal (gate terminal) for inputting drive signals to multiple first semiconductor elements 10A. Drive signals for driving multiple first semiconductor elements 10A are input to the first control terminal 46A (for example, a gate voltage is applied).

[0043] The first control terminal 46B is a source sense terminal for detecting the source signals of multiple first semiconductor elements 10A. The voltage applied to each second main surface electrode 12 (source electrode) of multiple first semiconductor elements 10A (voltage corresponding to the source current) is detected from the first control terminal 46B.

[0044] The first control terminals 46C and 46D are terminals that conduct to the thermistor 17.

[0045] Multiple second control terminals 47A to 47E are arranged at intervals in the y-direction. Each second control terminal 47A to 47E is supported by the second conductive part 2B via a control terminal support 48 (second support part 48B described later), as shown in Figures 9 and 13. Each second control terminal 47A to 47E is located in the x-direction between multiple second semiconductor elements 10B and the first terminal 41, second terminal 42, and fourth terminal 44, as shown in Figures 5 and 9.

[0046] The second control terminal 47A is a terminal (gate terminal) for inputting drive signals to multiple second semiconductor elements 10B. Drive signals for driving multiple second semiconductor elements 10B are input to the second control terminal 47A (for example, a gate voltage is applied). The second control terminal 47B is a terminal (source sense terminal) for detecting source signals to multiple second semiconductor elements 10B. The voltage applied to each second main surface electrode 12 (source electrode) of multiple second semiconductor elements 10B (voltage corresponding to the source current) is detected from the second control terminal 47B. The second control terminals 47C and 47D are terminals that conduct to the thermistor 17. The second control terminal 47E is a terminal (drain sense terminal) for detecting drain signals to multiple second semiconductor elements 10B. The voltage applied to each back surface electrode 15 (drain electrode) of multiple second semiconductor elements 10B (voltage corresponding to the drain current) is detected from the second control terminal 47E.

[0047] Each of the control terminals 45 (multiple first control terminals 46A to 46D and multiple second control terminals 47A to 47E) includes a holder 451 and a metal pin 452.

[0048] The holder 451 is made of a conductive material. As shown in Figures 14 and 15, the holder 451 is bonded to the control terminal support 48 (the first metal layer 482 described later) via a conductive bonding material 459. The holder 451 includes a cylindrical portion, an upper flange portion, and a lower flange portion. The upper flange portion connects to the upper part of the cylindrical portion, and the lower flange portion connects to the lower part of the cylindrical portion. A metal pin 452 is inserted through at least the upper flange portion and the cylindrical portion of the holder 451. The holder 451 is covered with a sealing resin 8 (the second projection 852 described later).

[0049] The metal pin 452 is a rod-shaped member extending in the z direction. The metal pin 452 is supported by being press-fitted into the holder 451. The metal pin 452 is electrically connected to the control terminal support 48 (the first metal layer 482 described later) at least via the holder 451. As shown in the examples in Figures 14 and 15, when the lower end of the metal pin 452 (the end on the z1 direction side) is in contact with the conductive bonding material 459 within the insertion hole of the holder 451, the metal pin 452 is electrically connected to the control terminal support 48 via the conductive bonding material 459.

[0050] The control terminal support 48 supports a plurality of control terminals 45. In the z-direction, the control terminal support 48 is interposed between the main surface 201 (conductive substrate 2) and the plurality of control terminals 45.

[0051] The control terminal support 48 includes a first support portion 48A and a second support portion 48B. The first support portion 48A is positioned on the first conductive portion 2A of the conductive substrate 2 and supports multiple first control terminals 46A to 46D of the multiple control terminals 45. As shown in Figure 14, the first support portion 48A is bonded to the first conductive portion 2A via a bonding material 49. The bonding material 49 may be conductive or insulating, but solder, for example, is used. The second support portion 48B is positioned on the second conductive portion 2B of the conductive substrate 2 and supports multiple second control terminals 47A to 47E of the multiple control terminals 45. As shown in Figure 15, the second support portion 48B is bonded to the second conductive portion 2B via a bonding material 49.

[0052] The control terminal support 48 (each of the first support portion 48A and the second support portion 48B) is made of, for example, a DBC (Direct Bonded Copper) substrate. The control terminal support 48 has an insulating layer 481, a first metal layer 482, and a second metal layer 483 that are stacked on top of each other.

[0053] The insulating layer 481 is made of, for example, ceramics. The insulating layer 481 is, for example, rectangular in plan view.

[0054] The first metal layer 482 is formed on the upper surface of the insulating layer 481, as shown in Figures 14 and 15. Each control terminal 45 is erected on the first metal layer 482. The first metal layer 482 is, for example, Cu or a Cu alloy. As shown in Figure 9, the first metal layer 482 includes a first portion 482A, a second portion 482B, a third portion 482C, a fourth portion 482D, a fifth portion 482E, and a sixth portion 482F. The first portion 482A, the second portion 482B, the third portion 482C, the fourth portion 482D, the fifth portion 482E, and the sixth portion 482F are spaced apart from each other and insulated from each other.

[0055] The first section 482A has multiple wires 71 joined to it, and each wire 71 provides electrical conductivity to the first main surface electrode 11 (gate electrode) of each first semiconductor element 10A (each second semiconductor element 10B). The first section 482A and the sixth section 482F are connected by multiple wires 73. As a result, the sixth section 482F provides electrical conductivity to the first main surface electrode 11 (gate electrode) of each first semiconductor element 10A (each second semiconductor element 10B) via wires 73 and wires 71. As shown in Figure 9, the first control terminal 46A is joined to the sixth section 482F of the first support section 48A, and the second control terminal 47A is joined to the sixth section 482F of the second support section 48B.

[0056] The second portion 482B has multiple wires 72 joined to it, and each wire 72 provides electrical conductivity to the second main surface electrode 12 (source electrode) of each first semiconductor element 10A (each second semiconductor element 10B). As shown in Figure 9, the first control terminal 46B is joined to the second portion 482B of the first support portion 48A, and the second control terminal 47B is joined to the second portion 482B of the second support portion 48B.

[0057] The third section 482C and the fourth section 482D are connected to the thermistor 17. As shown in Figure 9, the first control terminals 46C and 46D are connected to the third section 482C and the fourth section 482D of the first support section 48A, and the second control terminals 47C and 47D are connected to the third section 482C and the fourth section 482D of the second support section 48B.

[0058] The fifth portion 482E of the first support portion 48A is not electrically connected to the other components. The fifth portion 482E of the second support portion 48B is joined to a wire 74, and is electrically connected to the second conductive portion 2B via the wire 74. As shown in Figure 9, the second control terminal 47E is joined to the fifth portion 482E of the second support portion 48B. Each of the above wires 71 to 74 is, for example, a bonding wire. The constituent material of each wire 71 to 74 includes, for example, Au (gold), Al, or Cu.

[0059] The second metal layer 483 is formed on the lower surface of the insulating layer 481, as shown in Figures 14 and 15. The second metal layer 483 of the first support portion 48A is joined to the first conductive portion 2A via a bonding material 49, as shown in Figure 14. The second metal layer 483 of the second support portion 48B is joined to the second conductive portion 2B via a bonding material 49, as shown in Figure 15.

[0060] The first conductive member 5 and the second conductive member 6, together with the conductive substrate 2, constitute a path for the main circuit current switched by a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B. The first conductive member 5 and the second conductive member 6 are spaced apart from the main surface 201 (conductive substrate 2) in the z2 direction and overlap the main surface 201 in a plan view. In this embodiment, the first conductive member 5 and the second conductive member 6 are each made of a metal plate. The metal is, for example, Cu or a Cu alloy. Specifically, the first conductive member 5 and the second conductive member 6 are metal plates that have been appropriately bent.

[0061] The first conductive member 5 is connected to the second main surface electrode 12 (source electrode) of each first semiconductor element 10A and to the first terminal 41 and the second terminal 42, thereby making the second main surface electrode 12 of each first semiconductor element 10A electrically connected to the first terminal 41 and the second terminal 42. The first conductive member 5 constitutes a path for the main circuit current switched by the plurality of first semiconductor elements 10A. The first conductive member 5 has a maximum dimension in the x direction of, for example, 25 mm to 40 mm, and a maximum dimension in the y direction of, for example, 30 mm to 45 mm. As shown in Figures 7 and 8, the first conductive member 5 includes a first wiring section 51, a second wiring section 52, a third wiring section 53, a fourth wiring section 54, and a fifth wiring section 55.

[0062] The first wiring section 51 has a first end 511, a second end 512, and a plurality of openings 513. The first end 511 is connected to the first terminal 41. The first end 511 and the first terminal 41 are joined by a conductive bonding material 59. In a plan view, the first wiring section 51 is a strip-shaped portion that extends in the x-direction as a whole. In a plan view, the first wiring section 51 overlaps with both the second conductive section 2B and the first conductive section 2A.

[0063] The second end 512 is separated from the first end 511 in the x-direction. As shown in Figures 7 and 8, the second end 512 is located in the x1 direction relative to the first end 511.

[0064] Each of the multiple openings 513 is a partially cut-out portion in a plan view. The multiple openings 513 are spaced apart from each other in the x direction. In the illustrated example, the first wiring section 51 has three openings 513. The opening 513 on the x2 direction side and the central opening 513 in the X direction are positioned so as to overlap the main surface 201 of the second conductive section 2B (conductive substrate 2) in a plan view, but not overlapping the multiple second semiconductor elements 10B in a plan view. The opening 513 on the x1 direction side is positioned so as to overlap the main surface 201 of the first conductive section 2A (conductive substrate 2) in a plan view, but not overlapping the multiple first semiconductor elements 10A in a plan view. Each opening 513 is provided on the y2 side of the second conductive section 2B (first conductive section 2A) in a plan view. In this embodiment, the opening 513 is an arc-shaped notch in the first wiring section 51 that is recessed in the y2 direction from the y1 side end. The planar shape of the opening 513 is not limited; it may be a notch as in this embodiment, or it may be a hole as in this embodiment.

[0065] The second wiring section 52 has a third end 521, a fourth end 522, and a plurality of openings 523. The third end 521 is connected to the second terminal 42. The third end 521 and the second terminal 42 are joined by a conductive bonding material 59. In a plan view, the second wiring section 52 is a strip-shaped portion that extends in the x-direction as a whole. The second wiring section 52 is positioned away from the first wiring section 51 in the y-direction. The second wiring section 52 is located in the y1 direction relative to the first wiring section 51. In a plan view, the second wiring section 52 overlaps with both the second conductive section 2B and the first conductive section 2A.

[0066] The fourth end 522 is separated from the third end 521 in the x-direction. As shown in Figures 7 and 8, the fourth end 522 is located in the x1 direction relative to the third end 521.

[0067] Each of the multiple openings 523 is a partially cut-out portion in a plan view. The multiple openings 523 are spaced apart from each other in the x direction. In the illustrated example, the second wiring section 52 has three openings 523. The opening 523 on the x2 direction side and the central opening 523 in the X direction are positioned so as to overlap the main surface 201 of the second conductive section 2B (conductive substrate 2) in a plan view, and not overlap the multiple second semiconductor elements 10B in a plan view. The opening 523 on the x1 direction side is positioned so as to overlap the main surface 201 of the first conductive section 2A (conductive substrate 2) in a plan view, and not overlap the multiple first semiconductor elements 10A in a plan view. Each opening 523 is provided on the second conductive section 2B (first conductive section 2A) closer to the y1 direction in a plan view. In this embodiment, the opening 523 is an arc-shaped notch in the second wiring section 52 that is recessed in the y1 direction from the y2 direction side end. The planar shape of the opening 523 is not limited; it may be a notch as in this embodiment, or it may be a hole as in this embodiment.

[0068] The third wiring section 53 is connected to both the first wiring section 51 (second end 512) and the second wiring section 52 (fourth end 522). The third wiring section 53 is a band-shaped portion that extends in the y-direction in a plan view. As can be seen from Figure 7 and other figures, the third wiring section 53 overlaps with multiple first semiconductor elements 10A in a plan view. The third wiring section 53 is connected to each first semiconductor element 10A as shown in Figure 17.

[0069] The third wiring section 53 has a plurality of concave regions 531. Each concave region 531 has a shape that protrudes in the z1 direction more than other parts of the third wiring section 53, as shown in Figure 17 and other figures. Each of the plurality of concave regions 531 is joined to one of the plurality of first semiconductor elements 10A. Each concave region 531 of the third wiring section 53 and the second main surface electrode 12 of each first semiconductor element 10A are joined via a conductive bonding material 59. The constituent material of the conductive bonding material 59 is not particularly limited and may be solder, metal paste, or sintered metal. In this embodiment, an opening 531a is formed in each concave region 531. It is preferable that each opening 531a is formed overlapping the central part of the first semiconductor element 10A in a plan view. The opening 531a is, for example, a through hole formed in each concave region 531 of the third wiring section 53. The opening 531a is used, for example, when positioning the first conductive member 5 with respect to the conductive substrate 2. The planar shape of the opening 531a may be a perfect circle, or it may be an ellipse, a rectangle, or any other shape.

[0070] The fourth wiring section 54 is connected to both the first wiring section 51 and the second wiring section 52. In a plan view, the fourth wiring section 54 is a band-shaped portion extending in the y direction. The fourth wiring section 54 is connected to the first wiring section 51 between the first end 511 and the second end 512, and is connected to the second wiring section 52 between the third end 521 and the fourth end 522. The fourth wiring section 54 is separated from the third wiring section 53 in the x direction. As shown in Figures 7 and 8, the fourth wiring section 54 is located in the x2 direction relative to the third wiring section 53. In a plan view, the fourth wiring section 54 overlaps with a plurality of second semiconductor elements 10B.

[0071] The fourth wiring section 54 has a plurality of convex regions 541. Each convex region 541 is shaped to protrude in the z2 direction more than other parts of the fourth wiring section 54, as shown in Figure 18 and other figures. As shown in Figures 7 and 18, the plurality of convex regions 541 and the plurality of second semiconductor elements 10B overlap each other in a plan view. In this embodiment, as can be understood from Figures 7 and 8, the plurality of concave regions 531 and the plurality of convex regions 541 in the third wiring section 53 are at the same position in the y direction.

[0072] The fifth wiring section 55 is connected to both the third wiring section 53 and the fourth wiring section 54. In a plan view, the fifth wiring section 55 is a strip-shaped portion extending in the x-direction. In this embodiment, the first conductive member 5 comprises a plurality (three) of fifth wiring sections 55. The plurality of fifth wiring sections 55 are located between the first wiring section 51 and the second wiring section 52 in the y-direction and are spaced apart in the y-direction. The plurality of fifth wiring sections 55 are arranged parallel (or substantially parallel). The x1 end of each of the plurality of fifth wiring sections 55 is connected between two y-adjacent concave regions 531 of the third wiring section 53. The x2 end of each of the plurality of fifth wiring sections 55 is connected between two y-adjacent convex regions 541 of the fourth wiring section 54. In Figure 8, the boundaries between each fifth wiring section 55 and the third wiring section 53, and the boundaries between each fifth wiring section 55 and the fourth wiring section 54, are represented by dashed lines.

[0073] The second conductive member 6 is connected to the second main surface electrode 12 (source electrode) of each second semiconductor element 10B and the first conductive portion 2A, thereby creating electrical conductivity between the second main surface electrode 12 of each second semiconductor element 10B and the first conductive portion 2A. The second conductive member 6 constitutes the path for the main circuit current switched by the multiple second semiconductor elements 10B. As shown in Figures 7 and 9, the second conductive member 6 includes a main portion 61, a plurality of first connection ends 62, and a plurality of second connection ends 63.

[0074] The main portion 61 is a strip-shaped part that is located between the multiple second semiconductor elements 10B and the first conductive portion 2A in the x-direction and extends in the y-direction in a plan view. As shown in Figure 16 and other figures, the main portion 61 is located in the z1 direction relative to the fifth wiring portion 55 of the first conductive member 5 and is closer to the main surface 201 (conductive substrate 2) than the fifth wiring portion 55. In a plan view, the main portion 61 overlaps with the multiple fifth wiring portions 55. In this embodiment, as shown in Figures 7, 9, and 13, multiple openings 611 are formed in the main portion 61. Each of the multiple openings 611 is, for example, a through hole that penetrates in the z-direction. The multiple openings 611 are arranged at intervals in the y2 direction. Each opening 611 does not overlap with the fifth wiring portion 55 in a plan view. The multiple openings 611 are formed to facilitate the flow of the resin material between the upper side (z2 direction side) and the lower side (z1 direction side) near the main portion 61 (second conductive member 6) when injecting the fluid resin material to form the sealing resin 8. The shape of the main portion 61 (second conductive member 6) is not limited to this configuration, and for example, the openings 611 may not be formed therein.

[0075] Multiple first connection ends 62 and multiple second connection ends 63 are each connected to the main part 61 and are arranged corresponding to multiple second semiconductor elements 10B. As shown in Figures 13 and 18, each first connection end 62 is joined to the second main surface electrode 12 of any of the corresponding second semiconductor elements 10B, and each second connection end 63 is joined to the first conductive part 2A via a conductive bonding material 69. The constituent material of the conductive bonding material 69 is not particularly limited and may be solder, metal paste, or sintered metal. In this embodiment, an opening 621 is formed in each first connection end 62. Preferably, each opening 621 is formed overlapping the central part of the second semiconductor element 10B in a plan view. The opening 621 is, for example, a through hole that penetrates in the z direction. The opening 621 is used, for example, when positioning the second conductive member 6 with respect to the conductive substrate 2. The planar shape of the opening 621 may be a perfect circle, or it may be an ellipse, rectangle, or other shape.

[0076] The sealing resin 8 covers a plurality of first semiconductor elements 10A, a plurality of second semiconductor elements 10B, a conductive substrate 2, a support substrate 3 (excluding the bottom surface 302), a portion of the first terminal 41, a second terminal 42, a plurality of third terminals 43, and a portion of the fourth terminal 44, a portion of a plurality of control terminals 45, a control terminal support 48, a first conductive member 5, a second conductive member 6, and a plurality of wires 71 to 74. The sealing resin 8 is made of, for example, black epoxy resin. The sealing resin 8 is formed, for example, by mold molding. The sealing resin 8 has dimensions of approximately 35 mm to 60 mm in the x-direction, approximately 35 mm to 50 mm in the y-direction, and approximately 4 mm to 15 mm in the z-direction. These dimensions are the size of the largest portion along each direction. The sealing resin 8 has a resin main surface 81, a resin back surface 82, and a plurality of resin side surfaces 831 to 834.

[0077] As shown in Figures 10, 12, and 17, the resin main surface 81 and the resin back surface 82 are spaced apart in the z direction. The resin main surface 81 faces the z2 direction, and the resin back surface 82 faces the z1 direction. Multiple control terminals 45 (multiple first control terminals 46A to 46D and multiple second control terminals 47A to 47E) protrude from the resin main surface 81. As shown in Figure 11, the resin back surface 82 is frame-shaped in a plan view, surrounding the bottom surface 302 of the support substrate 3 (the lower surface of the second metal layer 33). The bottom surface 302 of the support substrate 3 is exposed from the resin back surface 82 and is, for example, flush with the resin back surface 82. Multiple resin side surfaces 831 to 834 are each connected to both the resin main surface 81 and the resin back surface 82, and are sandwiched between them in the z direction. As shown in Figure 4, the resin side surface 831 and the resin side surface 832 are spaced apart in the x direction. The resin side 831 faces in the x1 direction, and the resin side 832 faces in the x2 direction. Two third terminals 43 protrude from the resin side 831, and the first terminal 41, second terminal 42, and fourth terminal 44 protrude from the resin side 832. As shown in Figure 4, the resin side 833 and the resin side 834 are spaced apart in the y direction. The resin side 833 faces in the y1 direction, and the resin side 834 faces in the y2 direction.

[0078] As shown in Figure 4, a plurality of recesses 832a are formed on the resin side surface 832. Each recess 832a is a recessed area in the x-direction in a plan view. The plurality of recesses 832a are formed between the first terminal 41 and the fourth terminal 44 in a plan view, and between the second terminal 42 and the fourth terminal 44. The plurality of recesses 832a are provided to increase the creepage distance along the resin side surface 832 between the first terminal 41 and the fourth terminal 44, and between the second terminal 42 and the fourth terminal 44.

[0079] As shown in Figures 12 and 13, the sealing resin 8 has a plurality of first protrusions 851, a plurality of second protrusions 852, and resin voids 86.

[0080] Each of the multiple first protrusions 851 protrudes in the z direction from the resin main surface 81. The multiple first protrusions 851 are arranged near the four corners of the sealing resin 8 in a plan view. A first protruding end surface 851a is formed at the tip (end in the z2 direction) of each first protrusion 851. Each first protruding end surface 851a of the multiple first protrusions 851 is parallel (or approximately parallel) to the resin main surface 81 and lies on the same plane (xy plane). Each first protrusion 851 is, for example, a frustoconical shape with a bottom and hollow. The multiple first protrusions 851 are used as spacers when the semiconductor device A1 is mounted on a control circuit board or the like in equipment that utilizes a power supply generated by the semiconductor device A1. Each of the multiple first protrusions 851 has a recess 851b and an inner wall surface 851c formed in the recess 851b. The shape of each first projection 851 may be columnar, but is preferably cylindrical. The shape of the recess 851b is cylindrical, and in plan view, the inner wall surface 851c is preferably a single perfect circle.

[0081] The semiconductor device A1 may be mechanically fixed to a control circuit board or the like by methods such as screw fastening. In this case, internal threads can be formed on the inner wall surface 851c of the recesses 851b in the multiple first protrusions 851. Insert nuts may also be embedded in the recesses 851b of the multiple first protrusions 851.

[0082] As shown in Figure 13 and other figures, the multiple second protrusions 852 project from the resin main surface 81 in the z direction. In a plan view, the multiple second protrusions 852 overlap the multiple control terminals 45. Each metal pin 452 of the multiple control terminals 45 protrudes from each second protrusion 852. Each second protrusion 852 is frustoconical in shape. At each control terminal 45, the second protrusions 852 cover the holder 451 and a portion of the metal pin 452.

[0083] As shown in Figure 12, the resin void 86 extends in the z-direction from the resin main surface 81 to the main surface 201 of the conductive substrate 2. The resin void 86 is formed in a tapered shape, with its cross-sectional area decreasing as it extends from the resin main surface 81 to the main surface 201 in the z-direction. The resin void 86 is formed during the molding of the sealing resin 8 and is a portion where the sealing resin 8 is not formed during the molding process.

[0084] Although not shown in the diagram, the resin void 86 is formed, for example, when the fluid resin material is not filled during the molding of the sealing resin 8 because it is occupied by the pressing member. The pressing member applies pressing force to the main surface 201 of the conductive substrate 2 during molding and is inserted through each opening 513 and each opening 523 of the first conductive member 5. As a result, the conductive substrate 2 can be pressed by the pressing member without interfering with the first conductive member 5, and warping of the support substrate 3 to which the conductive substrate 2 is joined can be suppressed.

[0085] In this embodiment, as shown in Figure 12, the semiconductor device A1 includes a resin-filled portion 88. The resin-filled portion 88 is filled into the resin void portion 86 so as to fill the resin void portion 86. The resin-filled portion 88 is made of epoxy resin, for example, similar to the sealing resin 8, but it may be made of a different material from the sealing resin 8.

[0086] Next, the effects and advantages of this embodiment will be described.

[0087] The semiconductor device A1 comprises a plurality of first semiconductor elements 10A, a conductive substrate 2, and a first conductive member 5. Each of the plurality of first semiconductor elements 10A has a switching function and is bonded to the conductive substrate 2. The first conductive member 5 constitutes a path for the main circuit current switched by the plurality of first semiconductor elements 10A. The first conductive member 5 includes a first wiring section 51, a second wiring section 52, a third wiring section 53, a fourth wiring section 54, and a fifth wiring section 55. The first wiring section 51 and the second wiring section 52 each extend in the x direction and are separated from each other in the y direction. The third wiring section 53 and the fourth wiring section 54 are connected to both the first wiring section 51 and the second wiring section 52, respectively, and extend in the y direction. The third wiring section 53 and the fourth wiring section 54 are separated from each other in the x direction. A plurality of first semiconductor elements 10A are connected to the third wiring section 53. The fifth wiring section 55 is located between the first wiring section 51 and the second wiring section 52 in the y-direction and is connected to both the third wiring section 53 and the fourth wiring section 54.

[0088] With this configuration, the first conductive member 5 has a mesh-like current path in a plan view, arranged vertically and horizontally by the first wiring section 51, the second wiring section 52, the third wiring section 53, the fourth wiring section 54, and the fifth wiring section 55. As a result, the first conductive member 5 can secure a relatively large area in a plan view, while being constrained by other components in the semiconductor device A1. In the semiconductor device A1, the main circuit current flowing from the multiple first semiconductor elements 10A through the third wiring section 53 to the first conductive member 5 flows through a large-area, dispersed current path. Therefore, the semiconductor device A1 has a favorable structure for carrying large currents.

[0089] The third wiring section 53 has a plurality of concave regions 531. Each concave region 531 protrudes in the z1 direction. Each of the plurality of concave regions 531 is joined to one of the plurality of first semiconductor elements 10A. With this configuration, it is possible to ensure proper conductivity between the third wiring section 53 (first conductive member 5) and the plurality of first semiconductor elements 10A while securing a large area of ​​the unfolded third wiring section 53 (first conductive member 5). Therefore, the semiconductor device A1 has a more preferable structure for carrying large currents.

[0090] The fourth wiring section 54 has a plurality of convex regions 541. Each convex region 541 protrudes in the z2 direction. The plurality of concave regions 531 and the plurality of convex regions 541 in the third wiring section 53 are at the same position in the y direction. With this configuration, it is possible to make the lengths in the y direction of the unfolded state of the third wiring section 53 and the fourth wiring section 54 approximately equal. This makes it possible to suppress the occurrence of distortion in the fourth wiring section 54. In semiconductor device A1, a plurality of concave regions 531 are provided in the third wiring section 53 of the first conductive member 5, and a plurality of convex regions 541 are provided in the fourth wiring section 54. However, unlike this embodiment, the fourth wiring section 54 may be configured without providing convex regions 541. Depending on the shape of the bent portion (concave region 531) in the third wiring section 53, it may be possible to suppress distortion even without providing convex regions 541 in the fourth wiring section 54.

[0091] In this embodiment, the first conductive member 5 has a plurality of fifth wiring sections 55. The plurality of fifth wiring sections 55 are spaced apart in the y direction, and each extends in the x direction. With this configuration, a larger area can be secured in a plan view of the mesh-like first conductive member 5. Therefore, the semiconductor device A1 has a more preferable structure for carrying large currents.

[0092] The conductive substrate 2 includes a first conductive portion 2A and a second conductive portion 2B. The semiconductor device A1 comprises a plurality of second semiconductor elements 10B and a second conductive member 6. Each of the plurality of second semiconductor elements 10B has a switching function and is joined to the second conductive portion 2B. The second conductive member 6 is connected to the plurality of second semiconductor elements 10B and the first conductive portion 2A and constitutes a path for the main circuit current switched by the plurality of second semiconductor elements 10B. The second conductive member 6 (main portion 61) overlaps with a plurality of fifth wiring portions 55 in a plan view. A semiconductor device A1 with such a configuration is suitable for reducing the inductance component and is a more preferable structure for carrying large currents.

[0093] The fourth wiring portion 54 of the first conductive member 5 overlaps with a plurality of second semiconductor elements 10B in a plan view. The plurality of convex regions 541 of the fourth wiring portion 54 and the plurality of second semiconductor elements 10B overlap with each other in a plan view. With this configuration, as shown in Figure 18 and others, even if a region for joining the second conductive member 6 (first connection end 62) is provided on each second semiconductor element 10B, the fourth wiring portion 54 is prevented from coming into contact with the second conductive member 6 (first connection end 62).

[0094] Figure 19 shows a semiconductor device according to a modified example of the first embodiment. Figure 19 is a plan view similar to Figure 7 shown in the above embodiment. Figure 20 is a cross-sectional view along the line XX-XX in Figure 19. Figure 21 is a cross-sectional view along the line XXI-XXI in Figure 19. In the drawings from Figure 19 onward, elements that are the same as or similar to semiconductor device A1 in the above embodiment are denoted by the same reference numerals as in the above embodiment, and their descriptions are omitted as appropriate.

[0095] In this modified semiconductor device A2, the configuration of the first conductive member 5 differs from that of the above embodiment, mainly in the configuration of the third wiring section 53 and the fourth wiring section 54. In this modified example, a slit 531b is formed in each concave region 531 of the third wiring section 53. As shown in Figures 19 and 20, the slit 531b is located in the center of the concave region 531 in the y-direction and extends in the x-direction. Each concave region 531 consists of two parts separated in the y-direction with the slit 531b in between. As shown in Figures 19 and 21, the fourth wiring section 54 is not bent, unlike in the above embodiment, and does not have a convex region 541. The entire fourth wiring section 54 is at the same distance from the main surface 201 of the second conductive section 2B in the z-direction.

[0096] In semiconductor device A2, the first conductive member 5 has a mesh-like current path in a plan view, arranged vertically and horizontally, through the first wiring section 51, the second wiring section 52, the third wiring section 53, the fourth wiring section 54, and the fifth wiring section 55. This allows the first conductive member 5 to secure a relatively large area in a plan view, while being constrained by other components in semiconductor device A2. In semiconductor device A2, the main circuit current flowing from the multiple first semiconductor elements 10A through the third wiring section 53 to the first conductive member 5 flows through a large-area, dispersed current path. Therefore, semiconductor device A2 has a favorable structure for carrying large currents.

[0097] Each of the multiple concave regions 531 in the third wiring section 53 has a slit 531b extending in the x direction. The fourth wiring section 54 is flat and has no bends. With this configuration, it is possible to make the lengths of the third wiring section 53 and the fourth wiring section 54 in the y direction in their unfolded state approximately equal. This makes it possible to suppress the occurrence of distortion in the fourth wiring section 54. In contrast to this modified example, instead of providing a slit 531b in each of the multiple concave regions 531, a slit 531b may be provided in at least one selected concave region 531 from among the multiple concave regions 531. Furthermore, within the range of configurations similar to the semiconductor device A1 of the above embodiment, the same effects and advantages as in the above embodiment are achieved.

[0098] The semiconductor device relating to this disclosure is not limited to the embodiments described above. The specific configuration of each part of the semiconductor device relating to this disclosure can be modified in various ways.

[0099] This disclosure includes embodiments described in the following appendix.

[0100] Note 1. A conductive substrate having a main surface facing one side in the thickness direction and a back surface facing the opposite side from the main surface, A plurality of first semiconductor elements having a switching function are bonded to the main surface, The system comprises a first conductive member that constitutes a path for the main circuit current switched by the plurality of first semiconductor elements, The first conductive member includes a first wiring section, a second wiring section, a third wiring section, a fourth wiring section, and a fifth wiring section. The first wiring portion extends in a first direction perpendicular to the thickness direction, The second wiring portion is separated from the first wiring portion in a second direction perpendicular to both the thickness direction and the first direction, and extends in the first direction. The third wiring section is connected to both the first wiring section and the second wiring section and extends in the two directions. The fourth wiring section is separated from the third wiring section in the first direction and is connected to both the first and second wiring sections, extending in the second direction. The fifth wiring section is located between the first wiring section and the second wiring section in the second direction and is connected to both the third wiring section and the fourth wiring section. The third wiring section is connected to the plurality of first semiconductor elements, and is a semiconductor device. Note 2. The semiconductor device described in Appendix 1, wherein the first conductive member is made of a metal plate. Note 3. The third wiring portion has a plurality of concave regions that protrude to the other side in the thickness direction, The semiconductor device according to Appendix 2, wherein each of the plurality of concave regions is joined to one of the plurality of first semiconductor elements. Note 4. The semiconductor device according to Appendix 3, wherein the fourth wiring portion has a plurality of convex regions that protrude to one side in the thickness direction. Note 5. The semiconductor device according to Appendix 4, wherein the plurality of concave regions and the plurality of convex regions are at the same position as each other in the second direction. Note 6. The semiconductor device according to Appendix 3, wherein at least one of the plurality of concave regions has a slit extending in the first direction. Note 7. The conductive substrate includes a first conductive portion and a second conductive portion arranged spaced apart from each other on one side and the other side in the first direction. The semiconductor device according to Appendix 3, wherein the plurality of first semiconductor elements are electrically joined to the first conductive portion. Note 8. Multiple second semiconductor elements electrically connected to the second conductive portion and having a switching function, The semiconductor device according to Appendix 7, further comprising a second conductive member made of a metal plate material, which is connected to the plurality of second semiconductor elements and the first conductive portion. Note 9. The semiconductor device described in Appendix 8, wherein the fourth wiring portion overlaps the plurality of second semiconductor elements when viewed in the thickness direction. Note 10. The fourth wiring section has a plurality of convex regions that protrude to one side in the thickness direction, The semiconductor device described in Appendix 9, wherein the plurality of convex regions and the plurality of second semiconductor elements overlap each other when viewed in the thickness direction. Note 11. The semiconductor device according to appendix 8 or 9, wherein at least one of the plurality of concave regions has a slit extending in the first direction. Note 12. A first terminal is positioned on one side in the first direction relative to the second conductive portion and is connected to the first wiring portion, A second terminal is positioned on one side in the first direction relative to the second conductive portion and is connected to the second wiring portion, The third terminal connected to the first conductive part, A semiconductor device according to any one of appendices 8 to 11, further comprising a fourth terminal connected to the second conductive portion. Note 13. The semiconductor device described in Appendix 12, wherein the first terminal, the second terminal, and the fourth terminal overlap each other when viewed in the second direction. Note 14. The semiconductor device according to any one of the appendices 8 to 13, wherein the second conductive member overlaps with the fifth wiring portion when viewed in the thickness direction. Note 15. The semiconductor device described in any of appendices 8 to 14, wherein the plurality of first semiconductor elements and the plurality of second semiconductor elements overlap each other when viewed in the first direction. Note 16. The first conductive member is a semiconductor device according to any one of appendices 2 to 15, containing copper. Note 17. The semiconductor device according to any one of appendices 1 to 16, wherein the fifth wiring section includes a plurality of wiring sections arranged at intervals in the second direction and each extending in the first direction. [Explanation of Symbols]

[0101] A1, A2: Semiconductor device; 10A: First semiconductor device 10B: Second semiconductor element 101: Main surface of the element 102: Back surface of the element 11: First main surface electrode 12: Second main surface electrode 13: Third main surface electrode 15: Back surface electrode 17: Thermistor 19: Conductive bonding material 2: Conductive substrate 2A: First conductive part 2B: Second conductive part 201: Main surface 202: Back surface 29: Conductive bonding material 3: Support substrate 301: Support surface 302: Bottom surface 31: Insulating layer 32: First metal layer 32A: First part 32B: Second part 321: First bonding layer 33: Second metal layer 41: First terminal 42: Second terminal 43: Third terminal 44: Fourth terminal 45: Control terminal 451: Holder 452: Metal pin 459: Conductive bonding material 46A, 46B, 46C, 46D: First control terminal 47A, 47B, 47C, 47D, 47E: Second control terminals 48: Control terminal support 481: Insulating layer 482: First metal layer 482A: 1st part 482B: 2nd part 482C: 3rd part 482D: 4th part 482E: 5th part 482F: 6th part 483: Second metal layer 49: Bonding material 5: First conductive member 51: First wiring part 511: First end part 512: Second end part 513: Opening 52: Second wiring section 521: Third end 522: Fourth end portion 53: Third wiring portion 531: Concave area 531a: Opening 531b: Slit 54: Fourth wiring section 541: Convex region 541 55: Fifth wiring section 59: Conductive bonding material 6: Second conductive member 61: Main part 611: Opening 62: First connection end 621: Opening 63: Second connection end 69: Conductive bonding material 71, 72, 73, 74: Wire 8: Sealing resin 81: Main surface of resin 82: Back surface of resin 831, 832: Resin side surface; 832a: Recess 833,834:Resin side 851:First protrusion 851a: First protruding end face 851b: Recess 851c: Inner wall surface 852: Second protruding part 86: Resin void part 88: Resin filling part

Claims

1. A conductive substrate having a main surface facing one side in the thickness direction and a back surface facing the opposite side from the main surface, A plurality of first semiconductor elements having a switching function are bonded to the main surface, The system comprises a first conductive member that constitutes a path for the main circuit current switched by the plurality of first semiconductor elements, The first conductive member includes a first wiring section, a second wiring section, a third wiring section, a fourth wiring section, and a fifth wiring section. The first wiring portion extends in a first direction perpendicular to the thickness direction, The second wiring portion is separated from the first wiring portion in a second direction perpendicular to both the thickness direction and the first direction, and extends in the first direction. The third wiring section is connected to both the first wiring section and the second wiring section and extends in the two directions. The fourth wiring section is separated from the third wiring section in the first direction and is connected to both the first and second wiring sections, extending in the second direction. The fifth wiring section is located between the first wiring section and the second wiring section in the second direction and is connected to both the third wiring section and the fourth wiring section. The third wiring section is connected to the plurality of first semiconductor elements, and is a semiconductor device.

2. The semiconductor device according to claim 1, wherein the first conductive member is made of a metal plate.

3. The third wiring portion has a plurality of concave regions that protrude to the other side in the thickness direction, The semiconductor device according to claim 2, wherein each of the plurality of concave regions is joined to any of the plurality of first semiconductor elements.

4. The semiconductor device according to claim 3, wherein the fourth wiring portion has a plurality of convex regions that protrude to one side in the thickness direction.

5. The semiconductor device according to claim 4, wherein the plurality of concave regions and the plurality of convex regions are at the same position as each other in the second direction.

6. The semiconductor device according to claim 3, wherein at least one of the plurality of concave regions has a slit extending in the first direction.

7. The conductive substrate includes a first conductive portion and a second conductive portion arranged spaced apart from each other on one side and the other side in the first direction. The semiconductor device according to claim 3, wherein the plurality of first semiconductor elements are electrically joined to the first conductive portion.

8. A plurality of second semiconductor elements electrically connected to the second conductive portion and having a switching function, The semiconductor device according to claim 7, further comprising a second conductive member made of a metal plate material, which is connected to the plurality of second semiconductor elements and the first conductive portion.

9. The semiconductor device according to claim 8, wherein the fourth wiring portion overlaps the plurality of second semiconductor elements when viewed in the thickness direction.

10. The fourth wiring section has a plurality of convex regions that protrude to one side in the thickness direction, The semiconductor device according to claim 9, wherein the plurality of convex regions and the plurality of second semiconductor elements overlap each other when viewed in the thickness direction.

11. The semiconductor device according to claim 8 or 9, wherein at least one of the plurality of concave regions has a slit extending in the first direction.

12. A first terminal is positioned on one side in the first direction relative to the second conductive portion and is connected to the first wiring portion, A second terminal is positioned on one side in the first direction relative to the second conductive portion and is connected to the second wiring portion, The third terminal connected to the first conductive part, The semiconductor device according to any one of claims 8 to 10, further comprising a fourth terminal connected to the second conductive portion.

13. The semiconductor device according to claim 12, wherein the first terminal, the second terminal, and the fourth terminal overlap each other when viewed in the second direction.

14. The semiconductor device according to any one of claims 8 to 10, wherein the second conductive member overlaps with the fifth wiring portion when viewed in the thickness direction.

15. The semiconductor device according to any one of claims 8 to 10, wherein the plurality of first semiconductor elements and the plurality of second semiconductor elements overlap each other when viewed in the first direction.

16. The semiconductor device according to any one of claims 2 to 10, wherein the first conductive member contains copper.

17. The semiconductor device according to any one of claims 1 to 10, wherein the fifth wiring portion includes a plurality of wiring portions that are spaced apart in the second direction and each extends in the first direction.

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