Semiconductor devices and ultrasonic sensors

Abstract

This semiconductor device supplies a drive signal in the ultrasonic band to a piezoelectric element via a drive circuit, and thereafter, supplies a brake signal having a phase which differs from the phase of the drive signal to the piezoelectric element via a braking operation. The drive circuit is equipped with a full-bridge circuit provided between a first line and a second line. The braking operation turns on two switches on the first line side of the full-bridge circuit, or turns on two switches on the second line side of the full-bridge circuit.

Description

[Technical Field]

[0001] This disclosure relates to semiconductor devices and ultrasonic sensors. [Background technology]

[0002] Ultrasonic sensors equipped with piezoelectric elements are used in a variety of applications. In ultrasonic sensors, a transmitted wave signal is sent by driving a piezoelectric element, and the distance or proximity of an object is detected by receiving a reflected wave signal (see, for example, Patent Document 1). [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2018-96752 [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] Even after the supply of the drive signal to the piezoelectric element for transmitting the transmitted wave signal is stopped, the piezoelectric element continues to vibrate for a while based on the mechanical energy it has stored. This vibration of the piezoelectric element after the drive signal supply is stopped is called reverberation. If the duration of reverberation (reverberation time) is long, it becomes difficult to detect objects at close range. Therefore, the development of technologies that can effectively reduce reverberation time is expected.

[0005] The purpose of this disclosure is to provide a semiconductor device and an ultrasonic sensor that contribute to reducing reverberation time. [Means for solving the problem]

[0006] The semiconductor device according to this disclosure comprises a drive circuit capable of supplying an ultrasonic drive signal to a piezoelectric element and capable of supplying a braking signal having a phase different from the phase of the drive signal to the piezoelectric element after the supply of the drive signal is stopped, and a control circuit capable of controlling the drive circuit, wherein the drive circuit comprises a full bridge circuit provided between a first line and a second line to which a higher potential than that of the first line is to be applied, and is configured to supply the drive signal and the braking signal to the piezoelectric element using the full bridge circuit based on the potential difference between the first line and the second line, and the full bridge circuit comprises a series circuit of a first switch provided on the second line side and a second switch provided on the first line side, and The control circuit has a series circuit of a third switch provided on the second line side and a fourth switch provided on the first line side, and the connection node between the first switch and the second switch, and the connection node between the third switch and the fourth switch are configured to be connectable to the first end and the second end of the piezoelectric element, respectively, and the control circuit is configured to cause the drive circuit to perform a braking operation after stopping the supply of the drive signal to the piezoelectric element and before supplying the braking signal to the piezoelectric element, and in the braking operation, the first switch and the third switch are turned off and the second switch and the fourth switch are turned on, or the first switch and the third switch are turned on and the second switch and the fourth switch are turned off. [Effects of the Invention]

[0007] This disclosure makes it possible to provide a semiconductor device and an ultrasonic sensor that contribute to reducing reverberation time. [Brief explanation of the drawing]

[0008] [Figure 1] Figure 1 is an overall configuration diagram of an ultrasonic sensor according to the present disclosure. [Figure 2] Figure 2 shows the relationship between the output wave signal and the reflected wave signal in an ultrasonic sensor according to an embodiment of the present disclosure. [Figure 3]Figure 3 is a diagram showing the internal configuration of a semiconductor device constituting an ultrasonic sensor according to an embodiment of the present disclosure. [Figure 4] Figure 4 is a diagram showing multiple states that the drive circuit can take according to an embodiment of the present disclosure. [Figure 5] Figure 5 shows the relationship between the amplified voltage signal and the envelope signal based on the received signal according to an embodiment of the present disclosure. [Figure 6] Figure 6 shows an example of the internal configuration of a damping circuit according to an embodiment of the present disclosure. [Figure 7] Figure 7 shows how a detection unit operation is repeatedly performed by a semiconductor device according to an embodiment of the present disclosure. [Figure 8] Figure 8 is a diagram showing the configuration of the period during which the detection unit operation is performed according to an embodiment of the present disclosure. [Figure 9] Figure 9 is a diagram showing the state of each switch and the waveform of the drive signal during the transmission period, according to an embodiment of the present disclosure. [Figure 10] Figure 10 shows the state of each switch and the waveform of the braking signal during the first braking period, according to an embodiment of the present disclosure. [Figure 11] Figure 11 is a diagram showing the phase relationship between a drive signal and a braking signal according to an embodiment of the present disclosure. [Figure 12] Figure 12 is a timing chart of the detection unit operation relating to a first embodiment belonging to the embodiments of this disclosure. [Figure 13] Figure 13 is a timing chart of the detection unit operation for the comparative example. [Figure 14] Figure 14 shows a drive circuit and its peripheral circuits relating to a second embodiment of the embodiments of this disclosure. [Figure 15] Figure 15 is a timing chart of the detection unit operation relating to a second embodiment belonging to the embodiments of this disclosure. [Figure 16] Figure 16 is a deformation timing chart of the detection unit operation relating to a second embodiment belonging to the embodiments of this disclosure. [Figure 17]Figure 17 is a timing chart of the detection unit operation relating to a third embodiment belonging to the embodiments of this disclosure. [Figure 18] Figure 18 shows a drive circuit and its peripheral circuits relating to a fourth embodiment belonging to the embodiments of this disclosure. [Figure 19] Figure 19 is a timing chart of the detection unit operation relating to a fourth embodiment belonging to the embodiments of this disclosure. [Figure 20] Figure 20 is a deformation timing chart of the detection unit operation relating to a fourth embodiment belonging to the embodiments of this disclosure. [Figure 21] Figure 21 is a schematic top view of a vehicle equipped with multiple ultrasonic sensors according to an embodiment of the present disclosure. [Modes for carrying out the invention]

[0009] Hereinafter, examples of embodiments of the present disclosure will be specifically described with reference to the drawings. In each of the referenced figures, the same parts are denoted by the same reference numerals, and redundant descriptions relating to the same parts are omitted as a general rule. In addition, for the sake of simplification of the description, in this specification, symbols or reference numerals that refer to information, signals, physical quantities, elements, or parts may be used, and the names of the information, signals, physical quantities, elements, or parts corresponding to such symbols or reference numerals may be omitted or abbreviated. For example, the damping circuit referred to by "140" described later (see Figure 3) may be written as damping circuit 140 or abbreviated as circuit 140, but all of these refer to the same thing.

[0010] First, some terms used in the description of embodiments of this disclosure will be explained. A line refers to wiring through which an electrical signal is propagated or applied. Ground refers to a reference conductive part having a reference potential of 0V (zero volts), or the potential of 0V itself. The reference conductive part is formed of a conductor such as metal. The potential of 0V is sometimes called the ground potential. In embodiments of this disclosure, voltages shown without specifying a reference represent the potential as seen from ground.

[0011] For any transistor configured as a FET (field-effect transistor), including MOSFETs, the "on" state refers to the state in which the drain and source of the transistor are conducting, and the "off" state refers to the state in which the drain and source of the transistor are not conducting (blocked state). The same applies to transistors not classified as FETs. Unless otherwise specified, MOSFETs are understood to be enhancement-type MOSFETs. MOSFET is an abbreviation for "metal-oxide-semiconductor field-effect transistor".

[0012] Any switch can be constructed using one or more FETs (field-effect transistors). When a switch is in the ON state, the terminals of that switch conduct electricity, while when a switch is in the OFF state, the terminals of that switch do not conduct electricity. Hereinafter, the ON state and OFF state of any transistor or switch may be simply referred to as ON and OFF. Connections between multiple parts forming a circuit, such as any circuit elements, wiring (lines), or nodes, should be understood to refer to electrical connections unless otherwise specified.

[0013] Figure 1 shows the overall configuration of the ultrasonic sensor 1 according to the embodiment of this disclosure. Figure 1 also shows an upper block 2 connected to the ultrasonic sensor 1 and a detection target object OBJ located at a position physically separated from the ultrasonic sensor 1. The ultrasonic sensor 1 comprises a semiconductor device 10 consisting of a semiconductor integrated circuit for ultrasonic sensors, a piezoelectric element 20, and capacitors 31 and 32. Only a part of the internal configuration of the semiconductor device 10 is shown in Figure 1.

[0014] The ultrasonic sensor 1 transmits an output wave signal W1 in the ultrasonic band towards the space outside the ultrasonic sensor 1 (away from the ultrasonic sensor 1). The output wave signal W1 is reflected by the object OBJ to be detected, generating a reflected wave signal W2. The reflected wave signal W2 is received by the ultrasonic sensor 1. Based on the received signal of the reflected wave signal W2, the ultrasonic sensor 1 performs functions such as detecting the distance to the object OBJ and detecting the approach of the object OBJ. The ultrasonic band refers to a frequency band that is higher than the frequency band of sound waves that can be heard by the human ear, but is inaudible to the human ear, and generally refers to a band of 20 kHz or higher. For example, the output wave signal W1 has a frequency in the range of 30 kHz to 80 kHz. Both the output wave signal W1 and the reflected wave signal W2 belong to the ultrasonic signal category.

[0015] The piezoelectric element 20 has a first end and a second end. The piezoelectric element 20 generates mechanical displacement (vibration) in response to a voltage signal applied between the first and second ends, and generates an output wave signal W1 through its own mechanical displacement. Therefore, the piezoelectric element 20 functions as a transmitter for the output wave signal W1. In addition, the piezoelectric element 20 has the characteristic of generating an electromotive force between the first and second ends in response to the mechanical displacement (vibration) applied to it, and also functions as a receiver for the reflected wave signal W2.

[0016] The semiconductor device 10 uses a piezoelectric element 20 to transmit an output wave signal W1 and receive a reflected wave signal W2. Hereinafter, the combined operation of transmitting the output wave signal W1 and receiving the reflected wave signal W2 may be referred to as the transmit / receive operation. The semiconductor device 10 includes a transmit circuit 11, a receive circuit 12, and a control circuit 13. The semiconductor device 10 is an electronic component formed by enclosing a semiconductor integrated circuit in a resin housing (package), and each circuit constituting the semiconductor device 10 is integrated using semiconductors. The housing of the electronic component as the semiconductor device 10 is provided with a plurality of external terminals exposed from the outside of the semiconductor device 10. As some of the plurality of external terminals provided on the semiconductor device 10, Figure 1 shows output terminals DRV1 and DRV2 and input terminals IN1 and IN2. Outside the semiconductor device 10, output terminal DRV1 is connected to the first end of the piezoelectric element 20, and output terminal DRV2 is connected to the second end of the piezoelectric element 20. Furthermore, outside the semiconductor device 10, input terminal IN1 is connected to the first end of the piezoelectric element 20 via capacitor 31, and input terminal IN2 is connected to the second end of the piezoelectric element 20 via capacitor 32. Note that capacitors 31 and 32 may be built into the semiconductor device 10.

[0017] The transmitting circuit 11 transmits an output wave signal W1 using a piezoelectric element 20 externally connected between output terminals DRV1 and DRV2. The receiving circuit 12 receives an input wave signal in the ultrasonic band using a piezoelectric element 20 externally connected between input terminals IN1 and IN2. The main input wave signal to be received is the reflected wave signal W2 based on the output wave signal W1. Thus, in this embodiment, a common piezoelectric element 20 is externally connected between output terminals DRV1 and DRV2 and between input terminals IN1 and IN2, and this common piezoelectric element 20 is shared by the transmitting circuit 11 and the receiving circuit 12 as a transducer.

[0018] However, as a variation, another piezoelectric element (not shown) different from the piezoelectric element 20 may be externally connected between input terminals IN1 and IN2 (in this case, the other piezoelectric element is also included as a component of the ultrasonic sensor 1). Alternatively, when a common piezoelectric element 20 is shared between the transmitting circuit 11 and the receiving circuit 12, the output terminal DRV1 and input terminal IN1 may be realized by one first input / output terminal, and the output terminal DRV2 and input terminal IN2 may be realized by one second input / output terminal, and the first and second input / output terminals may be connected in parallel to both the transmitting circuit 11 and the receiving circuit 12 (in this case, capacitors 31 and 32 may be inserted between the first input / output terminal and the second input / output terminal and the receiving circuit 12). The receiving circuit 12 receives an input wave signal in the ultrasonic band using the piezoelectric element 20 or the other piezoelectric element, and performs predetermined receiving signal processing on the received signal.

[0019] The control circuit 13 controls the transmitting circuit 11 and the receiving circuit 12. By controlling the transmitting circuit 11, the control circuit 13 causes the piezoelectric element 20 to transmit the output wave signal W1 using the transmitting circuit 11. In addition, based on the received signal from the receiving circuit 12 (the input wave signal received by the receiving circuit 12), the control circuit 13 detects the distance to the object to be detected OBJ and detects the approach of the object to be detected OBJ.

[0020] Figure 2 shows the transmission and reception operation of the ultrasonic sensor 1. The control circuit 13 can perform distance detection processing and proximity detection processing. In distance detection processing, the control circuit 13 calculates the distance between the ultrasonic sensor 1 and the object OBJ by measuring the length of time from when the output wave signal W1 is transmitted at time t1 until when the reflected wave signal W2 is received at time t2 (i.e., the length of time between t1 and t2). Time t1 represents the start time of transmission of the output wave signal W1 using the transmission circuit 11 and piezoelectric element 20, and time t2 represents the start time of reception of the reflected wave signal W2 using the reception circuit 12 and piezoelectric element 20. In proximity detection processing, the control circuit 13 detects the proximity of the object OBJ based on whether or not the reflected wave signal W2 is received. More specifically, for example, in proximity detection processing, if the control circuit 13 receives a reflected wave signal W2 within a predetermined time elapsed since transmitting the output wave signal W1 at time t1, it determines that the object to be detected OBJ is approaching the ultrasonic sensor 1 (for example, the vehicle on which the ultrasonic sensor 1 is mounted). Otherwise, it determines that the object to be detected OBJ is not approaching the ultrasonic sensor 1 (for example, the vehicle on which the ultrasonic sensor 1 is mounted).

[0021] The control circuit 13 is connected to the upper block 2 shown in Figure 1 in a manner that enables bidirectional communication. The upper block 2 can give various instructions to the semiconductor device 10 by sending predetermined commands to the semiconductor device 10, and the semiconductor device 10 performs various operations and processes according to the commands from the upper block 2. The results of the distance detection process and proximity detection process are transmitted from the semiconductor device 10 to the upper block 2. The upper block 2 consists of a microcomputer or the like. When the ultrasonic sensor 1 and the upper block 2 are mounted on a vehicle such as an automobile, the upper block 2 may be an ECU (Electronic Control Unit). In addition, the measurement of the length between times t1 and t2, the calculation of the distance between the ultrasonic sensor 1 and the object OBJ to be detected based on the measurement results, and the determination of whether or not the object OBJ to be detected is approaching the ultrasonic sensor 1 (for example, the vehicle on which the ultrasonic sensor 1 is mounted) may be performed by the upper block 2. In this case, for example, a signal such as signal 602 in Figure 2, which indicates the period during which the output wave signal W1 is being transmitted and the period during which the reflected wave signal W2 is being received, can be transmitted from the control circuit 13 to the upper block 2.

[0022] Figure 3 shows the internal configuration diagram of the semiconductor device 10. The semiconductor device 10 comprises a drive circuit 111, a gate driver 112, a receiving circuit 120, and a control circuit 130. The drive circuit 111 and the gate driver 112 constitute the transmitting circuit 11 in Figure 1. The receiving circuit 120 corresponds to the receiving circuit 12 in Figure 1 and has the functions of the receiving circuit 12 described above. The control circuit 130 corresponds to the control circuit 13 in Figure 1 and has the functions of the control circuit 13 described above. The semiconductor device 10 further comprises a damping circuit 140, a switch circuit 150, and an internal power supply circuit 160.

[0023] The drive circuit 111 includes transistors M1H, M1L, M2H, and M2L as four switching elements (switches). Transistors M1H and M2H are P-channel type MOSFETs, and transistors M1L and M2L are N-channel type MOSFETs. Transistors M1H and M1L are connected in series to form a first half-bridge circuit (first series circuit), and transistors M2H and M2L are connected in series to form a second half-bridge circuit (second series circuit). The first and second half-bridge circuits constitute a full-bridge circuit (H-bridge circuit). The sources of transistors M1H and M2H are connected to line LN2. A drive power supply voltage VDRV having a predetermined positive DC voltage value is applied to line LN2. The drains of transistors M1H and M1L are connected in common to line LN10 and connected to the output terminal DRV1 through line LN10. The drains of transistors M2H and M2L are connected to line LN20, and through line LN20, they are connected to output terminal DRV2. The sources of transistors M1L and M2L are connected to line LN1. Ground potential is applied to line LN1. As described above, output terminal DRV1 and input terminal IN1 are connected to the first terminal of piezoelectric element 20 outside the semiconductor device 10, and output terminal DRV2 and input terminal IN2 are connected to the second terminal of piezoelectric element 20 outside the semiconductor device 10 (however, input terminals IN1 and IN2 are connected to the first and second terminals of piezoelectric element 20 via capacitors 31 and 32). It is also possible to modify the transistors M1H and M2H to be N-channel type MOSFETs (in this case, a circuit that generates a voltage higher than the drive power supply voltage VDRV is added).

[0024] The gate driver 112 drives the transistors using the drive power supply voltage VDRV applied to line LN2 as the positive power supply voltage and the ground voltage (0V) applied to line LN1 as the negative power supply voltage. The gate driver 112 controls the on / off state of transistors M1H, M1L, M2H, and M2L individually by controlling the gate potentials of each transistor M1H, M1L, M2H, and M2L according to the control signal CNT1 supplied from the control circuit 130. By controlling the gate potentials of each transistor M1H, M1L, M2H, and M2L, the state of the drive circuit 111 can be set to any of the states 611 to 615 in Figure 4. The drive circuit 111 may be in a state different from any of the states 611 to 615.

[0025] State 611 is the first applied state. In the first applied state, transistors M1H and M2L are ON and transistors M2H and M1L are OFF. State 612 is the second applied state. In the second applied state, transistors M1L and M2H are ON and transistors M1H and M2L are OFF. State 613 is the all-off state. In the all-off state, transistors M1H, M1L, M2H, and M2L are all OFF. State 614 is the first braked state. In the first braked state, transistors M1L and M2L are ON and transistors M1H and M2H are OFF. State 615 is the second braked state. In the second braked state, transistors M1L and M2L are OFF and transistors M1H and M2H are ON.

[0026] The receiving circuit 120 is connected to input terminals IN1 and IN2 and receives the voltage signal applied between input terminals IN1 and IN2. Therefore, when the reflected wave signal W2 is received by the piezoelectric element 20, the voltage signal generated between the first and second ends of the piezoelectric element 20 based on the reflected wave signal W2 is input to the receiving circuit 120 through input terminals IN1 and IN2. The receiving circuit 120 generates a detected signal based on the voltage signal between input terminals IN1 and IN2 by applying predetermined receiving signal processing to the voltage signal between input terminals IN1 and IN2. The receiving signal processing includes DC removal processing to remove the DC component from the voltage signal between input terminals IN1 and IN2, amplification processing to amplify the voltage signal after DC removal processing, and envelope detection processing to detect the envelope of the amplified voltage signal (hereinafter referred to as the amplified voltage signal). The detected signal generated by the receiving signal 120 includes the envelope signal. However, as shown in Figure 3, if capacitors 31 and 32 are provided between the input terminals IN1 and IN2 and the piezoelectric element 20, the DC rejection process at the receiving signal processing stage can be omitted. In Figure 5, the solid waveform 631 is the waveform of the amplified voltage signal, and the dashed waveform 632 is the waveform of the envelope signal. The envelope signal is a voltage signal whose voltage value is the magnitude of the amplitude of the amplified voltage signal. Therefore, the envelope signal is a voltage value (hereinafter referred to as the voltage value V) that is proportional to the amplitude of the received signal of the receiving circuit 120 (i.e., the voltage signal between input terminals IN1 and IN2). EV It has (which is called).

[0027] The control circuit 130 performs the distance detection and proximity detection processing described above based on the detection signal generated by the receiving circuit 120, and also comprehensively controls the operation of each part within the semiconductor device 10. In this control, the control circuit 130 controls the control signals CNT1, CNT2 and CNT ADJ The control circuit 130 generates and outputs data. The control circuit 130 also includes a memory circuit 131. The memory circuit 131 is provided with non-volatile memory and volatile memory. The non-volatile memory in the memory circuit 131 includes either a memory on which data can be written only once (One Time Programmable ROM) or a memory on which data can be rewritten. The volatile memory in the memory circuit 131 includes registers.

[0028] The damping circuit 140 comprises a resistive component 141, an inductive component 142, and a bias supply circuit 143. The resistive component 141 and the inductive component 142 are elements used to reduce the reverberation of the piezoelectric element 20 and function as loads for the piezoelectric element 20. For this reason, the resistive component 141 and the inductive component 142 will hereafter be referred to as resistive load 141 and inductive load 142, respectively. The resistive load 141 and the inductive load 142 are connected in parallel to each other, and the parallel circuit of the resistive load 141 and the inductive load 142 is connected between lines LN12 and LN22. The bias supply circuit 143 supplies a predetermined DC bias voltage (e.g., 2V) to line LN22. The resistive load 141 is formed so that its resistance value is variable, and the inductive load 142 is formed so that its inductance value is variable. Control signal CNT from control circuit 130 ADJ The resistance value of the resistive load 141 and the inductance value of the inductive load 142 are set to be variable accordingly.

[0029] The switch circuit 150 includes switches 151 and 152. Each switch in the switch circuit 150 can be made up of one or more MOSFETs. Each switch in the switch circuit 150 may be a bus switch capable of propagating analog signals. The first end of switch 151 is connected to line LN10, and the second end of switch 151 is connected to line LN12. The first end of switch 152 is connected to line LN20, and the second end of switch 152 is connected to line LN22. Switches 151 and 152 are controlled to be on or off based on a control signal CNT2 supplied from the control circuit 130. The control signal CNT2 is a binarized signal with a value of "0" or "1". When the control signal CNT2 has a value of "1", both switches 151 and 152 are on, and when the control signal CNT2 has a value of "0", both switches 151 and 152 are off.

[0030] The internal power supply circuit 160 generates a number of power supply voltages, including a drive power supply voltage VDRV and an internal power supply voltage VDD, based on the power supply voltage VCC supplied to the semiconductor device 10 from an external power supply device (not shown). Each circuit within the semiconductor device 10 is driven based on one of the power supply voltages generated by the internal power supply circuit 160. For example, the control circuit 130 and the damping circuit 140 may be driven based on the internal power supply voltage VDD. Here, both the drive power supply voltage VDRV and the internal power supply voltage VDD have positive DC voltage values, but the internal power supply voltage VDD is smaller than the drive power supply voltage VDRV. For example, the drive power supply voltage VDRV is 36V or 72V, while the internal power supply voltage VDD is 3V or 5V.

[0031] Figure 6 shows a specific configuration example of the damping circuit 140. The inductive load 142 is formed using a pseudo-inductor so that its inductance value can be arbitrarily changed within the semiconductor device 10. In Figure 6, the inductive load 142 is formed by a GIC (Generalized Inpedance Converter) circuit. Specifically, the inductive load 142 in Figure 6 is composed of operational amplifiers 142a and 142b, fixed resistors 142c and 142e, variable resistors 142d and 142g, and a capacitor 142f. The fixed resistors 142c and 142e each have a fixed resistance value. In contrast, the resistance values ​​of the variable resistors 142d and 142g are the same as the resistance values ​​of the resistive load 141, and are controlled by the control signal CNT from the control circuit 130. ADJ Accordingly, it can be changed independently. The inductance value of the inductive load 142 connected between lines LN12 and LN22 changes as the resistance values ​​of the variable resistors 142d and 142g change.

[0032] The first terminal of the fixed resistor 142c is commonly connected to line LN12 and the non-inverting input terminal of the operational amplifier 142a. The second terminal of resistor 142c is commonly connected to the first terminal of the variable resistor 142d and the output terminal of the operational amplifier 142b. The second terminal of the variable resistor 142d is commonly connected to the inverting input terminals of the operational amplifiers 142a and 142b and the first terminal of the fixed resistor 142e. The second terminal of the fixed resistor 142e is commonly connected to the output terminal of the operational amplifier 142a and the first terminal of capacitor 142f. The second terminal of capacitor 142f is commonly connected to the first terminal of the variable resistor 142g and the non-inverting input terminal of the operational amplifier 142b. The second terminal of the variable resistor 142g is connected to line LN22. The power supply voltages for the operational amplifiers 142a and 142b are set so that the GIC circuit functions as an inductive load for the piezoelectric element 20 during the period when switches 151 and 152 are ON.

[0033] Furthermore, as shown in Figure 6, switches 151 and 152 can each be configured as N-channel MOSFETs. In this case, the drain of the MOSFET as switch 151 is connected to line LN10 while the source is connected to line LN12, and the drain of the MOSFET as switch 152 is connected to line LN20 while the source is connected to line LN22. A common control signal CNT2 is then input to the gates of each MOSFET as switches 151 and 152, causing switches 151 and 152 to be turned on or off. Note that the configuration of switches 151 and 152 is not limited to that shown in Figure 6 and may be arbitrary.

[0034] Referring to Figure 7, the semiconductor device 10 can perform one or more detection unit operations under the control of the control circuit 130 in response to commands from the upper block 2. Distance detection processing and proximity detection processing are performed in each detection unit operation. Figure 7 shows how multiple detection unit operations are executed sequentially and repeatedly.

[0035] The period during which each detection unit operation is performed is called the detection unit period. As shown in Figure 8, each detection unit period is broadly divided into the transmission period, the braking period, the first braking period, the second braking period, and the reception period. Within each detection unit period, the transmission period, braking period, first braking period, second braking period, and reception period occur in this order. The first braking period can also be called the damping pulse period, and the second braking period can also be called the damping period.

[0036] The transmission period is the period during which the output wave signal W1 is transmitted. Figure 9 shows the state of each switch in the drive circuit 111 during the transmission period and the waveform 650 of the drive signal supplied from the drive circuit 111 to the piezoelectric element 20 during the transmission period. Under the control of the control circuit 130, the state of the drive circuit 111 alternates and periodically between the first applied state and the second applied state during the transmission period. The drive signal corresponds to the voltage signal applied between output terminals DRV1 and DRV2 during the transmission period, and here it is assumed to be a voltage signal having the potential of output terminal DRV1 as seen from the potential of output terminal DRV2. Therefore, during the transmission period, the drive signal becomes a square wave signal with frequency f, and the voltage difference between the minimum and maximum values ​​of the drive signal is twice the drive power supply voltage VDRV.

[0037] After supplying a drive signal to the piezoelectric element 20 and then stopping the supply of the drive signal, the piezoelectric element 20 continues to vibrate for a while based on the mechanical energy it accumulated during the transmission period. The vibration of the piezoelectric element 20 after the supply of the drive signal is stopped is called reverberation. The time during which the reverberation continues is called the reverberation time. If the reverberation time is long, it becomes difficult to detect objects at close range. After the supply of the drive signal to the piezoelectric element 20 is stopped, the reverberation time can be reduced by supplying the piezoelectric element 20 with a signal that is out of phase with respect to the drive signal. In this embodiment, after the supply of the drive signal to the piezoelectric element 20 is stopped, a signal having a different phase from the drive signal is supplied to the piezoelectric element 20 from the drive circuit 111 as a damping signal, thereby reducing the reverberation time. The first damping period (see Figure 8) corresponds to the period during which the damping signal is supplied to the piezoelectric element 20.

[0038] Figure 10 shows the state of each switch in the drive circuit 111 during the first braking period and the waveform 660 of the braking signal supplied from the drive circuit 111 to the piezoelectric element 20 during the first braking period. Under the control of the control circuit 130, the state of the drive circuit 111 alternates and periodically between the first applied state and the second applied state during the first braking period. The braking signal corresponds to the voltage signal applied between output terminals DRV1 and DRV2 during the first braking period, and here it is assumed to be a voltage signal having the potential of output terminal DRV1 as seen from the potential of output terminal DRV2. Therefore, during the first braking period, the braking signal becomes a square wave signal with frequency f, and the voltage difference between the minimum and maximum values ​​of the braking signal is twice the drive power supply voltage VDRV. The frequency f of the braking signal is the same as the frequency f of the drive signal.

[0039] Figure 11 shows the waveforms 650 and 660 of the drive signal and the brake signal. Although the drive signal and the brake signal are not supplied to the piezoelectric element 20 simultaneously, for convenience, the waveforms 650 and 660 of the drive signal and the brake signal are shown side by side in Figure 11 to show their phase relationship. The phase of the brake signal relative to the phase of the drive signal is referred to by the symbol "φ". Here, it is assumed that the phase of the brake signal lags behind the phase of the drive signal, and the amount of the phase delay of the brake signal relative to the drive signal is defined as phase φ.

[0040] The phase φ should ideally be 180° or close to it (angle). Based on the stored data in the memory circuit 131, each detection unit operation is performed with the phase φ, the resistance value of the resistive load 141, and the inductance value of the inductive load 142 set appropriately.

[0041] The damping signal is sometimes referred to as a damping pulse signal. The damping pulse signal is effective in reducing reverberation in regions where the amplitude of reverberation (the amplitude of the piezoelectric element 20 due to reverberation) is high, but as the amplitude of reverberation decreases, the damping pulse signal itself can become a new source of reverberation. On the other hand, reverberation can also be reduced by connecting a resistive load or inductive load to the piezoelectric element 20 after the supply of the drive signal is stopped, through the absorption of mechanical energy by the piezoelectric element 20. Here, the inventors have found that a resistive load or inductive load exhibits a relatively high reverberation reduction effect when the amplitude of reverberation is small, while the reverberation reduction effect becomes relatively low when the amplitude of reverberation is large due to voltage constraints of the circuit, etc.

[0042] Based on this knowledge, the inventors developed the following reverberation reduction operation. In the reverberation reduction operation, after the supply of the drive signal to the piezoelectric element 20 is stopped, a damping signal is supplied to the piezoelectric element 20 from the drive circuit 111, and after the supply of the damping signal is stopped, the damping circuit 140 is connected to the piezoelectric element 20. This reverberation reduction operation makes it possible to quickly reduce reverberation (i.e., to keep the reverberation time low).

[0043] During all or part of the second damping period (see Figure 8), the damping circuit 140 is connected to the piezoelectric element 20. In the subsequent receiving period, the receiving circuit 120 performs the receiving operation. That is, the receiving circuit 120 generates a detection signal based on the voltage signal between input terminals IN1 and IN2 during the receiving period by applying predetermined receiving signal processing to the voltage signal between input terminals IN1 and IN2 during the receiving period. The control circuit 130 performs the distance detection process and proximity detection process described above based on the detection signal generated by the receiving circuit 120.

[0044] Also, as shown in FIG. 8, a brake period is set between the transmission period and the first braking period. The phase φ of the braking signal is determined by the length of this brake period. For example, if the length of the brake period is "1 / (2f)" (i.e., half of the reciprocal of the above frequency f), or if it is "m / f + 1 / (2f)", the phase φ becomes 180° (m is an arbitrary natural number). As a special control, the control circuit 130 sets the state of the drive circuit 111 to the first brake state or the second brake state in all or part of the brake period (see FIG. 4). The operation of setting the state of the drive circuit 111 to the first brake state or the second brake state (in other words, the operation of maintaining the state of the drive circuit 111 in the first brake state or the second brake state) is referred to as a brake operation.

[0045] Hereinafter, among a plurality of embodiments, some specific operation examples, application techniques, modification techniques, etc. related to the ultrasonic sensor 1 will be described. The matters described above in this embodiment are applied to the following respective embodiments unless otherwise specified and without contradiction. In each embodiment, if there are matters conflicting with the above matters, the description in each embodiment may be prioritized. Also, without contradiction, among the plurality of embodiments shown below, the matters described in any one embodiment can be applied to any other embodiment (that is, it is also possible to combine any two or more of the plurality of embodiments).

[0046] <<First Embodiment>> The first embodiment will be described. In the first embodiment, in the brake operation, the drive circuit 111 is set and held in the first brake state (see FIG. 4).

[0047] FIG. 12 shows a timing chart of the detection unit operation according to the first embodiment. As time elapses, times t A1 , t A2 , t A3 , t A4 and t A5 are visited in this order. Periods P A1 , P A2 , P A3 , P A4 , P A5These are examples of the transmission period, braking period, first braking period, second braking period, and reception period, respectively. The operation during each period will be explained in detail below.

[0048] time t A1 From time t A2 The period until is the transmission period P during which the drive signal is supplied from the drive circuit 111 to the piezoelectric element 20. A1 The transmission period is P. A1 Then, a drive signal is supplied to the piezoelectric element 20 for the number of waves transmitted. Transmission period P A1 The number of waves transmitted during transmission is P A1 The number of cycles of the drive signal in (i.e., the transmission period P) A1 It matches the quotient obtained by dividing the length by the period length of the drive signal. Transmission period P A1 The wavenumber of the transmitted wave has a predetermined value (for example, an integer of 2 or more) and is set based on data in a predetermined register of the memory circuit 131. Here, we assume that the wavenumber of the transmitted wave is "4", but the wavenumber of the transmitted wave can be arbitrary (the same applies to other embodiments described later). Time t A1 When the length of 4 cycles of the drive signal (4 / f) has elapsed (i.e., at time t) A2 (Transmission period P) A1 The process is ending.

[0049] Furthermore, time t A1 Prior to this, the drive circuit 111 is maintained in its initial state for a certain period of time t A1 When the drive circuit 111 switches from the initial state to the first applied state, the supply of a drive signal to the piezoelectric element 20 begins (the same applies to other embodiments described later). In the example in Figure 12, the fully off state is assumed to be the initial state, but the initial state may be any of the fully off state, the second applied state, the first brake state, and the second brake state (the same applies to other embodiments described later).

[0050] time t A2 From time t A3 The period until is the braking period P A2 In the first embodiment, the braking period P A2In all or part of this, the drive circuit 111 is maintained in the first brake state (i.e., transistors M1H and M2H are kept off and transistors M1L and M2L are kept on). In the example in Figure 12, at time t A2 and time t A3 Between time t A11 There exists a time t A2 From time t A11 The drive circuit 111 is maintained in the first brake state until time t A11 From time t A3 The drive circuit 111 remains in a completely off state until time t. A2 From time t A3 It is also possible to modify the drive circuit 111 to maintain the first brake state throughout all of the process up to that point. Alternatively, at time t A2 The drive circuit 111 is kept completely off until a predetermined small amount of time has elapsed from time t A2 From the point when a predetermined small amount of time has elapsed, to time t A11 or t A3 It is also possible to modify the drive circuit 111 to be in the first brake state during the period up to that point.

[0051] time t A3 From time t A4 During the period up to this point, a braking signal is supplied from the drive circuit 111 to the piezoelectric element 20 in the first braking period P. A3 This is the first braking period P. A3 Then, a damping signal is supplied to the piezoelectric element 20 for the number of waves of the damping wave. First damping period P A3 The wavenumber of the bremssing wave in the first bremssing period P is A3 The number of cycles of the braking signal in (i.e., the first braking period P) A3 It matches the quotient obtained by dividing the length by the length of the braking signal period. 1st braking period P A3 The wavenumber of the bremssed wave in this case has a predetermined value (for example, an integer of 2 or more) and is set based on data in a predetermined register of the memory circuit 131. Here, it is assumed that the wavenumber of the bremssed wave is "2", but the wavenumber of the bremssed wave can be arbitrary (the same applies to other embodiments described later). Time t A3 When the length of two cycles of the braking signal (2 / f) has elapsed (i.e., at time t) A4(at) First braking period P A3 The process is ending.

[0052] In the example in Figure 12, time t A3 When the state of the drive circuit 111 switches from the fully off state to the first applied state, the supply of a braking signal to the piezoelectric element 20 begins. Therefore, the braking period P A2 The length of the first braking period P A3 The phase φ of the braking signal is determined during the braking period P. A2 If the length is represented by T, the phase φ of the braking signal is given by "φ = T ÷ (1 / f) × 2π" in radians.

[0053] time t A4 From time t A5 The period until is the second braking period P A4 This is the second braking period P. A4 A method can also be employed in which the damping circuit 140 is continuously connected to the piezoelectric element 20 throughout the entire process, but in the first embodiment, the second damping period P A4 The damping circuit 140 is connected to the piezoelectric element 20 only in a portion of the circuit.

[0054] Specifically, the control circuit 130 controls time t A4 After switching the state of the drive circuit 111 from the second applied state to the fully off state, at time t A4 Time t, which is a predetermined first predetermined time after that time t A12 At this point, the state of the drive circuit 111 is switched from the fully off state to the first brake state. The control circuit 130 controls the state at time t A12 Time t, which is a predetermined second predetermined time later than A13 At time t, the value of the control signal CNT2 is switched from "0" to "1". That is, the control circuit 130 switches the value of the control signal CNT2 from "0" to "1". A13 In this process, the damping circuit 140 is connected to the piezoelectric element 20 by switching switches 151 and 152 from the off state to the on state. This allows time t A13 At this point, the state transitions from one where the damping circuit 140 and the piezoelectric element 20 are disconnected to one where the damping circuit 140 and the piezoelectric element 20 are connected. Furthermore, in the detection unit operation, time t A13The value of the control signal CNT2 is kept at "0" until time t. Then, the control circuit 130 operates at time t A13 Time t a predetermined third predetermined time later A14 In this configuration, the state of the drive circuit 111 is switched from the first brake state to the fully off state.

[0055] Furthermore, the control circuit 130 controls time t A14 Later time t A15 At this point, the state of the drive circuit 111 is switched from the fully off state to the first brake state, and at time t A15 Time t, which is a predetermined fourth predetermined time later than that time t. A16 At time t, the value of the control signal CNT2 is switched from "1" to "0". That is, the control circuit 130 switches the value of the control signal CNT2 from "1" to "0". A16 In this process, the damping circuit 140 is disconnected from the piezoelectric element 20 by switching switches 151 and 152 from the ON state to the OFF state. This allows time t A16 At this point, the state in which the damping circuit 140 and the piezoelectric element 20 are connected transitions to a state in which the damping circuit 140 and the piezoelectric element 20 are disconnected. Then, the control circuit 130 operates at time t A16 Time t, which is a predetermined fifth predetermined time after that time t. A5 At this point, the state of the drive circuit 111 is switched from the first brake state to the fully off state. However, although not specifically shown in the diagram, at time t A5 Reception period P starting from A5 In this configuration, it is also possible to fix only one of the output terminals DRV1 and DRV2 to a predetermined potential (e.g., ground potential) and leave the other open (the same may apply to other embodiments described later). That is, for example, during the reception period P A5 In this configuration, transistors M1H and M2H may be kept in the off state, while one of transistors M2L and M1L may be kept in the on state and the other in the off state.

[0056] The voltage value V of the envelope signal acquired by the receiving circuit 120 EV is, time t A4 It decreases from there. The control circuit 130 controls the voltage value V EV set to a predetermined threshold VTH It has a comparator (not shown) for comparison, and based on the comparison result of the comparator, time t A15 can be set. That is, for example, the control circuit 130 sets the end of the first braking period P A3 , and after that, when the voltage value V EV transitions from a state higher than the predetermined threshold value V TH to a state lower than the predetermined threshold value V TH , the time of this transition is set as time t A15 .

[0057] At time t A5 or immediately after time t A5 , the reverberation is sufficiently reduced. The receiving circuit 120 generates a detection signal based on the voltage signal between the input terminals IN1 and IN2 during the reception period set after time t A5 . The control circuit 130 can perform the above-described distance detection process and proximity detection process based on the detection signal during the reception period.

[0058] In addition, the control circuit 110 may immediately switch the state of the drive circuit 111 to the first brake state after the end of the first drive signal P A3 . That is, the control circuit 110 may switch the state of the drive circuit 111 from the second application state to the first brake state at time t A4 (in this case, it is understood that time t A4 and time t A12 refer to the same time).

[0059] FIG. 13 shows a timing chart according to a comparative example different from the first embodiment. In the comparative example of FIG. 13, the drive circuit 111 is maintained in the all-off state between time t A2 and t A3 , and also between time t A4 and t A5 .

[0060] In contrast, in the first embodiment, as shown in FIG. 12, after the transmission period P A1 , a brake period P A3 is provided before the first braking period P A2 , and during the brake period P A2In this case, a braking operation is performed that turns on both transistors M1L and M2L. Therefore, unlike the reference example in Figure 13, the braking period P A2 In this configuration, the reverberation energy of the piezoelectric element 20 (i.e., the stored mechanical energy of the piezoelectric element 20) is released into a pattern having a ground potential, or consumed in a current loop passing through transistors M1L and M2L and the piezoelectric element 20, thereby reducing the reverberation time of the piezoelectric element 20.

[0061] Furthermore, in the first embodiment, after the supply of the drive signal to the piezoelectric element 20 is stopped, a braking signal is supplied to the piezoelectric element 20 from the drive circuit 111, and after the supply of the braking signal is stopped, the damping circuit 140 is connected to the piezoelectric element 20 (the comparative example in Figure 13 is the same in this respect). This also allows for a rapid reduction of reverberation (i.e., the reverberation time can be kept low).

[0062] Furthermore, the control circuit 130 according to the first embodiment performs damper connection control to connect the damping circuit 140 to the piezoelectric element 20 in a specific sequence after stopping the supply of a braking signal to the piezoelectric element 20. That is, in damper connection control, the control circuit 130 according to the first embodiment starts the braking operation before connecting the damping circuit 140 to the piezoelectric element 20 (t A12 ), connect the damping circuit 140 and the piezoelectric element 20, then stop the brake operation and turn the drive circuit 111 completely off (t A13 via t A14 ). For example, at time t A13 When switches 151 and 152 are turned on (i.e., when switching from the off state to the on state), if the drive circuit 111 is completely off, pulse-like noise associated with the turning on of switches 151 and 152 may be added to the piezoelectric element 20, potentially prolonging the reverberation. By employing damper connection control, the potential across the piezoelectric element 20 is fixed to the ground potential when switches 151 and 152 are turned on, so that the pulse-like noise associated with the turning on of switches 151 and 152 is absorbed by the pattern having the ground potential. As a result, the superposition of noise on the piezoelectric element 20 is avoided, and consequently, the increase in reverberation time due to noise is avoided.

[0063] In addition, the control circuit 130 according to the first embodiment performs damper disconnection control, which disconnects the damping circuit 140 from the piezoelectric element 20 in a specific flow. That is, in damper disconnection control, the control circuit 130 according to the first embodiment starts a brake operation before disconnecting the damping circuit 140 and the piezoelectric element 20 (t A15 ), the damping circuit 140 and the piezoelectric element 20 are disconnected before the brake operation is stopped (t A16 via t A5 ). For example, at time t A16 When switches 151 and 152 are turned off (i.e., when switching from the on state to the off state), if the drive circuit 111 is completely off, pulse-like noise associated with the turning off of switches 151 and 152 may be added to the piezoelectric element 20, potentially causing the already reduced reverberation energy to increase again. By employing damper disconnection control, the potential across the piezoelectric element 20 is fixed to the ground potential when switches 151 and 152 are turned off, so that the pulse-like noise associated with the turning off of switches 151 and 152 is absorbed by the pattern having the ground potential. As a result, the superposition of noise on the piezoelectric element 20 is avoided, and consequently, the increase in reverberation time due to noise is avoided.

[0064] <<Second Example>> A second embodiment will now be described. The second embodiment adds applied technology to the first embodiment, and unless otherwise specified in the second embodiment, the description of the first embodiment also applies to the second embodiment.

[0065] In the second embodiment, compared to the first embodiment, the isolation switch SW_L shown in Figure 14 is added to the semiconductor device 10. That is, in the first embodiment, the sources of transistors M1L and M2L are directly connected to line LN1, whereas in the second embodiment, the isolation switch SW_L is inserted between node ND_L, to which the sources of transistors M1L and M2L are commonly connected, and line LN1. One end of the isolation switch SW_L is connected to node ND_L, and the other end of the isolation switch SW_L is connected to line LN1 to which the ground potential is applied.

[0066] The isolation switch SW_L can be any switching element, but here it is assumed that the isolation switch SW_L is composed of an N-channel MOSFET, and the N-channel MOSFET used as the isolation switch SW_L is also referred to as transistor SW_L using the symbol "SW_L". The ON state of the isolation switch SW_L and the ON state of transistor SW_L are synonymous, and the OFF state of the isolation switch SW_L and the OFF state of transistor SW_L are synonymous. The drain of transistor SW_L is connected to node ND_L, and the source of transistor SW_L is connected to line LN1 to which the ground potential is applied. The gate driver 112 controls the ON / OFF state of transistors M1H, M1L, M2H, and M2L and SW_L individually by controlling the gate potentials of transistors M1H, M1L, M2H, and M2L and SW_L according to the control signal CNT1 supplied from the control circuit 130.

[0067] Figure 15 shows the timing chart of the detection unit operation according to the second embodiment. The timing chart in Figure 15 is the same as the timing chart in Figure 12, but with the state transitions of the isolation switch SW_L added. Except for the isolation switch SW_L, the content and flow of the detection unit operation are the same as shown in the first embodiment, so in the second embodiment, unless otherwise necessary, only the operation of the isolation switch SW_L will be described below.

[0068] In the detection unit operation, the isolation switch SW_L is set to time t A2 It remains in the ON state until time t A2 and t A3 Brake period P A2 It remains in the OFF state at time t. The isolation switch SW_L is set to OFF at time t A3 and t A4 First braking period P A3 and time t A5 Subsequent reception period P A5 It remains in the ON state at time t. Also, as shown in Figure 15, A4 and t A12During this time, the isolation switch SW_L is in the ON state, and at time t A12 and t A5 During this time, the isolation switch SW_L is in the off state. However, at time t A4 and t A5 Second braking period P A4 You may keep the isolation switch SW_L in the ON state throughout the entire process.

[0069] What is noteworthy is the braking period P. A2 The key point is that when the brake operation is being performed (when both transistors M1L and M2L are in the ON state), the isolation switch SW_L is in the OFF state.

[0070] This results in a braking period P A2 In this configuration, a current loop is formed between transistors M1L and M2L, which are separated from the ground pattern, and the piezoelectric element 20. A current based on the reverberation energy of the piezoelectric element 20 (i.e., the stored mechanical energy of the piezoelectric element 20) flows through this current loop, thereby effectively dissipating the reverberation energy of the piezoelectric element 20. In the method of the first embodiment, the braking period P A2 In this configuration, depending on the relationship between transistors M1L and M2L and the ground pattern, a current based on the reverberation energy of the piezoelectric element 20 may leak into the ground pattern. Such leakage of current may somewhat degrade the effective reduction of reverberation and may also have undesirable effects on other circuits connected to the ground pattern. According to the second embodiment, these concerns are resolved.

[0071] In the example shown in Figure 15, the braking period P is... A2 During the entire period in which the internal braking operation is performed (the period in which both transistors M1L and M2L are ON), the isolation switch SW_L is OFF. However, during the braking period P A2 In this case, the isolation switch SW_L may be kept in the OFF state only for a portion of the period during which the braking operation is performed. For example, as shown in Figure 16, in the detection unit operation, at time tA2 Time t a predetermined small amount of time later A2 Keep the isolation switch SW_L in the ON state until time t A2 'from time t A3 The isolation switch SW_L may be kept in the OFF state during the period up to time t. A3 The rest is as described above.

[0072] Furthermore, the structures of transistors M1L and M2L may be determined such that the impedance between the first and second ends of the piezoelectric element 20 (impedance at frequency f) is the same as the sum of the on-resistances of transistors M1L and M2L. This maximizes the consumption of reverberation energy of the piezoelectric element 20 due to the braking action, making it possible to quickly reduce reverberation.

[0073] <<Third Example>> A third embodiment will now be described. Figure 17 shows a timing chart of the detection unit operation according to the third embodiment. In the third embodiment, the drive circuit 111 is set and held to the second brake state (see Figure 4) during braking. The third embodiment is the same as the first embodiment, except that the state of the drive circuit 111 during braking is changed from the first brake state to the second brake state, based on the first embodiment.

[0074] In other words, in the third embodiment, the braking period P A2 In all or part of this, the drive circuit 111 is maintained in the second brake state (i.e., transistors M1H and M2H are kept ON and transistors M1L and M2L are kept OFF). Therefore, the brake period P A2 In the first embodiment, the period during which the drive circuit 111 is set to the first brake state (in the example of Figure 12, time t) is specified. A2 and t A11 In the third embodiment, the period between (time t in the example of Figure 17) is the period during which the drive circuit 111 is set to the second brake state. A2 and t A11 It is replaced by the interval (this replacement is called the first replacement).

[0075] Also, the second braking period P A4 In the first embodiment, the period during which the drive circuit 111 is set to the first brake state (in the example of Figure 12, time t) is specified. A12 and t A14 The period and time t A15 and t A5 In the third embodiment, the period between (time t in the example of Figure 17) is the period during which the drive circuit 111 is set to the second brake state. A12 and t A14 The period and time t A15 and t A5 The period in between is replaced (this replacement is referred to as the second replacement). That is, the damper connection control and damper disconnection control described in the first embodiment are also performed in the third embodiment, and in the third embodiment, the drive circuit 111 is set and held in the second brake state by the brake operation in the damper connection control and damper disconnection control.

[0076] Furthermore, based on the first embodiment, it is also possible to perform only one of the first substitution or the second substitution.

[0077] <<Fourth Example>> The fourth embodiment will now be described. The fourth embodiment is an application of advanced technology to the third embodiment, and the description of the third embodiment applies to the fourth embodiment as well, except for matters not specifically mentioned in the fourth embodiment. The fourth embodiment is an application of the same modification to the third embodiment as the modification from the first embodiment to the second embodiment.

[0078] In the fourth embodiment, compared to the first and third embodiments, the isolation switch SW_H shown in Figure 18 is added to the semiconductor device 10. That is, in the first and third embodiments, the sources of transistors M1H and M2H are directly connected to line LN2, whereas in the fourth embodiment, the isolation switch SW_H is inserted between node ND_H, to which the sources of transistors M1H and M2H are commonly connected, and line LN2. One end of the isolation switch SW_H is connected to node ND_H, and the other end of the isolation switch SW_H is connected to line LN2 to which the drive power supply voltage VDRV is applied.

[0079] The isolation switch SW_H can be any switching element, but here it is assumed that the isolation switch SW_H is composed of a P-channel MOSFET, and the P-channel MOSFET used as the isolation switch SW_H is also referred to as transistor SW_H using the symbol "SW_H". The ON state of the isolation switch SW_H and the ON state of transistor SW_H are synonymous, and the OFF state of the isolation switch SW_H and the OFF state of transistor SW_H are synonymous. The drain of transistor SW_H is connected to node ND_H, and the source of transistor SW_H is connected to line LN2 to which the drive power supply voltage VDRV is applied. The gate driver 112 controls the ON / OFF state of transistors M1H, M1L, M2H, and M2L and SW_H individually by controlling the gate potentials of transistors M1H, M1L, M2H, and M2L and SW_H according to the control signal CNT1 supplied from the control circuit 130.

[0080] Figure 19 shows the timing chart of the detection unit operation according to the fourth embodiment. The state control (on / off control) of the isolation switch SW_H in the fourth embodiment is the same as the state control (on / off control) of the isolation switch SW_L in the second embodiment, and the explanation of the state control of the isolation switch SW_L in the second embodiment also applies to the fourth embodiment. When applying this, it is sufficient to read the isolation switch SW_L in the second embodiment as isolation switch SW_H in the fourth embodiment. Similar to the transformation from Figure 15 to Figure 16 described in the second embodiment, the transformation from Figure 19 to Figure 20 is also possible. Therefore, in the fourth embodiment, the brake period P A2 During the entire or partial period in which the internal braking operation is performed (the period in which the drive circuit 111 is set to and held in the second braking state), the isolation switch SW_H is in the OFF state. Transmission period P A1 , first braking period P A3 and reception period P A5 Then the isolation switch SW_H remains in the ON state. In the example in Figure 19, at time t A12 and t A5 During the interval, the isolation switch SW_H is in the off state, but during the second braking period P A4The isolation switch SW_H may be kept in the ON state throughout the entire process.

[0081] In the fourth embodiment, the structures of transistors M1H and M2H may be determined such that the impedance between the first and second ends of the piezoelectric element 20 (impedance at frequency f) is the same as the sum of the on-resistances of transistors M1H and M2H. This maximizes the consumption of reverberation energy of the piezoelectric element 20 due to the braking action, making it possible to quickly reduce reverberation.

[0082] <<Example 5>> A fifth embodiment will be described. In the fifth embodiment, application techniques, modification techniques, and supplementary information for each of the above-described techniques will be explained.

[0083] The ultrasonic sensor 1 can be mounted on any device. For example, as shown in Figure 21, one or more ultrasonic sensors 1 may be installed on a vehicle CR such as an automobile. In the example in Figure 21, four ultrasonic sensors 1 are installed on the rear of the vehicle body of the vehicle CR, and distance detection processing and proximity detection processing can be performed on an object that may be located at the rear of the vehicle CR (example of the detection target object OBJ in Figure 1). In this case, the upper block 2 may be an ECU (Electronic Control Unit) mounted on the vehicle CR.

[0084] The channel types of FETs (field-effect transistors) shown in each embodiment are illustrative, and the configuration of the circuit including the FETs can be modified so that an N-channel FET is changed to a P-channel FET, or a P-channel FET is changed to an N-channel FET.

[0085] As long as no inconvenience arises, any transistor described above may be any type of transistor. For example, any transistor described above as a MOSFET can be replaced with a junction FET, an IGBT (Insulated Gate Bipolar Transistor), or a bipolar transistor, as long as no inconvenience arises. Any transistor has a first electrode, a second electrode, and a control electrode. In an FET, one of the first and second electrodes is the drain and the other is the source, and the control electrode is the gate. In an IGBT, one of the first and second electrodes is the collector and the other is the emitter, and the control electrode is the gate. In a bipolar transistor that does not belong to the IGBT category, one of the first and second electrodes is the collector and the other is the emitter, and the control electrode is the base.

[0086] The embodiments of this disclosure can be modified in various ways as appropriate within the scope of the technical idea set forth in the claims. The embodiments described above are merely examples of embodiments of this disclosure, and the meaning of the terms in this disclosure or each constituent element is not limited to those described above. The specific numerical values ​​given in the above description are merely examples and can, of course, be changed to various numerical values.

[0087] <<Note>> A note is provided regarding this disclosure in which specific configuration examples are shown in the embodiments described above.

[0088] A semiconductor device (10; see Figure 3) relating to one aspect of the present disclosure comprises a drive circuit (111) capable of supplying an ultrasonic drive signal to a piezoelectric element (20) and capable of supplying a braking signal having a different phase from the phase of the drive signal to the piezoelectric element after the supply of the drive signal is stopped, and a control circuit (130) capable of controlling the drive circuit, wherein the drive circuit comprises a full bridge circuit provided between a first line (LN1) and a second line (LN2) to which a higher potential than that of the first line should be applied, and is configured to supply the drive signal and the braking signal to the piezoelectric element using the full bridge circuit based on the potential difference between the first line and the second line, and the full bridge circuit comprises a first switch (M1H) provided on the second line side and a second switch (M1L) provided on the first line side The control circuit has a series circuit and a series circuit of a third switch (M2H) provided on the second line side and a fourth switch (M2L) provided on the first line side, and the connection nodes between the first switch and the second switch, and the connection nodes between the third switch and the fourth switch are configured to be connectable to the first end and the second end of the piezoelectric element, respectively, and the control circuit is configured to cause the drive circuit to perform a braking operation after stopping the supply of the drive signal to the piezoelectric element and before supplying the braking signal to the piezoelectric element (see Figure 12 or Figure 17), and in the braking operation, the first switch and the third switch are turned off and the second switch and the fourth switch are turned on, or the first switch and the third switch are turned on and the second switch and the fourth switch are turned off (first configuration).

[0089] The braking action described above causes the reverberation energy of the piezoelectric element (i.e., the stored mechanical energy of the piezoelectric element) based on the drive signal to be released into the pattern of the first or second line, or consumed in the current loops via the second and fourth switches and the piezoelectric element, or via the first and third switches and the piezoelectric element, thereby reducing the reverberation time of the piezoelectric element.

[0090] In the semiconductor device according to the first configuration (see Figures 14 to 16), the control circuit may further include an isolation switch (SW_L) inserted between the connection node between the second switch and the fourth switch and the first line, wherein the control circuit keeps the isolation switch ON during the period of supplying the drive signal to the piezoelectric element and the period of supplying the braking signal to the piezoelectric element, and keeps the isolation switch OFF for at least a portion of the period during which the first switch and the third switch are OFF and the second switch and the fourth switch are ON due to the braking operation (second configuration).

[0091] By keeping the isolation switch off during braking, a current loop is formed through the second and fourth switches, which are isolated from the first line, and the piezoelectric element. A current based on the reverberation energy of the piezoelectric element (i.e., the stored mechanical energy of the piezoelectric element) flows through this current loop, making it possible to effectively dissipate the reverberation energy of the piezoelectric element.

[0092] In the semiconductor device according to the first configuration (see Figures 18 to 20), the control circuit may further include an isolation switch (SW_H) inserted between the connection node between the first switch and the third switch and the second line, wherein the control circuit keeps the isolation switch ON during the period of supplying the drive signal to the piezoelectric element and the period of supplying the braking signal to the piezoelectric element, and keeps the isolation switch OFF for at least a portion of the period during which the first switch and the third switch are ON and the second switch and the fourth switch are OFF due to the braking operation (third configuration).

[0093] By keeping the isolation switch off during braking, a current loop is formed through the first and third switches, which are isolated from the second line, and the piezoelectric element. A current based on the reverberation energy of the piezoelectric element (i.e., the stored mechanical energy of the piezoelectric element) flows through this current loop, making it possible to effectively dissipate the reverberation energy of the piezoelectric element.

[0094] In a semiconductor device relating to any of the first to third configurations (see Figures 3 and 12, etc.), a damping circuit (140) having a resistive load (141) and an inductive load (142) may be provided, and the control circuit may be configured to connect to the piezoelectric element after the supply of the drive signal to the piezoelectric element has been stopped, the brake operation has been performed, and the braking signal has been supplied from the drive circuit to the piezoelectric element, and then the damping circuit has been connected to the piezoelectric element (fourth configuration).

[0095] By supplying a damping signal with a phase different from the drive signal to the piezoelectric element after the supply of the drive signal to the piezoelectric element has been stopped, the reverberation of the piezoelectric element can be reduced. The damping signal is effective in reducing reverberation in regions where the amplitude of reverberation (amplitude of the piezoelectric element due to reverberation) is high, but as the amplitude of reverberation decreases, the damping signal itself may become a new source of reverberation. On the other hand, reverberation can also be reduced by connecting a resistive load or inductive load to the piezoelectric element after the supply of the drive signal has been stopped, through the absorption of the mechanical energy of the piezoelectric element. Here, the inventors have found that resistive loads or inductive loads have a relatively high reverberation reduction effect when the amplitude of reverberation is small, but the reverberation reduction effect is relatively low when the amplitude of reverberation is large due to voltage constraints of the circuit, etc. Based on this finding, by adopting the fourth configuration, it is possible to reduce reverberation quickly (i.e., the reverberation time can be kept low).

[0096] In the semiconductor device relating to the fourth configuration (for example, at time t in Figure 12) A12 and t A14 (See reference), the control circuit stops supplying the braking signal to the piezoelectric element (t A4 (After the above), the system may be configured to perform damper connection control, and in the damper connection control, the braking operation may be started before connecting the damping circuit to the piezoelectric element, and the braking operation may be stopped after connecting the damping circuit and the piezoelectric element, thereby turning off all of the first to fourth switches (fifth configuration).

[0097] Damper connection control prevents noise from being superimposed on the piezoelectric element when the damping circuit and piezoelectric element switch from a disconnected state to a connected state. As a result, an increase in reverberation time due to noise is avoided.

[0098] In the semiconductor device relating to the fifth configuration (for example, at time t in Figure 12) A15 and t A5 (See reference), the control circuit stops supplying the braking signal to the piezoelectric element (t A4 (after) the damper connection control connects the damping circuit and the piezoelectric element (t A13 The system may be configured to perform damper disconnection control after the above, and in the damper disconnection control, the braking operation may be started before the damping circuit and the piezoelectric element are disconnected, and the braking operation may be stopped after the damping circuit and the piezoelectric element are disconnected (sixth configuration).

[0099] Damper disconnection control prevents noise from being superimposed on the piezoelectric element when the damping circuit and piezoelectric element switch from a connected state to a disconnected state. As a result, an increase in reverberation time due to noise is avoided.

[0100] In a semiconductor device relating to any of the fourth to sixth configurations, the damping circuit may be configured such that the resistive load and the inductive load are connected in parallel (seventh configuration).

[0101] An ultrasonic sensor relating to one aspect of this disclosure has a configuration (the eighth configuration) comprising a semiconductor device according to any of the first to seventh configurations and a piezoelectric element connected to the semiconductor device. [Explanation of symbols]

[0102] 1. Ultrasonic sensor 2 Upper Block 10 Semiconductor Devices 11. Transmitter Circuit 12 Receiving Circuit 13 Control circuits 20 Piezoelectric elements W1 Output wave signal W2 Reflected wave signal 111 Drive Circuit 112 Gate Driver 120 Receiving Circuit 130 Control circuits 140 Damping Circuit 141 Resistive load 142 Inductive load 150 Switch Circuits 160 Internal power circuit M1H, M1L, M2H, M2L Transistors (1st to 4th switches) SW_L, SW_H Isolation Switch

Claims

1. A drive circuit is configured to supply a drive signal in the ultrasonic band to a piezoelectric element, and to supply a braking signal having a phase different from the phase of the drive signal to the piezoelectric element after the supply of the drive signal is stopped. A control circuit configured to control the aforementioned drive circuit, Equipped with a separate switch, The drive circuit includes a full-bridge circuit provided between a first line and a second line to which a higher potential than that of the first line should be applied, and is configured to supply the drive signal and the braking signal to the piezoelectric element using the full-bridge circuit based on the potential difference between the first line and the second line. The full-bridge circuit has a series circuit of a first switch provided on the second line side and a second switch provided on the first line side, and a series circuit of a third switch provided on the second line side and a fourth switch provided on the first line side, and the connection nodes between the first switch and the second switch, and the connection nodes between the third switch and the fourth switch are configured to be connectable to the first end and the second end of the piezoelectric element, respectively. The control circuit is configured to cause the drive circuit to perform a braking action after stopping the supply of the drive signal to the piezoelectric element and before supplying the braking signal to the piezoelectric element. In the aforementioned braking operation, the first and third switches are turned off and the second and fourth switches are turned on, or the first and third switches are turned on and the second and fourth switches are turned off. The isolation switch is inserted between the connection node between the second switch and the fourth switch and the first line. The control circuit keeps the isolation switch ON during the period when the drive signal is supplied to the piezoelectric element and during the period when the braking signal is supplied to the piezoelectric element, and keeps the isolation switch OFF for at least a portion of the period when the first and third switches are OFF and the second and fourth switches are ON due to the braking operation. Semiconductor equipment.

2. A drive circuit is configured to supply a drive signal in the ultrasonic band to a piezoelectric element, and to supply a braking signal having a phase different from the phase of the drive signal to the piezoelectric element after the supply of the drive signal is stopped. A control circuit configured to control the aforementioned drive circuit, Equipped with a separate switch, The drive circuit includes a full-bridge circuit provided between a first line and a second line to which a higher potential than that of the first line should be applied, and is configured to supply the drive signal and the braking signal to the piezoelectric element using the full-bridge circuit based on the potential difference between the first line and the second line. The full-bridge circuit has a series circuit of a first switch provided on the second line side and a second switch provided on the first line side, and a series circuit of a third switch provided on the second line side and a fourth switch provided on the first line side, and the connection nodes between the first switch and the second switch, and the connection nodes between the third switch and the fourth switch are configured to be connectable to the first end and the second end of the piezoelectric element, respectively. The control circuit is configured to cause the drive circuit to perform a braking action after stopping the supply of the drive signal to the piezoelectric element and before supplying the braking signal to the piezoelectric element. In the aforementioned braking operation, the first and third switches are turned off and the second and fourth switches are turned on, or the first and third switches are turned on and the second and fourth switches are turned off. The isolation switch is inserted between the connection node between the first switch and the third switch and the second line. The control circuit keeps the isolation switch ON during the period when the drive signal is supplied to the piezoelectric element and during the period when the braking signal is supplied to the piezoelectric element, and keeps the isolation switch OFF for at least a portion of the period when the first and third switches are ON and the second and fourth switches are OFF due to the braking operation. Semiconductor equipment.

3. The damping circuit further includes a resistive load and an inductive load, The control circuit is configured to connect to the piezoelectric element after the braking operation has stopped supplying the drive signal to the piezoelectric element, and after the braking operation has occurred, the damping circuit has been connected to the piezoelectric element. The semiconductor device according to claim 1 or 2.

4. A drive circuit is configured to supply a drive signal in the ultrasonic band to a piezoelectric element, and to supply a braking signal having a phase different from the phase of the drive signal to the piezoelectric element after the supply of the drive signal is stopped. A control circuit configured to control the aforementioned drive circuit, A damping circuit having a resistive load and an inductive load is provided, The drive circuit includes a full-bridge circuit provided between a first line and a second line to which a higher potential than that of the first line should be applied, and is configured to supply the drive signal and the braking signal to the piezoelectric element using the full-bridge circuit based on the potential difference between the first line and the second line. The full-bridge circuit has a series circuit of a first switch provided on the second line side and a second switch provided on the first line side, and a series circuit of a third switch provided on the second line side and a fourth switch provided on the first line side, and the connection nodes between the first switch and the second switch, and the connection nodes between the third switch and the fourth switch are configured to be connectable to the first end and the second end of the piezoelectric element, respectively. The control circuit is configured to cause the drive circuit to perform a braking action after stopping the supply of the drive signal to the piezoelectric element and before supplying the braking signal to the piezoelectric element. In the aforementioned braking operation, the first and third switches are turned off and the second and fourth switches are turned on, or the first and third switches are turned on and the second and fourth switches are turned off. The control circuit is configured to connect to the piezoelectric element after the braking operation has stopped and the damping circuit has been supplied to the piezoelectric element from the drive circuit, The control circuit is configured to perform damper connection control after the supply of the braking signal to the piezoelectric element is stopped, and in the damper connection control, the braking operation is started before the damping circuit is connected to the piezoelectric element, and the braking operation is stopped after the damping circuit and the piezoelectric element are connected, turning off all of the first to fourth switches. Semiconductor equipment.

5. The control circuit is configured to perform damper disconnection control after stopping the supply of the braking signal to the piezoelectric element, connecting the damping circuit and the piezoelectric element by the damper connection control, and in the damper disconnection control, the braking operation is started before the connection between the damping circuit and the piezoelectric element is interrupted, and the braking operation is stopped after the connection between the damping circuit and the piezoelectric element is interrupted. The semiconductor device according to claim 4.

6. In the damping circuit, the resistive load and the inductive load are connected in parallel. or the semiconductor device according to any one of claims 3 to 5.

7. A semiconductor device according to any one of claims 1 to 6, The semiconductor device is equipped with a piezoelectric element connected to the semiconductor device. Ultrasonic sensor.

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