Image codec method, image decodec method, and decoder

Abstract

To provide an image codec method, an image decodec method, an encoder, a decoder for effectively improving efficiency of a codec.SOLUTION: Before executing coding processing in accordance with MIP modes, an encoder executes modification for unifying initial right shift parameters corresponding to different sizes and different MIP mode numbers according to offset parameters for indicating right shift digits of predicted values and, in the case of executing the coding processing in accordance with the MIP modes, executes the coding processing in accordance with the offset parameters. Before executing decoding processing in accordance with the MIP modes, a decoder executes modification for unifying initial right shift parameters corresponding to different sizes and different MIP mode numbers according to offset parameters and, in the case of executing the decoding processing in accordance with the MIP modes, executes the decoding processing in accordance with the offset parameters.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of video coders, and in particular, to an image coding method, an encoder, a decoder, and a storage medium.

Background Art

[0002] In the reference software test platform of Versatile Video Coding (VVC), a new intra coding technology, Matrix-based Intra Prediction (MIP), has been proposed. MIP is an intra prediction technology based on a neural network, that is, it uses a multi-layer neural network to predict the luminance value of the current block based on adjacent reconstructed luminance blocks.Specifically, when performing intra prediction using the MIP mode, similar to the conventional intra mode, the input of the MIP prediction is also the data of the luminance blocks adjacent to the previous row and the left column of the current block, and the output is the predicted value of the luminance component of the current block. The specific prediction process can be divided into three steps: downsampling, matrix vector multiplication, and interpolation.

[0003] However, when performing luminance prediction through the MIP mode, the parameters used for luminance blocks of different sizes may also be different, and thus, it is necessary to occupy a large storage space to store a large number of parameters, and the search and call of the parameters in the prediction process also increase the overall time and reduce the efficiency of the coder.

Summary of the Invention

Problems to be Solved by the Invention

[0004] The embodiments of this invention provide an image codec method, encoder, decoder, and storage medium, which reduce the storage space and overall time required for the codec process, thereby effectively improving the efficiency of the codec, while ensuring codec performance. [Means for solving the problem]

[0005] The technical solution of the present embodiment is realized as follows.

[0006] This embodiment provides an image coding method applicable to an encoder, and the method is Before performing the coding process according to the MIP mode, a correction is performed to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to an offset parameter, wherein the offset parameter is used to indicate the number of bits to right shift in the predicted value, and When performing coding processing according to the MIP mode, this includes performing coding processing according to the offset parameter.

[0007] This embodiment provides an image decoding method applicable to a decoder, the method being Before performing the decoding process according to the MIP mode, a correction is performed to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to an offset parameter, wherein the offset parameter is used to indicate the number of bits to right shift in the predicted value, and When performing the decoding process according to the MIP mode, this includes performing the decoding process according to the offset parameter.

[0008] This embodiment provides an encoder comprising a first correction portion and a coding portion, The first correction unit is configured to perform a correction that unifies the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to an offset parameter, before performing the coding process according to the MIP mode, wherein the offset parameter is used to indicate the number of bits to right shift in the predicted value. The coding section is configured to perform the coding process according to the offset parameter when the coding process is performed according to the MIP mode.

[0009] This embodiment provides a decoder comprising a second correction portion and a decoding portion, The second correction unit is configured to perform a correction that unifies the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to an offset parameter, before performing the decoding process according to the MIP mode, wherein the offset parameter is used to indicate the number of bits to right shift in the predicted value. The coding portion is configured to perform the decoding process according to the offset parameter when the decoding process is performed according to the MIP mode.

[0010] This embodiment provides an encoder comprising a first processor, a first memory for storing executable instructions of the first processor, a first communication interface, and a first bus used to connect the first processor, the first memory, and the first communication interface, and when the instructions are executed by the first processor, the above-described image coding method is realized.

[0011] This embodiment provides a decoder comprising a second processor, a second memory for storing executable instructions of the second processor, a second communication interface, and a second bus configured to connect the second processor, the second memory, and the second communication interface, and when the instructions are executed by the second processor, the above-described image decoding method is realized.

[0012] The embodiment of the present invention provides a computer-readable storage medium on which a program is stored, and is applied to an encoder and decoder, which realize the above-described image codec method when the program is executed by a processor. [Effects of the Invention]

[0013] Embodiments of the present invention provide an image codec method, an encoder, a decoder, and a storage medium. The encoder performs a correction according to an offset parameter to unify initial right-shift parameters corresponding to different sizes and different MIP mode numbers before performing a coding process according to the MIP mode, where the offset parameter is used to indicate the number of bits to right-shift the predicted value, and performs the coding process according to the offset parameter when performing a coding process according to the MIP mode. The decoder performs a correction according to an offset parameter to unify initial right-shift parameters corresponding to different sizes and different MIP mode numbers before performing a decoding process according to the MIP mode, and performs the decoding process according to the offset parameter when performing a decoding process according to the MIP mode. As can be seen therefrom, the image codec method proposed by this application uses an offset parameter to perform a correction that unifies the number of right-shifted bits of the predicted value, thereby giving all luminance blocks of different sizes and different MIP mode numbers the same sW value. This reduces the complexity of the MIP algorithm and ensures codec performance, while reducing the memory space and overall time required for the codec process and effectively improving codec efficiency, without the need to query and retrieve the sW value when performing codec processing. [Brief explanation of the drawing]

[0014] [Figure 1] This is a schematic diagram showing the arrangement of the 67 prediction modes in intra-prediction. [Figure 2] This is an example flowchart for coding in MIP mode. [Figure 3] This is a schematic diagram showing the arrangement of the adjacent luminance blocks above and to the left of the current block. [Figure 4] This is a schematic diagram of the configuration used to determine the DM mode. [Figure 5] This is a schematic diagram illustrating a video coding system. [Figure 6] It is an exemplary structural diagram of a video decoding system. [Figure 7] It is exemplary realization flowchart 1 of the image coding method proposed by the embodiments of the present application. [Figure 8] It is exemplary realization flowchart 2 of the image coding method proposed by the embodiments of the present application. [Figure 9] It is exemplary realization flowchart 1 of the image decoding method proposed by the embodiments of the present application. [Figure 10] It is exemplary realization flowchart 2 of the image decoding method proposed by the embodiments of the present application. [Figure 11] It is exemplary structural diagram 1 of the configuration of the encoder proposed by the embodiments of the present application. [Figure 12] It is exemplary structural diagram 2 of the configuration of the encoder proposed by the embodiments of the present application. [Figure 13] It is exemplary structural diagram 1 of the configuration of the decoder proposed by the embodiments of the present application. [Figure 14] It is exemplary structural diagram 2 of the configuration of the decoder proposed by the embodiments of the present application.

Embodiments for Carrying out the Invention

[0015] Hereinafter, referring to the drawings in the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described. It should be understood that the specific embodiments described here are only used to explain the related applications and do not limit the related applications. Furthermore, it should be noted that for the sake of ease of explanation, only the parts related to the related applications are shown in the drawings.

[0016] In video images, VVC accepts the Affine Linear Weighted Intra Prediction technique proposed by the Joint Video Experts Team (JVET)-N0217, correcting its name to Matrix-Based Intra Prediction, i.e., MIP technique, which adds a different number of matrix-based intra prediction modes to the intra luminance prediction process for differences in the size of intra luminance coding blocks.

[0017] To capture finer edge directions presented in natural video, VVC expands the 33 intra-luminance prediction angle modes defined in the video compression standard (HEVC: High Efficiency Video Coding) to 65. Figure 1 is a schematic diagram of the arrangement of the 67 prediction modes in intra-prediction. As shown in Figure 1, arrows numbered 2 to 66 represent the 65 intra-angle prediction modes. Furthermore, there are two non-angle modes: the gradually flattening Planar mode (numbered 0) and the DC mode (numbered 1). Therefore, the intra-prediction process in VVC includes two non-angle modes and 65 angle modes, and these 67 prediction modes are referred to as the conventional modes of intra-prediction.

[0018] MIP is an intra-prediction technique based on neural networks, specifically a multi-layer neural network that predicts the luminance value of the current block based on adjacent reconstructed pixels. Specifically, the MIP technique divides luminance coding blocks into three types according to the size of the intra-luminance coding block, setting the size of the luminance coding block as W × H, where W is the width parameter and H is the height parameter. According to the size of the luminance coding block, the luminance coding block can be divided into the following three types.

[0019] A luminance coding block with a size of 4x4 is a first-type luminance block, a luminance coding block with sizes of 8x4, 4x8, and 8x8 is a second-type luminance block, and a luminance coding block of any other size is a third-type luminance block.

[0020] For these three types of intra-luminance coding blocks, MIP technology adds M types of MIP modes based on 67 types of conventional intra-prediction modes, where M=35 for the first type of luminance block, M=19 for the second type of luminance block, and M=11 for the third type of luminance block.

[0021] Specifically, the MIP technology is applied only to intra-luminance prediction. Similar to conventional modes, the input to MIP prediction is data from the previous row and left column of the current block, and the output is the predicted value of the current block. The specific prediction process is divided into three steps: averaging, matrix vector multiplication, and interpolation. That is, by performing these three steps on the reconstructed luminance values ​​of adjacent pixels in the input previous row and left column, the predicted luminance component value of the current block can be obtained.

[0022] Figure 2 is an exemplary flowchart for coding in MIP mode, and as shown in Figure 2, the luminance prediction performed by MIP mode is specifically achieved as follows.

[0023] In step 1, perform an average operation on the upper adjacent reference points of the current block to obtain a vector bdry with a total of N values. top Obtain the vector bdry with a total of N values ​​by performing an average operation on the adjacent reference points to the left of the current block. left Obtain the vector bdry. If the current block is a first-type luminance coding, N=2; if the current block is a second-type or third-type luminance coding, N=4. top and vector bdryleft This is a new vector bdry red Form and perform subsequent operations.

[0024] In step 2, via the mode number k of the MIP mode, the corresponding matrix A k and offset amount b k The following equation (1) is used to calculate and obtain partial predicted values ​​for the current block identified by the cross lines, as shown in Figure 2.

number

[0025] In step 3, the remaining predicted values ​​for the current block, Predred, are obtained via linear interpolation.

[0026] It should be noted that the specific coding mode used for intra-prediction for the implementation process coded by the current block must be written to the compressed code stream, so that the decoding side can determine, by analyzing the mode information, whether to use a conventional mode or an MIP mode, and if a conventional mode is used, which specific conventional mode, and if an MIP mode is used, which specific MIP mode.

[0027] In VVC's intra-prediction, for each luminance coding block, a comparison of the rad distortion cost (RDcost) between 67 conventional modes and M MIP modes is performed to select the optimal mode for coding from the 67 conventional modes and M MIP modes. To save bit overhead, VVC uses an intra-mode coding technique based on the Most Probable Modes List (MPM).

[0028] Note that the multi-reference line technique (extend reference line) and intra-sub-partitioning technique (ISP) are used only for modes in the MPM list. Therefore, if both extendrefflag and ispflag are 0, i.e., a reference line of 0 is used and sub-partitioning is not performed, you can directly code the optimal mode position in the MPM list without needing to code mpmflag.

[0029] Furthermore, for constructing the MPM list and MIPMPM list, in the VVC luminance intra prediction, if the optimal mode selected for the current block is a conventional mode, it is necessary to construct an MPM list containing the six most likely conventional modes. If the optimal mode selected for the current block is an MIP mode, it is necessary to construct an MIPMPM list containing the three most likely MIP modes.

[0030] Figure 3 is a schematic diagram of the arrangement of the adjacent luminance blocks above and to the left of the current block, and as shown in Figure 3, both of the above lists are derived according to the optimal modes of the adjacent luminance blocks above (A) and to the left (L) of the current block shown in Figure 3.

[0031] Furthermore, in order to construct the MIPMPM list, if the optimal mode for the current block is the MIP mode in the VVC intra prediction, then the MIPMPM list needs to be constructed. In the process of constructing the MIPMPM list, it is first necessary to obtain the MIP mode ABOVE_MIP, which corresponds to the optimal mode of the adjacent luminance block above, and the MIP mode LEFT_MIP, which corresponds to the optimal mode of the adjacent luminance block to the left.

[0032] Furthermore, after obtaining LEFT_MIP and ABOVE_MIP, construct a MIPMPM list containing the three most likely MIPMPM modes according to the following method, where the number in MIPMPM is the MIP mode number, the number range is 0 to (M-1), the numbers are 0 to 34 for the first type of luminance block, the numbers are 0 to 18 for the second type of luminance block, and the numbers are 0 to 10 for the third type of luminance block. If LEFT_MIP is available (not -1), put LEFT_MIP into MIPMPMlist, If ABOVE_MIP is available (not -1), add ABOVE_MIP to MIPMPMlist after the redundancy check. If LEFT_MIP is unavailable (-1) and ABOVE_MIP is unavailable (-1), then, according to the current block type, add a default list until MIPMPMlist is satisfied, after a redundancy check.

[0033] The default list for the first type of luminance block is {17,34,5}. The default list for the second type of luminance block is {0,7,16}. The default list for the third type of luminance block is {1,4,6}.

[0034] Furthermore, in the VVC saturation intra-prediction process, there is a Direct Mode (DM) that uses correlations between components, and performs intra-prediction of the current saturation block using the intra-prediction mode of the central position of the luminance coding block at the same position corresponding to the current block. Figure 4 is a schematic diagram of the arrangement that determines the DM mode, and as shown in Figure 4, since the MIP technique is used only for luminance coding blocks, if the intra-prediction mode of the CR position in Figure 4 is the MIP mode, it is necessary to add that the MIP mode is mapped to the conventional mode via the "MIP-conventional mapping table" to perform intra-prediction of the current saturation block.

[0035] In other words, with the introduction of MIP technology, in the intra-prediction process, it is necessary to map conventional modes to MIP modes when constructing the MPM list and determining the DM mode, and it is also necessary to map MIP modes to conventional modes when constructing the MPM list and determining the DM mode. [Table 1]

[0036] Furthermore, the MPM list construction process and the DM mode acquisition process require the use of mapping from MIP modes to conventional modes. Specifically, 35 / 19 / 11 types of MIP modes are mapped to 67 types of conventional modes via the "MIP-Conventional Mapping Table". Three "MIP-Conventional Mapping Tables" for three types of luminance blocks are shown in Tables 2, 3, and 4. [Table 2] [Table 3] [Table 4]

[0037] Figure 5 is an exemplary structural diagram of a video coding system, and as shown in Figure 5, the video coding system 100 comprises a transform and quantization module 101, an intra-estimation module 102, an intra-prediction module 103, a motion correction module 104, a motion estimation module 105, an inverse transform and inverse quantization module 106, a filter control analysis module 107, an unblock filtering and sample adaptive indent (SAO) filtering module 108, a header coding and context-based adaptive binary arithmetic coding (CABAC) module. Figure 6 is an exemplary structural diagram of a video decoding system, and as shown in Figure 6, the video decoding system 200 comprises a header decoding and CABAC decoding module 201, an inverse transform and inverse quantization module 202, an intra prediction module 203, a motion correction module 204, an unblock filtering and SAO filtering module 205, and a decoding image cache module 206. After partial processing by the video coding system 100, including the transformation and quantization module 101, the intra estimation module 102, the intra prediction module 103, the motion correction module 104, the motion estimation module 105, the unblocking filtering and SAO filtering module 108, and the header coding and CABAC module 109, the video image outputs a code stream of the video image. This code stream is input to the video decoding system 200, where, after partial processing by the video decoding system 200, including the header decoding and CABAC decoding module 201, the inverse transformation and inverse quantization module 202, the intra prediction module 203, and the motion correction module 204, the original video image is ultimately restored.

[0038] Depending on the height and width parameters, the current block can be of 25 different sizes. Specifically, the standard specifies that the maximum luminance block is 128×128, but the maximum size of the conversion unit is 64×64. Therefore, since a quadtree partition must first be performed on a luminance block of 128×128 size, the maximum luminance block size is 64×64. Table 5 is a schematic table of luminance block sizes, as shown in Table 5. [Table 5]

[0039] In the prior art, the MIP mode is limited according to the height and width parameters of the current block. Specifically, if the ratio of the width to height of the current block is greater than 4, or if the ratio of the height to width is greater than 4, the current block is not coded via the MIP mode. Table 6 shows the limitations on luminance block size in the MIP mode of the prior art, as shown in Table 6. [Table 6]

[0040] In the prior art, for the first type of luminance block in MIP mode (luminance block corresponding to 4x4), the two adjacent luminance blocks above and the adjacent luminance block to the left are used in a matrix operation to generate a 4x4 prediction block; for the second type of luminance block in MIP mode (luminance block corresponding to 4x8, 8x4, and 8x8), the four adjacent luminance blocks above and the adjacent luminance block to the left are used in a matrix operation to generate a 4x4 prediction block; and for the third type of luminance block in MIP mode (luminance block corresponding to other sizes), the four adjacent luminance blocks above and the adjacent luminance block to the left are used in a matrix operation to generate a 4x8 prediction block (4x16 luminance block), an 8x4 prediction block (16x4 luminance block), or an 8x8 prediction block (luminance block of other sizes). Here, since the third type of luminance block generates a non-square prediction block, it is necessary to perform odd row extraction on the matrix when calculating.

[0041] Furthermore, in the grammar, the application class of the MIP can be displayed via MipSizeId, the number of MIP modes via numModes, the number of luminance blocks in the upper reference row or left reference column obtained by downsampling via boundarySize, the width parameter of the predicted block can be displayed via predW, the height parameter of the predicted block can be displayed via predH, and the side length of the MIP matrix can be displayed via predC. Table 7 shows the grammar relationships corresponding to the prior art MIP modes, and as shown in Table 7, MipSizeId, numModes, boundarySize, predW, predH, and predC in the grammar have the following relationships. [Table 7]

[0042] Furthermore, in the grammar, MipSizeId takes a value of 0 to display a 4x4 luminance block, a value of 1 to display 4x8, 8x4, and 8x8 luminance blocks, and a value of 2 to display luminance blocks of other sizes. numModes displays the total number of MIP prediction modes, i.e., there are a total of 35 types of 4x4 luminance blocks, a total of 19 types of 4x8, 8x4, and 8x8 luminance blocks, and a total of 11 types of luminance blocks of other sizes. boundarySize indicates that adjacent luminance blocks in the row above or the column to the left of the current block will ultimately be downsampled to 2 or 4 adjacent luminance blocks.

[0043] In the prior art, when an encoder performs brightness prediction via MIP mode, it can be done via the following equation (2).

number

[0044] Here, mWeight and vBias are the weight matrix and bias matrix obtained by training each MIP mode via deep learning, specifically, mWeight is the weight matrix for each MIP mode and vBias is the bias matrix for each MIP mode. sB is the left-shift amount of the bias matrix, oW is the rounded-off value, and sW is the right-shift amount of the overall predicted value, and the sW value for different MIP modes needs to be obtained by looking up a table.

[0045] When generating the MIP prediction matrix based on JVET-N1001-v7, the encoder determines whether or not it is necessary to extract the prediction values ​​for odd-numbered rows via the variables incW and incH, specifically as follows:

number

[0046] Here, incW=2 or incH=2 indicates that extraction should be performed using either the width or height parameter.

[0047] Table 8 is a grammatical description of sW in the prior art. As shown in Table 8, the value of sW is 9 only when MipSizeId is equal to 1, i.e., when the current block size is 4×8, 8×4, or 8×8, and the MIP mode number is 3, 8, 12, or 17. In all other MIP modes, the value of sW is 8. Here, since the value of sW in MIP modes is a mapping relationship, the value of sW in all modes can be obtained via Table 8. [Table 8]

[0048] Table 9 shows the mWeight matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. [Table 9]

[0049] Table 10 shows the vBias matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. [Table 10]

[0050] Table 11 shows the mWeight matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. Table 12 shows the vBias matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. [Table 11] [Table 12]

[0051] As shown in Table 8, due to the different grammatical descriptions of sW in different MIP modes, when the encoder performs brightness prediction via MIP mode, if the MipSizeId of the current block is 1, i.e., the current block is a second-type brightness block (a brightness block with sizes of 4x8, 8x4, or 8x8), and the MIP mode number corresponding to the current coding block is mode 3, 8, 12, or 17, the value of sW will be different from other modes. This results in algorithmic inconsistency, increases the time complexity of the algorithm in the process of querying Table 8, and requires storage space for Table 8. In other words, when performing brightness prediction via MIP mode, the parameters used in brightness blocks of different sizes may also be different, thus requiring a large amount of storage space to store a large number of parameters, and the overall time for parameter retrieval and retrieval in the prediction process increases, reducing the efficiency of the codec.

[0052] To solve the above problems, this invention proposes an image coding method that corrects the sW values ​​in MIP mode numbers 3, 8, 12, and 17 of the second type of luminance block, thereby making the sW values ​​the same for all MIP mode numbers, thereby reducing memory space and overall time by eliminating the need for table lookup operations.

[0053] Furthermore, the image coding method proposed in this application can influence the intra-prediction portion of the video coding hybrid framework, specifically, it is applied primarily to the intra-prediction module 103 in video coding and the intra-prediction module 203 in video decoding, acting simultaneously on both the coding and decoding sides.

[0054] In the embodiments of this application, it should be noted that, based on the computational parameters obtained from training the machine learning method, the image codec method proposed herein can perform a correction to unify sW according to a fixed offset parameter, while simultaneously correcting the corresponding weight matrix and bias matrix. Hereinafter, in this application, the second type of luminance block is not limited to correcting the value of sW in MIP mode numbers 3, 8, 12, and 17, but performs a unification correction for different values ​​of sW, which are computational parameters obtained from training the machine learning method, after changes in specific parameters (including different combinations of parameters such as size, mode, and right shift value).

[0055] Furthermore, in the following embodiment, the image codec method proposed in this application will be illustrated using the values ​​of sW in MIP mode numbers 3, 8, 12, and 17 of the second type of luminance block as an example.

[0056] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the drawings of the embodiments.

[0057] In one embodiment of the present invention, Figure 7 is an exemplary implementation flowchart 1 of the image coding method proposed by the embodiment of the present invention, and as shown in Figure 7, in the embodiment of the present invention, the method by which the encoder performs image coding may include the following steps.

[0058] In step 101, before performing the coding process according to the MIP mode, a correction is performed to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, where the offset parameter is used to indicate the number of bits to right shift in the predicted value.

[0059] In the embodiment of the present invention, before performing the coding process according to the MIP mode, the encoder may first set an offset parameter used to indicate the number of offset bits.

[0060] In the embodiment of the present invention, based on equation (2) above, the offset parameter is sW in equation (2), which means that the offset parameter is the amount of right shift of the overall predicted value, and that when performing brightness prediction for the current block, the offset parameter is used to indicate the number of bits to right shift of the overall predicted value for the current block.

[0061] Furthermore, in the embodiments of the present invention, the encoder may set the offset parameter to a single fixed positive integer before performing the coding process according to the MIP mode. That is, after setting the offset parameter, the encoder determines the offset parameter to be used for any current block, regardless of the size of the current block or the MIP mode number corresponding to the current block.

[0062] It should be noted that in the embodiments of the present invention, when the encoder performs a correction to unify the initial right shift parameter corresponding to different sizes and different MIP mode numbers according to the offset parameter, the offset parameter can be set to any positive integer. Specifically, the encoder may preferably set the offset parameter sW to 6, or may preferably set the offset parameter sW to 7, or may preferably set the offset parameter sW to 8, or may preferably set the offset parameter sW to 9.

[0063] For example, Table 13 is a first grammatical description of sW in the present invention, and in the embodiment of the present invention, when the encoder performs a correction to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, the corresponding sW for a luminance block that is 4×8, 8×4, or 8×8 in size and has a MIP mode number of 3, 8, 12, or 17 can be set to the same value as the sW corresponding to other luminance blocks, that is, if the sW corresponding to other luminance blocks is 8, the sW corresponding to a luminance block that is 4×8, 8×4, or 8×8 in size and has a MIP mode number of 3, 8, 12, or 17 can be set to 8 to give different current blocks the same offset parameter sW. [Table 13]

[0064] For example, Table 14 is a second grammatical explanation of sW in the present invention, in an embodiment of the present invention, when the encoder performs a correction to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, the corresponding sW for a luminance block that is 4×8, 8×4, or 8×8 in size and has MIP mode numbers 3, 8, 12, or 17 can be set to the same value as the sW corresponding to other luminance blocks, that is, if the sW corresponding to other luminance blocks is 7, the sW corresponding to a luminance block that is 4×8, 8×4, or 8×8 in size and has MIP mode numbers 3, 8, 12, or 17 can be set to 7 to give different current blocks the same offset parameter sW. [Table 14]

[0065] For example, Table 15 is a second grammatical explanation of sW in the present invention, in an embodiment of the present invention, when the encoder performs a correction to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, the corresponding sW for a luminance block that is 4×8, 8×4, or 8×8 in size and has a MIP mode number of 3, 8, 12, or 17 can be set to the same value as the sW corresponding to other luminance blocks, that is, if the sW corresponding to other luminance blocks is 8, the sW corresponding to a luminance block that is 4×8, 8×4, or 8×8 in size and has a MIP mode number of 3, 8, 12, or 17 can be set to 8 to give different current blocks the same offset parameter sW. [Table 15]

[0066] As shown in Table 8 above, in the prior art, the offset parameter sW corresponding to different current blocks may also be different. Specifically, the value of sW differs from the value of sW for all other MIP mode numbers only when MipSizeId is equal to 1, i.e., when the current block is a second-type luminance block with a size of 4×8, 8×4, or 8×8, and the MIP mode number is 3, 8, 12, or 17. Therefore, when the encoder codes the current block, it must query and call the offset parameter sW according to the size and MIP mode number of the current block, thereby increasing the overall time and reducing the efficiency of the codec, while also increasing the memory space required because it needs to store a grammar description table of sW. Compared to prior art, this invention allows the offset parameter sW to be set before performing the coding process according to the MIP mode, and the offset parameter sW corresponding to all luminance blocks of different sizes and different MIP mode numbers is set to the same value. When coding the current block, there is no need to query and call the offset parameter sW according to the size and MIP mode number of the current block, and the encoder does not need to store a grammar description table of sW. Furthermore, it reduces the memory space and overall time required for the codec process, and effectively improves the efficiency of the codec.

[0067] In the embodiment of the present invention, when the encoder sets the offset parameter sW, it sets all offset parameters sW corresponding to different sizes and different MIP mode numbers to the same value. However, it should be noted that only when MipSizeId is equal to 1, i.e., when the current block is a second type luminance block with a size of 4×8, 8×4, or 8×8, and a MIP mode number of 3, 8, 12, or 17, the value of sW differs from the value of sW for all other MIP mode numbers. Therefore, when the encoder uniformly corrects sW for the initial right shift parameter corresponding to different sizes and different MIP mode numbers according to the offset parameter, it sets the offset parameter sW corresponding to a size of 4×8, 8×4, or 8×8, and a MIP mode number of 3, 8, 12, or 17.

[0068] As can be seen therefrom, in the embodiment of the present invention, the encoder performs a correction to unify the initial right shift parameter corresponding to different sizes and different MIP mode numbers according to the offset parameter, which means that if the initial right shift parameter is different from the offset parameter, the initial right shift parameter is corrected to the offset parameter so that the number of right shift bits of all predicted values ​​corresponding to all sizes and all MIP mode numbers are all the same.

[0069] In step 102, if the coding process is performed according to the MIP mode, the coding process is performed according to the offset parameter.

[0070] In the embodiment of the present invention, the encoder can perform a correction to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, and then, when the encoder performs the coding process according to the MIP mode, it can perform the coding process based on the set offset parameter.

[0071] In the embodiment of the present invention, it should be noted that when the encoder performs coding according to the MIP mode after setting the offset parameter, it can directly perform coding on the current block according to the offset parameter. This reduces the memory space and overall time required for the codec process, while guaranteeing codec performance, and effectively improves the efficiency of the codec.

[0072] In the embodiments of the present invention, Figure 8 is an exemplary implementation flowchart 2 of the image coding method proposed by the embodiments of the present invention, and as shown in Figure 8, the encoder performs a correction to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, i.e., after step 101, the method by which the encoder performs image coding further includes the following steps.

[0073] In step 103, the initial weight matrix and initial bias matrix are corrected according to the preset calculation rules to obtain the corrected weight matrix and corrected bias matrix, where the initial weight matrix and initial bias matrix correspond to the initial right-shift parameters on which the unification correction was performed.

[0074] In the embodiment of the present invention, the encoder can perform a correction to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, and then correct the initial weight matrix and initial bias matrix according to a preset calculation rule, thereby obtaining the corrected weight matrix and corrected bias matrix.

[0075] In implementing this invention, it should be noted that the initial weight matrix and initial bias matrix correspond to the initial right-shift parameters after applying a unifying correction.

[0076] In the embodiments of this application, it should be noted that the preset calculation rules may be used to update the corresponding initial weight matrix and initial bias matrix when the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17.

[0077] Furthermore, in the embodiment of the present invention, after the encoder sets the offset parameter, that is, after correcting the offset parameter corresponding to the size being 4×8, 8×4, or 8×8 and the MIP mode number being 3, 8, 12, or 17, an update process can be performed on the corresponding initial weight matrix and initial bias matrix to prevent a decrease in codec performance, thereby obtaining the corrected weight matrix and corrected bias matrix.

[0078] In embodiments of the present invention, when the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17, it should be noted that the encoder can update the corresponding initial weight matrix and initial bias matrix in several different ways when obtaining the corrected weight matrix and corrected bias matrix according to preset calculation rules. For example, when the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17, the encoder can obtain the corrected weight matrix and corrected bias matrix by updating any element value A in the initial weight matrix to A / 2 and simultaneously updating any element value B in the initial bias matrix to B / 2 according to a truncation calculation rule, where A and B are both integers. Furthermore, the encoder can also obtain the corrected weight matrix and corrected bias matrix by updating any element value A in the initial weight matrix to A / 2 and simultaneously updating any element value B in the initial bias matrix to B / 2 according to a rounding-up calculation rule. Furthermore, the encoder can also update any element value A in the initial weight matrix to A / 2 according to rounding calculation rules, while simultaneously updating any element value B in the initial bias matrix to B / 2, thereby obtaining the corrected weight matrix and the corrected bias matrix.

[0079] In step 104, the coding process is performed according to the offset parameter, the corrected weight matrix, and the corrected bias matrix.

[0080] In the embodiment of the present invention, when the encoder performs coding according to the MIP mode, it can perform coding based on the set offset parameter, the corrected weight matrix, and the corrected bias matrix.

[0081] In the embodiment of the present invention, it should be noted that, after setting the offset parameter, the encoder further updates the corresponding initial weight matrix and initial bias matrix to obtain a corrected weight matrix and a corrected bias matrix in order to prevent a decrease in codec performance, and when performing the coding process according to the MIP mode, it can perform the coding process for the current block according to the offset parameter and the corrected weight matrix and corrected bias matrix. This reduces the memory space and overall time required for the codec process, while guaranteeing codec performance, and effectively improves the efficiency of the codec.

[0082] It should be noted that in the embodiments of the present invention, after the encoder sets the offset parameter, it can immediately perform the coding process on the current block according to the offset parameter, the initial weight matrix, and the initial bias matrix. That is, after the encoder has finished setting the offset parameter, it may not update the corresponding initial weight matrix and initial bias matrix.

[0083] In the prior art, when predicting the luminance value for the current block via MIP mode, it is necessary to have an inconsistent number of bits for the right shift, i.e., the offset parameter sW must be different. The image coding method proposed in this application sets the offset parameter to be uniform, making the implementation of MIP mode simpler and more uniform. Furthermore, because the offset parameter sW in the prior art is different, it is necessary to store an sW table representing the number of bits for the right shift. In the calculation process, the sW corresponding to the current block is queried and retrieved to determine the number of bits that the predicted value calculated by MIP needs to be right shifted. However, since the image coding method proposed in this application sets the offset parameter to be uniform, it is not necessary to store an sW table representing the number of bits for the right shift, thereby saving memory space and eliminating the processing steps of queriing and retrieving sW.

[0084] Furthermore, in the embodiment of the present invention, after the encoder sets the offset parameter, the corresponding initial weight matrix and initial bias matrix are further updated to ensure that there is no apparent loss of codec performance. Specifically, according to the general test criteria for VVC, the BD-rates in Y, U, and V are 0.00%, -0.02%, and -0.02%, respectively, where the results for a 24-frame interval are expected to be the same as the codec performance for an 8-frame interval.

[0085] In the image coding method proposed in the embodiment of the present invention, the encoder performs a correction according to an offset parameter to unify the initial right shift parameter corresponding to different sizes and different MIP mode numbers before performing the coding process according to the MIP mode, where the offset parameter is used to indicate the number of bits to right shift the predicted value, and when performing the coding process according to the MIP mode, the coding process is performed according to the offset parameter. As can be seen from this, the image codec method proposed by the present invention can reduce the complexity of the MIP algorithm and guarantee codec performance by reducing the memory space and overall time required for the codec process, thereby reducing the memory space and overall time required for the codec process, and effectively improving the efficiency of the codec, by performing a correction using the offset parameter to unify the number of bits to right shift the predicted value, so that all luminance blocks of different sizes and different MIP mode numbers have the same sW value, without the need to query and call the sW value when performing the codec process.

[0086] Based on the above embodiments, in another embodiment of the present application, where the size is 4×8, 8×4 or 8×8 and the MIP mode number is 3, 8, 12 or 17, a method by which the encoder obtains a corrected weight matrix and a corrected bias matrix according to a preset calculation rule may include the following steps:

[0087] In step 103a, all element values ​​in the initial weight matrix are corrected to the same binary degree values ​​as the other weight matrix element values ​​according to the truncation calculation rule, and the corrected weight matrix is ​​obtained.

[0088] In step 103b, all elements in the initial bias matrix are corrected to the same binary-order value as the other bias matrix element values ​​according to the truncation calculation rule to obtain the corrected bias matrix.

[0089] In the embodiments of the present invention, when the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17, the encoder can correct all element values ​​in the initial weight matrix to the same binary order as the other weight matrix element values, while simultaneously correcting all elements in the initial bias matrix to the same binary order as the other bias matrix element values, thereby obtaining the corrected weight matrix and the corrected bias matrix.

[0090] Based on Table 9 above, Table 16 is the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. As shown in Table 16, the encoder updates each element value A in Table 9 to A / 2 according to the truncation calculation rule to obtain the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. [Table 16]

[0091] Based on Table 10 above, Table 17 is the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. As shown in Table 17, the encoder corrects each element value B in Table 10 to B / 2 according to the truncation calculation rule to obtain the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. [Table 17]

[0092] Based on Table 11 above, Table 18 is the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. As shown in Table 18, the encoder updates each element value A in Table 11 to A / 2 according to the truncation calculation rule to obtain the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. [Table 18]

[0093] Based on Table 12 above, Table 19 is the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. As shown in Table 22, the encoder corrects each element value B in Table 12 to B / 2 according to the truncation calculation rule to obtain the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. [Table 19]

[0094] In embodiments of the present invention, if the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17, the method by which the encoder obtains a corrected weight matrix and a corrected bias matrix according to a preset calculation rule may include the following steps:

[0095] In step 103c, all element values ​​in the initial weight matrix are corrected to the same binary degree values ​​as the other weight matrix element values ​​according to the rounding up calculation rule, and the corrected weight matrix is ​​obtained.

[0096] In step 103d, all elements in the initial bias matrix are corrected to the same binary-order value as the other bias matrix element values ​​according to the rounding up calculation rule to obtain the corrected bias matrix.

[0097] In embodiments of the present invention, when the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17, the encoder can correct all element values ​​in the initial weight matrix to the same binary order as the other weight matrix element values, according to a rounding up calculation rule, and at the same time correct all elements in the initial bias matrix to the same binary order as the other bias matrix element values, thereby obtaining a corrected weight matrix and a corrected bias matrix.

[0098] Based on Table 9 above, Table 20 is the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. As shown in Table 20, the encoder updates each element value A in Table 9 to A / 2 according to the rounding up calculation rule to obtain the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. [Table 20]

[0099] Based on Table 10 above, Table 21 is the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. As shown in Table 21, the encoder corrects each element value B in Table 10 to B / 2 according to the rounding up calculation rule to obtain the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. [Table 21]

[0100] Based on Table 11 above, Table 22 is the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. As shown in Table 22, the encoder updates each element value A in Table 11 to A / 2 according to the rounding up calculation rule to obtain the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. [Table 22]

[0101] Based on Table 12 above, Table 23 is the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. As shown in Table 23, the encoder corrects each element value B in Table 12 to B / 2 according to the rounding up calculation rule to obtain the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. [Table 23]

[0102] In embodiments of the present invention, if the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17, the method by which the encoder obtains a corrected weight matrix and a corrected bias matrix according to a preset calculation rule may include the following steps:

[0103] In step 103e, all element values ​​in the initial weight matrix are corrected to the same binary degree values ​​as the other weight matrix element values ​​according to the rounding calculation rules, and the corrected weight matrix is ​​obtained.

[0104] In step 103f, all elements in the initial bias matrix are corrected to the same binary-order value as the other bias matrix element values ​​according to the rounding calculation rules, and the corrected bias matrix is ​​obtained.

[0105] In the embodiments of the present invention, when the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17, the encoder can correct all element values ​​in the initial weight matrix to the same binary order as the other weight matrix element values ​​according to rounding calculation rules, and at the same time correct all elements in the initial bias matrix to the same binary order as the other bias matrix element values, thereby obtaining the corrected weight matrix and the corrected bias matrix.

[0106] Based on Table 9 above, Table 24 is the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. As shown in Table 24, the encoder updates each element value A in Table 9 to A / 2 according to the rounding calculation rules to obtain the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. [Table 24]

[0107] Based on Table 10 above, Table 25 is the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. As shown in Table 25, the encoder corrects each element value B in Table 10 to B / 2 according to the rounding calculation rules to obtain the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 3 and 12. [Table 25]

[0108] Based on Table 11 above, Table 26 is the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. As shown in Table 26, the encoder updates each element value A in Table 11 to A / 2 according to the rounding calculation rules to obtain the corrected weight matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. [Table 26]

[0109] Based on Table 12 above, Table 27 is the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. As shown in Table 30, the encoder corrects each element value B in Table 12 to B / 2 according to the rounding calculation rules to obtain the corrected bias matrix when MipSizeId is 1 and MIP mode numbers are 8 and 17. [Table 27]

[0110] In the image coding method proposed in the embodiment of the present invention, the encoder performs a correction according to an offset parameter to unify the initial right shift parameter corresponding to different sizes and different MIP mode numbers before performing the coding process according to the MIP mode, where the offset parameter is used to indicate the number of bits to right shift the predicted value, and when performing the coding process according to the MIP mode, the coding process is performed according to the offset parameter. As can be seen from this, the image codec method proposed by the present invention can reduce the complexity of the MIP algorithm and guarantee codec performance by reducing the memory space and overall time required for the codec process, thereby reducing the memory space and overall time required for the codec process, and effectively improving the efficiency of the codec, by performing a correction using the offset parameter to unify the number of bits to right shift the predicted value, so that all luminance blocks of different sizes and different MIP mode numbers have the same sW value, without the need to query and call the sW value when performing the codec process.

[0111] In another embodiment of the present application, Figure 9 is an exemplary implementation flowchart 1 of the image decoding method proposed by the embodiment of the present application, and as shown in Figure 9, the method by which the decoder performs image decoding in the embodiment of the present application may include the following steps:

[0112] In step 201, before performing the decoding process according to the MIP mode, a correction is performed to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, where the offset parameter is used to indicate the number of bits to right shift in the predicted value.

[0113] In the embodiments of the present invention, before performing the decoding process according to the MIP mode, the decoder may first set an offset parameter used to indicate the number of offset bits.

[0114] In the embodiment of the present invention, based on equation (2) above, the offset parameter is sW in equation (2), which means that the offset parameter is the amount of right shift of the overall predicted value, and that when performing brightness prediction for the current block, the offset parameter is used to indicate the number of bits to right shift of the overall predicted value for the current block.

[0115] Furthermore, in the embodiments of the present invention, the decoder may set the offset parameter to a single fixed positive integer before performing the decoding process according to the MIP mode. That is, after setting the offset parameter, the decoder has determined the offset parameter to be used for any current block, regardless of the size of the current block or the MIP mode number corresponding to the current block.

[0116] It should be noted that in the embodiments of the present invention, when the decoder performs a correction to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, the offset parameter can be set to any positive integer. Specifically, the decoder may preferably set the offset parameter sW to 6, or may preferably set the offset parameter sW to 7, or may preferably set the offset parameter sW to 8, or may preferably set the offset parameter sW to 9.

[0117] In prior art, the offset parameter sW corresponding to different current blocks may be different, specifically, the value of sW differs from the value of sW for all other MIP mode numbers only when MipSizeId is equal to 1, i.e., when the current block is a second-type luminance block with a size of 4×8, 8×4, or 8×8, and the MIP mode number is 3, 8, 12, or 17. Therefore, when the decoder decodes the current block, it must query and call the offset parameter sW according to the size and MIP mode number of the current block, thereby increasing the overall time and reducing the efficiency of the codec, while also increasing the memory space required because a grammar description table of sW must be stored. Compared to prior art, the present invention allows the offset parameter sW to be set before performing the decoding process according to the MIP mode, and the offset parameter sW corresponding to all luminance blocks of different sizes and different MIP mode numbers to be set to the same value. When decoding the current block, there is no need to query and call the offset parameter sW according to the size and MIP mode number of the current block, and the decoder does not need to store a grammar description table of sW. Furthermore, it reduces the memory space and overall time required for the codec process, and effectively improves the efficiency of the codec.

[0118] In the embodiment of the present invention, when the decoder sets the offset parameter sW, it sets all offset parameters sW corresponding to different sizes and different MIP mode numbers to the same value, except when MipSizeId is equal to 1, that is, when the current block is a second type luminance block with a size of 4×8, 8×4, or 8×8, and a MIP mode number of 3, 8, 12, or 17, the value of sW differs from the value of sW for all other MIP mode numbers. Therefore, it should be noted that when the decoder uniformly corrects sW for the initial right shift parameter corresponding to different sizes and different MIP mode numbers according to the offset parameter, it sets the offset parameter sW corresponding to a size of 4×8, 8×4, or 8×8, and a MIP mode number of 3, 8, 12, or 17.

[0119] As can be seen from the above, in the embodiment of the present invention, the decoder performs a correction to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, which means that if the initial right shift parameter is different from the offset parameter, the initial right shift parameter is corrected to the offset parameter so that the number of right shift bits of all predicted values ​​corresponding to all sizes and all MIP mode numbers are all the same.

[0120] In step 202, if the decoding process is performed according to the MIP mode, the decoding process is performed according to the offset parameter.

[0121] In the embodiment of the present invention, the decoder can perform a correction to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, and then, when the decoder performs the decoding process according to the MIP mode, it can perform the decoding process based on the set offset parameter.

[0122] In the embodiment of the present invention, it should be noted that when the decoder performs the decoding process according to the MIP mode after setting the offset parameter, it can directly perform the decoding process on the current block according to the offset parameter. This reduces the memory space and overall time required for the codec process, while guaranteeing codec performance, and effectively improves the efficiency of the codec.

[0123] In the embodiments of the present invention, Figure 10 is an exemplary implementation flowchart 2 of the image decoding method proposed by the embodiments of the present invention, and as shown in Figure 10, the decoder performs a correction to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, i.e., after step 201, the method by which the decoder performs image decoding may further include the following steps.

[0124] In step 203, the initial weight matrix and initial bias matrix are corrected according to the preset calculation rules to obtain the corrected weight matrix and corrected bias matrix, where the initial weight matrix and initial bias matrix correspond to the initial right-shift parameters on which the unification correction was performed.

[0125] In the embodiment of the present invention, the decoder can perform a correction to unify the initial right-shift parameters corresponding to different sizes and different MIP mode numbers according to the offset parameter, and then correct the initial weight matrix and initial bias matrix according to a preset calculation rule, thereby obtaining the corrected weight matrix and corrected bias matrix.

[0126] In implementing this invention, it should be noted that the initial weight matrix and initial bias matrix correspond to the initial right-shift parameters after applying a unifying correction.

[0127] In the embodiments of this application, it should be noted that the preset calculation rules may be used to update the corresponding initial weight matrix and initial bias matrix when the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17.

[0128] Furthermore, in the embodiments of the present invention, after the decoder has set the offset parameters, that is, after correcting the offset parameters corresponding to the size being 4×8, 8×4, or 8×8 and the MIP mode number being 3, 8, 12, or 17, an update process can be performed on the corresponding initial weight matrix and initial bias matrix to prevent a decrease in codec performance, thereby obtaining the corrected weight matrix and corrected bias matrix.

[0129] In embodiments of the present invention, when the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17, it should be noted that the decoder can update the corresponding initial weight matrix and initial bias matrix in several different ways when obtaining the corrected weight matrix and corrected bias matrix according to preset calculation rules. For example, when the size is 4×8, 8×4, or 8×8 and the MIP mode number is 3, 8, 12, or 17, the decoder can obtain the corrected weight matrix and corrected bias matrix by updating any element value A in the initial weight matrix to A / 2 and simultaneously updating any element value B in the initial bias matrix to B / 2 according to a truncation calculation rule, where both A and B are integers. Furthermore, the decoder can also obtain the corrected weight matrix and corrected bias matrix by updating any element value A in the initial weight matrix to A / 2 and simultaneously updating any element value B in the initial bias matrix to B / 2 according to a rounding-up calculation rule. Furthermore, the decoder can also update any element value A in the initial weight matrix to A / 2 according to rounding calculation rules, while simultaneously updating any element value B in the initial bias matrix to B / 2, to obtain the corrected weight matrix and the corrected bias matrix.

[0130] In step 204, the decoding process is performed according to the offset parameter, the corrected weight matrix, and the corrected bias matrix.

[0131] In the embodiment of the present invention, when the decoder performs the decoding process according to the MIP mode, the decoding process can be performed based on the set offset parameter, the corrected weight matrix, and the corrected bias matrix.

[0132] In the embodiment of the present invention, it should be noted that, after setting the offset parameter, the decoder further updates the corresponding initial weight matrix and initial bias matrix to obtain the corrected weight matrix and corrected bias matrix in order to prevent a degradation of codec performance, and when performing the decoding process according to the MIP mode, it can perform the decoding process on the current block according to the offset parameter and the corrected weight matrix and corrected bias matrix. This makes it possible to reduce the memory space and overall time required for the codec process and effectively improve the efficiency of the codec while guaranteeing codec performance.

[0133] In the embodiments of this invention, it should be noted that after the decoder sets the offset parameter, it may also directly perform the decoding process on the current block according to the offset parameter, the initial weight matrix, and the initial bias matrix. That is, after the decoder has finished setting the offset parameter, it may not update the corresponding initial weight matrix and initial bias matrix.

[0134] In the prior art, when predicting the luminance value for the current block via MIP mode, it is necessary to have an inconsistent number of bits for the right shift, i.e., the offset parameter sW must be different. The image decoding method proposed in this application sets the offset parameter to be uniform, making the implementation of MIP mode simpler and more uniform. Furthermore, because the offset parameter sW in the prior art is different, it is necessary to store an sW table representing the number of bits for the right shift. In the calculation process, the sW corresponding to the current block is queried and retrieved to determine the number of bits that the predicted value calculated by MIP needs to be right shifted. However, since the image decoding method proposed in this application sets the offset parameter to be uniform, it is not necessary to store an sW table representing the number of bits for the right shift, thereby saving memory space and eliminating the processing steps of queriing and retrieving sW.

[0135] In the image decoding method proposed in the embodiment of the present invention, the decoder performs a correction according to an offset parameter to unify the initial right shift parameter corresponding to different sizes and different MIP mode numbers before performing the decoding process according to the MIP mode, where the offset parameter is used to indicate the number of bits to right shift the predicted value, and when performing the decoding process according to the MIP mode, the decoding process is performed according to the offset parameter. As can be seen from this, the image codec method proposed by the present invention can reduce the complexity of the MIP algorithm and guarantee codec performance by reducing the memory space and overall time required for the codec process, thereby reducing the memory space and overall time required for the codec process, and effectively improving the efficiency of the codec, by performing a correction using the offset parameter to unify the number of bits to right shift the predicted value, so that all luminance blocks of different sizes and different MIP mode numbers have the same sW value, without the need to query and call the sW value when performing the codec process.

[0136] According to the above embodiment, in yet another embodiment of the present application, Figure 11 is an exemplary structural diagram 1 of the encoder configuration proposed by the embodiment of the present application, and as shown in Figure 11, the encoder 300 proposed by the embodiment of the present application may comprise a first correction portion 301 and a coding portion 302.

[0137] The first correction unit 301 is configured to perform a correction that unifies the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to an offset parameter, before performing the coding process according to the MIP mode, wherein the offset parameter is used to indicate the number of bits to right shift in the predicted value.

[0138] The coding section 302 is configured to perform the coding process according to the offset parameter when the coding process is performed according to the MIP mode.

[0139] Specifically, the first correction unit 301 is configured to correct the initial right shift parameter to the offset parameter if the initial right shift parameter differs from the offset parameter, so that the number of right shift bits for all predicted values ​​corresponding to all sizes and all MIP mode numbers are all the same.

[0140] Figure 12 is an exemplary structural diagram 2 of the encoder configuration proposed by the embodiment of the present invention, and as shown in Figure 12, the encoder 300 proposed by the embodiment of the present invention further comprises a first processor 303, a first memory 304 for storing executable instructions of the first processor 303, a first communication interface 305, and a first bus 306 used to connect the first processor 303, the first memory 304, and the first communication interface 305.

[0141] Furthermore, in embodiments of the present invention, the first processor 303 is used to perform a correction according to an offset parameter to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers before performing the coding process according to the MIP mode, wherein the offset parameter is used to indicate the number of bits to right shift the predicted value, and when performing the coding process according to the MIP mode, the coding process is performed according to the offset parameter.

[0142] Furthermore, each functional module in this embodiment may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The integrated unit may be implemented using hardware, or it may be implemented using software functional modules.

[0143] If the integrated unit is implemented in the form of a software function module and is not sold or used as an independent product, it can be stored on a single computer-readable storage medium. Based on this understanding, the technical solution of this embodiment, in essence or in part, contributes to the prior art, or all or part of the technical solution can be implemented in the form of a software product, which is stored on a single storage medium and includes several instructions for causing a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the method in this embodiment. The aforementioned storage mediums include various media capable of storing program code, such as U disks, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0144] Embodiments of the present invention provide an encoder which, before performing coding processing according to the MIP mode, performs a correction according to an offset parameter to unify the initial right shift parameter corresponding to different sizes and different MIP mode numbers, where the offset parameter is used to indicate the number of bits to right shift the predicted value, and when performing coding processing according to the MIP mode, performs coding processing according to the offset parameter. As can be seen therefrom, the image codec method proposed by the present invention can reduce the complexity of the MIP algorithm and guarantee codec performance by reducing the memory space and overall time required for the codec process, thereby reducing the memory space and overall time required for the codec process, and effectively improving codec efficiency, by performing a correction using an offset parameter to unify the number of bits to right shift the predicted value, so that all luminance blocks of different sizes and different MIP mode numbers have the same sW value, without the need to query and call the sW value when performing codec processing.

[0145] Figure 13 is an exemplary structural diagram of the decoder configuration proposed by the embodiment of the present invention, and as shown in Figure 13, the decoder 400 proposed by the embodiment of the present invention may comprise a first correction portion 401 and a decoding portion 402.

[0146] The second correction unit 401 is configured to perform a correction that unifies the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to an offset parameter, before performing the decoding process according to the MIP mode, wherein the offset parameter is used to indicate the number of bits to right shift in the predicted value.

[0147] The decoding unit 402 is configured to perform the decoding process according to the offset parameter when the decoding process is performed according to the MIP mode.

[0148] Specifically, the second correction section 401 is configured to correct the initial right shift parameter to the offset parameter if the initial right shift parameter differs from the offset parameter, so that the number of right shift bits for all predicted values ​​corresponding to all sizes and all MIP mode numbers are all the same.

[0149] Figure 14 is an exemplary structural diagram 2 of the decoder configuration proposed by the embodiment of the present invention, and as shown in Figure 14, the decoder 400 proposed by the embodiment of the present invention may further include a second processor 403, a second memory 404 for storing executable instructions of the second processor 403, a second communication interface 405, and a second bus 406 used to connect the second processor 403, the second memory 404, and the first communication interface 405.

[0150] Furthermore, in embodiments of the present invention, the second processor 403 is used to perform a correction according to an offset parameter to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers before performing the decoding process according to the MIP mode, wherein the offset parameter is used to indicate the number of bits to right shift of the predicted value, and is used to perform the decoding process according to the offset parameter when performing the decoding process according to the MIP mode.

[0151] Furthermore, each functional module in this embodiment may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The integrated unit may be implemented using hardware, or it may be implemented using software functional modules.

[0152] If the integrated unit is implemented in the form of a software function module and is not sold or used as an independent product, it can be stored on a single computer-readable storage medium. Based on this understanding, the technical solution of this embodiment, in essence or in part, contributes to the prior art, or all or part of the technical solution can be implemented in the form of a software product, which is stored on a single storage medium and includes several instructions for a single computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the method in this embodiment. The aforementioned storage mediums include various media capable of storing program code, such as U disks, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0153] An embodiment of the present invention provides an encoder, the decoder, which, before performing a decoding process according to the MIP mode, performs a correction according to an offset parameter to unify the initial right shift parameter corresponding to different sizes and different MIP mode numbers, and when performing a decoding process according to the MIP mode, performs the decoding process according to the offset parameter. As can be seen from this, the image codec method proposed by the present invention can reduce the complexity of the MIP algorithm and guarantee codec performance by reducing the memory space and overall time required for the codec process, thereby reducing the memory space and overall time required for the codec process, and effectively improving the efficiency of the codec, by performing a correction using an offset parameter to unify the number of right shift bits of the predicted value, so that all luminance blocks of different sizes and different MIP mode numbers have the same sW value, without the need to query and call the sW value when performing the codec process.

[0154] Embodiments of the present invention provide a computer-readable storage medium in which a program is stored, and the program, when executed by a processor, implements the method described in the above embodiment.

[0155] Specifically, the program instructions corresponding to the image coding method in this embodiment may be stored in a storage medium such as an optical disc, hard disk, or U disk, and when a program instruction corresponding to one image coding method in the storage medium is read or executed by an electronic device, Before performing the coding process according to the MIP mode, a correction is performed to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to an offset parameter, wherein the offset parameter is used to indicate the number of bits to right shift in the predicted value, and When performing the coding process according to the MIP mode, the step includes performing the coding process according to the offset parameter.

[0156] Specifically, the program instructions corresponding to the image decoding method in this embodiment may be stored in a storage medium such as an optical disc, hard disk, or U disk, and when a program instruction corresponding to one image decoding method in the storage medium is read or executed by an electronic device, Before performing the decoding process according to the MIP mode, a correction is performed to unify the initial right shift parameters corresponding to different sizes and different MIP mode numbers according to an offset parameter, wherein the offset parameter is used to indicate the number of bits to right shift in the predicted value, and When performing the decoding process according to the MIP mode, the process includes the step of performing the decoding process according to the offset parameter.

[0157] Those skilled in the art will understand that embodiments of this application may be provided as methods, systems, or computer program products. Accordingly, this application may take the form of hardware embodiments, software embodiments, or embodiments of a combination of software and hardware. Furthermore, this application may take the form of a computer program product implemented on one or more computer-available storage media (including, but not limited to, disk memory and optical memory) containing computer-available program code.

[0158] This application will be described with reference to exemplary implementation flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products relating to embodiments of this application. It should be understood that computer program instructions can implement each process and / or block in the exemplary implementation flowcharts and / or block diagrams, and combinations of processes and / or blocks in the exemplary implementation flowcharts and / or block diagrams. These computer program instructions are provided to a processor of a general-purpose computer, a dedicated computer, an embedded processor, or other programmable data processing device to generate a machine that, when executed by the processor of the computer or other programmable data processing device, generates an apparatus for performing the functions specified in one or more processes in the exemplary implementation flowchart and / or one or more blocks in the block diagram.

[0159] These computer program instructions are stored in computer-readable memory and can guide a computer or other programmable data processing device to operate in a particular manner, and the instructions stored in said computer-readable memory can also cause a product comprising an instruction unit, which embodies one or more processes in an exemplary implementation flowchart and / or one or more blocks in a block diagram.

[0160] These computer program instructions can also be loaded into a computer or other programmable data processing device, causing the computer or other programmable device to execute a series of operational steps to generate the processing to be implemented by the computer, thereby providing steps for implementing one or more processes in an exemplary implementation flowchart and / or one or more blocks in a block diagram.

[0161] The above is merely a preferred embodiment of the present application and is not intended to limit the scope of protection of the present application. [Industrial applicability]

[0162] Embodiments of the present invention provide an image codec method, an encoder, a decoder, and a storage medium. The encoder performs a correction according to an offset parameter to unify initial right-shift parameters corresponding to different sizes and different MIP mode numbers before performing a coding process according to the MIP mode, where the offset parameter is used to indicate the number of bits to right-shift the predicted value, and performs the coding process according to the offset parameter when performing a coding process according to the MIP mode. The decoder performs a correction according to an offset parameter to unify initial right-shift parameters corresponding to different sizes and different MIP mode numbers before performing a decoding process according to the MIP mode, and performs the decoding process according to the offset parameter when performing a decoding process according to the MIP mode. As can be seen from the above, the image codec method proposed by this application can reduce the complexity of the MIP algorithm and ensure codec performance by reducing the memory space and overall time required for the codec process, thereby reducing the memory space and overall time required for the codec process, and effectively improving codec efficiency, by performing a correction that unifies the number of right-shifted bits of the predicted value using an offset parameter, thereby giving all luminance blocks of different sizes and different MIP mode numbers the same sW value, without the need to query and retrieve the sW value when performing codec processing.

Claims

1. An image coding method applied to an encoder, Determining the mode parameters of the current block, In response to the determination that the mode parameter indicates that the predicted value of the current block is determined by a matrix-based intra-prediction (MIP) mode, the prediction of the current block by MIP is based on an offset parameter, wherein the offset parameter is equal to 6. Image coding methods.

2. The offset parameter indicates the number of bits to right-shift for calculating the predicted value. The image coding method according to claim 1.

3. The number of bits used for the right shift to calculate the block size corresponding to all MipSizeIds and all predicted values ​​corresponding to all MIP mode numbers is the same. The image coding method according to claim 2.

4. Predicting the current block by MIP based on the offset parameter is This includes predicting the current block based on the block size corresponding to all MipSizeIds and the same offset parameter for all MIP mode numbers, The image coding method according to claim 1.

5. Predicting the current block by MIP based on the offset parameter is This includes predicting the current block based on the offset parameter, initial weight matrix, and initial bias matrix. The image coding method according to claim 1.

6. An image decoding method applied to a decoder, Determining the mode parameters of the current block, In response to the determination that the mode parameter indicates that the predicted value of the current block is determined by a matrix-based intra-prediction (MIP) mode, the prediction of the current block by MIP is based on an offset parameter, wherein the offset parameter is equal to 6. Image decoding methods.

7. The offset parameter indicates the number of bits to right-shift for calculating the predicted value. The image decoding method according to claim 6.

8. The number of bits used for the right shift to calculate the block size corresponding to all MipSizeIds and all predicted values ​​corresponding to all MIP mode numbers is the same. The image decoding method according to claim 7.

9. Predicting the current block by MIP based on the offset parameter is This includes predicting the current block based on the block size corresponding to all MipSizeIds and the same offset parameter for all MIP mode numbers, The image decoding method according to claim 6.

10. Predicting the current block by MIP based on the offset parameter is This includes predicting the current block based on the offset parameter, initial weight matrix, and initial bias matrix. The image decoding method according to claim 6.

11. A decoder comprising a processor, a memory for storing instructions of the processor, a communication interface, and a bus used to connect the processor, the memory, and the communication interface, wherein when the processor executes the instructions, Determining the mode parameters of the current block, In response to the determination that the mode parameter indicates that the predicted value of the current block is determined by a matrix-based intra-prediction (MIP) mode, the system is configured to predict the current block by MIP based on an offset parameter, wherein the offset parameter is equal to 6. decoder.

12. The offset parameter indicates the number of bits to right-shift for calculating the predicted value. The decoder according to claim 11.

13. The number of bits used for the right shift to calculate the block size corresponding to all MipSizeIds and all predicted values ​​corresponding to all MIP mode numbers is the same. The decoder according to claim 12.

14. The processor is configured to predict the current block based on the block size corresponding to all MipSizeIds and the same offset parameter for all MIP mode numbers. The decoder according to claim 11.

15. The processor is configured to predict the current block based on the offset parameter, initial weight matrix, and initial bias matrix. The decoder according to claim 11.

16. A computer-readable storage medium, A computer-readable storage medium that stores a computer program and a bitstream, wherein the computer program causes a processor to execute the image coding method described in any one of claims 1 to 5 to generate the bitstream.

17. A computer-readable storage medium, A computer-readable storage medium that stores a computer program and a bitstream, wherein the computer program causes a processor to execute the image decoding method described in any one of claims 6 to 10 to decode the bitstream.

Images