Gate drive device and power converter for power semiconductor elements

Abstract

This gate driving device comprises: gate driving voltage output units that are provided in correspondence to each of a plurality of power semiconductor elements connected in series, and that output gate driving voltages; gate lines provided in correspondence to each of the gate driving voltage output units and are connected to control terminals of the power semiconductor elements corresponding to the gate driving voltage output units; a magnetic coupling unit that magnetically couples the gate lines to each other; a first wiring path through which a current flows from the gate driving voltage output units toward the gate lines corresponding to the gate driving voltage output units; a second wiring path through which a current flows from the gate lines connected to the first wiring path toward the gate driving voltage output units corresponding to the gate lines; and a third wiring path that attenuates an excitation current generated by the magnetic coupling unit.

Description

[Technical Field]

[0001] This disclosure relates to a gate drive device and a power conversion device for power semiconductor devices. [Background technology]

[0002] Various gate drive devices have been proposed to turn on and off each of the semiconductor switching elements, which are power semiconductor elements connected in series.

[0003] For example, a control device for series-connected voltage-driven semiconductor elements is known, comprising a semiconductor switch circuit consisting of a plurality of voltage-driven semiconductor elements connected in series to form an arm, and a gate drive circuit that supplies a gate signal to the gate terminal of each of the plurality of voltage-driven semiconductor elements in each arm, characterized in that the gate lines connecting the gate drive circuit and the gate terminal of each voltage-driven semiconductor element in each arm are magnetically coupled to each other (see, for example, Patent Document 1).

[0004] For example, a control device for series-connected voltage-driven semiconductor elements is known, comprising a semiconductor switch circuit consisting of a plurality of voltage-driven semiconductor elements connected in series and a gate drive circuit that supplies gate signals to the gate terminals of the voltage-driven semiconductor elements in order to turn them on and off, wherein a winding and a reset winding are provided to magnetically couple the gate wires connecting the gate drive circuit and the gate terminals of the voltage-driven semiconductor elements, and the excitation energy stored based on this magnetic coupling is reset via the reset winding (see, for example, Patent Document 2). [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Patent No. 4396036 [Patent Document 2] Patent No. 4396059 [Overview of the project] [Problems that the invention aims to solve]

[0006] For example, in the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036), the gate lines of each voltage-driven semiconductor element are magnetically coupled, and if the current values ​​flowing through each gate line differ when the voltage-driven semiconductor element is turned on or off, the impedance of the gate line is instantaneously changed according to the difference, thereby matching each gate current and suppressing variations in switching timing. However, in the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036), when each of the series-connected power semiconductor elements is turned on or off, under certain conditions, oscillations of different phases appear in the gate-source voltage (gate voltage) of each power semiconductor element at a certain period. If the next switching operation is performed on the power semiconductor element before these oscillations have decayed, a difference occurs in the gate voltage at the start of switching, which increases the imbalance in voltage distribution (drain-source voltage imbalance) for each of the series-connected power semiconductor elements.

[0007] Therefore, in a gate drive device for multiple power semiconductor elements connected in series and a power converter equipped therewith, there is a need for a technology that suppresses oscillations in the current flowing to each gate terminal of the power semiconductor elements, even if there are variations in the transmission time of the gate signal and the characteristics of the power semiconductor elements, thereby suppressing the imbalance in voltage distribution during switching operation for each power semiconductor element. [Means for solving the problem]

[0008] According to one aspect of the present disclosure, a gate drive device for a plurality of power semiconductor elements connected in series comprises: a gate drive voltage output unit provided corresponding to each power semiconductor element and outputting a gate drive voltage; a gate line provided corresponding to each gate drive voltage output unit and connected to the control terminal of the power semiconductor element corresponding to the gate drive voltage output unit; a magnetic coupling unit that magnetically couples each of the gate lines to each other; a first wiring path which is the path of current flowing from the gate drive voltage output unit toward the gate line corresponding to the gate drive voltage output unit; a second wiring path which is the path of current flowing from the gate line connected to the first wiring path toward the gate drive voltage output unit corresponding to the gate line; and a third wiring path which attenuates the excitation current generated in the magnetic coupling unit.

[0009] Here, the first wiring path may include a first diode having an anode connected to a wiring connected to the positive terminal of the gate drive voltage output section and a cathode connected to a wiring connected to the magnetic coupling section, and the second wiring path may include a second diode having a cathode connected to a wiring connected to the negative terminal of the gate drive voltage output section and an anode connected to a wiring connected to the magnetic coupling section.

[0010] Furthermore, the third wiring path may include a first resistor connected in parallel with the first diode and a second resistor connected in parallel with the second diode.

[0011] Furthermore, the third wiring path includes a series circuit consisting of a third resistor and a first switch that opens and closes the wiring connected to the third resistor, and the series circuit may be connected in parallel with the magnetic coupling unit to one of the two gate wires that are magnetically coupled by the magnetic coupling unit.

[0012] Furthermore, the first switch may be configured to turn on during a first fixed period of time when current flows through the first wiring path and to turn off at all other times, and to turn on during a second fixed period of time when current flows through the second wiring path and to turn off at all other times.

[0013] Further, the first wiring path may include a positive-side switch that applies or cuts off the positive-side potential of the gate drive voltage output section to the control terminal of the power semiconductor device corresponding to the first wiring path, and a positive-side gate resistor connected in series to the positive-side switch. The second wiring path may include a negative-side switch that applies or cuts off a potential of 0 V or less, which is the negative-side potential of the gate drive voltage output section, to the control terminal of the power semiconductor device corresponding to the second wiring path, and a negative-side gate resistor connected in series to the negative-side switch.

[0014] Also, each of the gate drive voltage output sections may include a positive-side potential output section that outputs the positive-side potential of the gate drive voltage, and a negative-side potential output section that is connected in series to the positive-side potential output section and outputs the negative-side potential of the gate drive voltage. The third wiring path may include a second switch that opens and closes the wiring between the control terminal of the power semiconductor device and the connection point between the positive-side switch and the positive electrode side of the positive-side potential output section, and a third switch that opens and closes the wiring between the control terminal of the power semiconductor device and the connection point between the negative-side switch and the negative electrode side of the negative-side potential output section.

[0015] Further, the second switch may be turned on during the on-operation of the positive-side switch and then turned off before the start of the on-operation of the negative-side switch. The third switch may be turned on during the on-operation of the negative-side switch and then turned off before the start of the on-operation of the positive-side switch.

[0016] Also, the current outflow terminal of the power semiconductor device may be a source terminal, an emitter terminal, or a cathode terminal.

[0017] Furthermore, according to one aspect of the present disclosure, a gate drive device for a plurality of power semiconductor elements connected in series comprises: a gate drive voltage output unit provided corresponding to each power semiconductor element and outputting a gate drive voltage; a gate line provided corresponding to each gate drive voltage output unit and connected to the control terminal of the power semiconductor element corresponding to the gate drive voltage output unit; a magnetic coupling unit that magnetically couples each of the gate lines to each other; a fourth wiring path which is the path of current flowing from the gate drive voltage output unit toward the gate line corresponding to the gate drive voltage output unit; a fifth wiring path which is the path of current flowing from the control terminal of the power semiconductor element to which the gate line is connected toward the gate drive voltage output unit corresponding to the gate line; and a sixth wiring path which attenuates the excitation current generated in the magnetic coupling unit.

[0018] Here, the fourth wiring path may include a fourth diode having an anode connected to a wiring connected to the positive terminal of the gate drive voltage output section and a cathode connected to a wiring connected to the magnetic coupling section, and the sixth wiring path may include a fourth resistor connected in parallel with the fourth diode.

[0019] Furthermore, the control terminal of the power semiconductor element may be either the gate terminal or the base terminal.

[0020] Furthermore, according to one aspect of the present disclosure, the power conversion device comprises the gate drive device, a power conversion circuit section having an arm provided with a plurality of power semiconductor elements connected in series and performing a power conversion operation in accordance with the on / off operation of the power semiconductor elements, and a power conversion control section that controls the power conversion operation of the power conversion circuit section. [Effects of the Invention]

[0021] According to one aspect of this disclosure, in a gate drive device for a plurality of power semiconductor elements connected in series and a power converter equipped therewith, even if there are variations in the transmission time of the gate signal and the characteristics of the power semiconductor elements, it is possible to suppress oscillations in the current flowing to each control terminal of the power semiconductor elements and suppress imbalances in the voltage distribution during switching operation for each power semiconductor element. [Brief explanation of the drawing]

[0022] [Figure 1] This is a circuit diagram showing a gate drive device according to a first embodiment of the present disclosure. [Figure 2] This figure illustrates a magnetic coupling portion in a gate drive device according to the first to fourth embodiments of this disclosure. [Figure 3] This is a circuit diagram (part 1) illustrating the current flow when the power semiconductor element QA is turned on in a gate drive device according to the first embodiment of this disclosure. [Figure 4] This is a circuit diagram (part 2) illustrating the current flow when the power semiconductor element QA is turned on in the gate drive device according to the first embodiment of this disclosure. [Figure 5] This figure shows a power converter equipped with a gate drive device according to one embodiment of the present disclosure. [Figure 6] Figure 5 is a circuit diagram showing an arm located within the power converter. [Figure 7] This is a circuit diagram showing a gate drive device according to the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036). [Figure 8] This figure illustrates the waveform of the gate-source voltage of each power semiconductor element when transitioning from the off state to the on state, in the case of a transmission shift in the gate signal in the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036). [Figure 9] This figure illustrates the drain-source voltage of power semiconductor elements QA and QB, and the current flowing from the drain to the source, when an imbalance in voltage distribution occurs in the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036), and when the power semiconductor elements QA and QB transition from the ON state to the OFF state. [Figure 10]In the invention described in Patent Document 1 (Japanese Patent No. 4396036), when a voltage sharing imbalance occurs, this is a diagram illustrating the drain-source voltage of power semiconductor devices QA and QB and the drain current flowing from the drain to the source when the power semiconductor devices QA and QB transition from the off state to the on state. [Figure 11] This is an equivalent circuit diagram showing the current flow when transitioning from the off state to the on state in the invention described in Patent Document 1 (Japanese Patent No. 4396036) when there is a transmission delay in the gate signal. [Figure 12] This is an equivalent circuit diagram showing the current flow when the power semiconductor device transitions from the off state to the on state in the invention described in Patent Document 1 (Japanese Patent No. 4396036) when there is no transmission delay in the gate signal. [Figure 13] This is a diagram showing the simulation waveform of the gate-source voltage in the invention described in Patent Document 1 (Japanese Patent No. 4396036). [Figure 14] This is a diagram showing the simulation waveform of the gate-source voltage in the gate drive device according to the first embodiment of the present disclosure. [Figure 15] This is a circuit diagram showing the gate drive device according to the second embodiment of the present disclosure. [Figure 16] This is a circuit diagram showing the gate drive device according to the third embodiment of the present disclosure. [Figure 17] This is a diagram showing the simulation waveform of the gate-source voltage in the gate drive device according to the third embodiment of the present disclosure. [Figure 18] This is a diagram for explaining the operations of the first switch, the positive-side switch, and the negative-side switch in the gate drive device according to the third embodiment of the present disclosure. [Figure 19] This is a circuit diagram showing the gate drive device according to the fourth embodiment of the present disclosure. [Figure 20] This is a diagram for explaining the operations of each switch in the gate drive device according to the fourth embodiment of the present disclosure.

Embodiments for Carrying Out the Invention

[0023] The gate drive device and power converter for power semiconductor elements will be described below with reference to the drawings. In each drawing, similar or identical components are given the same reference numerals. Also, the scale of these drawings has been appropriately changed for ease of understanding. The illustrated forms are one example for implementation and are not limited to these forms. Here, "on" of the switch means that the circuit to which the switch is installed is closed; that is, when the switch is turned on, the circuit to which the switch is installed is connected and becomes closed. Conversely, "off" of the switch means that the circuit to which the switch is installed is open; that is, when the switch is turned off, the circuit to which the switch is installed is interrupted and becomes open.

[0024] The gate drive devices according to each embodiment of this disclosure drive multiple power semiconductor elements connected in series to be switched on and off. Examples of power semiconductor elements include MOSFETs, IGBTs, thyristors, GTOs, and transistors. A MOSFET has a gate terminal, a drain terminal, and a source terminal. An IGBT has a gate terminal, a collector terminal, and an emitter terminal. A transistor has a base terminal, a collector terminal, and an emitter terminal. A thyristor and a GTO have a gate terminal, an anode terminal, and a cathode terminal. The "current inflow terminals" of the power semiconductor elements correspond to the "drain terminal" of a MOSFET, the "collector terminal" of IGBTs and transistors, and the "anode terminal" of thyristors and GTOs, respectively. The "current outflow terminals" of the power semiconductor elements correspond to the "source terminal" of a MOSFET, the "emitter terminal" of IGBTs and transistors, and the "cathode terminal" of thyristors and GTOs, respectively. The "control terminals" of power semiconductor devices correspond to the "gate terminals" of MOSFETs, IGBTs, thyristors, and GTOs, and the "base terminals" of transistors, respectively.

[0025] The following description will explain, as an example, the case in which the power semiconductor element is composed of a MOSFET, but each embodiment of this disclosure is also applicable to IGBTs, thyristors, GTOs, or transistors. Furthermore, when the power semiconductor element is composed of an IGBT, the "drain," which is the current inflow terminal, is read as "collector," and the "source," which is the current outflow terminal, is read as "emitter," and each embodiment of this disclosure is applied accordingly. Furthermore, when the power semiconductor element is composed of a transistor, the "gate," which is the control terminal, is read as "base," the "drain," which is the current inflow terminal, is read as "collector," and the "source," which is the current outflow terminal, is read as "emitter," and each embodiment of this disclosure is applied accordingly. In addition, when the power semiconductor element is composed of a thyristor or GTO, the "drain," which is the current inflow terminal, is read as "anode," and the "source," which is the current outflow terminal, is read as "cathode," and each embodiment of this disclosure is applied accordingly.

[0026] <First Embodiment>

[0027] Figure 1 is a circuit diagram showing a gate drive device according to a first embodiment of the present disclosure.

[0028] The gate drive device 1 according to the first and second to fourth embodiments of this disclosure drives multiple power semiconductor elements connected in series to be switched on and off. Here, as an example, two power semiconductor elements Q connected in series are used. A and Q B This section describes an example of switching a power semiconductor element on and off, but the following explanation is also applicable when switching three or more power semiconductor elements connected in series on and off.

[0029] Power semiconductor element Q A The feedback diode D A These are connected in antiparallel. Similarly, the power semiconductor element Q B The feedback diode D B These are connected in reverse parallel.

[0030] The gate driving device 1 according to the first embodiment of the present disclosure includes gate driving voltage output units 11-A and 11-B, gate lines 12-A and 12-B, a magnetic coupling unit 13, first wiring paths 14-A and 14-B, second wiring paths 15-A and 15-B, and third wiring paths 16-A1, 16-A2, 16-B1, and 16-B2.

[0031] The gate driving voltage output unit 11-A is provided corresponding to the power semiconductor element Q A and outputs a positive gate driving voltage (for example, 17 V) corresponding to the on signal of the gate signal and a gate driving voltage of 0 V or a negative value (for example, -11 V) corresponding to the off signal of the gate signal. The gate driving voltage output unit 11-B is provided corresponding to the power semiconductor element Q B and outputs a positive gate driving voltage (for example, 17 V) corresponding to the on signal of the gate signal and a gate driving voltage of 0 V or a negative value (for example, -11 V) corresponding to the off signal of the gate signal. The gate driving voltage output units 11-A and 11-B insulate or convert the voltage level of the input on signal or off signal, and output a gate driving voltage corresponding to the power semiconductor elements Q A and Q B . Hereinafter, for the sake of simplicity of explanation, unless otherwise specified, the off signal of the gate signal is described as corresponding to a gate driving voltage of 0 V, but the off signal of the gate signal may be a negative gate driving voltage.

[0032] The gate driving voltage output unit 11-A includes a positive potential output unit VF A that outputs the positive potential of the gate driving voltage, a negative potential output unit VR A that outputs the negative potential of the gate driving voltage, a positive side switch SH A , and a negative side switch SL A . The negative potential output unit VR A is connected in series to the positive potential output unit VF A . In the gate driving voltage output unit 11-A, the positive side switch SH A performs an on operation, and the negative side switch SL AWhen the switch is turned off, a positive gate drive voltage (e.g., 17V) corresponding to the ON signal of the gate signal is output from the positive terminal of the gate drive voltage output unit 11-A. In the gate drive voltage output unit 11-A, the positive switch SH A The switch turns off, and the negative switch SL A When the ON operation is performed, the negative terminal of the gate drive voltage output unit 11-A outputs 0V or a negative gate drive voltage (e.g., -11V) corresponding to the OFF signal of the gate signal.

[0033] Similarly, the gate drive voltage output unit 11-B outputs a positive potential output unit VF that outputs the positive potential of the gate drive voltage. B And, the negative potential output section VR outputs the negative potential of the gate drive voltage. B And, the positive switch SH B And, the negative switch SL B It has the following: Negative side potential output section VR B The positive side potential output section VF B It is connected in series with the gate drive voltage output section 11-B, the positive switch SH B The switch turns ON, and the negative switch SL B When the switch is turned off, a positive gate drive voltage (e.g., 17V) corresponding to the ON signal of the gate signal is output from the positive terminal of the gate drive voltage output unit 11-B. B The switch turns off, and the negative switch SL B When the ON operation is performed, the negative terminal of the gate drive voltage output unit 11-B outputs 0V or a negative gate drive voltage (e.g., -11V) corresponding to the OFF signal of the gate signal.

[0034] Positive switch SH in gate drive voltage output section 11-A A and the positive switch SH in the gate drive voltage output section 11-B B This means that the ON and OFF operations are performed in sync, i.e., these positive switches SH A and SH B The on / off timing coincides between them. Similarly, the SL in the gate drive voltage output section 11-A Aand the negative switch SL in the gate drive voltage output section 11-B B This means that the on and off operations are performed synchronously, i.e., these negative switches SL A and SL B The on / off timing is the same between them. Therefore, when a positive gate drive voltage is output from the positive terminal of gate drive voltage output unit 11-A, a positive gate drive voltage is output from the positive terminal of gate drive voltage output unit 11-B. Also, when a 0V gate drive voltage is output from the negative terminal of gate drive voltage output unit 11-A, a 0V gate drive voltage is output from the negative terminal of gate drive voltage output unit 11-B.

[0035] The gate lines 12-A and 12-B are provided corresponding to the gate drive voltage output units 11-A and 11-B, respectively, and the power semiconductor element Q corresponding to the gate drive voltage output unit A and Q B It is connected to the gate terminal.

[0036] The gate line 12-A receives the gate drive voltage output from the gate drive voltage output unit 11-A and the corresponding power semiconductor element Q A It supplies power to the gate terminal, which is the control terminal of the power semiconductor element Q. A When a positive gate drive voltage is applied to the gate terminal of the power semiconductor element Q, A It turns on, and the power semiconductor element Q A When a gate drive voltage of 0V is applied to the gate terminal of the power semiconductor element Q A Turn it off.

[0037] The gate line 12-B receives the gate drive voltage output from the gate drive voltage output unit 11-B and the corresponding power semiconductor element Q B It supplies power to the gate terminal, which is the control terminal of the power semiconductor element Q. B When a positive gate drive voltage is applied to the gate terminal of the power semiconductor element Q, B It turns on, and the power semiconductor element Q B When a gate drive voltage of 0V is applied to the gate terminal of the power semiconductor element Q B Turn it off.

[0038] The magnetic coupling section 13 magnetically couples gate wire 12-A and gate wire 12-B. Figure 2 is a diagram illustrating the magnetic coupling section in a gate drive device according to the first to fourth embodiments of this disclosure. Figure 2 is also applicable to the second to fourth embodiments described later. The magnetic coupling section 13 has a magnetic material 30. Gate wires 12-A and 12-B are wound around the magnetic material 30. For example, as shown in Figure 2, when a gate current Ig1 flows, a magnetic flux Φ1 is generated in the magnetic material 30 and crosses gate wire 12-B. Similarly, when a gate current Ig2 flows, a magnetic flux Φ2 is generated in the magnetic material 30 and crosses gate wire 12-A. This magnetically couples gate wire 12-A and gate wire 12-B. The number of turns N1 of gate wire 12-A to magnetic material 30 and the number of turns N2 of gate wire 12-B to magnetic material 30 are set to be the same, such that when gate current Ig1 and gate current Ig2 are equal, |Φ1|=|Φ2|, and when gate current Ig1 and gate current Ig2 are of opposite polarity, Φ1 and Φ2 are of opposite polarity.

[0039] For example, power semiconductor element Q A and power semiconductor element Q B The timing of the off operation does not match that of the power semiconductor element Q A Power semiconductor element Q BIf the switch is turned off before the gate current Ig1 flows out before the gate current Ig2, the magnetic fluxes Φ1 and Φ2 will not be equal. As a result, a magnetic flux of |Φ1-Φ2| is generated in the magnetic material 30, and magnetic coupling occurs. At this time, an inductance L1 is generated in gate wire 12-A and an inductance L2 is generated in gate wire 12-B, and these inductances L1 and L2 are proportional to |Φ1-Φ2|. The larger the imbalance between gate current Ig1 and gate current Ig2, the larger the inductances L1 and L2 will be. Also, as the inductances L1 and L2 increase, the impedance of gate wires 12-A and 12-B increases, making it more difficult for gate currents Ig1 and Ig2 to flow. This changes the impedance of gate wires 12-A and 12-B according to the imbalance between gate current Ig1 and gate current Ig2, allowing the switch to operate so that gate currents Ig1 and Ig2 match.

[0040] Thus, the magnetic coupling portion 13 contains a power semiconductor element Q. A and power semiconductor element Q B There is a function that ensures that gate currents Ig1 and Ig2 match even if the timing of their off-operations is not synchronized.

[0041] The positive terminal of the gate drive voltage output section 11-A is connected to the positive gate resistor R. gAon The negative terminal is connected to the negative gate resistor R. gAoff The positive gate resistor R is connected to the positive terminal of the gate drive voltage output section 11-B. gBon The negative terminal is connected to the negative gate resistor R. gBoff The connection is established.

[0042] Power semiconductor element Q A The first wiring path 14-A corresponding to the gate drive voltage output unit 11-A is the path of the current flowing from the gate drive voltage output unit 11-A to the gate line 12-A corresponding to the gate drive voltage output unit 11-A, and the positive gate resistor R gAon It is provided between and the gate wire 12-A. The first wiring path 14-A has a positive gate resistor R connected to the wiring on the side connected to the positive terminal of the gate drive voltage output unit 11-A.gAon A first diode D has an anode connected via and a cathode connected to gate wire 12-A, which is the wiring on the side connected to the magnetic coupling unit 13. Aon It is equipped with.

[0043] Power semiconductor element Q B The first wiring path 14-B corresponding to the gate drive voltage output unit 11-B is the path of the current flowing from the gate drive voltage output unit 11-B to the gate line 12-B corresponding to the gate drive voltage output unit 11-B, and the positive gate resistor R gBon It is provided between and gate wire 12-B. The first wiring path 14-B has a positive gate resistor R connected to the wiring on the side connected to the positive terminal of the gate drive voltage output unit 11-B. gBon A first diode D has an anode connected via and a cathode connected to gate wire 12-B, which is the wiring on the side connected to the magnetic coupling unit 13. Bon It is equipped with.

[0044] Power semiconductor element Q A The corresponding second wiring path 15-A is the path of the current flowing from the gate wire 12-A connected to the first wiring path 14-A toward the gate drive voltage output unit 11-A corresponding to the gate wire 12-A, and the negative gate resistor R gAoff It is provided between and gate wire 12-A. The second wiring path 15-A is connected to the negative gate resistor R on the wiring side connected to the negative terminal of gate drive voltage output unit 11-A. gAoff A second diode D has a cathode connected via and an anode connected to the gate wire 12-A, which is the wiring on the side connected to the magnetic coupling unit 13. Aoff It is equipped with.

[0045] Power semiconductor element Q B The corresponding second wiring path 15-B is the path of the current flowing from the gate wire 12-B connected to the first wiring path 14-B toward the gate drive voltage output unit 11-B corresponding to the gate wire 12-B, and the negative gate resistor R gBoff It is provided between and gate wire 12-B. The second wiring path 15-B is connected to the negative terminal of gate drive voltage output unit 11-B and has a negative gate resistor RgBoff A second diode D having an anode connected to a gate line 12-B which is a wiring on the side connected to a cathode connected via gBoff and a magnetic coupling portion 13 Boff is provided.

[0046] Power semiconductor device Q A The third wiring paths 16-A1 and 16-A2 corresponding to A attenuate the exciting current generated in the magnetic coupling portion 13. The third wiring path 16-A1 includes a first resistor R Aon connected in parallel to the first diode D Aon is provided. The third wiring path 16-A2 includes a second resistor R Aoff connected in parallel to the second diode D Aoff is provided.

[0047] Power semiconductor device Q B The third wiring paths 16-B1 and 16-B2 corresponding to B attenuate the exciting current generated in the magnetic coupling portion 13. The third wiring path 16-B1 includes a first resistor R Bon connected in parallel to the first diode D Bon is provided. The third wiring path 16-B2 includes a second resistor R Boff connected in parallel to the second diode D Boff is provided.

[0048] Subsequently, the operation of the gate drive device 1 according to the first embodiment of the present disclosure will be described with reference to FIGS. 3 and 4.

[0049] FIGS. 3 and 4 are circuit diagrams for explaining the current flow during the on-operation of the power semiconductor device Q A according to the first embodiment of the present disclosure. In FIGS. 3 and 4, the input capacitance when the power semiconductor device Q[[ID= forty-two]] A is viewed from the gate terminal side is denoted as Cgs A and the input capacitance when the power semiconductor device Q B is viewed from the gate terminal side is denoted as Cgs B shall be.

[0050] Power semiconductor device Q AThe on-operation is achieved by turning on the positive-side switch SH of the gate drive voltage output section 11-A and turning off the negative-side switch SL, A so that a positive gate drive voltage (e.g., 17 V) is output from the positive terminal of the gate drive voltage output section 11-A and applied to the gate terminal of the power semiconductor device Q. When the positive potential of the gate drive voltage output from the positive potential output section VF of the gate drive voltage output section 11-A is applied to the power semiconductor device Q A earlier than the power semiconductor device Q, the gate-source voltage of the power semiconductor device Q A starts to rise from a negative potential to a positive potential. At this time, as shown by the thick arrow in FIG. 3, current flows in the order of the positive potential output section VF, A the positive-side switch SH, B the positive gate resistor R, A the first diode D on the first wiring path 14-A, A the magnetic coupling section 13, and the input capacitance Cgs of the power semiconductor device Q. The positive gate resistor R is set to a small value in order to increase the switching speed of the power semiconductor device Q as much as possible, so resonance conditions may be satisfied and the current may oscillate. Since the current oscillates, when the voltage of the input capacitance Cgs of the power semiconductor device Q A becomes higher than the positive potential of the gate drive voltage output from the positive potential output section VF, A current flows backward from the power semiconductor device Q gAon toward the positive potential output section VF. The path is in the order of the input capacitance Cgs of the power semiconductor device Q, Aon the magnetic coupling section 13, the first resistor R on the third wiring path 16-A1, A the positive gate resistor R, A the positive-side switch SH, gAon and the positive potential output section VF, as shown by the thick arrow in FIG. 4. The first resistor R A is set to a small value to increase the switching speed of the power semiconductor device Q as much as possible, so resonance conditions may be satisfied and the current may oscillate. Since the current oscillates, when the voltage of the input capacitance Cgs of the power semiconductor device Q A becomes higher than the positive potential of the gate drive voltage output from the positive potential output section VF, A current flows backward from the power semiconductor device Q A toward the positive potential output section VF. The path is in the order of the input capacitance Cgs of the power semiconductor device Q, A the magnetic coupling section 13, the first resistor R on the third wiring path 16-A1, A the positive gate resistor R, A the positive-side switch SH, A and the positive potential output section VF, as shown by the thick arrow in FIG. 4. The first resistor R Aon is set to a small value to increase the switching speed of the power semiconductor device Q as much as possible, so resonance conditions may be satisfied and the current may oscillate. Since the current oscillates, when the voltage of the input capacitance Cgs of the power semiconductor device Q gAon becomes higher than the positive potential of the gate drive voltage output from the positive potential output section VF, A current flows backward from the power semiconductor device Q A toward the positive potential output section VF. The path is in the order of the input capacitance Cgs of the power semiconductor device Q, AonSince the value is large enough to attenuate the current, the current is attenuated, and the power semiconductor element Q A The gate-source voltage oscillations are suppressed.

[0051] Power semiconductor element Q A When it is in the OFF state, the above-mentioned power semiconductor element Q A The current flow is in the opposite direction to that when the device is ON. Power semiconductor element Q A The OFF operation is controlled by the positive switch SH of the gate drive voltage output section 11-A. A The negative switch SL is turned off. A When this is turned on, a negative gate drive voltage (for example, 0V or less) is output from the negative terminal of the gate drive voltage output unit 11-A, and the power semiconductor element Q A This is achieved by applying it to the gate terminal. Negative potential output section VR of gate drive voltage output section 11-A A The negative potential of the gate drive voltage output from the power semiconductor element Q B Faster than power semiconductor element Q A When applied to the power semiconductor element Q, A The gate-source voltage of the power semiconductor element Q begins to decrease from a positive potential to a negative potential. At this time, the current is generated by the power semiconductor element Q. A Input capacity Cgs A , magnetic coupling section 13, second diode D on second wiring path 15-A Aoff , negative gate resistor R gAoff Negative switch SL A , and negative potential output section VR A The current flows in this order. Negative gate resistor R gAoff Q is a power semiconductor element. B Because the switching speed is set to a small value in order to make it as fast as possible, resonance conditions may be met, causing the current to oscillate. Due to the current oscillating, the power semiconductor element Q A Input capacity Cgs A The voltage of the negative potential output section VR A When the gate drive voltage output from the VR falls below the negative potential, the negative potential output section VR A From power semiconductor element Q ACurrent flows backward towards the negative potential output section VR. A Negative switch SL A , negative gate resistor R gAoff , the second resistor R on the third wiring path 16-A2 Aoff , magnetic coupling section 13, and power semiconductor element Q A Input capacity Cgs A The order is as follows. Second resistor R Aoff Since the value is large enough to attenuate the current, the current is attenuated, and the power semiconductor element Q A The gate-source voltage oscillations are suppressed.

[0052] The above describes the power semiconductor element Q in the gate drive device. A The current flow during ON and OFF operation of the power semiconductor element Q has been explained, but B The same explanation applies to the current flow during the ON and OFF operations.

[0053] Using the gate drive device 1 described above, it is possible to drive the power semiconductor elements on and off in a power conversion device configured by connecting multiple arms in series, each arm being equipped with multiple power semiconductor elements connected in series.

[0054] Figure 5 shows a power converter equipped with a gate drive device according to one embodiment of the present disclosure. Figure 6 is a circuit diagram showing an arm provided within the power converter shown in Figure 5. Here, as an example, two power semiconductor elements Q connected in series are shown. A and Q B An example of how to configure arm 50 will be explained.

[0055] A power conversion device 100 according to one embodiment of the present disclosure comprises the gate drive device 1 described above, a power conversion circuit unit 2 having an arm 50 provided with a plurality of power semiconductor elements connected in series and performing power conversion operations in accordance with the on / off operation of the power semiconductor elements, and a power conversion control unit 3 that controls the power conversion operation of the power conversion circuit unit 2.

[0056] As shown in Figure 6, the arm 50 is, for example, two power semiconductor elements Q connected in series. A and Q B It consists of the following: Power semiconductor element Q A Terminal P1 is drawn out from the drain terminal, and power semiconductor element Q B Terminal P2 is drawn out from the source terminal. In the power conversion circuit section 2, terminal P2 of one arm 50 is connected to terminal P1 of another arm 50, and this connection point is connected to one terminal of the load. In the example shown in Figure 5, two arms 50 are connected in series to form one leg 60, and the power conversion circuit section 2 is formed by the two legs 60.

[0057] A DC power supply 200 is connected to a leg 60, which consists of arms 50 connected in series. A load 300 is connected between terminal T1, located between the arms 50 connected in series within leg 60, and terminal T2, located between the arms 50 connected in series within the other leg 60.

[0058] A gate drive device 1 is provided corresponding to the arm 50. Power semiconductor element Q is located within each arm 50. A and power semiconductor element Q B The gates are switched on and off by the corresponding gate drive device 1. That is, the gate drive voltage output unit 11-A and the gate drive voltage output unit 11-B each generate the gate drive voltage as described above, and then each positive side switch SH A and SH B and each negative switch SL A and SL B By turning it on and off, the power semiconductor element Q A and Q B It controls the voltage applied to the gate terminal.

[0059] The power conversion control unit 3 controls each positive switch SH in each gate drive unit 1. A and SH B and each negative switch SL A and SL BIt controls the ON and OFF operation of each gate drive device 1. In other words, the power conversion control unit 3 controls each positive switch SH in each gate drive device 1. A and SH B and each negative switch SL A and SL B By controlling the on and off operation of the power semiconductor element Q, A and Q B The voltage applied to the gate terminal is controlled, thereby controlling the power semiconductor element Q A and Q B The switches perform ON and OFF operations. As a result, the power conversion circuit unit 2 performs a power conversion operation in which it converts the DC power supplied from the DC power supply 200 into the desired power and supplies it to the load 300. The power conversion control unit 3 controls each positive switch SH in each gate drive unit 1 so that, for example, there is no deviation between the detected value i of the current flowing from the positive terminal T1 to the load 300 and the current command which is the control target value. A and SH B and each negative switch SL A and SL B Generates gate signals to control the ON and OFF operations.

[0060] A processing unit (processor) is provided within the power converter 100. This processing unit has a power conversion control unit 3. The power conversion control unit 3 of the processing unit is a functional module implemented, for example, by a computer program executed on the processor. For example, if the power conversion control unit 3 is constructed in computer program format, the function can be realized by operating the processing unit according to this computer program. The computer program for executing the processing of the power conversion control unit 3 may be provided in the form of a recording on a computer-readable recording medium such as a semiconductor memory, magnetic recording medium, or optical recording medium. Alternatively, the power conversion control unit 3 may be implemented as a semiconductor integrated circuit on which the computer program that realizes the function is written.

[0061] Next, the power semiconductor element Q in the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036)A and Q B This section explains the imbalance in voltage distribution for each component (drain-source voltage imbalance).

[0062] Figure 7 is a circuit diagram showing a gate drive device according to the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036).

[0063] The gate drive device 1001 according to the invention described in Patent Document 1 (Japanese Patent No. 4396036) is a power semiconductor element Q A and Q B A gate drive voltage output section 111-A and 111-B are provided in correspondence with the gate drive voltage output section 111-A and 111-B, which outputs a gate drive voltage, and the gate drive voltage output from the gate drive voltage output section 111-A and 111-B is connected to the corresponding power semiconductor element Q A and Q B The power semiconductor element Q includes a magnetic coupling unit 131 that magnetically couples each of the gate wires supplied to each of the gate terminals of the power semiconductor element Q. A The feedback diode D A These are connected in antiparallel. Similarly, the power semiconductor element Q B The feedback diode D B These are connected in antiparallel. The gate drive voltage output section 111-A outputs the positive potential of the gate drive voltage to the positive potential output section VF. A And, the negative potential output section VR outputs the negative potential of the gate drive voltage. A And, the positive switch SH A And, the negative switch SL A It has the following: Negative side potential output section VR A The positive side potential output section VF A It is connected in series with the gate drive voltage output section 111-B, which outputs the positive potential of the gate drive voltage, and the positive potential output section VF B And, the negative potential output section VR outputs the negative potential of the gate drive voltage. B And, the positive switch SH B And, the negative switch SL B It has the following: The positive terminal of the gate drive voltage output section 111-A has a positive gate resistor R gAon The negative terminal is connected to the negative gate resistor R. gAoffThe positive terminal of the gate drive voltage output section 111-B is connected to the positive gate resistor R. gBon The negative terminal is connected to the negative gate resistor R. gBoff The connection is established.

[0064] Figure 8 illustrates the waveform of the gate-source voltage of each power semiconductor element when transitioning from the off state to the on state, in the case of a transmission shift in the gate signal in the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036). In Figure 8, as an example, power semiconductor element Q A The on / off signal of the gate signal for power semiconductor element Q B It is assumed that the gate signal is output 250ns earlier than the on / off signal for that gate.

[0065] As shown in Figure 8, the power semiconductor element Q A and Q B In the ON state, the gate-source voltage V gsA and V gsB The element is vibrating. If the element switches to the off state while this vibration is ongoing, an imbalance in the voltage applied to the element during the off operation will occur, depending on the duration for which the element remains in the on state.

[0066] For example, at off-timing t2, the power semiconductor element Q A The gate-source voltage V gsA and power semiconductor element Q B The gate-source voltage V gsb These are the same. Power semiconductor element Q A The gate signal off signal for power semiconductor element Q B Because it is output 250ns earlier than the gate signal off signal for the power semiconductor element Q, a voltage imbalance occurs due to the transmission delay of the gate signal, and A The applied voltage (drain-source voltage) V dsA Power semiconductor element Q B The applied voltage (drain-source voltage) V dsB It will be slightly larger than that.

[0067] For example, at the off-timing t1, the power semiconductor element Q A The gate-source voltage V gsA Power semiconductor element Q B The gate-source voltage V gsb Larger. Power semiconductor element Q A The gate-source voltage V gsA Power semiconductor element Q B The gate-source voltage V gsb From a state greater than the power semiconductor element Q A The power semiconductor element Q is turned off, so A The start of the off operation of the power semiconductor element Q B This is delayed compared to the start of the off operation. Therefore, the power semiconductor element Q B The applied voltage (drain-source voltage) V dsB Power semiconductor element Q A The applied voltage (drain-source voltage) V dsA It will become larger than that.

[0068] For example, at the off-timing t3, the power semiconductor element Q B The gate-source voltage V gsb Power semiconductor element Q A The gate-source voltage V gsA Larger. Power semiconductor element Q B The gate-source voltage V gsb Power semiconductor element Q A The gate-source voltage V gsA From a state greater than the power semiconductor element Q B The power semiconductor element Q is turned off, so B The start of the off operation of the power semiconductor element Q A This is delayed compared to the start of the off operation. Therefore, the power semiconductor element Q A The applied voltage (drain-source voltage) V dsA Power semiconductor element Q B The applied voltage (drain-source voltage) V dsB It will become larger than that. Also, the power semiconductor element Q A The gate signal off signal for power semiconductor element QB Since it is output 250ns earlier than the gate signal off signal for the power semiconductor element Q, A The applied voltage (drain-source voltage) V dsA and power semiconductor element Q B The applied voltage (drain-source voltage) V dsB The gap will become even larger.

[0069] The above describes the gate-source voltage waveforms of each power semiconductor element when transitioning from the off state to the on state. The same explanation applies when transitioning from the on state to the off state.

[0070] Power semiconductor element Q A and Q B If there is a transmission delay in the gate signal or a difference in gate-source voltage, the power semiconductor element Q A and Q B An imbalance in voltage distribution (drain-source voltage imbalance) occurs for each of these during switching operation.

[0071] Figure 9 shows the power semiconductor element Q in the case of voltage distribution imbalance in the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036). A and Q B Power semiconductor element Q when transitioning from the ON state to the OFF state A and Q B This figure illustrates the drain-source voltage and drain current flowing from the drain to the source of a power semiconductor device Q. A and Q B When transitioning from the ON state to the OFF state, the drain current begins to decrease from a certain value, and at the same time, the power semiconductor element Q A and Q B Drain-source voltage V dsA and V dsB Q will rise. A and Q B If there is any difference in the switching operation of the power semiconductor element Q A and Q BThe voltage distribution becomes unbalanced after the device is turned off.

[0072] Figure 10 shows the power semiconductor element Q in the case of voltage distribution imbalance in the invention described in Patent Document 1 (Japanese Patent No. 4396036). A and Q B Power semiconductor element Q when transitioning from the off state to the on state A and Q B This figure illustrates the drain-source voltage and drain current flowing from the drain to the source of a power semiconductor device Q. A and Q B When transitioning from the off state to the on state, the drain current starts to increase from zero, and at the same time, the power semiconductor element Q, which turns on quickly, A Drain-source voltage V dsA The power semiconductor element Q decreased and its on-operation was delayed. B Drain-source voltage V dsB The power semiconductor element Q increases. A and Q B If the ON state continues, the power semiconductor element Q A and Q B Drain-source voltage V dsA and V dsB Q is near zero, but around the time of switching from the off state to the on state, the power semiconductor element Q A and Q B An imbalance in voltage distribution occurs.

[0073] Next, the reasons why oscillations occur in the gate-source voltage of each power semiconductor element will be explained with reference to Figures 11 and 12.

[0074] Figure 11 is an equivalent circuit diagram showing the current flow when a power semiconductor element transitions from the off state to the on state in the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036) when there is a transmission shift in the gate signal. Figure 12 is an equivalent circuit diagram showing the current flow when a power semiconductor element transitions from the off state to the on state in the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036) when there is no transmission shift in the gate signal. In Figures 11 and 12, the power semiconductor element Q A The input capacitance when viewed from the gate terminal side is Cgs A Q, a power semiconductor element B The input capacitance when viewed from the gate terminal side is Cgs B The excitation inductance of the magnetic coupling unit 131 is set to L. m Power semiconductor element Q A The corresponding leakage inductance is L rA Q, a power semiconductor element B The corresponding leakage inductance is L rB Let's assume that power semiconductor element Q A The current flowing through the gate terminal is i gA Q, a power semiconductor element B The current flowing through the gate terminal is i gB Let's assume that.

[0075] As an example, power semiconductor element Q A The ON signal of the gate signal for power semiconductor element Q B This section describes the occurrence of oscillations when the gate signal is output earlier than the ON signal for the power semiconductor element Q, as shown in Figure 11. A The corresponding positive switch SH A When it turns on, the positive side potential output section VF A The positive side potential of the gate drive voltage output from is the power semiconductor element Q A Output is provided to and power semiconductor element Q B Corresponding negative switch SL B The negative potential output section VR remains in the ON state. B The negative potential of the gate drive voltage output from the power semiconductor element Q B It is output to [this location].

[0076] In the state shown in Figure 11, the excitation inductance L m A potential difference is generated across the terminals, and an excitation current i1 flows. Excitation inductance L m An excitation current will flow through it. Power semiconductor element Q A Current i flowing through the gate terminal gA =i1+i2, and the power semiconductor element Q B Current i flowing through the gate terminal gB =i2.

[0077] Excitation inductance L m The gate current is designed to be somewhat large in order to match each gate current and suppress variations in switching timing. gA1 , R gA2 , R gB1 and R gB2 Q is a power semiconductor element. A and Q B To increase the switching speed and suppress power loss, a relatively small value is selected. For this reason, it is difficult to avoid the resonance conditions of the LCR series circuit, and the Q of the power semiconductor element A and Q B The current flowing through the gate terminal oscillates, and the gate-source voltage V gsA and V gsB It vibrates.

[0078] Furthermore, in the state shown in Figure 12, the positive potential output section VF within the gate drive voltage output section 111-A A The positive potential output from and the positive side potential output section VF within the gate drive voltage output section 111-B B The positive potential output from is the same as that of the power semiconductor element Q A Input capacity of Cgs A and power semiconductor element Q B Input capacity Cgs B The amount of charge accumulated in each of them is the same, and the power semiconductor element Q A The corresponding leakage inductance is L rA and power semiconductor element Q B The corresponding leakage inductance is LrB The respective electromotive forces are the same, and the gate resistor R gA1 and gate resistor R gB1 If the electromotive forces of each are the same, then the excitation inductance L m Since there is no potential difference across the terminals, the excitation current "i gA -i gB " becomes zero, that is, the excitation inductance L m No excitation current flows through it. Excitation inductance L m Since no excitation current flows through it, the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB It does not vibrate.

[0079] However, the positive side potential output section VF A and positive side potential output section VF B Each positive potential output from, input capacitance Cgs A and input capacity Cgs B The amount of charge accumulated in each of them, and the leakage inductance are L. rA and leakage inductance L rB Each electromotive force, gate resistance R gA1 and gate resistor R gB1 If even one of the four parameters of each electromotive force differs, i gA -i gB It is no longer zero, and the excitation inductance L m An excitation current will flow through it. Power semiconductor element Q A and Q B The current flowing through the gate terminal oscillates, and the gate-source voltage V gsA and V gsB It vibrates.

[0080] Thus, the positive side potential output section VF A and positive side potential output section VF B Each positive potential output from, input capacitance Cgs A and input capacity Cgs B The amount of charge accumulated in each of them, and the leakage inductance are L. rA and leakage inductance LrB Each electromotive force, gate resistance R gA1 and gate resistor R gB1 An excitation current flows if there is a difference in any of the four parameters of each electromotive force, or if there is a transmission difference in the gate signal. This excitation current causes oscillations in the current flowing through each gate terminal of the power semiconductor element, and the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB It oscillates. The excitation current is equal to the excitation inductance L. m , gate resistor R gA1 , R gA2 , R gB1 and R gB2 Input capacity C gsA and C gsB It flows through. Excitation inductance L m The gate current is designed to be somewhat large in order to match each gate current and suppress variations in switching timing. gA1 , R gA2 , R gB1 and R gB2 Q is a power semiconductor element. A and Q B To increase the switching speed and suppress power loss, a relatively small value is selected. For this reason, it is difficult to avoid the resonance conditions of the LCR series circuit, and the Q of the power semiconductor element A and Q B The current flowing through the gate terminal oscillates, and the gate-source voltage V gsA and V gsB It vibrates.

[0081] In contrast, the gate drive device 1 according to the first embodiment of this disclosure can suppress the oscillation of the current flowing through each gate terminal of the power semiconductor element, thereby suppressing the imbalance in voltage distribution during switching operation for each power semiconductor element.

[0082] Here, the gate-source voltage waveforms for the case where magnetic coupling of the gate line is present, as described in Patent Document 1 (Japanese Patent No. 4396036), and for the first embodiment of this disclosure, are compared and examined using the simulations shown in Figures 13 and 14.

[0083] Figure 13 shows a simulated waveform of the gate-source voltage in the invention described in Patent Document 1 (Japanese Patent No. 4396036). Figure 14 shows a simulated waveform of the gate-source voltage in a gate drive device according to the first embodiment of this disclosure.

[0084] In the simulation, the power semiconductor element Q A The gate signal off signal for power semiconductor element Q B The gate signal is assumed to be output 250ns earlier than the ON signal for the power semiconductor element Q. A and Q B The simulation assumes a 3.3kV / 750A SiC-MOSFET is used, and a load current of 325A flows when a voltage of 1.8kV is applied. The load is an inductive load. In the simulation, the positive gate resistor R is used. gAon and R gBon Set the negative gate resistor to 4.1Ω and R gAoff and R gBoff Let it be 6.1Ω, and the first resistor R Aon and R Bon Let the first resistor be 36Ω, and the second resistor R Aoff and R Boff Set to 34Ω, positive side potential output section VF A and VF B The positive potential of the gate drive voltage output from is set to 17V, and the negative potential output section VR A and VR B The negative potential of the gate drive voltage output from this device is set to -11V.

[0085] As shown in Figure 13, according to the invention described in Patent Document 1 (Japanese Patent Publication No. 4396036), the power semiconductor element Q A and Q B The gate-source voltage VgsA and V gsB After the voltage rises from -11V to 17V, the power semiconductor element Q A The gate-source voltage V gsA and power semiconductor element Q B The gate-source voltage V gsB This means that it is vibrating with a phase shift of 180 degrees.

[0086] As shown in Figure 14, according to the gate drive device of the first embodiment of this disclosure, the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB After the voltage rises from -11V to 17V, the vibration dampens, and after 25μs, the power semiconductor element Q A The gate-source voltage V gsA and power semiconductor element Q B The gate-source voltage V gsB These values ​​are the same. Thus, according to the gate drive device of the first embodiment of this disclosure, oscillations in the gate-source voltage can be suppressed, no difference occurs in the gate-source voltage at the start of switching, and the power semiconductor element Q A and Q B This can suppress the imbalance in voltage distribution during switching operation. However, the power semiconductor element Q A The gate-source voltage V gsA and power semiconductor element Q B The gate-source voltage V gsB Since it takes about 25 μs for the gate-source voltage V to become equal, gsB To avoid switching during vibration, a minimum on or off period of approximately 25 μs must be ensured.

[0087] <Second Embodiment>

[0088] Figure 15 is a circuit diagram showing a gate drive device according to a second embodiment of the present disclosure.

[0089] A second embodiment of this disclosure is the second diode D in the first embodiment. Aoff and D Boff and the second resistor R Aoff and R Boff This is an abbreviated version.

[0090] The gate drive device 1 according to the second embodiment of the present disclosure comprises gate drive voltage output units 11-A and 11-B, gate wires 12-A and 12-B, a magnetic coupling unit 13, a fourth wiring path 21-A and 21-B, a fifth wiring path 22-A and 22-B, and a sixth wiring path 23-A and 23-B.

[0091] The gate drive voltage output units 11-A and 11-B, gate lines 12-A and 12-B, and magnetic coupling unit 13 are as described in the first embodiment.

[0092] The positive terminal of the gate drive voltage output section 11-A is connected to the positive gate resistor R. gAon The negative terminal is connected to the negative gate resistor R. gAoff The positive gate resistor R is connected to the positive terminal of the gate drive voltage output section 11-B. gBon The negative terminal is connected to the negative gate resistor R. gBoff The connection is established.

[0093] Power semiconductor element Q A The corresponding fourth wiring path 21-A is the path of current flowing from the gate drive voltage output unit 11-A to the gate wire 12-A corresponding to the gate drive voltage output unit 11-A, and the positive gate resistor R gAon It is provided between and gate wire 12-A. The fourth wiring path 21-A is connected to the positive terminal of gate drive voltage output unit 11-A and has a positive gate resistor R gAon A fourth diode D has an anode connected via and a cathode connected to gate wire 12-A, which is wiring connected to the magnetic coupling unit 13. Aon It is equipped with.

[0094] Power semiconductor element Q BThe fourth wiring path 21-B, which corresponds to the gate drive voltage output unit 11-B, is the path of the current flowing from the gate drive voltage output unit 11-B to the gate wire 12-B corresponding to the gate drive voltage output unit 11-B, and the positive gate resistor R gBon It is provided between and gate wire 12-B. The fourth wiring path 21-B is connected to the positive terminal of gate drive voltage output unit 11-B and has a positive gate resistor R gBon A fourth diode D has an anode connected via and a cathode connected to gate wire 12-B, which is wiring connected to the magnetic coupling unit 13. Bon It is equipped with.

[0095] Power semiconductor element Q A The corresponding fifth wiring path 22-A is connected to the power semiconductor element Q, to which the gate wire 12-A is connected. A From the gate terminal to the power semiconductor element Q A This is the current path that flows toward the gate drive voltage output section 11-A corresponding to the negative gate resistor R. gAoff and power semiconductor element Q A It is established between [the two points].

[0096] Power semiconductor element Q B The corresponding fifth wiring path 22-B is connected to the power semiconductor element Q, to which the gate wire 12-B is connected. B From the gate terminal to the power semiconductor element Q B This is the current path that flows toward the gate drive voltage output section 11-B corresponding to the negative gate resistor R. gBoff and power semiconductor element Q B It is established between [the two points].

[0097] Power semiconductor element Q A The sixth wiring path 23-A, which corresponds to the fourth diode D, attenuates the excitation current generated in the magnetic coupling section 13. Aon A fourth resistor R is connected in parallel to it. Aon It is equipped with.

[0098] Power semiconductor element Q BThe sixth wiring path 23-B, which corresponds to the fourth diode D, attenuates the excitation current generated in the magnetic coupling section 13. Bon A fourth resistor R is connected in parallel to it. Bon It is equipped with.

[0099] The ON operation of the gate drive device 1 according to the second embodiment of this disclosure is the same as the ON operation of the gate drive device 1 according to the first embodiment described with reference to Figures 3 and 4.

[0100] On the other hand, the off operation of the gate drive device 1 according to the second embodiment of this disclosure is performed without going through the magnetic coupling unit 13 to the power semiconductor element Q A and Q B The gate-source voltage is applied to the power semiconductor element Q, which differs from the off operation of the gate drive device 1 according to the first embodiment. A The OFF operation is controlled by the positive switch SH of the gate drive voltage output section 11-A. A The negative switch SL is turned off. A When this is turned on, a negative gate drive voltage (for example, 0V or less) is output from the negative terminal of the gate drive voltage output unit 11-A, and the power semiconductor element Q A This is achieved by applying it to the gate terminal. Negative potential output section VR of gate drive voltage output section 11-A A The negative potential of the gate drive voltage output from the power semiconductor element Q B Faster than power semiconductor element Q A When applied to the power semiconductor element Q, A The gate-source voltage of the power semiconductor element Q begins to decrease from a positive potential to a negative potential. At this time, the current is generated by the power semiconductor element Q. A Input capacity Cgs A , negative gate resistor R gAoff Negative switch SL A , and negative potential output section VR A The current flows in this order. Negative gate resistor R gAoff This is the negative switch SL in the gate drive voltage output section 11-A. AThe switching speed is set to a small value to make it as fast as possible. Since no current flows through the magnetic coupling section 13, the current does not oscillate.

[0101] In the second embodiment of this disclosure, the gate-source voltage does not oscillate during off operation. Also, during on operation, as in the invention described in Patent Document 1 (Japanese Patent No. 4396036), the gate signal transmission time and power semiconductor element Q A and Q B If there is variation in the characteristics of the power semiconductor element Q A and Q B The voltage distribution will not be equal, resulting in an excessive voltage being applied to one of the elements. However, as can be seen from the waveforms of the drain-source voltage and drain current when voltage imbalance occurs shown in Figure 10, the imbalance in the applied voltage when transitioning from the off state to the on state is a short-time phenomenon. Therefore, in the second embodiment of this disclosure, the occurrence of an imbalance in the applied voltage when transitioning from the off state to the on state is tolerated, and the voltage imbalance occurring in the off state is suppressed by suppressing the oscillation of the gate-source voltage due to the excitation current of the magnetic coupling part 13 that occurs when transitioning from the on state to the off state. Thus, in the second embodiment of this disclosure, the gate-source voltage V gsA and V gsB There is no need to ensure a minimum off-period to avoid switching during oscillation.

[0102] <Third Embodiment>

[0103] Figure 16 is a circuit diagram showing a gate drive device according to a third embodiment of the present disclosure.

[0104] The gate drive device 1 according to the third embodiment of the present disclosure comprises gate drive voltage output units 11-A and 11-B, gate wires 12-A and 12-B, a magnetic coupling unit 13, first wiring paths 14-A and 14-B, second wiring paths 15-A and 15-B, and a third wiring path 16.

[0105] The gate drive voltage output units 11-A and 11-B, gate lines 12-A and 12-B, and magnetic coupling unit 13 are as described in the first embodiment.

[0106] The positive terminal of the gate drive voltage output section 11-A is connected to the positive gate resistor R. gAon The negative terminal is connected to the negative gate resistor R. gAoff The positive gate resistor R is connected to the positive terminal of the gate drive voltage output section 11-B. gBon The negative terminal is connected to the negative gate resistor R. gBoff The connection is established.

[0107] Power semiconductor element Q A The first wiring path 14-A corresponding to the gate drive voltage output unit 11-A is the path of the current flowing from the gate drive voltage output unit 11-A to the gate line 12-A corresponding to the gate drive voltage output unit 11-A, and the positive gate resistor R gAon It is installed between and gate line 12-A.

[0108] Power semiconductor element Q B The first wiring path 14-B corresponding to the gate drive voltage output unit 11-B is the path of the current flowing from the gate drive voltage output unit 11-B to the gate line 12-B corresponding to the gate drive voltage output unit 11-B, and the positive gate resistor R gBon It is installed between and gate line 12-B.

[0109] Power semiconductor element Q A The corresponding second wiring path 15-A is the path of the current flowing from the gate wire 12-A connected to the first wiring path 14-A toward the gate drive voltage output unit 11-A corresponding to the gate wire 12-A, and the negative gate resistor R gAoff It is installed between and gate line 12-A.

[0110] Power semiconductor element Q B The corresponding second wiring path 15-B is the path of the current flowing from the gate wire 12-B connected to the first wiring path 14-B toward the gate drive voltage output unit 11-B corresponding to the gate wire 12-B, and the negative gate resistor R gBoffIt is installed between and gate line 12-B.

[0111] The third wiring path 16 attenuates the excitation current generated in the magnetic coupling section 13. The third wiring path 16 is provided in parallel with the magnetic coupling section 13 for one of the two gate lines 12-A and 12-B that are magnetically coupled by the magnetic coupling section 13. In the example shown in Figure 16, as an example, the third wiring path 16 is provided in parallel with the magnetic coupling section 13 for gate line 12-A. The third wiring path 16 is connected to the third resistor R S and the third resistor R S The device includes a series circuit consisting of a first switch SS that opens and closes the wiring connected to the gate wire 12-A. Therefore, the series circuit is connected to the gate wire 12-A in parallel with the magnetic coupling unit 13.

[0112] Next, the operation of the gate drive device 1 according to the third embodiment of this disclosure will be described.

[0113] Power semiconductor element Q A The ON operation is controlled by the positive switch SH of the gate drive voltage output section 11-A. A When the negative switch SL is turned on A When this is turned off, a positive gate drive voltage (e.g., 17V) is output from the positive terminal of the gate drive voltage output unit 11-A, and the power semiconductor element Q A This is achieved by applying it to the gate terminal. When the first switch SS is in the off state, the positive potential output section VF of the gate drive voltage output section 11-A A The positive side potential of the gate drive voltage output from is the power semiconductor element Q B Faster than power semiconductor element Q A When applied to the power semiconductor element Q, A The gate-source voltage begins to rise from a negative potential towards a positive potential. At this time, the current is at the positive potential output section VF. A , positive side switch SH A , positive gate resistor R gAon , magnetic coupling section 13, and power semiconductor element Q A Input capacity Cgs AThe current flows in this order. Positive gate resistor R gAon The positive switch SH is located within the gate drive voltage output section 11-A. A Because the switching speed is set to a small value in order to make it as fast as possible, resonance conditions may be met, causing the current to oscillate. Power semiconductor element Q A Input capacity Cgs A The voltage of the positive side potential output section VF A After the gate drive voltage output from rises to near the positive potential, when the first switch SS is turned on, the excitation current that causes oscillations in the current flowing through the magnetic coupling unit 13 is transmitted through the third resistor R S Because it flows through it, it attenuates rapidly. Therefore, the power semiconductor element Q A The gate-source voltage oscillations are suppressed.

[0114] Here, the effects of the third embodiment of this disclosure will be explained using simulation.

[0115] Figure 17 shows a simulated waveform of the gate-source voltage in a gate drive device according to a third embodiment of the present disclosure.

[0116] In the simulation, the power semiconductor element Q A The ON signal of the gate signal for power semiconductor element Q B The gate signal is assumed to be output 250ns earlier than the ON signal for the power semiconductor element Q. A and Q B The simulation assumes a 3.3kV / 750A SiC-MOSFET is used, and a load current of 325A flows when a voltage of 1.8kV is applied. The load is an inductive load. In the simulation, the positive gate resistor R is used. gAon and R gBon Set the negative gate resistor to 4.1Ω and R gAoff and R gBoff Set to 6.1Ω, positive side potential output section VF A and VF B The positive potential of the gate drive voltage output from is set to 17V, and the negative potential output section VR A and VRA The negative potential of the gate drive voltage output from is set to -11V. The first switch SS controls the gate-source voltage V gsA and V gsB The positive side potential output section VF A and positive side potential output section VF B The switch is turned on 8μs after the rising edge of the ON signal that reaches the vicinity of each positive potential output from the switch, and then turned off 18μs later. The first switch SS is controlled by the gate-source voltage V gsA and V gsB This is the negative side potential output section VR A and negative potential output section VR B The device is turned on 8μs after the falling edge of the off signal that reaches the vicinity of each negative potential output, and then turned off 18μs after that.

[0117] As shown in Figure 17, the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB After the voltage rises, when the first switch SS is turned on, the gate-source voltage V gsA and V gsB It can be seen that the vibrations of the power semiconductor element Q are rapidly dampened. Approximately 4 μs after the first switch SS is turned on, A and Q B The gate-source voltage V gsA and V gsB It can be seen that the values ​​are the same. Thus, according to the third embodiment of this disclosure, the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB Since the vibration can be suppressed, no difference occurs in the gate voltage at the start of switching, and the power semiconductor element Q A and Q B This can avoid increasing the voltage distribution imbalance (drain-source voltage imbalance) to the power semiconductor element Q. In the first embodiment of this disclosure, as described with reference to Figure 14, A The gate-source voltage VgsA and power semiconductor element Q B The gate-source voltage V gsB Approximately 25 μs was required for the two to become equal. In contrast, in the third embodiment of this disclosure, this time can be significantly shortened to approximately 12 μs from the start of on or off operation. This time can be further shortened by making the timing of turning on the first switch SS earlier. Therefore, the third embodiment of this disclosure has a shorter gate-source voltage V than the first embodiment. gsA and V gsB The minimum on or off period can be set to be shorter to avoid switching during vibration.

[0118] Figure 18 illustrates the operation of the first switch, the positive switch, and the negative switch in a gate drive device according to a third embodiment of the present disclosure.

[0119] In a third embodiment of the present disclosure, the first switch SS operates in the ON position during a first fixed period of time when current flows through the first wiring paths 14-A and 14-B, and in the OFF position at all other times. It also operates in the ON position during a second fixed period of time when current flows through the second wiring paths 15-A and 15-B, and in the OFF position at all other times.

[0120] The signal S controls the on / off state of the first switch SS. igs And the positive side switch SH A S is a signal that controls the on / off state. igH And the negative switch SL A S is a signal that controls the on / off state. igL The signals that control these switches are generated by the power conversion control unit 3 of the processing unit (processor) located within the power conversion device 100 shown in Figure 6. In the example shown in Figure 18, the signal S igs , signal S igH , signal S igL The switch turns on at high voltage and off at low voltage.

[0121] Power semiconductor element Q Aand Q B When it is ON, the signal S igH By setting the voltage to High, the positive switch S HA and S HB When turned on, current flows through the first wiring paths 14-A and 14-B, and the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB The voltage rises towards a positive voltage. Once the voltage has risen sufficiently, signal S igS By setting the voltage to high, the first switch SS is turned on for a short time, and the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB The vibrations of the power semiconductor element Q are rapidly dampened. A and Q B Complete the startup of the off operation. Power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB After the vibrations stopped, signal S igS By setting the voltage to low, the first switch SS is turned off, and the power semiconductor element Q A and Q B The system will then switch to continuing its ON operation.

[0122] Power semiconductor element Q A and Q B In the OFF operation, the signal S igH By setting the voltage to Low, the positive side switch SH A and SH B The signal turns off, followed by signal S igL By setting the voltage to High, the negative switch SL A and SL B When this is turned on, current flows through the second wiring paths 15-A and 15-B, and the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB The voltage decreases towards a negative voltage. Once the voltage has dropped sufficiently, signal S igSBy setting the voltage to high, the first switch SS is turned on for a short time, and the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB The vibrations of the power semiconductor element Q are rapidly dampened. A and Q B Complete the fall-off phase of the power semiconductor element Q. A and Q B The gate-source voltage V gsA and V gsB After the vibrations stopped, signal S igS By setting the voltage to low, the first switch SS is turned off, and the power semiconductor element Q A and Q B The system will then switch to continuing its off-mode operation.

[0123] According to a third embodiment of the present disclosure, in a gate drive device for a plurality of power semiconductor elements connected in series and a power converter equipped therewith, even if there are variations in the transmission time of the gate signal and the characteristics of the power semiconductor elements, it is possible to suppress oscillations in the current flowing to each gate terminal of the power semiconductor element and suppress an imbalance in the voltage distribution during switching operation for each power semiconductor element.

[0124] <Fourth Embodiment>

[0125] Figure 19 is a circuit diagram showing a gate drive device according to a fourth embodiment of the present disclosure.

[0126] A fourth embodiment of the present disclosure is a modification of the third embodiment. The third embodiment of the present disclosure is a signal S for controlling a first switch SS. igS Signal lines are required to transmit the signals. An increase in signal lines leads to increased circuit and processing complexity from the standpoint of controlling the power converter 100 configured using the gate drive device 1. A fourth embodiment of this disclosure realizes a circuit configuration that reduces the routing of signal lines for each switch.

[0127] The gate drive device 1 according to the fourth embodiment of the present disclosure comprises gate drive voltage output units 11-A and 11-B, gate wires 12-A and 12-B, a magnetic coupling unit 13, a first wiring path 14-A and 14-B, a second wiring path 15-A and 15-B, and a third wiring path 16-A1 and 16-A2.

[0128] The gate drive voltage output sections 11-A and 11-B, the gate lines 12-A and 12-B, and the magnetic coupling section 13 are as described in the first embodiment.

[0129] The positive terminal of the gate drive voltage output section 11-A is connected to the positive gate resistor R. gAon The negative terminal is connected to the negative gate resistor R. gAoff The positive gate resistor R is connected to the positive terminal of the gate drive voltage output section 11-B. gBon The negative terminal is connected to the negative gate resistor R. gBoff The connection is established.

[0130] Power semiconductor element Q A The first wiring path 14-A corresponding to the gate drive voltage output unit 11-A is the path of the current flowing from the gate drive voltage output unit 11-A to the gate line 12-A corresponding to the gate drive voltage output unit 11-A, and the positive gate resistor R gAon It is provided between and gate line 12-A. Therefore, on the first wiring path 14-A, there is a power semiconductor element Q corresponding to the first wiring path 14-A. A The positive potential output section VF of the gate drive voltage output section 11-A relative to the gate terminal. A The positive side switch SH applies or blocks the positive side potential. A And, the positive switch SH A The positive gate resistor R is connected in series with it. gAon And will be established.

[0131] Power semiconductor element Q B The first wiring path 14-B corresponding to the gate drive voltage output unit 11-B is the path of the current flowing from the gate drive voltage output unit 11-B to the gate line 12-B corresponding to the gate drive voltage output unit 11-B, and the positive gate resistor R gBonIt is provided between and gate line 12-B. Therefore, on the first wiring path 14-B, there is a power semiconductor element Q corresponding to the first wiring path 14-B. B The positive potential output section VF of the gate drive voltage output section 11-B relative to the gate terminal. B The positive side switch SH applies or blocks the positive side potential. B And, the positive switch SH B The positive gate resistor R is connected in series with it. gBon And will be established.

[0132] Power semiconductor element Q A The corresponding second wiring path 15-A is the path of the current flowing from the gate wire 12-A connected to the first wiring path 14-A toward the gate drive voltage output unit 11-A corresponding to the gate wire 12-A, and the negative gate resistor R gAoff It is provided between and gate line 12-A. Therefore, the second wiring path 15-A has a power semiconductor element Q corresponding to the second wiring path 15-A. A The negative potential output section VR of the gate drive voltage output section 11-A relative to the gate terminal. A Negative switch SL applies or cuts off a potential of 0 volts or less to the negative electrode side. A And, the negative switch SL A The negative gate resistor R is connected in series with it. gAoff And will be established.

[0133] Power semiconductor element Q B The corresponding second wiring path 15-B is the path of the current flowing from the gate wire 12-B connected to the first wiring path 14-B toward the gate drive voltage output unit 11-B corresponding to the gate wire 12-B, and the negative gate resistor R gBoff It is provided between and gate line 12-B. Therefore, the second wiring path 15-B has a power semiconductor element Q corresponding to the second wiring path 15-B. B The negative potential output section VR of the gate drive voltage output section 11-B relative to the source terminal. B Negative switch SL applies or cuts off a potential of 0 volts or less to the negative electrode side. B And, the negative switch SL BThe negative gate resistor R is connected in series with it. gBoff And will be established.

[0134] Power semiconductor element Q A The corresponding third wiring paths 16-A1 and 16-A2 attenuate the excitation current generated in the magnetic coupling section 13.

[0135] The third wiring path 16-A1 is connected to the power semiconductor element Q A The gate terminal and the positive switch SH A and the positive side potential output section VF of the gate drive voltage output section 11-A A A second switch S that opens and closes the wiring between the connection point with the positive terminal and the other terminal. pH It is equipped with a second switch S pH It consists of a p-type MOSFET and turns on when a negative voltage is applied to the gate terminal with respect to its source terminal.

[0136] The third wiring path 16-A2 is for power semiconductor element Q A The gate terminal and the negative switch SL A and the negative potential output section VR of the gate drive voltage output section 11-A A A third switch S opens and closes the wiring between the connection point with the negative terminal and the other terminal. nL It is equipped with a third switch S nL It consists of an n-type MOSFET and turns on when a positive voltage is applied to the gate terminal with respect to its source terminal.

[0137] Power semiconductor element Q A and Q B When the unit is ON, the excitation current generated in the magnetic coupling unit 13 is transmitted through the magnetic coupling unit 13 and the positive gate resistor R gAon , positive side switch SH A , and the second switch S pH It flows through this path and attenuates. Power semiconductor element Q A and Q B When the switch is turned off, the excitation current generated in the magnetic coupling unit 13 is supplied to the magnetic coupling unit 13 and the third switch S nL Negative switch SL A , and the negative gate resistor R gAoff, flows through the path and is attenuated.

[0138] Second switch S pH The gate terminal is connected to its source terminal via resistor r9, and the first comparator C omH It is connected to the output terminal of the second switch S. pH The source terminal is the positive side potential output section VF A On the positive side, the second switch S pH The drain terminal is power semiconductor element Q A It is connected to the gate terminal of the first comparator C. omH An example of this is an open-collector comparator.

[0139] First comparator C omH The inverting input terminal (- terminal) is connected to a power semiconductor element Q A The gate terminal and the negative electrode side potential output section VR A The voltage obtained by dividing the potential difference between the negative and positive terminals of the first comparator C by resistors r5 and r6 is input. omH The non-inverting input terminal (+ terminal) has a positive side potential output section VF A The positive electrode side potential and the power semiconductor element Q A The voltage obtained by dividing the potential difference between the source terminal and the input terminal by resistors r1 and r2 is input. Also, the first comparator C omH The non-inverting input terminal (+ terminal) has a fourth switch S consisting of a p-type MOSFET. pCH The drain terminal is connected to the fourth switch S pCH The source terminal has a positive side potential output section VF A The positive terminal side is connected.

[0140] A fifth switch S consisting of an n-type MOSFET nCH The gate terminal receives the signal S igL The signal S is input. As already explained, igL This is the negative switch SL of the gate drive voltage output section 11-A. A This is a signal that controls the on / off state of the fifth switch S. nCH The drain terminal has a fourth switch S pCHThe gate terminal is connected. Also, the fourth switch S pCH The source terminal has a resistor r 11 The gate terminal is connected via this. Therefore, signal S igL A fifth switch S controlled by nCH Therefore, the fourth switch S pCH It is controlled.

[0141] Third Switch S nL The gate terminal is a resistor r 10 Power semiconductor element Q via A It is connected to the source terminal, and the second comparator C omL It is connected to the output terminal of the third switch S. nL The source terminal is the negative potential output section VR. A A third switch S is placed on the negative side. nL The drain terminal is power semiconductor element Q A It is connected to the gate terminal of the second comparator C. omL An example of this is an open-collector comparator.

[0142] Second comparator C omL The inverting input terminal (- terminal) has a positive side potential output section VF A The positive electrode side and the power semiconductor element Q A The voltage obtained by dividing the potential difference between the gate terminal and the second comparator C by resistors r7 and r8 is input. omL The non-inverting input terminal (+ terminal) has a power semiconductor element Q A The source terminal and the negative potential output section VR A The voltage obtained by dividing the potential difference between the negative side and the other side by resistors r3 and r4 is input. Also, the second comparator C omL The non-inverting input terminal (+ terminal) has a sixth switch S consisting of an n-type MOSFET. nCL The drain terminal is connected to the sixth switch S nCL The source terminal has a negative potential output section VR. A The negative terminal side is connected.

[0143] Switch 6 S nCL The gate terminal receives the signal SigH The signal S is input. As already explained, igH This is the positive switch SH of the gate drive voltage output section 11-A. A This is a signal that controls the on / off state.

[0144] Figure 20 is a diagram illustrating the operation of each switch in a gate drive device according to a fourth embodiment of the present disclosure.

[0145] In a fourth embodiment of this disclosure, the second switch S pH The positive side switch is SH A The ON operation is performed while the ON operation is in progress, and then the negative switch S LA The off operation is performed before the on operation begins. Also, the third switch S nL The negative switch S LA The ON operation is performed while the ON operation is in progress, and then the positive side switch SH A The off operation is performed before the on operation begins.

[0146] In Figure 20, the second switch S pH S is a signal that controls the on / off state. pH V gs , the third switch S nL S is a signal that controls the on / off state. nL V gs This indicates that the positive switch SH A S is a signal that controls the on / off state. igH And the negative switch SL A S is a signal that controls the on / off state. igL Let's assume that signal S igH and S igL This is generated by the power conversion control unit 3, which is located in the arithmetic processing unit (processor) provided within the power conversion device 100 shown in Figure 6.

[0147] Power semiconductor element Q A and Q B When it is ON, the signal S igH Set the voltage to High and signal S igL By setting the voltage to Low, the positive side switch SH A and SH BWhen the negative switch SL is ON A and SL B When it turns off, current flows through the first wiring paths 14-A and 14-B, and the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB The voltage rises toward a positive voltage. When the potential at the connection point a between resistors r5 and r6 becomes greater than the potential at the connection point x between resistors r1 and r2, the first comparator C omH Output and power semiconductor element Q A The source terminal is short-circuited, and the second switch S pH A negative voltage is applied between the gate terminal and the source terminal. As a result, the second switch S pH When the switch is turned on, the excitation current generated in the magnetic coupling unit 13 is transmitted to the magnetic coupling unit 13 and the positive gate resistor R gAon , positive side switch SH A , and the second switch S pH It flows through this path and is attenuated.

[0148] Next, signal S igH Set the voltage to Low and signal S igL By setting the voltage to High, the fifth switch S nCH The fourth switch S is turned on. pCH When the switch turns on, the potential at the connection point a between resistors r5 and r6 becomes less than the potential at the connection point x between resistors r1 and r2, and the second switch S pH Turn it off. This fourth switch S pCH The operation of the negative switch SL A and the second switch S pH This prevents short circuits caused by both devices being turned on simultaneously.

[0149] Power semiconductor element Q A and Q B When it is in OFF mode, the signal S igH Set the voltage to Low and signal S igL By setting the voltage to High, the positive side switch SH A and SH B The switch is off and the negative switch SL A and SL BWhen it turns on, current flows through the second wiring paths 15-A and 15-B, and the power semiconductor element Q A and Q B The gate-source voltage V gsA and V gsB The voltage decreases towards a negative voltage. When the potential at the connection point b between resistors r7 and r8 becomes smaller than the potential at the connection point y between resistors r3 and r4, the short-circuited second comparator C omL Output and negative potential output section VR A The connection with the negative terminal side is opened, and the third switch S nL A positive voltage is applied between the gate terminal and the source terminal. As a result, the third switch S nL When it turns on, the excitation current generated in the magnetic coupling unit 13 is transmitted to the magnetic coupling unit 13 and the third switch S nL Negative switch SL A , and the negative gate resistor R gAoff , flows through the path and is attenuated.

[0150] Next, signal S igL Set the voltage to Low and signal S igH By setting the voltage to High, the fifth switch S nCH When the second comparator C is turned on, the potential at the connection point b between resistors r7 and r8 becomes greater than the potential at the connection point y between resistors r3 and r4, and the second comparator C omL Output and negative potential output section VR A The negative side is connected to the third switch S nL Turn it off. This sixth switch S nCL Due to the operation of the positive switch SH A and the third switch S nL This prevents short circuits caused by both devices being turned on simultaneously.

[0151] Furthermore, the first comparator C omH and the second comparator C omLThe circuit sections connected to each internal output terminal are open collector circuits. When a voltage greater than that of the non-inverting input terminal (+ terminal) is input to the inverting input terminal (- terminal), the output terminal is connected to the negative side of the comparator power supply terminal. When a voltage less than that of the non-inverting input terminal (+ terminal) is input to the inverting input terminal (- terminal), the output terminal is disconnected from the negative side of the comparator power supply terminal.

[0152] According to a fourth embodiment of this disclosure, in a gate drive device for a plurality of power semiconductor elements connected in series and a power converter equipped therewith, even if there are variations in the transmission time of the gate signal and the characteristics of the power semiconductor elements, it is possible to suppress oscillations in the current flowing to each gate terminal of the power semiconductor element and suppress imbalances in the voltage distribution during switching operation for each power semiconductor element. Furthermore, the routing of signal lines for each switch can be reduced.

[0153] Although the present disclosure has been described in detail above, it is not limited to the individual embodiments described above. These embodiments can be added, replaced, modified, partially deleted, etc., in any way that does not depart from the gist of the present disclosure or from the spirit of the present disclosure derived from the claims and their equivalents. For example, the order of operations and processes in the embodiments described above are shown as examples only and are not limited thereto. The same applies when numerical values ​​or mathematical formulas are used in the description of the embodiments described above. [Explanation of symbols]

[0154] 1. Gate drive device 11-A, 11-B Gate drive voltage output section 12-A, 12-B gate lines 13 Magnetic coupling section 14-A, 14-B First wiring path 15-A, 15-B Second wiring route 16, 16-A1, 16-A2, 16-B1, 16-B2 Third wiring path 21-A, 21-B Fourth wiring route 22-A, 22-B Fifth wiring route 23-A, 23-B Sixth wiring route 30 Magnetic material 50 Arm 60 Legs 100 Power converter 200 DC power supply 300 load Cgs A , Cgs B Input capacitance of power semiconductor devices C omH First comparator C omL Second comparator D A , D B Feedback diode D Aon , D Bon First diode, fourth diode D Aoff , D Boff Second diode Q A Q B Power semiconductor devices R Aon , R Bon First resistor R Aoff , R Boff Second resistor R gAon , R gBon Positive gate resistor R gAoff , R gBoff Negative gate resistor R S Third resistor r1, r2, r3, r4, r5, r6, r7, r8, r9, r 10 , r 11 resistance SH A SH B Positive side switch SL A , SL B Negative switch S nL The third switch S nCH The fifth switch S pCH The fourth switch S nCL The sixth switch S PH Second switch SS First Switch T1, T2 terminals VF A VF B Positive side potential output section VR A , VR B Positive side potential output section

Claims

1. A gate drive device for power semiconductor elements connected in series, A gate drive voltage output unit is provided corresponding to each of the aforementioned power semiconductor elements and outputs a gate drive voltage, A gate wire is provided corresponding to each of the gate drive voltage output sections and connected to the control terminal of the power semiconductor element corresponding to the gate drive voltage output section, A magnetic coupling unit that magnetically couples each of the gate lines to each other, A first wiring path is the path of current flowing from the gate drive voltage output unit toward the gate line corresponding to the gate drive voltage output unit, A second wiring path is a current path that flows from the gate wire connected to the first wiring path toward the gate drive voltage output unit corresponding to the gate wire, A third wiring path that attenuates the excitation current generated in the magnetic coupling section, Equipped with, The first wiring path comprises a first diode having an anode connected to a wiring connected to the positive terminal of the gate drive voltage output section and a cathode connected to a wiring connected to the magnetic coupling section. The gate drive device comprises a second diode having a cathode connected to a wiring connected to the negative terminal of the gate drive voltage output section and an anode connected to a wiring connected to the magnetic coupling section, wherein the second wiring path includes a second diode.

2. The gate drive device according to claim 1, wherein the third wiring path comprises a first resistor connected in parallel with the first diode and a second resistor connected in parallel with the second diode.

3. A gate drive device for a plurality of power semiconductor elements connected in series, A gate drive voltage output unit is provided corresponding to each of the aforementioned power semiconductor elements and outputs a gate drive voltage, A gate wire is provided corresponding to each of the gate drive voltage output sections and connected to the control terminal of the power semiconductor element corresponding to the gate drive voltage output section, A magnetic coupling unit that magnetically couples each of the gate lines to each other, A first wiring path is the path of current flowing from the gate drive voltage output unit toward the gate line corresponding to the gate drive voltage output unit, A second wiring path is a current path that flows from the gate wire connected to the first wiring path toward the gate drive voltage output unit corresponding to the gate wire, A third wiring path that attenuates the excitation current generated in the magnetic coupling section, Equipped with, The third wiring path comprises a series circuit consisting of a third resistor and a first switch that opens and closes the wiring connected to the third resistor. The series circuit is a gate drive device connected in parallel with the magnetic coupling unit to one of the two gate lines that are magnetically coupled by the magnetic coupling unit.

4. The gate drive device according to claim 3, wherein the first switch is turned on during a first fixed period of time when current flows through the first wiring path and is turned off at all other times, and the first switch is turned on during a second fixed period of time when current flows through the second wiring path and is turned off at all other times.

5. A gate drive device for a plurality of power semiconductor elements connected in series, A gate drive voltage output unit is provided corresponding to each of the aforementioned power semiconductor elements and outputs a gate drive voltage, A gate wire is provided corresponding to each of the gate drive voltage output sections and connected to the control terminal of the power semiconductor element corresponding to the gate drive voltage output section, A magnetic coupling unit that magnetically couples each of the gate lines to each other, A first wiring path is the path of current flowing from the gate drive voltage output unit toward the gate line corresponding to the gate drive voltage output unit, A second wiring path is a current path that flows from the gate wire connected to the first wiring path toward the gate drive voltage output unit corresponding to the gate wire, A third wiring path that attenuates the excitation current generated in the magnetic coupling section, Equipped with, The first wiring path includes a positive-side switch that applies or blocks the positive-side potential of the gate drive voltage output section to the control terminal of the power semiconductor element corresponding to the first wiring path, and a positive-side gate resistor connected in series with the positive-side switch. The second wiring path includes a negative switch that applies or cuts off a potential of 0 volts or less, which is the negative electrode potential of the gate drive voltage output section, to the control terminal of the power semiconductor element corresponding to the second wiring path, and a negative gate resistor connected in series with the negative switch. Each of the gate drive voltage output units comprises a positive potential output unit that outputs the positive potential of the gate drive voltage, and a negative potential output unit connected in series with the positive potential output unit that outputs the negative potential of the gate drive voltage. The third wiring path described above is: A second switch opens and closes the wiring between the control terminal of the power semiconductor element and the connection point between the positive switch and the positive electrode side of the positive potential output section. A gate drive device comprising a control terminal of the power semiconductor element and a third switch that opens and closes the wiring between the connection point between the negative switch and the negative electrode side of the negative potential output section.

6. The second switch turns on while the positive switch is in the ON position, and then turns off before the negative switch starts turning on. The gate drive device according to claim 5, wherein the third switch turns on while the negative switch is in the ON position, and then turns off before the positive switch starts turning on.

7. The gate drive device according to claim 5, wherein the current outflow terminal of the power semiconductor element is the source terminal, the emitter terminal, or the cathode terminal.

8. A gate drive device for power semiconductor elements connected in series, A gate drive voltage output unit is provided corresponding to each of the aforementioned power semiconductor elements and outputs a gate drive voltage, A gate wire is provided corresponding to each of the gate drive voltage output sections and connected to the control terminal of the power semiconductor element corresponding to the gate drive voltage output section, A magnetic coupling unit that magnetically couples each of the gate lines to each other, A fourth wiring path which is the path of current flowing from the gate drive voltage output unit toward the gate wire corresponding to the gate drive voltage output unit, A fifth wiring path is a current path that flows from the control terminal of the power semiconductor element to which the gate wire is connected toward the gate drive voltage output section corresponding to the power semiconductor element, A sixth wiring path that attenuates the excitation current generated in the magnetic coupling section, A gate drive device equipped with the following features.

9. The fourth wiring path comprises a fourth diode having an anode connected to a wiring connected to the positive terminal of the gate drive voltage output section and a cathode connected to a wiring connected to the magnetic coupling section. The gate drive device according to claim 8, wherein the sixth wiring path comprises a fourth resistor connected in parallel with the fourth diode.

10. The gate drive device according to any one of claims 1 to 9, wherein the control terminal of the power semiconductor element is a gate terminal or a base terminal.

11. A gate drive device according to any one of claims 1 to 9, A power conversion circuit unit having an arm on which a plurality of the aforementioned power semiconductor elements are connected in series, and which performs power conversion operations in accordance with the on / off operation of the power semiconductor elements, A power conversion control unit that controls the power conversion operation of the power conversion circuit section, A power conversion device equipped with the following features.

12. The power conversion device according to claim 11, wherein the control terminal of the power semiconductor element is a gate terminal or a base terminal.

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