Chamber configuration for controlled deposition

A semiconductor processing chamber with a substrate support and modified showerhead design addresses uniformity and edge control issues, improving film deposition quality and reducing contamination in semiconductor manufacturing.

JP7867963B2Active Publication Date: 2026-06-01APPLIED MATERIALS INC

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
APPLIED MATERIALS INC
Filing Date
2020-08-12
Publication Date
2026-06-01

AI Technical Summary

Technical Problem

Conventional semiconductor processing technologies face challenges in achieving uniformity and control over film deposition, particularly at the edges and bevels of substrates, leading to issues such as film delamination and contamination during the formation of intricate material layers in stacked memories like vertical or 3D NAND structures.

Method used

The use of a semiconductor processing chamber with a substrate support featuring a recessed pocket and radial outer walls, along with a modified showerhead design that includes adjustable openings and plasma control mechanisms, to enhance deposition uniformity and minimize edge deposition.

Benefits of technology

This approach improves deposition uniformity across the substrate, reduces film delamination, and limits contamination, thereby enhancing the quality and yield of semiconductor devices.

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Abstract

An exemplary semiconductor processing chamber can include a showerhead. The chamber can also include a substrate support characterized by a first surface facing the showerhead. The first surface can be configured to support a semiconductor substrate. The substrate support can define a recessed pocket centrally disposed within the first surface. The recessed pocket can be defined by a radially outer wall characterized by a height from the first surface within the recessed pocket that is greater than or about 150% of a thickness of the semiconductor substrate.
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Description

Technical Field

[0001] Cross - Reference to Related Applications This application claims the benefit of priority of U.S. Provisional Patent Application No. 62 / 886,078, filed Aug. 13, 2019, which is hereby incorporated by reference in its entirety for all purposes.

[0002] This technology relates to semiconductor processes and chamber components. More particularly, this technology relates to modified components for controlling material deposition.

Background Art

[0003] Integrated circuits are enabled by a process that creates intricately patterned material layers on a substrate surface. Creating patterned material on a substrate requires a controlled method of formation and removal of the exposed material. Stacked memories, such as vertical or 3D NAND, can include the formation of a series of alternating dielectric layers through which a number of memory holes or apertures can be etched. The formation process can include many deposited layers. Thickness uniformity across the deposited film can affect subsequent operations. Additionally, the characteristics of edge deposition can affect film peeling and contamination.

Summary of the Invention

[0004] Therefore, there is a need for improved systems and methods that can be used to produce high - quality devices and structures. These and other needs are addressed by the present technology.

[0005] An exemplary semiconductor processing chamber may include a showerhead. The chamber may also include a substrate support characterized by a first surface facing the showerhead. The first surface may be configured to support a semiconductor substrate. The substrate support may define a centrally located recessed pocket within the first surface. The recessed pocket may be defined by radial outer walls characterized by a height from the first surface within the recessed pocket that is greater than or approximately 150% of the thickness of the semiconductor substrate.

[0006] In some embodiments, the radial outer wall can be characterized by a height from the first surface within the recessed pocket that is less than or about 500% of the thickness of the semiconductor substrate. The radial outer wall can be characterized by an angle of less than or about 90° with respect to the first surface of the substrate support. The radial outer wall can be characterized by an angle of greater than or about 60° with respect to the first surface of the substrate support. The radial outer wall can be characterized by a radius that is less than or about 102% of the radius of the semiconductor substrate. The radial outer wall can be formed by a substrate support or annular member extending around the substrate support. The annular member can be configured to extend radially inward beyond the outer radius of the semiconductor substrate. The annular member can extend inward for a distance of less than or about 2% of the outer radius of the semiconductor substrate. The showerhead can define a plurality of openings penetrating the showerhead, and the showerhead can be configured to act as a plasma generating electrode. A subset of the multiple openings may feature a cylindrical shape passing through the showerhead. The subset of the multiple openings may feature at least partially a flare extending to a first surface of the showerhead, the first surface of the showerhead may face a first surface of the substrate support.

[0007] Some embodiments of this technology also include methods for controlling deposition uniformity. The method may include depositing one or more layers of material on a semiconductor substrate in a semiconductor processing chamber. The semiconductor processing chamber may include a showerhead and a substrate support. The showerhead may define a plurality of openings passing through it, and at least a subset of the openings may feature a cylindrical shape passing through the showerhead. The method may include identifying regions of film thickness non-uniformity in the layers of one or more materials. The method may include generating a modified showerhead that defines a plurality of openings passing through it. Generating may include adjusting the openings of the showerhead related to deposition in regions of non-uniformity on the semiconductor substrate. The method may include depositing one or more layers of material on a semiconductor substrate in a semiconductor processing chamber containing the modified showerhead. The layers of one or more materials may feature increased uniformity with respect to the identified regions of non-uniformity.

[0008] In some embodiments, the heterogeneous region may be characterized by a reduced film thickness. Adjusting the openings in the showerhead may include increasing the opening density at the radius of the showerhead related to deposition in the heterogeneous region on the semiconductor substrate. Increasing the opening density at the radius of the showerhead related to deposition in the heterogeneous region on the semiconductor substrate may include at least doubling the number of openings around the radius of the showerhead. The heterogeneous region may be characterized by a reduced film thickness. Adjusting the openings in the showerhead may include replacing openings characterized by a cylindrical shape with openings characterized by flares extending to a first surface of the showerhead. The first surface of the showerhead may be configured to face a first surface of the substrate support at the radius of the showerhead related to deposition in the heterogeneous region on the semiconductor substrate. The heterogeneous region within the film thickness of one or more layers of material may be located close to the edge of the semiconductor substrate.

[0009] Some embodiments of this technology can enclose a semiconductor processing chamber. The chamber may include a showerhead defining a plurality of openings through which the showerhead passes. At least a subset of the openings may feature a cylindrical shape passing through the showerhead. The chamber may also include a substrate support featuring a first surface facing the showerhead. The first surface may be configured to support a semiconductor substrate. The substrate support may define a centrally located recessed pocket within the first surface. The recessed pocket may be defined by radially outer wall surfaces of the substrate support characterized by an angle of less than 90° or about 90° with respect to the first surface.

[0010] In some embodiments, the radial outer wall surface may be characterized at an angle greater than or about 60° with respect to the first surface of the substrate support. The radial outer wall surface may be characterized by a height from the first surface within the recessed pocket that is greater than or about 150% of the thickness of the semiconductor substrate. The radial outer wall surface may be characterized by a height from the first surface within the recessed pocket that is less than or about 500% of the thickness of the semiconductor substrate. A subset of the openings may be characterized at least partially by flares extending to the first surface of the showerhead, the first surface of the showerhead may face the first surface of the substrate support.

[0011] Such technologies can offer many advantages over conventional systems and technologies. For example, the system can improve delamination and contamination production, and can limit or minimize deposition on the edge regions of the substrate. In addition, the operation of embodiments of this technology can produce parts that can improve deposition uniformity compared to conventional systems. These and other embodiments, along with many of the advantages and characteristics, are described in more detail below with the accompanying drawings.

[0012] A further understanding of the nature and advantages of the disclosed technology can be achieved by referring to the remainder of the specification and drawings. [Brief explanation of the drawing]

[0013] [Figure 1] This is a schematic cross-sectional view of an exemplary processing chamber according to several embodiments of this technology. [Figure 2] This is a schematic cross-sectional view of an exemplary processing chamber according to several embodiments of this technology. [Figure 3A] This is a schematic cross-sectional view of an exemplary substrate support according to several embodiments of this technology. [Figure 3B] This is a schematic cross-sectional view of an exemplary substrate support according to several embodiments of this technology. [Figure 3C] This is a schematic cross-sectional view of an exemplary substrate support according to several embodiments of this technology. [Figure 4] This is a schematic cross-sectional view of an exemplary shower head according to several embodiments of this technology. [Figure 5] This figure shows exemplary operation of a method for controlling deposition uniformity according to several embodiments of this technology. [Modes for carrying out the invention]

[0014] Some of the figures are included as schematic diagrams. Please understand that the diagrams are for illustrative purposes only and should not be considered to be to scale unless specifically stated to be to scale. In addition, as schematic diagrams, they are provided to aid interpretation and may not include all aspects and information compared to a real-world representative, and may contain exaggerated material for illustrative purposes.

[0015] In the attached diagram, similar parts and / or mechanisms may have the same reference label. Furthermore, different parts of the same type can be distinguished by placing the reference label after a letter that distinguishes similar parts. When a first reference label is used in the specification, the description may apply to any one of the similar parts having the same first reference label, regardless of the letter.

[0016] During 3D NAND processing, the overlapping of placeholder layers and dielectric materials can form an internal electrode dielectric or internal polydielectric (IPD) layer, which, as a few examples, may include alternating layers of oxide and nitride or oxide and polycrystalline silicon. These placeholder layers can have various operations performed to position the structure before the material is completely removed and replaced with metal. IPD layers are often formed in superimposed on a conductive layer, such as polysilicon. Once the memory holes are formed, the openings can extend through all the alternating layers of material before accessing the polysilicon or other material substrate. Subsequent processing can form a stepped structure for the contacts and also excavate the placeholder material laterally.

[0017] The process of forming an IPD layer can involve depositing a large number of alternating layers of material, which may have tens or hundreds of layers. Among other challenges in these film formations, deposition uniformity can affect several operations. For example, uneven thickness within a layer can migrate between layers through the stack, potentially affecting downstream processes. In addition, edge uniformity becomes increasingly important as the electronic structure is further extended on the substrate. Another challenge in deposition on the edges of the substrate may relate to the heater or substrate support on which the substrate or wafer sits. The radial or transverse edges of the substrate may feature bevels or non-vertical walls. The characteristics of the substrate support can affect the plasma or flow properties at these walls of the substrate, which can affect deposition.

[0018] Conventional technologies have addressed uniformity and control during the formation process, which can lead to non-uniformity across the substrate. These non-uniformities can limit the additional usable area, as manufacturers attempt to extend across the substrate into usable areas. In addition, some conventional processing chamber substrate supports have poor control over edge deposition, potentially leading to film delamination on the substrate's bevels and contamination in downstream processing. This technology overcomes these problems by utilizing a heater or substrate support that creates pockets in which the substrate sits, allowing for control over film formation at the substrate's edges and bevel regions. Furthermore, some embodiments of this technology incorporate conical openings or high opening densities at specific locations through a showerhead, related to areas on the substrate where film thickness non-uniformity may occur.

[0019] Figure 1 shows a cross-sectional view of an exemplary processing chamber system 100 according to several embodiments of the present technology. The drawing can outline a system that incorporates one or more aspects of the present technology and / or can perform one or more operations according to embodiments of the present technology. While the chamber 100 can be used to form a film layer according to several embodiments of the present technology, it should be understood that the method can be similarly performed in any chamber in which film formation may take place. The processing chamber 100 may comprise a chamber body 102, a substrate support 104 positioned inside the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and surrounding the substrate support 104 within a processing capacity 120. The substrate 103 can be provided in the processing capacity 120 through an opening 126 that can conventionally be sealed for processing using a slit valve or door. The substrate 103 can be seated on the surface 105 of the substrate support during processing. The substrate support 104 is rotatable along an axis 147, indicated by arrow 145, in which the shaft 144 of the substrate support 104 can be positioned. Alternatively, the substrate support 104 can be lifted to rotate as needed during the deposition process.

[0020] The plasma profile modulator 111 can be disposed within the processing chamber 100 to control plasma distribution across the substrate 103 disposed on the substrate support 104. The plasma profile modulator 111 can include a first electrode 108 that can be disposed adjacent to the chamber body 102 and can separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 can be part of the lid assembly 106 or can be a separate sidewall electrode. The first electrode 108 can be an annular or ring-shaped member or can be a ring electrode. The first electrode 108 can be a continuous loop around the peripheral surface of the processing chamber 100 surrounding the processing volume 120 or, if desired, can be discontinuous at selected positions. The first electrode 108 can also be a perforated electrode such as a perforated ring or mesh electrode or can be a plate electrode such as, for example, a secondary gas distribution device.

[0021] One or more insulators 110a, 110b, which can be a ceramic or metal oxide, such as a dielectric material such as aluminum oxide and / or aluminum nitride, can contact the first electrode 108 and can electrically and thermally separate the first electrode 108 from the gas distribution device 112 and the chamber body 102. The gas distribution device 112 can define apertures 118 for distributing the processing precursor within the processing volume 120. The gas distribution device 112 can be coupled to a first power source 142 such as an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any power source that can be coupled to the processing chamber. In some embodiments, the first power source 142 can be an RF power source.

[0022] The gas distributor 112 may be a conductive or non-conductive gas distributor. The gas distributor 112 can also be made of conductive and non-conductive components. For example, the body of the gas distributor 112 may be conductive, and the faceplate of the gas distributor 112 may be non-conductive. The gas distributor 112 can be powered by a first power source 142, as shown in Figure 1, or, in some embodiments, the gas distributor 112 can be connected to ground.

[0023] The first electrode 108 can be coupled to a first tuning circuit 128 that can control the ground path of the processing chamber 100. The first tuning circuit 128 may comprise a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 is or may comprise a variable capacitor or other circuit element. The first tuning circuit 128 is or may comprise one or more inductors 132. The first tuning circuit 128 may comprise one or more inductors 132. The first tuning circuit 128 may comprise any circuit that allows a variable or controllable impedance of the plasma state to be present within the processing capacitance 120 during processing. In some embodiments as illustrated, the first tuning circuit 128 may comprise a first circuit leg and a second circuit leg coupled in parallel between ground and the first electronic sensor 130. The first circuit leg may comprise a first inductor 132A. The second circuit leg may include a second inductor 132B coupled in series with the first electronic controller 134. The second inductor 132B may be placed between the node connecting both the first and second circuit legs to the first electronic controller 134 and the first electronic sensor 130. The first electronic sensor 130 may be a voltage or current sensor and may be coupled to the first electronic controller 134, which can provide a degree of closed-loop control of the plasma state inside the processing capacity 120.

[0024] The second electrode 122 can be coupled to the substrate support 104. The second electrode 122 can be embedded within the substrate support 104 or coupled to the surface of the substrate support 104. The second electrode 122 may be a plate, a perforated plate, a mesh, a wire screen, or any other distributed arrangement of conductive elements. The second electrode 122 may be a tuning electrode and can be coupled to the second tuning circuit 136 by a conduit 146, e.g., a cable having a selected resistance, such as 50 ohms, disposed within the shaft 144 of the substrate support 104. The second tuning circuit 136 can have a second electronic sensor 138 and a second electronic controller 140, which may be a second variable capacitor. The second electronic sensor 138 may be a voltage or current sensor and can be coupled to the second electronic controller 140 to provide further control over the plasma state within the processing volume 120.

[0025] A third electrode 124, which may be a bias electrode and / or an electrostatic chuck electrode, can be coupled to the substrate support 104. The third electrode can be coupled to a second power source 150 through a filter 148, which may be an impedance matching circuit. The second power source 150 may be DC power, pulsed DC power, RF bias power, a pulsed RF source or bias power, or a combination of these or other power sources. In these embodiments, the second power source 150 may be RF bias power.

[0026] The lid assembly 106 and substrate support 104 shown in Figure 1 can be used in any processing chamber for plasma or heat treatment. During operation, the processing chamber 100 can perform real-time control of the plasma state within the processing capacity 120. The substrate 103 can be placed on the substrate support 104, and process gas can be flowed through the lid assembly 106 using the inlet 114 according to any desired flow plan. The gas can exit the processing chamber 100 through the outlet 152. Power can be coupled with a gas distributor 112 to establish plasma within the processing capacity 120. In some embodiments, the substrate can be exposed to an electrical bias using a third electrode 124.

[0027] When energizing the plasma within the processing capacity 120, a potential difference can be established between the plasma and the first electrode 108. A potential difference can also be established between the plasma and the second electrode 122. Electronic controllers 134, 140 can then be used to adjust the flow characteristics of the ground path, represented by two tuning circuits 128, 136. Setting points can be carried to the first tuning circuit 128 and the second tuning circuit 136 to provide independent control of the deposition rate and plasma density uniformity from the center to the edge. In embodiments where both electronic controllers are variable capacitors, the electronic sensors can adjust the variable capacitors to maximize the deposition rate and independently minimize thickness non-uniformity.

[0028] Each tuning circuit 128, 136 may have a variable impedance that can be adjusted using their respective electronic controllers 134, 140. If the electronic controllers 134, 140 are variable capacitors, the capacitance range of each variable capacitor and the inductances of the first inductor 132A and the second inductor 132B can be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma, having a minimum within the capacitance range of each variable capacitor. Thus, when the capacitance of the first electronic controller 134 is at its minimum or maximum, the impedance of the first tuning circuit 128 is high, which may lead to a plasma shape with minimal air or lateral coverage over the substrate support. As the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first tuning circuit 128, the air coverage of the plasma can grow to its maximum, effectively covering the entire operating area of ​​the substrate support 104. When the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may contract away from the chamber wall, potentially reducing the air coverage of the substrate support. The second electronic controller 140 has a similar effect, and the air coverage of the plasma on the substrate support can be increased or decreased when the capacitance of the second electronic controller 140 can be changed.

[0029] Electronic sensors 130 and 138 can be used to tune their respective circuits 128 and 136 within a closed loop. Current or voltage setting points, depending on the type of sensor used, can be placed within each sensor, and the sensors may be equipped with control software that determines adjustments to their respective electronic controllers 134 and 140 to minimize deviations from the setting points. Thus, the plasma shape can be selectively and dynamically controlled during processing. The preceding discussion is based on electronic controllers 134 and 140, which may be variable capacitors, and it should be understood that tuning circuits 128 and 136 can have adjustable impedance using any electronic component with adjustable characteristics.

[0030] Figure 2 shows a schematic cross-sectional view of an exemplary processing chamber 200 according to several embodiments of the present technology. The chamber 200 may include any of the embodiments of the chamber system 100 described above and may provide a further basis for the embodiments of the present technology described below. The chamber 200 may include a lid assembly 20 which includes one or more mechanisms, components, or features described above. For example, the lid assembly may include a gas distributor 212 which includes a blocker plate. In some embodiments, the system may also include an additional shower head 215 which can operate as a plasma generating electrode, either alone or in combination with other lid assembly components. As further described below, the gas distributor or blocker plate may operate to produce a more uniform distribution of a precursor within the chamber, and the shower head 215 may include one or more mechanisms configured to modify precursor distribution or plasma generation. The exemplary shower head 215 may feature a first surface 217 facing a substrate support which can at least partially define a processing area within the chamber 200.

[0031] Chamber 200 may also include a substrate support 220 or heater capable of holding the substrate 225 during film formation or other processing. The substrate support 220 may include one or more incorporated heating elements, one or more incorporated cooling elements, one or more incorporated plasma generating elements, and any number of other components or materials described above or that can be incorporated into the substrate support 200 to facilitate operation or processing within Chamber 200. Similar to the showerhead 215, the substrate support 220 may feature a first surface 222 facing the showerhead 215, which can define a processing area from, for example, above, but can at least partially define a processing area within Chamber 200 from below, etc. As further described below, the substrate support 220 may define a pocket 230 within the first surface 222 of the substrate support 220. The substrate 225 can be seated in this pocket during processing.

[0032] The features of pocket 230 affect film deposition and, as previously described, can contribute to film delamination and contamination. Figures 3A–3C show schematic cross-sectional views of exemplary substrate support portions according to several embodiments of the art. The substrate support may include any features, components, or configurations as previously described. The substrate support may have features that control or limit film deposition on the far edge or beveled regions of the substrate. The substrate may feature regions on which processing takes place. For example, the substrate may have intermediate and edge regions where processing may take place. Outside the usable area is a far edge region that may extend to the lateral edge, which may feature beveled or non-vertical walls based on substrate formation or development. The interface between the edge and the far edge region may depend on the manufacturer's preference but may be limited to a percentage of the total substrate diameter. As a non-limiting example, in a 300 mm wafer or substrate, the far edge region that can be scrapped after dicing may be as small as 1% of the wafer diameter, such as 3 mm. As manufacturers strive to increase the usable area on the substrate, this far-edge region can be reduced to less than 0.5% of the substrate diameter. By reducing the far-edge region on the substrate in this way, the usable area for processing increases by 1% to 2% or more, which, when included in the number of substrates processed each year, can represent a substantial increase in revenue.

[0033] The angle of radial or transverse edges due to the substrate's geometric shape can affect deposition uniformity and film stability. This can further be determined based on the interaction between the substrate edge and the substrate support. For example, a planar substrate support allows the generated plasma to extend around the substrate edge, potentially increasing deposition at angles and exacerbating film delamination problems. Plasma erosion at the substrate edge can be controlled by creating pockets in which the substrate can be seated.

[0034] As shown in Figure 3A, the substrate support 305 may feature a first surface 307 on which a substrate 310 can be seated. Within the first surface 307, a pocket 315 may be defined, which may be recessed within the first surface 307 as shown, or formed around the first surface 307 as further described below. The pocket 315 may be centrally located within the first surface 307 and defined by a radial outer wall surface 320. While the disclosure always discusses curved shapes, such as those featuring a radius or diameter, it should be understood that other geometric configurations, including linear components or configurations, are also included in the Art.

[0035] The radial outer wall surface 320 can be characterized by several features that may affect plasma generation and the deposition characteristics of the technology. By defining the pocket and / or radial outer wall surface according to embodiments of the technology, it is possible to control film deposition at oblique angles while limiting the impact on edge deposition that may affect device manufacturing. For example, the radial outer wall surface 320 can be characterized by a radius from the central axis through the substrate support 305 and / or substrate 310, the radial outer wall surface 320 can be characterized by an angle of inclination, and the radial outer wall surface 320 can be characterized by a height from the first surface within the recessed pocket 315. One or more of these features can be adjusted to affect the deposition characteristics.

[0036] As noted, the radial outer wall surface 320 may be characterized by a height from the first surface within the recessed pocket 315, indicated as dimension A in Figure 3A. In some embodiments, this height may be relative to the thickness of the substrate 310 or wafer being processed. For example, before processing, the substrate 310 is characterized by a thickness T as shown, and in some embodiments, the dimension A, or height, of the radial outer wall surface 320 may be greater than or approximately the thickness T of the substrate 310. If dimension A is less than or equal to the thickness T of the substrate being processed, deposition at the radial edges of the substrate, such as bevels, can cause film delamination and contamination problems, as previously described. Without being bound by any particular logic, this may relate to plasma erosion or access around bevels during processing.

[0037] As the height of the radial outer wall surface 320 increases beyond the thickness T of the substrate being processed, angled deposition and the problems caused by this can be controlled or limited. Therefore, in some embodiments, the radial outer wall surface is characterized by a height from the first surface within a recessed pocket, such as dimension A shown, greater than or about 120% of the thickness of the semiconductor substrate, greater than or about 130% of the thickness, greater than or about 150% of the thickness, greater than or about 175% of the thickness, greater than or about 200% of the thickness, greater than or about 225% of the thickness, greater than or about 250% of the thickness, greater than or about 275% of the thickness, greater than or about 300% of the thickness, greater than or about 325% of the thickness. It can be characterized by a height of approximately 325%, greater than or approximately 350% of the thickness, greater than or approximately 375% of the thickness, greater than or approximately 400% of the thickness, greater than or approximately 425% of the thickness, greater than or approximately 450% of the thickness, greater than or approximately 475% of the thickness, greater than or approximately 500% of the thickness, greater than or approximately 525% of the thickness, greater than or approximately 550% of the thickness, greater than or approximately 575% of the thickness, greater than or approximately 600% of the thickness, and a height greater than or equal to these.

[0038] As the height of the radial outer wall increases, the effect on film formation proceeds inward, affecting the edge region of the substrate and potentially reducing the usable area for manufacturing. Therefore, in some embodiments, the radial outer wall surface may be characterized by a height from the first surface in the recessed pocket, such as dimension A shown, which is less than or about 750% of the thickness of the semiconductor substrate, less than or about 725% of the thickness, less than or about 700% of the thickness, less than or about 675% of the thickness, less than or about 675% of the thickness, less than or about 650% of the thickness, less than or about 625% of the thickness, less than or about 600% of the thickness, less than or about 575% of the thickness, less than or about 550% of the thickness, less than or about 525% of the thickness, less than or about 500% of the thickness, or a height smaller than that. By maintaining the height of the radial outer wall surface within the range, film peeling can be reduced, and the impact on the feasible edge area can be limited or prevented.

[0039] The angle or inclination of the radial outer wall surface can also affect deposition at the bevel. Furthermore, without being bound by any particular logic, as the amount of inclination increases from the substrate, the gap between the substrate bevel and the radial outer wall surface increases, potentially increasing plasma generation around the substrate bevel. Therefore, in some embodiments, the angle B of the side wall inclination can be maintained at or greater than 60°, at or greater than 65°, at or greater than 70°, at or greater than 75°, at or greater than 80°, at or greater than 85°, at or greater than 90°, or greater than or greater than these angles. Also, as the angle continues to increase, the decrease during deposition can progress from the far edge region to within the edge region, potentially affecting device manufacturing. Therefore, in some embodiments, the angle B of the side wall bevel can be kept less than or about 120°, less than or about 115°, less than or about 110°, less than or about 105°, less than or about 100°, less than or about 95°, less than or about 90°, or kept smaller than these. By maintaining the radial outer wall angle within this range, film peeling can also be reduced, limiting or preventing impact on the feasible edge area.

[0040] The distance over which the radial outer wall extends beyond the dimensions of the substrate can also affect deposition at bevels. Furthermore, without being bound by any particular logic, as shown as dimension C in Figure 3A, increasing the gap between the substrate and the radial outer wall can lead to plasma generation around bevels, potentially increasing deposition and film effects. Therefore, in some embodiments, the radial outer wall surface may feature a radial or transverse dimension that is less than or about 110% of the radius of the substrate, less than or about 109% of the radius of the substrate, less than or about 108% of the radius of the substrate, less than or about 107% of the radius of the substrate, less than or about 106% of the radius of the substrate, less than or about 105% of the radius of the substrate, less than or about 104% of the radius of the substrate, less than or about 103% of the radius of the substrate, less than or about 102% of the radius of the substrate, less than or about 101% of the radius of the substrate, or a radius smaller than that. However, to limit the interaction between the substrate and the radial outer wall during substrate transport and retrieval, the radial outer wall may feature radial or transverse dimensions that are at least approximately 100.1% of the substrate radius. By adjusting the height, angle, and gap distance of the radial outer wall, deposition around the bevel and far edge regions of the substrate can be controlled to limit or prevent delamination or contamination problems.

[0041] In some embodiments, the radial outer wall surface can be integrally formed as part of the substrate support, as shown in Figure 3A. In some embodiments, additional components can be incorporated into the substrate support to form the radial outer wall surface. For example, as shown in Figure 3B, an edge ring 330 or ring band can be combined with the substrate support 335 to fabricate a pocket and define the radial outer wall surface around the substrate. The edge ring may be made of the same or different material as the substrate support and can be bonded to the substrate support by any means.

[0042] In some embodiments, the radial outer wall surface may be a component that protects the bevel and / or far edge regions of the substrate. As shown in Figure 3C, the annular member 340 may be on the outer region of the substrate support 345. As illustrated, a portion of the member may extend radially inward beyond the outer radius of the semiconductor substrate 310. Such a configuration can be made possible by translating the substrate support. For example, a planar or accessible substrate support can receive the substrate. The substrate support can then be lifted or raised and engage with the annular member 340 around the outer region of the substrate support. The annular member 340 may extend at least partially on the substrate 310 and can limit or prevent deposition in bevel or far edge regions.

[0043] For example, the annular member can extend inward by a distance less than or about 5% of the outer radius of the semiconductor substrate, less than or about 4.5% of the outer radius, less than or about 4.0% of the outer radius, less than or about 3.5% of the outer radius, less than or about 3.0% of the outer radius, less than or about 2.5% of the outer radius, less than or about 2.0% of the outer radius, less than or about 1.9% of the outer radius, less than or about 1.8% of the outer radius, less than or about 1.7% of the outer radius, less than or about 1.6% of the outer radius, less than or about 1.5% of the outer radius, less than or about 1.4% of the outer radius. It can stretch to 4%, less than or about 1.3% of the outer radius, less than or about 1.2% of the outer radius, less than or about 1.1% of the outer radius, less than or about 1.0% of the outer radius, less than or about 0.9% of the outer radius, less than or about 0.8% of the outer radius, less than or about 0.7% of the outer radius, less than or about 0.6% of the outer radius, less than or about 0.5% of the outer radius, less than or about 0.4% of the outer radius, less than or about 0.3% of the outer radius, less than or about 0.2% of the outer radius, less than or about 0.1% of the outer radius, or less than or about 0.1% of the outer radius.

[0044] Deposition can be controlled in one or more ways by a showerhead, such as the showerhead 215 described previously. While conventional showerheads may include similar openings across the device or maintain a consistent pattern, the present technology may include regulated openings or patterns in some embodiments. Figure 4 shows a schematic cross-sectional view of an exemplary showerhead 400 according to some embodiments of the present technology. The showerhead 400 may include any mechanism or feature of any of the distribution devices described previously and may operate as a showerhead or gas distribution device as described above, including as a plasma generating component. The showerhead 400 may be a non-limiting example of a showerhead according to some embodiments of the present technology, and may include a plurality of openings 405. The openings may be of any shape, but in some embodiments, the openings may feature a first set of openings 410a, which may be cylindrical openings. The openings may further feature a second set of openings 410b, which may be openings characterized by a flared portion 414 or a cylindrical portion 412 that extends at least partially through the shower head and then moves in parallel with a first surface of the shower head, such as a surface facing the substrate support.

[0045] The shape of the openings can influence ion generation during the plasma deposition process, which in turn can affect the amount of deposition at locations associated with a particular opening. For example, while the specific dimensions of an opening can affect deposition, an opening 410b may, in some embodiments, provide an amount of deposition that is at least approximately twice that of an opening 410a in similar circumstances, and may provide an amount of deposition that is at least approximately three times that of an opening 410a in similar circumstances. Without being bound by any particular logic, deposition can be associated with increased ionization occurring through openings 410b. In addition, in some embodiments, the opening density can be increased or decreased in certain regions, such as by increasing or decreasing the number of openings 410a and / or 410b in a showerhead region associated with deposition heterogeneity. Such specific showerhead formations may relate to an inspection process to determine a suitable opening or showerhead configuration.

[0046] Figure 5 shows exemplary operation of Method 500 for controlling deposition uniformity according to several embodiments of the present technology. The method can be carried out in one or more chambers, which may include any of the chambers described above and may include any of the previously described components. The method may include utilizing a specific showerhead in the process after identifying a film uniformity problem. Method 500 may include several optional operations, which may or may not be specifically associated with some embodiments of the method according to the present technology. For example, many operations are described to provide a broader range of structural formations but are not critical to the technology or can be carried out by alternative methods as can be readily understood.

[0047] Method 500 may include one or more test operations to identify film development problems, such as thickness uniformity problems, including thickness variations across the substrate. For example, Method 500 may optionally include a test operation in which a layer of one or more materials can be deposited on a semiconductor substrate in a semiconductor processing chamber in an optional operation 505. The showerhead used during the operation may include any number of opening profiles and distributions, but at least one subset of openings may feature a cylindrical shape passing through the showerhead. In an optional operation 510, regions of non-uniformity within the film thickness of the layer of one or more materials can be identified. Identification may include in-situ or out-of-situ identification, and the non-uniformity may include increased or decreased thickness relative to one or more other regions of the substrate.

[0048] Operation 515 can manufacture a modified showerhead having a modified opening profile for the shower used during a previous test operation. For example, manufacturing the showerhead may involve modifying the openings of the showerhead associated with deposition in areas of heterogeneity on a semiconductor substrate. The modified showerhead may be installed in a processing chamber which is or includes any aspect, part, or feature of any of the chambers or parts described above. Operation 520 may carry out subsequent deposition of material on a subsequent substrate, for example, by depositing one or more layers of material on the semiconductor substrate in the processing chamber incorporating the modified showerhead. The one or more layers of material may feature increased film thickness or improved uniformity with respect to previously identified areas of heterogeneity.

[0049] The identification and manufacturing processes can include many adjustments, depending on whether the objective is to increase or decrease deposition within localized areas. For example, in one non-limiting scenario, areas of heterogeneity may be characterized by reduced film thickness, which can occur in some deposition processes at locations such as the center and edge regions of the substrate. Inspection can identify areas having these problems, which can include many geometric shapes, including localized areas and annular regions. Adjusting the openings for the modified showerhead in this embodiment may include increasing the opening density between two radii of the showerhead, such as annular patterns, at radial locations of the showerhead, or as heterogeneous patterns associated with deposition in areas of heterogeneity on the substrate.

[0050] For example, if the thickness can be characterized by a reduced annular area in a specific radial dimension around the showerhead, the number of openings, such as the number of openings 410a, can be increased by two, three, or more times. In addition, openings in area or cross-section can be replaced whole or partially with openings having a profile such as 410b, which can be associated with the increased deposition. Thus, a particular deposition process can be carried out with increased uniformity across the surface of the substrate.

[0051] By utilizing the methods and components according to embodiments of this technology, material deposition or formation can be improved. This allows for increased uniformity of film thickness across the substrate and similarly enables control over positional formation across the substrate, including limiting or preventing deposition at the far edges and / or beveled regions of the substrate. These improvements can reduce film delamination on the substrate and limit downstream contamination.

[0052] In the preceding description, many details were included to provide an understanding of the various embodiments of the present technology for illustrative purposes. However, it will be obvious to those skilled in the art that certain embodiments can be made without some of these details, or with additional details.

[0053] While several embodiments have been disclosed, it will be understood by those skilled in the art that various modifications, alternative configurations, and equivalents can be used without departing from the spirit of the embodiments. In addition, many well-known processes and elements have not been described in order to avoid unnecessarily complicating the art. Therefore, the above description should not be construed as limiting the scope of the art. Furthermore, while methods or processes may be described sequentially or in steps, it should be understood that the operations can be performed simultaneously or in different orders other than those listed.

[0054] While a range of values ​​is provided, it should be understood that each intervening value between the upper and lower limits of that range is also specifically disclosed for the smallest fragment of the lower limit unit, unless the content explicitly indicates otherwise. This includes all noted or unnotified intervening values ​​within the noted range and all narrow ranges between them and all other noted or intervening values ​​within the noted range. The upper and lower limits of these smaller ranges can be independently included in or excluded from the range, and for any particular excluded limit within the noted range, each range in which either or both limits are included in a smaller range, or neither, is included in the technique. If the noted range includes one or both limits, it also includes ranges that exclude either or both of these included limits.

[0055] As used herein and in the appended claims, the singular forms “a,” “an,” and “the” also include plural references unless the content clearly indicates otherwise. Thus, for example, a reference to “precursor” includes multiple such precursors, and a reference to “layer” includes a reference to one or more layers, and their equivalents known to those skilled in the art.

[0056] Furthermore, as used herein and in the following claims, the terms “equipped,” “equipped,” “inserted,” “included,” “included,” and “included” are intended to identify the presence of the described mechanism, integer, component, or action, but not to exclude the presence or addition of one or more other mechanisms, integers, components, actions, behaviors, or groups.

Claims

1. Shower head and A semiconductor processing chamber comprising a substrate support characterized by a first surface facing the shower head, wherein the first surface is configured to support a semiconductor substrate, the substrate support defines a centrally located recessed pocket within the first surface, the recessed pocket is defined by a radial outer wall surface characterized by a height from the first surface within the recessed pocket that is 150% or more of the thickness of the semiconductor substrate, and the radial outer wall surface is integrally formed as part of the substrate support.

2. The semiconductor processing chamber according to claim 1, characterized in that the radial outer wall surface has a height from the first surface in the recessed pocket that is 500% or less of the thickness of the semiconductor substrate.

3. The semiconductor processing chamber according to claim 1, wherein the radial outer wall surface is characterized by an angle of 90° or less with respect to the first surface of the substrate support.

4. The semiconductor processing chamber according to claim 1, wherein the radial outer wall surface is characterized by an angle of 60° or more with respect to the first surface of the substrate support.

5. The semiconductor processing chamber according to claim 1, wherein the radial outer wall surface has a radius that is 102% or less of the radius of the semiconductor substrate.

6. The semiconductor processing chamber according to claim 1, wherein the shower head defines a plurality of openings that penetrate the shower head, the shower head is configured to operate as a plasma generating electrode, a subset of the plurality of openings is characterized by a cylindrical shape passing through the shower head, and the subset of the plurality of openings is characterized at least partially by a flare extending to a first surface of the shower head, the first surface of the shower head faces the first surface of the substrate support.

7. A shower head comprising a shower head having defined multiple openings that penetrate the shower head, wherein at least a subset of the openings is characterized by a cylindrical shape passing through the shower head, A semiconductor processing chamber comprising a substrate support characterized by a first surface facing the shower head and a radial outer wall surface, wherein the first surface is configured to support a semiconductor substrate, the substrate support and the radial outer wall surface define a centrally located recessed pocket within the first surface, the radial outer wall surface has an inclination characterized by extending at a constant angle of 90° or less with respect to the first surface of the substrate support, the inclination of the radial outer wall surface extends constant from the connection portion with the first surface to the upper surface of the radial outer wall surface, and the radial outer wall surface is integrally formed as part of the substrate support.

8. The semiconductor processing chamber according to claim 7, wherein the radial outer wall surface is characterized by an angle of 60° or more with respect to the first surface of the substrate support, and the radial outer wall surface is characterized by a height from the first surface in the recessed pocket of the semiconductor substrate of 150% or more of the thickness of the semiconductor substrate.

9. The semiconductor processing chamber according to claim 7, characterized in that the radial outer wall surface has a height from the first surface in the recessed pocket that is 500% or less of the thickness of the semiconductor substrate.

10. The semiconductor processing chamber according to claim 7, wherein a subset of the plurality of openings is at least partially characterized by flares extending to the first surface of the shower head, the first surface of the shower head facing the first surface of the substrate support.