Cleaning method for plasma processing equipment

Abstract

To suitably dry-clean a mount table on which a substrate is mounted, inside a chamber of a plasma processing device.SOLUTION: A cleaning method for a capacitive coupled type plasma processing device includes the steps of (a) inside a chamber having a mount table including an upper electrode and a lower electrode, mounting a product substrate on a processing position with respect to the mount table and performing a plasma process on the product substrate, and (b) disposing a first dummy substrate having a smaller diameter than the product substrate at a first position with respect to the mount table inside the chamber and performing first dry cleaning inside the chamber. A center of the processing position and a center of the first position are the same as a center of the mount table in a plan view.SELECTED DRAWING: Figure 17

Description

Technical Field

[0001] The present disclosure relates to a cleaning method for a plasma processing apparatus.

Background Art

[0002] Patent Document 1 discloses a method for dry-cleaning the inside of a vacuum processing chamber of a vacuum processing apparatus. This dry-cleaning is performed with a dummy wafer placed on a sample stage inside the vacuum processing chamber.

[0003] Patent Document 2 discloses a method for dry-cleaning the inside of a plasma processing chamber of a plasma processing system. This dry-cleaning is a so-called waferless dry-cleaning, which is performed without placing a dummy wafer on a susceptor inside the plasma processing chamber.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] The technology according to the present disclosure appropriately dry-cleans a mounting table on which a substrate is mounted inside a chamber of a plasma processing apparatus.

Means for Solving the Problems

[0006] One aspect of the present disclosure is a cleaning method for a capacitively coupled plasma processing apparatus, comprising the steps of (a) placing a product substrate at a processing position relative to the mounting platform inside a chamber having an upper electrode and a lower electrode, and performing plasma processing on the product substrate; and (b) placing a first dummy substrate having a diameter smaller than the diameter of the product substrate at a first position relative to the mounting platform inside the chamber, and performing first dry cleaning inside the chamber, wherein the center of the processing position and the center of the first position are, in plan view, the same as the center of the mounting platform. [Effects of the Invention]

[0007] According to this disclosure, the mounting stage on which the substrate is placed can be properly dry-cleaned inside the chamber of the plasma processing apparatus. [Brief explanation of the drawing]

[0008] [Figure 1] This is a longitudinal cross-sectional view showing a schematic configuration of the plasma processing apparatus according to this embodiment. [Figure 2] This is a longitudinal cross-sectional view showing a schematic configuration of the electrostatic chuck and edge ring according to this embodiment. [Figure 3] This is a schematic diagram showing the configuration of the electrostatic chuck and edge ring according to this embodiment. [Figure 4] This is an explanatory diagram showing how dry cleaning is performed using a dummy wafer. [Figure 5] This is a flowchart showing the main steps of wafer processing according to the first embodiment. [Figure 6] This is an explanatory diagram illustrating a series of wafer processing steps according to the first embodiment, using a wafer as an example. [Figure 7] This is an explanatory diagram showing the position of the wafer during dry cleaning according to the first embodiment. [Figure 8] This is an explanatory diagram of the first position in the first embodiment. [Figure 9] This is an explanatory diagram of the first to fourth positions in the first embodiment. [Figure 10] It is an explanatory diagram showing a series of flows of wafer processing according to a modification of the first embodiment using a wafer. [Figure 11] It is an explanatory diagram showing a series of flows of wafer processing according to a modification of the first embodiment using a wafer. [Figure 12] It is an explanatory diagram showing a series of flows of wafer processing according to a modification of the first embodiment using a wafer. [Figure 13] It is an explanatory diagram showing a series of flows of wafer processing according to a modification of the first embodiment using a wafer. [Figure 14] It is an explanatory diagram showing the state of the first dummy wafer in a modification of the first embodiment. [Figure 15] It is a longitudinal sectional view showing an outline of the configuration of a small-diameter dummy wafer, an electrostatic chuck, and an edge ring according to the second embodiment. [Figure 16] It is a plan view showing an outline of the configuration of a small-diameter dummy wafer, an electrostatic chuck, and an edge ring according to the second embodiment. [Figure 17] It is an explanatory diagram showing a series of flows of wafer processing according to the second embodiment using a wafer. [Figure 18] It is an explanatory diagram showing a series of flows of wafer processing according to a modification of the second embodiment using a wafer. [Figure 19] It is an explanatory diagram showing a series of flows of wafer processing according to a modification of the second embodiment using a wafer.

Mode for Carrying Out the Invention

[0009] In the manufacturing process of a semiconductor device, plasma treatment is performed on a semiconductor wafer (hereinafter referred to as "wafer"). In plasma treatment, plasma is generated by exciting a treatment gas, and the wafer is treated with the plasma.

[0010] Plasma treatment is performed in a plasma processing apparatus. The plasma processing apparatus generally includes a chamber, a stage, and a radio frequency (RF) power supply. In one example, the RF power supply includes a first RF power supply and a second RF power supply. The first RF power supply supplies first RF power to generate plasma of the gas in the chamber. The second RF power supply supplies second RF power for bias to the lower electrode to attract ions to the wafer. The chamber defines its internal space as a processing space where plasma is generated. The stage is provided in the chamber. The stage has a lower electrode and an electrostatic chuck. The electrostatic chuck is provided on the lower electrode. An edge ring is disposed on the electrostatic chuck so as to surround the wafer placed on the electrostatic chuck. The edge ring is provided to control the sheath shape near the edge of the wafer and improve the uniformity of plasma treatment for the wafer.

[0011] In plasma treatment, reaction products are generated. The reaction products adhere to the inner wall of the chamber, the edge ring, etc. and deposit as deposits (hereinafter referred to as "deposits"). Deposits are a cause of foreign matter (hereinafter referred to as "particles") generation and can cause deterioration of product yield and reduction of device operation time. Therefore, in order to remove deposits, dry cleaning using plasma is performed inside the chamber. That is, in dry cleaning, a dry cleaning gas is excited to generate plasma, and the plasma is used to remove deposits. Specifically, dry cleaning removes deposits by chemical reactions by radicals and physical reactions (sputtering) by ions.

[0012] Dry cleaning may be performed with a dummy wafer placed on the stage as disclosed in Patent Document 1. Also, dry cleaning may be performed without placing a dummy wafer on the stage (waferless dry cleaning) as disclosed in Patent Document 2.

[0013] In dry cleaning using a dummy wafer, radicals and ions are shielded by the dummy wafer, creating regions where it is difficult to supply radicals and ions (regions where radicals and ions are difficult to incident). In particular, when a second high-frequency power (bias power) is supplied to the lower electrode of the mounting stage, ions travel in a straight line toward the dummy wafer, so the efficiency of ion sputtering is significantly reduced in the regions shielded by the dummy wafer. As a result, deposits that are difficult to remove by chemical reactions caused by radicals (for example, deposits containing Si or metals) cannot be sufficiently removed.

[0014] Furthermore, in wafer-less dry cleaning, where dummy wafers are not used, ions directly enter the surface of the mounting stage (electrostatic chuck) because the dummy wafer is not placed on it. Therefore, if the bias power is increased, the mounting stage will be damaged. For this reason, the bias power must be kept low, which reduces the efficiency of ion sputtering. Consequently, deposits that are difficult to remove by chemical reactions caused by radicals (for example, deposits containing Si or metals) cannot be sufficiently removed.

[0015] The technology described herein provides for the proper dry cleaning of a mounting platform on which a substrate is placed inside the chamber of a plasma processing apparatus. The plasma processing apparatus and the dry cleaning method for the plasma processing apparatus according to this embodiment will be described below with reference to the drawings. In this specification and the drawings, elements having substantially the same functional configuration are denoted by the same reference numerals, thus omitting redundant explanations.

[0016] <Plasma Processing Equipment> First, the plasma processing apparatus according to this embodiment will be described. Figure 1 is a longitudinal cross-sectional view showing a schematic configuration of the plasma processing apparatus 1. The plasma processing apparatus 1 is a capacitively coupled plasma processing apparatus. The plasma processing apparatus 1 performs plasma processing on a product wafer W, which is a product substrate. The product wafer W is a wafer on which the desired plasma processing is to be performed, and is, for example, a wafer on which a pattern is formed on the surface. The plasma processing is not particularly limited, but for example, etching, film deposition, diffusion, etc., may be performed.

[0017] As shown in Figure 1, the plasma processing apparatus 1 has a substantially cylindrical chamber 10. The chamber 10 defines a processing space S in which plasma is generated. The chamber 10 is made of, for example, aluminum. The chamber 10 is connected to ground potential. A plasma-resistant film is formed on the inner wall surface of the chamber 10, that is, the wall surface defining the processing space S. This film may be a ceramic film, such as a film formed by anodizing or a film formed from yttrium oxide.

[0018] Inside the chamber 10 is a mounting table 11 on which the product wafer W is placed. The mounting table 11 has a lower electrode 12, an electrostatic chuck 13, and an edge ring 14. An electrode plate (not shown), made of, for example, aluminum, may be provided on the back side of the lower electrode 12.

[0019] The lower electrode 12 is made of a conductive metal, such as aluminum, and has a roughly disc shape.

[0020] A refrigerant channel 15a is formed inside the lower electrode 12. Refrigerant is supplied to the refrigerant channel 15a from a chiller unit (not shown) located outside the chamber 10 via a refrigerant inlet pipe 15b. The refrigerant supplied to the refrigerant channel 15a returns to the chiller unit via a refrigerant outlet channel 15c. By circulating a refrigerant, such as cooling water, through the refrigerant channel 15a, the electrostatic chuck 13, edge ring 14, and product wafer W can be cooled to a desired temperature.

[0021] The electrostatic chuck 13 is provided on the lower electrode 12. The electrostatic chuck 13 is a component configured to hold both the product wafer W and the edge ring 14 by electrostatic force. The surface of the central part of the electrostatic chuck 13 is higher than the surface of the outer periphery. The central surface of the electrostatic chuck 13 becomes the wafer mounting surface on which the product wafer W is placed, and the outer surface of the electrostatic chuck 13 becomes the edge ring mounting surface on which the edge ring 14 is placed. Details of the configuration of the electrostatic chuck 13 will be described later.

[0022] Inside the electrostatic chuck 13, a first electrode 16a is provided in the central part for adsorbing and holding the product wafer W. Inside the electrostatic chuck 13, a second electrode 16b is provided in the outer periphery for adsorbing and holding the edge ring 14. The electrostatic chuck 13 has a configuration in which electrodes 16a and 16b are sandwiched between insulating materials made of insulating material.

[0023] A DC voltage from a DC power supply (not shown) is applied to the first electrode 16a. The resulting electrostatic force causes the product wafer W to be attracted and held on the central surface of the electrostatic chuck 13. Similarly, a DC voltage from a DC power supply (not shown) is applied to the second electrode 16b. The resulting electrostatic force causes the edge ring 14 to be attracted and held on the outer surface of the electrostatic chuck 13.

[0024] The edge ring 14 is an annular member positioned to surround the product wafer W placed on the central surface of the electrostatic chuck 13. The edge ring 14 is provided to improve the uniformity of the plasma treatment. For this reason, the edge ring 14 is made of a material appropriately selected according to the plasma treatment, and may be made of, for example, quartz, Si, SiC, etc. Details of the configuration of this edge ring 14 will be described later.

[0025] The mounting base 11, configured as described above, is fastened to a substantially cylindrical support member 17 provided at the bottom of the chamber 10. The support member 17 is made of an insulator such as ceramic or quartz.

[0026] Although not shown in the diagram, the mounting base 11 may include a temperature control module configured to adjust at least one of the electrostatic chuck 13, edge ring 14, and product wafer W to a desired temperature. The temperature control module may include a heater, a flow path, or a combination thereof. A temperature-controlled fluid, such as a refrigerant or heat transfer gas, flows through the flow path.

[0027] Below the mounting table 11 and inside the support member 17, a lifter 20 is provided for raising and lowering the product wafer W relative to the mounting table 11. The lifter 20 has a lifting pin 21, a support member 22, and a drive unit 23.

[0028] The lifting pins 21 are columnar members that move up and down so as to protrude from the central surface of the electrostatic chuck 13, and are made of, for example, ceramic. Three or more lifting pins 21 are provided at intervals from each other along the circumferential direction of the electrostatic chuck 13, that is, along the circumferential direction of the surface. The lifting pins 21 are provided at equal intervals along the circumferential direction, for example. The lifting pins 21 are provided so as to extend in the vertical direction.

[0029] The lifting pin 21 is inserted through a through hole 24 that extends downward from the central surface of the electrostatic chuck 13 to the bottom surface of the lower electrode 12. In other words, the through hole 24 is formed to penetrate the central part of the electrostatic chuck 13 and the lower electrode 12.

[0030] The support member 22 supports a plurality of lifting pins 21. The drive unit 23 generates a driving force to raise and lower the support member 22, thereby raising and lowering the plurality of lifting pins 21. The drive unit 23 has a motor (not shown) that generates the above driving force.

[0031] The plasma processing apparatus 1 further comprises a first radio frequency (RF) power supply 30, a second radio frequency power supply 31, a first matching unit 32, and a second matching unit 33. The first radio frequency power supply 30 and the second radio frequency power supply 31 are connected to the lower electrode 12 via the first matching unit 32 and the second matching unit 33, respectively.

[0032] The first high-frequency power supply 30 is a power supply that generates high-frequency power for plasma generation. The frequency from the first high-frequency power supply 30 may be between 27 MHz and 100 MHz, and in one example, a high-frequency power HF of 40 MHz is supplied to the lower electrode 12. The first matching circuit 32 has a circuit for matching the output impedance of the first high-frequency power supply 30 with the input impedance of the load side (lower electrode 12 side). Note that the first high-frequency power supply 30 does not have to be electrically connected to the lower electrode 12, and may be connected to the upper electrode, which is the shower head 40, via the first matching circuit 32.

[0033] The second high-frequency power supply 31 generates high-frequency power (bias power) LF for drawing ions into the product wafer W and supplies the high-frequency power LF to the lower electrode 12. The frequency of the high-frequency power LF may be within the range of 400 kHz to 13.56 MHz, and in one example it is 400 kHz. The second matching unit 33 has a circuit for matching the output impedance of the second high-frequency power supply 31 with the input impedance of the load side (lower electrode 12 side). A DC (Direct Current) pulse generation unit may be used instead of the second high-frequency power supply 31.

[0034] A shower head 40 is provided above the mounting base 11, facing the mounting base 11. The shower head 40 has an electrode plate 41 positioned facing the processing space S, and an electrode support 42 provided above the electrode plate 41. The electrode plate 41 functions as a pair of upper electrodes with the lower electrode 12. When the first high-frequency power supply 30 is electrically connected to the lower electrode 12, as will be described later, the shower head 40 is connected to ground potential. The shower head 40 is supported on the upper part (ceiling surface) of the chamber 10 via an insulating shielding member 43.

[0035] The electrode plate 41 has a plurality of gas outlets 41a formed therein for supplying the processing gas sent from the gas diffusion chamber 42a (described later) to the processing space S. The electrode plate 41 is made of, for example, a conductor or semiconductor having low electrical resistivity that generates little Joule heat.

[0036] The electrode support 42 detachably supports the electrode plate 41. The electrode support 42 has a structure in which a plasma-resistant film is formed on the surface of a conductive material such as aluminum. This film may be a ceramic film formed by anodizing or a film formed from yttrium oxide. A gas diffusion chamber 42a is formed inside the electrode support 42. Multiple gas flow holes 42b that communicate with the gas outlet 41a are formed in the gas diffusion chamber 42a. In addition, a gas inlet hole 42c that is connected to a gas supply pipe 53, which will be described later, is formed in the gas diffusion chamber 42a.

[0037] Furthermore, the electrode support 42 is connected to a group of gas supply sources 50 that supply processed gas to the gas diffusion chamber 42a via a group of flow control devices 51, a group of valves 52, a gas supply pipe 53, and a gas inlet hole 42c.

[0038] The gas supply source group 50 has multiple types of gas supply sources necessary for plasma processing or dry cleaning. The flow control equipment group 51 includes multiple flow controllers, and the valve group 52 includes multiple valves. Each of the multiple flow controllers in the flow control equipment group 51 is either a mass flow controller or a pressure-controlled flow controller. In the plasma processing apparatus 1, processing gas from one or more gas supply sources selected from the gas supply source group 50 is supplied to the gas diffusion chamber 42a via the flow control equipment group 51, the valve group 52, the gas supply pipe 53, and the gas inlet hole 42c. The processing gas supplied to the gas diffusion chamber 42a is then supplied in a shower-like manner within the processing space S via the gas flow hole 42b and the gas outlet 41a.

[0039] The plasma processing apparatus 1 is equipped with a deposit shield 60 that is detachably provided along the inner wall of the chamber 10. The deposit shield 60 is designed to prevent deposits from adhering to the inner wall of the chamber 10 and is constructed, for example, by coating an aluminum material with ceramics such as yttrium oxide. Similarly, a deposit shield 61 is detachably provided on the outer circumferential surface of the support member 17, which is opposite to the deposit shield 60.

[0040] A baffle plate 62 is provided at the bottom of the chamber 10, between the inner wall of the chamber 10 and the support member 17. The baffle plate 62 is constructed, for example, by coating aluminum with ceramics such as yttrium oxide. Multiple through holes are formed in the baffle plate 62. The processing space S is connected to an exhaust port 63 via the baffle plate 62. An exhaust device 64, for example, a vacuum pump, is connected to the exhaust port 63, and the exhaust device 64 is configured to reduce the pressure inside the processing space S.

[0041] Furthermore, an inlet / outlet 65 for loading product wafers W is formed in the side wall of the chamber 10, and this inlet / outlet 65 can be opened and closed by a gate valve 66.

[0042] In this embodiment, the dry cleaning section includes the lower electrode 12, the second high-frequency power supply 31, the gas supply source group 50, etc., and generates plasma by exciting a dry cleaning gas in order to dry clean the inside of the chamber 10 as described later.

[0043] The plasma processing apparatus 1 described above is provided with a control unit 70. The control unit 70 is, for example, a computer equipped with a CPU, memory, etc., and has a program storage unit (not shown). The program storage unit stores a program that controls the plasma processing in the plasma processing apparatus 1. The program may have been recorded on a storage medium readable by the computer and installed from that storage medium to the control unit 70.

[0044] <Plasma treatment method> Next, we will describe the plasma processing performed using the plasma processing apparatus 1 configured as described above.

[0045] First, the product wafer W is brought into the chamber 10 and placed on the electrostatic chuck 13. At this time, the product wafer W is placed on the electrostatic chuck 13 such that, in a plan view, the center of the product wafer W is at the same position as the center of the electrostatic chuck 13. This position of the product wafer W is the processing position in this disclosure. Subsequently, by applying a DC voltage to the first electrode 16a of the electrostatic chuck 13, the product wafer W is electrostatically attracted to and held by the electrostatic chuck 13 by Coulomb force. After the product wafer W is brought in, the inside of the chamber 10 is depressurized to a desired vacuum level by the exhaust device 64.

[0046] Next, a processing gas is supplied from the gas supply source group 50 to the processing space S via the showerhead 40. Furthermore, a first high-frequency power supply 30 supplies high-frequency power HF for plasma generation to the lower electrode 12, exciting the processing gas and generating plasma. At this time, a second high-frequency power supply 31 may supply high-frequency power LF for ion extraction. Then, the generated plasma acts on the product wafer W, performing plasma processing.

[0047] When terminating the plasma processing, first, the supply of high-frequency power HF from the first high-frequency power supply 30 and the supply of processing gas from the gas supply source group 50 are stopped. Also, if high-frequency power LF was supplied during the plasma processing, the supply of said high-frequency power LF is also stopped. Next, the supply of heat transfer gas to the back surface of the product wafer W is stopped, and the suction holding of the product wafer W by the electrostatic chuck 13 is stopped.

[0048] Subsequently, the product wafer W is removed from the chamber 10, and the series of plasma treatments on the product wafer W is completed.

[0049] In addition, in plasma processing, plasma may be generated using only the high-frequency power LF from the second high-frequency power supply 31, without using the high-frequency power HF from the first high-frequency power supply 30.

[0050] <Electrostatic Chucks and Edge Rings> Next, the main configurations of the electrostatic chuck 13 and edge ring 14 described above will be explained. Figure 2 is a longitudinal cross-sectional view showing a schematic of the configuration of the electrostatic chuck 13 and edge ring 14. Figure 3 is a plain diagram showing a schematic of the configuration of the electrostatic chuck 13 and edge ring 14.

[0051] As shown in Figure 2, the electrostatic chuck 13 is constructed by integrally comprising a central portion 100 having a surface 100a on which the product wafer W is placed, and an outer peripheral portion 101 having a surface 101a on which the edge ring 14 is placed. The central portion 100 is provided so as to protrude from the outer peripheral portion 101, and the surface 100a of the central portion 100 is higher than the surface 101a of the outer peripheral portion 101.

[0052] The central portion 100 of the electrostatic chuck 13 is formed to have a smaller diameter than, for example, the diameter of the product wafer W, so that when the product wafer W is placed on the surface 100a, the peripheral edge of the product wafer W protrudes from the central portion 100 of the electrostatic chuck 13.

[0053] In this embodiment, the electrostatic chuck 13 has a central portion 100 and an outer peripheral portion 101 that are integrated together, but these central portion 100 and outer peripheral portion 101 may be separate parts. Also, although the electrostatic chuck 13 in this embodiment has a central portion 100 and an outer peripheral portion 101, the outer peripheral portion 101 may be omitted. In such cases, the edge ring 14 is not placed on the electrostatic chuck 13 but is supported by other support members (not shown).

[0054] The edge ring 14 is provided so as to surround the product wafer W placed on the surface 100a. The edge ring 14 is integrally composed of a first ring portion 110 having an annular shape and a second ring portion 111 having an annular shape. The first ring portion 110 and the second ring portion 111 are each provided on concentric circles, with the second ring portion 111 provided radially outward of the first ring portion 110.

[0055] The surface 110a of the first ring portion 110 is lower than the surface 100a. The surface 111a of the second ring portion 111 is higher than the surface 100a, for example, being the same height as the surface Wa of the product wafer W placed on the surface 100a, or higher than the surface Wa of the product wafer W. In addition, the inner circumference of the surface 111a is inclined toward the surface 110a (radially inward).

[0056] The inner diameter of the first ring portion 110 is larger than the diameter of the central portion 100 and smaller than the diameter of the product wafer W. The inner diameter of the second ring portion 111 is larger than the diameter of the product wafer W. The first ring portion 110 is positioned so as to fit underneath the peripheral edge of the product wafer W that protrudes from the central portion 100 of the electrostatic chuck 13. That is, as shown in Figures 2 and 3, a region is formed on the surface 110a of the first ring portion 110 that overlaps with the product wafer W in a plan view and is in the shadow of the product wafer W. In the following description, this region in the shadow of the product wafer W will be referred to as the shadow region A.

[0057] <Characteristics of dry cleaning using dummy wafers> As described above, reaction products are generated during plasma processing. These reaction products adhere to the edge ring 14 and other surfaces, accumulating as deposits. To remove these deposits, dry cleaning using plasma is performed inside the chamber 10. Dry cleaning removes deposits through chemical reactions by radicals and physical reactions (sputtering) by ions. Chemical reactions by radicals can remove deposits such as carbon-based deposits. Physical reactions by ions can remove deposits such as Si and metals.

[0058] In this embodiment, dry cleaning is performed using a dummy wafer. However, in this case, radicals and ions are shielded by the dummy wafer, creating regions where it is difficult to supply radicals and ions (regions where radicals and ions are difficult to incident). The regions where dry cleaning is difficult will be explained below with reference to Figure 4. Figure 4 is an explanatory diagram showing how dry cleaning is performed using a dummy wafer D. In Figure 4, the arrows indicate the flow of ions N. Also, for the sake of ease of understanding the technology, the flow of radicals is omitted in Figure 4. The dummy wafer D is a wafer having the same diameter as the product wafer W. Furthermore, the dummy wafer D is a wafer without a pattern formed on it, a so-called bare silicon wafer.

[0059] As shown in Figure 4, during dry cleaning, ions N are supplied to the surfaces 110a and 111a of the edge ring 14, and deposits attached to these surfaces are removed. However, in a plan view, it is difficult to supply ions N to the shaded region A, which is in the shadow of the dummy wafer D. When high-frequency power LF (bias power) is supplied to the lower electrode 12, the ions N travel in a straight line toward the dummy wafer D, so the efficiency of sputtering by ions N is significantly reduced in the shaded region A, which is shielded by the dummy wafer D. Therefore, deposits that are difficult to remove by chemical reactions with radicals (for example, deposits containing Si or metals) cannot be sufficiently removed. Furthermore, radicals are also difficult to supply to the shaded region A, which is in the shadow of the dummy wafer D, and therefore cannot be sufficiently removed from the deposits.

[0060] Therefore, in the dry cleaning method of the first embodiment, the position of the dummy wafer D relative to the mounting table 11 (edge ​​ring 14) is shifted to perform dummy cleaning of the shadowed area A. In the dry cleaning method of the second embodiment, a wafer having a smaller diameter than the product wafer W (hereinafter referred to as "small-diameter dummy wafer") is used as the dummy wafer to perform dummy cleaning of the shadowed area A.

[0061] <Dry cleaning method according to the first embodiment> A dry cleaning method according to the first embodiment will be described. In the first embodiment, plasma treatment of a product wafer W and dry cleaning using a dummy wafer D will be described. In the following description, these plasma treatment and dry cleaning will be collectively referred to as wafer processing. Figure 5 is a flowchart showing the main steps of wafer processing according to the first embodiment. Figure 6 is an explanatory diagram showing a series of steps of wafer processing according to the first embodiment using a wafer. Figure 7 is an explanatory diagram showing the position of the wafer in dry cleaning according to the first embodiment.

[0062] In the first embodiment, dry cleaning is performed using four dummy wafers D1 to D4, as described later, and these first to fourth dummy wafers D1 to D4 have the same diameter as the product wafer W. Also, in the first embodiment, the first to fourth dummy wafers D1 to D4 are each different dummy wafers. However, the first to fourth dummy wafers D1 to D4 may each be the same dummy wafer.

[0063] (Step S11) In step S11, plasma treatment is performed continuously on one lot, for example, 25 product wafers W. The plasma treatment method for each product wafer W is as described above.

[0064] (Step S12) In step S12, a first dry cleaning is performed using the first dummy wafer D1. Specifically, first, the first dummy wafer D1 is brought into the chamber 10 and positioned above the electrostatic chuck 13. At this time, as shown in Figure 7(a), the first dummy wafer D1 is positioned such that, in a plan view, its center C1 is offset from the center C of the electrostatic chuck 13 towards the positive Y-axis side. This position of the first dummy wafer D1 is the first position in this disclosure. In this case, the first shaded area A1 on the negative Y-axis side of the shaded area A of the edge ring 14 is exposed without overlapping with the first dummy wafer D1 in a plan view.

[0065] The first position where the first dummy wafer D1 is placed will be described in more detail. As shown in Figure 8, one end D1a of the first dummy wafer D1 is located between the inner circumference of the edge ring 14 and the outer circumference of the central part 100 of the electrostatic chuck 13. The other end D1b of the first dummy wafer D1 is located radially outward from the inner circumference of the edge ring 14. As a result, the shaded area A1 on the side of end D1a of the edge ring 14 is exposed without overlapping with the first dummy wafer D1.

[0066] Next, the lifter 20 supporting the first dummy wafer D1 is lowered and placed on the electrostatic chuck 13. Then, by applying a DC voltage to the first electrode 16a of the electrostatic chuck 13, the first dummy wafer D1 is electrostatically attracted to and held by the electrostatic chuck 13 due to Coulomb force. After the first dummy wafer D1 is loaded, the inside of the chamber 10 is depressurized to a desired vacuum level by the exhaust device 64.

[0067] Next, a dry cleaning gas is supplied from the gas supply source group 50 to the processing space S via the shower head 40. The dry cleaning gas may include, for example, oxygen, oxygen-containing gas, HCl, F2, Cl2, hydrogen, nitrogen, argon, SF6, C2F6, NF3, CF4, or a mixture of two or more of these gases. High-frequency power is also supplied to the lower electrode 12 by the first high-frequency power supply 30 and / or the second high-frequency power supply 31. Then, the dry cleaning gas is excited to generate plasma, and deposits inside the chamber 10 are removed by chemical reactions by radicals and physical reactions by ions (sputtering). At this time, ions are also supplied to the first shadowed region A1 exposed from the first dummy wafer D1, and deposits attached to the first shadowed region A1 are also removed. In this way, the first dry cleaning is performed.

[0068] When the first dry cleaning is completed, first the supply of high-frequency power from the first high-frequency power supply 30 and / or the second high-frequency power supply 31 and the supply of processing gas from the gas supply source group 50 are stopped. Next, the adsorption and holding of the first dummy wafer D1 by the electrostatic chuck 13 is stopped.

[0069] Subsequently, the first dummy wafer D1 is removed from the chamber 10, and the first dry cleaning using the first dummy wafer D1 is completed.

[0070] (Step S13) In step S13, plasma processing is performed continuously on the next lot, for example, 25 product wafers W. This step S34 is the same as step S11.

[0071] (Step S14) In step S14, a second dry cleaning is performed using a second dummy wafer D2. Specifically, first, the second dummy wafer D2 is placed above the electrostatic chuck 13. At this time, as shown in Figure 7(b), the second dummy wafer D2 is positioned such that, in a plan view, its center C2 is offset from the center C of the electrostatic chuck 13 towards the positive X-axis side. This position of the second dummy wafer D2 is the second position in this disclosure. In this case, the second shaded area A2 on the negative X-axis side of the shaded area A of the edge ring 14 is exposed without overlapping with the second dummy wafer D2 in a plan view.

[0072] Next, the second dummy wafer D2 is placed on the electrostatic chuck 13 and then held in place by the electrostatic chuck 13. The subsequent dry cleaning method is the same as the first dry cleaning in step S12. That is, a plasma (containing radicals and ions) excited by the dry cleaning gas is used to remove deposits inside the chamber 10. At this time, deposits attached to the second shadow region A2 exposed from the second dummy wafer D2 are also removed. Thus, the second dry cleaning is performed.

[0073] (Step S15) In step S15, plasma processing is performed continuously on the next lot, for example, 25 product wafers W. This step S34 is the same as step S11.

[0074] (Step S16) In step S16, a third dry cleaning is performed using a third dummy wafer D3. Specifically, first, the third dummy wafer D3 is placed above the electrostatic chuck 13. At this time, as shown in Figure 7(c), the third dummy wafer D3 is positioned such that, in a plan view, its center C3 is shifted in the negative Y-axis direction from the center C of the electrostatic chuck 13. This position of the third dummy wafer D3 is the third position in this disclosure. In this case, the third shaded area A3 on the positive Y-axis side of the shaded area A of the edge ring 14 is exposed without overlapping with the third dummy wafer D3 in a plan view.

[0075] Next, the third dummy wafer D3 is placed on the electrostatic chuck 13 and then held in place by the electrostatic chuck 13. The subsequent dry cleaning method is the same as the first dry cleaning in step S12. That is, a plasma (containing radicals and ions) excited by the dry cleaning gas is used to remove deposits inside the chamber 10. At this time, deposits attached to the third shaded region A3 exposed from the third dummy wafer D3 are also removed. Thus, the third dry cleaning is performed.

[0076] (Step S17) In step S17, plasma processing is performed continuously on the next lot, for example, 25 product wafers W. This step S34 is the same as step S11.

[0077] (Step S18) In step S18, a fourth dry cleaning is performed using a fourth dummy wafer D4. Specifically, first, the fourth dummy wafer D4 is placed above the electrostatic chuck 13. At this time, as shown in Figure 7(d), the fourth dummy wafer D4 is positioned such that, in a plan view, its center C4 is shifted in the negative X-axis direction from the center C of the electrostatic chuck 13. This position of the fourth dummy wafer D4 is the fourth position in this disclosure. In this case, the fourth shaded area A4 on the positive X-axis side of the shaded area A of the edge ring 14 is exposed without overlapping with the fourth dummy wafer D4 in a plan view.

[0078] Next, the fourth dummy wafer D4 is placed on the electrostatic chuck 13 and then held in place by the electrostatic chuck 13. The subsequent dry cleaning method is the same as the first dry cleaning in step S12. That is, a plasma (containing radicals and ions) excited by the dry cleaning gas is used to remove deposits inside the chamber 10. At this time, deposits attached to the fourth shaded region A4 exposed from the fourth dummy wafer D4 are also removed. Thus, the fourth dry cleaning is performed.

[0079] After step S18, steps S11 to S18 are repeated, for example.

[0080] As described above, in the first embodiment, deposits adhering to the first to fourth shaded regions A1 to A4 can be removed by performing the first to fourth dry cleaning processes. Therefore, as shown in Figure 4, deposits can be properly removed even in the shaded region A, which conventionally could not be removed due to being in the shadow of the dummy wafer D. In addition, in the first embodiment, the parts of the edge ring 14 surface 110a and 111a other than the shaded region A are exposed, and deposits adhering to these parts can also be properly removed. Therefore, since deposits can be removed from the entire surface 110a and 111a of the edge ring 14, particle generation can be suppressed and product yield can be improved. Furthermore, the operating time of the plasma processing apparatus 1 can be extended, and the mean time between cleanings (MTBC) for the plasma processing apparatus can also be extended.

[0081] Conventionally, when performing dry cleaning using dummy wafers, it was required to position the dummy wafers precisely relative to the electrostatic chuck 13, that is, to position them so that the center of the dummy wafer coincides with the center of the electrostatic chuck 13 in a plan view. Therefore, positioning the dummy wafers D1 to D4 with a slight offset relative to the electrostatic chuck 13, as in the first embodiment, is an extremely novel approach that is not found in conventional technology.

[0082] As described above, in the first embodiment, the first to fourth dry cleanings are performed with the first to fourth dummy wafers D1 to D4 positioned in the first to fourth locations. Figure 9 is an explanatory diagram showing the positions of the first to fourth. In Figure 9, the first line segment L1 is the line segment connecting the center C of the electrostatic chuck 13 and the center C1 of the first dummy wafer D1. The second line segment L2 is the line segment connecting the center C of the electrostatic chuck 13 and the center C2 of the second dummy wafer D2. The third line segment L3 is the line segment connecting the center C of the electrostatic chuck 13 and the center C3 of the third dummy wafer D3. The fourth line segment L4 is the line segment connecting the center C of the electrostatic chuck 13 and the center C4 of the fourth dummy wafer D4. The first angle θ1 is the angle formed by the first line segment L1 and the second line segment L2. The second angle θ2 is the angle formed by the second line segment L2 and the third line segment L3. The third angle θ3 is the angle formed by the third line segment L3 and the fourth line segment L4. The fourth angle θ4 is the angle formed by the fourth line segment L4 and the first line segment L1. Furthermore, the first to fourth angles θ1 to θ4 are all equal to 90 degrees. In other words, the centers C1 to C4 of the first to fourth dummy wafers D1 to D4 are each arranged at equal intervals on the same circumference.

[0083] In this case, the areas of the first to fourth shaded regions A1 to A4 can be made uniform. After careful consideration by the inventors, it was found that these first to fourth shaded regions A1 to A4 can cover the entire shaded region A. In other words, by performing the first to fourth dry cleaning, the entire shaded region A is exposed, and deposits attached to the shaded region A can be removed.

[0084] (Modified version of the first embodiment) In the first embodiment described above, after plasma treatment of one lot of product wafers W, the first to fourth dry cleaning steps may be performed consecutively. Figure 10 is an explanatory diagram illustrating the series of wafer processing steps according to this modified example using a wafer.

[0085] (Step S21) In step S21, plasma processing is performed continuously on one lot, for example, 25 product wafers W. This step S21 is the same as step S11.

[0086] (Steps S22-S25) In step S22, the first dry cleaning is performed using the first dummy wafer D1. In step S23, the second dry cleaning is performed using the second dummy wafer D2. In step S24, the third dry cleaning is performed using the third dummy wafer D3. In step S25, the fourth dry cleaning is performed using the fourth dummy wafer D4. These steps S22 to S25 are performed consecutively and are the same as steps S12, S14, S16, and S18, respectively.

[0087] After step S25, steps S21 to S25 may be repeated, for example. Alternatively, as shown in Figure 11, step S21 may be performed multiple times, that is, plasma treatment may be performed on multiple lots of product wafers W, and then steps S22 to S25 may be performed.

[0088] In this modified example, the same effects as in the first embodiment can be enjoyed. That is, by performing the first to fourth dry cleaning processes, deposits adhering to the first to fourth shaded areas A1 to A4 can be removed.

[0089] (Modified version of the first embodiment) In the first embodiment described above, after performing a fifth dry cleaning different from the first to fourth dry cleanings, the first to fourth dry cleanings may be performed, one by one, while plasma processing is being carried out on one lot of product wafers W. Figure 12 is an explanatory diagram illustrating the series of wafer processing steps according to this modified example using a wafer.

[0090] (Step S30) In step S30, plasma processing is performed continuously on one lot, for example, 25 product wafers W. This step S30 is the same as step S11.

[0091] (Step S31) In step S31, a fifth dry cleaning is performed using a fifth dummy wafer D5. Specifically, first, the fifth dummy wafer D5 is placed above the electrostatic chuck 13. At this time, the fifth dummy wafer D5 is positioned so that, in a plan view, its center is at the same position as the center of the electrostatic chuck 13. This position of the fifth dummy wafer D5 is the fifth position in this disclosure.

[0092] Next, the fifth dummy wafer D5 is placed on the electrostatic chuck 13 and then held in place by the electrostatic chuck 13. The subsequent dry cleaning method is the same as the first dry cleaning in step S12. That is, deposits inside the chamber 10 are removed using plasma (containing radicals and ions) excited by the dry cleaning gas. In this way, the fifth dry cleaning is performed.

[0093] (Step S32) In step S32, plasma processing is performed continuously on one lot, for example, 25 product wafers W. This step S32 is the same as step S11.

[0094] (Step S33) In step S33, a first dry cleaning is performed using the first dummy wafer D1. This step S33 is the same as in step S12.

[0095] (Step S34) In step S34, plasma processing is performed continuously on one lot, for example, 25 product wafers W. This step S34 is the same as step S11.

[0096] (Step S35) In step S35, a second dry cleaning is performed using the second dummy wafer D2. This step S35 is the same as in step S14.

[0097] (Step S36) In step S36, plasma processing is performed continuously on one lot, for example, 25 product wafers W. This step S36 is the same as step S11.

[0098] (Step S37) In step S37, a third dry cleaning is performed using the third dummy wafer D3. This step S37 is the same as step S16.

[0099] (Step S38) In step S38, plasma processing is performed continuously on one lot, for example, 25 product wafers W. This step S38 is the same as step S11.

[0100] (Step S39) In step S39, a fourth dry cleaning is performed using the fourth dummy wafer D4. This step S39 is the same as step S18.

[0101] After step S39, steps S30 to S39 are repeated, for example.

[0102] In this modified example, the same effects as in the first embodiment can be enjoyed. That is, by performing the first to fourth dry cleaning processes, deposits adhering to the first to fourth shaded areas A1 to A4 can be removed.

[0103] In step S31 of this modified example, a fifth dry cleaning was performed using a fifth dummy wafer D5, but instead, so-called wafer-less dry cleaning may be performed.

[0104] (Modified version of the first embodiment) In the first embodiment described above, a fifth dry cleaning procedure different from the first to fourth dry cleaning procedures may be performed, followed by plasma treatment of one lot of product wafers W, and then the first to fourth dry cleaning procedures may be performed consecutively. Figure 13 is an explanatory diagram illustrating the series of wafer processing steps according to this modified example using a wafer.

[0105] (Step S41) In step S41, plasma processing is performed continuously on one lot, for example, 25 product wafers W. This step S41 is the same as step S11.

[0106] (Step S42) In step S42, a fifth dry cleaning is performed using the fifth dummy wafer D5. This step S42 is the same as step S31.

[0107] (Step S43) In step S43, plasma processing is performed continuously on one lot, for example, 25 product wafers W. This step S43 is the same as step S11.

[0108] (Steps S44-S47) In step S44, the first dry cleaning is performed using the first dummy wafer D1. In step S45, the second dry cleaning is performed using the second dummy wafer D2. In step S46, the third dry cleaning is performed using the third dummy wafer D3. In step S47, the fourth dry cleaning is performed using the fourth dummy wafer D4. These steps S44 to S47 are performed consecutively and are the same as steps S12, S14, S16, and S18, respectively.

[0109] After step S47, steps S41 to S47 are repeated, for example.

[0110] In this modified example, the same effects as in the first embodiment can be enjoyed. That is, by performing the first to fourth dry cleaning processes, deposits adhering to the first to fourth shaded areas A1 to A4 can be removed.

[0111] Steps S42 and S43 may be performed multiple times, that is, plasma treatment may be performed on multiple lots of product wafers W, and then steps S44 to S47 may be performed. In this case, if steps S42 and S43 are performed multiple times, deposits in the shadowed area A that cannot be removed in step S42 will accumulate. Therefore, by performing the first to fourth dry cleaning in steps S43 to S47, the deposits in the shadowed area A can be removed.

[0112] Furthermore, in step S42 of this modified example, a fifth dry cleaning was performed using a fifth dummy wafer D5, but instead, so-called wafer-less dry cleaning may be performed.

[0113] (Modified version of the first embodiment) In the first embodiment and its modifications described above, the first to fourth dry cleanings were performed with the first to fourth dummy wafers D1 to D4 placed on the electrostatic chuck 13, but they may also be performed with the wafers separated from the electrostatic chuck 13. The first dry cleaning using the first dummy wafer D1 will be described below, but the other second to fourth dry cleanings are similar.

[0114] For example, as shown in Figure 14(a), the first ring portion 110 of the edge ring 14 may be smaller in the radial direction. In such a case, even if the first dummy wafer D1 is placed in the first position for the first dry cleaning, it may not be possible to secure a sufficient distance F1 between one end D1b and the outer edge of the central portion 100 of the electrostatic chuck 13, and one end D1a will be located above the edge ring 14. That is, the shaded area A1 on the side of one end D1a of the edge ring 14 will overlap with the first dummy wafer D1 in a plan view and will not be fully exposed.

[0115] Therefore, as shown in Figure 14(b), the first dummy wafer D1 may be supported by the lifter 20 and separated from the electrostatic chuck 13 when the first dry cleaning is performed. In this case, a sufficient distance F2 (margin) can be secured between one end D1b of the first dummy wafer D1 and the outer peripheral edge of the central part 100 of the electrostatic chuck 13, and one end D1a is located between the inner peripheral edge of the edge ring 14 and the outer peripheral edge of the central part 100 of the electrostatic chuck 13. In this case, the shaded area A1 on the side of one end D1a of the edge ring 14 is exposed without overlapping with the first dummy wafer D1, and deposits adhering to the shaded area A1 can be removed during the first dry cleaning. In this modified example, as described above, the inner peripheral part of the surface 111a of the first ring portion 110 of the edge ring 14 is inclined toward the surface 110a.

[0116] After careful consideration by the inventors, it was found that the distance H between the back surface D1c of the first dummy wafer D1 shown in Figure 14(b) and the surface of the electrostatic chuck 13 is preferably 2 mm or less. In other words, when this distance H is 2 mm or less, the plasma state does not change during the first dry cleaning, and the same cleaning effect as when the first dummy wafer D1 is placed on the electrostatic chuck 13 can be obtained.

[0117] Similarly, the second to fourth dry cleanings are also performed with the second to fourth dummy wafers D2 to D4 supported by the lifter 20 and separated from the electrostatic chuck 13. This exposes the shadowed regions A2 to A4, allowing the deposits adhering to these regions to be removed during each of the second to fourth dry cleanings.

[0118] In this modified example, the same effects as in the first embodiment can be enjoyed. That is, by performing the first to fourth dry cleaning processes, deposits adhering to the first to fourth shaded areas A1 to A4 can be removed.

[0119] In the first embodiment and its modifications described above, the first to fourth dry cleaning steps were performed to expose the shaded areas A1 to A4 and remove the deposits. However, the number of dry cleaning steps is not limited to these. At least two dry cleaning steps are sufficient. For example, if two dry cleaning steps are performed, the first and third dry cleaning steps described above may be used.

[0120] Furthermore, in the first embodiment and its modifications described above, the number of product wafers W to be subjected to plasma treatment in one lot was 25, but this is not limited to this. For example, one lot may consist of two or more wafers, or it may consist of just one wafer.

[0121] <Dry cleaning method according to the second embodiment> A dry cleaning method according to a second embodiment will be described. In the second embodiment, plasma treatment of a product wafer W and dry cleaning using a small-diameter dummy wafer Ds will be described.

[0122] As mentioned above, the small-diameter dummy wafer Ds used in the dry cleaning of the second embodiment is a wafer having a smaller diameter than the product wafer W. Figure 15 is a longitudinal cross-sectional view showing a schematic configuration of the small-diameter dummy wafer Ds, electrostatic chuck 13, and edge ring 14. Figure 16 is a plan view showing a schematic configuration of the small-diameter dummy wafer Ds, electrostatic chuck 13, and edge ring 14.

[0123] As shown in Figures 15 and 16, the diameter of the small-diameter dummy wafer Ds is the same as the inner diameter of the edge ring 14. In this case, the shaded region A is exposed without overlapping with the small-diameter dummy wafer Ds in a plan view. Note that the diameter of the small-diameter dummy wafer Ds is not limited to the illustrated example. The diameter of the small-diameter dummy wafer Ds should be greater than or equal to the diameter of the central part 100 of the electrostatic chuck 13 and less than or equal to the diameter of the product wafer W.

[0124] Figure 17 is an explanatory diagram illustrating the series of wafer processing steps according to the second embodiment, using a wafer.

[0125] (Step T11) In step T11, plasma processing is performed continuously on one lot, for example, 25 product wafers W. Step T11 is the same as step S11.

[0126] (Step T12) In step T12, dry cleaning is performed using a small-diameter dummy wafer Ds. Specifically, first, the small-diameter dummy wafer Ds is placed above the electrostatic chuck 13. At this time, the small-diameter dummy wafer Ds is positioned so that its center is at the same position as the center of the electrostatic chuck 13 in a plan view. This position of the small-diameter dummy wafer Ds is the cleaning position in this disclosure. In this case, the shaded area A of the edge ring 14 is exposed without overlapping with the small-diameter dummy wafer Ds in a plan view.

[0127] Next, the small-diameter dummy wafer Ds is placed on the electrostatic chuck 13 and then held in place by the electrostatic chuck 13. The subsequent dry cleaning method is the same as the first dry cleaning in step S12. That is, a plasma (containing radicals and ions) excited by the dry cleaning gas is used to remove deposits inside the chamber 10. At this time, deposits attached to the shadowed region A exposed from the small-diameter dummy wafer Ds are also removed. Dry cleaning is then performed.

[0128] After step T11, for example, steps T11 and T12 may be repeated. Alternatively, as shown in Figure 18, step T11 may be performed multiple times, that is, plasma treatment may be performed on multiple lots of product wafers W, and then step T12 may be performed.

[0129] As described above, in the second embodiment, deposits adhering to the shadow region A can be removed by performing dry cleaning using a small-diameter dummy wafer Ds. That is, as shown in Figure 4, deposits can be properly removed even in the shadow region A, which conventionally could not be removed because it was in the shadow of the dummy wafer D. In addition, in the second embodiment, the parts of the edge ring 14 surface 110a and 111a other than the shadow region A are exposed, and deposits adhering to these parts can also be properly removed. Therefore, since deposits can be removed from the entire surface 110a and 111a of the edge ring 14, particle generation can be suppressed, product yield can be improved, and the operating time of the plasma processing apparatus 1 can also be extended.

[0130] Through diligent research by the inventors, it was confirmed that deposits can be appropriately removed from the outer circumference of the small-diameter dummy wafer Ds at a radius greater than (φA / 2 - 0.4) mm relative to the diameter φA, thereby achieving a dry cleaning effect. Here, in the small-diameter dummy wafer Ds, the annular area of ​​0.4 mm in the radial direction coincides with the bevel portion (chamfered portion). Therefore, it can be inferred that a cleaning effect can be obtained even below the small-diameter dummy wafer Ds, as long as it is below the bevel portion.

[0131] The lower limit of the diameter φA of the small-diameter dummy wafer Ds is determined by the range in which the incidence of radicals and ions does not affect the central part 100 of the electrostatic chuck 13, i.e., (outer diameter of the central part 100 of the electrostatic chuck 13) / 2 ≤ (φA / 2 - 0.4). And generally, (outer diameter of the central part 100 of the electrostatic chuck 13) ≤ (inner diameter of the edge ring 14), so the left-hand inequality in equation (1) below holds. Furthermore, the upper limit of the diameter φA of the small-diameter dummy wafer Ds is determined by the radius of the product wafer W, i.e., the right-hand inequality in equation (1) below. {(Inner diameter of edge ring 14) / 2} ≤ {(Diameter of small dummy wafer Ds φA) / 2 - (Bevel length)} ≤ {(Diameter of product wafer W) / 2} ... (1)

[0132] Furthermore, after diligent investigation by the inventors, it was confirmed that when a small-diameter dummy wafer Ds is supported by the lifter 20 and dry-cleaned while separated from the electrostatic chuck 13, as shown in Figure 14(b), a dry-cleaning effect can be obtained even further inward than the bevel portion. In other words, in this case, a dry-cleaning effect can be obtained on the outer circumference side of a radius greater than (φA / 2-X) mm (where X is longer than the bevel length of 0.4 mm). Thus, it is presumed that the reason why the range over which a dry-cleaning effect can be obtained increases compared to when the small-diameter dummy wafer Ds is not lifted is that lifting the small-diameter dummy wafer Ds increases the range in which radicals and ions can be incident. Therefore, dry-cleaning may be performed with the small-diameter dummy wafer Ds lifted.

[0133] (Modified version of the second embodiment) In the second embodiment described above, after performing normal dry cleaning and then plasma treatment on one lot of product wafers W, dry cleaning may be performed using small-diameter dummy wafers Ds. Figure 19 is an explanatory diagram illustrating the series of wafer processing steps according to this modified example using wafers.

[0134] (Step T21) In step T21, plasma processing is performed continuously on one lot, for example, 25 product wafers W. Step T21 is the same as step S11.

[0135] (Step T22) In step T22, a fifth dry cleaning (normal dry cleaning) is performed using the fifth dummy wafer D5. This step T22 is the same as step S31.

[0136] (Step T23) In step T23, plasma processing is performed continuously on one lot, for example, 25 product wafers W. Step T23 is the same as step S11.

[0137] (Step T24) In step T24, dry cleaning is performed using a small-diameter dummy wafer Ds. This step T24 is the same as step T12.

[0138] After step T24, for example, steps T23 and T24 are repeated.

[0139] In this modified example, the same effects as in the second embodiment can be enjoyed. That is, by performing dry cleaning using a small-diameter dummy wafer Ds, deposits attached to the shadowed region A can be removed.

[0140] Furthermore, steps T22 and T23 may be performed multiple times, i.e., plasma treatment may be performed on multiple lots of product wafers W, before proceeding to step T24. In this case, if steps T22 and T23 are performed multiple times, deposits in the shadowed region A that cannot be removed in step T22 will accumulate. Therefore, in step T24, dry cleaning can be performed using a small-diameter dummy wafer Ds to remove the deposits in the shadowed region A.

[0141] Furthermore, in step T22 of this modified example, a fifth dry cleaning was performed using a fifth dummy wafer D5, but instead, so-called wafer-less dry cleaning may be performed.

[0142] Although the plasma processing apparatus 1 in the above embodiments was a capacitively coupled plasma processing apparatus, the plasma processing apparatus to which this disclosure applies is not limited thereto. For example, the plasma processing apparatus may be an inductively coupled plasma processing apparatus.

[0143] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The above embodiments may be omitted, replaced, or modified in various ways without departing from the scope and spirit of the appended claims. [Explanation of symbols]

[0144] 1. Plasma processing equipment 10 Chambers 11. Mounting platform 12 Lower electrode 31. Second high-frequency power supply 50 gas supply source groups 70 Control Unit D1 First dummy wafer D2 Second dummy wafer

Claims

1. A method for cleaning a capacitively coupled plasma processing apparatus, (a) A step of placing a product substrate in a processing position relative to the aforementioned mounting platform inside a chamber having a mounting platform including an upper electrode and a lower electrode, and performing plasma treatment on the product substrate, (b) A step of placing a first dummy substrate having a diameter smaller than the diameter of the product substrate inside the chamber at a first position relative to the stand described above, and performing a first dry cleaning inside the chamber, (c) The process includes placing a second dummy substrate in a second position relative to the aforementioned mounting stand inside the chamber, and performing a second dry cleaning inside the chamber, The center of the processing position and the center of the first position are, in a plan view, at the same position as the center of the base described above. The diameter of the second dummy substrate is the same as the diameter of the product substrate. A method for cleaning a plasma processing apparatus, wherein the center of the second position is the same as the center of the base described above in a plan view.

2. A first sequence in which step (a) is performed multiple times, followed by step (c), A second sequence in which step (a) is performed multiple times, followed by step (b), is included. A method for cleaning a plasma processing apparatus according to claim 1, wherein the first sequence is performed multiple times, and then the second sequence is performed.

3. A method for cleaning a capacitively coupled plasma processing apparatus, (a) A step of placing a product substrate in a processing position relative to the aforementioned mounting platform inside a chamber having a mounting platform including an upper electrode and a lower electrode, and performing plasma treatment on the product substrate, (b) A step of placing a first dummy substrate having a diameter smaller than the diameter of the product substrate inside the chamber at a first position relative to the stand described above, and performing a first dry cleaning inside the chamber, (d) The process includes performing a second dry cleaning inside the chamber without placing a dummy substrate on the stand described above inside the chamber, A method for cleaning a plasma processing apparatus, wherein the center of the processing position and the center of the first position are, in a plan view, at the same position as the center of the stand described above.

4. A first sequence in which step (a) is performed multiple times, followed by step (d), A second sequence in which step (a) is performed multiple times, followed by step (b), is included. A method for cleaning a plasma processing apparatus according to claim 3, wherein the first sequence is performed multiple times, and then the second sequence is performed.

5. A method for cleaning a capacitively coupled plasma processing apparatus, (a) A step of placing a product substrate in a processing position relative to the aforementioned mounting platform inside a chamber having a mounting platform including an upper electrode and a lower electrode, and performing plasma treatment on the product substrate, (b) The process includes placing a first dummy substrate having a diameter smaller than the diameter of the product substrate inside the chamber at a first position relative to the stand described above, and performing a first dry cleaning inside the chamber, The center of the processing position and the center of the first position are, in a plan view, at the same position as the center of the base described above. The mounting table includes a holding member that holds the product substrate at the processing position, The holding member is configured such that the surface of the central portion is higher than the surface of the outer periphery, and when the product substrate is placed on the surface of the central portion, the peripheral edge of the product substrate protrudes from the central portion of the holding member. A method for cleaning a plasma processing apparatus, wherein the diameter of the first dummy substrate is larger than the diameter of the central part of the holding member.

6. The cleaning method for a plasma processing apparatus according to claim 5, wherein the diameter of the first dummy substrate is the same as the inner diameter of the edge ring placed on the surface of the outer periphery of the holding member.

7. A method for cleaning a capacitively coupled plasma processing apparatus, (a) A step of placing a product substrate in a processing position on the aforementioned mounting platform inside a chamber having a mounting platform including an upper electrode and a lower electrode, and performing a plasma etching process on the product substrate, (b) The process includes placing a first dummy substrate having a diameter smaller than the diameter of the product substrate inside the chamber at a first position relative to the stand described above, and performing a first dry cleaning inside the chamber, A method for cleaning a plasma processing apparatus, wherein the center of the processing position and the center of the first position are, in a plan view, at the same position as the center of the stand described above.

8. The method for cleaning a plasma processing apparatus according to claim 7, wherein the plasma etching process includes a step of supplying bias power to the lower electrode.

9. A method for cleaning a capacitively coupled plasma processing apparatus, (a) A step of placing a product substrate in a processing position relative to the aforementioned mounting platform inside a chamber having a mounting platform including an upper electrode and a lower electrode, and performing plasma treatment on the product substrate, (b) The process includes placing a first dummy substrate having a diameter smaller than the diameter of the product substrate inside the chamber at a first position relative to the stand described above, and performing a first dry cleaning inside the chamber, The center of the processing position and the center of the first position are, in a plan view, at the same position as the center of the base described above. The plasma treatment is performed with the product substrate placed on the mounting surface of the stand described above. The first dry cleaning is a cleaning method for a plasma processing apparatus, wherein the first dummy substrate is separated from the aforementioned mounting surface.

10. A method for cleaning a plasma processing apparatus according to any one of claims 1 to 9, wherein step (a) is performed multiple times, and then step (b) is performed.

11. The cleaning method for a plasma processing apparatus according to any one of claims 1 to 9, wherein steps (a) and (b) are performed under a reduced pressure environment.

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