Protective relay device

Abstract

To provide a protective relay device capable of efficient calculation processing.SOLUTION: A protective relay device that controls each of a plurality of external apparatuses provided at a plurality of locations in a power transmission facility that transmits electric power, and includes a memory, a CPU that is provided to be accessible to the memory and performs predetermined arithmetic processing based on data stored in the memory, an inter-board communication control unit for performing data exchange with some of the plurality of external apparatuses through inter-board communication using a first area of the memory, and an inter-unit communication control unit that is provided correspondingly to an expansion unit that performs data exchange with the remaining external apparatuses of the plurality of external apparatuses through inter-board communication, and performs data exchange with the expansion unit through inter-unit communication using a second area of the memory.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a protection relay device.

Background Art

[0002] The hardware configuration within a protection relay device generally has a relay operation board and an I / O board connected in a 1:N manner, and aggregates the input / output information of external devices to the relay operation board through inter-board communication.

[0003] When applied to a system with a large number of connection points to external devices such as a bus protection device, it is difficult for one protection relay unit to cover all connections to external devices, and a device configuration with an extended unit is required.

[0004] In this regard, in Patent Document 1, as a protection relay device, there is a base unit and an additional unit, and application examples regarding the connection method to external devices (instrument transformers, circuit breakers, etc.) and the physical method (wireless, optical fiber, etc.) for communication between units are disclosed.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] On the other hand, it is a device configuration that incorporates an extended unit according to the number of connection points to external devices. However, in bus protection, there are requirements such as high-speed disconnection during an accident, and protection relay performance equivalent to that of a single-unit configuration is also required in the extended unit configuration.

[0007] Due to the characteristics of protective relays, relay calculation processing, including the exchange of I / O information data, must be performed at the electrical angle period. Therefore, even in device configurations with expansion units, reducing the time required for the exchange of I / O information data with the relay calculation board is a challenge in ensuring the performance of protective relays.

[0008] This disclosure aims to solve the above-mentioned problems and to provide a protective relay device capable of efficient computational processing. [Means for solving the problem]

[0009] A protective relay device for controlling multiple external devices, each provided at multiple locations in a power transmission facility that transmits power according to a certain disclosure, comprising: a memory; a CPU provided to be accessible from the memory and which performs predetermined arithmetic processing based on data stored in the memory; an inter-board communication control unit for performing data exchange between some of the multiple external devices by inter-board communication using a first area of ​​the memory; and an inter-unit communication control unit provided in correspondence with an expansion unit that performs data exchange between the remaining external devices of the multiple external devices by inter-board communication and which performs data exchange between the expansion unit by inter-unit communication using a second area of ​​the memory. [Effects of the Invention]

[0010] A protective relay device conforming to a certain disclosure enables efficient computational processing. [Brief explanation of the drawing]

[0011] [Figure 1] This is a diagram illustrating a protective relay device 10 according to Embodiment 1. [Figure 2] This diagram illustrates the relay calculation board RCA, expansion boards RCB and RCC according to Embodiment 1. [Figure 3] This figure illustrates the data information stored in the memory 12 according to Embodiment 1. [Figure 4]This is a timing chart for explaining the data reception processing flow according to Embodiment 1. [Figure 5] This is a timing chart for explaining the data transmission processing flow according to Embodiment 1. [Figure 6] This is a timing chart for explaining a predetermined arithmetic processing according to Embodiment 1. [Figure 7] This is a diagram for explaining the memory map regarding Embodiment 2.

Embodiments for Carrying Out the Invention

[0012] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following, the same or corresponding parts in the drawings are denoted by the same reference numerals, and the description thereof will not be repeated in principle.

[0013] Embodiment 1. FIG. 1 is a diagram for explaining a protection relay device 10 according to Embodiment 1.

[0014] Referring to FIG. 1, the protection relay device 10 is a device that controls a plurality of external devices respectively provided at a plurality of locations of power transmission facilities for power transmission.

[0015] Specifically, as the external device group 100, external devices respectively provided at a plurality of locations of the power transmission facilities are provided. Examples of the external devices include instrument transformers, circuit breakers, CBs, Ls, etc. In addition, other devices may also be provided as external devices.

[0016] The protection relay device 10 has a plurality of I / O boards provided so as to be connectable to various external devices.

[0017] The protection relay device 10 includes expansion units RB and RC in addition to the main relay unit RA. By providing the expansion units RB and RC, it is possible to increase the number of connection points to external devices.

[0018] The relay unit RA includes a relay operation circuit board RCA, a power supply circuit board VA, and a plurality of I / O circuit boards FA1 to FAN.

[0019] The plurality of I / O circuit boards FA1 to FAN are provided so as to be connectable to external devices among the external device group 100.

[0020] The power supply circuit board VA supplies a power supply voltage to the relay unit RA. The relay operation circuit board RCA is a controller of the protection relay device 10, aggregates various information, and executes predetermined arithmetic processing.

[0021] The relay operation circuit board RCA is provided so as to be communicable with the plurality of I / O circuit boards FA1 to FAN via inter-board communication.

[0022] Also, the relay operation circuit board RCA is provided so as to be communicable with the extension units RB and RC via inter-unit communication.

[0023] The relay unit RB includes an extension circuit board RCB, a power supply circuit board VB, and a plurality of I / O circuit boards FB1 to FBM.

[0024] The plurality of I / O circuit boards FB1 to FBM are provided so as to be connectable to external devices among the external device group 100.

[0025] The power supply circuit board VB supplies a power supply voltage to the extension unit RB. The extension circuit board RCB is provided so as to be communicable with the relay operation circuit board RCA via inter-unit communication. The extension circuit board RCB executes data transfer via inter-board communication through the I / O circuit boards FB1 to FBM connected to external devices.

[0026] The relay unit RC includes an extension circuit board RCC, a power supply circuit board VC, and a plurality of I / O circuit boards FC1 to FCL.

[0027] The plurality of I / O circuit boards FC1 to FCL are provided so as to be connectable to external devices among the external device group 100.

[0028] The power supply board VC supplies power voltage to the expansion unit RC. The expansion board RCC is configured to communicate with the relay calculation board RCA via inter-unit communication. The expansion board RCC performs data exchange via inter-board communication through I / O boards FC1~FCL, which are connected to external devices.

[0029] Figure 2 illustrates the relay calculation board RCA, expansion board RCB, and RCC according to Embodiment 1.

[0030] Referring to Figure 2, the relay calculation board RCA includes a relay CPU 1, a memory 12, an inter-board communication controller unit 14, and inter-unit communication controller units 16 and 18.

[0031] The relay CPU 1 is provided to access the memory 12 and performs various calculation processes in the protective relay device 10 based on the data stored in the memory 12.

[0032] The board-to-board communication controller unit 14 performs data exchange via board-to-board communication with multiple external devices connected via multiple I / O boards FA1 to FAN.

[0033] In this example, the relay unit area 12A provided in the memory 12 is provided as the storage area for the relay unit RA.

[0034] The relay unit area 12A stores data exchanged via inter-board communication with multiple external devices connected via multiple I / O boards FA1 to FAN. The relay unit area 12A also stores data to be transmitted to multiple external devices connected via multiple I / O boards FA1 to FAN.

[0035] The inter-unit communication controller units 16 and 18 are provided in accordance with the expansion boards RCB and RCC, respectively.

[0036] The inter-unit communication controller units 16 and 18 perform data exchange with the expansion boards RCB and RCC of the expansion units RB and RC via inter-unit communication.

[0037] In this example, the expansion unit area 12B provided in memory 12 is provided as the storage area for the expansion unit RB.

[0038] The expansion unit area 12B stores data exchanged between the expansion unit RB and multiple external devices connected via multiple I / O boards FB1 to FBM through board-to-board communication. The expansion unit area 12B also stores data to be transmitted via inter-unit communication to multiple external devices connected to the expansion unit RB via multiple I / O boards FB1 to FBM.

[0039] Furthermore, an expansion unit area 12C provided in memory 12 is provided as a storage area for the expansion unit RC.

[0040] The expansion unit area 12C stores data exchanged between the expansion unit RC and multiple external devices connected via multiple I / O boards FC1 to FCL through board-to-board communication. The expansion unit area 12C also stores data to be transmitted via inter-unit communication to multiple external devices connected to the expansion unit RC via multiple I / O boards FC1 to FCL.

[0041] The expansion board RCB includes an inter-unit communication controller unit 20, a memory 22, and an inter-board communication controller unit 24.

[0042] The inter-unit communication controller unit 20 performs inter-unit communication with the inter-unit communication controller unit 16.

[0043] The board-to-board communication controller unit 24 performs board-to-board communication with multiple external devices connected via multiple I / O boards FB1 to FBM of the expansion unit RB.

[0044] Memory 22 is a temporary storage area for performing data exchange between the inter-unit communication controller unit 20 and the inter-board communication controller unit 24.

[0045] The expansion board RCC includes an inter-unit communication controller unit 30, a memory 32, and an inter-board communication controller unit 34.

[0046] The inter-unit communication controller unit 30 performs inter-unit communication with the inter-unit communication controller unit 18.

[0047] The board-to-board communication controller unit 34 performs board-to-board communication with multiple external devices connected via multiple I / O boards FC1 to FCL of the expansion unit RC.

[0048] Memory 32 is a temporary storage area for performing data exchange between the inter-unit communication controller unit 30 and the inter-board communication controller unit 34.

[0049] Figure 3 is a diagram illustrating the data information stored in the memory 12 according to Embodiment 1.

[0050] Referring to Figure 3, the data can be broadly divided into an upstream route and a downstream route. The upstream route information is data information from the I / O side to the CPU side. The downstream route information is data information from the CPU side to the I / O side.

[0051] Let me explain the uphill route. The relay unit RA receives input information from external devices (AI (Analog Input) data and DI (Digital Input) data) and external error information from the I / O board FA1~FAN. Specifically, it receives AI data via the AI ​​board within the I / O board FA1~FAN. It also receives DI data via the DI board within the I / O board FA1~FAN. In addition, the relay unit RA receives external error information such as abnormalities in various I / O boards FA1~FAN and abnormalities in the power supply board VA within the device (such as power supply failure).

[0052] The expansion unit RB receives input information from external devices (AI (Analog Input) data and DI (Digital Input) data) and external error information from the I / O boards FB1 to FAM. Specifically, it receives AI data via the AI ​​board within the I / O boards FB1 to FBM. It also receives DI data via the DI board within the I / O boards FB1 to FBM. Furthermore, the expansion unit RB receives external error information such as abnormalities in various I / O boards FB1 to FBM and abnormalities in the power supply board VB within the device (e.g., power failure).

[0053] The expansion unit RC receives input information from external devices (AI (Analog Input) data and DI (Digital Input) data) and external error information from the I / O boards FC1 to FCL. Specifically, it receives AI data via the AI ​​board within the I / O boards FC1 to FCL. It also receives DI data via the DI board within the I / O boards FC1 to FCL. Furthermore, the expansion unit RC receives external error information such as abnormalities in various I / O boards FC1 to FCL and abnormalities in the power supply board VC within the device (such as power supply failure).

[0054] Regarding the data for the uphill route, by including not only input information from external devices but also error information from the I / O board and abnormal information from the expansion unit power supply, the relay CPU1 can identify and distinguish abnormal parts of the expansion unit.

[0055] Let me explain the downhill route. The relay unit RA outputs output information (DO (Digital Output) data) to external devices, as well as configuration information and synchronization information to the I / O board FA1-FAN. Specifically, it outputs DO data via the DO board within the I / O board FA1-FAN. In addition, the relay unit RA outputs initial setting information such as configuration and synchronization information, such as synchronization timing settings for the I / O board, to the I / O board FA1-FAN as configuration information.

[0056] For example, synchronization information is information that adjusts the sampling timing between units. Initial setting information such as configuration is setting information that determines the initial state (configuration) of each I / O board, and it may also be notified by including it in the payload in the same format. If you want to send synchronization information or initial setting information at a different timing than the output data information, it is not necessary to send the downlink route in a single frame, but you can split it up and send it at the desired timing.

[0057] The expansion unit RB outputs output information (DO (Digital Output) data), configuration information, and synchronization information to the I / O boards FB1 to FBM. Specifically, it outputs DO data via the DO board within the I / O boards FB1 to FBM. The relay unit RA outputs initial setting information such as configuration and synchronization information, such as synchronization timing settings for the I / O boards, to the I / O boards FB1 to FBM.

[0058] The expansion unit RC outputs output information (DO (Digital Output) data), configuration information, and synchronization information to the I / O boards FC1 to FCL. Specifically, it outputs DO data via the DO board within the I / O boards FC1 to FCL. The relay unit RA outputs initial setting information such as configuration and synchronization information, such as synchronization timing settings for the I / O boards, to the I / O boards FC1 to FCL.

[0059] Figure 4 is a timing chart illustrating the data reception processing flow according to Embodiment 1.

[0060] Referring to Figure 4, the protective relay device 10 performs processing at predetermined intervals. Data transmission and reception can be performed in parallel. If a serial bidirectional communication (full-duplex) specification is used, there is no need to worry about uplink / downlink conflicts.

[0061] In this example, the case where the sampling is performed at time T1 and T2 is shown.

[0062] Specifically, relay unit RA, expansion units RB and RC receive data from external devices connected to the I / O board via inter-board communication according to a predetermined cycle.

[0063] For example, the inter-board communication controller unit 14 of the relay unit RA receives data from external devices connected to the I / O boards FA1 to FAN via inter-board communication.

[0064] The inter-board communication controller unit 14 stores the received data in the relay unit area 12A of the memory 12.

[0065] Furthermore, the board-to-board communication controller unit 24 of the expansion unit RB receives data from external devices connected to the I / O boards FB1 to FBM via board-to-board communication. The board-to-board communication controller unit 24 stores the received data in the memory 22. Next, the unit-to-unit communication controller unit 20 aggregates the received data stored in the memory 22 into a communication frame for unit-to-unit communication and transmits it to the relay unit RA.

[0066] The inter-unit communication frame consists of a flag section, a header section, a payload section, and an FCS (Frame Check Sequence) section. The payload section contains the data received by the I / O board. By consolidating the data into a communication frame, it is possible to efficiently send and receive data, thereby reducing communication time.

[0067] The inter-unit communication controller unit 16 of the relay unit RA stores the received communication frame in the extended unit area 12B of the memory 12.

[0068] Furthermore, the board-to-board communication controller unit 34 of the expansion unit RC receives data from external devices connected to the I / O boards FC1 to FCL via board-to-board communication. The board-to-board communication controller unit 34 stores the received data in the memory 32. Next, the unit-to-unit communication controller unit 20 aggregates the received data stored in the memory 32 into a communication frame for unit-to-unit communication and transmits it to the relay unit RA.

[0069] The inter-unit communication controller unit 18 of the relay unit RA stores the received communication frame in the extended unit area 12C of the memory 12.

[0070] Inter-unit communication takes place between the inter-unit communication controllers. The exchanged data is then stored in memory. This allows the relay CPU 1 to perform efficient calculations without needing to allocate communication time, even when expansion units are added.

[0071] Furthermore, if the data length of the payload is short and there is sufficient capacity in the inter-unit communication section, a data retransmission function may be provided to improve transmission reliability.

[0072] At the next time T2, the relay CPU 1 accesses memory 12 and retrieves the data in bulk through a memory read operation. Specifically, it retrieves the received data stored in the relay unit area 12A, the expansion unit area 12B, and the expansion unit area 12C, and performs predetermined processing based on the retrieved data. In this example, the case where the relay CPU 1 accesses memory 12 and performs a memory read operation at time T2 has been described, but the memory read operation may also be performed at time T1.

[0073] Furthermore, as explained above, at time T1, relay unit RA, expansion units RB and RC receive data from external devices connected to the I / O board via inter-board communication and repeat the above process.

[0074] In this example, between time T1 and time T2, the inter-board communication controller unit 14 stores the received data in the relay unit area 12A of the memory 12. Additionally, the inter-unit communication controller units 16 and 18 store the data received from external devices via expansion units RB and RC in the expansion unit areas 12B and 12C of the memory 12.

[0075] Therefore, the relay CPU 1 can perform operations other than data transmission and reception, except for the process of reading data in bulk during memory read operations. This enables efficient computation even when the protective relay device incorporates an expansion unit, and ensures the performance of the protective relay.

[0076] Figure 5 is a timing chart illustrating the data transmission process flow according to Embodiment 1.

[0077] Referring to Figure 5, the protective relay device 10 performs processing at predetermined intervals. In this example, the case where the sampling is performed at time T1 and T2 is shown.

[0078] Specifically, relay unit RA, expansion units RB and RC transmit data from external devices connected to the I / O board via inter-board communication according to a predetermined cycle.

[0079] For example, the inter-board communication controller unit 14 of the relay unit RA transmits data to external devices connected to the I / O boards FA1 to FAN via inter-board communication.

[0080] Specifically, the inter-board communication controller unit 14 sequentially transmits the data stored in the relay unit area 12A of the memory 12.

[0081] Furthermore, the board-to-board communication controller unit 24 of the expansion unit RB transmits data to external devices connected to the I / O boards FB1 to FBM via board-to-board communication.

[0082] Specifically, the inter-board communication controller unit 24 sequentially transmits the data stored in the expansion unit area 12B of the memory 22.

[0083] Furthermore, the board-to-board communication controller unit 34 of the expansion unit RC transmits data to external devices connected to the I / O boards FC1 to FCL via board-to-board communication.

[0084] Specifically, the inter-board communication controller unit 34 sequentially transmits the data stored in the expansion unit area 12C of the memory 32.

[0085] Between time T1 and time T2, the relay CPU1 writes data to be transmitted to an external device via memory write processing to the relay unit area 12A, the expansion unit area 12B, and the expansion unit area 12C, respectively, all at once.

[0086] The inter-unit communication controller unit 16 transmits the data stored in the expanded unit area 12B to the expanded unit RB via inter-unit communication.

[0087] The inter-unit communication controller unit 20 of the expansion unit RB receives data transmitted from the inter-unit communication controller unit 16 and stores it in the memory 22.

[0088] The inter-unit communication controller unit 18 transmits data stored in the extended unit area 12C to the extended unit RC via inter-unit communication.

[0089] The inter-unit communication controller unit 30 of the expansion unit RC receives data transmitted from the inter-unit communication controller unit 18 and stores it in the memory 32.

[0090] Then, at the next time T2, the inter-board communication controller unit 14 sequentially transmits data via inter-board communication to external devices connected to I / O boards FA1 to FAN, as described above. The inter-board communication controller unit 24 sequentially transmits data via inter-board communication to external devices connected to I / O boards FB1 to FBM. The inter-board communication controller unit 34 sequentially transmits data via inter-board communication to external devices connected to I / O boards FC1 to FCL.

[0091] In this example, between time T1 and time T2, the board-to-board communication controller unit 14 transmits data stored in the relay unit area 12A of the memory 12. The unit-to-unit communication controller units 16 and 18 transmit data to external devices stored in the expansion unit areas 12B and 12C of the memory 12 via unit-to-unit communication. Therefore, the relay CPU 1 can perform processing other than data transmission and reception, except for the batch writing process in memory write processing. This enables efficient arithmetic processing even when the protective relay device incorporates expansion units, ensuring the performance of the protective relay.

[0092] Figure 6 is a timing chart illustrating a predetermined calculation process according to Embodiment 1.

[0093] Refer to Figure 6, which shows an example of the processing of relay CPU1 at time T2. The relay CPU 1 retrieves the data stored in memory 12 in a batch using a memory read operation. Then, it stores the retrieved data (AI data as an example) in a queue (a). If multiple queues are provided, it performs fault mode determination processing based on the AI ​​data stored in the multiple queues (b). In this example, the normal state is shown.

[0094] Relay CPU 1 transmits the judgment result data (for example, DO data) via the downlink route (c). For example, relay CPU 2 executes the above-mentioned fault mode judgment process at predetermined intervals as an example of predetermined calculation processing. Note that other data may be transmitted, not just the judgment result data. For example, digital output information such as display output may be transmitted.

[0095] In this example, the processing at times Tm, Tm+1, and Tn is shown. At time Tm, the relay CPU 1 retrieves the data stored in memory 12 in a batch using a memory read operation. Then, it stores the retrieved data (AI data as an example) in a queue (a). If multiple queues are provided, it performs fault mode determination processing based on the AI ​​data stored in the multiple queues (b). Next, the relay CPU 1 transmits the determination result data (normal as an example) via the downlink route (c).

[0096] Relay CPU1 performs the same processing as described above at time Tm+1. On the other hand, at time Tn, the relay CPU 1 retrieves the data stored in memory 12 in a batch using a memory read operation. Then, it stores the retrieved data (AI data as an example) in a queue (a). If multiple queues are provided, it performs accident mode determination processing based on the AI ​​data stored in the multiple queues (b). In this example, the case of accident detection is shown. Next, the relay CPU 1 transmits a Trip command via the downlink route according to the determination result data (accident detection as an example).

[0097] This makes it possible, for example, to activate a circuit breaker, which is an external device, and stop the power supply.

[0098] Embodiment 2. In the above-described embodiment 1, a configuration was described in which the memory 12 is divided into storage areas for each unit, such as relay unit area 12A, expansion unit area 12B, and expansion unit area 12C.

[0099] In this example, we will describe a configuration that enables even more efficient arithmetic processing by optimizing the memory area within a single memory 12.

[0100] Figure 7 is a diagram illustrating the memory map for Embodiment 2. Referring to Figure 7, memory 12 is divided into two areas: one for storing data information for the uphill route and another for storing data information for the downhill route.

[0101] In the area where data information for the uphill route is stored, storage areas are pre-allocated for each of the relay units RA, expansion units RB, and RC.

[0102] In the area where data information for the downhill route is stored, storage areas are pre-allocated for each of the relay units RA, expansion units RB, and RC.

[0103] As shown in this example, by forming a memory map, the relay CPU 1 can, for example, obtain all the data from the relay unit RA, expansion unit RB, and RC at once by specifying the start address and end address only once when performing a memory read operation on memory 12.

[0104] When performing a memory write operation, the relay CPU 1 can write all the data from the relay unit RA, expansion unit RB, and RC to memory 12 in one go by specifying the start address and end address only once.

[0105] This configuration enables high-speed memory read and write operations, allowing the protective relay device 10 to perform efficient calculations.

[0106] Since the amount of data handled by the relay CPU 1 at regular intervals is large, a serial bus (such as PCIe) capable of high capacity and high-speed communication may be used between the relay CPU 1 and the memory 12. A characteristic of high-speed serial buses is that they are suitable for sending or receiving large amounts of data in a single batch. The relay CPU 1 may also use DMA (Direct Memory Access) functionality to perform other processes in parallel during data transfer to ensure the time required for data transfer.

[0107] To allow for flexible memory expansion when adding expansion units, the memory map can be designed accordingly. For example, the initial addresses for both upstream and downstream memory can be left open to some extent.

[0108] Each embodiment disclosed herein is intended to be implemented in appropriate combinations, to the extent that they do not contradict each other. The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of this disclosure is indicated by the claims rather than by the foregoing description, and all modifications within the meaning and scope equivalent to the claims are intended. [Explanation of symbols]

[0109] 1 Protective relay device, 12, 22, 32 Memory, 12A Relay unit area, 12B, 12C Expansion unit area, 14, 24, 34 Inter-board communication controller section, 16, 18, 20, 30 Inter-unit communication controller section, 100 External device group.

Claims

1. A protective relay device that controls multiple external devices installed at multiple locations in a power transmission facility that transmits electricity, Memory and A CPU is provided so as to be able to access the memory and executes predetermined arithmetic processing based on the data stored in the memory, A board-to-board communication control unit for performing data exchange between some of the multiple external devices using a first area of ​​the memory via board-to-board communication, The system includes an expansion unit that performs data exchange with the remaining external devices of the plurality of external devices via board-to-board communication, and an inter-unit communication control unit that performs data exchange with the expansion unit via inter-unit communication using a second area of ​​the memory, The storage area of ​​the memory is allocated to each expansion unit. The CPU is a protective relay device that acquires data in bulk from the memory storage area allocated to each expansion unit.

2. A protective relay device for controlling a plurality of external devices provided at a plurality of locations in a power transmission facility that transmits electricity, Memory and A CPU is provided so as to be able to access the memory and executes predetermined arithmetic processing based on the data stored in the memory, A board-to-board communication control unit for performing data exchange between some of the multiple external devices using a first area of ​​the memory via board-to-board communication, The system includes an expansion unit that performs data exchange with the remaining external devices of the plurality of external devices via board-to-board communication, and an inter-unit communication control unit that performs data exchange with the expansion unit via inter-unit communication using a second area of ​​the memory, The storage area of ​​the memory is allocated to each expansion unit. The CPU is a protective relay device that writes data in a batch to the memory storage area allocated to each expansion unit.

3. The protective relay device according to claim 1 or 2, wherein the inter-unit communication control unit receives aggregated data from the remaining external devices from the expansion unit at predetermined intervals.

4. The protective relay device according to claim 1 or 2, wherein the inter-unit communication control unit transmits the combined data to the remaining external devices to the expansion unit at predetermined intervals.

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