Charging control circuit

Abstract

To enhance workability and productivity in an assembly process of a battery pack.SOLUTION: A charging control circuit 10 includes: cell voltage detection terminals VC1, VC2, VC3 detecting cell voltages of a power storage stack 3 that includes a plurality of cells connected in series with each other; cell overcharge detectors 11, 12, 13 each detecting the overcharge of the cell based on a potential of the cell voltage detection terminal; a terminal state detector 16 detecting a connection state between the power storage stack and the cell overcharge detector via the cell voltage detection terminal based on the potential of the cell voltage detection terminal; a clocking unit 170 measuring a duration of an overcharging state of the cell based on a detection result of the cell overcharge detector; a threshold setting section setting a threshold of the duration based on the detection results of the terminal state detector; and a charging control section suppressing charging to the power storage stack when the duration measured by the clocking unit exceeds the threshold set by the threshold setting section.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a charge control circuit.

Background Art

[0002] Conventionally, in a charge control device for a storage battery (secondary battery), a circuit has been proposed that cuts off the charge / discharge path by performing control to fuse a fuse on the charge / discharge path when an excessive voltage occurs (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] A storage battery may be configured as an assembled battery in which a plurality of secondary battery cells are connected in series to each other. In the assembly process of such an assembled battery, there is a cell incorporation process in which the plurality of secondary battery cells are sequentially incorporated one by one and the secondary battery cells are connected to each other. According to the conventional charge control device as described above, overvoltage may be detected in the cell incorporation process. In this case, the protection circuit may malfunction and the fuse may be blown, resulting in in-process defects, so there is a risk that workability and productivity will decrease.

[0005] The present invention has been made in view of such a situation, and an object thereof is to provide a charge control circuit that can improve workability and productivity by suppressing malfunction of the protection circuit in the assembly process of an assembled battery.

Means for Solving the Problems

[0006] The charge control circuit according to one aspect of the present invention is for a battery stack including a plurality of cells connected in series to each other The voltage of each of the aforementioned multiple cells is detected individually, with a number corresponding to the number of cells. cell voltage detection terminals, and the each Based on the potential of the cell voltage detection terminal, each Overcharging of the cell Individually Detect , a number corresponding to the number of cells Cell overcharge detection unit and the each Based on the potential of the cell voltage detection terminal, the connection state between the battery stack and the cell overcharge detection unit via the cell voltage detection terminal is detected. , a number corresponding to the number of cells The system includes a terminal state detection unit, a timing unit that measures the duration of the overcharged state of the cell based on the detection result of the cell overcharge detection unit, a threshold setting unit that sets a threshold for the duration based on the detection result of the terminal state detection unit, and a charge control unit that suppresses charging of the battery stack when the duration measured by the timing unit exceeds the threshold set by the threshold setting unit. [Effects of the Invention]

[0007] According to the present invention, it is possible to improve work efficiency and productivity in the assembly process of battery packs. [Brief explanation of the drawing]

[0008] [Figure 1] This figure shows an example of the functional configuration of the battery device in this embodiment. [Figure 2] This figure shows an example of the circuit configuration of the charging control circuit of this embodiment. [Figure 3] This figure shows an example of the operation flow of the control circuit in the charging control circuit of this embodiment. [Modes for carrying out the invention]

[0009] The configuration of the battery device 1 will be described with reference to Figure 1. Figure 1 shows an example of the functional configuration of a battery device 1 according to an embodiment of the present invention. The battery device 1 comprises an EB+ (positive) terminal, an EB- (negative) terminal, a charge control device 2, and a battery pack 3. A load (not shown) or an external power source (not shown) is connected between the EB+ and EB- terminals. When a load is connected between the EB+ and EB- terminals, the battery device 1 functions as a power supply device that supplies power to the load. When an external power source is connected between the EB+ and EB- terminals, the battery device 1 functions as an energy storage device that charges the battery pack 3 with power supplied from the external power source.

[0010] The battery pack 3 comprises multiple cells connected in series with each other. The number of cells in series of the battery pack 3 is appropriately selected according to the application and performance of the battery device 1. In this embodiment, the case in which the battery pack 3 consists of three cells, the first cell 31, the second cell 32, and the third cell 33, connected in series in the order described, will be explained as an example.

[0011] Specifically, the positive terminal of the first cell 31 is connected to the EB+ terminal via the first fuse 23 and the second fuse 24, which will be described later. The negative terminal of the first cell 31 is connected to the positive terminal of the second cell 32. The negative terminal of the second cell 32 is connected to the positive terminal of the third cell 33. The negative terminal of the third cell 33 is connected to the EB- terminal. Note that battery pack 3 is also called a battery stack.

[0012] As an example of a charge control device of this embodiment, the charge control device 2 comprises a charge stop circuit and a charge control circuit 10. The charge stop circuit comprises a switch element 21, a resistor 22, a first fuse 23, and a second fuse 24.

[0013] The first fuse 23 and the second fuse 24 are connected in series with each other. Specifically, one end of the second fuse 24 is connected to the EB+ terminal. The other end of the second fuse 24 is connected to one end of the first fuse 23. The other end of the first fuse 23 is connected to the + terminal of the first cell 31.

[0014] The switch element 21 is, for example, an N-channel field effect transistor having a gate terminal, a source terminal, and a drain terminal. The gate terminal is connected to the CO terminal of the charge control circuit 10 described later. The source terminal is connected to the EB- terminal. The drain terminal is connected to one end of the resistor 22. The switch element 21 controls the on / off state between the source terminal and the drain terminal based on the signal output from the CO terminal. The other end of the resistor 22 is connected to the connection part between the first fuse 23 and the second fuse 24.

[0015] [Overcharge detection circuit] The charge control circuit 10 includes power supply terminals (VDD terminal and VSS terminal), an output terminal (CO terminal), a number of cell voltage detection terminals corresponding to the number of series cells of the assembled battery 3, and an overcharge detection circuit. The VDD terminal is connected to the + (plus) pole side of the first cell 31. The VSS terminal is connected to the - (minus) pole side of the third cell 33.

[0016] In an example of this embodiment, the charge control circuit 10 includes three cell voltage detection terminals corresponding to the number of series cells of the assembled battery 3, specifically, a VC1 terminal, a VC2 terminal, and a VC3 terminal. The VC1 terminal is connected to the + pole side of the first cell 31. The VC2 terminal is connected to the - pole side of the first cell 31 and the + pole side of the second cell 32. The VC3 terminal is connected to the - pole side of the second cell 32 and the + pole side of the third cell 33. The potential difference between the electrodes of the first cell 31 appears between the VC1 terminal and the VC2 terminal. The potential difference between the electrodes of the second cell 32 appears between the VC2 terminal and the VC3 terminal. The potential difference between the electrodes of the third cell 33 appears between the VC3 terminal and the VSS terminal.

[0017] Also, in an example of this embodiment, the charge control circuit 10 includes three overcharge detection circuits corresponding to the number of series cells of the assembled battery 3, specifically, a first overcharge detection circuit 11, a second overcharge detection circuit 12, and a third overcharge detection circuit 13.

[0018] The first overcharge detection circuit 11 detects the overcharged state of the first cell 31 based on the potential difference between the VC1 terminal and the VC2 terminal. The second overcharge detection circuit 12 detects the overcharged state of the second cell 32 based on the potential difference between the VC2 terminal and the VC3 terminal. The third overcharge detection circuit 13 detects the overcharged state of the third cell 33 based on the potential difference between the VC3 terminal and the VSS terminal.

[0019] The output terminals of the first overcharge detection circuit 11, the second overcharge detection circuit 12, and the third overcharge detection circuit 13 are connected to the input terminals of the overcharge detection OR circuit 15. The output terminal of the overcharge detection OR circuit 15 is connected to the control circuit 17. The overcharge detection OR circuit 15 outputs the logical sum of the output signals of the first overcharge detection circuit 11, the second overcharge detection circuit 12, and the third overcharge detection circuit 13 to the control circuit 17.

[0020] FIG. 2 is a diagram showing an example of the circuit configuration of the charge control circuit 10 as the charge control circuit of the present embodiment. Referring to the figure, an example of the specific circuit configuration of the first overcharge detection circuit 11 will be described.

[0021] The first overcharge detection circuit 11 includes a voltage dividing resistor 111, a voltage dividing resistor 112, and a comparator 113. One end of the voltage dividing resistor 111 is connected to the VC1 terminal, and the other end is connected to one end of the voltage dividing resistor 112. The other end of the voltage dividing resistor 112 is connected to the VC2 terminal. The voltage dividing resistor 111 and the voltage dividing resistor 112 divide the potential difference between the VC1 terminal and the VC2 terminal.

[0022] The comparator 113 is a two-input comparator. The first input terminal (for example, the non-inverting terminal) of the comparator 113 is connected to the midpoint between the voltage dividing resistor 111 and the voltage dividing resistor 112, and the second input terminal (for example, the inverting terminal) is connected to the reference potential on the VC2 terminal side. Note that the reference potential generation circuit is not shown in the figure.

[0023] Comparator 113 compares the potential at the midpoint of the voltage divider resistors 111 and 112 with the reference potential. If the potential at the midpoint of the voltage divider resistors 111 and 112 is higher than the reference potential, comparator 113 outputs a signal indicating overcharging (for example, a logic H signal).

[0024] Since the circuit configurations of the second overcharge detection circuit 12 and the third overcharge detection circuit 13 are the same as those of the first overcharge detection circuit 11, their explanation will be omitted by referring to the explanation of the circuit configuration of the first overcharge detection circuit 11.

[0025] Returning to Figure 1, if at least one of the first overcharge detection circuit 11, the second overcharge detection circuit 12, and the third overcharge detection circuit 13 detects an overcharge state, the overcharge detection circuit outputs a signal indicating an overcharge state (for example, a logic H signal) to the control circuit 17.

[0026] Furthermore, if none of the first overcharge detection circuit 11, the second overcharge detection circuit 12, or the third overcharge detection circuit 13 have detected an overcharge state, the overcharge detection circuit outputs a signal (for example, a logic L signal) to the control circuit 17 indicating that there is no overcharge state.

[0027] [Terminal open detection circuit] The charging control circuit 10 includes a terminal open detection circuit 16. The terminal open detection circuit 16 includes a number of detection circuits corresponding to the number of series cells in the battery pack 3. In one example of this embodiment, the terminal open detection circuit 16 includes three detection circuits: a first detection circuit 161, a second detection circuit 162, and a third detection circuit 163.

[0028] The first detection circuit 161 detects the connection state between the first cell 31 and the VC1 terminal based on the potential difference between the VC1 terminal and the VC2 terminal. The second detection circuit 162 detects the connection state between the second cell 32 and the VC2 terminal based on the potential difference between the VC2 terminal and the VC3 terminal. The third detection circuit 163 detects the connection state between the third cell 33 and the VC3 terminal based on the potential difference between the VC3 terminal and the VSS terminal.

[0029] Referring to Figure 2, an example of the specific circuit configuration of the terminal open detection circuit 16 will be explained. The first detection circuit 161 to the third detection circuit 163 are all two-input comparators with output enable terminals.

[0030] The first detection circuit 161 has its first input terminal connected to the VC1 terminal, its second input terminal connected to the VC2 terminal, and its output enable terminal connected to the control circuit 17.

[0031] The first detection circuit 161 detects that the connection between the cell electrodes and the cell voltage detection terminal is good if a potential difference exists between the VC1 terminal and the VC2 terminal in the direction of the potential of the electrode voltage of the first cell 31 (positive direction). The first detection circuit 161 detects that the connection between the cell electrodes and the cell voltage detection terminal is poor if a potential difference exists between the VC1 terminal and the VC2 terminal in the opposite direction to the potential of the electrode voltage of the first cell 31 (negative direction).

[0032] The second detection circuit 162 has its first input terminal connected to the VC2 terminal, its second input terminal connected to the VC3 terminal, and its output enable terminal connected to the control circuit 17.

[0033] A constant current source 165 that draws in current is connected to the VC2 terminal. A constant current source 166 that discharges current is connected to the VC3 terminal. When the connection between the second cell 32 and the VC2 and VC3 terminals is good, the electrode voltage of the second cell 32 is applied between the VC2 and VC3 terminals. As a result, the operation of the constant current sources 165 and 166 becomes less influential, and a potential difference in the same direction (positive direction) as the potential difference of the second cell 32 is generated between the VC2 and VC3 terminals. On the other hand, when the connection between the second cell 32 and the VC2 and VC3 terminals is poor, the operation of the constant current sources 165 and 166 is influential, and a potential difference in the opposite direction (negative direction) as the potential difference of the second cell 32 is generated between the VC2 and VC3 terminals.

[0034] The second detection circuit 162 detects the quality of the connection between the cell electrodes and the cell voltage detection terminal based on the direction of the potential difference generated between the VC2 terminal and the VC3 terminal when the constant current sources 165 and 166 are operated.

[0035] Since the circuit configuration of the third detection circuit 163 is the same as that of the first detection circuit 161, its explanation will be omitted by referring to the explanation of the circuit configuration of the first detection circuit 161.

[0036] In other words, the terminal open detection circuit 16 (terminal state detection unit) detects the connection state between the battery stack (battery pack 3) and the cell overcharge detection unit (first overcharge detection circuit 11, second overcharge detection circuit 12, third overcharge detection circuit 13) via the cell voltage detection terminals, based on the potential of the cell voltage detection terminals (VC1 terminal, VC2 terminal, VC3 terminal, VSS terminal).

[0037] Here, "connection status" refers to whether or not there is an electrical connection between the cell electrodes and the input terminals of the terminal open detection circuit 16. When there is an electrical connection between the cell electrodes and the input terminals of the terminal open detection circuit 16, the connection status is considered good, and when there is no electrical connection, it is considered a poor connection (or open fault). Note that poor connection includes not only cases where the resistance value is infinite, such as broken wires or disconnected terminals, but also cases where the resistance value is less than or equal to infinity but greater than the standard range, such as due to poor contact at the terminals.

[0038] Furthermore, each circuit constituting the terminal open detection circuit 16 (especially the constant current source 165 and constant current source 166) operates with current, and therefore consumes relatively large amounts of power. If the terminal open detection circuit 16 is constantly operating, the power consumption of the battery pack 3 will increase. Each circuit constituting the terminal open detection circuit 16 is equipped with an output enable terminal and operates when necessary based on the enable signal EN output by the control circuit 17. With the charging control device 2 configured in this way, the power consumption of the battery pack 3 can be reduced.

[0039] Returning to Figure 1, the output terminals of the first detection circuit 161, the second detection circuit 162, and the third detection circuit 163 are connected to the input terminals of the open detection OR circuit 164. The output terminals of the open detection OR circuit 164 are connected to the control circuit 17. The open detection OR circuit 164 outputs the OR of the output signals of the first detection circuit 161, the second detection circuit 162, and the third detection circuit 163 to the control circuit 17.

[0040] Specifically, the terminal open detection circuit 16 outputs a signal indicating a connection failure (for example, a logic H signal) to the control circuit 17 if at least one of the first detection circuit 161, the second detection circuit 162, and the third detection circuit 163 detects a connection failure. Furthermore, if the terminal open detection circuit 16 detects that the connection is good, whether it is the first detection circuit 161, the second detection circuit 162, or the third detection circuit 163, it outputs a signal indicating that the connection is good (for example, a logic L signal) to the control circuit 17.

[0041] [control circuit] The control circuit 17 includes a delay circuit 170. The delay circuit 170 includes an oscillator 171, a counter 172, and a threshold memory unit 173. The oscillator 171 outputs a clock signal with a predetermined period. The counter 172 counts the number of times the clock signal edge occurs as elapsed time. The threshold storage unit 173 stores the determination threshold for the elapsed time counted by the counter 172.

[0042] The control circuit 17 does not initiate timing by the counter 172 if the output signal of the overcharge detection OR circuit 15 (overcharge detection circuit) indicates that the cell is not in an overcharge state (for example, a logic low). The control circuit 17 initiates timing by the counter 172 if the output signal of the overcharge detection OR circuit 15 indicates that the cell is in an overcharge state (for example, a logic high). In other words, the delay circuit 170 functions as a timing unit that measures the duration of the overcharge state of the cell based on the detection results of the cell overcharge detection unit (first overcharge detection circuit 11, second overcharge detection circuit 12, third overcharge detection circuit 13).

[0043] The control circuit 17 outputs a signal from the CO terminal to suppress charging of the battery pack 3 when the duration measured by the delay circuit 170 (timing unit) exceeds a determination threshold stored in the threshold storage unit 173.

[0044] In short, the delay circuit 170 has the function of delaying the time from when the overcharge detection circuit detects an overcharge state, based on the delay time indicated by the judgment threshold, until it outputs a signal to the CO terminal to suppress charging to the battery pack 3. In this embodiment, the terms "suppressing charging" and "stopping charging" include physically (irreversibly) prohibiting charging.

[0045] If the duration measured by the delay circuit 170 does not exceed the judgment threshold stored in the threshold memory unit 173, the control circuit 17 outputs a signal (for example, a logic L) from the CO terminal indicating that the judgment threshold has not been exceeded. In this case, the switch element 21 is turned off.

[0046] If the duration measured by the delay circuit 170 exceeds the judgment threshold stored in the threshold memory unit 173, the control circuit 17 outputs a signal (for example, a logical H) from the CO terminal indicating that the judgment threshold has been exceeded. In this case, the switch element 21 turns ON.

[0047] In other words, the control circuit 17 (charging control unit) will activate if the terminal open detection circuit 16 (terminal state detection unit) detects that the battery pack 3 and the cell voltage detection terminals (VC1 terminal, VC2 terminal, VC3 terminal, VSS terminal) are not connected. And when the measured duration exceeds the set threshold, It outputs an abnormal signal indicating a connection problem (for example, a logic H signal output from the CO terminal).

[0048] When battery device 1 is in the charging state (i.e., functioning as an energy storage device), current flows from the EB+ terminal to the battery pack 3. In this case, when the switch element 21 is turned on, current flows from the EB+ terminal through the second fuse 24, resistor 22, and switch element 21. Resistor 22 functions as a heater element that blows the second fuse 24. When current flows through resistor 22, resistor 22 generates heat. The heat generated by resistor 22 causes the second fuse 24 to blow, suppressing (stopping) charging.

[0049] When battery device 1 is in the discharge state (i.e., functioning as a power supply), current flows from battery pack 3 to the EB+ terminal. In this case, when the switch element 21 is turned on, current flows from battery pack 3 through the first fuse 23, resistor 22, and switch element 21. Resistor 22 functions as a heater element that blows the first fuse 23. When current flows through resistor 22, resistor 22 generates heat. The heat generated by resistor 22 causes the first fuse 23 to blow, suppressing (stopping) the discharge.

[0050] [Operation of control circuit 17] As described above, in the assembly process of the battery device 1, there is a work process (cell assembly process) in which cells are sequentially incorporated into the battery device 1 one by one to constitute the battery pack 3. In this embodiment, from the viewpoint of preventing false detection of an overcharge state, the delay circuit 170 is controlled in the assembly process of the battery device 1 in the procedure illustrated in Figure 3.

[0051] Figure 3 shows an example of the operation flow of the control circuit 17. (Step S110) The control circuit 17 determines whether or not an overcharge state has been detected by the overcharge detection circuit. If the control circuit 17 determines that an overcharge state has been detected, it proceeds to step S140. If the control circuit 17 determines that an overcharge state has not been detected, it proceeds to step S120.

[0052] (Step S120) The control circuit 17 determines whether or not the timer count is in progress using the counter 172. Here, "timer count in progress" means that the duration of overcharge detection is being measured. If the control circuit 17 determines that the timer count is in progress, in step S130 it resets the timer count value (i.e., sets the duration of overcharge detection to zero) and returns to step S110. If the control circuit 17 determines that the timer count is not in progress, since the timer count value has been reset, it returns to step S110 without going through the reset operation (step S130).

[0053] (Step S140) The control circuit 17 determines whether or not a terminal open (i.e., a connection failure) has been detected by the terminal open detection circuit 16. If the control circuit 17 determines that a connection failure has been detected, it proceeds to step S160. If the control circuit 17 determines that no connection failure has been detected, it proceeds to step S150.

[0054] The control circuit 17 may also be configured to output an enable signal EN to the terminal open detection circuit 16 at the stage in step S140 when a connection failure is detected. In other words, the control circuit 17 (charge control unit) allows or prohibits the operation of the terminal open detection circuit 16 (terminal state detection unit) based on the detection results of the cell overcharge detection unit (first overcharge detection circuit 11, second overcharge detection circuit 12, third overcharge detection circuit 13). With the control circuit 17 configured in this way, the power consumption of the battery pack 3 can be reduced compared to when the terminal open detection circuit 16 is constantly in operation.

[0055] (Step S150) If no connection failure is detected, the control circuit 17 sets the determination threshold for the duration of overcharge detection to the first threshold. (Step S160) If a connection failure is detected, the control circuit 17 sets the determination threshold for the duration of overcharge detection to the second threshold.

[0056] In other words, the control circuit 17 (threshold setting unit) sets a determination threshold for the duration of overcharge detection based on the detection result of the terminal open detection circuit 16 (terminal state detection unit).

[0057] As mentioned above, there are two thresholds for determining the duration of overcharge detection: a first threshold and a second threshold. The first threshold represents a predetermined first hour (for example, about 100 milliseconds to 10 seconds). The second threshold represents a second hour that is longer than the first hour (for example, about 30 seconds to 10 minutes). In other words, the second threshold is set to have a longer duration than the first threshold.

[0058] If the terminal open detection circuit 16 detects that the battery pack 3 is not connected to the overcharge detection unit (first overcharge detection circuit 11, second overcharge detection circuit 12, third overcharge detection circuit 13), the control circuit 17 sets the second threshold as the threshold for determining the duration of overcharge detection.

[0059] Furthermore, it is preferable that the second time period described above be less than 60 minutes. 60 minutes of work time is sufficient to complete the cell assembly process of the battery pack 3, while a period of 60 minutes or more would result in an excessively long time before the charging stop circuit activates in the event of overcharge detection. By setting a predetermined upper limit for the second time period, if the overcharge condition persists, the charging stop circuit can always be activated regardless of the detection result of the terminal open detection circuit 16.

[0060] The judgment threshold only needs to be able to determine the delay time for overcharge detection, and can be implemented in any way. In one example of this embodiment, a first threshold and a second threshold are stored in advance in the threshold storage unit 173. The control circuit 17 reads either the first threshold or the second threshold from the threshold storage unit 173 and sets the delay time for overcharge detection by setting the read judgment threshold as the overflow threshold of the counter 172.

[0061] The control circuit 17 may also set the determination threshold by switching the oscillation frequency of the oscillator 171 or the frequency of the clock signal output from the oscillator 171.

[0062] In addition, the counter 172 may be a digital counter composed of a clock frequency divider circuit (for example, a flip-flop). In this case, the control circuit 17 may set the judgment threshold by switching the number of stages in the clock frequency divider circuit that constitutes the counter 172.

[0063] (Step S170) The control circuit 17 causes the counter 172 to measure the duration of the overcharge detection. (Step S180) The control circuit 17 determines whether the duration of overcharge detection has elapsed to the set time. More specifically, the control circuit 17 determines whether the duration of overcharge detection measured by the counter 172 has elapsed to the time (first time or second time) indicated by the determination threshold set in step S150 or step S160.

[0064] If the control circuit 17 determines that the duration of overcharge detection has exceeded the set time, it proceeds to step S190. If the control circuit 17 determines that the duration of overcharge detection has not exceeded the set time, it returns to step S110.

[0065] (Step S190) The control circuit 17 outputs a charge stop output to the charge stop circuit, and the series of processes ends.

[0066] As explained above, when the charging control device 2 detects an overcharge condition, it sets a delay time before outputting a charging stop output according to the result of the terminal open detection circuit 16's detection of the terminal connection status.

[0067] As described above, in the assembly process of the battery device 1, there is a step in which the cells constituting the battery pack 3 are sequentially incorporated into the battery device 1 one by one. During this cell incorporation process, until all the cells constituting the battery pack 3 are incorporated into the battery device 1, there will be a state in which one of the terminals VC1 to VC3 is not connected to a cell. In this case, if the charge control device 2 is operating, the terminal open detection circuit 16 will detect a connection failure. In other words, the situations in which the terminal open detection circuit 16 detects a connection failure include not only terminal open failures after the battery device 1 has been shipped, but also the cell incorporation process described above.

[0068] The charging control device 2 suppresses the operation of the charging stop output during the cell assembly process by setting a delay time (e.g., 60 minutes) that is longer than the delay time (e.g., 10 minutes) when the terminal open detection circuit 16 detects a connection failure. With the charging control device 2 configured in this way, it is possible to suppress the occurrence of fuse blowing during the cell assembly process, thereby improving work efficiency and productivity.

[0069] Furthermore, in the control circuit 17 of the charging control device 2, the output signal of the terminal open detection circuit 16 is shared between the terminal open detection function and the delay time setting function of the delay circuit 170. In other words, the control circuit 17 uses the same circuit for the terminal open detection function, which is used after shipment, for the delay time setting function of the delay circuit 170 as well. With the charging control device 2 configured in this way, the circuit size can be reduced compared to the case where a dedicated detection circuit is provided for the delay time setting function of the delay circuit 170, thereby reducing the size and cost of the device.

[0070] Although one embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiment and can be modified as appropriate without departing from the spirit of the invention. Furthermore, without departing from the spirit of the present invention, the components in the above-described embodiment can be replaced with well-known components, and the above-described modifications can be combined as appropriate. [Explanation of symbols]

[0071] 1. Battery device 2. Charging control device 3 battery packs 10 Charging control circuit 11. First overcharge detection circuit 12. Second overcharge detection circuit 13. Third overcharge detection circuit 16-terminal open detection circuit 17 Control circuits 170 Delay circuit ( Timing section ) 21 Switching element 23 First Fuse 24. Second Fuse

Claims

1. A battery stack containing multiple cells connected in series has a number of cell voltage detection terminals corresponding to the number of cells, which individually detect the voltage of each of the multiple cells. A number of cell overcharge detection units, corresponding to the number of cells, individually detect overcharging of each cell based on the potential of each cell voltage detection terminal, A number of terminal state detection units corresponding to the number of cells detects the connection state between the battery stack and the cell overcharge detection unit via the cell voltage detection terminals, based on the potential of each cell voltage detection terminal. A timing unit measures the duration of the overcharged state of the cell based on the detection result of the cell overcharge detection unit, A threshold setting unit sets the duration threshold based on the detection result of the terminal state detection unit, A charge control unit suppresses charging of the battery stack when the duration measured by the timing unit exceeds the threshold set by the threshold setting unit, A charging control circuit equipped with the following features.

2. The threshold includes a first threshold indicating a predetermined first time, and a second threshold indicating a second time that is longer than the first time. The threshold setting unit is, If the terminal state detection unit detects that the battery stack and the cell overcharge detection unit are not connected, the second threshold is set as the threshold. The charging control circuit according to claim 1.

3. The aforementioned second time is less than 60 minutes. The charging control circuit according to claim 2.

4. The charging control unit, Based on the detection result of the cell overcharge detection unit, the operation of the terminal state detection unit is permitted or prohibited. A charging control circuit according to any one of claims 1 to 3.

5. The charging control unit, When the terminal state detection unit detects that the battery stack and the cell voltage detection terminal are not connected, and the duration exceeds the threshold set by the threshold setting unit, it outputs an abnormal signal indicating a connection abnormality. A charging control circuit according to any one of claims 1 to 4.

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