Semiconductor modules and power converters

Abstract

To provide a semiconductor module capable of reducing inductance, and a power converter.SOLUTION: A semiconductor module 30 constitutes two inverters connected to a common rotary electric machine. The semiconductor module 30 comprises a semiconductor element 41 that constitutes a first inverter, a semiconductor element 42 that constitutes a second inverter, a current path part 43 including the semiconductor element 41, and a current path part 44 including the semiconductor element 42. In an X direction, semiconductor elements 41 and 42 at least some of on-timings of which overlap are disposed adjacent to each other. The current path parts 43 and 44 run side by side in the X direction so that flowing currents are in opposite directions and face each other.SELECTED DRAWING: Figure 6

Description

Technical Field

[0001] The disclosure in this specification relates to a semiconductor module and a power conversion device.

Background Art

[0002] Patent Document 1 discloses a power conversion device including two inverters connected to a common rotating electric machine. The description of the prior art document is incorporated herein by reference as an explanation of the technical elements in this specification.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] An inverter is configured to include a semiconductor module including semiconductor elements. In the power conversion device of Patent Document 1, for example, the first inverter is configured to include a first semiconductor module, and the second inverter is configured to include a second semiconductor module. In this configuration, when a current flows between the first inverter and the second inverter, a current flows between the first semiconductor module and the second semiconductor module, resulting in a problem of large inductance. From the above perspective or other perspectives not mentioned, further improvements are required for the semiconductor module and the power conversion device.

[0005] One object of the disclosure is to provide a semiconductor module and a power conversion device capable of reducing inductance.

Means for Solving the Problems

[0006] The symbols in parentheses in the claims, this section, and the technical idea section are examples that indicate the correspondence with the specific means described later in the embodiments. The symbols in parentheses do not limit the technical scope.

[0007] One aspect of the disclosure is a semiconductor module comprising two inverters connected to a common rotating electric machine (3), The first semiconductor element (41, 41H, 41L) that constitutes the first inverter (8, 21), which is one of the inverters, The other inverter is the second inverter (9,22), which consists of second semiconductor elements (42,42H,42L) whose on-timing overlaps with the on-timing of the first semiconductor element, A first current path section (43, 43H, 43L) including a first semiconductor element, A second current path section (44, 44H, 44L) including a second semiconductor element, Equipped with, In a predetermined direction, a second semiconductor element is placed next to a first semiconductor element. The first current path and the second current path run parallel to each other in the predetermined direction such that the currents flowing through them are in opposite directions and they face each other.

[0008] According to the disclosed semiconductor module, with the above arrangement, when both the first and second semiconductor elements are turned on, the current flowing through the first current path and the current flowing through the second current path face each other in opposite directions. Therefore, the inductance can be reduced by canceling out the magnetic flux.

[0009] Another form of disclosure is a power converter, The first inverter (8,21) is connected to the rotating electric machine (3), The second inverter (9,22) connected to the rotating electric machine, Equipped with, The first inverter and the second inverter are configured to include a semiconductor module (30), Semiconductor modules The first semiconductor elements (41, 41H, 41L) that constitute the first inverter, The second inverter is composed of second semiconductor elements (42, 42H, 42L) whose on-timing overlaps with that of the first semiconductor element, A first current path section (43, 43H, 43L) including a first semiconductor element, A second current path section (44, 44H, 44L) including a second semiconductor element, It has, In a predetermined direction, a second semiconductor element is placed next to a first semiconductor element. The first current path and the second current path run parallel to each other in the predetermined direction such that the currents flowing through them are in opposite directions and they face each other.

[0010] According to the disclosed power conversion device, with the above arrangement, when both the first semiconductor element and the second semiconductor element are turned on, the current flowing through the first current path and the current flowing through the second current path face each other in opposite directions. Therefore, the inductance can be reduced by canceling out the magnetic flux.

[0011] The various embodiments disclosed in this specification employ different technical means to achieve their respective objectives. The claims and the reference numerals in parentheses in this section are illustrative in their correspondence with the embodiments described later and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the accompanying drawings. [Brief explanation of the drawing]

[0012] [Figure 1] This is a diagram showing the drive system according to the first embodiment. [Figure 2] This figure shows an example of an operating point map for a rotating electric machine. [Figure 3] This diagram shows a star-connection drive. [Figure 4] This diagram shows an open-connection drive. [Figure 5]It is a plan view showing an example of a power conversion device. [Figure 6] It is a plan view showing an example of a semiconductor module. [Figure 7] It is a plan view showing another example of a semiconductor device. [Figure 8] It is a plan view showing another example of a semiconductor device. [Figure 9] It is a plan view showing another example of a semiconductor device. [Figure 10] It is a plan view showing another example of a semiconductor device. [Figure 11] It is a diagram showing flux cancellation during open - circuit connection driving. [Figure 12] It is a diagram showing flux cancellation during star - connection driving. [Figure 13] It is a diagram showing a drive system according to the second embodiment. [Figure 14] It is a plan view showing an example of a semiconductor module.

Modes for Carrying Out the Invention

[0013] Hereinafter, a plurality of embodiments will be described based on the drawings. In each embodiment, corresponding components may be given the same reference numerals, and redundant explanations may be omitted. When only a part of the configuration is described in each embodiment, for the other parts of the configuration, the configurations of other embodiments described previously can be applied. Also, not only the combinations of configurations explicitly shown in the description of each embodiment, but also the configurations of a plurality of embodiments can be partially combined with each other as long as there is no problem with the combination, even if not explicitly shown. Note that the description of A and / or B means at least one of A and B. That is, it can include only A, only B, or both A and B.

[0014] The semiconductor device and semiconductor module comprising the semiconductor device of this embodiment are applied, for example, to a power conversion device for a mobile body that uses a rotating electric machine as a drive source. Examples of mobile bodies include electric vehicles such as battery electric vehicles (BEVs), hybrid electric vehicles (HEVs), and plug-in hybrid electric vehicles (PHEVs), as well as aircraft such as electric vertical take-off and landing aircraft and drones, ships, construction machinery, and agricultural machinery.

[0015] (First Embodiment) First, based on Figure 1, we will explain the general configuration of the drive system for the mobile body.

[0016] <Motorization system for mobile vehicles> As shown in Figure 1, the drive system 1 for the mobile body includes a DC power supply 2, a rotating electric machine 3, and a power conversion circuit 4.

[0017] The DC power supply 2 may be a rechargeable secondary battery such as a lithium-ion battery or a nickel-metal hydride battery. The DC power supply 2 may also be a device that converts AC power to DC power for output.

[0018] Rotating electric machine 3 is an open-winding type three-phase rotating electric machine with an open neutral point. Rotating electric machine 3 has a U-phase winding 3U, a V-phase winding 3V, and a W-phase winding 3W. Hereafter, the U-phase winding 3U, V-phase winding 3V, and W-phase winding 3W may be simply referred to as windings 3U, 3V, and 3W.

[0019] The rotating electric machine 3 functions, for example, as a drive source for a moving body, i.e., an electric motor. If the moving body is a vehicle, the rotating electric machine 3 generates torque to drive drive wheels (not shown). The rotating electric machine 3 is not limited to an electric motor. The rotating electric machine 3 may be a motor-generator having both electric motor and generator functions, or it may be a generator.

[0020] The power conversion circuit 4 performs power conversion between the DC power supply 2 and the rotating electric machine 3. The drive system 1 is a common power supply system that supplies power from a common DC power supply 2 to two inverters 8 and 9, which will be described later. As illustrated in Figure 1, the drive system 1 may have only one common DC power supply 2 or multiple common DC power supplies 2. The drive system 1 may also have a power supply switch, such as an SMR (not shown), between the DC power supply 2 and the power conversion circuit 4. SMR is an abbreviation for System Main Relay. Turning the power supply switch on enables power supply from the DC power supply 2 to the rotating electric machine 3, and turning the power supply switch off cuts off the power supply from the DC power supply 2 to the rotating electric machine 3.

[0021] <Power Conversion Circuit> Figure 1 shows an example of a power conversion circuit 4. The power conversion circuit 4 illustrated in Figure 1 includes power lines 5 and 6, a smoothing capacitor 7, inverters 8 and 9, a switch 10, a control unit 11, and a current sensor 12 as elements related to power conversion.

[0022] Power line 5 is the high-potential power line. Power line 5 is connected to the positive terminal of the DC power supply 2. Power line 6 is the low-potential power line. Power line 6 is connected to the negative terminal of the DC power supply 2. Power lines 5 and 6 are provided by busbars, which are, for example, metal plates.

[0023] The smoothing capacitor 7 primarily smooths the DC voltage supplied from the DC power supply 2. The smoothing capacitor 7 is located between power lines 5 and 6. The positive terminal of the smoothing capacitor 7 is connected to power line 5 between the DC power supply 2 and inverters 8 and 9. The negative terminal of the smoothing capacitor 7 is connected to power line 6 between the DC power supply 2 and inverters 8 and 9. The smoothing capacitor 7 is connected in parallel to inverters 8 and 9.

[0024] Inverters 8 and 9 are DC-AC conversion circuits. Inverter 8 is configured with three phase upper and lower arm circuits 8HL. The upper and lower arm circuits 8HL are sometimes referred to as "legs". The upper and lower arm circuits 8HL have an upper arm 8H and a lower arm 8L. The upper arm 8H and lower arm 8L are connected in series between power lines 5 and 6, with the upper arm 8H on the power line 5 side.

[0025] The connection point between the upper arm 8H and the lower arm 8L is connected via output wire 13 to the corresponding phase winding in the rotating electric machine 3. The inverter 8 has six arms. Each arm is equipped with a switching element. The number of switching elements constituting each arm is not particularly limited; there may be one or more. In the case of multiple switching elements, the multiple switching elements connected in parallel to each other are driven on and off at the same timing by a common gate drive signal (drive voltage).

[0026] In the example shown in Figure 1, an n-channel type MOSFET 14 is used as the switching element constituting each arm. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. In the upper arm 8H, the drain of the MOSFET 14 is connected to the power line 5. In the lower arm 8L, the source of the MOSFET 14 is connected to the power line 6. The source of the MOSFET 14 in the upper arm 8H and the drain of the MOSFET 14 in the lower arm 8L are interconnected.

[0027] Each of the MOSFETs 14 has a freewheeling diode 15 connected in antiparallel. Diode 15 may be a parasitic diode (body diode) of the MOSFET 14, or it may be a separate diode. The anode of diode 15 is connected to the source of the corresponding MOSFET 14, and the cathode is connected to the drain.

[0028] Inverter 9 has the same configuration as inverter 8. Inverter 9 is configured with three phase upper and lower arm circuits 9HL. The upper and lower arm circuit 9HL has an upper arm 9H and a lower arm 9L. The upper arm 9H and lower arm 9L are connected in series between power lines 5 and 6, with the upper arm 9H on the power line 5 side.

[0029] The connection point between the upper arm 9H and the lower arm 9L is connected via the output wire 16 to the corresponding phase winding in the rotating electric machine 3. The inverter 9 also has six arms. Each arm is configured with a switching element. The number of switching elements constituting each arm is not particularly limited; there may be one or more.

[0030] In the example shown in Figure 1, n-channel type MOSFETs 17 are used as switching elements for each arm. In the upper arm 9H, the drain of the MOSFET 17 is connected to the power line 5. In the lower arm 9L, the source of the MOSFET 17 is connected to the power line 6. The source of the MOSFET 17 in the upper arm 9H and the drain of the MOSFET 17 in the lower arm 9L are interconnected. A freewheeling diode 18 is connected in antiparallel to each of the MOSFETs 17.

[0031] As described above, the high-potential terminals (drain terminals) of the upper arms 8H and 9H of inverters 8 and 9 are connected to power line 5. The low-potential terminals (source terminals) of the lower arms 8L and 9L are connected to power line 6. The node where the upper arm 8H and lower arm 8L connect is connected to one end of the winding of the corresponding phase via output line 13, and the node where the upper arm 9H and lower arm 9L connect is connected to the other end of the winding of the corresponding phase via output line 16. Specifically, node U1 of the U-phase upper and lower arm circuit 8HL is connected to one end of the U-phase winding 3U, and node U2 of the U-phase upper and lower arm circuit 9HL is connected to the other end of the U-phase winding 3U. Node V1 of the V-phase upper and lower arm circuit 8HL is connected to one end of the V-phase winding 3V, and node V2 of the V-phase upper and lower arm circuit 9HL is connected to the other end of the V-phase winding 3V. One end of the W-phase winding 3W is connected to node W1 of the W-phase upper and lower arm circuit 8HL, and the other end of the W-phase winding 3W is connected to node W2 of the W-phase upper and lower arm circuit 9HL.

[0032] Note that the switching elements constituting inverters 8 and 9 are not limited to the MOSFETs described above. For example, IGBTs may be used. IGBT stands for Insulated Gate Bipolar Transistor. In the case of IGBTs, a freewheeling diode is also connected in antiparallel. The types of switching elements constituting inverters 8 and 9 may be the same or different. For example, one of inverters 8 or 9 may be made up of a MOSFET and the other of an IGBT.

[0033] The switch 10 is installed between the connection point of inverter 8 and the connection point of inverter 9 on at least one of the power lines 5 and 6. When closed, the switch 10 connects the high-potential terminal of the upper arm 9H of inverter 9 to the smoothing capacitor 7. When open, the switch 10 disconnects the connection between the high-potential terminal of the upper arm 9H and the smoothing capacitor 7. For example, a semiconductor switch or a mechanical relay can be used as the switch 10.

[0034] In the example shown in Figure 1, a semiconductor switch, that is, a switching element formed on a semiconductor chip, is used as the switch 10. The switching element is not particularly limited. It may have the same configuration as the switching element that makes up at least one of the inverters 8 and 9, or it may have a different configuration. In Figure 1, the switching element that makes up the switch 10 is a MOSFET 19. A diode is connected in antiparallel to the MOSFET 19. When the MOSFET 19 is turned on and the switch 10 is closed, the high-potential terminal of the upper arm 9H is electrically connected to the smoothing capacitor 7. When the MOSFET 19 is turned off and the switch 10 is opened, the electrical connection between the high-potential terminal of the upper arm 9H and the smoothing capacitor 7 is interrupted.

[0035] The control unit (CTR) 11 may be configured to include, for example, a processor, memory, and storage. The processor performs various processes by accessing the memory. The memory is a rewritable, volatile storage medium. The memory is, for example, RAM. RAM is an abbreviation for Random Access Memory. The storage is, for example, a rewritable, non-volatile storage medium. The storage stores a program that is executed by the processor. The program constructs multiple functional units by having the processor execute multiple instructions. The processes performed by the control unit 11 may be realized by software processing through the execution of the above-mentioned program by the processor, or by hardware processing using dedicated electronic circuits.

[0036] The control unit 11 may include a drive command generation unit (not shown) and a drive circuit unit. The drive command generation unit controls inverters 8 and 9. The drive command generation unit generates drive commands (command signals) to control the on / off state of MOSFETs 14 and 17 and outputs them to the drive circuit unit. The drive command generation unit generates drive commands based on drive requests for the rotating electric machine 3, such as torque command values ​​input from a higher-level ECU (not shown), and signals detected by various sensors.

[0037] The various sensors may include, for example, the current sensor 12 shown in Figure 1, as well as a rotation angle sensor and a voltage sensor (not shown). The current sensor 12 detects the phase currents flowing through the windings 3U, 3V, and 3W of each phase. The rotation angle sensor detects the rotation angle of the rotor of the rotating electric machine 3. The voltage sensor detects the voltage across the smoothing capacitor 7.

[0038] The drive command generation unit controls the switch 10. The drive command generation unit generates drive commands to control the on / off switching of the MOSFETs 19 that make up the switch 10. These drive commands are switching commands that switch the switch 10 open or closed.

[0039] The drive circuit section is sometimes referred to as the driver. Based on a drive command, the drive circuit section can independently control the on / off state of the six MOSFETs 14, the six MOSFETs 17, and the one MOSFET 19. The drive circuit section outputs a drive signal such that, for example, it increases the drive voltage (gate voltage Vge) during the on period of a pulsed drive command and decreases the drive voltage during the off period.

[0040] <Star connection drive and open connection drive> Next, star-connection drive and open-connection drive will be explained based on Figures 2, 3, and 4. Figure 2 is an operating point map of the rotating electric machine 3, with rotational speed on the horizontal axis and torque on the vertical axis. Figure 3 is a diagram showing star-connection drive. Figure 4 is a diagram showing open-connection drive.

[0041] As shown in Figure 2, the drive range of the rotating electric machine 3 is divided into two ranges based on rotational speed and torque. One of the drive ranges is the star connection drive range. The star connection drive range is the normal operating range. The other drive range is the open connection drive range. The open connection drive range is a range with higher rotational speed or higher torque than the star connection drive range.

[0042] When the operating point is in the star-connection drive region, the control unit 11 performs star-connection drive control. Star-connection drive is sometimes referred to as Y-drive. The control unit 11 controls MOSFETs 14, 17, and 19 so that windings 3U, 3V, and 3W are in a star-connection state. Specifically, as shown in Figure 3, the switch 10 is opened, that is, MOSFET 19 is turned off. The inverter 9 is also neutralized. As illustrated in Figure 3, for example, MOSFET 17 on the upper arm 9H of all phases may be turned on, and MOSFET 17 on the lower arm 9L of all phases may be turned off. Alternatively, MOSFET 17 on the upper arm 9H of all phases may be turned off, and MOSFET 17 on the lower arm 9L of all phases may be turned on. Then, MOSFET 14 of the inverter 8 is controlled according to the drive request, etc.

[0043] The dashed arrows in Figure 3 show an example of a current path. Figure 3 shows the current path when the MOSFET 14 on the upper arm 8H of the U phase and the MOSFET 14 on the lower arm 8L of the W phase are turned on. In the example shown in Figure 3, the upper arm 9H side of the inverter 9 is turned on, and the lower arm 9L side is turned off. The current flows in the following order: upper arm 8H of the U phase → node U1 → U phase winding 3U → node U2 → upper arm 9H of the U phase → upper arm 9H of the W phase → node W2 → W phase winding 3W → node W1 → lower arm 8L of the W phase. In this way, the current flows without going through the switch 10.

[0044] The control method of the inverter 8 by the control unit 11 is not particularly limited. For example, a PWM control method or an overmodulated PWM control method may be used. In the PWM control method and the overmodulated PWM control method, the drive command generation unit outputs a high-frequency carrier (carrier wave), such as a triangular wave, sawtooth wave, or square wave. Then, a pulse-shaped drive command is generated by comparing the voltage of the carrier with a sinusoidal voltage signal as the torque command value. For example, a square wave control method may be used. In the square wave control method, the drive command generation unit generates a square wave pulse as a drive command from a sinusoidal voltage signal as the torque command value, such that the ratio of on-off periods is one to one within one control cycle. For example, the control method may be switched according to the rotational speed of the rotating electric machine 3. Square wave control has a higher voltage utilization rate than PWM control. In the star-connected drive region, the PWM control method may be used in the low to medium rotational speed range, and the square wave control method may be used in the high rotational speed range.

[0045] When the operating point is in the open-connection drive region, the control unit 11 performs control of the open-connection drive. Open-connection drive is sometimes referred to as H drive. The control unit 11 closes the switch 10, that is, turns on the MOSFET 19, and opens the neutral point of the inverter 9. By opening the neutral point, open-connection circuits of the U-phase upper and lower arm circuits 8HL and 9HL are formed via the U-phase winding 3U. Similarly, open-connection circuits of the V-phase upper and lower arm circuits 8HL and 9HL are formed via the V-phase winding 3V. Open-connection circuits of the W-phase upper and lower arm circuits 8HL and 9HL are formed via the W-phase winding 3W. The control unit 11 considers each phase as an independent open-connection circuit and controls the applied voltage for each phase. In the common phase, the control unit 11 turns on one of the upper arms 8H and 9H of inverters 8 and 9, and the other of the lower arms 8L and 9L of inverters 8 and 9.

[0046] The dashed arrows in Figure 4 show an example of a current path. Figure 4 shows the current path when MOSFET 14 on the lower arm 8L of the W phase and MOSFET 17 on the upper arm 9H of the W phase are turned on. The current flows in the following order: switch 10 → upper arm 9H of the W phase → node W2 → W phase winding 3W → node W1 → lower arm 8L of the W phase. In this way, the current flows through switch 10.

[0047] The control method of inverters 8 and 9 by the control unit 11 is not particularly limited. For example, a PWM control method may be used. A square wave control method or an overmodulated PWM control method may also be used. The control method may be switched according to the rotational speed of the rotating electric machine 3. As described above, the control unit 11 can independently control each of the six MOSFETs 14 and the six MOSFETs 17. Therefore, current can flow in either the positive or negative direction for each phase winding 3U, 3V, and 3W. The positive direction is the direction in which the current flows from inverter 8 to inverter 9. The negative direction is the direction in which the current flows from inverter 9 to inverter 8.

[0048] For example, the two MOSFETs 17 constituting the upper and lower arm circuit 9HL of the U-phase may be switched on and off complementaryly by PWM control, while the MOSFET 14 of the upper arm 8H of the U-phase may be turned off and the MOSFET 14 of the lower arm 8L of the U-phase may be turned on. This causes a negative current to flow through the U-phase winding 3U. Alternatively, the two MOSFETs 14 constituting the upper and lower arm circuit 8HL of the U-phase may be switched on and off complementaryly by PWM control, while the MOSFET 17 of the upper arm 9H of the U-phase may be turned off and the MOSFET 17 of the lower arm 9L of the U-phase may be turned on. This causes a positive current to flow through the U-phase winding 3U.

[0049] As described above, inverters 8 and 9 can switch between star-connection drive and open-connection drive. By switching from star-connection drive to open-connection drive, it is possible to output in a higher rotational speed range or a higher torque range.

[0050] <Power converter> Figure 5 shows an example of a power conversion device. For convenience, in Figure 5, elements covered by the encapsulant constituting the semiconductor device are shown transparently. The power conversion device provides at least a portion of the power conversion circuit 4. The power conversion device provides at least inverters 8 and 9. The power conversion device 20 illustrated in Figure 5 includes two inverters 21 and 22, a capacitor 23, an output terminal block 24, and a current sensor 25, etc.

[0051] In the following, the thickness direction of the substrate constituting the semiconductor device, as described later, will be defined as the Z direction, and the direction perpendicular to the Z direction will be defined as the X direction. The direction perpendicular to both the Z and X directions will be defined as the Y direction. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X and Y directions, will be referred to as the planar shape. Furthermore, the view from the Z direction may simply be referred to as the planar view.

[0052] Inverters 21 and 22 correspond to inverters 8 and 9. Inverter 21 provides inverter 8 as described above, and inverter 22 provides inverter 9. Inverters 21 and 22 are configured with a semiconductor module 30. The semiconductor module 30 includes at least one semiconductor device 40. In the example shown in Figure 5, inverters 21 and 22 are configured with a semiconductor module 30 that includes six semiconductor devices 40. Details of the semiconductor module 30 and the semiconductor devices 40 will be described later.

[0053] Capacitor 23 provides a smoothing capacitor 7. Capacitor 23 includes, for example, a case (not shown) and a capacitor element housed in the case. The capacitor element is, for example, a film capacitor element. The capacitor element is formed by winding a film around an axis in a predetermined direction. The capacitor element has electrodes (not shown) on both ends of the axis. The electrodes are sometimes called metal capacitors. Capacitor 23 includes a P busbar 23P connected to the positive electrode and an N busbar 23N connected to the negative electrode.

[0054] The P busbar 23P and N busbar 23N are plate-shaped metal members. The P busbar 23P and N busbar 23N are connected to their corresponding electrodes by soldering, resistance welding, laser welding, etc. Figure 5 shows the terminal portions of the P busbar 23P and N busbar 23N for connection to the semiconductor module 30 (semiconductor device 40). The P busbar 23P and N busbar 23N have terminal portions (not shown) for electrically connecting the smoothing capacitor 7 and the DC power supply 2.

[0055] Although not shown in the diagram, the semiconductor switch providing the switch 10 is, for example, integrally provided with the capacitor 23. The semiconductor switch is provided, for example, in the P busbar 23P, in the path that electrically connects the terminal portion connected to the inverter 21 and the terminal portion connected to the inverter 22. The semiconductor switch may also be provided, for example, in the N busbar 23N, in the path that electrically connects the terminal portion connected to the inverter 21 and the terminal portion connected to the inverter 22.

[0056] The output terminal block 24 electrically relays the inverters 21 and 22 and the rotating electric machine 3. The output terminal block 24 is sometimes referred to as a motor terminal block. The output terminal block 24 comprises an electrically insulating case made of resin or the like, and busbars held in the case. Busbar 24U1 provides an output line 13 connected to node U1 of inverter 8 (21). Busbar 24U2 provides an output line 16 connected to node U2 of inverter 9 (22). Busbar 24V1 provides an output line 13 connected to node V1 of inverter 8 (21). Busbar 24V2 provides an output line 16 connected to node V2 of inverter 9 (22). Busbar 24W1 provides an output line 13 connected to node W1 of inverter 8 (21). Busbar 24W2 provides an output line 16 connected to node W2 of inverter 9 (22).

[0057] Busbars 24U1H and 24U1L are electrically connected to busbar 24U1. Busbars 24U1H and 24U1L may be connected to busbar 24U1 in a continuous manner or by a joint. Busbar 24U1H is electrically connected to the upper arm 8H of the U phase of inverter 8(21), and busbar 24U1L is electrically connected to the lower arm 8L of the U phase. Busbars 24U2H and 24U2L are electrically connected to busbar 24U2. Busbar 24U2H is electrically connected to the upper arm 9H of the U phase of inverter 9(22), and busbar 24U2L is electrically connected to the lower arm 9L of the U phase.

[0058] Similarly, busbars 24V1H and 24V1L are electrically connected to busbar 24V1. Busbar 24V1H is electrically connected to the upper V-phase arm 8H of inverter 8(21), and busbar 24U1L is electrically connected to the lower V-phase arm 8L. Busbars 24V2H and 24V2L are electrically connected to busbar 24V2. Busbar 24V2H is electrically connected to the upper V-phase arm 9H of inverter 9(22), and busbar 24V2L is electrically connected to the lower V-phase arm 9L.

[0059] Busbars 24W1H and 24W1L are electrically connected to busbar 24W1. Busbar 24W1H is electrically connected to the upper arm 8H of the W phase of inverter 8(21), and busbar 24W1L is electrically connected to the lower arm 8L of the W phase. Busbars 24W2H and 24W2L are electrically connected to busbar 24W2. Busbar 24W2H is electrically connected to the upper arm 9H of the W phase of inverter 9(22), and busbar 24W2L is electrically connected to the lower arm 9L of the W phase.

[0060] The current sensor 25 provides the current sensor 12. The current sensor 25 is located on the busbars 24U2, 24V2, and 24W2 of the output terminal block 24. The current sensor 25 individually detects the phase current flowing through each of the busbars 24U2, 24V2, and 24W2. The current sensor 25 may be provided integrally with the output terminal block 24. The current sensor 25 may be located on the busbars 24U1, 24V1, and 24W1, or on the busbars 24U1, 24V1, 24W1, 24U2, 24V2, and 24W2.

[0061] In the power conversion device 20 described above, the semiconductor module 30 is positioned between the capacitor 23 and the output terminal block 24 in the Y direction. Multiple semiconductor devices 40 are arranged in a line in the X direction.

[0062] The power converter 20 may include a case housing inverters 21 and 22, a capacitor 23, an output terminal block 24, and a current sensor 25. The power converter 20 may also include a cooler for cooling semiconductor modules 30 and the like. The cooler may have a configuration in which a coolant flows through an internal channel, or it may be a heat sink equipped with fins or the like. The cooler may be provided integrally with the case housing the inverters 21 and 22. The power converter 20 may also include an input terminal block that electrically relays the smoothing capacitor 7 (capacitor 23) and the DC power supply 2. The power converter 20 may also include a circuit board providing a control unit 11.

[0063] <Semiconductor Modules and Semiconductor Devices> Figure 6 is a plan view showing an example of a semiconductor module 30. Figure 6 corresponds to Figure 5. In Figure 6, as in Figure 5, elements covered by the encapsulant are shown transparently. As described above, the semiconductor module 30 provides two inverters 21, 22 (8, 9) connected to a common rotating electric machine 3. The semiconductor module 30 includes at least one semiconductor device 40.

[0064] In the example shown in Figure 6, the semiconductor module 30 has a U-phase semiconductor module 30U, a V-phase semiconductor module 30V, and a W-phase semiconductor module 30W. Semiconductor module 30U provides the U-phase for inverters 21 and 22. Semiconductor module 30V provides the V-phase for inverters 21 and 22. Semiconductor module 30W provides the W-phase for inverters 21 and 22. Semiconductor modules 30U, 30V, and 30W are aligned in the X direction. Each of semiconductor modules 30U, 30V, and 30W contains two semiconductor devices 40. Semiconductor module 30 contains six semiconductor devices 40.

[0065] Semiconductor module 30U includes semiconductor devices 40U1 and 40U2 as semiconductor devices 40. Semiconductor devices 40U1 and 40U2 are arranged side by side in the X direction so as to be adjacent to each other. Semiconductor module 30V includes semiconductor devices 40V1 and 40V2. Semiconductor devices 40V1 and 40V2 are arranged side by side in the X direction so as to be adjacent to each other. Semiconductor module 30W includes semiconductor devices 40W1 and 40W2. Semiconductor devices 40W1 and 40W2 are arranged side by side in the X direction so as to be adjacent to each other.

[0066] The semiconductor module 30 comprises semiconductor elements 41 and 42 and current path sections 43 and 44. The semiconductor device 40 illustrated in Figure 6 comprises semiconductor elements 41 and 42 and current path sections 43 and 44 within a single semiconductor device 40. Semiconductor element 41 constitutes inverter 21(8). Semiconductor element 42 constitutes inverter 22(9). Current path section 43 constitutes inverter 21. Current path section 44 constitutes inverter 22.

[0067] The semiconductor elements 41 and 42 are formed by creating vertical elements on a semiconductor substrate made of materials such as silicon (Si) or a wide-bandgap semiconductor with a wider bandgap than silicon. Examples of wide-bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor elements 41 and 42 are sometimes referred to as power elements or semiconductor chips.

[0068] The vertical elements are configured to carry the main current in the thickness direction of the semiconductor elements 41 and 42 (semiconductor substrate). The semiconductor elements 41 and 42 are arranged so that their thickness direction is substantially parallel to the Z direction. The semiconductor elements 41 and 42 have main electrodes on both sides in the thickness direction. In this embodiment, the semiconductor elements 41 and 42 are formed as n-channel type MOSFETs as vertical elements on a semiconductor substrate made of SiC. The semiconductor elements 41 and 42 have a drain electrode on the lower surface facing the substrate 45 (described later) and a source electrode on the upper surface opposite to the lower surface as their main electrodes.

[0069] When a MOSFET is turned on, a current (main current) flows between the main electrodes, i.e., between the drain electrode and the source electrode. If the diode is a parasitic diode, the source electrode also acts as the anode electrode, and the drain electrode also acts as the cathode electrode. The diode may be configured on a separate chip from the MOSFET. The drain electrode is the main electrode on the high-potential side, and the source electrode is the main electrode on the low-potential side. The drain electrode is formed over almost the entire bottom surface. The source electrode is formed on a portion of the top surface.

[0070] The semiconductor elements 41 and 42 have a substantially rectangular planar shape. The semiconductor elements 41 and 42 have pads on their upper surfaces, which are signal electrodes. The pads are formed on the upper surface at positions different from those of the source electrodes. The pads include at least a gate pad.

[0071] Semiconductor element 41 includes semiconductor element 41H which constitutes the upper arm 8H and semiconductor element 41L which constitutes the lower arm 8L. Semiconductor element 42 includes semiconductor element 42H which constitutes the upper arm 9H and semiconductor element 42L which constitutes the lower arm 9L. The configurations of semiconductor elements 41 and 42 may be common to each other or different to each other. Semiconductor element 41H has semiconductor elements 41UH, 41VH, and 41WH. Semiconductor element 41L has semiconductor elements 41UL, 41VL, and 41WL. Semiconductor element 42H has semiconductor elements 42UH, 42VH, and 42WH. Semiconductor element 42L has semiconductor elements 42UL, 42VL, and 42WL. In the following, semiconductor elements 41H, 41UH, 41VH, 41WH, 42H, 42UH, 42VH, and 42WH may be referred to as upper arm elements. Semiconductor elements 41L, 41UL, 41VL, 41WL, 42L, 42UL, 42VL, and 42WL are sometimes referred to as lower arm elements.

[0072] The semiconductor elements 41 and 42 are aligned in the X direction. The semiconductor elements 41 and 42 are arranged alternately in the X direction. The semiconductor elements 41 and 42 are arranged such that elements with at least a portion of their on-timing overlap are adjacent to each other. For example, the semiconductor elements 41 and 42 that constitute the U phase of inverters 21 and 22, i.e., the semiconductor module 30U, are arranged in the order of semiconductor element 42UL, semiconductor element 41UH, semiconductor element 42UH, and semiconductor element 41UL from one end in the X direction. Semiconductor device 40U1 includes semiconductor element 41UH and semiconductor element 42UL. The semiconductor elements 41UH and 42UL are aligned in the X direction. Semiconductor device 40U2 includes semiconductor element 41UL and semiconductor element 42UH. The semiconductor elements 41UL and 42UH are aligned in the X direction. The semiconductor elements 41UH, 41UL, 42UH, and 42UL are arranged in the X direction such that semiconductor elements 41UH and 42UH are adjacent to each other. The semiconductor devices 40U1 and 40U2 are arranged such that semiconductor elements 41UH and 42UH are adjacent to each other.

[0073] The semiconductor elements 41 and 42 that constitute the V phase of inverters 21 and 22, i.e., semiconductor module 30V, are arranged in the same way as the U phase. The semiconductor elements 41 and 42 that constitute semiconductor module 30V are arranged in the order of semiconductor element 42VL, semiconductor element 41VH, semiconductor element 42VH, and semiconductor element 41VL from one end in the X direction. Semiconductor element 42VL is located next to semiconductor element 41UL. Semiconductor device 40V1 includes semiconductor element 41VH and semiconductor element 42VL. Semiconductor elements 41VH and 42VL are aligned in the X direction. Semiconductor device 40V2 includes semiconductor element 41VL and semiconductor element 42VH. Semiconductor elements 41VL and 42VH are aligned in the X direction. Semiconductor elements 41VH, 41VL, 42VH, and 42VL are arranged in the X direction such that semiconductor elements 41VH and 42VH are adjacent to each other. In semiconductor devices 40V1 and 40V2, semiconductor elements 41VH and 42VH are arranged so that they are adjacent to each other.

[0074] The semiconductor elements 41 and 42 that constitute the W phase of inverters 21 and 22, i.e., semiconductor module 30W, are arranged in the same way as the U phase. The semiconductor elements 41 and 42 that constitute semiconductor module 30W are arranged in the order of semiconductor element 42WL, semiconductor element 41WH, semiconductor element 42WH, and semiconductor element 41WL from one end in the X direction. Semiconductor element 42WL is located next to semiconductor element 41VL. Semiconductor device 40W1 includes semiconductor element 41WH and semiconductor element 42WL. Semiconductor elements 41WH and 42WL are aligned in the X direction. Semiconductor device 40W2 includes semiconductor element 41WL and semiconductor element 42WH. Semiconductor elements 41WL and 42WH are aligned in the X direction. Semiconductor elements 41WH, 41WL, 42WH, and 42WL are arranged in the X direction such that semiconductor elements 41WH and 42WH are adjacent to each other. In semiconductor devices 40W1 and 40W2, semiconductor elements 41WH and 42WH are arranged adjacent to each other.

[0075] The current path section 43 has a current path section 43H including semiconductor element 41H and a current path section 43L including semiconductor element 41L. The current path section 44 has a current path section 44H including semiconductor element 42H and a current path section 44L including semiconductor element 42L. The semiconductor module 30 has three current path sections 43H corresponding to semiconductor elements 41UH, 41VH, and 41WH. The semiconductor module 30 has three current path sections 43L corresponding to semiconductor elements 41UL, 41VL, and 41WL. The semiconductor module 30 has three current path sections 44H corresponding to semiconductor elements 42UH, 42VH, and 42WH. The semiconductor module 30 has three current path sections 44L corresponding to semiconductor elements 42UL, 42VL, and 42WL. The current path sections 43 and 44 are aligned in the X direction corresponding to the arrangement of semiconductor elements 41 and 42.

[0076] The current path sections 43 and 44 may be configured, for example, with a substrate 45 and an external connection terminal 46. The substrate 45 is positioned on the drain electrode side with respect to the semiconductor elements 41 and 42. The substrate 45 is provided, for example, in units of semiconductor devices 40. The substrate 45 has an insulating substrate 451 and wiring 452 arranged on one surface of the insulating substrate 451. The insulating substrate 451 is formed using an electrically insulating material such as ceramic or resin. The substrate 45 may have a metal body arranged on the opposite side in the Z direction from the one surface.

[0077] The wiring 452 is formed from a metal with good electrical and thermal conductivity, such as Cu or Al. The wiring 452 may have a plating film of Ni or Au on its surface. In the example shown in Figure 6, the substrate 45 has wirings 452H and 452L as wirings 452. One semiconductor element 42 is mounted on each wiring 452. Wiring 452H constitutes the current path sections 43H and 44H on the upper arm side. An upper arm element 41H or upper arm element 42H is placed on wiring 452H. The drain electrode of the upper arm element 41H or upper arm element 42H is joined to wiring 452H. Wiring 452L constitutes the current path sections 43L and 44H on the lower arm side. A lower arm element 41L or lower arm element 42L is placed on wiring 452L. The drain electrode of the lower arm element 41L or lower arm element 42L is joined to wiring 452L.

[0078] Wires 452H and 452L extend in the Y direction. In a single semiconductor device 40, wires 452H and 452L are aligned in the X direction, which is perpendicular to the extension direction. Wires 452H and 452L run parallel to each other. Wires 452H and 452L are positioned opposite each other. In two adjacent semiconductor devices 40, wires 452H or wires 452L run parallel to each other.

[0079] The external connection terminal 46 is a terminal for electrically connecting the semiconductor module 30 (semiconductor device 40) to an external device. The external connection terminal 46 is formed using a metal material with good conductivity, such as copper. The external connection terminal 46 is, for example, a plate. The external connection terminal 46 includes output terminals 461A, 462A, P terminal 46P, and N terminal 46N as main terminals that are electrically connected to the main electrodes of the semiconductor elements 41 and 42.

[0080] Output terminals 461A and 462A are sometimes referred to as AC terminals or O terminals. Output terminals 461A and 462A are electrically connected to the opposing phase windings 3U, 3V, and 3W of the rotating electric machine 3 via the output terminal block 24. Output terminals 461A and 462A are provided for each current path section 43 and 44. In the example shown in Figure 6, one output terminal 461A is provided for each current path section 43H and 44H, and one output terminal 462A is provided for each current path section 43L and 44L. Each semiconductor device 40 is equipped with one output terminal 461A and one output terminal 462A. Output terminals 461A and 462A extend in the Y direction. Output terminals 461A and 462A are arranged side by side in the X direction. Output terminals 461A and 462A are arranged opposite each other. In current path sections 43H and 44H, output terminal 461A is connected to the source electrode of the upper arm element. In current path sections 43L and 44L, output terminal 462A is connected to wiring 452L.

[0081] For example, the output terminal 461A on the upper arm side of semiconductor device 40U1 is connected to busbar 24U1H of output terminal block 24, and the output terminal 462A on the lower arm side is connected to busbar 24U2L. The output terminal 461A on the upper arm side of semiconductor device 40U2 is connected to busbar 24U2H, and the output terminal 462A on the lower arm side is connected to busbar 24U1L. Similarly, the output terminal 461A on the upper arm side of semiconductor device 40V1 is connected to busbar 24V1H of output terminal block 24, and the output terminal 462A on the lower arm side is connected to busbar 24V2L. The output terminal 461A on the upper arm side of semiconductor device 40V2 is connected to busbar 24V2H, and the output terminal 462A on the lower arm side is connected to busbar 24V1L. The output terminal 461A on the upper arm side of semiconductor device 40W1 is connected to busbar 24W1H of output terminal block 24, and the output terminal 462A on the lower arm side is connected to busbar 24W2L. The output terminal 461A on the upper arm side of semiconductor device 40W2 is connected to busbar 24W2H, and the output terminal 462A on the lower arm side is connected to busbar 24W1L.

[0082] The P terminal 46P is sometimes referred to as the positive terminal or high-potential power supply terminal. The P terminal 46P is electrically connected to the P busbar 23P of the capacitor 23. The N terminal 46N is sometimes referred to as the negative terminal or low-potential power supply terminal. The N terminal 46N is electrically connected to the N busbar 23N of the capacitor 23. The P terminal 46P is provided for each current path section 43H, 44H. The N terminal 46N is provided for each current path section 43L, 44L. In the example shown in Figure 6, one P terminal 46P is provided for each current path section 43H, 44H, and one N terminal 46N is provided for each current path section 43L, 44L. Each semiconductor device 40 is equipped with one P terminal 46P and one N terminal 46N. In the semiconductor device 40, the P terminal 46P and the N terminal 46N extend in the Y direction. The P terminal 46P and the N terminal 46N are arranged side by side in the X direction. The P terminal 46P and the N terminal 46N are positioned opposite each other.

[0083] In addition to the main terminals described above, the external connection terminal 46 includes signal terminals (not shown). The signal terminals are electrically connected to the pads of the semiconductor elements 41 and 42. The signal terminals electrically connect, for example, the pads to the circuit board providing the control unit 11. The signal terminals include at least terminals for applying a drive voltage to the gate electrodes of the semiconductor elements 41 and 42.

[0084] As illustrated in Figure 6, the semiconductor device 40 may include a encapsulant 47. The encapsulant 47 encapsulates the elements of the semiconductor device 40. The encapsulant 47 integrally encapsulates a portion of the semiconductor elements 41, 42, the substrate 45, and the external connection terminals 46. In the example shown in Figure 6, the encapsulant 47 has a substantially rectangular shape in plan. Of the external connection terminals 46, the output terminals 461A and 462A protrude to the outside from one side of the encapsulant 47. The P terminal 46P and N terminal 46N protrude to the outside in the Y direction from the side opposite to that of the output terminals 461A and 462A.

[0085] In a configuration where the substrate 45 is placed on the case or cooler of the power converter 20, the encapsulant 47 may be, for example, a gel or a potting resin. The encapsulant 47 may also be a molded resin body. The encapsulant 47 may be provided in units of semiconductor devices 40, as illustrated in Figure 6, or in units of semiconductor modules 30U, 30V, 30W. The encapsulant 47 may also be provided integrally in the semiconductor module 30.

[0086] In the semiconductor module 30 with the above configuration, the current path sections 43 and 44 are arranged alternately. Each of the current path sections 43 and 44 extends in the Y direction. The current path sections 43 and 44 in a single semiconductor device 40 are adjacent to each other in the X direction. The current path sections 43 and 44L run parallel to each other. The current path sections 43 and 44 are arranged opposite each other. In two adjacent semiconductor devices 40, the current path sections 43H and 44H on the upper arm side or the current path sections 43L and 44L on the lower arm side run parallel to each other.

[0087] In Figure 6, current paths 43H and 44L run parallel in each of the semiconductor devices 40U1, 40V1, and 40W1. Current paths 43L and 44H run parallel in each of the semiconductor devices 40U2, 40V2, and 40W2. Current paths 43H and 44H run parallel in adjacent semiconductor devices 40U1 and 40U2. Current paths 43H and 44H run parallel in adjacent semiconductor devices 40V1 and 40V2. Current paths 43H and 44H run parallel in adjacent semiconductor devices 40W1 and 40W2. Current paths 43L and 44L run parallel in adjacent semiconductor devices 40U2 and 40V1. Current paths 43L and 44L run parallel in adjacent semiconductor devices 40V2 and 40W1.

[0088] The semiconductor module 30 is not limited to the configuration illustrated in Figure 6. The semiconductor module 30 providing inverters 21 and 22 only needs to include at least one semiconductor device 40, as described above. The semiconductor device 40 is not limited to a configuration that includes one semiconductor element 41 and one semiconductor element 42.

[0089] For example, as shown in Figure 7, the semiconductor device 40U1 may include two semiconductor elements 41UH that constitute the U-phase upper arm of the inverter 21, and two semiconductor elements 42UL that constitute the U-phase lower arm of the inverter 22, as semiconductor elements 41 and 42. The two semiconductor elements 41UH are arranged on a wiring 452H that extends in the Y direction. The semiconductor elements 41UH are aligned in the Y direction. The output terminal 461A is connected to the source electrodes of the two semiconductor elements 41UH. The two semiconductor elements 41UH are connected in parallel to each other.

[0090] Similarly, the two semiconductor elements 42UL are arranged on a wiring 452L extending in the Y direction. The semiconductor elements 42UL are aligned in the Y direction. The N terminal 46N is joined to the source electrodes of the two semiconductor elements 42UL. The two semiconductor elements 42UL are connected in parallel to each other. One semiconductor element 41UH and one semiconductor element 42UL are aligned in the X direction, and the other semiconductor element 41UH and the other semiconductor element 42UL are aligned in the X direction. The group of semiconductor elements 41UH and the group of semiconductor elements 42UL are aligned in the X direction. The current path section 43H and the current path section 43L run parallel to each other in the X direction.

[0091] The number of semiconductor elements 41 and 42 connected in parallel is not limited to the example shown in Figure 7 (two). There may be three or more. Figure 7 shows an example in which the semiconductor elements 41 and 42 connected in parallel are arranged side by side in the Y direction, but is not limited to this. For example, as shown in Figure 8, two semiconductor elements 41UH may be arranged side by side in the X direction, and two semiconductor elements 42UL may be arranged side by side in the X direction. Four semiconductor elements 41 and 42 are arranged in a line, with one semiconductor element 41UH and one semiconductor element 42UL adjacent to each other. The group of semiconductor elements 41UH and the group of semiconductor elements 42UL are aligned in the X direction. The current path section 43H and the current path section 43L run parallel to each other in the X direction. Other semiconductor devices 40 constituting the semiconductor module 30 may have a configuration similar to the semiconductor device 40U1 shown in Figures 7 and 8.

[0092] The semiconductor device 40 is not limited to a configuration that provides two of the twelve arms of the inverter 21, 22(8,9). For example, as shown in Figure 9, the semiconductor device 40U may provide four arms that constitute the semiconductor module 30U. The semiconductor device 40U has a structure that integrates the two semiconductor devices 40U1 and 40U2 described above. The semiconductor device 40U includes semiconductor elements 41UH, 41UL, 42UH, and 42UL. The semiconductor device 40U includes two output terminals 461A, two output terminals 462A, two P terminals 46P, and two N terminals 46N. In the example shown in Figure 9, two wirings 452H and two wirings 452L are provided on a single substrate 45. The semiconductor device 40U includes one current path section each of 43H, 43L, 44H, and 44L.

[0093] The semiconductor elements 41UH, 41UL, 42UH, and 42UL are aligned in the X direction. In the X direction, they are arranged in the order of semiconductor element 42UL, semiconductor element 41UH, semiconductor element 42UH, and semiconductor element 41UL. Semiconductor element 42UL is located next to semiconductor element 41UH. Semiconductor element 41UL is located next to semiconductor element 42UH. Semiconductor element 41UH is located next to semiconductor element 42UH. Current path section 43H and current path section 44L run parallel to each other in the X direction. Current path section 43L and current path section 44H run parallel to each other in the X direction. Current path section 43H and current path section 44H run parallel to each other in the X direction. Other semiconductor devices 40 of the other phases constituting the semiconductor module 30 may have a configuration similar to the semiconductor device 40U shown in Figure 9.

[0094] For example, as shown in Figure 10, one semiconductor device 40S may provide one arm. The four semiconductor devices 40S illustrated in Figure 10 constitute a semiconductor module 30U. One semiconductor device 40S comprises a semiconductor element 41UH and a current path portion 43H. Another semiconductor device 40S comprises a semiconductor element 41UL and a current path portion 43L. Another semiconductor device 40S comprises a semiconductor element 42UH and a current path portion 44H. Another semiconductor device 40S comprises a semiconductor element 42UL and a current path portion 44L.

[0095] The semiconductor elements 41UH, 41UL, 42UH, and 42UL are aligned in the X direction. In the X direction, they are arranged in the order of semiconductor element 42UL, semiconductor element 41UH, semiconductor element 42UH, and semiconductor element 41UL. Semiconductor element 42UL is located next to semiconductor element 41UH. Semiconductor element 41UL is located next to semiconductor element 42UH. Semiconductor element 42UH is located next to semiconductor element 41UH. Current path section 43H and current path section 44L run parallel to each other in the X direction. Current path section 43L and current path section 44H run parallel to each other in the X direction. Current path section 43H and current path section 44H run parallel to each other in the X direction. Other semiconductor devices 40 constituting the semiconductor module 30 may have the same configuration as the semiconductor device 40S shown in Figure 10. That is, the semiconductor module 30 may include 12 semiconductor devices 40S.

[0096] Although not shown in the diagram, the semiconductor module 30 may contain only one semiconductor device 40. The semiconductor device 40 may have a structure that integrates, for example, the six semiconductor devices 40U1, 40U2, 40V1, 40V2, 40W1, and 40W2 described above. Figures 7 to 10 show other examples of the semiconductor device 40. Figures 7 to 10 correspond to Figure 6. In Figures 7 to 10 as well, the elements covered by the encapsulant 47 are shown transparently.

[0097] <Magnetic flux cancellation during open-connection driving> During open - connection drive (H drive), in the common phase of the inverters 21, 22 (8, 9), one upper arm and the other lower arm are turned on. In the semiconductor module 30 described above, in the common phase, one upper - arm element of the inverters 21, 22 and the other lower - arm element of the inverters 21, 22 are arranged side by side. The current - path part 43H including the upper - arm element and the current - path part 44L including the lower - arm element, or the current - path part 44H including the upper - arm element and the current - path part 43L including the lower - arm element run parallel to each other.

[0098] FIG. 11 shows the semiconductor device 40W2 having the configuration shown in FIG. 6. In FIG. 11, the current flowing at the timing when both the lower arm 8L of the W phase and the upper arm 9H of the W phase are turned on, that is, when both the semiconductor elements 41WL and 42WH are turned on, as illustrated in FIG. 4, is indicated by a dashed - arrow. In the semiconductor device 40W2, the semiconductor element 42WH is arranged adjacent to the semiconductor element 41WL. The current - path parts 43L and 44H run parallel to each other. The current flowing through the current - path part 43H including the semiconductor element 42WH and the current flowing through the current - path part 43L including the semiconductor element 41WL are in opposite directions and face each other as indicated by the dashed - arrow. Therefore, the inductance can be reduced by magnetic - flux cancellation.

[0099] The same applies to the other semiconductor devices 40U1, 40U2, 40V1, 40V2, 40W1. The same also applies to the configurations shown in other examples such as FIG. 10.

[0100] <Magnetic - flux cancellation during Y - connection drive> During star-connection drive (Y drive), inverter 9 (22) is neutralized, and inverter 8 (21) is controlled according to drive requests, etc. Figure 12 shows a semiconductor module 30 with the configuration shown in Figure 6. In Figure 12, the dashed arrows indicate the current that flows when all the upper arms 9H of inverter 9 are turned on to neutralize it, as illustrated in Figure 3, and when both the upper arm 8H of the U phase and the lower arm 8L of the W phase of inverter 8 are turned on. In other words, it shows the current that flows when semiconductor elements 42UH, 42VH, and 42WH are turned on to neutralize inverter 22, and semiconductor elements 41UH and 41WL are turned on.

[0101] In the X direction, semiconductor device 40U1 is positioned next to semiconductor device 40U2. Semiconductor element 41UH is positioned next to semiconductor element 42UH in the X direction. The current path 43H including semiconductor element 41UH and the current path 44H including semiconductor element 42UH run parallel to each other. The current flowing through the current path 43H including semiconductor element 41UH and the current flowing through the current path 44H including semiconductor element 42UH are opposite to each other and in opposite directions, as shown by the dashed arrows. Therefore, the inductance can be reduced by magnetic flux cancellation.

[0102] In semiconductor device 40W2, semiconductor element 42WH is located next to semiconductor element 41WL. Current paths 43L and 44H run parallel to each other. The current flowing through current path 44H including semiconductor element 42WH and the current flowing through current path 43L including semiconductor element 41WL are opposite to each other and in opposite directions, as shown by the dashed arrows. Therefore, the inductance can be reduced by magnetic flux cancellation. The same applies to the configuration shown in other examples such as Figure 10.

[0103] <Summary of the First Embodiment> As described above, the power converter 20 of this embodiment includes two inverters 21, 22 (8, 9) connected to a common rotating electric machine 3. The inverters 21, 22 are configured to include a semiconductor module 30. The semiconductor module 30 includes semiconductor elements 41, 42 and current path sections 43, 44. In the X direction, a semiconductor element 42 constituting the inverter 22 is located next to a semiconductor element 41 constituting the inverter 21, such that at least a portion of its on-timing overlaps with the on-timing of semiconductor element 41. Furthermore, the current path section 43 including semiconductor element 41 and the current path section 44 including semiconductor element 42 run parallel to each other in the X direction, so that the currents flowing through them are in opposite directions and facing each other.

[0104] With the above arrangement, when adjacent semiconductor elements 41 and 42 are both turned on, the current flowing through current path section 43 and the current flowing through current path section 44 are opposite to each other in opposite directions. Therefore, the inductance can be reduced by canceling out the magnetic flux. Note that inverter 21(8) corresponds to the first inverter, and inverter 22(9) corresponds to the second inverter. Semiconductor element 41 corresponds to the first semiconductor element, and semiconductor element 42 corresponds to the second semiconductor element. Current path section 43 corresponds to the first current path section, and current path section 44 corresponds to the second current path section. The X direction corresponds to a predetermined direction.

[0105] The semiconductor element 41 may constitute a predetermined phase of the inverter 21, and the semiconductor element 42 may constitute a predetermined phase of the inverter 22. In other words, adjacent semiconductor elements 41 and 42 may constitute a common phase in the inverters 21 and 22, for example, both being the U phase. When both semiconductor elements 41 and 42 are turned on and current flows in the common phase of the inverters 21 and 22, the current flowing through the current path section 43 and the current flowing through the current path section 44 face each other in opposite directions. Therefore, the inductance can be reduced by magnetic flux cancellation.

[0106] Inverter 21 may be connected to one end of windings 3U, 3V, and 3W of the rotating electric machine 3, and inverter 22 may be connected to the other end of windings 3U, 3V, and 3W. Inverters 21 and 22 may be configured to switch between star connection drive, which uses inverter 22 as the neutral point, and open connection drive, which opens the neutral point provided by inverter 22 and controls the voltage applied to windings 3U, 3V, and 3W for each phase. In such a configuration, current flows through the common phase in inverters 21 and 22 when using star connection drive. Also, current flows through the common phase in inverters 21 and 22 when using open connection drive. As described above, by arranging the semiconductor elements 41 and 42 that constitute the common phase adjacent to each other, the inductance can be reduced by canceling out magnetic flux.

[0107] One of the semiconductor elements 41, 42 may be an upper arm element, and the other of the semiconductor elements 41, 42 may be a lower arm element. In open-connection driving, in a common phase, one upper arm of inverter 21, 22 and the other lower arm of inverter 21, 22 are turned on. By combining adjacent semiconductor elements 41, 42 as semiconductor element 41H and semiconductor element 42L, and / or semiconductor element 41L and semiconductor element 42H, both semiconductor elements 41 and 42 are turned on during open-connection driving. Therefore, inductance can be reduced by magnetic flux cancellation.

[0108] The semiconductor module 30 may include at least one semiconductor device 40 having semiconductor elements 41, 42, a P terminal 46P, an N terminal 46N, and output terminals 461A, 462A. One of the current path sections 43 and 44 may have a P terminal 46P, an upper arm element, and an output terminal 461A, while the other of the current path sections 43 and 44 may have an N terminal 46N, a lower arm element, and an output terminal 462A. With this configuration, in a single semiconductor device, when driven in an open connection, currents flow in opposite directions through the current path sections 43 and 44. Therefore, inductance can be reduced by magnetic flux cancellation. Since the semiconductor elements 41, 42 and adjacent current path sections 43 and 44 are provided within a single semiconductor device 40, the size can be reduced. This enhances the effect of magnetic flux cancellation and further reduces inductance. Note that output terminal 461A corresponds to the first output terminal, and output terminal 462A corresponds to the second output terminal.

[0109] The semiconductor module 30 may include two semiconductor devices 40 that constitute a common phase of inverters 21 and 22. One of the semiconductor devices 40 comprises semiconductor elements 41H and 42L, and current path sections 43H and 44L. The other semiconductor device 40 comprises semiconductor elements 41L and 42H, and current path sections 43L and 44H. The two semiconductor devices 40 may be arranged such that the current flowing through the current path section 43 of one semiconductor device 40 and the current flowing through the current path section 44 of the other semiconductor device 40 are opposite to each other in opposite directions. When driven in a star connection, the currents flowing through adjacent current path sections 43 and 44 of the two semiconductor devices 40 are opposite to each other in opposite directions. As described above, when driven in an open connection, the currents flowing through adjacent current path sections 43 and 44 in each semiconductor device are opposite to each other in opposite directions. Therefore, inductance can be reduced by magnetic flux cancellation in both star connection and open connection driving.

[0110] The semiconductor module 30 may include, for example, semiconductor devices 40U1 and 40U2. Semiconductor device 40U1 comprises semiconductor elements 41UH and 42UL, and current path sections 43H and 44L. Semiconductor device 40U2 comprises semiconductor elements 41UL and 42UH, and current path sections 43L and 44H. Semiconductor devices 40U1 and 40U2 are arranged such that the current flowing through one current path section 43 of semiconductor devices 40U1 and 40U2 and the current flowing through another current path section 44 of semiconductor devices 40U1 and 40U2 are opposite to each other in opposite directions. When driven in a star connection, the currents flowing through adjacent current path sections 43 and 44 of the two semiconductor devices 40U1 and 40U2 are opposite to each other in opposite directions. Therefore, the inductance can be reduced by magnetic flux cancellation. The same applies to semiconductor devices 40V1 and 40V2, and semiconductor devices 40W1 and 40W2.

[0111] The two semiconductor devices 40 that constitute the common phase of inverters 21 and 22 may be arranged side by side in the X direction such that the upper arm elements 41H and 42H or the lower arm elements 41L and 42L are adjacent to each other in the X direction. For example, by arranging them on a common plane such as a case or cooler, the two semiconductor devices 40 satisfy a predetermined positional relationship, and the currents flowing through the adjacent current path sections 43 and 44 of the two semiconductor devices 40 face each other in opposite directions. Therefore, the inductance can be reduced by magnetic flux cancellation with a simple configuration.

[0112] In the X direction, adjacent semiconductor elements 41 and 42 may both be upper arm elements 41H and 42H, or both be lower arm elements 41L and 42L. When driven in a star connection, the currents flowing through adjacent current paths 43 and 44 of the two semiconductor devices 40 are in opposite directions and face each other. Therefore, the inductance can be reduced by magnetic flux cancellation. Although not shown in the figures, a single semiconductor device 40 may have upper arm elements 41H and 42H as adjacent semiconductor elements 41 and 42 that constitute the common phase of inverters 21 and 22. The semiconductor device 40 may also have lower arm elements 41L and 42L that constitute the common phase of inverters 21 and 22.

[0113] Semiconductor elements 41 and 42, in which MOSFETs are formed on a SiC substrate, may also be used. This configuration reduces inductance and, consequently, switching surges. This allows for, for example, an increase in switching speed. Furthermore, it suppresses the increase in the number of elements.

[0114] (Second Embodiment) This embodiment is a modification based on the prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, an example was shown in which two inverters were connected to an open-winding type rotating electric machine. Instead, the two inverters are connected to a star-connected type rotating electric machine. Figure 13 shows the drive system 1 and power conversion circuit 4 according to this embodiment. Figure 13 shows the circuit configuration of the power conversion circuit 4. The drive system 1, like the previous embodiment, includes a DC power supply 2, a rotating electric machine 3, and a power conversion circuit 4. The rotating electric machine (REM) 3 is a star-connected type rotating electric machine. The rotating electric machine 3 has, for example, 2 x 3 phase windings. In the example shown in Figure 13, the rotating electric machine 3 has 6 phase windings U1, V1, W1, U2, V2, and W2. The windings U2, V2, and W2 are wound so as not to cause a phase difference with respect to the corresponding windings U1, V1, and W1.

[0115] The power conversion circuit 4, like the prior embodiment, includes two inverters 8 and 9. Inverter 8 drives a three-phase rotating electric machine, and inverter 9 drives the remaining three-phase rotating electric machine. Node U1 of inverter 8 is connected to the U1 phase winding, node V1 is connected to the V1 phase winding, and node W1 is connected to the W1 phase winding. Node U2 of inverter 9 is connected to the U2 phase winding, node V2 is connected to the V2 phase winding, and node W2 is connected to the W2 phase winding.

[0116] The power conversion circuit 4 includes smoothing capacitors 71 and 72. Smoothing capacitor 71 is located between the DC power supply 2 and the inverter 8. Smoothing capacitor 71 is connected in parallel to the inverter 8. Smoothing capacitor 72 is located between the DC power supply 2 and the inverter 9. Smoothing capacitor 72 is connected in parallel to the inverter 9.

[0117] Figure 14 shows an example of a power converter 20 and a semiconductor module 30. Similar to the prior embodiment, the power converter 20 includes at least semiconductor modules 30 that constitute inverters 21 and 22. The semiconductor module 30 includes at least one semiconductor device 40. The configuration of the semiconductor device 40 is the same as in the prior embodiment. A single semiconductor device 40 may provide one arm or multiple arms. For convenience, in Figure 14, the insulating substrate 451 and the encapsulant 47 that constitute the substrate 45 are omitted.

[0118] The semiconductor module 30, like the prior embodiment, includes semiconductor elements 41 and 42 and current path sections 43 and 44. Semiconductor element 41 constitutes an inverter 21(8), and semiconductor element 42 constitutes an inverter 22(9). Semiconductor element 41 has 41UH and 41UL which constitute the U1 phase upper and lower arm circuit 8HL, 41VH and 41VL which constitute the V1 phase upper and lower arm circuit 8HL, and 41WH and 41WL which constitute the W1 phase upper and lower arm circuit 8HL. Semiconductor element 42 has 42UH and 42UL which constitute the U2 phase upper and lower arm circuit 9HL, 42VH and 42VL which constitute the V2 phase upper and lower arm circuit 9HL, and 42WH and 42WL which constitute the W2 phase upper and lower arm circuit 9HL.

[0119] The semiconductor elements 41 and 42 are aligned in the X direction. The semiconductor elements 41 and 42 are arranged alternately in the X direction. The semiconductor elements 41 and 42 are arranged so that elements whose on-timing overlaps by at least a portion are adjacent to each other. In the example shown in Figure 14, the upper arm elements 41H and 42H of the common phase are adjacent to each other, and the lower arm elements 41L and 42L of the common phase are adjacent to each other.

[0120] Specifically, semiconductor element 42UH is located next to semiconductor element 41UH. Semiconductor element 42VH is located next to semiconductor element 41VH. Semiconductor element 42WH is located next to semiconductor element 41WH. Semiconductor element 42UL is located next to semiconductor element 41UL. Semiconductor element 42VL is located next to semiconductor element 41VL. Semiconductor element 42WL is located next to semiconductor element 41WL. The semiconductor module 30 includes semiconductor module 30U which provides the U1 and U2 phases of inverters 21 and 22, semiconductor module 30V which provides the V1 and V2 phases, and semiconductor module 30W which provides the W1 and W2 phases. Semiconductor modules 30U, 30V, and 30W are aligned in the X direction.

[0121] Similar to the prior embodiment, the current path section 43 is configured to include a semiconductor element 41. The current path section 44 is configured to include a semiconductor element 42. The current path sections 43 and 44 run parallel to each other in the X direction so that the currents flowing through them are in opposite directions and face each other. Specifically, the current path sections 43H and 44H of a common phase run parallel to each other. The current path sections 43L and 44 of a common phase run parallel to each other. The arrangement of the P terminal 46P and the output terminals 461A and 462A in the Y direction is reversed between the current path section 43H and the current path section 44H so that the direction of current flow is reversed. Similarly, the arrangement of the N terminal 46N and the output terminals 461A and 462A in the Y direction is reversed between the current path section 43L and the current path section 44L so that the direction of current flow is reversed between them.

[0122] <Summary of the second embodiment> The power converter 20 of this embodiment also includes two inverters 21, 22 (8, 9) connected to a common rotating electric machine 3. The semiconductor modules 30 constituting the inverters 21, 22 include semiconductor elements 41, 42 and current path sections 43, 44. In the X direction, a semiconductor element 42 constituting the inverter 22 is located next to a semiconductor element 41 constituting the inverter 21, such that at least a portion of its on-timing overlaps with the on-timing of semiconductor element 41. Furthermore, the current path section 43 including semiconductor element 41 and the current path section 44 including semiconductor element 42 are arranged parallel to each other in a predetermined direction such that the currents flowing through them are in opposite directions and facing each other.

[0123] With the above arrangement, when adjacent semiconductor elements 41 and 42 are both turned on, the current flowing through current path 43 and the current flowing through current path 44 are in opposite directions and face each other. Therefore, the inductance can be reduced by canceling out the magnetic flux.

[0124] The semiconductor element 41 may constitute a predetermined phase of the inverter 21, and the semiconductor element 42 may constitute a predetermined phase of the inverter 22. In other words, adjacent semiconductor elements 41 and 42 may constitute a common phase in the inverters 21 and 22, for example, phases U1 and U2. When both semiconductor elements 41 and 42 are turned on and current flows in the common phase of the inverters 21 and 22, the current flowing through current path section 43 and the current flowing through current path section 44 face each other in opposite directions. Therefore, inductance can be reduced by magnetic flux cancellation.

[0125] The dashed arrows in Figure 14 indicate the currents that flow when the upper arm elements of phases U1 and U2 and the lower arm elements of phases W1 and W2 are turned on. In other words, they indicate the currents that flow when the semiconductor elements 41UH, 42UH, 41WL, and 42WL are turned on. The current flowing through the current path section 43H including semiconductor element 41UH and the current flowing through the current path section 44H including semiconductor element 42UH are in opposite directions and face each other. Therefore, the inductance can be reduced by magnetic flux cancellation. The current flowing through the current path section 43L including semiconductor element 41WL and the current flowing through the current path section 44L including semiconductor element 42WL are in opposite directions and face each other. Therefore, the inductance can be reduced by magnetic flux cancellation.

[0126] Adjacent semiconductor elements 41 and 42 are not limited to a common phase. It is sufficient that a semiconductor element 42 constituting the inverter 22 is located next to a semiconductor element 41 constituting the inverter 21, such that at least a portion of its on-timing overlaps with the on-timing of semiconductor element 41. For example, a semiconductor element 42 providing a different phase from semiconductor element 41 may be placed next to semiconductor element 41, such that at least a portion of its on-timing overlaps with the on-timing of semiconductor element 41. Then, current path sections 43 and 44 can be arranged parallel to each other so that the currents flowing in opposite directions face each other.

[0127] (Other embodiments) The disclosures in this specification and drawings are not limited to the exemplary embodiments. The disclosures include the exemplary embodiments and variations thereof by those skilled in the art. For example, the disclosures are not limited to combinations of parts and / or elements shown in the embodiments. The disclosures are implementable in a variety of combinations. The disclosures may have additional parts that can be added to the embodiments. The disclosures include those in which parts and / or elements of the embodiments have been omitted. The disclosures include substitutions or combinations of parts and / or elements between one embodiment and another. The scope of the disclosed technical areas is not limited to the descriptions of the embodiments. Some of the scope of the disclosed technical areas are indicated by the claims and should be understood to include all modifications within the meaning and scope equivalent to the claims.

[0128] The disclosures in the specification and drawings are not limited by the claims. The disclosures in the specification and drawings encompass the technical ideas described in the claims and extend to a wider and more diverse range of technical ideas than those described in the claims. Therefore, a variety of technical ideas can be extracted from the disclosures in the specification and drawings without being bound by the claims.

[0129] When an element or layer is referred to as “on top of,” “connected to,” “connected to,” or “joined,” it may be directly on top of, connected to, connected to, or joined to another element or layer, and there may also be an intervening element or layer. In contrast, when an element is referred to as “directly on top of,” “directly connected to,” “directly connected to,” or “directly joined to” another element or layer, there is no intervening element or layer. Other words used to describe relationships between elements should be interpreted in a similar manner (e.g., “between” vs. “directly between,” “adjacent” vs. “directly adjacent,” etc.). As used in this specification, the term “and / or” includes any combination with respect to one or more of the enumerated items relating to the relationship, and all combinations thereof.

[0130] Spatially relative terms such as "inside," "outside," "back," "below," "low," "above," and "high" are used here to facilitate descriptions of the relationship between one element or feature and other elements or features, as illustrated. Spatially relative terms may be intended to encompass different orientations of the device in use or operation, in addition to the orientation depicted in the drawings. For example, if the device in the drawing is turned upside down, an element described as "below" or "directly below" another element or feature will be oriented "above" the other element or feature. Thus, the term "below" can encompass both up and down orientations. The device may also be oriented in other directions (it may be rotated 90 degrees or in other directions), and the spatially relative descriptors used in this specification will be interpreted accordingly.

[0131] (Disclosure of technical ideas) This specification discloses several technical concepts, as listed in the following paragraphs. Some paragraphs are written in a multiple dependent form, where subsequent paragraphs optionally refer to preceding paragraphs. Furthermore, some paragraphs are written in a multiple dependent form, referring to other multiple dependent forms. These paragraphs written in multiple dependent forms define several technical concepts.

[0132] <Technical philosophy 1> A semiconductor module comprising two inverters connected to a common rotating electric machine (3), The first semiconductor element (41, 41H, 41L) constitutes one of the inverters, the first inverter (8, 21), A second inverter (9,22), which is another inverter, comprises a second semiconductor element (42,42H,42L) whose on-timing overlaps with the on-timing of the first semiconductor element, The first current path section (43, 43H, 43L) includes the first semiconductor element, The second current path section (44, 44H, 44L) includes the second semiconductor element, Equipped with, In a predetermined direction, the second semiconductor element is positioned next to the first semiconductor element. The first current path and the second current path are arranged parallel to each other in the predetermined direction such that the currents flowing through them are in opposite directions and they face each other.

[0133] <Technical philosophy 2> The first semiconductor element constitutes a predetermined phase of the first inverter, The semiconductor module described in Technical Concept 1, wherein the second semiconductor element constitutes the predetermined phase of the second inverter.

[0134] <Technical philosophy 3> The first inverter is connected to one end of the windings (3U, 3V, 3W) of the rotating electric machine, and the second inverter is connected to the other end of the windings. The semiconductor module according to Technical Concept 2, wherein the first inverter and the second inverter are switchable between a star connection drive, which neutralizes the second inverter, and an open connection drive, which opens the neutral point provided by the second inverter and controls the voltage applied to the windings for each phase.

[0135] <Technical philosophy 4> A semiconductor module according to technical concept 3, wherein one of the first semiconductor element and the second semiconductor element is an upper arm element, and the other of the first semiconductor element and the second semiconductor element is a lower arm element.

[0136] <Technical philosophy 5> The first semiconductor device and, The preceding 2 semiconductor device, High-potential power supply terminal (46P), The high-potential power supply terminal and the low-potential power supply terminal (46N) arranged side by side in the predetermined direction, A first output terminal (461A) is provided corresponding to the aforementioned high-potential power supply terminal, A second output terminal (462A) is provided corresponding to the low-potential power supply terminal, A semiconductor device (40) comprising at least one such device, A semiconductor module according to technical concept 4, wherein one of the first current path and the second current path has the high-potential power supply terminal, the upper arm element, and the first output terminal, and the other of the first current path and the second current path has the low-potential power supply terminal, the lower arm element, and the second output terminal.

[0137] <Technical philosophy 6> As a semiconductor device that constitutes a common phase of the first inverter and the second inverter, A first semiconductor device (40U1, 40V1, 40W1) comprising the upper arm element of the first inverter, the lower arm element of the second inverter, the first current path section, and the second current path section, A second semiconductor device (40U2, 40V2, 40W2) comprising the lower arm element of the first inverter, the upper arm element of the second inverter, the first current path section, and the second current path section, Includes, A semiconductor module according to technical idea 4 or technical idea 5, wherein the first semiconductor device and the second semiconductor device are arranged such that the current flowing through one of the first current path portions of the first semiconductor device and the second semiconductor device and the current flowing through the other of the first semiconductor device and the second semiconductor device are opposite to each other.

[0138] <Technical philosophy 7> The semiconductor module according to technical concept 6, wherein the first semiconductor device and the second semiconductor device are arranged in a predetermined direction such that the upper arm elements or the lower arm elements are adjacent to each other in that predetermined direction.

[0139] <Technical philosophy 8> The semiconductor module described in Technical Concept 3, wherein both the first semiconductor element and the second semiconductor element are upper arm elements, or both are lower arm elements.

[0140] <Technical philosophy 9> The semiconductor module according to any one of the technical concepts 1 to 8, wherein the first semiconductor element and the second semiconductor element are formed by forming a MOSFET on a SiC substrate. [Explanation of symbols]

[0141] 1...Drive system, 2...DC power supply, 3...Rotating electric machine, 3U,3V,3W...Winding, 4...Power conversion circuit, 5,6...Power lines, 7,71,72...Smoothing capacitors, 8,9...Inverter, 8HL,9HL...Upper and lower arm circuits, 8H,9H...Upper arm, 8L,9L...Lower arm, 10...Switch, 11...Control unit, 12...Current sensor, 13,16...Output lines, 14,17 ,19…MOSFET, 15,18…diode, 20…power converter, 21,22…inverter, 23…capacitor, 23P…P busbar, 23N…N busbar, 24…output terminal block, 24U1,24U2,24V1,24V2,24W1,24W2,24U1H,24U1L,24U2H,24U2L,24V1H,24V1L,24V2H, 24V2L, 24W1H, 24W1L, 24W2H, 24W2L…Terminal section, 25…Current sensor, 30, 30U, 30V, 30W…Semiconductor module, 40, 40S, 40U, 40U1, 40U2, 40V1, 40V2, 40W1, 40W2…Semiconductor equipment, 41, 41H, 41L, 41UH, 41UL, 41VH, 41VL, 41WH, 41WL 42, 42H, 42L, 42UH, 42UL, 42VH, 42VL, 42WH, 42WL… Semiconductor elements, 43, 43H, 43L, 44, 44H, 44L… Current path section, 45… Substrate, 451… Insulating substrate, 452, 452H, 452L… Wiring, 46… External connection terminal, 461A, 462A… Output terminal, 46P… P terminal, 46N… N terminal, 47… Encapsulation body

Claims

1. A semiconductor module comprising two inverters connected to a common rotating electric machine (3), A first semiconductor element (41, 41H, 41L) constituting a first inverter (8, 21), which is one of the inverters, A second inverter (9, 22), which is another inverter, comprises a second semiconductor element (42, 42H, 42L) whose on-timing overlaps with the on-timing of the first semiconductor element, The first current path section (43, 43H, 43L) including the first semiconductor element, The second current path section (44, 44H, 44L) includes the second semiconductor element, Equipped with, In a predetermined direction, the second semiconductor element is positioned next to the first semiconductor element. A semiconductor module in which the first current path and the second current path are arranged and run parallel to each other in the predetermined direction such that the currents flowing through them are in opposite directions and face each other.

2. The first semiconductor element constitutes a predetermined phase of the first inverter, The semiconductor module according to claim 1, wherein the second semiconductor element constitutes the predetermined phase of the second inverter.

3. The first inverter is connected to one end of the windings (3U, 3V, 3W) of the rotating electric machine, and the second inverter is connected to the other end of the windings. The semiconductor module according to claim 2, wherein the first inverter and the second inverter are switchable between a star connection drive, which neutralizes the second inverter, and an open connection drive, which opens the neutral point provided by the second inverter and controls the voltage applied to the windings for each phase.

4. The semiconductor module according to claim 3, wherein one of the first semiconductor element and the second semiconductor element is an upper arm element, and the other one of the first semiconductor element and the second semiconductor element is a lower arm element.

5. The first semiconductor element and, The aforementioned second semiconductor element, High-potential power supply terminal (46P), The high-potential power supply terminal and the low-potential power supply terminal (46N) arranged side by side in the predetermined direction, A first output terminal (461A) is provided corresponding to the high-potential power supply terminal, A second output terminal (462A) is provided corresponding to the low-potential power supply terminal, A semiconductor device (40) comprising at least one such device, The semiconductor module according to claim 4, wherein one of the first current path and the second current path has the high-potential power supply terminal, the upper arm element, and the first output terminal, and the other of the first current path and the second current path has the low-potential power supply terminal, the lower arm element, and the second output terminal.

6. As a semiconductor device that constitutes a common phase of the first inverter and the second inverter, A first semiconductor device (40U1, 40V1, 40W1) comprising the upper arm element of the first inverter, the lower arm element of the second inverter, the first current path section, and the second current path section, A second semiconductor device (40U2, 40V2, 40W2) comprising the lower arm element of the first inverter, the upper arm element of the second inverter, the first current path section, and the second current path section, Includes, The semiconductor module according to claim 4 or 5, wherein the first semiconductor device and the second semiconductor device are arranged such that the current flowing through one of the first current path portions of the first semiconductor device and the second semiconductor device and the current flowing through the other of the first semiconductor device and the second semiconductor device face each other in opposite directions.

7. The semiconductor module according to claim 6, wherein the first semiconductor device and the second semiconductor device are arranged in a predetermined direction such that the upper arm elements or the lower arm elements are adjacent to each other in the predetermined direction.

8. The semiconductor module according to claim 3, wherein both the first semiconductor element and the second semiconductor element are upper arm elements, or both are lower arm elements.

9. The semiconductor module according to any one of claims 1 to 3, wherein the first semiconductor element and the second semiconductor element are formed by forming MOSFETs on a SiC substrate.

10. The first inverter (8, 21) is connected to the rotating electric machine (3), A second inverter (9, 22) connected to the aforementioned rotating electric machine, Equipped with, The first inverter and the second inverter are configured to include a semiconductor module (30), The semiconductor module is The first semiconductor elements (41, 41H, 41L) constituting the first inverter, The second inverter comprises a second semiconductor element (42, 42H, 42L) whose on-timing overlaps with that of the first semiconductor element, The first current path section (43, 43H, 43L) including the first semiconductor element, The second current path section (44, 44H, 44L) includes the second semiconductor element, It has, In a predetermined direction, the second semiconductor element is positioned next to the first semiconductor element. A power conversion device in which the first current path and the second current path are arranged and run parallel to each other in the predetermined direction such that the currents flowing through them are in opposite directions and face each other.

11. The first inverter is connected to one end of the windings (3U, 3V, 3W) of the rotating electric machine, and the second inverter is connected to the other end of the windings. The first inverter and the second inverter are switchable between a star connection drive, which neutralizes the second inverter, and an open connection drive, which opens the neutral point provided by the second inverter and controls the voltage applied to each winding for each phase. The first semiconductor element constitutes a predetermined phase of the first inverter, The power conversion device according to claim 10, wherein the second semiconductor element constitutes the predetermined phase of the second inverter.

Images