Switching element
The switching element design with p-type electric field relaxation regions and structured n-type regions addresses the high on-resistance issue by maintaining a wide current path and high breakdown voltage, improving overall performance.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- DENSO CORP
- Filing Date
- 2023-02-15
- Publication Date
- 2026-06-23
AI Technical Summary
The on-resistance of switching elements with trench-type gate electrodes is high, especially when miniaturized, due to the narrowing of the current path by depletion layers, which is exacerbated by the miniaturization process.
The switching element incorporates a semiconductor substrate with trenches, a gate insulating film, and a gate electrode, featuring p-type electric field relaxation regions that contact the gate insulating film at the trench bottom, along with a drift region structured with high and low-concentration n-type regions to manage depletion layers, ensuring a wide current path and low on-resistance.
The solution achieves low on-resistance and high breakdown voltage by suppressing depletion layer extension during operation, enhancing the switching element's performance in both on and off states.
Smart Images
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Abstract
Description
Technical Field
[0001] The technology disclosed in this specification relates to a switching element.
[0002] The switching element disclosed in Patent Document 1 has a trench-type gate electrode. In this switching element, a plurality of p-type electric field relaxation regions are provided inside the drift region. Each electric field relaxation region is in contact with the gate insulating film at the bottom surface of the corresponding trench. The electric field relaxation region suppresses the electric field concentration near the bottom surface of the trench.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] When the switching element of Patent Document 1 is turned on, a channel is formed near the trench, and electrons flow through the channel. The electrons that have passed through the channel pass through the interval region between the electric field relaxation regions. That is, the interval region constitutes a part of the current path. In the on-state of the switching element, a depletion layer with a minute width spreads from each electric field relaxation region into the drift region. Since electrons flow avoiding the depletion layer, the current path in the interval region is narrowed by the depletion layer. Therefore, the on-resistance of the switching element of Patent Document 1 is high. In particular, when the switching element is miniaturized, the width of the interval region becomes narrower, and the problem of higher on-resistance becomes more prominent. In this specification, a technology for reducing the on-resistance of a switching element having an electric field relaxation region is proposed.
Means for Solving the Problems
[0005] The switching element disclosed herein comprises a semiconductor substrate having a plurality of trenches on its surface, a gate insulating film covering the inner surface of each trench, and a gate electrode disposed within each trench and insulated from the semiconductor substrate by the gate insulating film. The semiconductor substrate has a source region, a body region, a plurality of field relaxation regions, a connection region, and a drift region. The source region is an n-type region located in the inter-trench region between each trench and in contact with the gate insulating film. The body region is a p-type region located in the inter-trench region, below the source region, and in contact with the gate insulating film. The plurality of field relaxation regions are each p-type regions in contact with the gate insulating film at the bottom surface of the corresponding trench. The connection region is a p-type region connecting each of the field relaxation regions to the body region. The drift region is located below the body region, is distributed from the inter-trench region through the spacing region located between the electric field relaxation regions to a region below each electric field relaxation region, is in contact with the bottom surface of each electric field relaxation region, is in contact with the gate insulating film within the inter-trench region, is in contact with the side surface of the first electric field relaxation region, which is one of the two electric field relaxation regions located on both sides of the spacing region, and is an n-type region in contact with the side surface of the second electric field relaxation region, which is the other of the two electric field relaxation regions located on both sides of the spacing region. The drift region within the spacing region has a first high-concentration n-type region in contact with the side surface of the first electric field relaxation region, a second high-concentration n-type region in contact with the side surface of the second electric field relaxation region, and a low-concentration n-type region located between the first high-concentration n-type region and the second high-concentration n-type region and having a lower n-type impurity concentration than the first high-concentration n-type region and the second high-concentration n-type region.
[0006] In this switching element, the drift region within the spacing region has high-concentration n-type regions (i.e., a first high-concentration n-type region and a second high-concentration n-type region) with high n-type impurity concentrations located in contact with the sides of each electric field relaxation region (i.e., a first electric field relaxation region and a second electric field relaxation region). A low-concentration n-type region is positioned between the first high-concentration n-type region and the second high-concentration n-type region. In the off state of the switching element, the voltage applied between the drift region and each electric field relaxation region is high, so the depletion layer extends beyond the high-concentration n-type region to the low-concentration n-type region, depleting the entire spacing region. Therefore, this switching element has a high breakdown voltage. In the on state of the switching element, the voltage applied between the drift region and each electric field relaxation region is low, so the extension of the depletion layer from each electric field relaxation region to the spacing region is suppressed by each high-concentration n-type region. Therefore, a wide current path can be secured in the spacing region. For this reason, the on-resistance of this switching element is low. [Brief explanation of the drawing]
[0007] [Figure 1] Cross-sectional view of the switching element in Example 1 in a direction intersecting the trench. [Figure 2] Cross-sectional view of the switching element in Example 1 in the direction along the trench. [Figure 3] An enlarged view of the spacing region of the switching elements in Example 1 and its surrounding area. [Figure 4] Diagram illustrating the manufacturing method of the switching element in Example 1. [Figure 5] Diagram illustrating the manufacturing method of the switching element in Example 1. [Figure 6] Diagram illustrating the manufacturing method of the switching element in Example 1. [Figure 7] Diagram illustrating the manufacturing method of the switching element in Example 1. [Figure 8] Diagram illustrating the manufacturing method of the switching element in Example 1. [Figure 9] Diagram illustrating the manufacturing method of the switching element in Example 1. [Figure 10] Diagram illustrating the manufacturing method of the switching element in Example 1. [Figure 11] Cross-sectional view of a modified switching element. [Figure 12] Cross-sectional view of the switching element in Example 2. [Modes for carrying out the invention]
[0008] An example switching element disclosed herein may further have an n-type drain region located below the drift region and having a higher n-type impurity concentration than the drift region. Each of the electric field relaxation regions may extend from the bottom surface of the corresponding trench to the drain region.
[0009] This configuration allows for an improvement in the voltage withstand capability of the switching element.
[0010] In one example of a switching element disclosed herein, the first high-concentration n-type region may be provided in a depth range including the bottom surface of each trench. The second high-concentration n-type region may be provided in a depth range including the bottom surface of each trench. The drift region may have a lower low-concentration n-type region extending from the low-concentration n-type region to below the first high-concentration n-type region and the second high-concentration n-type region. The lower low-concentration n-type region may have a lower n-type impurity concentration than the first high-concentration n-type region and the second high-concentration n-type region. The lower low-concentration n-type region may be in contact with the side surface of the first field relaxation region below the first high-concentration n-type region. The lower low-concentration n-type region may be in contact with the side surface of the second field relaxation region below the second high-concentration n-type region.
[0011] This configuration allows for a more effective improvement in the voltage withstand capability of the switching elements.
[0012] In one example of a switching element disclosed herein, the value obtained by integrating the p-type impurity concentration of the electric field relaxation region along the width direction at a position below the first high-concentration n-type region and the second high-concentration n-type region may be -10% or more and +10% or less of the value obtained by integrating the n-type impurity concentration of the lower low-concentration n-type region along the width direction.
[0013] This configuration allows for a more effective improvement in the voltage withstand capability of the switching elements.
[0014] In one example of a switching element disclosed herein, the low-concentration n-type region may be a first low-concentration n-type region. The spacing region may extend from the first high-concentration n-type region to the second high-concentration n-type region and have a third high-concentration n-type region having a higher n-type impurity concentration than the first low-concentration n-type region. The first low-concentration n-type region may be in contact with the third high-concentration n-type region from below. The drift region may be located within the trench region, be in contact with the third high-concentration n-type region from above, and have a second low-concentration n-type region having a lower n-type impurity concentration than the first high-concentration n-type region, the second high-concentration n-type region, and the third high-concentration n-type region.
[0015] In an example of a switching element disclosed in this specification, the drift region may have a third low-concentration n-type region, a fourth high-concentration n-type region, and a fifth high-concentration n-type region. The third low-concentration n-type region may have an n-type impurity concentration lower than that of the first high-concentration n-type region, the second high-concentration n-type region, and the third high-concentration n-type region. The fourth high-concentration n-type region may have an n-type impurity concentration higher than that of the first low-concentration n-type region, the second low-concentration n-type region, and the third low-concentration n-type region. The fifth high-concentration n-type region may have an n-type impurity concentration higher than that of the first low-concentration n-type region, the second low-concentration n-type region, and the third low-concentration n-type region. The fourth high-concentration n-type region may be in contact with the bottom surface of the first electric field relaxation region. The fifth high-concentration n-type region may be in contact with the bottom surface of the second electric field relaxation region. The third low-concentration n-type region may be disposed below the first low-concentration n-type region, the fourth high-concentration n-type region, and the fifth high-concentration n-type region.
Example
[0016] The switching element 10 of Example 1 shown in FIG. 1 is a MOSFET (metal-oxide-semiconductor field effect transistor). The switching element 10 has a semiconductor substrate 12. The semiconductor substrate 12 is made of SiC (that is, silicon carbide). Note that the semiconductor substrate 12 may be made of other semiconductor materials such as Si or GaN. Hereinafter, a direction parallel to the upper surface 12a of the semiconductor substrate 12 in one direction is referred to as the x direction, a direction parallel to the upper surface 12a and orthogonal to the x direction is referred to as the y direction, and the thickness direction of the semiconductor substrate 12 is referred to as the z direction. A plurality of trenches 14 are provided on the upper surface 12a of the semiconductor substrate 12. On the upper surface 12a, each trench 14 extends linearly in the y direction. The plurality of trenches 14 are arranged at intervals in the x direction. Hereinafter, each semiconductor region sandwiched by a pair of trenches 14 is referred to as a region between trenches.
[0017] The inner surface of each trench 14 is covered by a gate insulating film 16. A gate electrode 18 is disposed in each trench 14. The gate electrode 18 is insulated from the semiconductor substrate 12 by the gate insulating film 16. The upper surface of each gate electrode 18 is covered by an interlayer insulating film 20. A source electrode 22 is disposed on the upper portion of the semiconductor substrate 12. The source electrode 22 covers the interlayer insulating film 20 and the upper surface 12a. The source electrode 22 is insulated from the gate electrode 18 by the interlayer insulating film 20. A drain electrode 24 is disposed on the lower portion of the semiconductor substrate 12. The drain electrode 24 covers the lower surface 12b of the semiconductor substrate 12.
[0018] The semiconductor substrate 12 has a plurality of source regions 30, a plurality of contact regions 32, a body region 34, a plurality of electric field relaxation regions 36, a drift region 40, and a drain region 48.
[0019] The plurality of source regions 30 are n-type regions with a high n-type impurity concentration. Each source region 30 is disposed in a corresponding inter-trench region. The arrangement of the source regions 30 in each inter-trench region is arbitrary, but in this embodiment, two source regions 30 are provided in each inter-trench region. Each source region 30 makes an ohmic contact with the source electrode 22. Each source region 30 is in contact with the gate insulating film 16 at the upper end of the side surface of the corresponding trench 14.
[0020] The plurality of contact regions 32 are p-type regions with a high p-type impurity concentration. Each contact region 32 is disposed in a corresponding inter-trench region. The arrangement of the contact regions 32 in each inter-trench region is arbitrary, but in this embodiment, one contact region 32 is provided in each inter-trench region. Each contact region 32 is disposed adjacent to the source region 30. Each contact region 32 makes an ohmic contact with the source electrode 22.
[0021] The body region 34 is a p-type region having a lower p-type impurity concentration than the contact region 32. The body region 34 is widely distributed laterally across the semiconductor substrate 12. The body region 34 is distributed across multiple inter-trench regions. The body region 34 is located below the source region 30 and the contact region 32. The body region 34 is in contact with the source region 30 and the contact region 32 from below. The body region 34 is in contact with the gate insulating film 16 on the side surface of the trench 14 below each source region 30.
[0022] The multiple electric field relaxation regions 36 are p-type regions. Each electric field relaxation region 36 has a p-type impurity concentration that is higher than that of the body region 34 and lower than that of the contact region 32. Each electric field relaxation region 36 is in contact with the gate insulating film 16 at the bottom surface of the corresponding trench 14. Figure 2 shows a cross-section of the switching element 10 cut along the y and z directions at a position including the trench 14. As shown in Figure 2, each electric field relaxation region 36 extends linearly in the y direction along the bottom surface of the trench 14. At the longitudinal end of the trench 14, a p-type connection region 38 is provided that extends in the z direction along the side surface of the trench 14. At least one connection region 38 is provided for each trench 14. The connection region 38 connects the electric field relaxation region 36 to the body region 34. Therefore, the electric field relaxation region 36 is electrically connected to the source electrode 22 via the connection region 38, the body region 34, and the contact region 32. For this reason, the potential of each electric field relaxation region 36 is approximately equal to the potential of the source electrode 22. In other embodiments, the connection region 38 may be located at a different position. As shown in Figure 1, the width (i.e., the dimension in the x-direction) of each electric field relaxation region 36 is wider than the width of the trench 14 above it. Therefore, each electric field relaxation region 36 is in contact with the gate insulating film 16 even on the side surface near the bottom of the trench 14.
[0023] The drift region 40 is an n-type region having a lower n-type impurity concentration than the source region 30. In each figure, the drift region 40 is shown by gray hatching. The drift region 40 is located below the body region 34. The drift region 40 is distributed from within each inter-trench region to the region below each field relaxation region 36. Within each inter-trench region, the drift region 40 is in contact with the body region 34 from below. Within each inter-trench region, the drift region 40 is in contact with the gate insulating film 16 on the side surface of the trench 14 below the body region 34. The drift region 40 extends from the inter-trench region through the region between a pair of field relaxation regions 36 (hereinafter referred to as the gap region) to the region below each field relaxation region 36. The drift region 40 within the gap region is in contact with the sides of the two field relaxation regions 36 located on either side of it. In the region below each electric field relaxation region 36, the drift region 40 is widely distributed laterally across the semiconductor substrate 12. That is, in the region below each electric field relaxation region 36, the drift region 40 is distributed across the lower part of multiple trenches 14. The drift region 40 is in contact with the bottom surface of each electric field relaxation region 36.
[0024] The drain region 48 is an n-type region having a higher n-type impurity concentration than the drift region 40. The drain region 48 is located below the drift region 40. The drain region 48 is in contact with the drift region 40 from below. The drain region 48 is in ohmic contact with the drain electrode 24.
[0025] Figure 3 is an enlarged cross-sectional view of one spacing region and its surroundings. As shown in Figure 3, the drift region 40 has a first low-concentration n-type region 41, a second low-concentration n-type region 42, a third low-concentration n-type region 43, and a high-concentration n-type region 44. The high-concentration n-type region 44 has a higher n-type impurity concentration than the first low-concentration n-type region 41, the second low-concentration n-type region 42, and the third low-concentration n-type region 43. The n-type impurity concentration in the high-concentration n-type region 44 is lower than the n-type impurity concentrations in the source region 30 and the drain region 48.
[0026] The second low-concentration n-type region 42 is located within the inter-trench region. The second low-concentration n-type region 42 has a higher n-type impurity concentration than the first low-concentration n-type region 41 and the third low-concentration n-type region 43. The second low-concentration n-type region 42 is in contact with the body region 34 from below. The second low-concentration n-type region 42 is in contact with the gate insulating film 16 on the side surface of each trench 14 below the body region 34. The second low-concentration n-type region 42 is in contact with the upper surface of each field relaxation region 36.
[0027] The high-concentration n-type region 44 is a thin, layered region that extends along the bottom surface of the second low-concentration n-type region 42, the sides of each electric field relaxation region 36, and the bottom surface of each electric field relaxation region 36. The high-concentration n-type region 44 includes a first high-concentration n-type region 44a, a second high-concentration n-type region 44b, a third high-concentration n-type region 44c, a fourth high-concentration n-type region 44d, and a fifth high-concentration n-type region 44e.
[0028] The first high-concentration n-type region 44a, the second high-concentration n-type region 44b, and the third high-concentration n-type region 44c are located within the intervening region. In the following, one of the two electric field relaxation regions 36 located on either side of the intervening region will be referred to as the first electric field relaxation region 36a, and the other of the two electric field relaxation regions 36 located on either side of the intervening region will be referred to as the second electric field relaxation region 36b. The first high-concentration n-type region 44a covers the side surface of the first electric field relaxation region 36a. The second high-concentration n-type region 44b covers the side surface of the second electric field relaxation region 36b. The third high-concentration n-type region 44c covers the bottom surface of the second low-concentration n-type region 42. In other words, the second low-concentration n-type region 42 is in contact with the third high-concentration n-type region 44c from above. One end of the third high-concentration n-type region 44c is connected to the upper end of the first high-concentration n-type region 44a, and the other end of the third high-concentration n-type region 44c is connected to the upper end of the second high-concentration n-type region 44b. In other words, the third high-concentration n-type region 44c extends from the first high-concentration n-type region 44a to the second high-concentration n-type region 44b.
[0029] The fourth high-concentration n-type region 44d and the fifth high-concentration n-type region 44e are located below each electric field relaxation region 36. The fourth high-concentration n-type region 44d covers the bottom surface of the first electric field relaxation region 36a. One end of the fourth high-concentration n-type region 44d is connected to the bottom end of the first high-concentration n-type region 44a. The other end of the fourth high-concentration n-type region 44d is connected to the bottom end of the second high-concentration n-type region 44b, which is located within the adjacent spacing region (i.e., the spacing region located at the left end of Figure 3). The fifth high-concentration n-type region 44e covers the bottom surface of the second electric field relaxation region 36b. One end of the fifth high-concentration n-type region 44e is connected to the bottom end of the second high-concentration n-type region 44b. The other end of the fifth high-concentration n-type region 44e is connected to the bottom end of the first high-concentration n-type region 44a, which is located within the adjacent spacing region (i.e., the spacing region located at the right end of Figure 3).
[0030] As the structure shown in Figure 3 is repeatedly provided in the x-direction, the high-concentration n-type region 44 extends in the x-direction while bending.
[0031] The first low-concentration n-type region 41 is located within the spacing region. The first low-concentration n-type region 41 is located between the first high-concentration n-type region 44a and the second high-concentration n-type region 44b. The first low-concentration n-type region 41 covers the sides of the first high-concentration n-type region 44a and the sides of the second high-concentration n-type region 44b. The first low-concentration n-type region 41 covers the bottom surface of the third high-concentration n-type region 44c. That is, the first low-concentration n-type region 41 is in contact with the third high-concentration n-type region 44c from below.
[0032] The third low-concentration n-type region 43 is located below the spacing region. The third low-concentration n-type region 43 is located below the first low-concentration n-type region 41, the fourth high-concentration n-type region 44d, and the fifth high-concentration n-type region 44e. The third low-concentration n-type region 43 is distributed across the lower parts of multiple spacing regions and multiple electric field relaxation regions 36. The third low-concentration n-type region 43 is connected to each first low-concentration n-type region 41 provided within each spacing region. In addition, the third low-concentration n-type region 43 covers the bottom surface of each fourth high-concentration n-type region 44d and each fifth high-concentration n-type region 44e. As shown in Figure 1, the third low-concentration n-type region 43 is in contact with the drain region 48 from above.
[0033] Next, the operation of the switching element 10 will be described. The switching element 10 is used in series with a load such as a motor. A higher potential is applied to the drain electrode 24 than to the source electrode 22. The potential of the gate electrode 18 is controlled by the control circuit. When a potential higher than the gate threshold is applied to the gate electrode 18, a channel is formed in the region near the gate insulating film 16 within the body region 34. The channel connects the source region 30 and the second low-concentration n-type region 42. Then, electrons flow from the source region 30 to the drain region 48 via the channel, the second low-concentration n-type region 42, the third high-concentration n-type region 44c, the first low-concentration n-type region 41, and the third low-concentration n-type region 43. That is, the switching element 10 turns on. When the potential of the gate electrode 18 is lowered to a potential below the gate threshold, the channel disappears and the flow of electrons stops. That is, the switching element 10 turns off.
[0034] As described above, the potential of each electric field relaxation region 36 is approximately equal to the potential of the source electrode 22. Also, since the drift region 40 is connected to the drain electrode 24 via the drain region 48, the potential of the drift region 40 is approximately equal to the potential of the drain electrode 24. Therefore, a voltage approximately equal to the voltage applied between the drain electrode 24 and the source electrode 22 (hereinafter referred to as the drain-source voltage) is applied to the pn junction at the interface between the electric field relaxation region 36 and the drift region 40. When a voltage is applied to the pn junction, a depletion layer extends from each electric field relaxation region 36 to the drift region 40. High-density n-type regions 44 are provided in the drift region 40 at positions in contact with the side and bottom surfaces of each electric field relaxation region 36. The extension of the depletion layer is suppressed by the high-density n-type regions 44. When the switching element 10 is ON, the drain-source voltage is low (for example, about 2V), so the depletion layer cannot extend beyond the high-density n-type regions 44. In other words, when the switching element 10 is ON, the depletion layer extending from the electric field relaxation region 36 does not reach the first low-concentration n-type region 41. Therefore, the entire first low-concentration n-type region 41 becomes a current path. Since a wide current path is secured within the spacing region, the ON resistance of the switching element 10 is low.
[0035] Furthermore, when the switching element 10 is ON, the load may short-circuit, causing the drain-source voltage to rise sharply. In this case, the drain-source voltage may rise to, for example, around 600V. This high voltage is then applied to the pn junction at the interface between the electric field relaxation region 36 and the drift region 40. When such a high voltage is applied to the pn junction, the depletion layer extending from the electric field relaxation region 36 extends beyond the high-concentration n-type region 44 to the first low-concentration n-type region 41. As a result, the entire first low-concentration n-type region 41 is rapidly depleted. Thus, when a short circuit occurs, the entire first low-concentration n-type region 41 is rapidly depleted, which suppresses the flow of a high short-circuit current through the switching element 10. Therefore, the switching element 10 has high short-circuit withstand capability.
[0036] Furthermore, when the switching element 10 is turned off, the drain-source voltage increases. In this case, the drain-source voltage rises to, for example, about 600V. As a result, a depletion layer extends from the body region 34 and the electric field relaxation region 36 to the drift region 40, and almost the entire drift region 40 is depleted. In particular, when the drain-source voltage increases due to turn-off, the depletion layer extending from the electric field relaxation region 36 extends beyond the high-concentration n-type region 44 to the first low-concentration n-type region 41. Therefore, the entire first low-concentration n-type region 41 is depleted at high speed. In this way, when the switching element 10 is turned off, the entire first low-concentration n-type region 41 is depleted at high speed, so electric field concentration around the lower end of the trench 14 is suppressed. Therefore, the switching element 10 has a high breakdown voltage.
[0037] As described above, the structure of Example 1 makes it possible to realize a switching element 10 with high short-circuit withstand capability, high voltage withstand capability, and low on-resistance.
[0038] Furthermore, in order to extend the depletion layer beyond the high-concentration n-type region 44 to the first low-concentration n-type region 41 when a high voltage is applied, as described above, the concentration and thickness of each region can be set to satisfy the following formula. Vmax>(q·Nd·(Na+Nd)·W 2 ) / 8·ε·Na Vmax is the maximum voltage applied between the electric field relaxation region 36 and the drift region 40. q is the elementary charge. Nd is the n-type impurity concentration in the first high-concentration n-type region 44a and the second high-concentration n-type region 44b. Na is the p-type impurity concentration in the electric field relaxation region 36. W is the thickness (i.e., the dimension in the x-direction) of the first high-concentration n-type region 44a and the second high-concentration n-type region 44b. ε is the dielectric constant of the material (i.e., SiC) constituting the gap.
[0039] Next, the manufacturing method of the switching element 10 will be described. First, as shown in Figure 4, a low-concentration n-type layer 43a is epitaxially grown on a semiconductor substrate composed of drain regions 48. Next, as shown in Figure 5, the upper surface of the n-type layer 43a is partially etched to form irregularities on the upper surface of the n-type layer 43a. The protruding parts of the n-type layer 43a are the first low-concentration n-type regions 41, and the part below them is the third low-concentration n-type region 43. Next, as shown in Figure 6, a high-concentration n-type region 44 is epitaxially grown on the upper surface of the n-type layer 43a along the irregularities. Next, as shown in Figure 7, an electric field relaxation region 36 is epitaxially grown on the upper part of the high-concentration n-type region 44, and then the electric field relaxation region 36 is etched back to leave the electric field relaxation region 36 in the recesses. Next, as shown in Figure 8, a second low-concentration n-type region 42 and a body region 34 are epitaxially grown sequentially on the upper surface of the semiconductor substrate. Next, as shown in Figure 9, ion implantation is performed on the body region 34 to form the contact region 32 and the source region 30. Then, as shown in Figure 10, trenches 14 reaching each electric field relaxation region 36 are formed on the upper surface of the semiconductor substrate, and a gate insulating film 16 and a gate electrode 18 are formed in each trench 14. After that, the interlayer insulating film 20, source electrode 22, drain electrode 24, etc. are formed to complete the switching element 10 shown in Figure 1.
[0040] In Example 1, the high-concentration n-type region 44 had a first high-concentration n-type region 44a, a second high-concentration n-type region 44b, a third high-concentration n-type region 44c, a fourth high-concentration n-type region 44d, and a fifth high-concentration n-type region 44e. However, as shown in Figure 11, the high-concentration n-type region 44 may have a first high-concentration n-type region 44a and a second high-concentration n-type region 44b, and may not have a third high-concentration n-type region 44c, a fourth high-concentration n-type region 44d, and a fifth high-concentration n-type region 44e. Even with such a configuration, it is possible to suppress the depletion layer from extending to the first low-concentration n-type region 41 within the spacing region when the switching element is on, thereby reducing the on-resistance of the switching element. [Examples]
[0041] In the switching element 100 of Embodiment 2 shown in Figure 12, each electric field relaxation region 36 extends from a position in contact with the bottom surface of the trench 14 to a position in contact with the drain region 48. Therefore, the drain region 48 divides the drift region 40 (i.e., the gray-hatched region) into multiple sections. Each drift region 40 extends from a position in contact with the body region 34 to a position in contact with the drain region 48. Below each trench 14, a superjunction structure is formed in which multiple electric field relaxation regions 36 and multiple drift regions 40 are alternately arranged in the x-direction.
[0042] In Example 2, since each electric field relaxation region 36 extends from a position in contact with the trench 14 to a position in contact with the drain region 48, the drift region 40 does not have a high-concentration n-type region (i.e., the region corresponding to the fourth high-concentration n-type region 44d and the fifth high-concentration n-type region 44e in Figure 3) that is in contact with the bottom surface of each electric field relaxation region 36. Also, as shown in Figure 12, the entire drift region 40 below the second low-concentration n-type region 42 is located in a spacing region (i.e., the region between the multiple electric field relaxation regions 36). Furthermore, the first high-concentration n-type region 44a, which is in contact with the side surface of the first electric field relaxation region 36a, is provided within a depth range that includes the bottom surface of each trench 14. Furthermore, the second high-concentration n-type region 44b, which is in contact with the side surface of the second electric field relaxation region 36b, is provided within a depth range that includes the bottom surface of each trench 14. Furthermore, the lower low-concentration n-type region 45 extends downward from the first low-concentration n-type region 41. The lower low-concentration n-type region 45 has a lower n-type impurity concentration than the high-concentration n-type regions 44a, 44b, and 44c. Below the first high-concentration n-type region 44a, the lower low-concentration n-type region 45 is in contact with the side surface of the first electric field relaxation region 36a. Below the second high-concentration n-type region 44b, the lower low-concentration n-type region 45 is in contact with the side surface of the second electric field relaxation region 36b.
[0043] In Figure 12, width Wp represents the width of the electric field relaxation region 36, and width Wn represents the width of the lower low-concentration n-type region 45. In the switching element 100 of Example 2, at a depth below the lower end of the high-concentration n-type region 44, the integral value Ip obtained by integrating the p-type impurity concentration of the electric field relaxation region 36 along the width direction is a value of -10% or more and +10% or less of the integral value In obtained by integrating the n-type impurity concentration of the lower low-concentration n-type region 45 along the width direction. That is, the integral value Ip is approximately equal to the integral value In. When the p-type impurity concentration is uniformly distributed within the electric field relaxation region 36, the integral value Ip is the product of width Wp and the p-type impurity concentration within the electric field relaxation region 36. When the n-type impurity concentration is uniformly distributed within the lower low-concentration n-type region 45, the integral value In is the product of width Wn and the n-type impurity concentration within the lower low-concentration n-type region 45.
[0044] Except for the points mentioned above, the switching element 100 of Example 2 has the same structure as the switching element 10 of Example 1.
[0045] In the switching element 100 of Example 2, the depletion layer does not reach the first low-concentration n-type region 41 (i.e., the low-concentration n-type region between the first high-concentration n-type region 44a and the second high-concentration n-type region 44b) when it is on, thus achieving low on-resistance. Furthermore, in the short-circuit or off state, the first low-concentration n-type region 41 is depleted, thus achieving high short-circuit withstand capability and voltage withstand capability.
[0046] Furthermore, in the switching element 100 of Example 2, a superjunction structure is formed by the drift region 40 and the electric field relaxation region 36. Therefore, the breakdown voltage of the switching element 100 can be further improved. In particular, since the integral value Ip is approximately equal to the integral value In, in the off state of the switching element 100, the depletion layer spreads over almost the entire range of the electric field relaxation region 36 and the lower low-concentration n-type region 45, below the lower end of the high-concentration n-type region 44. As a result, electric field concentration is less likely to occur inside the switching element 100, and the breakdown voltage of the switching element 100 can be improved more effectively.
[0047] In Example 2, the high-concentration n-type region does not necessarily have a third high-concentration n-type region 44c. That is, the high-concentration n-type region may be composed of a first high-concentration n-type region 44a and a second high-concentration n-type region 44b. Even with such a configuration, it is possible to suppress the depletion layer from extending to the first low-concentration n-type region 41 within the spacing region when the switching element is on, thereby reducing the on-resistance of the switching element.
[0048] Although embodiments have been described in detail above, these are merely illustrative and do not limit the scope of the claims. The technologies described in the claims include various modifications and changes to the specific examples illustrated above. The technical elements described in this specification or drawings exhibit technical usefulness individually or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technologies illustrated in this specification or drawings achieve multiple objectives simultaneously, and achieving even one of these objectives constitutes technical usefulness. [Explanation of symbols]
[0049] 10: Switching element, 14: Trench, 16: Gate insulating film, 18: Gate electrode, 30: Source region, 34: Body region, 36: Field relaxation region, 38: Connection region, 40: Drift region, 44: High-concentration n-type region
Claims
1. A switching element, A semiconductor substrate having multiple trenches on its surface, A gate insulating film covering the inner surface of each trench, A gate electrode, disposed within each of the trenches and insulated from the semiconductor substrate by the gate insulating film, It has, The aforementioned semiconductor substrate Displaced within the inter-trench region located between each of the aforementioned trenches, and comprising an n-type source region in contact with the gate insulating film, Displaced within the trench region, located below the source region, and having a p-shaped body region in contact with the gate insulating film, Each of the p-type electric field relaxation regions is in contact with the gate insulating film in the range from the bottom surface to both sides of the corresponding trench, A p-type connection region connecting each of the aforementioned electric field relaxation regions to the body region, An n-type drift region is located below the body region, distributed from the inter-trench region through the gap region located between each electric field relaxation region to a region below each electric field relaxation region, in contact with the bottom surface of each electric field relaxation region, in contact with the gate insulating film within the inter-trench region, in contact with the side surface of the first electric field relaxation region which is one of the two electric field relaxation regions located on both sides of the gap region within the gap region, and in contact with the side surface of the second electric field relaxation region which is the other of the two electric field relaxation regions located on both sides of the gap region within the gap region. It has, The drift region within the aforementioned interval region is A first high-concentration n-type region in contact with the side surface of the first electric field relaxation region, A second high-concentration n-type region in contact with the side surface of the second electric field relaxation region, A first low-concentration n-type region is located between the first high-concentration n-type region and the second high-concentration n-type region and has a lower n-type impurity concentration than the first high-concentration n-type region and the second high-concentration n-type region. It has, The drift region is located within the trench region and has a lower n-type impurity concentration than the first high-concentration n-type region and the second high-concentration n-type region, and has a second low-concentration n-type region that is in contact with the gate insulating film on the side surface of the trench located between the body region and the electric field relaxation region. Switching element.
2. A switching element, A semiconductor substrate having multiple trenches on its surface, A gate insulating film covering the inner surface of each trench, A gate electrode, disposed within each of the trenches and insulated from the semiconductor substrate by the gate insulating film, It has, The aforementioned semiconductor substrate Displaced within the inter-trench region located between each of the aforementioned trenches, and comprising an n-type source region in contact with the gate insulating film, Displaced within the trench region, located below the source region, and having a p-shaped body region in contact with the gate insulating film, Each of the p-type electric field relaxation regions is in contact with the gate insulating film at the bottom surface of the corresponding trench, A p-type connection region connecting each of the aforementioned electric field relaxation regions to the body region, An n-type drift region is located below the body region, distributed from the inter-trench region through the gap region located between each electric field relaxation region to a region below each electric field relaxation region, in contact with the bottom surface of each electric field relaxation region, in contact with the gate insulating film within the inter-trench region, in contact with the side surface of the first electric field relaxation region which is one of the two electric field relaxation regions located on both sides of the gap region within the gap region, and in contact with the side surface of the second electric field relaxation region which is the other of the two electric field relaxation regions located on both sides of the gap region within the gap region. It has, The drift region within the aforementioned interval region is A first high-concentration n-type region in contact with the side surface of the first electric field relaxation region, A second high-concentration n-type region in contact with the side surface of the second electric field relaxation region, A low-concentration n-type region is located between the first high-concentration n-type region and the second high-concentration n-type region and has a lower n-type impurity concentration than the first high-concentration n-type region and the second high-concentration n-type region. It has, It is located below the drift region and further has an n-type drain region having a higher n-type impurity concentration than the drift region, Each of the aforementioned electric field relaxation regions extends from the bottom surface of the corresponding trench to the drain region. Switching element.
3. The first high-concentration n-type region is provided in a depth range including the bottom surface of each trench, The second high-concentration n-type region is provided in a depth range including the bottom surface of each trench, The drift region has a lower low-concentration n-type region that extends from the low-concentration n-type region to below the first high-concentration n-type region and the second high-concentration n-type region. The lower low-concentration n-type region has a lower n-type impurity concentration than the first high-concentration n-type region and the second high-concentration n-type region. The lower low-concentration n-type region is in contact with the side surface of the first electric field relaxation region below the first high-concentration n-type region. The lower low-concentration n-type region is in contact with the side surface of the second electric field relaxation region below the second high-concentration n-type region. The switching element according to claim 2.
4. The switching element according to claim 3, wherein, at a position below the first high-concentration n-type region and the second high-concentration n-type region, the value obtained by integrating the p-type impurity concentration of the electric field relaxation region along the width direction is a value of -10% or more and +10% or less of the value obtained by integrating the n-type impurity concentration of the lower low-concentration n-type region along the width direction.
5. A switching element, A semiconductor substrate having multiple trenches on its surface, A gate insulating film covering the inner surface of each trench, A gate electrode, disposed within each of the trenches and insulated from the semiconductor substrate by the gate insulating film, It has, The aforementioned semiconductor substrate Displaced within the inter-trench region located between each of the aforementioned trenches, and comprising an n-type source region in contact with the gate insulating film, Displaced within the trench region, located below the source region, and having a p-shaped body region in contact with the gate insulating film, Each of the p-type electric field relaxation regions is in contact with the gate insulating film at the bottom surface of the corresponding trench, A p-type connection region connecting each of the aforementioned electric field relaxation regions to the body region, An n-type drift region is located below the body region, distributed from the inter-trench region through the gap region located between each electric field relaxation region to a region below each electric field relaxation region, in contact with the bottom surface of each electric field relaxation region, in contact with the gate insulating film within the inter-trench region, in contact with the side surface of the first electric field relaxation region which is one of the two electric field relaxation regions located on both sides of the gap region within the gap region, and in contact with the side surface of the second electric field relaxation region which is the other of the two electric field relaxation regions located on both sides of the gap region within the gap region. It has, The drift region within the aforementioned interval region is A first high-concentration n-type region in contact with the side surface of the first electric field relaxation region, A second high-concentration n-type region in contact with the side surface of the second electric field relaxation region, A low-concentration n-type region is located between the first high-concentration n-type region and the second high-concentration n-type region and has a lower n-type impurity concentration than the first high-concentration n-type region and the second high-concentration n-type region. It has, The low-concentration n-type region is the first low-concentration n-type region. The aforementioned interval region extends from the first high-concentration n-type region to the second high-concentration n-type region and includes a third high-concentration n-type region having a higher n-type impurity concentration than the first low-concentration n-type region. The first low-concentration n-type region is in contact with the third high-concentration n-type region from below. The drift region is located within the trench region, is in contact with the third high-concentration n-type region from above, and has a second low-concentration n-type region having a lower n-type impurity concentration than the first high-concentration n-type region, the second high-concentration n-type region, and the third high-concentration n-type region. Switching element.
6. The aforementioned drift region is A third low-concentration n-type region having a lower n-type impurity concentration than the first high-concentration n-type region, the second high-concentration n-type region, and the third high-concentration n-type region, A fourth high-concentration n-type region having a higher n-type impurity concentration than the first low-concentration n-type region, the second low-concentration n-type region, and the third low-concentration n-type region, A fifth high-concentration n-type region having a higher n-type impurity concentration than the first low-concentration n-type region, the second low-concentration n-type region, and the third low-concentration n-type region, It has, The fourth high-concentration n-type region is in contact with the bottom surface of the first electric field relaxation region. The fifth high-concentration n-type region is in contact with the bottom surface of the second electric field relaxation region. The third low-concentration n-type region is located below the first low-concentration n-type region, the fourth high-concentration n-type region, and the fifth high-concentration n-type region. The switching element according to claim 5.