Semiconductor equipment
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- KK TOSHIBA
- Filing Date
- 2023-03-23
- Publication Date
- 2026-06-23
Smart Images

Figure 0007879068000001 
Figure 0007879068000002 
Figure 0007879068000003
Abstract
Claims
1. First electrode and A second electrode separated from the first electrode, A first region provided between the first electrode and the second electrode, on a part of the first electrode, The first semiconductor region of the first conductivity type, A second semiconductor region of a second conductivity type, a portion of which is provided on the first semiconductor region, A third semiconductor region of a first conductivity type is provided on a portion of the second semiconductor region, In a second direction perpendicular to the first direction toward the second electrode, a gate electrode facing the third semiconductor region via a gate insulating layer, A fourth semiconductor region of a second conductivity type is provided on the third semiconductor region and is aligned with a part of the second electrode in the second direction, A fifth semiconductor region of a first conductivity type is provided between a part of the third semiconductor region and the fourth semiconductor region in a third direction perpendicular to the first and second directions, and is aligned with the part of the second electrode in the second direction, and has a higher impurity concentration of the first conductivity type than the third semiconductor region. A sixth semiconductor region of a first conductivity type is provided between the third semiconductor region and the part of the second electrode, and has a higher impurity concentration of the first conductivity type than the third semiconductor region. The first and second parts include a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a sixth semiconductor region, each of which is provided in the first and second parts, and the length of the fifth semiconductor region in the third direction provided in the first part is longer than the length of the fifth semiconductor region in the third direction provided in the second part, and in the second part, the fifth semiconductor region is provided in multiple locations in the second direction, the first region and A second region provided between the first electrode and the second electrode, on another part of the first electrode, A seventh semiconductor region of the second conductivity having a higher impurity concentration of the second conductivity than the second semiconductor region, Another part of the second semiconductor region provided on the seventh semiconductor region, An eighth semiconductor region of a first conductivity type is provided on another part of the second semiconductor region, The second part includes the second part which is located between the first part and the second region, Equipped with, A semiconductor device in which the length of each of the multiple fifth semiconductor regions in the third direction is shorter as it approaches the second region.
2. First electrode and A second electrode separated from the first electrode, A first region provided between the first electrode and the second electrode, on a part of the first electrode, The first semiconductor region of the first conductivity type, A second semiconductor region of a second conductivity type, a portion of which is provided on the first semiconductor region, A third semiconductor region of a first conductivity type is provided on a portion of the second semiconductor region, In a second direction perpendicular to the first direction toward the second electrode, a gate electrode facing the third semiconductor region via a gate insulating layer, A fourth semiconductor region of a second conductivity type is provided on the third semiconductor region and is aligned with a part of the second electrode in the second direction, A fifth semiconductor region of a first conductivity type is provided between a part of the third semiconductor region and the fourth semiconductor region in a third direction perpendicular to the first and second directions, and is aligned with the part of the second electrode in the second direction, and has a higher impurity concentration of the first conductivity type than the third semiconductor region. A sixth semiconductor region of a first conductivity type is provided between the third semiconductor region and the part of the second electrode, and has a higher impurity concentration of the first conductivity type than the third semiconductor region. The first region includes a first portion and a second portion, where each of the third semiconductor region, the fourth semiconductor region, the fifth semiconductor region, and the sixth semiconductor region is provided in the first portion and the second portion, the length of the fifth semiconductor region provided in the first portion in the third direction is longer than the length of the fifth semiconductor region provided in the second portion in the third direction, and the length of the second portion in the second direction is longer than the distance between the first electrode and the second electrode in the first direction, A second region provided between the first electrode and the second electrode, on another part of the first electrode, A seventh semiconductor region of the second conductivity having a higher impurity concentration of the second conductivity than the second semiconductor region, Another part of the second semiconductor region provided on the seventh semiconductor region, An eighth semiconductor region of a first conductivity type is provided on another part of the second semiconductor region, The second part includes the second part which is located between the first part and the second region, A semiconductor device equipped with the following features.
3. The semiconductor device according to claim 1 or 2, wherein the fourth semiconductor region is provided between a pair of fifth semiconductor regions in the third direction.
4. The semiconductor device according to claim 3, wherein a portion of the third semiconductor region and a group including the fourth semiconductor region and the pair of fifth semiconductor regions are alternately arranged in the third direction.
5. The semiconductor device according to claim 1 or 2, wherein the impurity concentration of the first conductivity type in the eighth semiconductor region is lower than the impurity concentration of the first conductivity type in the third semiconductor region.
6. First electrode and A second electrode separated from the first electrode, A first region is provided between the first electrode and the second electrode, on a part of the first electrode, and includes a first portion and a second portion. A first semiconductor region of a first conductivity type provided in the first and second portions, A second semiconductor region of a second conductivity type, a portion of which is provided on the first semiconductor region, A third semiconductor region of a first conductivity type is provided in each of the first and second portions and is located on the portion of the second semiconductor region, A gate electrode is provided in the first portion and faces the third semiconductor region via a gate insulating layer in a second direction perpendicular to the first direction toward the second electrode from the first electrode, A fourth semiconductor region of second conductivity type is provided in each of the first and second portions, located on the third semiconductor region and aligned with a part of the second electrode in the second direction, A fifth semiconductor region of a first conductivity type is provided in the first portion, and in the second direction, it is aligned with the portion of the second electrode and has a higher impurity concentration of the first conductivity type than the third semiconductor region. A sixth semiconductor region of a first conductivity type having a higher impurity concentration of the first conductivity type than the third semiconductor region is provided in each of the first and second portions, and is provided between the third semiconductor region and the part of the second electrode, The first portion includes the first semiconductor region and the fifth semiconductor region being alternately provided in a third direction perpendicular to the first and second directions, and the second portion includes the first semiconductor region and the fourth semiconductor region being alternately provided in a third direction, and the length of the second portion in the second direction is longer than the distance between the first electrode and the second electrode, A second region provided between the first electrode and the second electrode, on another part of the first electrode, A seventh semiconductor region of the second conductivity having a higher impurity concentration of the second conductivity than the second semiconductor region, Another part of the second semiconductor region provided on the seventh semiconductor region, An eighth semiconductor region of a first conductivity type is provided on another part of the second semiconductor region, The second region includes the second portion which is located between the first portion and the second region, A semiconductor device equipped with the following features.
7. First electrode and A second electrode separated from the first electrode, A first region is provided between the first electrode and the second electrode, on a part of the first electrode, and includes a first portion and a second portion. A first semiconductor region of a first conductivity type provided in the first and second portions, A second semiconductor region of a second conductivity type, a portion of which is provided on the first semiconductor region, A third semiconductor region of a first conductivity type is provided in each of the first and second portions and is located on the portion of the second semiconductor region, A gate electrode is provided in the first portion and faces the third semiconductor region via a gate insulating layer in a second direction perpendicular to the first direction toward the second electrode from the first electrode, A fourth semiconductor region of second conductivity type is provided in each of the first and second portions, located on the third semiconductor region and aligned with a part of the second electrode in the second direction, A fifth semiconductor region of a first conductivity type is provided in the first portion, and in the second direction, it is aligned with the portion of the second electrode and has a higher impurity concentration of the first conductivity type than the third semiconductor region. A sixth semiconductor region of a first conductivity type having a higher impurity concentration of the first conductivity type than the third semiconductor region is provided in each of the first and second portions, and is provided between the third semiconductor region and the part of the second electrode, The first portion includes the first portion in which the fourth semiconductor region and the fifth semiconductor region are alternately provided in a third direction perpendicular to the first and second directions, the second portion in which a part of the third semiconductor region and the fourth semiconductor region are alternately provided in the third direction, and the second portion in which a plurality of sixth semiconductor regions are provided in the third direction, and the plurality of sixth semiconductor regions are separated from each other, the first region and A second region provided between the first electrode and the second electrode, on another part of the first electrode, A seventh semiconductor region of the second conductivity having a higher impurity concentration of the second conductivity than the second semiconductor region, Another part of the second semiconductor region provided on the seventh semiconductor region, An eighth semiconductor region of a first conductivity type is provided on another part of the second semiconductor region, The second region includes the second portion which is located between the first portion and the second region, A semiconductor device equipped with the following features.
8. The semiconductor device according to claim 6 or 7, wherein the impurity concentration of the first conductivity type in the eighth semiconductor region is lower than the impurity concentration of the first conductivity type in the third semiconductor region.