Semiconductor equipment
The semiconductor device addresses the challenge of high forward voltage by employing conductive portions with varying work functions and insulating structures to enhance switching speed and reduce power loss.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- KK TOSHIBA
- Filing Date
- 2023-02-14
- Publication Date
- 2026-06-24
Smart Images
Figure 0007879822000001 
Figure 0007879822000002 
Figure 0007879822000003
Abstract
Description
[Technical Field]
[0001] Embodiments of the present invention relate to semiconductor devices. [Background technology]
[0002] In semiconductor devices such as transistors, it is desirable to reduce the forward voltage of the body diode. [Prior art documents] [Patent Documents]
[0003] [Patent Document 1] Patent No. 6400545 [Overview of the project] [Problems that the invention aims to solve]
[0004] Embodiments of the present invention provide a semiconductor device capable of reducing the forward voltage of a body diode. [Means for solving the problem]
[0005] According to embodiments of the present invention, a semiconductor device includes a first conductive portion, a second conductive portion, a third conductive portion, a first insulating portion, and a semiconductor portion. The direction from the first conductive portion to the second conductive portion is along a first direction. The direction from the second conductive portion to the third conductive portion is along a second direction intersecting the first direction. The first insulating portion includes a first insulating region provided between the second conductive portion and the third conductive portion. The semiconductor portion includes a first semiconductor region provided between the first conductive portion and the second conductive portion, and a second semiconductor region provided between the second conductive portion and the first insulating region. The semiconductor portion is of a first conductivity type. The second conductive portion includes a first conductive region that forms a Schottky junction with the first semiconductor region, and a second conductive region that forms a Schottky junction with the second semiconductor region. When the first conductivity type is n-type, the work function of the first conductive region is lower than the work function of the second conductive region. If the first conductivity type is p-type, the work function of the first conductivity region is higher than the work function of the second conductivity region. [Brief explanation of the drawing]
[0006] [Figure 1] Figure 1 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. [Figure 2] Figures 2(a) and 2(b) are schematic cross-sectional views illustrating a semiconductor device according to an embodiment. [Figure 3] Figures 3(a) to 3(e) are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment. [Figure 4] Figures 4(a) to 4(e) are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment. [Figure 5] Figures 5(a) to 5(c) are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment. [Modes for carrying out the invention]
[0007] The embodiments of the present invention will be described below with reference to the drawings. Drawings are schematic or conceptual, and the relationships between the thickness and width of each part, as well as the ratios of the sizes of different parts, are not necessarily identical to those of reality. Even when representing the same part, the dimensions and ratios may be depicted differently in different drawings. In this specification and in each figure, elements similar to those described above are denoted by the same reference numerals, and detailed explanations are omitted as appropriate.
[0008] Figure 1 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. As shown in Figure 1, the semiconductor device 100 according to this embodiment includes a first conductive part 11, a second conductive part 12, a third conductive part 13, an insulating part 20, and a semiconductor part 30. The semiconductor device 100 may further include a fourth conductive part 14 and a fifth conductive part 15.
[0009] The direction from the first conductive part 11 to the second conductive part 12 is along the first direction. The first direction is defined as the Z-axis direction. One direction perpendicular to the Z-axis direction is defined as the X-axis direction. The direction perpendicular to both the Z-axis direction and the X-axis direction is defined as the Y-axis direction.
[0010] The direction from the first conductive portion 11 to the semiconductor portion 30 is along the first direction. The semiconductor portion 30 includes a first semiconductor region 30a, a second semiconductor region 30b, a third semiconductor region 30c, and a fourth semiconductor region 30d. The semiconductor portion 30 is of a first conductivity type (e.g., n-type). In this example, the first conductivity type is n-type and the second conductivity type is p-type, but in the embodiment, the first conductivity type may be p-type and the second conductivity type may be n-type.
[0011] The first semiconductor region 30a is provided between the first conductive portion 11 and the second conductive portion 12. The direction from the first semiconductor region 30a to the second conductive portion 12 is along the first direction. The first semiconductor region 30a is in contact with the second conductive portion 12.
[0012] The direction from the second semiconductor region 30b to the second conductive portion 12 follows the second direction (e.g., the X-axis direction). The second semiconductor region 30b is in contact with the second conductive portion 12. The second semiconductor region 30b is provided between the first semiconductor region 30a and the fifth conductive portion 15.
[0013] For example, a trench T1 is provided on the surface 30s of the semiconductor portion 30. The trench T1 extends, for example, in the third direction. A plurality of trenches T1 may be provided at intervals in the second direction. The second conductive portion 12 is provided in the trench T1. The second conductive portion 12 is a trench contact electrically connected to the semiconductor portion 30. For example, the first semiconductor region 30a constitutes the bottom surface of the trench T1. For example, the second semiconductor region 30b constitutes the side surface of the trench T1.
[0014] The third semiconductor region 30c is provided between the first conductive portion 11 and the first semiconductor region 30a. The fourth semiconductor region 30d is provided between the first conductive portion 11 and the third conductive portion 13. The fourth semiconductor region 30d is provided between the third semiconductor region 30c and the first conductive portion 11.
[0015] The direction from the second conductive portion 12 to the third conductive portion 13 follows the second direction (e.g., the X-axis direction). The second direction is a direction intersecting the first direction.
[0016] The direction from the fourth conductive portion 14 to the third semiconductor region 30c follows the second direction (e.g., the X-axis direction). In this example, the direction from the fourth conductive portion 14 to the third conductive portion 13 follows the first direction. The fourth conductive portion 14 is provided between the third conductive portion 13 and the first conductive portion 11. The fourth semiconductor region 30d is provided between the fourth conductive portion 14 and the first conductive portion 11.
[0017] The insulating portion 20 is in contact with the third conductive portion 13, the fourth conductive portion 14, and the semiconductor portion 30. The insulating portion 20 electrically insulates the third conductive portion 13 and the semiconductor portion 30. The insulating portion 20 electrically insulates the fourth conductive portion 14 and the semiconductor portion 30. The insulating portion 20 electrically insulates the third conductive portion 13 and the fourth conductive portion 14.
[0018] More specifically, the insulating portion 20 includes a first insulating region 20a provided between the second conductive portion 12 and the third conductive portion 13. The second semiconductor region 30b is provided between the second conductive portion 12 and the first insulating region 20a. Furthermore, the insulating portion 20 includes, for example, a second insulating region 20b provided between the third semiconductor region 30c and the fourth conductive portion 14. The insulating portion 20 further includes, for example, a portion provided between the fourth semiconductor region 30d and the fourth conductive portion 14, a portion provided between the fourth conductive portion 14 and the third conductive portion 13, and a portion provided between the third conductive portion 13 and the fifth conductive portion 15.
[0019] For example, a trench T2 is provided on the surface 30s of the semiconductor portion 30. The trench T2 extends, for example, in a third direction. Multiple trenches T2 may be provided at intervals in the second direction. The insulating portion 20 is provided within the trench T2. The third conductive portion 13 and the fourth conductive portion 14 are surrounded by the insulating portion 20 within the trench T2.
[0020] A second conductive part 12 and a third conductive part 13 are provided between the fifth conductive part 15 and the first conductive part 11. The fifth conductive part 15 is in contact with the second conductive part 12 and the insulating part 20. The fifth conductive part 15 is electrically connected to the second conductive part 12.
[0021] The second conductive region 12 includes a first conductive region 12a that forms a Schottky junction with the first semiconductor region 30a, and a second conductive region 12b that forms a Schottky junction with the second semiconductor region 30b. In the example where the first conductivity type is n-type, the work function of the first conductive region 12a is lower than the work function of the second conductive region 12b.
[0022] That is, for example, the first conductive region 12a makes Schottky contact with the bottom surface of the trench T1 (first semiconductor region 30a). The first conductive region 12a faces and contacts the first semiconductor region 30a in the first direction (Z-axis direction). For example, the second conductive region 12b makes Schottky contact with the side surface of the trench T1 (second semiconductor region 30b). The second conductive region 12b faces and contacts the second semiconductor region 30b in the second direction (X-axis direction).
[0023] The first semiconductor region 30a includes a facing surface F1 that is opposite to the second conductive portion 12 (first conductive region 12a). The direction from the third conductive portion 13 to the facing surface F1 is along the second direction (for example, the X-axis direction).
[0024] The second semiconductor region 30b may include the first region r1 and the second region r2. The second region r2 is provided between the first region r1 and the first conductive portion 11. The impurity concentration of the first conductive type in the first region r1 is (atoms / cm³). 3 ) is higher than the impurity concentration of the first conductivity type in the second region r2.
[0025] The semiconductor device 100 is, for example, a MOSFET (Metal Oxide Silicon Field Effect Transistor). By controlling the potential of the third conductive part 13, the current flowing between the first conductive part 11 and the second conductive part 12 (and the fifth conductive part 15) can be controlled. The first conductive part 11 functions, for example, as a drain electrode. The second conductive part 12 (and the fifth conductive part 15) functions, for example, as a source electrode. The first region r1 functions, for example, as a source region. The second region r2 functions, for example, as a channel region. The third conductive part 13 functions, for example, as a gate electrode. The first insulating region 20a functions, for example, as a gate insulating film.
[0026] For example, a Schottky barrier is formed at the interface between the second conductive part 12 (second conductive region 12b) and the second semiconductor region 30b, and a depletion layer is formed in the second semiconductor region 30b (second region r2). The potential of the third conductive part 13 controls the thickness of the Schottky barrier (distance in the X-axis direction), and thus controls the carrier concentration in the second semiconductor region 30b (second region r2). When the carrier concentration in the second semiconductor region 30b is low, virtually no current flows between the second conductive part 12 (and the fifth conductive part 15) and the first conductive part 11 through the second semiconductor region 30b. That is, an off state is obtained. By controlling the potential of the third conductive part 13, when the carrier concentration in the second semiconductor region 30b increases, current flows between the second conductive part 12 (and the fifth conductive part 15) and the first conductive part 11 through the second semiconductor region 30b. That is, an on state is obtained.
[0027] Furthermore, for example, a Schottky barrier is formed at the interface between the first conductive region 12a and the first semiconductor region 30a. The thickness of the Schottky barrier (distance in the Z-axis direction) can be controlled by the potential of the third conductive portion 13. When the Schottky barrier is thick, current flow is difficult. For example, an off state is obtained. By controlling the potential of the third conductive portion 13, the Schottky barrier becomes thinner, and tunnel current flows more easily. For example, an on state is obtained.
[0028] For example, there is a reference example transistor having an NPN structure. In this case, the gate length increases depending on the width of the pn junction. In contrast, in this embodiment, the semiconductor portion 30 is of the first conductivity type and does not need to include the region of the second conductivity type. In other words, a pn junction is not formed. This makes it easier to shorten the gate length, for example. Therefore, it is easier to reduce the gate capacitance. Also, for example, it is easier to reduce the on-resistance. This enables faster switching, suppression of turn-on losses, and suppression of turn-off losses. According to this embodiment, a semiconductor device with improved characteristics can be provided.
[0029] In the reference example transistor, the body diode is formed by a pn junction. Therefore, recovery can take a long time. In contrast, in this embodiment, a Schottky barrier is formed at the interface between the second conductive portion 12 (first conductive region 12a) and the first semiconductor region 30a. This forms the body diode. Because the body diode is a Schottky diode in this way, the recovery characteristics can be improved. Recovery can be accelerated.
[0030] As described above, in this example, the first conductivity type is n-type. That is, the first semiconductor region 30a is an n-type semiconductor. When the first conductivity type is n-type, the work function of the first conductivity region 12a is lower than, for example, the work function of the second conductivity region 12b. The relatively low work function of the first conductivity region 12a allows for a reduction in the height of the Schottky barrier at the interface between the first conductivity region 12a and the first semiconductor region 30a. This allows for a lower forward voltage VF of the body diode. Power loss can be reduced when diode conduction occurs, with current flowing from the second conductivity region 12 to the semiconductor region 30.
[0031] On the other hand, because the work function of the second conductive region 12b is relatively high, the height of the Schottky barrier at the interface between the second conductive region 12b and the second semiconductor region 30b can be controlled, thereby adjusting the transistor threshold. For example, it is possible to prevent the threshold from becoming too low.
[0032] For example, the first conductive region 12a is made of a metal with a lower work function than the second conductive region 12b. For example, the second conductive region 12b is made of a metal with a higher work function than the first conductive region 12a.
[0033] For example, the first conductive region 12a contains a first metal element, and the second conductive region 12b contains a second metal element. The work function of the first conductive region 12a is lower than the work function of the second conductive region 12b. The work function of the first metal formed by the first metal element is lower than the work function of the second metal formed by the second metal element.
[0034] In this example, the work function of the first conductive region 12a (e.g., the work function of the first metal) can be between 0.5 electron volts (eV) and 4.8 eV. More specifically, the first metal element includes at least one selected from the group consisting of, for example, Al, Mg, Ti, Se, V, Cr, Mn, Fe, Cu, Zn, Rb, Sr, Y, Zr, Nb, Mo, Ru, Ag, In, Sn, Sb, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Hf, Ta, W, and Bi. In other words, the first conductive region 12a may contain at least one metal selected from the group consisting of Al, Mg, Ti, Se, V, Cr, Mn, Fe, Cu, Zn, Rb, Sr, Y, Zr, Nb, Mo, Ru, Ag, In, Sn, Sb, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Hf, Ta, W, and Bi. The first conductive region 12a may also be a compound containing the first metal element. For example, the first conductive region 12a may contain a compound (silicide) of the first metal element and silicon. Alternatively, the first conductive region 12a may contain an alloy or solid solution of the first metal element and another metal element (e.g., the second metal element). The first conductive region 12a may or may not contain the second metal element.
[0035] In this example, the work function of the second conductive region 12b (e.g., the work function of the second metal) can be between 4.8 eV and 10 eV. More specifically, the second metal element includes at least one selected from the group consisting of Co, Ni, Se, Rh, Pd, Te, Re, Ir, Pt, and Au. That is, the second conductive region 12b may include at least one metal selected from the group consisting of Co, Ni, Se, Rh, Pd, Te, Re, Ir, Pt, and Au. The second conductive region 12b may also be a compound containing the second metal element. For example, the second conductive region 12b may include a compound (silicide) of the second metal element and silicon. Alternatively, the second conductive region 12b may include an alloy or solid solution of the second metal element and another metal element (e.g., the first metal element). The second conductive region 12b may or may not contain the first metal element.
[0036] In this embodiment, the first conductivity type may be p-type. That is, the first semiconductor region 30a may be a p-type semiconductor region. When the first conductivity type is p-type (when the second conductivity type is n-type), the relationship between the magnitudes of the work functions may be reversed from the above. That is, when the first conductivity type is p-type, the work function of the first conductivity region 12a is higher than, for example, the work function of the second conductivity region 12b. This allows, for example, adjustment of the height of the Schottky barrier and reduction of the forward voltage of the body diode. When the first conductivity type is p-type, the work function of the first conductivity region 12a may be, for example, 4.8eV to 10eV, and the work function of the second conductivity region 12b may be, for example, 0.5eV to 4.8eV.
[0037] The semiconductor portion 30 may contain at least one selected from the group consisting of silicon (Si), nitride semiconductors (e.g., GaN), silicon carbide (SiC), and oxide semiconductors (e.g., GaO). If the semiconductor portion 30 contains silicon, the n-type impurity may include at least one selected from the group consisting of, for example, phosphorus, arsenic, and antimony. The p-type impurity may include, for example, boron.
[0038] In one example, if the semiconductor portion 30 contains silicon, the second conductive portion 12 may contain at least one selected from the group consisting of Ti, W, Mo, Ta, Zr, Al, Sn, V, Re, Os, Ir, Pt, Pd, Rh, Ru, Nb, Sr, and Hf.
[0039] The third conductive part 13 and the fourth conductive part 14 may include, for example, at least one of polysilicon and metal. The fifth conductive part 15 includes, for example, at least one selected from the group consisting of Al, Cu, Mo, W, Ta, Co, Ru, Ti, and Pt. The first conductive part 11 includes, for example, at least one selected from the group consisting of Al, Cu, Mo, W, Ta, Co, Ru, Ti, and Pt.
[0040] The fourth conductive part 14 may be electrically connected to the second conductive part 12 by a conductive part (such as wiring) not shown in the figure. Alternatively, the fourth conductive part 14 may be capable of being electrically connected to the second conductive part 12. The fourth conductive part 14 functions as, for example, a field plate. For example, local concentration of an electric field is suppressed. A more stable operation can be obtained.
[0041] In this example, the impurity concentration of the first conductivity type in the first semiconductor region 30a is higher than the impurity concentration of the first conductivity type in the third semiconductor region 30c. Thereby, the forward voltage VF of the body diode can be reduced. For example, the thickness (distance in the Z-axis direction) of the Schottky barrier formed at the interface between the first semiconductor region 30a and the second conductive part 12 can be controlled by the impurity concentration of the first conductivity type in the first semiconductor region 30a. When the impurity concentration of the first conductivity type in the first semiconductor region 30a is relatively high, the Schottky barrier becomes thinner, and the tunnel current easily flows. It is easy to obtain a low forward voltage VF.
[0042] In this case, the impurity concentration of the first conductivity type in the first semiconductor region 30a is, for example, 8×10 15 atoms / cm 3 or more and 8×10 16 atoms / cm 3 or less. The impurity concentration of the first conductivity type in the third semiconductor region 30c is, for example, 8×10 15 atoms / cm 3 or more and 8×10 16 atoms / cm 3 or less. The impurity concentration of the first conductivity type in the third semiconductor region 30c is, for example, the concentration of the substrate and may be substantially constant along the Z-axis direction. For example, the boundary P between the first semiconductor region 30a and the third semiconductor region 30c may be aligned with the third conductive part 13 in the X-axis direction.
[0043] In this embodiment, the impurity concentration of the first conductivity type in the first semiconductor region 30a does not necessarily have to be higher than the impurity concentration of the first conductivity type in the third semiconductor region 30c; for example, they may be substantially the same. Also, the work function of the first conductivity region 12a does not necessarily have to be lower than the work function of the second conductivity region 12b; for example, they may be substantially the same. For example, the first conductivity region 12a and the second conductivity region 12b may be made of the same material, and the impurity concentration of the first conductivity type in the first semiconductor region 30a may be increased. Even in this case, it is easy to obtain a low forward voltage VF.
[0044] Figures 2(a) and 2(b) are schematic cross-sectional views illustrating a semiconductor device according to an embodiment. Figure 2(a) shows a magnified view of the periphery of the second conductive portion 12 of the semiconductor device 100. As shown in Figure 2(a), the second conductive portion 12 includes a first end s1 and a second end s2 on the opposite side. The second end s2 is located between the first end s1 and the second semiconductor region 30b. The direction from the second end s2 to the first end s1 is along the second direction (for example, the X-axis direction). The second end s2 is in contact with the second semiconductor region 30b. The first end s1 and the second end s2 are included in the second semiconductor region 30b and are the ends of the second conductive portion 12 in the second direction.
[0045] Furthermore, the second conductive portion 12 includes an upper end s3, a lower end s4, and a corner portion c1. The upper end s3 and the lower end s4 are the ends of the second conductive portion 12 in the first direction. The lower end s4 is located between the upper end s3 and the first semiconductor region 30a. The lower end s4 is in contact with the first semiconductor region 30a. The corner portion c1 is continuous with the second side end s2. The corner portion c1 is located below the second side end s2 (i.e., between the second side end s2 and the first conductive portion 11). The corner portion c1 is the part that connects the second side end s2 and the lower end s4. The corner portion c1 is located at the corner of the lower end of the trench T1. In other words, the corner portion c1 is in contact with the second semiconductor region 30b. The corner portion c1 is, for example, a part of the second conductive portion 12 that includes a portion where, in a plan view including the first and second directions, the angle between the tangent to the boundary Ed1 with the semiconductor portion 30 and the first direction is 45 degrees.
[0046] In this example, the second conductive region 12b is located at the second side end s2 and the corner portion c1. That is, the second side end s2 and the corner portion c1 are composed of the material of the second conductive region 12b, which has a high work function. In other words, the corner portion c1 is part of the second conductive region 12b. The lower corner of the trench T1 is covered with a material with a relatively high work function. This helps to suppress the concentration of the electric field at the corner.
[0047] The first conductive region 12a is located at the lower end s4. That is, the lower end s4 is composed of the material of the first conductive region 12a, which has a low work function. The bottom surface of the trench T1, excluding the corners, is covered with a material with a relatively low work function.
[0048] Figure 2(b) shows a magnified view of the area around corner c1. In a cross-section in a plane including the first and second directions, such as in Figure 2(b) (for example, a ZX cross-section), the radius of curvature of the boundary Ed1 between corner c1 and semiconductor portion 30 is, for example, between 1 nm and 100 nm. Because the boundary Ed1 is gently curved in this way, for example, the concentration of the electric field at corner c1 can be suppressed.
[0049] Figures 3(a) to 3(e) are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment. Figures 3(a) to 3(e) show an example of the process of forming the second conductive part 12 in the manufacturing process of a semiconductor device.
[0050] As shown in Figure 3(a), a trench T1 is formed in the semiconductor portion 30. The trench T1 can be formed by reactive ion etching. For example, the shape of the corner at the bottom of the trench can be adjusted by the etching conditions.
[0051] Subsequently, if necessary, an impurity of the first conductivity type may be ion-implanted into the bottom surface T1b of the trench T1. This makes it possible to increase the concentration of the impurity of the first conductivity type in the first semiconductor region 30a.
[0052] Subsequently, as shown in Figure 3(b), a cover film 40 is formed on the side surface T1s of the trench T1. For example, silicon oxide (SiO2) is used for the cover film 40. The bottom surface T1b of the trench T1 is not covered by the cover film 40.
[0053] Subsequently, as shown in Figure 3(c), a conductive film 12af containing a first metal element is formed on the exposed bottom surface T1b. At least a portion of the conductive film 12af becomes at least a portion of the first conductive region 12a. The conductive film 12af is selectively grown on the bottom surface T1b by, for example, chemical vapor deposition (CVD). Since the side surfaces T1s of the trench T1 are covered with a cover film 40, the conductive film 12af is not formed on the side surfaces T1s of the trench T1. For example, the thickness of the cover film 40 can be used to adjust the area in which the conductive film 12af (first conductive region 12a) is formed.
[0054] Subsequently, as shown in Figure 3(d), after removing the cover film 40, a conductive layer 12p containing the second metal element is formed and embedded in the trench T1, as shown in Figure 3(e). The conductive layer 12p covers the sides T1s and corners T1c of the trench T1. A portion of the conductive layer 12p is a layer that forms at least a part of the second conductive region 12b.
[0055] The second conductive region 12b formed in this manner does not necessarily have to contain the first metal element, for example. Alternatively, the concentration of the first metal element in the second conductive region 12b (atoms / cm³) 3 ) may be lower than the concentration of the first metal element in the first conductive region 12a.
[0056] Furthermore, as shown in Figure 3(e), for example, the lower end of the first conductive region 12a may be aligned with the lower end of the second conductive region 12b. In other words, the direction from the lower end of the first conductive region 12a (first lower end 12ab) to the lower end of the second conductive region 12b (second lower end 12bb) is along the second direction (X-axis direction).
[0057] Note that the terms "upper" and "lower" in "upper end" and "lower end" are terms used for convenience and are unrelated to the direction of gravity. The first conductive region 12a includes the first upper end 12at and the first lower end 12ab, with the first lower end 12ab being between the first upper end 12at and the first conductive portion 11. The second conductive region 12b includes the second upper end 12bt and the second lower end 12bb, with the second lower end 12bb being between the second upper end 12bt and the first conductive portion 11.
[0058] As shown in Figure 3(e), the second conductive portion 12 includes a third conductive region 12c. The third conductive region 12c is, for example, a portion located in the center of the trench T1. The direction from the first conductive region 12a to the third conductive region 12c is along the first direction (Z-axis direction). The direction from the second conductive region 12b to the third conductive region 12c is along the second direction (X-axis direction).
[0059] In this example, a portion of the conductive layer 12p becomes the third conductive region 12c. Therefore, the third conductive region 12c contains the second metal element. The third conductive region 12c does not necessarily contain the first metal element. Alternatively, the concentration of the first metal element in the third conductive region 12c may be lower than the concentration of the first metal element in the first conductive region 12a.
[0060] Figures 4(a) to 4(e) are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment. Figures 4(a) to 4(e) show another example of the process of forming the second conductive part 12 in the manufacturing process of a semiconductor device.
[0061] As shown in Figure 4(a), a trench T1 is formed in the semiconductor portion 30. Then, as shown in Figure 4(b), a cover film 40 is formed on the side surface T1s of the trench T1.
[0062] Subsequently, as shown in Figure 4(c), the first metal element is introduced into the bottom surface T1b of the trench T1. For example, the first metal element is ion-implanted into the semiconductor region r6 that includes the bottom surface T1b. At least a portion of the semiconductor region r6 into which the first metal element is ion-implanted becomes at least a portion of the first conductive region 12a. Since the side surface T1s of the trench T1 is covered by the cover film 40, the first metal element is not ion-implanted into the semiconductor region that includes the side surface T1s.
[0063] Subsequently, as shown in Figure 4(d), after removing the cover film 40, a conductive layer 12p containing a second metal element is formed and embedded in the trench T1, as shown in Figure 4(e).
[0064] The first conductive region 12a formed in this manner includes, for example, a first metal element and silicon. The first conductive region 12a includes, for example, a silicide containing the first metal element.
[0065] In this example, the lower end of the first conductive region 12a may be located below the lower end of the second conductive region 12b. That is, the position of the first lower end 12ab of the first conductive region 12a in the Z-axis direction is between the position of the second lower end 12bb of the second conductive region 12b in the Z-axis direction and the position of the first conductive portion 11 in the Z-axis direction.
[0066] Figures 5(a) to 5(c) are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment. Figures 5(a) to 5(c) show yet another example of the process of forming the second conductive part 12 in the manufacturing process of a semiconductor device.
[0067] As shown in Figure 5(a), a trench T1 is formed in the semiconductor portion 30. Then, as shown in Figure 5(b), a second metal element is introduced into the side surface T1s of the trench T1. For example, the second metal element is ion-implanted into the semiconductor region r7 including the side surface T1s. At least a portion of the semiconductor region r7 into which the second metal element has been ion-implanted becomes at least a portion of the second conductive region 12b. For example, the range of the second conductive region 12b can be adjusted by adjusting the ion implantation angle. By adjusting the ion implantation angle, for example, the second metal element is not introduced into the bottom surface T1b of the trench T1.
[0068] Subsequently, a conductive layer 12q containing the first metal element is formed and embedded within the trench T1. The conductive layer 12q covers the side surface T1s (surface of semiconductor region r7) of the trench T1 and the bottom surface T1b of the trench T1. A portion of the conductive layer 12q becomes at least a portion of the first conductive region 12a.
[0069] The second conductive region 12b formed in this manner includes, for example, a second metal element and silicon. The second conductive region 12b includes, for example, a silicide containing a second metal element.
[0070] A portion of the conductive layer 12q becomes the third conductive region 12c. Therefore, in this example, the third conductive region 12c contains the first metal element. The third conductive region 12c does not necessarily contain the second metal element. Alternatively, the concentration of the second metal element in the third conductive region 12c may be lower than the concentration of the second metal element in the second conductive region 12b.
[0071] The embodiment may include the following configuration (e.g., proposed technical details). (Composition 1) First conductive part and A second conductive portion, wherein the direction from the first conductive portion to the second conductive portion is along the first direction, A third conductive portion, wherein the direction from the second conductive portion to the third conductive portion is along a second direction that intersects with the first direction, A first insulating portion including a first insulating region provided between the second conductive portion and the third conductive portion, A semiconductor portion of a first conductivity type, including a first semiconductor region provided between the first conductive portion and the second conductive portion, and a second semiconductor region provided between the second conductive portion and the first insulating region, Equipped with, The second conductive portion includes a first conductive region that forms a Schottky junction with the first semiconductor region, and a second conductive region that forms a Schottky junction with the second semiconductor region. When the first conductivity type is n-type, the work function of the first conductivity region is lower than the work function of the second conductivity region. A semiconductor device wherein, when the first conductivity type is p-type, the work function of the first conductivity region is higher than the work function of the second conductivity region. (Configuration 2) The second conductive part is, The first side end and, A second side end located between the first side end and the second semiconductor region, A corner portion that is continuous with the second side end and located between the second side end and the first conductive portion, Includes, The semiconductor device according to configuration 1, wherein the corner portion is part of the second conductive region. (Composition 3) The second conductive part is, The first side end and A second side end located between the first side end and the second semiconductor region, A corner portion that is continuous with the second side end and located between the second side end and the first conductive portion, Includes, A semiconductor device according to configuration 1 or 2, wherein, in a cross-section in a plane including the first and second directions, the radius of curvature of the boundary between the corner portion and the semiconductor portion is 1 nm or more and 100 nm or less. (Composition 4) The work function of the first conductive region is between 0.5 eV and 4.8 eV. The semiconductor device according to any one of configurations 1 to 3, wherein the work function of the second conductive region is 4.8 eV or more and 10 eV or less. (Composition 5) The first conductive region comprises a first metallic element, the first metallic element comprising at least one selected from the group consisting of Al, Mg, Ti, Se, V, Cr, Mn, Fe, Cu, Zn, Rb, Sr, Y, Zr, Nb, Mo, Ru, Ag, In, Sn, Sb, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Hf, Ta, W, and Bi. The semiconductor device according to any one of configurations 1 to 4, wherein the second conductive region includes a second metallic element, and the second metallic element includes at least one selected from the group consisting of Co, Ni, Se, Rh, Pd, Te, Re, Ir, Pt, and Au. (Composition 6) First conductive part and A second conductive portion, wherein the direction from the first conductive portion to the second conductive portion is along the first direction, A third conductive portion, wherein the direction from the second conductive portion to the third conductive portion is along a second direction that intersects with the first direction, A first insulating portion including a first insulating region provided between the second conductive portion and the third conductive portion, A semiconductor region of a first conductivity type, including a first semiconductor region provided between the first conductive portion and the second conductive portion, and a second semiconductor region provided between the second conductive portion and the third conductive portion, Equipped with, The second conductive portion includes a first conductive region that forms a Schottky junction with the first semiconductor region, and a second conductive region that forms a Schottky junction with the second semiconductor region. The first conductive region comprises a first metallic element, the first metallic element comprising at least one selected from the group consisting of Al, Mg, Ti, Se, V, Cr, Mn, Fe, Cu, Zn, Rb, Sr, Y, Zr, Nb, Mo, Ru, Ag, In, Sn, Sb, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Hf, Ta, W, and Bi. A semiconductor device wherein the second conductive region includes a second metallic element, and the second metallic element includes at least one selected from the group consisting of Co, Ni, Se, Rh, Pd, Te, Re, Ir, Pt, and Au. (Composition 7) The second conductive region does not contain the first metal element, or The semiconductor device according to configuration 5 or 6, wherein the concentration of the first metal element in the second conductive region is lower than the concentration of the first metal element in the first conductive region. (Composition 8) The second conductive portion further includes a third conductive region, The direction from the first conductive region to the third conductive region is along the first direction, The semiconductor device according to any one of configurations 5 to 7, wherein the third conductive region includes the second metal element. (Composition 9) The first conductive region includes a first upper end and a first lower end provided between the first upper end and the first conductive portion. The second conductive region includes a second upper end and a second lower end provided between the second upper end and the first conductive portion. The semiconductor device according to any one of configurations 1 to 8, wherein the direction from the first lower end to the second lower end is along the second direction. (Composition 10) The semiconductor device according to any one of configurations 5 to 8, wherein the first conductive region includes the first metal element and silicon. (Composition 11) The first conductive region includes a first upper end and a first lower end provided between the first upper end and the first conductive portion. The second conductive region includes a second upper end and a second lower end provided between the second upper end and the first conductive portion. The semiconductor device according to any one of configurations 1 to 8, wherein the position of the first lower end in the first direction is between the position of the second lower end in the first direction and the position of the first conductive portion in the first direction. (Composition 12) The second conductive portion further includes a third conductive region, The direction from the first conductive region to the third conductive region is along the first direction, The semiconductor device according to any one of configurations 5 to 7, wherein the third conductive region includes the first metal element. (Composition 13) The semiconductor device according to any one of configurations 5 to 7, wherein the second conductive region includes the second metal element and silicon. (Composition 14) The semiconductor portion further includes a third semiconductor region provided between the first conductive portion and the first semiconductor region, A semiconductor device according to any one of configurations 1 to 13, wherein the impurity concentration of the first conductivity type in the first semiconductor region is higher than the impurity concentration of the first conductivity type in the third semiconductor region. (Composition 15) First conductive part and A second conductive portion, wherein the direction from the first conductive portion to the second conductive portion is along the first direction, A third conductive portion, wherein the direction from the second conductive portion to the third conductive portion is along a second direction that intersects with the first direction, A first insulating portion including a first insulating region provided between the second conductive portion and the third conductive portion, A semiconductor portion of a first conductivity type, comprising: a first semiconductor region provided between the first conductive portion and the second conductive portion and in contact with the second conductive portion; a second semiconductor region provided between the second conductive portion and the first insulating region and in contact with the second conductive portion; and a third semiconductor region provided between the first conductive portion and the first semiconductor region. Equipped with, A semiconductor device wherein the impurity concentration of the first conductivity type in the first semiconductor region is higher than the impurity concentration of the first conductivity type in the third semiconductor region. (Composition 16) The first conductive region faces the first semiconductor region in the first direction, The second conductive region faces the second semiconductor region in the second direction, The first semiconductor region includes a facing surface that faces the second conductive portion, The semiconductor device according to any one of configurations 1 to 15, wherein the direction from the third conductive portion to the opposing surface is along the second direction. (Composition 17) The second semiconductor region includes a first region and a second region provided between the first region and the first conductive portion. A semiconductor device according to any one of configurations 1 to 16, wherein the impurity concentration of the first conductivity type in the first region is higher than the impurity concentration of the first conductivity type in the second region. (Composition 18) Further comprising a fourth conductive part, The semiconductor portion further includes a third semiconductor region provided between the first conductive portion and the first semiconductor region, The direction from the fourth conductive portion to the third semiconductor region is along the second direction, The semiconductor device according to any one of configurations 1 to 17, wherein the first insulating portion includes a second insulating region provided between the third semiconductor region and the fourth conductive portion. (Composition 19) The fourth conductive part is electrically connected to the second conductive part, or The semiconductor device according to configuration 18, wherein the fourth conductive portion can be electrically connected to the second conductive portion.
[0072] According to the embodiment, a semiconductor device capable of reducing the forward voltage of the body diode can be provided.
[0073] In this specification, "nitride semiconductor" refers to B x In y Al z Ga 1-x-y-z This term includes semiconductors of all compositions obtained by varying the compositional ratios of x, y, and z within the respective ranges in the chemical formula N(0≦x≦1,0≦y≦1,0≦z≦1,x+y+z≦1). Furthermore, "nitride semiconductors" also include those that further contain group V elements other than N (nitrogen) in the above chemical formula, those that further contain various elements added to control various physical properties such as conductivity, and those that further contain various elements unintentionally.
[0074] In this specification, "electrically connected" includes not only cases where the connection is made by direct contact, but also cases where the connection is made via other conductive members or the like.
[0075] In this specification, "perpendicular" does not mean strictly perpendicular, but includes variations in the manufacturing process, for example; it is sufficient if it is substantially perpendicular.
[0076] Embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configuration of each element included in a semiconductor device is included within the scope of the present invention as long as it can be implemented in the same way and similar effects can be obtained by appropriately selecting from the range known to those skilled in the art.
[0077] Combinations of two or more elements from any of the specific examples, to the extent technically feasible, are also included within the scope of the present invention, insofar as they encompass the gist of the invention.
[0078] Furthermore, all semiconductor devices that a person skilled in the art can implement by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also fall within the scope of the present invention, insofar as they encompass the gist of the present invention.
[0079] Furthermore, within the scope of the concept of the present invention, a person skilled in the art could conceive of various modifications and alterations, and it is understood that such modifications and alterations also fall within the scope of the present invention.
[0080] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of symbols]
[0081] 11…First conductive part 12...Second conductive part 12a...first conductive region 12ab...First lower end 12af…Conductive film 12at...first upper end 12b…Second conductive region 12bb…Second bottom end 12bt…Second upper end 12c…Third conductive region 12p…conductive layer 12q…conductive layer 13…Third conductive part 14…Fourth conductive part 15…Fifth conductive part 20...Insulation part 20a...First insulating region 20b...Second insulating region 30…Semiconductor Division 30a...First Semiconductor Region 30b...Second Semiconductor Region 30c…Third semiconductor region 30d...Fourth Semiconductor Domain 30s…Surface 40…Cover film 100... Semiconductor equipment Ed1…boundary F1... Opposite side P...boundary T1...Trench T1b…Bottom surface T1c…corner T1s…side T2...Trench c1...Corner section r1…first area r2…Second area r6…Semiconductor area r7…Semiconductor area s1...first side end s2…Second side end s3…Top end s4…lower end
Claims
1. First conductive part and A second conductive portion, wherein the direction from the first conductive portion to the second conductive portion is along the first direction, A third conductive portion, wherein the direction from the second conductive portion to the third conductive portion is along a second direction that intersects with the first direction, A first insulating portion including a first insulating region provided between the second conductive portion and the third conductive portion, A semiconductor portion of a first conductivity type, including a first semiconductor region provided between the first conductive portion and the second conductive portion, and a second semiconductor region provided between the second conductive portion and the first insulating region, Equipped with, The second conductive portion includes a first conductive region that forms a Schottky junction with the first semiconductor region, and a second conductive region that forms a Schottky junction with the second semiconductor region. When the first conductivity type is n-type, the work function of the first conductivity region is lower than the work function of the second conductivity region. A semiconductor device wherein, when the first conductivity type is p-type, the work function of the first conductivity region is higher than the work function of the second conductivity region.
2. The second conductive part is, First side end and A second side end located between the first side end and the second semiconductor region, A corner portion that is continuous with the second side end and located between the second side end and the first conductive portion, Includes, The semiconductor device according to claim 1, wherein the corner portion is part of the second conductive region.
3. The second conductive part is, First side end and A second side end located between the first side end and the second semiconductor region, A corner portion that is continuous with the second side end and located between the second side end and the first conductive portion, Includes, The semiconductor device according to claim 1 or 2, wherein in a cross-section in a plane including the first direction and the second direction, the radius of curvature of the boundary between the corner portion and the semiconductor portion is 1 nm or more and 100 nm or less.
4. The work function of the first conductive region is 0.5 eV or more and 4.8 eV or less. The semiconductor device according to claim 1 or 2, wherein the work function of the second conductive region is 4.8 eV or more and 10 eV or less.
5. The first conductive region includes a first metallic element, the first metallic element includes at least one selected from the group consisting of Al, Mg, Ti, Se, V, Cr, Mn, Fe, Cu, Zn, Rb, Sr, Y, Zr, Nb, Mo, Ru, Ag, In, Sn, Sb, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Hf, Ta, W, and Bi. The semiconductor device according to claim 1 or 2, wherein the second conductive region comprises a second metallic element, and the second metallic element comprises at least one selected from the group consisting of Co, Ni, Se, Rh, Pd, Te, Re, Ir, Pt, and Au.
6. First conductive part and A second conductive portion, wherein the direction from the first conductive portion to the second conductive portion is along the first direction, A third conductive portion, wherein the direction from the second conductive portion to the third conductive portion is along a second direction that intersects with the first direction, A first insulating portion including a first insulating region provided between the second conductive portion and the third conductive portion, A semiconductor region of a first conductivity type, including a first semiconductor region provided between the first conductive portion and the second conductive portion, and a second semiconductor region provided between the second conductive portion and the third conductive portion, Equipped with, The second conductive portion includes a first conductive region that forms a Schottky junction with the first semiconductor region, and a second conductive region that forms a Schottky junction with the second semiconductor region. The first conductive region includes a first metallic element, the first metallic element includes at least one selected from the group consisting of Al, Mg, Ti, Se, V, Cr, Mn, Fe, Cu, Zn, Rb, Sr, Y, Zr, Nb, Mo, Ru, Ag, In, Sn, Sb, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Hf, Ta, W, and Bi. A semiconductor device wherein the second conductive region includes a second metal element, and the second metal element includes at least one selected from the group consisting of Co, Ni, Se, Rh, Pd, Te, Re, Ir, Pt, and Au.
7. The second conductive region does not contain the first metal element, or The semiconductor device according to claim 5, wherein the concentration of the first metal element in the second conductive region is lower than the concentration of the first metal element in the first conductive region.
8. The second conductive portion further includes a third conductive region, The direction from the first conductive region to the third conductive region is along the first direction, The semiconductor device according to claim 5, wherein the third conductive region includes the second metal element.
9. The first conductive region includes a first upper end and a first lower end provided between the first upper end and the first conductive portion. The second conductive region includes a second upper end and a second lower end provided between the second upper end and the first conductive portion. The semiconductor device according to claim 1 or 2, wherein the direction from the first lower end to the second lower end is along the second direction.
10. The semiconductor device according to claim 5, wherein the first conductive region comprises the first metal element and silicon.
11. The first conductive region includes a first upper end and a first lower end provided between the first upper end and the first conductive portion. The second conductive region includes a second upper end and a second lower end provided between the second upper end and the first conductive portion. The semiconductor device according to claim 1 or 2, wherein the position of the first lower end in the first direction is between the position of the second lower end in the first direction and the position of the first conductive portion in the first direction.
12. The second conductive portion further includes a third conductive region, The direction from the first conductive region to the third conductive region is along the first direction, The semiconductor device according to claim 5, wherein the third conductive region includes the first metal element.
13. The semiconductor device according to claim 5, wherein the second conductive region comprises the second metal element and silicon.
14. The semiconductor portion further includes a third semiconductor region provided between the first conductive portion and the first semiconductor region, The semiconductor device according to claim 1 or 2, wherein the impurity concentration of the first conductivity type in the first semiconductor region is higher than the impurity concentration of the first conductivity type in the third semiconductor region.
15. First conductive part and A second conductive portion, wherein the direction from the first conductive portion to the second conductive portion is along the first direction, A third conductive portion, wherein the direction from the second conductive portion to the third conductive portion is along a second direction that intersects with the first direction, A first insulating portion including a first insulating region provided between the second conductive portion and the third conductive portion, A semiconductor portion of a first conductivity type, comprising: a first semiconductor region provided between the first conductive portion and the second conductive portion and in contact with the second conductive portion; a second semiconductor region provided between the second conductive portion and the first insulating region and in contact with the second conductive portion; and a third semiconductor region provided between the first conductive portion and the first semiconductor region. Equipped with, A semiconductor device wherein the impurity concentration of the first conductivity type in the first semiconductor region is higher than the impurity concentration of the first conductivity type in the third semiconductor region.
16. The first conductive region faces the first semiconductor region in the first direction, The second conductive region faces the second semiconductor region in the second direction, The first semiconductor region includes a facing surface that faces the second conductive portion, The semiconductor device according to claim 1 or 2, wherein the direction from the third conductive portion to the opposing surface is along the second direction.
17. The second semiconductor region includes a first region and a second region provided between the first region and the first conductive portion. The semiconductor device according to claim 1 or 2, wherein the impurity concentration of the first conductivity type in the first region is higher than the impurity concentration of the first conductivity type in the second region.
18. Further comprising a fourth conductive part, The semiconductor portion further includes a third semiconductor region provided between the first conductive portion and the first semiconductor region, The direction from the fourth conductive portion to the third semiconductor region is along the second direction, The semiconductor device according to claim 1 or 2, wherein the first insulating portion includes a second insulating region provided between the third semiconductor region and the fourth conductive portion.
19. The fourth conductive part is electrically connected to the second conductive part, or The semiconductor device according to claim 18, wherein the fourth conductive portion can be electrically connected to the second conductive portion.