Photovoltaic device with conductive layer interconnection

Abstract

According to embodiments provided herein, a photovoltaic device may have one or more cells with conductive layer interconnects.

Description

[Technical Field]

[0001]

[0001] This specification relates, in general, to photovoltaic devices having conductive layer interconnections, and more particularly to photovoltaic cells having conductive layer interconnections for forming electrical connections between adjacent cells of a photovoltaic device. [Background technology]

[0002]

[0002] Photovoltaic devices generate power by converting light into electricity using semiconductor materials that exhibit the photovoltaic effect. Photovoltaic devices consist of numerous layers, which are divided into multiple photovoltaic cells by the selective removal of certain multiple regions of the layers. Each photovoltaic cell converts sunlight into electricity and can be electrically connected to one or more adjacent cells. Such electrical connections can be formed by filling the removed regions with conductive material. The dimensions of the removed regions and conductive material can affect the performance and manufacturability of the photovoltaic device.

[0003]

[0003] Therefore, there is a demand for new photovoltaic devices that have conductive layer interconnections. [Overview of the project] [Means for solving the problem]

[0004]

[0004] Embodiments provided herein relate to photovoltaic devices comprising conductive layer interconnections. These features and additional features provided by the embodiments described herein can be better understood by combining the following detailed description with the drawings.

[0005]

[0005] The embodiments described in the drawings are in essence illustrative and exemplary and are not intended to limit the subject matter defined by the claims. The following detailed description of the exemplary embodiments can be understood by reading in conjunction with the following drawings, where similar structures are indicated by similar reference figures. [Brief explanation of the drawing]

[0006] [Figure 1]

[0006] A schematic illustration shows one or more photovoltaic devices according to the embodiments shown and described herein. [Figure 2]

[0007] A schematic cross-sectional view along 2-2 of the photovoltaic device shown in Figure 1 according to one or more embodiments described herein is shown. [Figure 3]

[0008] A schematic illustration shows a substrate according to one or more embodiments shown and described herein. [Figure 4]

[0009] This diagram schematically illustrates the process for forming conductive layer interconnections according to one or more embodiments shown and described herein. [Figure 5]

[0010] This specification illustrates a top perspective view of a via according to one or more embodiments shown and described herein. [Figure 6]

[0011] A schematic cross-sectional view along via 6-6 of Figure 5 is shown according to one or more embodiments described herein. [Modes for carrying out the invention]

[0007]

[0012] Embodiments of photovoltaic devices having reverse bias control are provided herein. Generally, the photovoltaic devices provided herein may include cells configured to limit the amount of power lost by the cells when placed under reverse bias conditions. Various embodiments of photovoltaic devices, as well as systems and methods for forming photovoltaic devices, are described in further detail herein.

[0008]

[0013] Referring here to Figure 1, an embodiment of the photovoltaic device 100 is schematically illustrated. The photovoltaic device 100 may be configured to receive light and convert it into an electrical signal, for example, so that photons are absorbed from light and converted into an electrical signal via the photovoltaic effect. Accordingly, the photovoltaic device 100 may define a first surface 102 configured to be exposed to a light source such as the sun. The photovoltaic device 100 may also define an opposite surface 104 offset from the first surface 102 by, for example, multiple material layers. It should be noted that the term "light" is not limited to these but can refer to various wavelengths of the electromagnetic spectrum, such as ultraviolet (UV), infrared (IR), and visible wavelengths of the electromagnetic spectrum. As used herein, "sunlight" refers to light emitted by the sun.

[0009]

[0014] The photovoltaic device 100 may include a plurality of layers arranged between a first surface 102 and the opposite surface 104. As used herein, the term “layer” refers to a material of thickness provided on a surface. Each layer may cover the entire surface or any portion of the surface. In some embodiments, the layers of the photovoltaic device 100 may be divided into an array of photovoltaic cells 200. For example, the photovoltaic device 100 may be scribed according to a plurality of continuous scribes 202 and a plurality of parallel scribes 204. The continuous scribes 202 may extend along the length Y of the photovoltaic device 100 and partition the photovoltaic cells 200 along the length Y of the photovoltaic device 100. The continuous scribes 202 may be configured to connect adjacent cells of the photovoltaic cells 200 continuously along the width X of the photovoltaic device 100. The continuous scribe 202 may form a monolithic interconnection of adjacent cells, i.e., cells adjacent to the continuous scribe 202. The parallel scribe 204 may extend along the width X of the photovoltaic device 100 and partition the photovoltaic cells 200 along the width X of the photovoltaic device 100. Under operation, the current 205 can flow mainly along the width X through the photovoltaic cells 200 that are continuously connected by the continuous scribe 202. Under operation, the parallel scribe 204 may limit the ability of the current 205 to flow along the length Y. The parallel scribe 204 is optional and may be configured to separate photovoltaic cells 200 that are continuously connected to groups 206 organized along the length Y. Thus, the continuous scribe 202 and the parallel scribe 204 can partition an array of photovoltaic cells 200.

[0010]

[0015] Continuing to refer to Figure 1, the parallel scribes 204 can electrically isolate the group 206 of the continuously connected photovoltaic cells 200. In some embodiments, the group 206 of the photovoltaic cells 200 can also be connected in parallel, for example, via an electrical bushing. Optionally, the number of parallel scribes 204 may be configured to limit the maximum current generated by each group 206 of the photovoltaic cells 200. In some embodiments, the maximum current generated by each group 206 may be about 200 milliamperes (mA) or less, for example, about 100 mA or less in one embodiment, about 75 mA or less in another embodiment, or about 50 mA or less in a further embodiment.

[0011]

[0016] Referring together to Figures 1 and 2, the layer of the photovoltaic device 100 may include a substrate 110 configured to facilitate light transmission to the photovoltaic device 100. The substrate 110 may be located on the first surface 102 of the photovoltaic device 100. Referring now to Figures 2 and 3, the substrate 110 may have a first surface 112 substantially facing the first surface 102 of the photovoltaic device 100, and a second surface 114 substantially facing the opposite surface 104 of the photovoltaic device 100. One or more layers of material may be located between the first surface 112 and the second surface 114 of the substrate 110.

[0012]

[0017] The substrate 110 may include a transparent layer 120 having a first surface 122 substantially oriented toward the first surface 102 of the photovoltaic device 100, and a second surface 124 substantially oriented toward the opposite surface 104 of the photovoltaic device 100. In some embodiments, the second surface 124 of the transparent layer 120 may form a second surface 114 of the substrate 110. The transparent layer 120 may be formed from a substantially transparent material, such as glass. Suitable glass may include soda-lime glass or any glass with reduced iron content. The transparent layer 120 may have any suitable transmittance, including about 250 nm to about 1,300 nm in some embodiments, or about 250 nm to about 950 nm in other embodiments. The transparent layer 120 may further have any preferred transmittance percentage, for example, more than about 50% in one embodiment, more than about 60% in another embodiment, more than about 70% in yet another embodiment, more than about 80% in a further embodiment, or more than about 85% in an even further embodiment. In one embodiment, the transparent layer 120 may be formed from glass having a transmittance of about 90% or more. Optionally, the substrate 110 may include a coating 126 applied to the first surface 122 of the transparent layer 120. The coating 126 may be configured to interact with light or improve the durability of the substrate 110, but is not limited to, an anti-reflective coating, an anti-fouling coating, or a combination thereof.

[0013]

[0018] Referring again to Figure 2, the photovoltaic device 100 may include a barrier layer 130 configured to mitigate the diffusion of contaminants (e.g., sodium) from the substrate 110 that may cause degradation or delamination. The barrier layer 130 may have a first surface 132 substantially facing a first surface 102 of the photovoltaic device 100, and a second surface 134 substantially facing the opposite surface 104 of the photovoltaic device 100. In some embodiments, the barrier layer 130 may be provided adjacent to the substrate 110. For example, the first surface 132 of the barrier layer 130 may be provided on the second surface 114 of the substrate 100. As used herein, the term “adjacent” means that two layers are placed side by side without any intervening material being used between at least a portion of the layers.

[0014]

[0019] Overall, the barrier layer 130 may be substantially transparent, thermally stable, have a low pinhole count, high sodium blocking ability, and good adhesion. Alternatively or in addition, the barrier layer 130 may be configured to apply color suppression to light. The barrier layer 130 may include one or more layers of preferred materials, but are not limited to, tin oxide, silicon dioxide, aluminum-doped silicon oxide, silicon oxide, silicon nitride, or aluminum oxide. The barrier layer 130 may have any preferred thickness separated by the first surface 132 and the second surface 134, for example, greater than about 100 Å in one embodiment, greater than about 150 Å in another embodiment, or less than about 200 Å in a further embodiment.

[0015]

[0020] Continuing to refer to Figure 2, the photovoltaic device 100 may include a transparent conductive oxide (TCO) layer 140 configured to provide electrical contacts for transporting charge carriers generated by the photovoltaic device 100. The TCO layer 140 may have a first surface 142 substantially oriented toward a first surface 102 of the photovoltaic device 100, and a second surface 144 substantially oriented toward the opposite surface 104 of the photovoltaic device 100. In some embodiments, the TCO layer 140 may be provided adjacent to a barrier layer 130. For example, the first surface 142 of the TCO layer 140 may be provided on the second surface 134 of the barrier layer 130. Overall, the TCO layer 140 may be formed from one or more layers of an n-type semiconductor material that is substantially transparent and has a wide bandgap. Specifically, the wide bandgap may have an energy value greater than the photon energy of light that can mitigate the absorption of undesirable light. The TCO layer 140 may include, but is not limited to, one or more layers of suitable materials including tin dioxide, doped tin dioxide (e.g., F-SnO2), indium tin oxide, doped or undoped zinc oxide, or cadmium stannate.

[0016]

[0021] The photovoltaic device 100 may include a buffer layer 150 configured to provide an insulating layer between the TCO layer 140 and any adjacent semiconductor layer. The buffer layer 150 may have a first surface 152 substantially facing a first surface 102 of the photovoltaic device 100, and a second surface 154 substantially facing the opposite surface 104 of the photovoltaic device 100. In some embodiments, the buffer layer 150 may be provided adjacent to the TCO layer 140. For example, the first surface 152 of the buffer layer 150 may be provided on the second surface 144 of the TCO layer 140. The buffer layer 140 may be, but is not limited to, intrinsic tin dioxide, zinc magnesium oxide (e.g., Zn 1-x Mg x(O), a material having a higher resistance than the TCO layer 140, including silicon dioxide (SiO2), aluminum oxide (Al2O3), aluminum nitride (AlN), zinc tin oxide, zinc oxide, silicon tin oxide, or any combination thereof, may be included. In some embodiments, the material of the buffer layer 140 may be configured to substantially match the bandgap of the adjacent semiconductor layer (e.g., the absorber). The buffer layer 150 may have any suitable thickness between the first surface 152 and the second surface 154, for example, greater than about 100 Å in one embodiment, between about 100 Å and about 800 Å in another embodiment, or between about 150 Å and about 600 Å in a further embodiment.

[0017]

[0022] Continuing to refer to FIG. 2, the photovoltaic device 100 may include an absorber layer 160 configured to form a p-n junction in cooperation with another layer within the photovoltaic device 100. Accordingly, the photons of the absorbed light can dissociate the pair of electrons and holes to generate a carrier flow, making it possible to generate electricity. The absorber layer 160 may have a first surface 162 substantially facing the first surface 102 of the photovoltaic device 100 and a second surface 164 substantially facing the opposite surface 104 of the photovoltaic device 100. The thickness of the absorber layer 160 may be defined between the first surface 162 and the second surface 164. The thickness of the absorber layer 160 may be between about 0.5 μm and about 10 μm, for example, between about 1 μm and about 7 μm in one embodiment, or between about 1.5 μm and about 4 μm in another embodiment.

[0018]

[0023] According to the embodiments described in this specification, the absorber layer 160 may be formed from a p-type semiconductor material having excess positive charge carriers, i.e., holes or acceptors. The absorber layer 160 may include any suitable p-type semiconductor material such as a Group-II to Group-VI semiconductor. Specific examples include, but are not limited to, semiconductor materials containing cadmium, tellurium, selenium, or any combination thereof. Suitable examples include, but are not limited to, a binary of cadmium and tellurium, a ternary of cadmium, selenium, and tellurium (e.g., CdSe x Te 1-x ), a ternary of cadmium, zinc, and tellurium (e.g., CdZn x Te 1-x ), a compound containing cadmium, selenium, tellurium, and one or more additional elements, or a compound containing cadmium, zinc, tellurium, and one or more additional elements.

[0019]

[0024] In embodiments where the absorber layer 160 contains tellurium and cadmium, the atomic percentage of tellurium may be, for example, greater than about 30 atomic percent and less than about 50 atomic percent in one embodiment, greater than about 40 atomic percent and less than about 50 atomic percent in a further embodiment, or greater than about 47 atomic percent and less than about 50 atomic percent in yet another embodiment, i.e., it may be greater than or equal to about 25 atomic percent and less than or equal to about 50 atomic percent. Alternatively, or additionally, the atomic percentage of tellurium in the absorber layer 160 may be greater than about 45 atomic percent, for example, greater than about 49% in one embodiment. It should be noted that the atomic percentages described in this specification are representative of the entire absorber layer 160, and the atomic percentage of the material at a specific location within the absorber layer 160 may vary with thickness in addition to the overall composition of the absorber layer 160.

[0020]

[0025] In embodiments in which the absorbent layer 160 contains selenium and tellurium, the atomic percentage of selenium in the absorbent layer 160 may be greater than about 0 atomic percent and less than about 25 atomic percent, for example, greater than about 1 atomic percent and less than about 20 atomic percent in one embodiment, greater than about 1 atomic percent and less than about 15 atomic percent in another embodiment, or greater than about 1 atomic percent and less than about 8 atomic percent in a further embodiment. It should be noted that the concentrations of tellurium, selenium, or both may vary throughout the thickness of the absorbent layer 160. For example, if the absorbent layer 160 contains selenium in a mole fraction of x and tellurium in a mole fraction of 1-x(Se x Te 1-x When the compound is present in a mole fraction of ), x may vary in the absorbent layer 160 as it is distanced from the first surface 162 of the absorbent layer 160.

[0021]

[0026] Continuing to refer to Figure 2, the absorbent layer 160 may be doped with dopants configured to adjust the charge carrier concentration. In some embodiments, the absorbent layer 160 may be doped with Group I or Group V dopants such as copper, arsenic, phosphorus, antimony, or combinations thereof. The total density of dopants in the absorbent layer 160 can be controlled. Alternatively, the amount of dopant may vary with distance from the first surface 162 of the absorbent layer 160.

[0022]

[0027] According to embodiments provided herein, the pn junction may be formed by providing an absorbent layer 160 that is sufficiently close to a portion of the photovoltaic device 100 having an excess of negative charge carriers, i.e., electrons or donors. In some embodiments, the absorbent layer 160 may be provided adjacent to the n-type semiconductor material. Alternatively, one or more intervention layers may be provided between the absorbent layer 160 and the n-type semiconductor material. In some embodiments, the absorbent layer 160 may be provided adjacent to a buffer layer 150. For example, the first surface 162 of the absorbent layer 160 may be provided on the second surface 154 of the buffer layer 150.

[0023]

[0028] The photovoltaic device 100 may include a back contact layer 170 configured to mitigate undesirable degradation of the dopant and to provide electrical contact with the absorbent layer 160. The back contact layer 170 may have a first surface 172 substantially oriented toward a first surface 102 of the photovoltaic device 100, and a second surface 174 substantially oriented toward the opposite surface 104 of the photovoltaic device 100. The thickness of the back contact layer 170 may be defined between the first surface 172 and the second surface 174. The thickness of the back contact layer 170 may be between about 5 nm and about 200 nm, for example between about 10 nm and about 50 nm in one embodiment.

[0024]

[0029] In some embodiments, the back contact layer 170 may be provided adjacent to the absorbent layer 160. For example, the first surface 172 of the back contact layer 170 may be provided on the second surface 164 of the absorbent layer 160. In some embodiments, the back contact layer 170 may include binary or ternary combinations of materials derived from Group I, Group II, and Group VI, in a variety of compositions, such as one or more layers containing zinc, copper, cadmium, and tellurium. Further exemplary materials, but not limited to these, include zinc telluride doped with copper telluride, or zinc telluride alloyed with copper telluride. For ease of discussion, a stack of layers including the buffer layer 150, the absorbent layer 160, the back contact layer 170, or a combination thereof may be referred to herein as a semiconductor stack 176.

[0025]

[0030] The photovoltaic device 100 may include a first conductive layer 180 configured to provide electrical contact with the absorbent layer 160. The first conductive layer 180 may have a first surface 182 substantially oriented toward a first surface 102 of the photovoltaic device 100, and a second surface 184 substantially oriented toward the opposite surface 104 of the photovoltaic device 100. In some embodiments, the first conductive layer 180 may be provided adjacent to a back contact layer 170. For example, the first surface 182 of the first conductive layer 180 may be provided on the second surface 174 of the back contact layer 170. The thickness of the first conductive layer 180 may be defined between the first surface 182 and the second surface 184. The thickness of the first conductive layer 180 may be less than about 3 μm, for example, between about 50 nm and about 2.5 μm in one embodiment, or between about 100 nm and about 2 μm in another embodiment.

[0026]

[0031] The first conductive layer 180 may include any suitable conductive material having a sheet resistance between 0.5 Ω / sq and 10 Ω / sq. Suitable examples include one or more metal layers, one or more nitrogen-containing metal layers, or both. Alternatively, the first conductive layer 180 may be transparent or transparent to certain wavelengths of light. In some embodiments, the first conductive layer 180 may include a combination of conductive material layers. Each layer may contribute to structural or electrical properties so that the stack of conductive material layers has desired performance characteristics. Suitable metals include, but are not limited to, silver, nickel, copper, aluminum, titanium, palladium, chromium, molybdenum, gold, or combinations thereof. Suitable examples of nitrogen-containing metals include, but are not limited to, aluminum nitride, nickel nitride, titanium nitride, tungsten nitride, selenium nitride, tantalum nitride, or vanadium nitride.

[0027]

[0032] The photovoltaic device 100 may include a dielectric layer 190 configured to electrically insulate one or more layers of the photovoltaic device 100. For example, within a cell 200, the dielectric layer 190 may electrically insulate a first conductive layer 180 from a second conductive layer 210. The dielectric layer 190 may have a first surface 190 substantially facing a first surface 102 of the photovoltaic device 100, and a second surface 194 substantially facing the opposite surface 104 of the photovoltaic device 100. In some embodiments, the dielectric layer 190 may be provided adjacent to the first conductive layer 180. For example, the first surface 192 of the dielectric layer 190 may be provided on the second surface 184 of the first conductive layer 180. The thickness of the dielectric layer 190 may be defined between the first surface 192 and the second surface 194. The thickness of the dielectric layer 190 may be less than about 30 μm, for example less than about 20 μm in one embodiment. Overall, the thickness of the dielectric layer 190 is at least an order of magnitude greater than the thickness of the first conductive layer 180, for example, more than 25 times the thickness of the first conductive layer 180 in one embodiment, more than 50 times the thickness of the first conductive layer 180 in another embodiment, or more than 100 times the thickness of the first conductive layer 180 in a further embodiment.

[0028]

[0033] The dielectric layer may include, for example, a dielectric material such as a photoresist material or a nonconductive polymer. Preferred examples of the dielectric material may further include epoxy, acrylic, phenol, or polyimide. In some embodiments, the dielectric material may have a transmittance of more than about 10% for wavelengths of light suitable for use in laser ablation; that is, the wavelength range may be related to the solid-state laser wavelength. For example, the wavelength range may be between about 300 nm and about 1,100 nm.

[0029]

[0034] Continuing to refer to Figure 2, the photovoltaic device 100 may include a TCO layer 140, a first conductive layer 180 of an adjacent cell 200, or a second conductive layer 210 configured to provide electrical contact with both. The second conductive layer 210 may have a first surface 212 substantially facing a first surface 102 of the photovoltaic device 100, and a second surface 214 substantially facing the opposite surface 104 of the photovoltaic device 100. In some embodiments, the second conductive layer 210 may be provided adjacent to the dielectric layer 190. For example, the first surface 212 of the second conductive layer 210 may be provided on the second surface 194 of the dielectric layer 190. The thickness of the second conductive layer 210 may be defined between the first surface 212 and the second surface 214. The thickness of the first conductive layer 180 may be defined between the first surface 182 and the second surface 184. The thickness of the second conductive layer 210 may be less than about 3 μm, for example, between about 50 nm and about 2.5 μm in one embodiment, or between about 100 nm and about 2 μm in another embodiment. The second conductive layer 210 may contain any suitable conductive material having a sheet resistance between 0.5 Ω / sq and 10 Ω / sq. A suitable example is one or more metal layers, one or one or more nitrogen-containing metal layers, or both, as described above with respect to the first conductive layer 180. Alternatively, the second conductive layer 190 may be transparent or transparent to certain wavelengths of light. In some embodiments, the second conductive layer 210 may have a different material from the first conductive layer 180. Alternatively, the first conductive layer 180, the second conductive layer 190, or both may contain a nonmetallic material, such as an oxide.

[0030]

[0035] The photovoltaic device 100 may include a back support 216 configured to work in conjunction with the substrate 110 to form a housing for the photovoltaic device 100. The back support 216 may be located on the opposite side 104 of the photovoltaic device 100. For example, the back support 216 may be formed on the second conductive layer 210. The back support 216 may include any suitable material, including, for example, glass (e.g., soda-lime glass). It should be noted that the term “over” may mean that an object or the first layer is in direct or indirect contact with the surface of the second layer. Thus, the first layer “on” the second layer may be in direct contact with the surface of the second layer, or it may be in contact with one or more intervening objects or layers at a position offset from the surface of the second layer.

[0031]

[0036] Referring together to Figures 2 and 4, the fabrication of the photovoltaic device 100 generally involves the step of sequentially arranging functional layers or layer precursors in a "stack" of layers through one or more thin-film deposition processes, which are not limited to but include sputtering, spraying, evaporation, molecular beam deposition, pyrolysis, closed-space sublimation (CSS), pulsed laser deposition (PLD), chemical vapor deposition (CVD), electrochemical deposition (ECD), atomic layer deposition (ALD), or vapor transport deposition (VTD). In some embodiments, VTD may be preferred for greater throughput quality.

[0032]

[0037] The manufacturing of the photovoltaic device 100 may further involve selective removal of certain areas of a stack of layers, i.e., scribing or ablation, in order to divide the photovoltaic device 100 into a plurality of photovoltaic cells 200. For example, a continuous scribe 202 may include a first insulating scribe 222 (also known as a P1 scribe) and a second insulating scribe 224 (also known as a P3 scribe). The first insulating scribe 222 may be formed to ensure that the TCO layer 140 is electrically insulated between adjacent cells 200. Specifically, the first insulating scribe 222 may be formed through the TCO layer 140, buffer layer 150, and absorbent layer 160 of the photovoltaic device 100. The second insulating scribe 224 may be formed to divide the conductive layer 180 into individual cells 200. The second insulating scribe 224 may be formed through a second conductive layer 210. The first insulating scribe 222, the second insulating scribe 224, or both may be filled with dielectric material.

[0033]

[0038] The cell interconnect 226 may be formed to electrically connect the layers of the photovoltaic cell 200. The cell interconnect 226 may be configured to electrically connect the TCO layer 140 to the second conductive layer 210. In some embodiments, the cell interconnect 226 may be formed to pass through some or all of the semiconductor stack 176 and be electrically insulated from them. The cell interconnect 226 may be formed of a conductive material, such as the material of the second conductive layer 210, but is not limited to these.

[0034]

[0039] Referring together to Figures 1 and 2, the conductive layer interconnect 230 may be formed to electrically connect the layers of the photovoltaic cell 200. As described herein, the conductive layer interconnect 230 may be configured to electrically connect the first conductive layer 180 to the second conductive layer 210. Specifically, the conductive layer interconnect 230 may be configured to form a selective electrical contact point between the first conductive layer 180 and the second conductive layer 210, while most of the first conductive layer 180 and the second conductive layer 210 are electrically insulated by the dielectric layer 190. The conductive layer interconnect 230 may include any suitable conductive material, such as one or more metal layers, one or more nitrogen-containing metal layers, or both, as described above with respect to the first conductive layer 180. In some embodiments, the conductive layer interconnect 230 may include one or more materials different from the first conductive layer 180. For example, the conductive layer interconnection 230 may include conductive material that is not present in the first conductive layer 180.

[0035]

[0040] In some embodiments, the photovoltaic cell 200 may include a plurality of conductive layer interconnects 230, each configured to allow a desired current value to flow between a first conductive layer 180 and a second conductive layer 210. For example, the number of conductive layer interconnects 230 in each cell 200, and the desired current value flowing through each conductive layer interconnect 230, may correspond to the current 205 generated by a group 206 of continuously connected photovoltaic cells 200. Thus, the degree of conductive layer interconnects 230 can be adjusted according to the current 205 generated by the group 206 of photovoltaic cells 200.

[0036]

[0041] Referring next to Figure 4, a method 240 for forming a conductive layer interconnect 230 is schematically illustrated. Method 240 may include a process 242 for forming a first conductive layer 180 on a semiconductor stack 176. In some embodiments, the first semiconducting layer 180 may be formed by continuously depositing multiple layers of conductive material on the semiconductor stack 176. Thus, the thickness of the first semiconducting layer 180 may extend to multiple layers of conductive material.

[0037]

[0042] Method 240 may include a process 244 for forming a dielectric layer 190 on a first conductive layer 180. Optionally, the dielectric layer 190 may be formed adjacent to the first conductive layer 180. As described above, the dielectric layer 190 may be significantly thicker than the first conductive layer 180. Furthermore, the first conductive layer 180 may be excessively thin for manufacturing using certain manufacturing techniques. For example, it may be desirable to selectively remove a portion of the dielectric layer 190. Photolithographic patterning processes can be overly restrictive and unsuitable for the efficient manufacture of photovoltaic devices. For example, photolithographic processes require the use of chemicals to remove material. However, such chemicals are incompatible with many dielectric and conductive materials. Furthermore, photolithographic patterning has too low a throughput for the industrially feasible manufacture of photovoltaic devices. Similarly, certain laser patterning techniques suitable for use in manufacturing printed circuit boards (PCBs) are unsuitable for the efficient manufacture of photovoltaic devices. The above PCB manufacturing generally utilizes CO2 lasers with wavelengths between 9.1 μm and 10.6 μm, enabling the use of thick copper layers. The thickness of the copper layers typically exceeds 0.0254 mm (1 mil). The thickness and constitutive limitations of PCB laser technology make it unsuitable for the efficient manufacture of photovoltaic devices. The applicant has discovered a novel layer structure and laser processing technique that overcomes the shortcomings of photolithographic processing and PCB laser technology.

[0038]

[0043] Continuing to refer to Figure 4, method 240 may include a process 246 for heating a working region 186 of a first conductive layer 180 using a laser pulse 248. The laser pulse 248 may be selected to facilitate the selective exfoliation of a portion 196 of the dielectric layer 190 on the working region 186 of the first conductive layer 180. The laser pulse 248 may have a substantially Gaussian-shaped relative intensity 250. The relative intensity 250 may vary over the radial position 252 of the laser pulse 248. The laser pulse 248 can be characterized according to the time of the laser pulse 248. Specifically, the pulse width can define the time between the start and end of the laser pulse 248 based on the maximum half-width (FWHM) of the relative intensity 250. In some embodiments, the laser pulse 248 may have a pulse width of less than 5,000 ps, ​​for example, less than 1,000 ps in one embodiment, or between 900 fs and 100 ps in another embodiment. As described above, the wavelength of the laser pulse 248 may be selected to match the partial transmittance of the dielectric layer 190. Thus, the laser pulse 248 can pass through a portion 196 of the dielectric layer 190, particularly at its peak intensity, and be transmitted to the operating region 186 of the first conductive layer 180.

[0039]

[0044] Method 240 may include a process 254 that at least partially melts the working region 186 of the first conductive layer 180. As a result of the melting of the working region 186, the working region 186 may be transformed into a contact region 188 formed in the first conductive layer 180. In addition, as a result of the melting of the working region 186, a portion 196 of the dielectric layer 190 located on the working region 186 of the first conductive layer 180 may be peeled off to define a via 256 through the portion 196 of the dielectric layer 190. Specifically, the via 256 may be separated by a via wall 198 formed by the removal of the portion 196 of the dielectric layer 190.

[0040]

[0045] Referring collectively to FIGS. 4, 5, and 6, exemplary vias 256 and contact regions 188 are schematically illustrated. In some embodiments, the vias 256 may be formed near the contact regions 188. The vias 256 may provide a non-blocked path to at least a portion of the contact regions 188 suitable for receiving the conductive layer interconnects 230. For example, the via walls 198 of the dielectric layer 190 form a boundary and define the outer edge 260 of the contact region 188. Thus, the via walls 198 and the contact region 188 may cooperate to define an enclosure for at least partially surrounding the vias 256.

[0041]

[0046] According to the present disclosure, the shape of the contact region 188 of the first conductive layer 180 may be substantially flat and annular. In some embodiments, the flat shape of the contact region 188 can be observed by comparing the surface area of the contact region 188 with the features of the first conductive layer 180. For example, the surface area of the contact region 188 may be substantially larger than the maximum thickness of the first conductive layer 180. In some embodiments, the ratio of the surface area of the contact region 188 to the maximum thickness of the first conductive layer 180 may be at least about 750:1, such as at least about 1,000:1 in one embodiment, or at least about 1,500:1 in one embodiment. Specifically, in one embodiment, with the maximum thickness of the first conductive layer 180 being 2 μm, the surface area of the contact region 188 may be at least about 4,500 μm 2 or the like.

[0042]

[0047] Alternatively, the flat shape of the contact region 188 may be observed by measuring the interface angle θ at the outer edge 260 of the contact region 188. The interface angle θ is defined by the angle formed between the via wall 198 of the dielectric layer 190 and the contact region 188 of the first conductive layer 180, which can be observed by obtaining a cross-section. Overall, the interface angle θ is an indicator of the via wall 198 having a relatively steeper slope compared to the contact region 188. In some embodiments, the interface angle θ may be greater than about 75°, for example, between about 80° and about 135° in one embodiment.

[0043]

[0048] In embodiments provided herein, the via 256 may be formed entirely through a portion of the first conductive layer 180. For example, the inner edge 262 of the contact region 188 may demarcate the exposed region 264 of the semiconductor stack 176. In some embodiments, the inner edge 262 may be formed by the peak of the relative intensity 250 of the laser pulse 248. Thus, the inner edge 262 of the contact region 188 may be substantially circular.

[0044]

[0049] Referring together to Figures 2, 5, and 6, the dielectric layer 190 may be significantly thicker than the first conductive layer 180. The average thickness of the dielectric layer 190 and the first conductive layer 180 can be measured at the cell 200 level. For example, a cross-section of the photovoltaic device 100 can be inspected. The average thickness of the first conductive layer 180 and the dielectric layer 190 can be calculated from the cross-section. In some embodiments, the ratio of the average thickness of the dielectric layer 190 in the cell 200 to the average thickness of the first conductive layer 180 in the cell 200 may be at least 10:1, for example, greater than about 25:1 in one embodiment, greater than about 50:1 in another embodiment, or greater than about 100:1 in a further embodiment.

[0045]

[0050] Continuing to refer to Figure 4, method 240 may include a process 266 for forming a conductive layer interconnect 230. In some embodiments, process 266 may include a step of depositing a second conductive layer 210 through vias 256. For example, multiple layers of conductive material may be deposited in a continuous manner on vias 256 and a dielectric layer 190 to form the second conductive layer 210 and the conductive layer interconnect 230. Thus, the conductive layer interconnect 230 may be deposited through the dielectric layer 190 and in contact with a contact region 188 of the first conductive layer 180. In some embodiments, the conductive layer interconnect 230 can form an electrical connection 232 with the contact region 188 of the first conductive layer 180. The electrical connection 232 of the conductive layer interconnect 230 may have a shape that is complementary and coincident with the contact region 188 of the first conductive layer 180. In embodiments where the via 256 is completely formed through a portion of the first conductive layer 180, the conductive layer interconnect 230 can directly contact the semiconductor stack 176.

[0046]

[0051] Embodiments provided herein can be understood as photovoltaic cells having conductive layer interconnects formed through a dielectric layer. These conductive layer interconnects may be formed using laser processing. The laser processing described herein can be used to manufacture durable and efficient photovoltaic devices without the drawbacks and limitations of photolithography or PCB manufacturing techniques. For example, embodiments described herein can be used to manufacture photovoltaic devices having thin conductive layers and conductive layer interconnects on a semiconductor stack.

[0047]

[0052] According to embodiments provided herein, a photovoltaic cell in a photovoltaic device may include a first conductive layer, a second conductive layer, a dielectric layer, and a conductive layer interconnect. The first and second conductive layers may be located on a semiconductor stack including an absorbent layer. The first conductive layer may have an average conductive layer thickness. The dielectric layer may be located between the first and second conductive layers. The dielectric layer may have an average dielectric layer thickness. The conductive layer interconnect may extend from the second conductive layer and pass through the dielectric layer. The conductive layer interconnect may form an electrical connection with a contact region of the first conductive layer. The shape of the contact region of the first conductive region may be flat and annular. The ratio of the average dielectric layer thickness to the average conductive layer thickness may be at least 10:1.

[0048]

[0053] In another embodiment, a method for forming a photovoltaic device may include the step of forming a conductive layer on a semiconductor stack. The conductive layer may have a conductive layer thickness. A dielectric layer may be formed on the conductive layer, and the dielectric layer may have a dielectric layer thickness. The working region of the conductive layer may be heated with a laser pulse. The working region of the conductive layer may be at least partially melted. The melting may cause contact regions to form in the conductive layer and peel off a portion of the dielectric layer placed on the working region of the conductive layer, thereby defining vias that pass through a portion of the dielectric layer. The ratio of the dielectric layer thickness to the conductive layer thickness may be at least 10:1. Conductive layer interconnections may be formed by passing through vias in the dielectric layer and in contact with contact regions of the conductive layer.

[0049]

[0054] In this specification, the terms “substantially” and “about” may be used to express an inherent degree of uncertainty that can be attributed to any quantitative comparison, value, measurement, or other expression. Furthermore, these terms are used in this specification to indicate the extent to which a quantitative expression may deviate from a given reference without altering the fundamental function of the subject matter of an invention under examination.

[0050]

[0055] While specific embodiments are illustrated and described herein, it should be understood that various other modifications and alterations may be made without departing from the spirit and scope of the subject matter of the claimed invention. Furthermore, although various aspects of the subject matter of the claimed invention are described herein, such aspects do not need to be used in combination. Accordingly, the attached claims are intended to encompass all such modifications and alterations that fall within the scope of the subject matter of the claimed invention. [Modes of the Invention] [1] A photovoltaic cell of a photovoltaic device, A first conductive layer and a second conductive layer on a semiconductor stack including an absorbent layer, A dielectric layer located between the first conductive layer and the second conductive layer, and Conductive layer interconnections extending from the second conductive layer and passing through the dielectric layer. Includes, The first conductive layer has an average conductive layer thickness, The dielectric layer has an average dielectric layer thickness, The interconnection of the conductive layers forms an electrical connection with the contact region of the first conductive layer. The contact region of the first conductive layer is flat and annular in shape. The ratio of the average dielectric layer thickness to the average conductive layer thickness is at least 10:1. The above is a photovoltaic cell, a photovoltaic device. [2] The first conductive layer has the maximum thickness, The contact region of the first conductive layer has a surface area, The ratio of the maximum thickness of the first conductive layer to the surface area of ​​the contact region is at least 750:1. The photovoltaic cell described in paragraph 1. [3] The interconnections of the conductive layers are separated by via walls of the dielectric layers. The interface angle θ is defined by the contact region between the via wall of the dielectric layer and the first conductive layer 180. The interface angle θ is greater than 75°. The photovoltaic cell described in paragraph 1. [4] A photovoltaic cell as described in paragraph 1, wherein the conductive layer interconnects are in direct contact with the semiconductor stack. [5] The photovoltaic cell according to paragraph 1, wherein the semiconductor stack includes a back contact layer on an absorbent layer, and the first conductive layer is located on the back contact layer. [6] The photovoltaic cell described in paragraph 1, wherein the thickness of the first conductive layer is less than 3 μm. [7] The photovoltaic cell according to paragraph 1, wherein the first conductive layer comprises one or more metal layers, one or more nitrogen-containing metal layers, or both. [8] The photovoltaic cell according to paragraph 1, wherein the second conductive layer comprises one or more metal layers, one or more nitrogen-containing metal layers, or both. [9] The photovoltaic cell described in paragraph 1, wherein the dielectric layer has a transmittance of more than 10% for wavelengths between 300 nm and 1,100 nm.

[10] The photovoltaic cell according to paragraph 1, wherein the first conductive layer and the second conductive layer have different material compositions.

[11] Forming a conductive layer on a semiconductor stack, Forming a dielectric layer on the conductive layer, Heating the working area of ​​the conductive layer with a laser pulse, The working region of the conductive layer is melted at least partially, thereby forming a contact region in the conductive layer, and a portion of the dielectric layer placed on the working region of the conductive layer is peeled off, thereby defining vias that pass through a portion of the dielectric layer, and To form conductive layer interconnections that pass through vias in the dielectric layer and make contact with contact regions of the conductive layer. A method for forming a photovoltaic device, including, The conductive layer has a conductive layer thickness, The dielectric layer has a dielectric layer thickness, A method in which the ratio of the dielectric layer thickness to the conductive layer thickness is at least 10:1.

[12] The method according to paragraph 11, wherein the conductive layer interconnection is formed by depositing a second conductive layer on a dielectric layer.

[13] The method according to paragraph 11, wherein the dielectric layer has a transmittance of more than 10% to laser pulses.

[14] The method according to paragraph 11, wherein the laser pulse has a Gaussian-shaped relative intensity.

[15] The method according to paragraph 11, wherein the laser pulse has a pulse width of less than 5,000 ps.

[16] The method according to paragraph 11 or 12, wherein the dielectric layer has a transmittance of more than 10% to laser pulses.

[17] The method according to paragraphs 11, 12, or 16, wherein the laser pulse has a Gaussian-shaped relative intensity.

[18] The method according to any one of paragraphs 11, 12, or 16 to 17, wherein the laser pulse has a pulse width of less than 5,000 ps.

[19] The first conductive layer has the maximum thickness, The contact region of the first conductive layer has a surface area, A photovoltaic cell or method according to any one of paragraphs 1, 11, 12, or 16 to 18, wherein the ratio of the maximum thickness of the first conductive layer to the surface area of ​​the contact region is at least 750:1.

[20] The interconnections of the conductive layers are separated by via walls of the dielectric layers. The interface angle θ is defined by the contact region between the via wall of the dielectric layer and the first conductive layer 180. The interface angle θ is greater than 75°. A photovoltaic cell or method as described in any one of paragraphs 1, 11, 12, or 16 to 20. [twenty one] A photovoltaic cell or method according to any one of paragraphs 1, 11, 12, or 16 to 20, wherein the conductive layer interconnects are in direct contact with the semiconductor stack. [twenty two] The semiconductor stack includes a back contact on the absorbent layer. The first conductive layer is located on the back contact layer. A photovoltaic cell or method as described in any one of paragraphs 1, 11, 12, or 16 to 21. [twenty three] A photovoltaic cell or method according to any one of paragraphs 1, 11, 12, or 16 to 22, wherein the thickness of the first conductive layer is less than approximately 3 μm. [twenty four] A photovoltaic cell or method according to any one of paragraphs 1, 11, 12, or 16 to 22, wherein the thickness of the first conductive layer is between approximately 50 nm and approximately 2.5 μm. [twenty five] A photovoltaic cell or method according to any one of paragraphs 1, 11, 12, or 16 to 24, wherein the first conductive layer comprises one or more metal layers, one or more nitrogen-containing metal layers, or both.

[26] A photovoltaic cell or method according to any one of paragraphs 1, 11, 12, or 16 to 25, wherein the first conductive layer comprises one or more metal layers, one or more nitrogen-containing metal layers, or both.

[27] A photovoltaic cell or method according to any one of paragraphs 1, 11, 12, or 16 to 26, wherein the dielectric layer has a transmittance of more than 10% for wavelengths between 300 nm and 1,100 nm.

[28] A photovoltaic cell or method according to any one of paragraphs 1, 11, 12, or 16 to 27, wherein the first conductive layer and the second conductive layer have different material compositions.

Claims

1. A photovoltaic cell of a photovoltaic device, A first conductive layer and a second conductive layer on a semiconductor stack including an absorbent layer, A dielectric layer located between the first conductive layer and the second conductive layer, and Includes conductive layer interconnections extending from the second conductive layer and passing through the dielectric layer, The first conductive layer has an average conductive layer thickness, The dielectric layer has a first surface and a second surface, and the dielectric layer has an average dielectric layer thickness defined between the first surface and the second surface of the dielectric layer. The interconnection of the conductive layers forms an electrical connection with the contact region of the first conductive layer. The contact region of the first conductive layer has a flat and annular shape. The ratio of the average dielectric layer thickness to the average conductive layer thickness is 10:1 to 100:1, and The conductive layer interconnection is in direct contact with the semiconductor stack. The interconnections of the conductive layers are separated by via walls of the dielectric layer. The above is a photovoltaic cell, a photovoltaic device.

2. The first conductive layer has a maximum thickness, The contact region of the first conductive layer has a surface area, The maximum thickness of the first conductive layer is 2 μm, and the surface area of ​​the contact region is at least 4,500 μm². The photovoltaic cell according to claim 1.

3. The interface angle θ is defined by the via wall of the dielectric layer and the contact region of the first conductive layer. The interface angle θ is greater than 75°, The photovoltaic cell according to claim 1.

4. The photovoltaic cell according to any one of claims 1 to 3, wherein the semiconductor stack includes a back contact layer on the absorbent layer, and the first conductive layer is located on the back contact layer.

5. The photovoltaic cell according to any one of claims 1 to 4, wherein the thickness of the first conductive layer is less than 3 μm.

6. The photovoltaic cell according to any one of claims 1 to 5, wherein the first conductive layer comprises one or more metal layers, one or more nitrogen-containing metal layers, or both.

7. The photovoltaic cell according to any one of claims 1 to 6, wherein the second conductive layer comprises one or more metal layers, one or more nitrogen-containing metal layers, or both.

8. The photovoltaic cell according to any one of claims 1 to 7, wherein the dielectric layer has a transmittance of more than 10% for wavelengths between 300 nm and 1,100 nm.

9. The photovoltaic cell according to any one of claims 1 to 8, wherein the first conductive layer and the second conductive layer have different material compositions.

10. Forming a first conductive layer on a semiconductor stack including an absorbent layer, Forming a dielectric layer on the first conductive layer, Heating the working region of the first conductive layer with a laser pulse, The working region of the first conductive layer is melted at least partially, thereby forming a contact region in the first conductive layer, peeling off a portion of the dielectric layer disposed on the working region of the first conductive layer, thereby defining vias passing through a portion of the dielectric layer, and To form conductive layer interconnections that pass through the vias of the dielectric layer and contact the contact region of the first conductive layer. A method for forming a photovoltaic device, including, The first conductive layer has a conductive layer thickness, The dielectric layer has a dielectric layer thickness, The ratio of the dielectric layer thickness to the conductive layer thickness is 10:1 to 100:1, and, The conductive layer interconnection is in direct contact with the semiconductor stack. The interconnections of the conductive layers are separated by via walls of the dielectric layer. method.

11. The method according to claim 10, wherein the conductive layer interconnection is formed by depositing a second conductive layer on the dielectric layer.

12. The method according to claim 10 or 11, wherein the dielectric layer has a transmittance of more than 10% to the laser pulse having a wavelength between 300 nm and 1,100 nm.

13. The method according to any one of claims 10 to 12, wherein the laser pulse has a Gaussian-shaped relative intensity.

14. The method according to any one of claims 10 to 13, wherein the laser pulse has a pulse width of less than 5,000 ps.

15. The first conductive layer has a maximum thickness, The contact region of the first conductive layer has a surface area, The method according to any one of claims 10 to 14, wherein the maximum thickness of the first conductive layer is 2 μm, and the surface area of ​​the contact region is at least 4,500 m².

16. The interface angle θ is defined by the via wall of the dielectric layer and the contact region of the first conductive layer. The interface angle θ is greater than 75°, The method according to any one of claims 10 to 15.

17. The semiconductor stack includes a back contact layer on the absorbent layer, The first conductive layer is located on the back contact layer. The method according to any one of claims 10 to 16.

18. The method according to any one of claims 10 to 17, wherein the thickness of the first conductive layer is between 50 nm and 2.5 μm.

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