Low-temperature graphene growth

Abstract

An exemplary method of semiconductor processing can include providing a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The method can include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor in the processing region of the semiconductor processing chamber. The method can include forming a layer of graphene on a substrate positioned in the processing region of the semiconductor processing chamber. The substrate can be maintained at a temperature of about 600° C. or less. The method can include stopping the flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.

Description

Technical Field

[0005] ,

[0001] Cross - reference to related applications

[0001] This application claims the benefit and priority of U.S. Patent Application No. 17 / 142,626, titled "LOW TEMPERATURE GRAPHENE GROWTH", filed on January 6, 2021, and the entire disclosure of which is incorporated herein by reference.

[0002] Technical Field

[0002] This technology relates to systems and methods for semiconductor manufacturing. More particularly, this technology relates to semiconductor processing and apparatus for forming graphene.

Background Art

[0003] Background

[0003] Integrated circuits are enabled by processes that produce complexly patterned layers of material on a substrate surface. To manufacture patterned material on a substrate, a controlled method for forming and removing the material is required. Precursors are often supplied to a processing region and dispensed to uniformly deposit or etch material on the substrate. As device sizes continue to shrink, material uniformity can affect not only the quality of the device but also its subsequent operation. For example, as the thickness of a layer of material decreases, the coverage of the layer can be affected, and voids or gaps can occur in the coverage.

[0004]

[0004] Therefore, improved systems and methods that can be used to manufacture high - quality devices and structures are needed. These and other needs are addressed by this technology.

Summary of the Invention

[0005]

[0005] An exemplary method of semiconductor processing may include supplying a carbon-containing precursor and a hydrogen-containing precursor to a processing area of ​​a semiconductor processing chamber. The method may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing area of ​​the semiconductor processing chamber. The method may include forming a layer of graphene on a substrate positioned within the processing area of ​​the semiconductor processing chamber. The substrate can be maintained at a temperature of approximately 600°C or less. The method may include stopping the flow of the carbon-containing precursor while maintaining the plasma of the hydrogen-containing precursor.

[0006]

[0006] In some embodiments, the flow rate ratio of the hydrogen-containing precursor to the carbon-containing precursor can be maintained at about 2:1 or higher. The plasma may be a capacitively coupled plasma or may include a capacitively coupled plasma. The pressure in the processing chamber can be maintained at about 3 Torr or higher. The method may include restarting the flow of the carbon-containing precursor after a certain period of time following the cessation of the flow of the carbon-containing precursor. The method may include forming an additional graphene layer on the substrate. The substrate may be a metal or dielectric material or may include a metal or dielectric material. The plasma output can be maintained at 1000 W or less during plasma generation. The method may include etching the graphene layer formed on the substrate using the plasma emissions of the hydrogen-containing precursor after cessating the flow of the carbon-containing precursor. It may further include the following. The carbon-containing precursor may be a hydrocarbon or may contain hydrocarbons.

[0007]

[0007] Some embodiments of the present technology may encompass a method for processing semiconductors. The method may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing area of ​​a semiconductor processing chamber. The flow rate ratio of the hydrogen-containing precursor to the carbon-containing precursor can be maintained at about 2:1 or higher. The method may include forming a layer of graphene on a substrate positioned within the processing area of ​​the semiconductor processing chamber. The substrate can be maintained at a temperature of about 600°C or lower.

[0008]

[0008] In some embodiments, the processing area can be kept plasma-free while a graphene layer is formed on the substrate. The substrate is cobalt or may contain cobalt. The flow rate of the carbon-containing precursor can be kept below 100 sccm. The pressure in the processing area of ​​the semiconductor processing chamber can be kept below about 10 Torr. The carbon-containing precursor is a hydrocarbon or may contain hydrocarbons.

[0009]

[0009] Some embodiments of the present technology may encompass a method for processing semiconductors. The method may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing area of ​​a semiconductor processing chamber. The flow rate ratio of the carbon-containing precursor to the hydrogen-containing precursor can be maintained at about 1:1 or higher. The method may include forming a layer of graphene on a substrate positioned within the processing area of ​​the semiconductor processing chamber. The substrate may be maintained at a temperature of about 400°C or lower. The processing area can be kept plasma-free while forming the graphene layer on the substrate. The substrate may be cobalt or may contain cobalt. The flow rate of the carbon-containing precursor can be maintained at 1000 sccm or higher. The pressure within the processing area of ​​the semiconductor processing chamber can be maintained at about 10 Torr or higher.

[0010]

[0010] Such technologies may offer many advantages over conventional systems and techniques. For example, embodiments of this technology can produce graphene layers at low temperatures, with or without plasma enhancement. Furthermore, this method allows for thinner layers for barrier coverage. These and other embodiments, along with many of their advantages and features, will be described in more detail below in conjunction with the accompanying figures.

[0011]

[0011] A further understanding of the nature and advantages of the disclosed technology can be achieved by referring to the remainder of the specification and drawings. [Brief explanation of the drawing]

[0012] [Figure 1]

[0012] A plan view of an exemplary processing system according to several embodiments of the present technology is shown. [Figure 2]

[0013] A schematic cross-sectional view of an exemplary plasma system according to several embodiments of this technology is shown. [Figure 3]

[0014] The operation of an exemplary method for semiconductor processing according to several embodiments of this technology is shown. [Figure 4A-4D] Figures 4A and 4B show schematic cross-sectional views of semiconductor processing according to several embodiments of this technology. [Figures 5A-5D] Figures 5A and 5B show schematic cross-sectional views of semiconductor processing according to several embodiments of this technology. [Figure 6]

[0017] The operation of an exemplary method of semiconductor processing according to several embodiments of the present technology is shown. [Modes for carrying out the invention]

[0013]

[0018] Some of the figures are included as schematic diagrams. These diagrams are for illustrative purposes only and should not be considered to scale unless specifically stated. Furthermore, as schematic diagrams, they are provided to aid understanding and may not include all aspects or information compared to realistic representations, and may contain exaggerated material for illustrative purposes.

[0014]

[0019] In the attached diagrams, similar components and / or features may have the same reference label. Furthermore, various components of the same type can be distinguished by adding a letter after the reference label to differentiate them from similar components. Where only the first reference symbol is used herein, the description is applicable to any one of the similar components having the same first reference symbol, regardless of the letter.

[0015]

[0020] In semiconductor device processing, numerous materials are used to develop various structures and devices. When metallic and conductive materials are incorporated, one or more barrier layers may be formed to limit migration to surrounding materials, which could lead to short circuits and device damage. As a non-limiting example, in back-end-of-line (multilayer wiring) logic processing, conductive materials may include copper and cobalt. The electromigration barriers used with these materials may include tantalum nitride and titanium nitride, respectively. These nitrides are often formed conformally by atomic layer deposition, but due to the columnar structure of the nitrides, a certain thickness of deposition may be required to ensure complete coverage of the surrounding dielectric material. Typically, these materials require a thickness of more than 25 Å to ensure coverage.

[0016]

[0021] As device sizes continue to shrink, the thickness and size of many material layers can be reduced. Since future nodes can be characterized with similar resistivity requirements, reducing the amount of metallic or conductive material can be avoided more than other materials. However, as mentioned above, bottlenecks can arise due to limitations on the thickness of liner and barrier layers. To address this problem, many conventional techniques may have limitations on the amount of these materials that can be reduced, requiring further reductions in the gap between the dielectric and the device, which can increase crosstalk and electrical problems.

[0017]

[0022] Current technology can overcome these problems by forming a graphene liner. The growth properties of graphene can be more lateral, and it can produce coverage layers characterized by thinner thickness compared to conventional materials. However, the use of graphene in logic devices is challenged based on the high temperatures typically required to sufficiently grow graphene in dehydrogenation operations. Furthermore, growth is often limited to metals that can catalyze dehydrogenation. This technology overcomes these challenges in several ways. For example, graphene can be formed using lower temperatures by forming a less inhibited graphene layer. In addition, plasma enhancement can be used to facilitate fracture near the substrate. This favorably enables formation not only on metals but also on dielectric materials, otherwise the thermal balance of the dielectric material would not be able to support graphene growth.

[0018]

[0023] While the remaining disclosure routinely identifies specific deposition processes that utilize the disclosed technology, it will be readily apparent that the system and method are equally applicable to other deposition processes and processes that may occur in the described chambers. Therefore, this technology should not be considered limited to use in these specific deposition processes or chambers only. Before describing the processes and parameters according to embodiments of the technology, this disclosure discusses one possible system and chamber that may include components according to several embodiments of the technology.

[0019]

[0024] FIG. 1 shows a plan view of one embodiment of a processing system 100 for deposition, etching, firing, and curing chambers according to an embodiment. In the figure, a pair of front opening integrated pods 102 are received by a robot arm 104 and placed in one of the substrate processing chambers 108a - f, supplying substrates of various sizes that are placed in the low - pressure holding region 106 before being positioned in the tandem sections 109a - c. A second robot arm 110 can be used to transfer substrate wafers from the holding region 106 to the substrate processing chambers 108a - f and back. Each of the substrate processing chambers 108a - f can be equipped to perform a number of substrate processing operations, including plasma - enhanced chemical vapor deposition, atomic layer deposition, physical vapor deposition, etching, pre - cleaning, degassing, orientation, and annealing, ashing, and other substrate processing.

[0020]

[0025] The substrate processing chambers 108a - f can include one or more system components for depositing, annealing, curing, and / or etching a dielectric or other film on a substrate. In one configuration, two pairs of processing chambers, such as 108c - d and 108e - f, can be used to deposit a dielectric material on a substrate, and a third pair of processing chambers, such as 108a - b, can be used to etch the deposited dielectric. In another configuration, all three pairs of chambers, such as 108a - f, can be configured to deposit an alternating stack of dielectric films on a substrate. Any one or more of the described processes can be performed in a chamber separated from the manufacturing systems shown in different embodiments. It should be understood that additional configurations of deposition, etching, annealing, and curing chambers for dielectric films are contemplated by the system 100.

[0021]

[0026] FIG. 2 shows a schematic cross-sectional view of an exemplary plasma system 200 according to some embodiments of the present technology. The plasma system 200 can be adapted to one or more of the tandem sections 109 described above and can show a pair of processing chambers 108 that can include faceplates or other parts or assemblies according to embodiments of the present technology. The plasma system 200 generally can include a chamber body 202 having sidewalls 212, a bottom wall 216, and internal sidewalls 201 that define a pair of processing regions 220A and 220B. Each of the processing regions 220A - 220B can be similarly configured and can include the same components.

[0022]

[0027] For example, the processing region 220B can include components that may also be included in the processing region 220A and can include a pedestal 228 disposed in the processing region through a passage 222 formed in the bottom wall 216 of the plasma system 200. The pedestal 228 can provide a heater adapted to support a substrate 229 on the exposed surface of the pedestal, such as a body portion. The pedestal 228 can include a heating element 232, such as a resistive heating element, that can heat and control the substrate temperature at a desired processing temperature. The pedestal 228 can also be heated by a remote heating element, such as a lamp assembly, or any other heating device.

[0023]

[0028] The body of the pedestal 228 can be coupled to the stem 226 by a flange 233. The stem 226 can electrically couple the pedestal 228 to a power outlet or power box 203. The power box 203 may include a drive system to control the raising and moving of the pedestal 228 within the processing area 220B. The stem 226 may also include a power interface for supplying power to the pedestal 228. The power box 203 may also include interfaces for power and temperature indicators, such as a thermocouple interface. The stem 226 may include a base assembly 238 adapted to be detachably coupled to the power box 203. A circumferential ring 235 is shown above the power box 203. In some embodiments, the circumferential ring 235 may be a shoulder adapted as a mechanical stop or land configured to provide a mechanical interface between the base assembly 238 and the top surface of the power box 203.

[0024]

[0029] The rod 230 may also be included through a passage 224 formed in the bottom wall 216 of the processing area 220B, and can be used to position the substrate lift pins 261 positioned through the body of the pedestal 228. The substrate lift pins 261 selectively separate the substrate 229 from the pedestal, facilitating the replacement of the substrate 229 with a robot used to move the substrate 229 in and out of the processing area 220B through the substrate transfer port 260.

[0025]

[0030] A chamber lid 204 may be connected to the top of the chamber body 202. The lid 204 may house one or more precursor distribution systems 208 connected thereto. The precursor distribution system 208 may include a precursor inlet passage 240 that can deliver reactants and washing precursors into the processing area 220B via a gas supply assembly 218. The gas supply assembly 218 may include a gas box 248 having a blocker plate 244 positioned in the middle of a faceplate 246. A radio frequency ("RF") source 265 may be coupled to the gas supply assembly 218, which can supply power to the gas supply assembly 218 and facilitate the generation of a plasma region between the faceplate 246 of the gas supply assembly 218 and the pedestal 228, which may be the processing area of ​​the chamber. In some embodiments, the RF source may be coupled to other parts of the chamber body 202, such as the pedestal 228, to facilitate plasma generation. A dielectric isolator 258 can be placed between the lid 204 and the gas supply assembly 218 to prevent the conduction of RF power to the lid 204. A shadow ring 206 can be placed around the pedestal 228 to engage with it.

[0026]

[0031] To cool the gas box 248 during operation, an optional cooling channel 247 can be formed within the gas box 248 of the gas distribution system 208. A heat transfer fluid such as water, ethylene glycol, or gas can be circulated through the cooling channel 247 to maintain the gas box 248 at a predetermined temperature. To prevent the side walls 201, 212 from being exposed to the processing environment within the processing area 220B, a liner assembly 227 can be positioned within the processing area 220B, close to the side walls 201, 212 of the chamber body 202. The liner assembly 227 may include a circumferential pumping cavity 225 that can be coupled to a pumping system 264 configured to discharge gas and by-products from the processing area 220B and to control the pressure within the processing area 220B. Multiple exhaust ports 231 can be formed on the liner assembly 227. The exhaust ports 231 may be configured to allow gas flow from the processing area 220B to the circumferential pumping cavity 225 in a manner that facilitates processing within the system 200.

[0027]

[0032] The aforementioned chambers can be used when performing exemplary methods, including deposition or formation methods. Returning to Figure 3, the operation of exemplary method 300 for semiconductor processing according to several embodiments of the Art is shown. The Method can be performed in various processing chambers, including the aforementioned processing system 200, which may include the features or components described above. Method 300 may include several optional operations, which may or may not be specifically associated with some embodiments of the Method according to the Art. For example, many operations, while described to provide a broader scope of the Art, may be performed by alternative methods that are not critical to the Art or that are easily understood. Method 300 can describe operations schematically shown in Figures 4A-4D and Figures 5A-5D, which are illustrated in conjunction with the operation of Method 300. The figures show only partial schematics, and it should be understood that the substrate support may include any number of additional materials and features having various properties and characteristics, as shown in the figures.

[0028]

[0033] Method 300 may include additional operations before commencing the listed operations. For example, semiconductor processing may be performed before commencing Method 300 to develop a semiconductor structure to suit a particular manufacturing operation. The processing operation may be performed in the same chamber or system on which Method 300 may be performed, or the processing may be performed in a different chamber or system on the same mainframe from which Method 300 may be performed. It should be understood that Method 300 may be performed on any number of semiconductor structures or substrates 405, including an exemplary structure on which the graphene formation operation is performed, as shown in Figure 4A. Substrates on which processing may occur may be materials such as crystalline silicon, silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafers, patterned or unpatterned wafers, silicon-on-insulator, carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, sapphire, or any other substrate on which processing may be performed. The substrate can have various dimensions and shapes, such as a wafer with a diameter of 200 mm or 300 mm, or a rectangular or square panel.

[0029]

[0034] As one non-limiting example encompassed by this technique, where graphene can be deposited for logical structure, a dielectric material 410 may be formed in layer on top of the substrate 405. The dielectric material may have a low dielectric constant or other interlayer material used for processing. Features can be etched into the dielectric material 410 as shown in Figure 4B. Method 300 can then conformally form a graphene material layer 415 across the patterned dielectric material.

[0030]

[0035] As previously explained, the formation of graphene on dielectric materials can be hindered by the constraints of the dielectric material's thermal balance. However, this technology can overcome this problem by forming a localized plasma that facilitates fracture at lower substrate temperatures. Thus, several embodiments of this technology can form graphene at substrate temperatures of approximately 600°C or lower, and at substrate temperatures of approximately 580°C or lower, approximately 560°C or lower, approximately 540°C or lower, approximately 520°C or lower, approximately 500°C or lower, approximately 480°C or lower, approximately 460°C or lower, approximately 440°C or lower, approximately 420°C or lower, approximately 400°C or lower, approximately 380°C or lower, or even lower.

[0031]

[0036] After the substrate has been processed and / or positioned within the processing area, Method 300 may, in operation 305, supply one or more precursors to the substrate processing area. In some embodiments, the precursors may include carbon-containing precursors and hydrogen-containing precursors. The carbon-containing precursors may be any number of precursors containing carbon. For example, the carbon-containing precursors may be hydrocarbons containing any alkane, alkene, alkyne, or aromatic material, or may contain hydrocarbons, and non-limiting examples may include ethane, ethene, propane, propene, acetylene, or any higher hydrocarbon, or the precursors may be materials containing one or more of carbon, hydrogen, oxygen, or nitrogen. The hydrogen-containing precursors may contain any hydrogen-containing material, and in some embodiments may be diatomic hydrogen. In any of the formation operations, one or more additional precursors or carrier gases may be included, such as inert precursors containing Ar, He, Xe, Kr, nitrogen, or other precursors. In operation 310, a plasma can be generated from the precursor, and in operation 315, a layer of graphene can be formed, as shown in layer 415 in Figure 4B. Once a sufficient amount of graphene has formed, the process can be stopped. As shown in Figure 4C, a metal or conductive material 420 can be formed in the aligned trenches. The conductive material can include any metal such as copper or cobalt, or any other conductive material that can be used in semiconductor processing. Planarization can be performed to produce the final structure as shown in Figure 4D.

[0032]

[0037] The flow rate of the carbon-containing precursor can control the growth rate, but it can also affect the development of sp2 bonds associated with hydrogen uptake. For example, increasing the carbon flow rate can increase membrane growth, along with sp2, sp3, and hydrogen bonding within the membrane. Therefore, in some embodiments, the flow rate of the carbon-containing precursor can be maintained at or below approximately 2000 sccm, approximately 1500 sccm, approximately 1000 sccm, approximately 500 sccm, approximately 400 sccm, approximately 300 sccm, approximately 200 sccm, approximately 100 sccm, approximately 75 sccm, approximately 50 sccm, approximately 25 sccm, approximately 10 sccm, or lower.

[0033]

[0038] The use of additional hydrogen within the plasma precursor promotes the removal of sp3 and hydrogen bonds, characterized by weaker bond strengths. Therefore, in some embodiments, the flow rate of the hydrogen-containing precursor can be maintained at approximately 50 sccm or higher, and can be maintained at approximately 100 sccm or higher, approximately 200 sccm or higher, approximately 300 sccm or higher, approximately 400 sccm or higher, approximately 500 sccm or higher, approximately 600 sccm or higher, approximately 700 sccm or higher, approximately 800 sccm or higher, approximately 900 sccm or higher, approximately 1000 sccm or higher, or above. However, as hydrogen uptake increases, growth may eventually be completely suppressed. Therefore, by balancing the flow rate ratio of the carbon-containing precursor to the hydrogen-containing precursor, the growth of sp2-bonded carbons can be promoted while suppressing the growth of other carbons. Thus, in some embodiments, the flow rate ratio of the hydrogen-containing precursor to the carbon-containing precursor can be maintained at approximately 2:1 or higher, and can be maintained at 5:1 or higher, approximately 10:1 or higher, or above.

[0034]

[0039] In a plasma environment, as will be further explained below, controlling the balance between hydrogen and carbon can be more difficult compared to a thermal environment. Therefore, in some embodiments, Method 300 may include additional operations to facilitate the controlled growth of graphene on the substrate. For example, after sufficient growth of the graphene layer has occurred, Method 300 may include stopping the flow of the carbon-containing precursor in an optional operation 320. This may stop the growth of the film. Furthermore, the flow of the hydrogen-containing precursor can be maintained and plasma generation can be continued, thereby facilitating the etching of the formed graphene in an optional operation 325, thereby enabling the removal of sp3-bonded carbon and hydrogen bonds. After a certain time for etching to occur, e.g., about 5 minutes or less, about 4 minutes or less, about 3 minutes or less, about 2 minutes or less, about 1 minute or less, about 45 seconds or less, about 30 seconds or less, about 15 seconds or less, or less, the flow of the carbon-containing precursor can be restarted in an optional operation 330. This may allow an additional layer of graphene to be formed on the substrate. Therefore, by pulsing a carbon-containing precursor while maintaining the flow of a hydrogen-containing precursor and plasma generation, multiple layers of graphene can be formed.

[0035]

[0040] Method 300 may result in defects in the graphene layers formed in some embodiments of the Art, and therefore, in some embodiments, multiple graphene layers can be formed to achieve complete coverage. In embodiments of the Art, any number of graphene layers, including dozens or more, can be formed, but in some embodiments, the Art can produce a sufficient barrier layer with about 50 or fewer graphene layers, about 40 or fewer, about 30 or fewer, about 20 or fewer, about 10 or fewer, about 8 or fewer, about 6 or fewer, about 5 or fewer, about 4 or fewer, about 3 or fewer, or fewer than that. This can provide a barrier characterized by a layer thickness of 25 Å or less, which can be characterized by a thickness of about 20 Å or less, about 15 Å or less, about 10 Å or less, or fewer than that.

[0036]

[0041] To promote controlled growth at low flow rates and minimize additional heating due to plasma formation, in some embodiments the plasma may be a locally formed capacitively coupled plasma, as described above. The plasma power can be reduced to control the dissociation and dehydrogenation of carbon-containing precursors, and thus the plasma power can be maintained at about 1000 W or less, about 800 W or less, about 600 W or less, about 400 W or less, or below. Lower plasma power can ensure improved growth by suggesting impact-induced defect generation and increased hydrogen radical formation. Similarly, reduced plasma power during etching operations can improve etching of weaker bonded species while limiting the removal of sp2-bonded carbon. Furthermore, by utilizing capacitively coupled plasma, higher pressures can be used within the substrate processing area compared to other forms of plasma generation, such as inductively coupled plasma. Therefore, in some embodiments of this technology, the pressure within the processing area can be maintained at about 1 Torr or more, about 3 Torr or more, about 5 Torr or more, or above during plasma generation.

[0037]

[0042] By utilizing plasma generation, formation can be induced on dielectric materials such as silicon oxide or other dielectrics, as described in relation to the processing flow shown in Figures 4A to 4D. However, embodiments of this technology can also support additional processing flows, including formation on metals. For example, as shown in Figures 5A to 5D, in some embodiments, reverse patterning can be performed, which may include any of the materials or processes described above. As shown in Figure 5A, a metal or conductive material 510 can be formed on a substrate 505. The conductive material may be a metal such as copper or cobalt, or other materials that can be used in semiconductor processing. As shown in Figure 5B, the conductive material can be etched to form a barrier layer 515 around the conductive material section. The barrier layer may be graphene formed as discussed above, or may include graphene, or may include thermally grown graphene, as described below. The dielectric material 520 can be deposited around the structure as shown in Figure 5C, or it can be performed as a gap-filling operation, such as by utilizing a fluid material or other low dielectric constant material. Planarization can be performed to produce a structure as shown in Figure 5D. Therefore, embodiments of this technology can form graphene layers on many materials, including both metallic and dielectric materials.

[0038]

[0043] By utilizing a processing flow that enables the formation of a graphene layer on a metal, some embodiments of this technology can enable graphene deposition at low substrate temperatures, and this can be performed even in a plasma-free environment. Figure 6 shows the operation of an exemplary method 600 for semiconductor processing according to some embodiments of this technology. This method can be performed in various processing chambers, including the processing system 200 described above, and may include any materials, operations, or processing characteristics described above in relation to method 300 or otherwise. Method 600 can exemplify an operation for developing a graphene layer on a metal substrate, etc., without plasma enhancement. Method 600 may include supplying a carbon-containing precursor and a hydrogen-containing precursor in operation 605, and forming a graphene layer on the substrate in operation 610. The precursors may include not only any materials described above, but also the processing characteristics described above. For example, the process can be performed at a substrate temperature of about 600°C or less, as discussed above. In some embodiments, thermal growth can be performed on a metal substrate because graphene growth may be difficult at temperatures below 700°C. In some embodiments, the metal can catalyze dehydrogenation and promote graphene formation at the temperatures described in the embodiments of this technology.

[0039]

[0044] Furthermore, since this process is plasma-free, the growth of the graphene layer can be better controlled by utilizing the flow rate ratio of the hydrogen-containing precursor to the carbon-containing precursor. For example, in some embodiments, flow rate adjustment can be performed to produce low-flux or high-flux type graphene growth. For instance, graphene with fewer defects may be formed with a low-flux flow, where the flow rate ratio of the hydrogen-containing precursor to the carbon-containing precursor can be maintained at flow rates of approximately 2:1 or higher, approximately 5:1 or higher, approximately 10:1 or higher, approximately 15:1 or higher, approximately 20:1 or higher, or higher. However, as the amount of hydrogen increases, growth inhibition may increase until no film is formed. Therefore, in some embodiments, when the flow rate of the carbon-containing precursor is maintained at the lower flow rates mentioned above, including, for example, 100 sccm or less, the flow rate ratio can be maintained at approximately 30:1 or lower, approximately 25:1 or lower, approximately 20:1 or lower, or lower. Furthermore, when a lower proportion of carbon-containing precursor is used, the pressure in the processing chamber may decrease, which may further promote the formation of graphene with fewer defects. For example, the pressure can be maintained at approximately 10 Torr or less, and the pressure can be maintained at approximately 5 Torr or less, approximately 3 Torr or less, approximately 1 Torr or less, approximately 0.5 Torr or less, approximately 0.25 Torr or less, or below.

[0040]

[0045] Some embodiments of this technology can also encompass high-flux growth of graphene, which can form layered sheets of smaller size graphene in increased quantities that can accumulate along the structure to form continuous layers. The process can be pressure-independent, as the increased flow rate is used to produce less controlled sheets based on the diffusion process, and can be carried out at pressures of about 10 Torr or higher, about 50 Torr or higher, about 100 Torr or higher, about 200 Torr or higher, about 300 Torr or higher, or above. Furthermore, to limit the removal of material by the hydrogen flow, the flow rate ratio of the carbon-containing precursor to the hydrogen-containing precursor can be maintained at about 1:1 or higher, and can be maintained at flow rate ratios of 5:4 or higher, about 4:3 or higher, about 3:2 or higher, about 2:1 or higher, or above.

[0041]

[0046] To promote growth, the flow rate of the carbon-containing precursor can be maintained at approximately 500 sccm or higher, and the pressure can be maintained at approximately 750 sccm or higher, approximately 1000 sccm or higher, approximately 1250 sccm or higher, approximately 1500 sccm or higher, or above. The metal substrate or material on which growth may occur can be catalyzed to dehydrogenate the material and saturated with carbon, which can then be precipitated as a layered layer of the material. By increasing the flow rate, the saturation of the metal can be reliably exceeded, thereby further lowering the substrate temperature to, for example, below approximately 500°C, below approximately 475°C, below approximately 450°C, below approximately 425°C, below approximately 400°C, below approximately 375°C, or lower. By performing operations according to one or more embodiments of this technology, controlled growth of graphene layers can be carried out at reduced substrate temperatures. This may enable the production of thinner barrier layers on a wider range of substrates.

[0042]

[0047] The above description provides many details for illustrative purposes to provide an understanding of various embodiments of the Technology. However, it will be apparent to those skilled in the art that certain embodiments can be carried out without some of these details, or with additional details.

[0043]

[0048] While several embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative structures, and equivalents can be used without departing from the spirit of the embodiments. Furthermore, many well-known processes and elements have not been described in order to avoid unnecessarily obscuring the art of the present invention. Accordingly, the above description should not be construed as limiting the scope of the art.

[0044]

[0049] When a range of values ​​is presented, unless the context clearly indicates otherwise, it is understood that each intervening value between the upper and lower limits of that range is also specifically disclosed down to the smallest unit of the lower limit. Any narrow range between any stated or unstated intervening values ​​within the stated range, and any other stated or intervening values ​​within that stated range, are also included. The upper and lower limits of those smaller ranges can be independently included in or excluded from the range, and each range that does not contain either, neither, or both of the limits within a smaller range is also technically included, influenced by the limits that are specifically excluded within the stated range. If one or both of the limits are included in the stated range, then the ranges that exclude one or both of the included limits are also included.

[0045]

[0050] As used herein and in the appended claims, the singular forms “a,” “an,” and “the” include plural references unless otherwise specified in the context. Thus, for example, a reference to “precursor” includes a reference to multiple such precursors, and a reference to “material” includes one or more materials, as well as their equivalents known to those skilled in the art.

[0046]

[0051] Furthermore, the terms “comprise(s),” “comprising,” “contain(s),” “containing,” “include(s),” and “including,” as used herein and in the claims, are intended to identify the presence of the described features, integers, components, or steps, but not to exclude the presence or addition of one or more other features, integers, components, processes, operations, or groups.

Claims

1. The carbon-containing precursor and the hydrogen-containing precursor are supplied to the processing area of ​​the semiconductor processing chamber, The process involves generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. A graphene layer is formed on a substrate located within the processing area of ​​the semiconductor processing chamber and maintained at a temperature of approximately 600°C or lower. To stop the flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor. Includes, The pressure within the processing area of ​​the semiconductor processing chamber is maintained at approximately 10 Torr or higher. Semiconductor processing method.

2. The semiconductor processing method according to claim 1, wherein the flow rate ratio of the hydrogen-containing precursor to the carbon-containing precursor is maintained at approximately 2:1 or higher.

3. The semiconductor processing method according to claim 1, wherein the plasma includes a capacitively coupled plasma.

4. After a certain period of time following the cessation of the flow of the carbon-containing precursor, the flow of the carbon-containing precursor is restarted, and Forming an additional layer of graphene on the substrate. The semiconductor processing method according to claim 1, further comprising:

5. The semiconductor processing method according to claim 1, wherein the substrate includes a metal or dielectric material.

6. The semiconductor processing method according to claim 1, wherein the plasma power is maintained at approximately 1000 W or less during the generation of the plasma.

7. After stopping the flow of the carbon-containing precursor, the graphene layer formed on the substrate is etched using the plasma emitted from the hydrogen-containing precursor. The semiconductor processing method according to claim 1, further comprising:

8. The semiconductor processing method according to claim 1, wherein the carbon-containing precursor includes a hydrocarbon.

9. The process involves supplying a carbon-containing precursor and a hydrogen-containing precursor to the processing area of ​​a semiconductor processing chamber, wherein the flow rate ratio of the hydrogen-containing precursor to the carbon-containing precursor is maintained at approximately 2:1 or higher. The process involves forming a graphene layer on a substrate located within the processing area of ​​the semiconductor processing chamber and maintained at a temperature of approximately 600°C or lower. Includes, The pressure within the processing area of ​​the semiconductor processing chamber is maintained at approximately 10 Torr or higher. Semiconductor processing method.

10. The semiconductor processing method according to claim 9, wherein the processing region is kept plasma-free while forming the graphene layer on the substrate.

11. The semiconductor processing method according to claim 9, wherein the substrate contains cobalt.

12. The semiconductor processing method according to claim 9, wherein the flow rate of the carbon-containing precursor is maintained at approximately 100 sccm or less.

13. The semiconductor processing method according to claim 9, wherein the carbon-containing precursor comprises a hydrocarbon.

14. Supplying a carbon-containing precursor and a hydrogen-containing precursor to a processing area of ​​a semiconductor processing chamber, wherein the flow rate ratio of the carbon-containing precursor to the hydrogen-containing precursor is maintained at approximately 1:1 or higher, The process involves forming a graphene layer on a substrate located within the processing area of ​​the semiconductor processing chamber and maintained at a temperature of approximately 400°C or lower. Includes, A semiconductor processing method wherein the processing area is kept plasma-free while forming the graphene layer on the substrate.

15. Supplying a carbon-containing precursor and a hydrogen-containing precursor to a processing area of ​​a semiconductor processing chamber, wherein the flow rate ratio of the carbon-containing precursor to the hydrogen-containing precursor is maintained at approximately 1:1 or higher, The process involves forming a graphene layer on a substrate located within the processing area of ​​the semiconductor processing chamber and maintained at a temperature of approximately 400°C or lower. Includes, A semiconductor processing method wherein the substrate contains cobalt.

16. Supplying a carbon-containing precursor and a hydrogen-containing precursor to a processing area of ​​a semiconductor processing chamber, wherein the flow rate ratio of the carbon-containing precursor to the hydrogen-containing precursor is maintained at approximately 1:1 or higher, The process involves forming a graphene layer on a substrate located within the processing area of ​​the semiconductor processing chamber and maintained at a temperature of approximately 400°C or lower. Includes, A semiconductor processing method in which the flow rate of the carbon-containing precursor is maintained at approximately 1000 sccm or more.

17. The semiconductor processing method according to any one of claims 14 to 16, wherein the pressure in the processing area of ​​the semiconductor processing chamber is maintained at about 10 Torr or more.

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