Display device and control method for display device

Abstract

To improve display quality.SOLUTION: A display device comprises a display region including a plurality of pixels and displaying a video in accordance with video data from outside, and a control circuit. Each of the plurality of pixels includes a light-emitting element and a pixel circuit. The control circuit determines a gray level for a first pixel on the basis of the video data, determines whether a deterioration state of the first pixel belongs to a first deterioration mode or a second deterioration mode after the first deterioration mode on the basis of a driving history of the first pixel, determines a data signal to be supplied to the first pixel on the basis of the gray level and the driving history of the first pixel by a first method corresponding to the first deterioration mode in response to a determination result that the deterioration state of the first pixel belongs to the first deterioration mode, and determines a data signal to be supplied to the first pixel on the basis of the gray level and the driving history of the first pixel by a second method corresponding to the second deterioration mode and different from the first method in response to a determination result that the deterioration state of the first pixel belongs to the second deterioration mode.SELECTED DRAWING: Figure 12

Description

Technical Field

[0001] The present disclosure relates to a display device and a method for controlling the display device.

Background Art

[0002] Since an OLED (Organic Light-Emitting Diode) element is a current-driven self-emitting element, it does not require a backlight and has advantages such as low power consumption, a wide viewing angle, and a high contrast ratio, and is expected in the development of flat panel displays.

[0003] The OLED element deteriorates as the emission time (driving time) elapses. When the OLED element deteriorates, the same luminance cannot be obtained with the same driving current as before. Also, unless a higher driving voltage is applied, the same current as before does not flow. Thus, the OLED element causes an increase in the driving voltage and luminance degradation during driving.

[0004] As a technique for compensating for the luminance degradation of the OLED element, several external compensation techniques are known. For example, one external compensation technique uses the measurement results of the degradation of the monitor OLED element and the cumulative data of the emission of the OLED element.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0006] The characteristics of OLED elements are not uniform, and accurately monitoring and compensating for these characteristic changes is not easy. Specifically, the degradation (characteristic changes) of OLED elements can be broadly divided into two modes: the initial degradation mode that appears in the initial period after operation starts, and the steady-state degradation mode that appears in subsequent periods. The initial degradation mode exhibits more complex characteristic changes compared to the steady-state degradation mode.

[0007] Furthermore, the initial degradation mode is susceptible to manufacturing variations, and the characteristic changes exhibited by the initial degradation mode differ for each display panel. Therefore, it is not possible to uniquely determine the characteristic changes in the initial degradation mode or the transition point from the initial degradation mode to the steady-state degradation mode for different display panels.

[0008] Therefore, distinguishing between the degradation mode during the initial operating period of an OLED element and the steady-state degradation mode in the subsequent period is crucial for improving the accuracy of external compensation. This is also true for display devices that use self-emissive elements different from OLED elements. [Means for solving the problem]

[0009] The display device includes a display area that displays an image corresponding to external video data, which includes a plurality of pixels, and a control circuit that controls the plurality of pixels. Each of the plurality of pixels includes a light-emitting element and a pixel circuit. The control circuit determines the gradation of a first pixel based on the video data, determines whether the degradation state of the first pixel belongs to a first degradation mode or a second degradation mode following the first degradation mode based on the drive history of the first pixel, and in response to the determination that the degradation state of the first pixel belongs to the first degradation mode, determines a data signal to be given to the first pixel based on the gradation and the drive history of the first pixel using first correction information corresponding to the first degradation mode, and in response to the determination that the degradation state of the first pixel belongs to the second degradation mode, determines a data signal to be given to the first pixel based on the gradation and the drive history of the first pixel using second correction information that corresponds to the second degradation mode and is different from the first correction information. [Effects of the Invention]

[0010] According to one aspect of this disclosure, the display quality of a display device can be improved. [Brief explanation of the drawing]

[0011] [Figure 1] A schematic example of the configuration of an OLED display device is shown. [Figure 2A] A schematic diagram of the control wiring layout on a TFT substrate is shown. [Figure 2B] A schematic diagram shows the layout of the anode power line pattern and cathode electrode on the insulating substrate. [Figure 3A] This shows an example of the pixel circuit configuration within the normal display area. [Figure 3B] Examples of pixel circuit configurations within the first and second degradation measurement regions are shown. [Figure 4A] This example shows the relationship between the aging time of an OLED element at high temperatures and the relative brightness of the OLED element, specifically for the red subpixel. [Figure 4B] This example shows the relationship between the aging time of an OLED element at high temperatures and the relative brightness of the OLED element, specifically for the green subpixel. [Figure 4C] This example shows the relationship between the aging time of an OLED element at high temperatures and the relative brightness of the OLED element, specifically for the blue subpixel. [Figure 5A] This example shows the relationship between the aging time of the OLED element at high temperatures and the relative drive voltage of the OLED element for the red subpixel. [Figure 5B] This example shows the relationship between the aging time of the OLED element at high temperatures and the relative drive voltage of the OLED element, specifically for the green subpixel. [Figure 5C] This example shows the relationship between the aging time of the OLED element at high temperatures and the relative drive voltage of the OLED element, specifically for the blue subpixel. [Figure 6A] This example shows the relationship between the relative driving voltage of the OLED element and the relative brightness of the OLED element for the red subpixel. [Figure 6B]An example of the relationship between the relative driving voltage of an OLED element and the relative luminance of the OLED element for a green sub-pixel is shown. [Figure 6C] An example of the relationship between the relative driving voltage of an OLED element and the relative luminance of the OLED element for a blue sub-pixel is shown. [Figure 7] A flowchart of an example of an aging test procedure is shown. [Figure 8] It is a plan view showing an example of the configuration of a mother substrate to be subjected to an aging test. [Figure 9] It is a diagram for explaining a method of applying a higher driving voltage to the same data signal by applying a power supply voltage higher than the normal operation in an aging test. [Figure 10] An example of the layout of an anode power line pattern and a cathode electrode on a TFT substrate is schematically shown. [Figure 11] The logical configuration of an OLED display device is schematically shown. [Figure 12] A flowchart of an example of a normal display operation after shipment is shown. [Figure 13] An example of a measured value of a driving voltage during constant current driving in a second deterioration measurement region is shown. [Figure 14] An example of a light shielding structure is shown. [Figure 15] Another example of a light shielding structure is shown. [Figure 16] The cross-sectional structure of a substrate of a TFT substrate, a driving TFT and an OLED element, and a sealing structure portion is schematically shown. [Figure 17] It is a plan view showing an example of a light shielding pattern and a touch electrode pattern formed on a touch screen. [Figure 18] An example of the configuration of an OLED display device that maintains the first deterioration measurement region in a non-light-emitting state is shown.

Mode for Carrying Out the Invention

[0012] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be noted that this embodiment is only an example for realizing the present disclosure and does not limit the technical scope of the present disclosure.

[0013] In the following explanation, a pixel is the smallest unit in a display area, representing an element that emits light of a single color, and is sometimes called a subpixel. A set of multiple pixels of different colors, such as red, blue, and green pixels, constitutes an element that displays a single color dot, and is sometimes called a primary pixel.

[0014] In the following, a pixel may include a light-emitting element and a pixel circuit that controls the light-emitting element. For the sake of clarity, when distinguishing between elements that display a single color and elements that display a color, they will be referred to as sub-pixels and primary pixels, respectively. The features of this specification can be applied to a display device that displays in monochrome, and its display area is composed of monochrome pixels.

[0015] The characteristics of OLED elements are not uniform, and accurately monitoring and compensating for these characteristic changes is not easy. Specifically, the degradation (characteristic changes) of OLED elements can be broadly divided into two modes: the initial degradation mode that appears in the initial period after operation starts, and the steady-state degradation mode that appears in subsequent periods. The initial degradation mode exhibits more complex characteristic changes compared to the steady-state degradation mode.

[0016] Furthermore, the initial degradation mode is susceptible to manufacturing variations, and the characteristic changes exhibited by the initial degradation mode differ for each display panel. Therefore, it is difficult to uniquely determine the characteristic changes in the initial degradation mode and the transition point from the initial degradation mode to the steady-state degradation mode for different display panels.

[0017] Therefore, distinguishing between the degradation mode during the initial operating period of an OLED element and the steady-state degradation mode in the subsequent period is crucial for improving compensation accuracy. This is also true for display devices that use self-emissive elements different from OLED elements.

[0018] A display device according to one embodiment of the present invention determines whether the degradation state of a pixel is in initial degradation mode or steady-state degradation mode based on the drive history of the pixel. Depending on the determination result, the display device determines the data signal to be applied to the pixel for the gradation determined from the video data using different methods suitable for the initial degradation mode and the steady-state degradation mode, respectively. This enables appropriate light emission control of the pixel according to the degradation mode.

[0019] [Display device configuration] The following describes an example of the configuration of a display device. In the example described below, the light-emitting element of the pixel is a current-driven element, such as an OLED (Organic Light-Emitting Diode) element. Referring to Figure 1, the overall configuration of the display device according to this embodiment will be described. Note that, in order to make the explanation easier to understand, the dimensions and shapes of the illustrated objects may be exaggerated. Below, an OLED display device will be described as an example of a display device.

[0020] Figure 1 schematically shows an example of the configuration of an OLED display device 10. The OLED display device 10 is composed of a TFT (Thin Film Transistor) substrate 100 containing OLED elements (light-emitting elements) and a sealing structure 250 that encapsulates the OLED elements. The TFT substrate 100 includes an insulating substrate on which the OLED elements are formed. The insulating substrate may be a flexible substrate made of polyimide or a rigid substrate made of glass.

[0021] The pixel array region 125 of the TFT substrate 100 includes multiple OLED elements and multiple pixel circuits that control the light emission of these OLED elements. The cathode electrode formation region 114 extends outside the pixel array region 125, and a control circuit is arranged around it. The control circuit includes a scanning driver 131, an emission driver 132, an aging test circuit 133, a driver IC 134, and a demultiplexer 136. The driver IC 134 is connected to an external device via an FPC (Flexible Printed Circuit) 135.

[0022] The scanning driver 131 drives the scan lines of the TFT substrate 100 and also drives selection lines for pre-shipment aging tests and post-shipment dummy pixel degradation measurements, which will be described later. The emission driver 132 drives emission control lines to control the light emission of each pixel. The aging test circuit 133 supplies data signals for the pre-shipment aging tests, which will be described later, to the pixel array area 125. The aging test circuit 133 may include an electrostatic protection circuit (not shown).

[0023] The driver IC 134 is mounted, for example, using an anisotropic conductive film (ACF). The driver IC 134 is connected to external equipment by wiring (not shown).

[0024] The driver IC 134 drives and controls other circuits 131-133 on the board. The driver IC 134 provides power and control signals, including timing signals, to the scanning driver 131 and the emission driver 132.

[0025] The driver IC 134 generates a data signal from external video data and supplies it to the pixel array area 125 along with the power supply potential. The data signal is provided to the pixel array area 125 via the demultiplexer 136.

[0026] The driver IC 134 supplies power and data signals to the demultiplexer 136. The demultiplexer 136 sequentially outputs the output of one pin of the driver IC 134 to d data lines (where d is an integer greater than or equal to 2). The demultiplexer 136 drives d times the number of output pins of the driver IC 134 by switching the data line to which the data signal from the driver IC 134 is output d times within the scanning period.

[0027] [Wiring Layout] The following describes an example of the wiring layout of the OLED display device 10. Figure 2A schematically shows the layout of the control wiring on the TFT substrate 100. Figure 2B schematically shows the layout of the anode power line pattern and cathode electrode on the insulating substrate 202.

[0028] In the configuration example shown in Figure 2A, the pixel array region 125 includes a central normal display region 200, two second degradation measurement regions flanking the normal region, and two first degradation measurement regions (test regions) 211 flanking these regions 200 and 212. From left to right in Figure 2A, the first degradation measurement region 211, the second degradation measurement region 212, the normal display region 200, the second degradation measurement region 212, and the first degradation measurement region are arranged in that order. The pixels in the normal display region 200 are sometimes called display pixels, and the pixels in the first degradation measurement region 211 are sometimes called test pixels.

[0029] The normal display area 200 displays images corresponding to video data received from an external source. The first degradation measurement area 211 is used for pre-shipment aging tests of the OLED display device 10 and is not used for displaying images corresponding to external video data. As described later, the degradation of the first degradation measurement area 211 is accelerated by accelerated aging. The aging test measures the change in the degradation state of the OLED elements during accelerated aging and generates correction data from the measurement results. The correction data is referenced to correct the data signals supplied to the pixel circuits of the normal display area 200.

[0030] The second degradation measurement area 212 is used to measure the degradation state of pixels after shipment of the OLED display device 10 and is not used for image display. The second degradation measurement area 212 is controlled under the same conditions as the normal display area 200. Specifically, the second degradation measurement area 212 is supplied with the same power supply voltage as the normal display area 200, and the upper and lower limits of the data signal are also the same.

[0031] In the example in Figure 2A, the pixel layout of the normal display area 200 is a stripe arrangement. Specifically, the sub-pixel rows extending along the Y-axis (vertical axis) consist of sub-pixels of the same color. The sub-pixels include the OLED element and its pixel circuit. The sub-pixel rows extending along the X-axis (horizontal axis) consist of cyclically arranged red (R) sub-pixels, green (G) sub-pixels, and blue (B) sub-pixels.

[0032] Two second degradation measurement areas 212 are arranged adjacent to each other on both sides of the normal display area 200. The pixel layout is a stripe arrangement, similar to that of the normal display area 200. Figure 2A shows one dummy red subpixel row, one dummy green subpixel row, and one dummy blue subpixel row in each of the second degradation measurement areas 212. In order to improve the degradation compensation accuracy, multiple dummy subpixels of each color may be arranged within the second degradation measurement area 212.

[0033] The two first degradation measurement areas 211 are each located adjacent to the outside of the second degradation measurement area 212. The pixel layout is a stripe arrangement, similar to the normal display area 200. Figure 2A shows one dummy red subpixel row, one dummy green subpixel row, and one dummy blue subpixel row in each of the first degradation measurement areas 211. In order to improve the degradation compensation accuracy, multiple dummy subpixels of each color may be placed within the first degradation measurement area 211.

[0034] The number of pixel rows (sub-pixel rows) formed by pixels included in the first degradation measurement area and the second degradation measurement area is the same as the number of pixel rows (sub-pixel rows) in the normal display area. As another example, the number of pixel rows included in the first degradation measurement area and the second degradation measurement area may be less than the number of pixel rows in the normal display area. In that case, the number of pixels connected to the scan line 106 and the emission control line 107 will differ depending on the control line, resulting in different loads on the control lines. To prevent delays in the control signals due to these load differences from affecting the degradation measurement accuracy, consideration should be given to the output buffer capacity and the voltage level of the control signals that output the control signals.

[0035] The pixel layouts of the degradation measurement areas 211 and 212 may differ from those of the normal display area 200. The pixel layouts of the degradation measurement areas 211 and 212 and the normal display area 200 are arbitrary.

[0036] Multiple scan lines 106 extend from the scan driver 131 along the X-axis. Additionally, multiple emission control lines 107 extend from the emission driver 132 along the X-axis. Figure 2A, as an example, uses reference numerals 106 and 107 to indicate one scan line and one emission control line, respectively. In the configuration example shown in Figure 2A, scan line 106 transmits selection signals for the degradation measurement areas 211 and 212 in addition to the normal display area 200. Emission control lines 107 transmit emission control signals for the degradation measurement areas 211 and 212 in addition to the normal display area 200.

[0037] Multiple data lines 105 extend along the Y-axis and are arranged along the X-axis within the pixel array area 125. In Figure 2A, one data line is indicated by the code 105 as an example. Data line 105 is connected to the aging test circuit 133 and also to the demultiplexer 136. Data line 105 is typically located within the display area 200 and the degradation measurement areas 211 and 212, and transmits data signals to each of the connected pixel circuits.

[0038] During pre-shipment aging tests, data signals to all pixel circuits are supplied from the aging test circuit 133. After shipment, data signals are supplied from the driver IC 134 to the normal display area 200 and the second degradation measurement area 212, and data signals can be supplied to the first degradation measurement area 211 from either the driver IC 134 or the aging test circuit 134.

[0039] Although not shown in Figure 2A, wiring for measuring the degradation state of dummy pixels within degradation measurement regions 211 and 212 is laid out on the insulating substrate 202. Specifically, selection lines for selecting the dummy pixel to be measured for degradation and sense lines for measuring the voltage of the OLED element of the dummy pixel are laid out.

[0040] The selection line can be controlled, for example, by a scanning driver 131 or by a driver circuit different from the scanning driver 131 and the emission driver 132. The sense line of the first degradation measurement area 211 is connected, for example, to an aging test circuit 133, and its signal is supplied to an external device via the aging test circuit 133. The sense line of the second degradation measurement area 212 is connected, for example, to a driver IC 134 or to an aging test circuit 133, and its signal is supplied to the driver IC 134 via the aging test circuit 133.

[0041] During pre-shipment aging tests, the driver IC 134 is not mounted on the TFT board 100. Therefore, an external device separate from the TFT board 100 controls the scanning driver 131, emission driver 132, and aging test circuit 133 to perform aging tests using the first degradation measurement area 211. The dashed circles 204 and 205 indicate the cut portions of the control lines by the external device. The control lines reach the edge of the insulating board 202. As will be described later, multiple TFT boards 100 are cut from a single motherboard. The aging test is performed on the TFT boards 100 before they are cut from the motherboard.

[0042] The video data includes consecutive frames, and the OLED display device 10 displays the image corresponding to each frame. The driver IC 134 transmits control signals to the scan driver 131, the emission driver 132, and the aging test circuit 133. Based on the video data from the outside, the driver IC 134 controls the timing of the scan signal (selection pulse) from the scan driver 131 and the emission control signal from the emission driver 132.

[0043] The driver IC 134 normally supplies the data signals of the subpixels of the display area 200 to the demultiplexer 136. The driver IC 134 determines the data signals of each subpixel of the display area 200 from the gradation levels of one or more subpixels of the external video data (frame). The demultiplexer 136 sequentially outputs one output of the driver IC 134 to N data lines 105 (where N is an integer of 2 or more) within the scanning period.

[0044] The driver IC 134 further supplies the data signals of the dummy subpixels to the second degradation measurement area 212. The driver IC 134 supplies the data signals of the dummy subpixels to the second degradation measurement area 212 via the corresponding data lines 105. All dummy subpixels to which a single data line 105 transmits a data signal are selected by different scan lines 106. The driver IC 134 transmits a control signal for degradation measurement to the second degradation measurement area 212 and receives the measurement signal. For example, the driver IC 134 selects the dummy pixel circuit to be measured by a selection signal from the scan driver 131 and measures the voltage of the OLED element of the selected dummy pixel on the sense line.

[0045] After shipment, the driver IC 134 may supply the data signals of dummy subpixels to the first degradation measurement area 211. The driver IC 134 supplies the data signals of dummy subpixels to the first degradation measurement area 211 via the corresponding data lines 105. All dummy subpixels to which a single data line 105 transmits a data signal are selected by different scan lines 106. The driver IC 134 transmits a control signal for degradation measurement to the first degradation measurement area 211 and receives the measurement signal. For example, the driver IC 134 selects the dummy pixel circuit to be measured by the selection signal from the scan driver 131 and measures the voltage of the OLED element of the selected dummy pixel on the sense line. Details of the degradation measurement will be described later.

[0046] The dashed line 207 indicates the bending position of the TFT substrate 100. The insulating substrate 202 is flexible and is made of, for example, polyimide. The portion containing the driver IC 134 is bent to the back side of the insulating substrate 202 at the position of the dashed line 207. This makes it possible to reduce the overall size of the TFT substrate 100. Note that the insulating substrate 202 may be a rigid substrate.

[0047] Figure 2B schematically shows the layout of the anode power line pattern and cathode electrode on the TFT substrate 100. As shown in Figure 2B, the TFT substrate 100 includes the anode power line pattern 115. The anode power line pattern 115 supplies the anode power potential to the pixel circuits of the first degradation measurement area 211 and the second degradation measurement area 212, in addition to the normal display area 200.

[0048] The driver IC 134 outputs the anode power supply potential to the anode power supply line pattern 115 and the cathode power supply potential to the cathode electrode 114. The anode power supply line pattern 115 is mesh-like and includes a peripheral portion that defines the outline of the pattern, a plurality of X-axis portions that extend along the X-axis and are arranged along the Y-axis within the peripheral portion, and Y-axis portions that extend along the Y-axis and are arranged along the X-axis. The X-axis portions and Y-axis portions each extend from one side of the peripheral portion to the opposite side. The anode power supply line pattern 115 may have other shapes.

[0049] The cathode electrode 114 has a sheet shape and typically covers the entire display area 200, the first degradation measurement area 211, and the second degradation measurement area 212. The cathode electrodes of each subpixel in these areas are part of a single sheet-like cathode electrode 114.

[0050] The dashed circle 206 indicates the disconnection of the power supply lines for the anode and cathode power supply from the external device. The power supply lines reach the edge of the insulating substrate 202. As described above, the aging test is performed on the TFT substrate 100 before the driver IC 134 is mounted and before it is cut from the motherboard. Therefore, the anode and cathode power supply lines are supplied to the TFT substrate 100 from the external device.

[0051] [Pixel circuit configuration] Multiple pixel circuits are formed on the TFT substrate 100 to control the current supplied to the anode electrodes of multiple subpixels. Figure 3A shows an example of the configuration of a pixel circuit within the normal display area 200. Each pixel circuit includes a drive transistor T1, a selection transistor T2, an emission transistor T3, and a holding capacitor C1. The pixel circuit controls the light emission of the OLED element E1. The transistors are TFTs.

[0052] The selection transistor T2 is a switch that selects subpixels. The selection transistor T2 is a P-channel TFT, and its gate terminal is connected to scan line 106. Its source terminal is connected to data line 105. Its drain terminal is connected to the gate terminal of the drive transistor T1.

[0053] The drive transistor T1 is a drive transistor (driver TFT) for the OLED element E1. The drive transistor T1 is a P-channel TFT, and its gate terminal is connected to the drain terminal of the selection transistor T2. The source terminal of the drive transistor T1 is connected to the power line 108 that transmits the anode power supply potential VDD. The drain terminal is connected to the source terminal of the emission transistor T3. A retaining capacitance C1 is formed between the gate terminal and the source terminal of the drive transistor T1.

[0054] The emission transistor T3 is a switch that controls the supply and cessation of drive current to the OLED element E1. The emission transistor T3 is a P-channel TFT, and its gate terminal is connected to the emission control line 107. The source terminal of emission transistor T3 is connected to the drain terminal of drive transistor T1. The drain terminal of emission transistor T3 is connected to the OLED element E1. The cathode of the OLED element E1 is supplied with a cathode power supply potential VSS.

[0055] The pixel circuit includes a threshold voltage compensation circuit 103. The threshold voltage compensation circuit 103 compensates the threshold voltage of the drive transistor T1. The threshold voltage compensation circuit 103 is composed of multiple thin-film transistors. Various circuit configurations of the threshold voltage compensation circuit 103 are known, and any circuit configuration can be adopted.

[0056] Next, the operation of the pixel circuit will be explained. The scanning driver 131 outputs a selection pulse to the scanning line 106, turning on the selection transistor T2. The data voltage supplied from the driver IC 134 via the data line 105 is corrected by the threshold voltage compensation circuit 103 according to the threshold voltage of the drive transistor T1 and stored in the holding capacitor C1. The holding capacitor C1 holds the stored voltage throughout one frame period. The holding voltage causes the conductance of the drive transistor T1 to change analogously, and the drive transistor T1 supplies a forward bias current corresponding to the light emission gradation to the OLED element E1.

[0057] The emission transistor T3 is located on the drive current supply path. The emission driver 132 outputs a control signal to the emission control line 107 to control the on / off state of the emission transistor T3. When the emission transistor T3 is ON, drive current is supplied to the OLED element E1. When the emission transistor T3 is OFF, this supply is stopped. By controlling the on / off state of the emission transistor T3, the illumination period (duty cycle) within one frame period can be controlled.

[0058] Figure 3B shows an example of the configuration of the pixel circuit in the first degradation measurement area 211 and the second degradation measurement area 212. The pixel circuit shown in Figure 3B has a configuration in which a switch transistor T5 is added to the pixel circuit in the normal display area 200 shown in Figure 3A. The switch transistor T5 is a switch transistor for measuring the degradation of the OLED element E1 and connects the sense line 102 to the anode of the OLED element E1.

[0059] Specifically, one source / drain of the switch transistor T5 is connected to the node between the anode of the OLED element E1 and transistor T3, and the other source / drain is connected to the sense line 102. The gate of the switch transistor T5 is connected to the select line 104, which transmits the select signal SEL.

[0060] Transistor T5 is switched ON / OFF by the selection signal SEL, and sense line 102 transmits the degradation measurement signal SENSE. Degradation measurement of the OLED element E1 is performed, for example, by applying a predetermined data signal to the holding capacitor C1, turning on the switch transistor T5, and measuring the voltage of the OLED element E1 (degradation measurement signal SENSE) via sense line 102. Alternatively, the voltage of the OLED element E1 may be measured by supplying current from the driver IC 134 via sense line 102 during the period when transistor T3 is not ON.

[0061] As described above, the pixel circuits of the normal display area 200 and the dummy pixels in the degradation measurement areas 211 and 212 share the same portion for controlling the light emission of the OLED element E1. The dummy pixel circuits include a circuit for degradation measurement in addition to the circuit configuration of the pixel circuits in the normal display area 200. This allows for a more accurate estimation of the degradation state of the pixel circuits in the normal display area 200.

[0062] Note that the pixel circuits in Figures 3A and 3B are examples, and the pixel circuits may have other circuit configurations. Although the pixel circuits in Figures 3A and 3B use P-channel TFTs, N-channel TFTs may also be used.

[0063] [Changes in the characteristics of OLED elements] The following describes the time evolution of the degradation state of OLED elements. Figures 4A to 4C show examples of the relationship between the aging time of the OLED element at high temperatures and the relative brightness of the OLED element for the red, green, and blue subpixels, respectively. These show the time evolution of the relative brightness of OLED elements driven and controlled by the pixel circuit. In each graph, the horizontal axis represents the aging time and the vertical axis represents the relative brightness. The aging time is the time from the start of light emission of the OLED element, and the relative brightness is shown with the initial value set to 100.

[0064] Figures 4A to 4C show the change in relative brightness at 255 gradations with solid lines and the change in relative brightness at 186 gradations with dashed lines. 255 gradations represent the maximum value of the gradation and correspond to maximum brightness (100%). 186 gradations represent the intermediate value and correspond to 50% brightness. The gradation corresponds to the data signal level supplied to the pixel circuit.

[0065] As shown in Figures 4A to 4C, in all colors and gradations, the relative luminance increases from the start of emission and then decreases. The time change in relative luminance can be divided into two periods: the initial degradation period T01 from the start of operation and the subsequent steady-state degradation period. The characteristic change during the initial degradation period T01 is also called the initial degradation mode, and the characteristic change during the steady-state degradation period is also called the steady-state degradation mode.

[0066] The steady-state degradation mode is a mode that exhibits a nearly constant decrease in relative brightness, while the initial degradation mode is the mode preceding the steady-state degradation mode. The initial degradation mode exhibits a more complex change in relative brightness than the steady-state degradation mode, and in the examples shown in Figures 4A to 4C, it shows an increase in relative brightness followed by a decrease. The starting point where the relative brightness shows a constant change can be determined as the transition point between the two degradation modes.

[0067] As shown in Figures 4A to 4C, relative luminance exhibits different temporal changes for each sub-pixel color. Furthermore, relative luminance at different grayscale levels exhibits different temporal changes. For example, the length of the initial degradation period T01 differs for each color and for each grayscale level of the same color. Also, the relative luminance for 186 grayscale levels rises to a larger value during the initial degradation period T01 and shows a smaller decrease during the steady-state degradation period. Note that Figures 4A to 4C illustrate examples of the temporal changes in relative luminance; actual relative luminance changes will vary from panel to panel.

[0068] Next, we will explain the relationship between the drive voltage and aging time of the OLED element. The drive voltage of the OLED element is the voltage between the anode and cathode of the OLED element. Figures 5A to 5C show examples of the relationship between the aging time of the OLED element at high temperatures and the relative drive voltage of the OLED element for the red subpixel, green subpixel, and blue subpixel, respectively. These show the time change of the relative drive voltage of the OLED element that is driven and controlled by the pixel circuit. The measurement targets in Figures 5A to 5C are the same as those in Figures 4A to 4C.

[0069] In the graphs from Figures 5A to 5C, the horizontal axis represents aging time, and the vertical axis represents the driving voltage of the OLED element. Aging time is the time from the start of light emission of the OLED element, and the relative driving voltage is shown with the initial value set to 100. In Figures 5A to 5C, the initial degradation period is shown as follows: T01 This is shown.

[0070] As shown in Figures 5A to 5C, the steady-state degradation mode is a mode characterized by a nearly constant increase in relative drive voltage, while the initial degradation mode is the mode preceding the steady-state degradation mode. The initial degradation mode exhibits a more complex change in relative drive voltage than the steady-state degradation mode, and in the example shown in Figures 5A to 5C, it shows a high rate of increase in relative drive voltage followed by a decrease in the rate of increase. The starting point where the relative drive voltage shows a constant change can be determined as the transition point between the two degradation modes.

[0071] As shown in Figures 5A to 5C, the relative drive voltage exhibits different time variations for each sub-pixel color. Furthermore, the relative drive voltage for different gradations (gradation levels) exhibits different time variations. For example, the length of the initial degradation period T01 differs for each color and for each gradation of the same color. Also, the relative drive voltage for 255 gradations rises to a larger value during the initial degradation period T01 and shows a larger rate of increase during the steady-state degradation period. Note that Figures 5A to 5C illustrate examples of the time variation of the relative drive voltage; the actual relative drive voltage variation differs for each panel.

[0072] Furthermore, the relative drive current of the OLED element also shows a specific change with respect to the aging time. The drive current is the current flowing through the OLED element at a constant voltage. Therefore, by measuring the drive current instead of the drive voltage, it is possible to estimate the degradation of the OLED element.

[0073] Figures 6A to 6C schematically show the relationship between the relative drive voltage and relative brightness of an OLED element. In each graph of Figures 6A to 6C, the horizontal axis represents the relative drive voltage, and the vertical axis represents the relative brightness. In Figures 6A to 6C, the initial degradation period is indicated by the sign. T01 This is shown.

[0074] Figures 6A to 6C show examples of the relationship between the relative drive voltage of the OLED element and the relative brightness of the OLED element for the red, green, and blue subpixels, respectively. The data in Figure 6A is derived from the data in Figures 4A and 5A. The data in Figure 6B is derived from the data in Figures 4B and 5B. The data in Figure 6C is derived from the data in Figures 4C and 5C.

[0075] [Light emission control according to the degradation state of OLED elements] As shown in Figures 4A to 4C, the relative brightness changes as the aging time progresses. The change in relative brightness may differ for each sub-pixel color and gradation (data signal level), and may also differ for each TFT substrate 100. On a single TFT substrate 100, sub-pixels of the same color show approximately the same change in relative brightness with respect to the aging time for each gradation.

[0076] One embodiment of this specification performs degradation measurement in a first degradation measurement area 211 during the manufacturing process before product shipment. More specifically, the degradation measurement measures the relative brightness change with respect to aging time for each sub-pixel of each color at different gradations in the first degradation measurement area 211.

[0077] The designer generates correction information showing the relationship between the sub-pixel drive history (drive) and the data signal correction amount from the degradation measurement results at multiple different grayscale levels, as illustrated in Figures 4A to 4C. The designer can further determine the correction amount more appropriately by referring to the measurement results of the change in drive voltage shown in Figures 5A to 5C. The correction information is incorporated into the OLED display device 10. The OLED display device 10 normally records the drive history of the sub-pixels in the display area 200 and corrects the data signal based on that drive history and the correction information.

[0078] Two main methods for correcting data signals are described below. One method involves determining the amount of data signal correction for sub-pixels in the normal display area 200 by referring to the degradation measurement results in the second degradation measurement area 212 after shipment, along with the correction information. The other method involves determining the amount of data signal correction for sub-pixels in the normal display area 200 without referring to the degradation measurement results in the second degradation measurement area 212. The second degradation measurement area 212 can be omitted from the OLED display device 10 using this method.

[0079] First, a correction method that does not refer to the degradation measurement results in the second degradation measurement area 212 will be explained. From the measurement results in the first degradation measurement area 211, the designer can determine the relationship between the degradation state of each subpixel and the relative brightness change, and further determine the amount of data signal correction according to the relative brightness change. Data signal correction may be performed, for example, by correcting the gradation.

[0080] The degradation state is calculated from the driving history of the sub-pixels. The degradation state can be expressed, for example, by the reference tone and the driving time (operating time). As explained with reference to Figures 4A to 6C, when a sub-pixel continues to emit light at a constant tone, that constant tone is the reference tone, and the emission time is the driving time. In aging tests, a constant set tone is the reference tone, and the aging time is the driving time.

[0081] The gradation (data signal) of sub-pixels in the normal display area 200 is not constant but changes moment by moment. The degradation state can normalize the diverse and ever-changing drive history of sub-pixels. The degradation state is calculated based on the drive history of the sub-pixels. The drive history, for example, shows the time change of the gradation given to the sub-pixels.

[0082] For example, a simplified method determines the reference grayscale as the time average of the grayscale levels in the drive history. The drive time is, for example, the total time that a data signal based on the grayscale level is applied to a sub-pixel. The drive time may also be the total operating time of the device. Note that the calculation method for the reference grayscale level and drive time is not limited to these and may be determined by an appropriate method depending on the design. Furthermore, the degradation state may be represented by one or more variables that represent different feature quantities from the combination of the reference grayscale level and drive time. For example, temperature information may be added.

[0083] Correction information showing the relationship between the drive history and the data signal correction amount is incorporated into the OLED display device 10. As described above, the correction information is constructed based on the measurement results of the first degradation measurement area 211. The OLED display device 10 can use the correction information to correct the data signals of each sub-pixel of each color in the normal display area 200.

[0084] The correction information allows the system to determine the amount of correction for the data signal based on the sub-pixel drive history and the next grayscale to be displayed indicated by the video frame (target video grayscale). For example, the drive history may indicate the total past emission time for each grayscale. The OLED display device 10 calculates the degradation state from the drive history, for example, using a function included in the correction information. Furthermore, the OLED display device 10 refers to the correction information and determines the amount of data signal correction, for example, the amount of correction for the target video grayscale, based on the determined degradation state and the target video grayscale.

[0085] The OLED display device 10 stores correction information for each color. The OLED display device 10 records the drive history of each sub-pixel and can determine the amount of correction for the data signal based on the correction information from the drive history and the target image gradation.

[0086] As explained with reference to Figures 4A to 4C, the degradation state of an OLED element exhibits completely different characteristics in the initial degradation mode (initial degradation period) and the steady-state degradation mode (steady-state degradation period). Therefore, it is important for the OLED display device 10 to determine the degradation mode of each subpixel in the emission control of the normal display area 200 and to correct the data signal using a method appropriate to each degradation mode.

[0087] In one embodiment of this specification, the OLED display device 10 determines the degradation state based on the driving history of each subpixel. The subpixel is determined to be in the initial degradation period (initial degradation mode) from the start of operation after shipment until it reaches a predetermined state. When the degradation state reaches the predetermined state, the subpixel is determined to have moved to the steady-state degradation period (steady-state degradation mode).

[0088] When the degradation state is expressed in terms of reference tone and drive time, for example, a drive time threshold can be set in advance for each of the reference tone levels. When the drive time of the degradation state reaches the drive time threshold set for the reference tone time, it is determined that the sub-pixel has transitioned from the initial degradation mode to the steady-state degradation mode.

[0089] The OLED display device 10 corrects the data signals of subpixels by referring to correction information prepared for each color. The correction information includes correction information prepared for the initial degradation period and correction information prepared for the steady-state degradation period. As explained with reference to Figures 4A to 4C, the relative luminance value shows complex changes during the initial degradation period and shows a nearly constant decrease during the steady-state degradation period.

[0090] In one embodiment of this specification, the correction information for the initial degradation period is a lookup table showing the relationship between the degradation state and the correction amount. This allows for appropriate correction in response to complex relative luminance changes. The correction information for the steady-state degradation period may, for example, represent a predetermined function. This reduces the memory area required for correction. The correction information for the steady-state degradation period may include a different lookup table from the lookup table for the initial degradation period.

[0091] The OLED display device 10 determines the correction amount by referring to a lookup table during the initial degradation period. When a sub-pixel transitions to a steady-state degradation mode, the OLED display device 10 switches the light emission control of the sub-pixel from the initial degradation mode to the steady-state degradation mode. In one embodiment of this specification, the light emission control in the steady-state degradation mode controls the light emission of the sub-pixel using the state when the steady-state degradation mode was in parallel as the reference initial state. The OLED display device 10 uses the drive history only for the steady-state degradation period without referring to the drive history before the transition. For example, the correction amount is determined by a function or a lookup table that takes the drive time from the start of the steady-state degradation mode to the present, the average gradation, and the target image gradation as inputs.

[0092] As described above, if the data signal correction of the normal display area 200 does not refer to the measurement results of dummy pixels after product shipment, the second degradation measurement area 212 can be omitted. Also, if manufacturing permits, the first degradation measurement area 211 may be separated from the TFT substrate after degradation measurement of the first degradation measurement area 211.

[0093] Next, a method for controlling the light emission of the normal display area 200 will be described, referring to the degradation measurement results of the second degradation measurement area 212 after shipment, in addition to the pre-shipment degradation measurement results in the first degradation measurement area 211. This enables more appropriate light emission control of the normal display area 200. The degradation measurement measures the current-voltage characteristics of the OLED element in the second degradation measurement area 212. Details of the light emission control and degradation measurement in the second degradation measurement area 212 will be described later.

[0094] As explained with reference to Figures 5A to 5C, the relative drive voltage of the OLED element changes with aging time, exhibiting characteristic changes in both the initial degradation mode and the steady-state degradation mode. Furthermore, as explained with reference to Figures 6A to 6C, the relative brightness and relative drive voltage of each color show a specific relationship in each TFT substrate 100. Therefore, by comparing the measurement results of the drive voltage in the first degradation measurement area 211 with the measurement results of the drive voltage in the second degradation measurement area 212, degradation correction in the normal display area 200 can be performed more appropriately.

[0095] The measurement results from the second degradation measurement area 212 can be used in several ways. One example of use is to refer to the measurement results from the second degradation measurement area 212 to estimate the change from the initial degradation mode to the steady-state degradation mode of the subpixels in the normal display area 200. Another example of use is to refer to the measurement results from the second degradation measurement area 212 in calculating the data signal correction amount during the steady-state degradation period.

[0096] Another example of use is referring to the measurement results of the second degradation measurement area 212 in calculating the data signal correction amount during the initial degradation period. All or some of these methods may be applied to the OLED display device 10. Details of how to use the measurement results of the second degradation measurement area 212 will be described later.

[0097] [Pre-shipment aging test] The following describes the aging test for measuring the degradation of the first degradation measurement area 211 before shipment. Based on the degradation measurement results, reference information for degradation correction of the normal display area 200 is generated and set in the OLED display device 10.

[0098] To shorten the time required for degradation measurement, aging tests can be performed under accelerated degradation conditions. Accelerated degradation conditions can include, for example, high temperature conditions, high driving voltage for OLED elements, and high data signal levels for pixel circuits.

[0099] In one embodiment of this specification, the aging test divides the sub-pixel groups of each color in the first degradation measurement area 211 of each TFT substrate into multiple groups and provides each of the multiple groups with a different level of data signal. The different data signal levels under accelerated conditions can be associated with different gradations under normal operating conditions.

[0100] The aging test measures the brightness and drive voltage of each sub-pixel group with different data signal levels for each color. Brightness can be measured by moving a spot sensor that senses a single point of light, or by using an area sensor to measure the brightness change of each sub-pixel group. When measuring brightness with a spot sensor, the sub-pixel groups other than the loop being measured may be kept off.

[0101] The driving voltage of the OLED element is measured via the pixel circuit. As shown in Figure 3B, the pixel circuit in the first degradation measurement region 211 includes a switch transistor T5 for measuring the degradation of the OLED element E1. The switch transistor T5 is kept OFF in light emission control to advance the degradation state of the OLED element E1. While the degradation measurement of the OLED element E1 is being performed, the switch transistor T5 is kept ON.

[0102] Aging control involves writing a predetermined data signal to the pixel circuit selected by scan line 106 via data line 105, keeping switch transistor T3 ON, and causing the OLED element E1 to emit light. Degradation measurement involves selecting the pixel circuit to be measured for degradation using selection line 104 and keeping switch transistor T5 ON. For all pixel circuits other than the one being measured in the pixel circuit connected to sense line 102, an OFF selection signal SEL is applied to switch transistor T5.

[0103] Sense line 102 transmits the degradation measurement signal for each sub-pixel. The degradation measurement signal indicates the anode potential of the OLED element E1. The cathode potential is constant. Therefore, the degradation measurement signal indicates the drive voltage of the OLED element E1. Alternatively, instead of measuring the drive voltage under constant current, the drive current under low voltage may be measured.

[0104] The aging test measures the time-dependent changes in brightness and drive voltage for each different data signal level of each color. The aging test calculates the average values ​​of the luminescence brightness and drive voltage of each subpixel in each subpixel group. The changes in these average values ​​represent the changes in luminescence brightness and drive voltage for each different data signal level of each color.

[0105] The aging test is continued until all subpixels exhibit a steady-state degradation mode. From the measurement data of the aging test, the relationship between the degree of degradation and the amount of data signal correction can be determined for each subpixel of each color, in both the initial degradation mode and the steady-state degradation mode.

[0106] The aging test is performed by an external test system. Figure 7 shows a flowchart of an example of the aging test procedure. The test system writes multiple levels of data signals to the first degradation measurement area 211 under accelerated degradation conditions (lighting conditions above the normal maximum brightness) and measures the degradation state (S11).

[0107] The test system continues the aging test until the transition from the initial degradation period to the steady-state degradation period can be confirmed for all multiple levels of the data signal (S12). The test system averages the measurement results for each data signal level and accumulates data for estimating the degradation state (S13).

[0108] As described above, the measurement data shows the change in brightness and the change in current-voltage characteristics for each data signal level of each color. Therefore, it is possible to appropriately determine between the initial degradation mode and the steady-state degradation mode. Furthermore, it is possible to monitor the degradation rate for each data signal level after transitioning to the steady-state degradation mode and feed this back into the degradation prediction calculation formula for normal display operation.

[0109] Figure 8 is a plan view showing an example configuration of a motherboard 400 to be subjected to aging testing. The motherboard 400 includes multiple TFT boards 100 before the driver IC 134 is mounted. In Figure 8, as an example, one TFT board before cutting is indicated by reference numeral 100. In the configuration example shown in Figure 8, multiple pads 411 for aging testing are located at the edge of the motherboard 400 outside the TFT board area, and transmission lines 431 extend from the pads 411 to the TFT boards 100. In Figure 8, as an example, one pad and one transmission line are indicated by reference numerals 411 and 431. Some pads 411 and transmission lines 431 are also shown as examples.

[0110] A test system (not shown) applies multiple pins of a connected device to multiple pads 411, simultaneously supplying power potential and control signals to the first degradation measurement areas 211 of multiple TFT substrates 100. The transmission line 431 is connected to the corresponding transmission line in the area enclosed by the dashed circle 204 or 206 in Figures 2A and 2B.

[0111] Specifically, the control pad 411 supplies control signals to the scan driver 131, emission driver 132, and aging test circuit 133, as well as data signals to the data lines. The power supply pad 411 supplies the anode power supply potential, the cathode power supply potential, and the power supply potentials for the scan driver 131, emission driver 132, and aging test circuit 133.

[0112] After the aging test is complete, each TFT board 100 is cut out from the motherboard 400. Figure 8 shows some of the multiple cutting lines that extend in the up, down, left, and right directions, indicated by symbols. Specifically, cutting line 453 extends along the motherboard 400 in the left-right direction in Figure 8. Cutting line 454 extends along the motherboard 400 in the left-right direction in Figure 8. 8 It extends in the vertical direction.

[0113] In this way, by forming pads and transmission lines outside the TFT board area of ​​the motherboard 400 and supplying signals for aging tests to each of the TFT boards 100 through them, efficient aging tests become possible, and pads on the TFT boards become unnecessary.

[0114] Figure 9 illustrates a method for applying a higher drive voltage to the same data signal by applying a higher power supply voltage than normal operation during aging testing. For example, when performing accelerated aging testing at four times the normal display brightness in the first degradation measurement region 211, a higher data signal voltage than usual is required, as shown in Figure 9. By increasing the anode power supply potential, it is possible to emit light at four times the brightness with the normal data signal voltage.

[0115] Figure 9 shows graphs of luminescence characteristics at different anode power supply potentials. The X-axis represents the data signal voltage, and the Y-axis represents the luminescence. Line 501 is the luminance characteristic curve of the OLED element when the anode power supply potential VDD2 during aging testing is equal to the anode power supply potential VDD1 during normal operation. This characteristic matches the characteristics of the sub-pixels in the normal display area 200.

[0116] Corresponding to the white gradation level, the data signal voltage Vd0 is applied to the sub-pixels in normal operation, and the data signal voltage Vd1 is applied to the sub-pixels in the first degradation measurement area 211 during the aging test. In this example, the sub-pixels in the first degradation measurement area 211 emit light at four times the brightness of the sub-pixels in normal operation.

[0117] Line 502 is the brightness characteristic curve of the subpixels in the first degradation measurement region 211 when the anode power supply potential VDD2 of the first degradation measurement region 211 is higher than the anode power supply potential VDD1 during normal operation. By selecting a specific value for the anode power supply potential VDD2, the brightness of the subpixels in the first degradation measurement region 211 becomes 400% at the same data signal voltage Vd0 as during normal operation. In other words, the brightness of the subpixels in the first degradation measurement region 211 can be quadrupled within the same voltage range as the data signal voltage range (from minimum brightness to maximum brightness) during normal operation.

[0118] Figure 10 schematically shows an example of the layout of the anode power line pattern and cathode electrode on the TFT substrate 100. In the configuration example shown in Figure 10, the anode power wiring of the first degradation measurement area 211 is laid out independently of the anode power wiring of the normal display area 200 and the second degradation measurement area.

[0119] As a result, as explained with reference to Figure 9, a higher anode power supply potential can be supplied to the first degradation measurement region 211 than to the other regions 200 and 212. By applying a larger drive voltage than normal operation between the anode and cathode electrodes of the OLED element E1, a larger current can be supplied to the OLED element E1, thereby shortening the time required for aging testing.

[0120] In the configuration example shown in Figure 10, pads for the accelerated aging test of the first degradation measurement area 211 are provided on the insulating substrate 202. This reduces the wiring area on the motherboard, allowing for an increase in the number of TFT boards that can be panelized on the motherboard. Alternatively, as shown in Figure 8, the test pads may be located outside the TFT board area 100.

[0121] As shown in Figure 10, the TFT substrate 100 includes a first anode power line pattern 551 and a second anode power line pattern 552. The first anode power line pattern 551 provides the anode power supply potential to the pixel circuits of the normal display area 200 and the second degradation measurement area 212. The second anode power line pattern 552 provides the anode power supply potential to the pixel circuits of the first degradation measurement area 211.

[0122] The insulating substrate 202 has several aging test pads formed on it, some of which are indicated by symbols as an example. The anode power supply pad 561 is a pad for supplying a high anode power supply potential to the second anode power supply line pattern 552 from an external source. In the example in Figure 10, the second anode power supply line pattern on the scanning driver side and the second anode power supply line pattern on the emission driver side are connected via an aging test circuit. In another example, if there is sufficient space in the wiring layout of the insulating substrate 202, an anode power supply pad 561 may also be placed on the second power supply line pattern side of the emission driver side so that the second anode power supply can be input to both the scanning driver side and the emission driver side.

[0123] The cathode power supply pad 562 is a pad for supplying a cathode potential to the cathode electrode 114 from an external source. Pad 571 is a pad for supplying a control signal or power supply potential to the emission driver 132. As shown in Figure 10, multiple pads for the scanning driver 131, emission driver 132, and aging test circuit 133 are laid out.

[0124] The driver IC 134 outputs the anode power supply potential VDD1 to the first anode power supply line pattern 551, and the test system outputs the anode power supply potential VDD2 to the second anode power supply line pattern 552. The driver IC 134 and the test system output the cathode power supply potential VSS to the cathode electrode 114. The anode power supply potential VDD2 is higher than the anode power supply potential VDD1.

[0125] [Light emission control for the normal display area] The following describes the light emission control of the normal display area 200 after shipment. The following describes the light emission control that refers to the degradation measurement results of the second degradation measurement area 212 after shipment, in addition to the correction information based on the pre-shipment aging test results in the first degradation measurement area 211. The degradation measurement of the first degradation measurement area 211 after shipment may also be referred to.

[0126] Figure 11 schematically shows the logical configuration of the OLED display device 10. The grayscale signal control unit 600, data signal generation unit 621, timing signal control unit 622, signal control unit 631, and data signal output unit 632, and degradation detection unit 633 can be implemented, for example, within the driver IC 134. Each logical function unit can be realized by hardware circuitry or a combination of hardware and software. The aging test circuit 133 does not need to be used in operation after shipment. Therefore, the aging test circuit 133 is omitted in Figure 11. The aging test circuit 133 may be used for controlling the degradation measurement area or for degradation measurement.

[0127] The gradation signal control unit 600 generates a gradation signal for each sub-pixel from the video signal received from an external control device. The video signal includes consecutive frames, and a gradation signal for each sub-pixel is generated from each frame. The gradation signal indicates the gradation (gradation level) of the sub-pixel.

[0128] The data signal generation unit 621 generates data signals corresponding to the gradation signals from the gradation signal control unit 600. Data signals for displaying video frames are normally supplied to the display area 200 via the signal control unit 631 and the data signal output unit 632. The data signal generation unit 621 supplies data signals for degradation measurement to the first degradation measurement area 211 and the second degradation measurement area 212. The data signal for the first degradation measurement area 211 may be omitted.

[0129] The degradation detection unit 633 detects the current-voltage measurement value in the second degradation measurement region. When the pixel circuit configuration shown in Figure 3B is used, it detects the drive voltage of the OLED element under constant current. The degradation detection unit 633 may also detect the drive current of the OLED element under constant voltage, and may also perform measurements in the first degradation measurement region 211. The detection result of the degradation detection unit 633 is transferred to the degradation determination unit 602 via the signal control unit 631.

[0130] The timing signal control unit 622 generates and outputs timing signals from the video data to control the timing of scan signals, emission control signals, data signals, etc. The timing control signals are provided to the signal control unit 631, and further provided to the scan driver 131 and emission driver 132 via the signal control unit 631.

[0131] The gradation signal control unit 600 corrects the gradation indicated by the video data according to the degradation state of the sub-pixels and generates a corrected gradation signal for the sub-pixels of the normal display area 200. The gradation correction process is based on correction information generated based on the aging test results of the first degradation measurement area 211 and the degradation measurement results of the second degradation measurement area 212 after shipment. This enables more appropriate degradation compensation for the normal display area 200. The following mainly describes this example.

[0132] Furthermore, after shipment, degradation measurements may be performed in the second degradation measurement area 212 and the first degradation measurement area 211, and degradation compensation for the normal display area 200 may be performed based on the measurement results. In other examples, degradation compensation may be performed without performing degradation measurements in the second degradation measurement area 212 and the first degradation measurement area 211.

[0133] The gradation signal control unit 600 includes a signal processing unit 601, a degradation determination unit 602, a gradation signal generation unit 603 for the initial degradation mode, a lookup table 604 for the initial degradation mode, a gradation signal generation unit 605 for the steady-state degradation mode, a lookup table 606 for the steady-state degradation mode, and a correction information update unit 607.

[0134] The signal processing unit 601 determines the gradation of each sub-pixel in each current frame from the video signal input from the outside. The degradation determination unit 602 records the drive history of each sub-pixel and determines the degradation mode of the sub-pixel based on the drive history. The degradation determination unit 602 further generates information necessary for gradation correction. Based on the degradation measurement value in the second degradation measurement area 212 and the drive history of the sub-pixel, the degradation determination unit 602 determines whether the state of the sub-pixel is in the initial degradation mode or the steady-state degradation mode.

[0135] If a sub-pixel is in the initial degradation mode, the degradation determination unit 602 instructs the initial degradation mode gradation signal generation unit 603 to generate a gradation signal along with information on the gradation shown by the frame and the degradation state necessary to correct it. If a sub-pixel is in the steady-state degradation mode, the degradation determination unit 602 instructs the steady-state degradation mode gradation signal generation unit 605 to generate a gradation signal along with information on the gradation shown by the frame and the degradation state necessary to correct it.

[0136] The initial degradation mode tone signal generation unit 603 generates tone signals for sub-pixels in the initial degradation mode. Using the initial degradation mode lookup table 604, the initial degradation mode tone signal generation unit 603 generates tone signals indicating degradation-compensated tone based on the tone and degradation state information received from the degradation determination unit 602, as well as the measurement results in the second degradation measurement area 212.

[0137] The steady-state degradation mode tone signal generation unit 605 generates tone signals for sub-pixels in steady-state degradation mode. Using the steady-state degradation mode lookup table 606, the steady-state degradation mode tone signal generation unit 605 generates tone signals indicating degradation-compensated tone based on tone and degradation state information received from the degradation determination unit 602, as well as measurement results in the second degradation measurement area 212.

[0138] Figure 12 shows a flowchart of a typical display operation after shipment. The driver IC 134 applies a data signal of a representative gradation value under normal display conditions to the second degradation measurement area 212 to measure the degradation state (S11). The data signal generation unit 621 provides the second degradation measurement area 212 with data signals of some or all of the gradations (levels) selected from the gradations from the minimum to the maximum gradation of the data signal given to the normal display area 200. The data signals of the gradations selected in the aging test of the first degradation measurement area 211 may also be provided to the second degradation measurement area 212.

[0139] For example, the data signal generation unit 621 divides the subpixels of each second degradation measurement region 212 into multiple groups and provides a data signal of the same grayscale to the subpixels of each group. The grayscale of each subpixel is maintained constant. At least some different groups are provided with data signals of different grayscales.

[0140] In one example, the second degradation measurement areas 212 on both sides include groups to which data signals of the same tone are provided. The data signal generation unit 621 provides each sub-pixel of the second degradation measurement area 212 with a data signal of a constant tone for a period similar to the driving period (operating period) of the normal display area 200. A statistical value of the measurement results of sub-pixels of the same tone and color, for example, the average value, may be used as the measured value of the sub-pixel of that tone and color.

[0141] The data signal generation unit 621 may also supply a data signal to the first degradation measurement area 211. For example, the data signal generation unit 621 supplies each sub-pixel with the same gradation data signal as the aging test for the first degradation measurement area 211. The data signal generation unit 621 or the signal processing unit 601 may perform corrections to the OLED display device 10 according to its characteristics, separately from the gradation signal generation unit 603 for the initial degradation mode and the gradation signal generation unit 605 for the steady-state degradation mode.

[0142] The degradation detection unit 633 transmits the measurement results of the current-voltage characteristics of each sub-pixel in the second degradation measurement area 212 to the degradation determination unit 602. Here, the drive voltage in constant current driving of the OLED element is measured. As shown in Figures 3A and 3B, the application of data signals to the second degradation measurement area 212 is controlled by scan lines 106 and emission control lines 107, which are common to the normal display area 200. The degradation detection unit 633 detects the drive voltage of the sub-pixel selected by the selection line 104. The measured values ​​are transmitted to the degradation determination unit 602, for example, frame by frame.

[0143] The degradation determination unit 602 normally records the drive history of the display area 200 and also records the measurement results of the second degradation measurement area 212. If degradation is also measured in the first degradation measurement area 211, the measurement results are also recorded.

[0144] Next, the degradation determination unit 602 determines the degradation mode of each sub-pixel in the normal display area 200 (S12). The determination may be performed, for example, every frame or every predetermined number of frames. In one embodiment of this specification, the degradation determination unit 602 determines the degradation mode of the sub-pixel based on the sub-pixel's past driving history and the measurement results of the second degradation measurement area 212.

[0145] For example, the degradation determination unit 602 determines the reference tone of a sub-pixel from the sub-pixel's driving history. As described above, the reference tone is calculated from the total time of each tone in the driving history, and may be, for example, the time average of the tones. The reference tone is information about the degradation state of the sub-pixel. The degradation determination unit 602 determines the driving voltage of the reference tone of the target sub-pixel's color from the measurement results of the second degradation measurement area 212. If there are no sub-pixels that are actually emitting light at the reference tone, it can be estimated using an interpolation function from the measured values ​​of other tones.

[0146] The degradation determination unit 602 holds, for example, determination reference information for each color gradation, which is obtained from the aging test in the first degradation measurement area 211 and shows the relationship between the relative drive voltage and the degradation mode. For example, information showing the change in relative drive voltage and the transition point of the degradation mode is held, as shown in Figures 5A to 5C. If the relative drive voltage increases monotonically with driving time, the relative drive voltage for each reference gradation may be held as information showing the transition point.

[0147] The degradation determination unit 602 determines whether the degradation mode of the target sub-pixel has transitioned to a steady-state degradation mode based on the history of the relative drive voltage of the color and reference tone of the target sub-pixel in the second degradation measurement area 212, and the relationship between the relative drive voltage of the color and reference tone and the degradation mode indicated by the reference information for determination. The reference value of the relative drive voltage in the second degradation measurement area 212 may be, for example, the value set at the time of shipment or the first measurement taken after shipment.

[0148] If the degradation mode of a sub-pixel remains in the initial degradation mode (S12: YES), the initial degradation mode gradation signal generation unit 603 corrects the gradation according to instructions from the degradation determination unit 602 (S13). The initial degradation mode gradation signal generation unit 603 obtains the color and gradation based on the video frame, as well as information for correcting the gradation, from the degradation determination unit 602. For example, the information for correction indicates the relative drive voltage of the color and reference gradation in the second degradation measurement area 212.

[0149] The initial degradation mode gradation signal generation unit 603 uses the initial degradation mode lookup table 604 to determine the correction amount for the current gradation from the sub-pixel color and reference gradation, as well as the current gradation obtained from the video frame. The initial degradation mode lookup table 604 can, for example, show the correction amount for inputs of color, reference gradation, relative drive voltage, and current gradation.

[0150] Furthermore, the gradation signal generation unit 603 for the initial degradation mode may determine the correction amount in the initial degradation mode (initial degradation period) without using the measurement results of the second degradation measurement area 212, as described above. Alternatively, the correction in the initial degradation mode may be kept at zero.

[0151] If the degradation mode of a sub-pixel has transitioned to the steady-state degradation mode (S12:NO), the steady-state degradation mode gradation signal generation unit 605 corrects the gradation according to instructions from the degradation determination unit 602 (S14). The steady-state degradation mode gradation signal generation unit 605 obtains the color and gradation based on the video frame, as well as information for correcting the gradation, from the degradation determination unit 602. For example, the information for correction includes the reference gradation and driving time since the target sub-pixel transitioned to the steady-state degradation mode. The driving time and reference gradation since transitioning to the steady-state degradation mode are information about the degradation state. By using the state at the start of the steady-state degradation mode as the initial state and correcting the gradation based on that initial state, correction more suitable for the steady-state degradation mode becomes possible. Note that a state after the start of the steady-state degradation mode may be used as the initial state, and the reference gradation information may be omitted.

[0152] The steady-state degradation mode gradation signal generation unit 605 uses the steady-state degradation mode lookup table 606 to correct the current gradation based on the drive time since transitioning to the steady-state degradation mode and the reference gradation. The steady-state degradation mode lookup table 606 can, for example, indicate the color, the reference gradation, the drive time since transitioning to the steady-state degradation state, and the amount of correction for the current gradation input.

[0153] The correction information update unit 607 updates the lookup table 606 for steady-state degradation mode based on the measurement results of the second degradation measurement area. The update frequency may be, for example, every predetermined operating period of the normal display area 200. The correction information update unit 607 obtains the measurement history of the second degradation measurement area from the degradation determination unit 602. The measurement history of the second degradation measurement area is, for example, the change in the relative drive voltage of each of the multiple grayscale levels with respect to the drive time after transitioning to steady-state degradation mode. The multiple grayscale levels are, for example, the grayscale levels actually used for driving in the second degradation measurement area 212.

[0154] Figure 13 shows an example of drive voltage measurements during constant current drive in the second degradation measurement region 212. Figure 13 shows data for 15, 63, and 256 levels. In Figure 13, the dashed line shows the predicted value based on the aging test results. Φ shows the measured value in the second degradation measurement region 212. The solid line shows the result of correcting the predicted value with the measured value. The reference for the relative drive voltage is the value at the start of the steady-state degradation mode.

[0155] As shown in Figure 13, the correction information update unit 607 corrects the predicted time change of the relative drive voltage in the steady-state degradation mode based on the aging test in the first degradation measurement area 211, based on the measurement results in the second degradation measurement area 212, and further updates the lookup table 606 for the steady-state degradation mode according to the correction result. As a result, the gradation in the steady-state degradation mode is determined based on the measurement results in the second degradation measurement area 212. Since the correction is performed based on the state of the sub-pixels that have deteriorated, the deterioration can be compensated more accurately.

[0156] In the above example, the lookup table 606 for steady-state degradation mode is updated based on the measurement results in the second degradation measurement area 212. In other examples, the post-shipment measurement results from the first degradation measurement area 211 may also be used. Information on sub-pixels with advanced degradation can be obtained.

[0157] Another example is to perform correction using the drive voltage at the start of the steady-state degradation mode as a reference, similar to the correction method used in the initial degradation state. Alternatively, correction may be performed in the initial degradation mode without referring to the measurement results in the second degradation measurement area 212, and then referencing the measurement results in the second degradation measurement area 212 in the steady-state degradation mode.

[0158] [Light blocking structure] The following describes the structure for blocking light from the second degradation measurement area 212. As described above, after shipment, the OLED display device 10 illuminates the second degradation measurement area 212 together with the normal display area 200. Since the normal display area 200 displays images corresponding to video data, a shielding structure that blocks light from the second degradation measurement area 212 is incorporated into the OLED display device 10 to reduce the impact on the image display. If the first degradation measurement area 211 also illuminates at the same time as the normal display area 200, the light from the first degradation measurement area 211 is also blocked along with the second degradation measurement area 212.

[0159] Figure 14 shows an example of a light-shielding structure. The example structure shown in Figure 14 includes a light-shielding film 721 within a metal layer on the substrate of the touchscreen 333. In addition to the light-shielding film 721, the metal layer includes electrodes or wiring for detecting touches on the touchscreen 333. This efficient structure prevents light from the second degradation measurement area 212 from being visible to an observer on the front of the panel.

[0160] Figure 14 schematically shows an insulating substrate 202 of the TFT substrate 100 and an OLED element 300 on the insulating substrate as an example. The touchscreen 333 is positioned in front of the TFT substrate 100 (on the viewer's side of the image) and can be included, for example, in the sealing structure 250 shown in Figure 1.

[0161] The light-shielding film 721 is a metal film that does not transmit light. In the example configuration shown in Figure 14, the light-shielding film 721 covers the first degradation measurement area 211 in addition to the second degradation measurement area 212, as viewed from the viewing side. If the first degradation measurement area 211 does not emit light after shipment, the portion of the light-shielding film 721 in front of the first degradation measurement area 211 may be omitted.

[0162] Figure 15 shows another example of a light-shielding structure. In the example structure shown in Figure 15, the metal housing 820 shields the light from the second degradation measurement area 212. This efficient structure prevents the light from the second degradation measurement area 212 from being visible to the viewer on the front of the panel.

[0163] The metal housing 720 houses the TFT substrate 100 and includes a frame-shaped bezel portion 822 that surrounds the front of the TFT substrate 100 on the side where the image is visible (front side). The metal housing 820 has an opening 713 on the inside of the bezel portion 822 on its front side. The normal display area 200 is visible through the opening 713. The second degradation measurement area 212 is covered by the bezel portion 822.

[0164] In the example configuration shown in Figure 15, the frame portion 822, when viewed from the viewing side, covers the first degradation measurement area 211 in addition to the second degradation measurement area 212. If the first degradation measurement area 211 does not emit light after shipment, the first degradation measurement area 211 may be exposed from the metal housing 820.

[0165] The second degradation measurement area 212 and the first degradation measurement area 211 may be covered by other light-shielding structures, such as a light-shielding film in a black resin layer on a TFT substrate 100 or a color filter substrate (not shown). The housing may be formed of other light-shielding materials, such as resin. As described above, the light-shielding film 721 and a portion of the metal housing 820 are light-shielding parts.

[0166] Figure 16 schematically shows the cross-sectional structure of the TFT substrate 100, the driving TFT and OLED element, and the sealing structure 250. The insulating substrate is, for example, a flexible substrate, or it may be a rigid substrate. In the following description, "up" and "down" refer to the top and bottom in the drawing. Note that the sealing structure 250 may use a sealing substrate.

[0167] The OLED display device includes a TFT substrate 100 and a sealing structure 250. The TFT substrate 100 includes a substrate 202 and a pixel circuit (TFT array) and OLED elements configured on the substrate 202. The pixel circuit and OLED elements are located between the substrate 202 and the sealing structure 250.

[0168] The substrate 202 is a flexible substrate composed of multiple layers, including an organic layer, such as a polyimide layer, and an inorganic layer, such as a silicon oxide layer or a silicon nitride layer. A pixel circuit (TFT array) and an OLED element are formed on the substrate 202. The OLED element includes a lower electrode (e.g., an anode electrode 308), an upper electrode (e.g., a cathode electrode 302), and an organic light-emitting multilayer film 304. The organic light-emitting multilayer film 304 is positioned between the cathode electrode 302 and the anode electrode 308. Multiple anode electrodes 308 are arranged on the same plane (e.g., on a planarization film 321), with one organic light-emitting multilayer film 304 positioned on one anode electrode 308. In the example in Figure 16, the cathode electrode 302 of one subpixel is part of a continuous conductive film.

[0169] Figure 16 shows an example of a top-emission type (OLED element) pixel structure. In a top-emission type pixel structure, a common cathode electrode 302 is placed on the side from which light is emitted (the upper side of the drawing and the viewing side). The cathode electrode 302 has a shape that covers the entire surface of the pixel array region 125. In a top-emission type pixel structure, the anode electrode 308 reflects light, and the cathode electrode 302 is light-transmitting. This configuration allows light from the organic light-emitting multilayer film 304 to be emitted towards the sealing structure 250.

[0170] In the top-emission type, compared to the bottom-emission type where light is extracted to the substrate 202 side, there is no need to provide a transparent region for light extraction within the pixel region. Therefore, the light-emitting part can be formed on top of the pixel circuit and wiring, offering a high degree of freedom in the layout of the pixel circuit.

[0171] The bottom-emission type pixel structure has a transparent anode electrode and a reflective cathode electrode, and emits light to the outside (viewing side) through the substrate. Furthermore, a transparent display device can be realized by forming both the anode electrode and the cathode electrode from a light-transmitting material. The flexible substrate structure of this disclosure can be applied to any type of OLED display device, and furthermore, to display devices containing light-emitting elements other than OLEDs.

[0172] Subpixels in a full-color OLED display generally display one of the following colors: red, green, or blue. A single main pixel is composed of red, green, and blue subpixels. A pixel circuit containing multiple thin-film transistors controls the light emission of the corresponding OLED element. An OLED element consists of an anode electrode (the lower electrode), an organic light-emitting layer, and a cathode electrode (the upper electrode).

[0173] An OLED display device has multiple pixel circuits (TFT arrays), each containing multiple switches. Each of the multiple pixel circuits is formed between the substrate 202 and the anode electrode 308 and controls the current supplied to each of the multiple anode electrodes 308. The driving TFT shown in Figure 16 has a top gate structure. Other TFTs also have a top gate structure.

[0174] A polysilicon layer is present on the substrate 202. The polysilicon layer contains channels 315 that provide the transistor characteristics of the TFT, and later the gate electrode. 314 It is located at the position where it is formed. At both ends of it are source / drain regions 316 and 317 doped with high-concentration impurities to electrically connect with the upper wiring layer.

[0175] In some cases, a lightly doped drain (LDD) containing low concentrations of impurities may be formed between the channel 315 and the source / drain regions 316 and 317. Note that the LDD is omitted from the diagram for simplicity. A gate electrode 314 is formed on the polysilicon layer via a gate insulating film 323. An interlayer insulating film 322 is formed on the layer of the gate electrode 314.

[0176] Within the pixel array region 125, source / drain electrodes 310 and 312 are formed on the interlayer insulating film 322. The source / drain electrodes 310 and 312 are connected to the source / drain regions 316 and 317 of the polysilicon layer via contact holes 311 and 313 formed in the interlayer insulating film 322 and the gate insulating film 323.

[0177] An insulating organic planarization film 321 is formed on the source / drain electrodes 310 and 312. An anode electrode 308 is formed on the planarization film 321. The anode electrode 308 is connected to the source / drain electrodes 312 via a contact hole 309 in the planarization film 321. The TFT of the pixel circuit is formed on the underside of the anode electrode 308.

[0178] The anode electrode 308 is composed of, for example, a central reflective metal layer and transparent conductive layers sandwiching the reflective metal layer. An insulating pixel defining layer (PDL) 307 is formed on the anode electrode 308 to isolate the OLED elements. The OLED elements are formed in the aperture 306 of the pixel defining layer 307.

[0179] An organic light-emitting multilayer film 304 is formed on the anode electrode 308. The organic light-emitting multilayer film 304 adheres to the pixel definition layer 307 at the aperture 306 of the pixel definition layer 307 and its surroundings. For each of the RGB colors, an organic light-emitting material is deposited to form the organic light-emitting multilayer film 304 on the anode electrode 308.

[0180] The organic light-emitting multilayer film 304 is deposited by using a metal mask to deposit the organic light-emitting material at the positions corresponding to the pixels. The organic light-emitting multilayer film 304 is composed of, for example, a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer from the bottom layer upwards. The stacked structure of the organic light-emitting multilayer film 304 is determined by design.

[0181] A cathode electrode 302 is formed on an organic light-emitting multilayer film 304. The cathode electrode 302 is a light-transmitting electrode. The cathode electrode 302 transmits a portion of the visible light from the organic light-emitting multilayer film 304. The cathode electrode 302 layer is formed, for example, by depositing a metal such as Al or Mg, or an alloy containing these metals. If the resistance of the cathode electrode 302 is high and the uniformity of the luminescence brightness is impaired, an auxiliary electrode layer is added using a transparent electrode-forming material such as ITO or IZO.

[0182] A laminated film consisting of an anode electrode 308, an organic light-emitting multilayer film 304, and a cathode electrode 302, formed in the aperture 306 of the pixel definition layer 307, constitutes an OLED element. A sealing structure 250 is formed in direct contact with the cathode electrode 302. Sealing structure (thin film sealing part) 2 5 Layer 0 includes, from the bottom up, an inorganic insulating layer 301, an organic planarization film 331, and an inorganic insulating layer 332. The inorganic insulating layers 301 and 332 are lower and upper passivation layers, respectively, for improved reliability.

[0183] On the sealing structure 250, a touchscreen 333, a λ / 4 plate 334, a polarizing plate 335, and a resin cover lens 336 are laminated from the bottom layer. The λ / 4 plate 334 and the polarizing plate 335 suppress the reflection of light incident from the outside. Note that the laminated structure of the OLED display device described with reference to Figure 16 is just one example, and some of the layers shown in Figure 16 may be omitted, or layers not shown in Figure 16 may be added. Instead of laminating the touchscreen onto the TFT substrate 100 as described above, a touchscreen manufactured in a separate process from the TFT substrate 100 may be aligned and bonded to the TFT substrate 100.

[0184] Figure 17 is a plan view showing an example of a light-shielding pattern and a touch electrode pattern formed on a touchscreen 333. As an example, Figure 17 shows a projected capacitive electrode pattern. The touchscreen 333 includes an X-touch electrode 771 extending along the X-axis and aligned along the Y-axis, and a Y-touch electrode 781 extending along the Y-axis and aligned along the X-axis. In Figure 17, one X-touch electrode and one Y-touch electrode are shown as reference numerals 771 and 781, respectively, as an example.

[0185] The X-touch electrode 771 consists of electrode pieces 751 arranged along the X-axis of a rhombus or triangle, and rectangular connecting portions 753 that are thinner than the electrode pieces 751 and connect the corners of adjacent electrode pieces 751. The electrode pieces 751 and the connecting portions 753 are made of a transparent conductor, such as ITO. The X-touch electrode 771 is made of a continuous transparent conductor, and the electrode pieces 751 and the connecting portions 753 are contained in the same layer.

[0186] The Y-touch electrode 781 consists of electrode pieces 761 arranged along the Y-axis of a rhombus or triangle, and rectangular connecting portions 763 that are thinner than 761 and connect the corners of adjacent electrode pieces 761. The electrode pieces 761 are made of a transparent conductor, such as ITO or IZO. In the example in Figure 17, the electrode pieces 761 are included in the same layer as the X-touch electrode 771. The connecting portions 763 are formed on a higher layer than the electrode pieces 761 and are made of a light-shielding conductor (metal). The connecting portions 763 can be made of, for example, Al or Mo.

[0187] The electrode pieces 751 of the X-touch electrode 771 and 761 of the Y-touch electrode 781 are arranged in a matrix. The driver IC 134 or a detection circuit (not shown) detects the change in capacitance between the X-touch electrode 771 and the Y-touch electrode 781 caused by an indicator such as a finger or stylus brought close to the touchscreen 333 via the wirings 773 and 783. This identifies the touch position.

[0188] The connecting portion 763 of the Y-touch electrode is positioned to intersect with the connecting portion 753 of the X-touch electrode 771 in a plan view. An insulating layer (not shown) is formed between the layer of the connecting portion 763 and the layer of the X-touch electrode 771. The connecting portion 763 and the connecting portion 753 intersect via an insulating film, and electrical insulation is maintained.

[0189] The touchscreen 333 further includes a light-shielding film pattern consisting of multiple light-shielding films 721. The light-shielding films 721 are located outside the touch detection area where the touch electrodes 771 and 781 are positioned. As described above, the light-shielding films 721 are made of a light-shielding material, and in the example in Figure 17, they are formed in the same layer as the Y-touch electrode connector 763, i.e., made of a light-shielding metal. By forming the light-shielding films 721 in the same layer as the light-shielding elements of the touchscreen 333 in this way, the manufacturing of the display device can be made more efficient. The use of multiple light-shielding films 721 reduces the size of each individual light-shielding film, thereby reducing undesirable effects on touch detection.

[0190] In the configuration example shown in Figure 17, at least one row of light-shielding films is arranged on both the left and right sides of the touch detection area. The number of rows and the number of light-shielding films constituting each row are arbitrary. As explained in Figure 14, the light-shielding films 721 cover the dummy subpixels and are aligned to prevent light from the dummy pixels from leaking to the observer side. The pattern of the light-shielding films 721 is arbitrary; for example, the pattern shapes (number and shape of light-shielding films 721) on both sides of the touch detection area may be different. Furthermore, the number and shape of light-shielding films corresponding to the first degradation measurement area may be different from the number and shape of light-shielding films corresponding to the second degradation measurement area.

[0191] The light-shielding film 721 may be formed in the same layer as other light-shielding elements different from the touch electrodes included in the touchscreen 333, or it may be formed in a different layer from the touchscreen 333. The type of touchscreen 333 is arbitrary, and the touchscreen 333 may be omitted.

[0192] [Control of the first degradation measurement area after shipment] The following describes the control of the first degradation measurement area 211 by the OLED display device 10 after shipment. In the configuration example of the OLED display device 10 described below, the first degradation measurement area 211 is kept in a non-emitting state during operation. After shipment, degradation measurement of the first degradation measurement area 211 is not performed.

[0193] Figure 18 shows an example configuration of an OLED display device 10 that maintains the first degradation measurement area 211 in a non-emitting state. The aging test circuit 133 includes a data selection circuit 851. After shipment, the data selection circuit 851 supplies data signals to all data lines of the first degradation measurement area 211 that are less than or equal to the absolute value of the data signal of grayscale 0 in the normal display area 200. As a result, all dummy pixels in the first degradation measurement area 211 are maintained in a non-emitting state. This eliminates the need for a light-shielding structure for the first degradation measurement area 211.

[0194] While embodiments of the present disclosure have been described above, the present disclosure is not limited to the embodiments described above. Those skilled in the art can easily modify, add to, and transform each element of the above embodiments within the scope of the present disclosure. It is possible to replace parts of the configuration of one embodiment with the configuration of another embodiment, and to add the configuration of another embodiment to the configuration of one embodiment. [Explanation of Symbols]

[0195] 10 OLED display device 131 Scanning Driver 132 Emission Driver 133 Aging Test Circuit 134 Driver ICs 200 Normal display area 211 1st deterioration measurement area 212 2nd deterioration measurement area 400 Motherboards 551 First Anode Power Line Pattern 552 Second Anode Power Line Pattern 601 Signal Processing Unit 602 Deterioration judgment section 603 Initial Degradation Mode Grayscale Signal Generation Unit 604 Lookup table for initial degradation mode 605 Grade signal generation unit for steady-state degradation mode 606 Look-up table for steady-state degradation mode 607 Correction information update section 721 Light-shielding film 820 Metal casing 851 Data Selection Circuit

Claims

1. A display device, A display area containing multiple pixels that displays video in accordance with external video data, A control circuit for controlling the plurality of pixels, A degradation measurement area is located outside the aforementioned display area and includes a plurality of dummy pixels, A test area, which is located outside the aforementioned display area and includes multiple test pixels, Includes, Each of the plurality of pixels includes a light-emitting element and a pixel circuit, Each of the plurality of dummy pixels includes a light-emitting element and a pixel circuit, Each of the plurality of test pixels includes a light-emitting element and a pixel circuit, The aforementioned control circuit is Based on the video data, the gradation of the first pixel in the display area is determined. Based on the measurement results of the drive voltage corresponding to the gradation of the drive history of the first pixel of a dummy pixel of the same color as the first pixel in the degradation measurement area, and the determination reference information showing the relationship between the drive voltage and the degradation mode in the test results of the test area, it is determined whether the degradation state of the first pixel belongs to the first degradation mode or the second degradation mode following the first degradation mode. In response to the determination that the degradation state of the first pixel belongs to the first degradation mode, a data signal to be given to the first pixel is determined based on the gradation and the drive history of the first pixel, using first correction information corresponding to the first degradation mode. In response to the determination that the degradation state of the first pixel belongs to the second degradation mode, a data signal to be given to the first pixel is determined based on the gradation and the drive history of the first pixel, using second correction information that corresponds to the second degradation mode and is different from the first correction information. Display device.

2. A display device according to claim 1, In the second degradation mode, the control circuit The state of the first pixel after transitioning to the second degradation mode is determined to be the initial state of the first pixel in the second degradation mode. Based on the initial state, and the gradation and the drive history of the first pixel since the initial state, a data signal to be given to the first pixel is determined. Display device.

3. A display device according to claim 1, In the second degradation mode, the control circuit determines a data signal to be supplied to the first pixel based on the measurement results of the grayscale, the driving history of the first pixel, and the current-voltage characteristics of a dummy pixel of the same color as the first pixel. Display device.

4. A display device according to claim 3, The degradation measurement area is located between the test area and the display area. The first correction information and the second correction information are based on the measurement results of the relationship between the drive history and luminescence of the plurality of test pixels. Display device.

5. A display device according to claim 1, The control circuit maintains the light-emitting element of the test area in a non-emitting state during the period in which the video data is displayed. Display device.

6. A display device according to claim 1, A first wiring pattern for supplying power potential to the anode of the light-emitting element in the display area, A second wiring pattern, separated from the first wiring pattern, for supplying a power potential to the anode of the light-emitting element in the test region, A display device, further including the above.

7. A method for controlling a display device, The aforementioned display device is A display area containing multiple pixels that displays video in accordance with external video data, A degradation measurement area is located outside the aforementioned display area and includes a plurality of dummy pixels, A test area, which is located outside the aforementioned display area and includes multiple test pixels, Includes, Each of the plurality of pixels includes a light-emitting element and a pixel circuit, Each of the plurality of dummy pixels includes a light-emitting element and a pixel circuit, Each of the plurality of test pixels includes a light-emitting element and a pixel circuit, The control method described above is Based on the video data, the gradation of the first pixel in the display area is determined. Based on the measurement results of the drive voltage corresponding to the gradation of the drive history of the first pixel of a dummy pixel of the same color as the first pixel in the degradation measurement area, and the determination reference information showing the relationship between the drive voltage and the degradation mode in the test results of the test area, it is determined whether the degradation state of the first pixel belongs to the first degradation mode or the second degradation mode following the first degradation mode. In response to the determination result that the degradation state of the first pixel belongs to the first degradation mode, a data signal to be given to the first pixel is determined based on the gradation and the drive history of the first pixel by a first method corresponding to the first degradation mode. In response to the determination that the degradation state of the first pixel belongs to the second degradation mode, a data signal to be given to the first pixel is determined based on the gradation and the drive history of the first pixel by a second method that corresponds to the second degradation mode and is different from the first method. A method for controlling a display device.

Images