Memory systems and information processing systems
The memory system adjusts operating modes based on power consumption formulas and temperature sensing to maintain stable operation within the power limits of the host device, addressing power management challenges across varying power supply capacities.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- KIOXIA CORP
- Filing Date
- 2022-08-22
- Publication Date
- 2026-07-03
AI Technical Summary
The challenge is to manage power consumption in memory systems to prevent it from exceeding the power supply capacity of the external device, especially in devices with varying power supply capacities such as servers, desktop PCs, laptops, and smartphones, to maintain stable operation.
The memory system includes a controller that adjusts its operating modes based on a calculation formula to balance power consumption with desired speed, using a formula to determine the ratio of time spent in each mode to ensure power consumption does not exceed the available power, incorporating temperature sensing for further adjustments.
This approach allows the memory system to operate efficiently within the power limits of the host device, ensuring stable performance across different power supply scenarios and usage modes, including as internal storage or USB storage.
Smart Images
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Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to a memory system and an information processing system.
Background Art
[0002] A memory system is a system for storing data. The memory system includes a non-volatile semiconductor memory (hereinafter referred to as a non-volatile memory). The memory system is, for example, an SSD (solid state drive). Although the access speed such as reading and writing of the SSD has been steadily increasing, generally, the higher the speed of the SSD, the greater the power consumption tends to be. The SSD is connected to an external device. The external device is an information processing device. The external device transmits various commands to the SSD to access the SSD. The external device also supplies power to the SSD. The power supply capacity of the external device varies depending on the type of the external device and the usage form such as whether the external device is connected to an AC power supply. When the external device is a server, a desktop PC, or the like, the power supply capacity of the external device is high. When the external device is a mobile device such as a notebook PC or a smartphone, the power supply capacity of the external device is low. There is a significant difference in the power supply capacity between the two. If the power consumption of the SSD increases, the external device may not be able to supply the necessary power to the SSD, and the SSD may fall into a situation where it is difficult to operate. It is expected that the higher the speed of the SSD, the more likely the problem of limited connection destination external devices will occur.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] An object of the present invention is to provide a memory system and an information processing system that adjust their operations so that the power consumption does not exceed the supplied power. [Means for solving the problem]
[0005] The memory system according to this embodiment includes a non-volatile memory and a controller that controls the operation of the non-volatile memory. 、 The memory system is capable of operating in any of several operating modes with different power consumption. The non-volatile memory is A formula that expresses the ratio of the operating time of each of the multiple operating modes in order to achieve the desired operating speed, using power consumption. The controller stores the calculation formula Read the above from the non-volatile memory, Based on the first target value for power consumption and the calculation formula, the ratio of the operating time for each of the multiple operating modes is determined, and the operating modes are switched and executed based on the determined ratio of operating time. do. [Brief explanation of the drawing]
[0006] [Figure 1] This is a block diagram showing an example of an information processing system including a memory system according to the first embodiment. [Figure 2] This table shows an example of the relationship between the operating speed and average power consumption for each of the multiple operating modes of the memory system according to the first embodiment. [Figure 3] This table shows an example of the dwell time ratio for each operating mode of the memory system according to the first embodiment. [Figure 4] This graph shows an example of the dwell time ratio for each operating mode according to the first embodiment. [Figure 5] This table shows an example of the relationship between the host's power supply capacity, cooling capacity, and maximum power rating setting value in the memory system according to the first embodiment, for each usage mode of the host. [Figure 6] This table shows an example of a maximum power rating setting command according to the first embodiment. [Figure 7] This table shows other examples of the maximum power rating setting command according to the first embodiment. [Figure 8] This flowchart shows an example of the process by which the operation mode control unit according to the first embodiment switches the operation mode. [Figure 9] This table shows an example of the maximum power rating change value according to the second embodiment. [Figure 10]This table shows an example of a command for changing the maximum power rating according to the second embodiment. [Figure 11] This table shows other examples of the maximum power rating change command according to the second embodiment. [Figure 12] This flowchart shows an example of the process by which the operation mode control unit according to the second embodiment switches the operation mode. [Figure 13] This is a block diagram showing an example of an information processing system including a memory system according to the third embodiment. [Figure 14] This flowchart shows an example of the process by which the operation mode control unit according to the third embodiment switches the operation mode. [Figure 15] This graph shows an example of temperature control power values for sensor temperature in the memory system according to the third embodiment. [Figure 16] This table shows an example of a PID coefficient setting command according to the third embodiment. [Figure 17] This flowchart shows an example of the process by which the operation mode control unit according to the third embodiment calculates the temperature control power value. [Figure 18] This flowchart shows the first half of an example of the process by which the operation mode control unit according to the fourth embodiment switches the operation mode. [Figure 19] This flowchart shows the latter half of an example of the process by which the operation mode control unit according to the fourth embodiment switches the operation mode. [Figure 20] This graph shows an example of the dwell time ratio for each operating mode according to the fourth embodiment. [Figure 21] This figure shows an example of switching between operating modes according to the fourth embodiment. [Modes for carrying out the invention]
[0007] The following description will explain embodiments for carrying out the invention with reference to the drawings. The following description is illustrative of devices and methods for realizing the technical idea. Modifications that are easily conceivable by those skilled in the art are naturally included within the scope of disclosure. The dimensional relationships and ratios may differ between multiple drawings. The same reference numeral is used for corresponding elements in multiple drawings. An element may be given multiple designations, but these designations are merely illustrative examples.
[0008] This embodiment will be described in detail below with reference to the drawings.
[0009] [First Embodiment] Figure 1 is a block diagram showing an example of an information processing system including a memory system according to the first embodiment.
[0010] The information processing system includes a host 10 and a memory system 20.
[0011] Host 10 is an information processing device. Host 10 sends various commands to the memory system 20 in order to access it.
[0012] The memory system 20 is a storage device. Located outside the host 10, the memory system 20 is connected to the host 10 via a cable or network. The memory system 20 may also be built into the host 10.
[0013] The memory system 20 includes a controller 30 and non-volatile memory 40.
[0014] The controller 30 is an integrated circuit. For example, the controller 30 is a SoC (System on a Chip). The controller 30 controls the operation of the non-volatile memory 40.
[0015] The non-volatile memory 40 is, for example, a NAND flash memory or a NOR flash memory. The non-volatile memory 40 can retain stored data even when power is not supplied.
[0016] Next, the internal configuration of the controller 30 will be described. The controller 30 includes a host interface circuit (host I / F circuit) 52, a non-volatile memory interface circuit (non-volatile memory I / F circuit) 54, a CPU 56, and volatile memory 58. The host I / F circuit 52, the non-volatile memory I / F circuit 54, the CPU 56, and the volatile memory 58 are interconnected via a bus line 62.
[0017] The host I / F circuit 52 is an interface. The host I / F circuit 52 supports, for example, SATA (Serial ATA), SAS (Serial Attached SCSI), UFS, PCI Express (PCIe) ( TM ), Ethernet( TM The SATA interface includes U.2, M.2, and mSATA form factors. The PCIe interface includes AIC, M.2, and U.2 form factors. The SAS interface includes the U.2 form factor. The host I / F circuit 52 connects the controller 30 and the host 10 in a communicative manner.
[0018] The non-volatile memory interface circuit 54 is an interface. If the non-volatile memory 40 is a NAND flash memory, the non-volatile memory interface circuit 54 is, for example, a toggle NAND flash interface or an open NAND flash interface (ONFI). The non-volatile memory interface circuit 54 connects the controller 30 and the non-volatile memory 40 in a communicative manner.
[0019] The CPU 56 is a processor. The CPU 56 operates as an operating mode control unit 60 by executing firmware. The firmware is stored in non-volatile memory 40. The firmware is transferred from non-volatile memory 40 to volatile memory 58. The CPU 56 executes the firmware in volatile memory 58.
[0020] Volatile memory 58 is, for example, DDR3L (Double Data Rate 3 This is a low-voltage DRAM (Dynamic Random Access Memory). The volatile memory 58 can only retain stored data while power is supplied. The volatile memory 58 may be located outside the controller 30.
[0021] The memory system 20 according to the first embodiment can operate in any of a plurality of operating modes with different power consumption. In this specification, the average power consumption value obtained by dividing the power consumption by time is referred to as power consumption. The operating mode control unit 60 selects at least one operating mode from the plurality of operating modes. The plurality of operating modes are referred to as operating modes A, B, C, and D. The manufacturer of the memory system 20 operates the memory system 20 in each operating mode before shipment. The manufacturer measures the power consumption of the memory system 20 during operation in each operating mode. The average power consumption value is obtained by dividing the measured power consumption by the operating time. The average power consumption value is highest in operating mode A and decreases as the modes move from B to D, and from A to D. The clock frequency is highest in operating mode A and decreases sequentially as the modes move from B to D. A higher clock frequency results in a higher average power consumption value. A lower clock frequency results in a lower average power consumption value. Operating mode D is, for example, an operating mode in which some functions are disabled.
[0022] Figure 2 is a table showing an example of data illustrating the relationship between the operating speed and average power consumption for each of the multiple operating modes of the memory system 20 according to the first embodiment. At least the data showing the relationship between multiple operating modes and average power consumption is stored in the control data storage area within the non-volatile memory 40. The operating speed is, for example, the write speed or the read speed. The write speed is the data transfer speed from the host 10 to the non-volatile memory 40 when the host 10 writes data to the non-volatile memory 40. The read speed is the data transfer speed from the non-volatile memory 40 to the host 10 when the host 10 reads data from the non-volatile memory 40. The data transfer speed is the size of the data transferred per second (MB).
[0023] The memory system 20 operates on the supplied power. Therefore, the maximum power that the memory system 20 can consume is determined based on the supplied power. The mode control unit 60 reads data from the non-volatile memory 40 that shows the relationship between multiple operating modes and average power consumption values. Based on the read data, the mode control unit 60 calculates the average power consumption value To ensure that the power supplied does not exceed the available power, select and execute either operating mode A, operating mode B, operating mode C, or operating mode D.
[0024] An example of the process that the operation mode control unit 60 selects and executes when selecting an operation mode will be described below.
[0025] Figure 3 is a table showing an example of the dwell time ratio for each operating mode for each of several average power consumption target values P of the memory system 20 according to the first embodiment. The average power consumption target value P is the average power consumption that is permissible for the memory system 20 to operate normally. value This is the maximum value. The average power consumption target value P is also called the first target value for power consumption. The dwell time ratio T for operating mode A. A This is the ratio of the operating time of operating mode A to the total operating time of operating mode A, operating mode B, operating mode C, and operating mode D. The dwell time ratio T for operating mode B. BIt is the ratio of the operation time of operation mode B to the total time of the operation time of operation mode A, the operation time of operation mode B, the operation time of operation mode C, and the operation time of operation mode D. The residence time ratio T of operation mode C C It is the ratio of the operation time of operation mode C to the total time of the operation time of operation mode A, the operation time of operation mode B, the operation time of operation mode C, and the operation time of operation mode D. The residence time ratio T of operation mode B D It is the ratio of the operation time of operation mode D to the total time of the operation time of operation mode A, the operation time of operation mode B, the operation time of operation mode C, and the operation time of operation mode D.
[0026] When the average power consumption target value P is 10000 mW or more, the residence time ratio T of operation mode A A is 1. The residence time ratio T of operation mode B B , the residence time ratio T of operation mode C C , and the residence time ratio T of operation mode D D is 0.
[0027] When the average power consumption target value P is less than 10000 mW and 6000 mW or more, the operation mode control unit 60 switches between operation modes A and B and executes, so that the operation speed becomes the fastest. In this case, the residence time ratio T of operation mode A A is 1 - (10000 - P) / 4000. The residence time ratio T of operation mode B B is (10000 - P) / 4000. The residence time ratio T of operation mode C C and the residence time ratio T of operation mode D D is 0.
[0028] When the average power consumption target value P is less than 6000 mW and 2300 mW or more, the operation mode control unit 60 switches between operation modes B and C and executes, so that the operation speed becomes the fastest. In this case, the residence time ratio T of operation mode B B is 1 - (6000 - P) / 3700. The residence time ratio T of operation mode C C is (6000 - P) / 3700. The residence time ratio T of operation mode A Aand the dwell time ratio T of operating mode D D It is 0.
[0029] If the average power consumption target value P is less than 2300mW and 500mW or more, the operation mode control unit 60 switches between operation modes C and D to achieve the fastest operation speed. In this case, the dwell time ratio T of operation mode C is... C This is 1 - (2300 - P) / 1800. The dwell time ratio T in operating mode D. D The value is (2300-P) / 1800. The dwell time ratio T in operating mode A. A and the ratio of time spent in operation mode B T B It is 0.
[0030] If the average power consumption target value P is less than 500mW, the memory system 20 will stop operating.
[0031] Using the average power consumption target value P, determine the dwell time ratio T of the operating mode. A , T B , T C , T D The formula that represents this is called the derivative. The derivative is stored in the control data storage area within the non-volatile memory 40.
[0032] Figure 4 is a graph showing an example of the dwell time ratio for each operating mode according to the first embodiment. The vertical axis represents the dwell time ratio. The horizontal axis represents the average power consumption target value P [mW].
[0033] While the average power consumption target value P changes from 500mW to 2300mW, the dwell time ratio T of operating mode C is... C It increases from 0 to 1. During this time, the ratio of the time spent in operating mode D is T. D It decreases from 1 to 0.
[0034] While the average power consumption target value P changes from 2300mW to 6000mW, the dwell time ratio T of operating mode B is... B It increases from 0 to 1. During this time, the ratio of the time spent in operating mode C T C It decreases from 1 to 0.
[0035] While the average power consumption target value P changes from 6000mW to 10000mW, the dwell time ratio T of operating mode A. A It increases from 0 to 1. During this time, the ratio of time spent in operating mode B is T. B It decreases from 1 to 0.
[0036] If the average power consumption target value P exceeds 10,000 mW, the dwell time ratio T in operating mode A will be affected. A This is kept at 1. In this case, the duration ratio T of operation mode B B It is kept at 0.
[0037] Figure 5 is a table showing an example of the relationship between the power supply capacity, cooling capacity, and maximum power rating setting of the host 10 in the memory system according to the first embodiment, for each usage mode of the host 10. The usage mode of the host 10 includes the type of host 10, the operating environment of the host 10, and the connection mode between the host 10 and the memory system 20. The maximum power rating setting is information that the host 10 notifies the memory system 20 of. The maximum power rating setting represents the power that the host 10 can supply to the memory system 20 (supplyable power). The maximum power rating setting is also called the first information. The maximum power rating setting is determined by the usage mode, power supply capacity, and cooling capacity of the host 10.
[0038] For example, if host 10 is used as a desktop PC, its power supply capacity is a maximum of 100W. If host 10 is used as a desktop PC, its cooling capacity is high. If host 10 is used as a desktop PC, its maximum power rating is 100W.
[0039] For example, if host 10 is used as a laptop, its power supply capacity is a maximum of 10W. If host 10 is used as a laptop, its cooling capacity is slightly higher. If host 10 is used as a laptop, its maximum power rating setting is one of the values between 3W and 10W.
[0040] For example, if host 10 is used as a smartphone, the power supply capacity of host 10 is a maximum of 3W. If host 10 is used as a smartphone, the cooling capacity of host 10 is somewhat low. If host 10 is used as a smartphone, the maximum power rating setting is one of the values between 1W and 3W.
[0041] For example, if host 10 is used as USB storage, its power supply capacity is a maximum of 100W. If host 10 is used as USB storage, its cooling capacity is low. If host 10 is used as USB storage, its maximum power rating setting is one of the values from 0W to 10W.
[0042] The relationship between the power supply capacity, cooling capacity, and maximum power rating setting value for each usage mode of the host 10 is stored in the host memory of the host 10. When the memory system 20 is connected, the host 10 reads the maximum power rating setting value for each usage mode of the host from the host memory. The host 10 then notifies the memory system 20 of the maximum power rating setting value.
[0043] Figure 6 is a table showing an example of a maximum power rating setting command according to the first embodiment. A maximum power rating setting command is a command that the host 10 sends to the memory system 20. The maximum power rating setting command includes data related to the maximum power rating setting value. Figure 6 shows an example using the NVMe Set Features command.
[0044] In NVMe, commands are 64KB. The NVMe command format includes the command Dword0 (CDW0) at byte [03:00], the Namespace Identifier (NSID) at byte [07:04], Reserved at byte [15:08], the Metadata Pointer (MPTR) at byte [23:16], the Data Pointer (DPTR) at byte [39:24], the command Dword10 (CDW10) at byte [43:40], the command Dword11 (CDW11) at byte [47:44], the command Dword12 (CDW12) at byte [51:48], the command Dword13 (CDW13) at byte [55:52], the command Dword14 (CDW14) at byte [59:56], and the command Dword15 (CDW15) at byte [63:60].
[0045] The OPC at bit [07:00] of command Dword0 (CDW0) is set to the opcode (09h) for SetFeature.
[0046] The command Dword10 (CDW10) includes the Save (SV) bit
[31] , the Reserved bit [30:08], and the Feature Identifier (FID) bit [07:00].
[0047] The 16 bytes in commands Dword12 (CDW12), Dword13 (CDW13), Dword14 (CDW14), and Dword15 (CDW15) contain data related to the maximum power rating setting.
[0048] Bit 7 of byte 2, Pwr_Max_En, is data indicating whether notification of the maximum power rating setting is enabled or disabled. If Pwr_Max_En is 1b, notification of the maximum power rating setting is enabled. If Pwr_Max_En is 0b, notification of the maximum power rating setting is disabled.
[0049] The 16-bit Pwr_Max_Conf. in bytes 3 and 4 represents the maximum power rating setting. For example, if Pwr_Max_Conf. is 0001h, the maximum power rating setting is 100mW. If Pwr_Max_Conf. is 0002h, the maximum power rating setting is 200mW. If Pwr_Max_Conf. is 0003h, the maximum power rating setting is 300mW. If Pwr_Max_Conf. is FFFFh, the maximum power rating setting is 6553500mW.
[0050] Figure 7 is a table showing other examples of the maximum power rating setting command according to the first embodiment. Figure 7 shows the Mode Page command in SAS.
[0051] Bit 7 of byte 2 of the Mode Page command, Pwr_Max_En, is data indicating whether notification of the maximum power rating setting is enabled or disabled. If Pwr_Max_En is 1b, notification of the maximum power rating setting is enabled. If Pwr_Max_En is 0b, notification of the maximum power rating setting is disabled.
[0052] The 16-bit Pwr_Max_Conf. in bytes 3 and 4 represents the maximum power rating setting. For example, if Pwr_Max_Conf. is 0001h, the maximum power rating setting is 100mW. If Pwr_Max_Conf. is 0002h, the maximum power rating setting is 200mW. If Pwr_Max_Conf. is 0003h, the maximum power rating setting is 300mW. If Pwr_Max_Conf. is FFFFh, the maximum power rating setting is 6553500mW.
[0053] Figure 8 is a flowchart showing an example of the process by which the operation mode control unit 60 according to the first embodiment switches the operation mode. When the memory system 20 receives the maximum power rating setting command shown in Figure 6 or Figure 7, the CPU 56 causes the operation mode control unit 60 to execute the operation mode switching process shown in Figure 8.
[0054] The operation mode control unit 60 determines whether Pwr_Max_En included in the maximum power rating setting command is 1b (S12).
[0055] If Pwr_Max_En is 1b (YES in S12), the operation mode control unit 60 determines the maximum power rating setting value from Pwr_Max_Conf. included in the maximum power rating setting command (S14).
[0056] The operation mode control unit 60 uses the maximum power rating setting value as the average power consumption target value P, and reads the derivative corresponding to the average power consumption target value P from the non-volatile memory 40 (S16).
[0057] The operation mode control unit 60 determines the dwell time ratio T for each operation mode based on the read derivative and average power consumption target value P. A , T B , T C , T D The decision is made (S18).
[0058] The operation mode control unit 60 determines the dwell time ratio T A , T B , T C , T D The operating mode of the memory system is switched based on this (S20).
[0059] If Pwr_Max_En is 0b (NO in S12), the operation mode control unit 60 fixes the operation mode of the memory system 20 to the default operation mode (S22).
[0060] After processing S20 and S22, the operation mode control unit 60 terminates the operation mode switching process (end).
[0061] According to the first embodiment, the memory system 20 sets the notified maximum power rating setting value as the average power consumption target value P, and the dwell time ratio T for each operating mode. A , T B , T C , T DThis is determined based on the average power consumption target value P. Therefore, the average power consumption of the memory system 20 is prevented from exceeding the power supply capacity of the host 10. A single memory system 20 can be used as internal storage in a desktop PC, or as USB storage connected to the host via USB.
[0062] Although the host 10 notifies the memory system 20 of the maximum power rating setting, if the host 10 to which the memory system 20 is connected is predetermined, the average power consumption target value P is predetermined based on the usage pattern, power supply capacity, and cooling capacity of the connected host 10.
[0063] [Second Embodiment] Next, a second embodiment will be described. In the second embodiment, when the power that can be supplied to the memory system 20 (supplyable power) changes, the host 10 notifies the memory system 20 of information representing the changed supplyable power (maximum power rating change value). The maximum power rating change value is also called the second information.
[0064] Figure 9 is a table showing an example of the maximum power rating change value according to the second embodiment. Figure 9 shows an example of the maximum power rating change value of the host 10 when the usage mode is a notebook PC. For example, when the power supply state of the host 10 supplies up to 60W of power to the memory system 20 via the USB cable (USB PD 60W), the maximum power rating change value is 10000mW. For example, when the power supply state of the host 10 supplies up to 30W of power to the memory system 20 via the USB cable (USB PD 30W), the maximum power rating change value is 6000mW. For example, when the power supply state of the host 10 is battery-powered (battery-powered), the maximum power rating change value is 4000mW.
[0065] Figure 10 is a table showing an example of a maximum power rating change command according to the second embodiment. Figure 10 shows an example of using the NVMe Set Features command as the maximum power rating change command. The maximum power rating change command is a command that the host 10 sends to the memory system 20. The maximum power rating change command includes data related to the maximum power rating change value.
[0066] Bit 7 of byte 2, Pwr_Ctrl_En, is data indicating whether notification of changes in the maximum power rating is enabled or disabled. If Pwr_Ctrl_En is 1b, notification of changes in the maximum power rating is enabled. If Pwr_Ctrl_En is 0b, notification of changes in the maximum power rating is disabled.
[0067] The 16-bit Pwr_Ctrl_Conf. in bytes 3 and 4 represents the maximum power rating change value. For example, if Pwr_Ctrl_Conf. is 0001h, the maximum power rating change value is 100mW. If Pwr_Ctrl_Conf. is 0002h, the maximum power rating change value is 200mW. If Pwr_Ctrl_Conf. is 0003h, the maximum power rating change value is 300mW. If Pwr_Ctrl_Conf. is FFFFh, the maximum power rating change value is 6553500mW.
[0068] Figure 11 is a table showing other examples of the maximum power rating change command according to the second embodiment. Figure 11 shows an example where the Mode Page command of SAS is used as the maximum power rating change command.
[0069] Bit 7 of byte 2, Pwr_Ctrl_En, is data indicating whether notification of changes in the maximum power rating is enabled or disabled. If Pwr_Ctrl_En is 1b, notification of changes in the maximum power rating is enabled. If Pwr_Ctrl_En is 0b, notification of changes in the maximum power rating is disabled.
[0070] The 16-bit Pwr_Max_Conf. in bytes 3 and 4 represents the maximum power rating change value. For example, if Pwr_Max_Conf. is 0001h, the maximum power rating change value is 100mW. If Pwr_Max_Conf. is 0002h, the maximum power rating change value is 200mW. If Pwr_Max_Conf. is 0003h, the maximum power rating change value is 300mW. If Pwr_Max_Conf. is FFFFh, the maximum power rating change value is 6553500mW.
[0071] Figure 12 is a flowchart showing an example of the process by which the operation mode control unit 60 according to the second embodiment changes the switching of the operation mode. When the memory system 20 receives the maximum power rating change command shown in Figure 10 or Figure 11, the CPU 56 causes the operation mode control unit 60 to execute the operation mode switching change process shown in Figure 12.
[0072] The operation mode control unit 60 determines whether Pwr_Ctrl_En included in the maximum power rating change command is 1b (S32).
[0073] If Pwr_Ctrl_En is 1b (YES in S32), the operation mode control unit 60 determines the maximum power rating change value from Pwr_Ctrl_Conf. included in the maximum power rating change command (S34).
[0074] The operation mode control unit 60 reads the derivative corresponding to the average power consumption target value P from the non-volatile memory 40, using the maximum power rating change value as the average power consumption target value P (S36).
[0075] The operation mode control unit 60 determines the dwell time ratio T for each operation mode based on the read derivative and average power consumption target value P. A , T B , T C , T D Change (S38).
[0076] The operation mode control unit 60 determines the dwell time ratio T A , T B, T C , T D The operating mode of the memory system is switched based on this (S40). After processing in S40, the operating mode control unit 60 terminates the operating mode switching change process (end).
[0077] If Pwr_Ctrl_En is 0b (NO in S32), the operation mode control unit 60 terminates the operation mode switching change process (end). If Pwr_Ctrl_En is 0b, the dwell time ratio T for each operation mode. A , T B , T C , T D It will be maintained.
[0078] According to the second embodiment, the memory system 20 sets the notified maximum power rating change value as the average power consumption target value P, and the dwell time ratio T for each operating mode. A , T B , T C , T D This is determined based on the average power consumption target value P. Therefore, even if the power supply state of the host 10 changes while the memory system 20 is running, the average power consumption value of the memory system 20 is prevented from exceeding the power supply capacity of the host 10. One memory system 20 can be used as internal storage for a desktop PC or as USB storage connected to the host via USB.
[0079] [Third Embodiment] Next, a third embodiment will be described.
[0080] Figure 13 is a block diagram showing an example of an information processing system including a memory system according to the third embodiment. The memory system 20 according to the third embodiment further includes a temperature sensor 70. The temperature sensor 70 measures the temperature of the memory system 20. The output signal of the temperature sensor 70 represents the temperature of the memory system 20. The temperature sensor 70 may be attached to the non-volatile memory 40 or the controller 30, or it may be attached to the non-volatile memory 40 and the controller 30 separately. The temperature sensor 70 may be attached to each of the components of the controller 30, namely the host I / F circuit 52, the non-volatile memory I / F circuit 54, the CPU 56, and the volatile memory 58, or it may be attached to the host I / F circuit 52, the non-volatile memory I / F circuit 54, the CPU 56, or the volatile memory 58. The temperature sensor 70 is connected to a bus line 62. The output signal of the temperature sensor 70 is input to the operation mode control unit 60 via the bus line 62.
[0081] Figure 14 is a flowchart showing an example of the process by which the operation mode control unit 60 switches the operation mode according to the third embodiment. When power is supplied to the memory system 20 and the CPU 56 starts up, the CPU 56 causes the operation mode control unit 60 to execute the operation mode switching process shown in Figure 14. The operation mode control unit 60 obtains the temperature of the memory system 20 from the temperature sensor 70 (S52). The temperature of the memory system 20 obtained from the temperature sensor 70 is referred to as the sensor temperature.
[0082] The operation mode control unit 60 then determines the temperature control power value based on the sensor temperature (S54). The temperature control power value is the upper limit of power that the memory system 20 can consume as long as the temperature of the memory system 20 does not exceed the operating upper limit temperature. The operating upper limit temperature is the temperature at which the normal operation of the memory system 20 cannot be guaranteed if the temperature of the memory system 20 exceeds that temperature. The manufacturer of the memory system 20 determines the operating upper limit temperature. Details of how the temperature control power value is determined will be described later.
[0083] The operation mode control unit 60 uses the temperature control power value as the average power consumption target value P, and reads the derivative corresponding to the average power consumption target value P from the non-volatile memory 40 (S56).
[0084] The operation mode control unit 60 determines the dwell time ratio T for each operation mode based on the read derivative and average power consumption target value P. A , T B , T C , T D Change (S58).
[0085] The operation mode control unit 60 determines the dwell time ratio T A , T B , T C , T D The operating mode of the memory system is switched based on this (S60).
[0086] The operation mode control unit 60 determines whether a certain amount of time has elapsed since the last acquisition of the temperature of the memory system 20 (S62). That is, the operation mode control unit 60 determines whether a certain amount of time has elapsed since the execution timing of S52. The certain amount of time is, for example, 1 second.
[0087] If a certain amount of time has elapsed since the last acquisition of the temperature of the memory system 20 (S62 YES), the operation mode control unit 60 acquires the temperature of the memory system 20 again from the temperature sensor 70 (S52).
[0088] If a certain amount of time has not elapsed since the last acquisition of the temperature of the memory system 20 (S62 NO), the operation mode control unit 60 determines whether the memory system 20 has received a shutdown command (S64). The process of determining whether a shutdown command has been received (S64) may be performed not only after the process of determining whether a certain amount of time has elapsed since the last acquisition of the sensor temperature (S62), but also after the processes shown in Figure 14 (S52, S54, S56, S58, or S60).
[0089] If the memory system 20 receives a shutdown command (S64 YES), the operation mode control unit 60 terminates the operation mode switching process (end).
[0090] If the memory system 20 does not receive a shutdown command (S64 NO), the operation mode control unit 60 determines (S62) whether a certain amount of time has elapsed since the last acquisition of the temperature of the memory system 20.
[0091] Next, the determination of the temperature control power value will be explained. In determining the temperature control power value, the operating mode control unit 60 uses one of the following methods: switching control, proportional control (P control), proportional-integral control (PI control), or proportional-integral-derivative control (PID control). Switching control, proportional control, proportional-integral control, or proportional-integral-derivative control all require PID coefficients. The PID coefficients are notified to the memory system 20 by the host 10, for example. Alternatively, the memory system 20 may have PID coefficients stored in advance.
[0092] When the method for determining the temperature control power value is a switching control method, the PID coefficients are, for example, a threshold, a first power value, and a second power value. The threshold is a constant temperature. When the method for determining the temperature control power value is a switching control method and the sensor temperature is below the threshold, the operation mode control unit 60 sets the first power value as the temperature control power value. When the method for determining the temperature control power value is a switching control method and the sensor temperature is above the threshold, the operation mode control unit 60 sets the second power value as the temperature control power value.
[0093] When the method for determining the temperature control power value is a proportional control method, the PID coefficient is, for example, the proportional gain. When the method for determining the temperature control power value is a proportional control method, the temperature control power value is a value calculated from the sensor temperature and the proportional gain.
[0094] When the method for determining the temperature control power value is the proportional-integral control method, the PID coefficients are, for example, the proportional gain and the integral gain. When the method for determining the temperature control power value is the proportional-integral control method, the temperature control power value is a value calculated from the sensor temperature, the proportional gain, and the integral gain.
[0095] When the method for determining the temperature control power value is the proportional-integral-derivative control method, the PID coefficients are, for example, the proportional gain, the integral gain, and the derivative gain. When the method for determining the temperature control power value is the proportional-integral-derivative control method, the temperature control power value is a value calculated from the sensor temperature, the proportional gain, the integral gain, and the derivative gain.
[0096] Next, switching control, proportional control (P control), proportional-integral control (PI control), and PID control will be described.
[0097] (1) Switching control: In switching control, the operation mode control unit 60 changes the temperature control power value discontinuously (also referred to as stepwise) based on the sensor temperature. Switching control has the advantage of being easy to implement. Switching control is expressed as follows.
[0098] When T < L1, Wmax = A1 When L1 ≤ T < L2, Wmax = A2 When L3 ≤ T, Wmax = A5 Here, Wmax is the temperature control power value. T is the sensor temperature. L1, L2, and L3 are the temperature thresholds for switching Wmax. The threshold L1 is the lowest, and the threshold L3 is the highest. For example, A1 = 10000 mW, A2 = 1000 mW, and A3 = 500 mW. When the sensor temperature T is less than the threshold L1, Wmax is A1. When the sensor temperature T is greater than or equal to the threshold L3, Wmax is A3.
[0099] In switching control, the sensor temperature can be compared with multiple thresholds, and multiple power values can be used as temperature control power values depending on the comparison results. If there are two thresholds, the PID coefficients are the first threshold, the second threshold, the first power value, the second power value, and the third power value. The second threshold is greater than or equal to the first threshold. If the method for determining the temperature control power value is the switching control method, and the sensor temperature is less than the first threshold, the temperature control power value is the first power value. If the method for determining the temperature control power value is the switching control method, and the sensor temperature is greater than or equal to the first threshold and less than the second threshold, the temperature control power value is the second power value. If the method for determining the temperature control power value is the switching control method, and the sensor temperature is greater than or equal to the second threshold, the temperature control power value is the third power value.
[0100] (2) Proportional control: When switching control is refined by using multiple thresholds to subdivide the switching level, the switching control becomes proportional control. In proportional control, the temperature control power value changes continuously. Proportional control is expressed by Equation 1.
[0101]
number
[0102] Figure 15 is a graph showing an example of the change in the temperature control power value with respect to the sensor temperature in the memory system 20 according to the third embodiment, when the method for determining the temperature control power value is a proportional control method. The vertical axis represents the temperature control power value. The horizontal axis represents the sensor temperature. Here, when the sensor temperature is below a certain temperature, proportional control is not performed, and the temperature control power value is a constant value. That certain temperature is, for example, about 10 degrees. When proportional control is used, as the sensor temperature increases, the temperature control power value decreases.
[0103] (3) Proportional-integral control: When extrinsic factors such as ambient temperature are added to proportional control in the form of an integral term, it becomes proportional-integral control. While measuring extrinsic factors is difficult, proportional-integral control allows for their estimation. Proportional-integral control is represented by Equation 2.
[0104]
number
[0105] (4) Proportional, differential, and integral control: By adding feedback control as a differential term to proportional-integral control, proportional-differential-integral control is achieved. With proportional-integral-differential control, even with rapid temperature changes, the target average power consumption can be achieved. value The change in the maximum value is more gradual than the change in temperature. Therefore, even with rapid temperature changes, frequent changes in the operating mode can be avoided, leading to an extended product lifespan. Proportional, differential, and integral control is expressed by Equation 3.
[0106]
number
[0107] Figure 16 is a table showing an example of a PID coefficient setting command according to the third embodiment, when the method for determining the temperature control power value is a proportional-integral-derivative control method. A PID coefficient setting command is a command that the host 10 sends to the memory system 20. The PID coefficient setting command includes data related to the PID coefficients. Figure 16 shows an example of using the NVMe's Set Features command as the PID coefficient setting command.
[0108] Bit 7 of byte 2, Pwr_TempCal_En, is data indicating whether PID coefficient notification is enabled or disabled. If Pwr_TempCal_En is 1b, PID coefficient notification is enabled. If Pwr_TempCal_En is 0b, PID coefficient notification is disabled.
[0109] The 8-bit Pwr_TempCal_Conf.1 in byte 3 is the proportional gain Kp. The 8-bit Pwr_TempCal_Conf.2 in byte 4 is the integral gain Ki. The 8-bit Pwr_TempCal_Conf.3 in byte 5 is the differential gain Kd.
[0110] Another example of a PID coefficient setting command is one that utilizes the NVMe's Set Features command.
[0111] Figure 17 is a flowchart showing an example of the process by which the operation mode control unit 60 according to the third embodiment calculates the temperature control power value when the method for determining the temperature control power value is a proportional-integral-derivative control method. This process corresponds to the process at S54 in Figure 14.
[0112] The operation mode control unit 60 receives a PID coefficient setting command (S72).
[0113] The operation mode control unit 60 determines whether Pwr_TempCal_En included in the PID coefficient setting command is 1b (S74).
[0114] If Pwr_TempCal_En is 1b (YES in S74), the operation mode control unit 60 calculates the temperature control power value according to Equation 3 from the sensor temperature and Pwr_TempCal_Conf.1 (proportional gain Kp), Pwr_TempCal_Conf.2 (integral gain Ki), and Pwr_TempCal_Conf.3 (derivative gain Kd) included in the PID coefficient setting command (S76).
[0115] If Pwr_TempCal_En is 0b (NO in S74), the operation mode control unit 60 maintains the current temperature control power value (S78).
[0116] After the execution of S76 or S78, the operation mode control unit 60 terminates the calculation process of the temperature control power value (end).
[0117] According to the third embodiment, the memory system 20 calculates the temperature control power value using switching control, P control, PI control, or PID control, sets the temperature control power value as the average power consumption target value P, and determines the dwell time ratio T for each operating mode. A , T B , T C , T D This is determined based on the average power consumption target value P. This prevents the temperature of the memory system 20 from exceeding the upper limit of operating temperature.
[0118] [Fourth Embodiment] Next, a fourth embodiment will be described. In the fourth embodiment, the memory system 20 determines the average power consumption target value P. The operation mode control unit 60 compares the maximum power rating setting value, the maximum power rating change value, and the temperature control power value, and determines the minimum of these three values as the average power consumption target value P. In the fourth embodiment, the operation mode control unit 60 also periodically acquires the temperature of the memory system 20 from the temperature sensor 70. The time interval at which the temperature is periodically acquired is called a predetermined time. The operation mode control unit 60 stores the temperature of the memory system 20 (sensor temperature) acquired from the temperature sensor 70 in the volatile memory 58. The operation mode control unit 60 can store the temperature of the memory system 20 acquired from the temperature sensor 70 at a certain timing as the first sensor temperature. The operation mode control unit 60 can further store the temperature of the memory system 20 acquired from the temperature sensor 70 at a predetermined time after a certain timing as the second sensor temperature.
[0119] Figure 18 is a flowchart showing the first half of an example of the process by which the operation mode control unit 60 according to the fourth embodiment switches the operation mode. Figure 19 is a flowchart showing the second half of an example of the process by which the operation mode control unit 60 according to the fourth embodiment switches the operation mode.
[0120] When power is supplied to the memory system 20 and the CPU 56 starts up, the operation mode control unit 60 of the memory system 20 determines whether the maximum power rating setting value is stored in the non-volatile memory 40 (S102).
[0121] If the maximum power rating setting value is stored in the non-volatile memory 40 (S102 YES), the operation mode control unit 60 writes the maximum power rating setting value stored in the non-volatile memory 40 to the volatile memory 58 (S104).
[0122] If the maximum power rating setting value is not stored in the non-volatile memory 40 (S102 NO), the operation mode control unit 60 sends a request to the host 2 to send a maximum power rating setting command (S106). In response to the request, the host 10 sends the maximum power rating setting command to the memory system 20.
[0123] The memory system 20 receives a command to set the maximum power rating (S108).
[0124] The operation mode control unit 60 of the memory system 20 writes the maximum power rating setting value included in the received maximum power rating setting command to the volatile memory 58 and the non-volatile memory 40 (S110).
[0125] After processing in S104 or S110, the operation mode control unit 60 determines whether the PID coefficients are stored in the non-volatile memory 40 (S114).
[0126] If the PID coefficients are stored in the non-volatile memory 40 (S114 YES), the operation mode control unit 60 writes the PID coefficients stored in the non-volatile memory 40 to the volatile memory 58 (S116).
[0127] If the PID coefficients are not stored in the non-volatile memory 40 (S114 NO), the operation mode control unit 60 sends a request to the host 2 to send a PID coefficient setting command (S118). In response to the request, the host 10 sends a PID coefficient setting command to the memory system 20.
[0128] The memory system 20 receives a PID coefficient setting command (S120).
[0129] The operation mode control unit 60 of the memory system 20 writes the PID coefficients included in the received PID coefficient setting command to the volatile memory 58 and the non-volatile memory 40 (S122).
[0130] After processing in S116 or S122, the operation mode control unit 60 calculates a temperature control power value based on the second sensor temperature and PID coefficient stored in the volatile memory 58 (S126).
[0131] The operation mode control unit 60 takes the smaller of the maximum power rating set value stored in the volatile memory 58 and the calculated temperature control power value as the average power consumption target value P, and reads the derivative corresponding to the average power consumption target value P from the non-volatile memory 40 (S130).
[0132] The operation mode control unit 60 determines the dwell time ratio for each operation mode based on the read derivative and the average power consumption target value P (S132).
[0133] The operation mode control unit 60 switches the operation mode based on the determined dwell time ratio of each operation mode (S134).
[0134] After the execution of the process in S134, the operation mode control unit 60 determines whether the memory system 20 has received a shutdown command (S135). The process of determining whether a shutdown command has been received (S135) is not limited to the execution of the process of switching the operation mode (S134), but may also be executed after the execution of the processes shown in Figure 18 (S104, S106, S108, S110, S116, S118, S120, S122, S126), or after the execution of the processes shown in Figure 19 (S130, S132).
[0135] If the memory system 20 receives a shutdown command (S135 YES), the operation mode control unit 60 terminates the operation mode switching process (end).
[0136] If the memory system 20 has not received a shutdown command (S135 NO), the operation mode control unit 60 reads the latest sensor temperature and the sensor temperature stored at the previous timing from the volatile memory 58 (S136).
[0137] The operation mode control unit 60 determines whether there has been a temperature change in the memory system 20 based on the difference between the most recently read sensor temperature and the sensor temperature stored at the previous timing (S138).
[0138] If there is a temperature change in the memory system 20 (S138 YES), the operation mode control unit 60 calculates the temperature control power value based on the latest sensor temperature and PID coefficients stored in the volatile memory 58 (S126).
[0139] If there is no temperature change in the memory system 20 (S138 NO), the operation mode control unit 60 determines whether the memory system 20 has received a command to change the maximum power rating (S140).
[0140] If the memory system 20 has not received a command to change the maximum power rating (S140 NO), the operation mode control unit 60 switches the operation mode based on the determined dwell time ratio of each operation mode (S134).
[0141] When the memory system 20 receives a maximum power rating change command (S140 YES), the operation mode control unit 60 writes the maximum power rating change value included in the received maximum power rating change command to the volatile memory 58 (S142).
[0142] The operation mode control unit 60 reads the derivative corresponding to the average power consumption target value P from the non-volatile memory 40, using the smallest value among the maximum power rating setting value, temperature control power value, and maximum power rating change value stored in the volatile memory 58 as the average power consumption target value P (S144).
[0143] The operation mode control unit 60 determines the dwell time ratio of each operation mode based on the derivative and the average power consumption target value P (S132).
[0144] Figure 20 is a graph showing an example of the dwell time ratio for each operating mode according to the fourth embodiment. For example, if the average power consumption target value P is 8500 (mW), the operating mode control unit 60 can achieve the fastest operating speed by switching between operating modes A and B. In this case, the dwell time ratio T of operating mode A A It is 0.625. The dwell time ratio T in operating mode B. B It is 0.375.
[0145] Figure 21 shows an example of operation mode switching according to the fourth embodiment. Within a certain unit time (T0-T1), the stay time in operation mode A is set to 0.625 × (T1-T0), and the stay time in operation mode B is set to 0.375 × (T1-T0). The unit time can be determined by considering the specific substrate of the memory system 20 and the characteristics of the circuit.
[0146] According to the fourth embodiment, the memory system 20 calculates the temperature control power value using switching control, P control, PI control, or PID control. The memory system 20 sets the average power consumption target value P as the smallest of the temperature control power value, the notified maximum power rating set value, and the residence time ratio T for each operating mode. A , T B , T C , T D This is determined based on the average power consumption target value P. This prevents the average power consumption of the memory system 20 from exceeding the power supply capacity of the host 10 and prevents the temperature of the memory system 20 from exceeding the upper limit of operating temperature.
[0147] The embodiments are illustrative and the scope of the invention is not limited thereto. [Explanation of Symbols]
[0148] 10 hosts 20 memory systems 30 controllers 40 Non-volatile memory 52 Host I / F Circuit 54 Non-volatile memory I / F circuit 56 CPU 58. Volatile memory 60 Operation Mode Control Unit 70 Temperature Sensor
Claims
1. Non-volatile memory and A memory system comprising a controller for controlling the operation of the non-volatile memory, The memory system can operate in any of several operating modes with different power consumption, The non-volatile memory stores a formula that expresses the ratio of the operating time of each of the multiple operating modes for achieving a desired operating speed using power consumption. The aforementioned controller, The calculation formula is read from the non-volatile memory, Based on the first target value for power consumption and the calculation formula, the ratio of the operating time for each of the multiple operating modes is determined. The operation mode is switched and executed based on the determined ratio of the operation time. Memory system.
2. The operating speed is the write speed or read speed to the non-volatile memory. The memory system according to claim 1.
3. The first target value for power consumption is the power that an external device connected to the memory system can supply to the memory system. The memory system according to claim 2.
4. The aforementioned controller, The first information is received from the external device. Based on the first information, a first target value for the power consumption is determined. The memory system according to claim 3.
5. The aforementioned controller, The second information is received from the aforementioned external device. Based on the second information, a first target value for the power consumption is determined. The memory system according to claim 4.
6. The memory system has a temperature sensor, The controller determines a first target value for the power consumption based on the output signal of the temperature sensor. The memory system according to claim 2.
7. The controller determines a first target value for power consumption by proportional control, proportional-integral control, or proportional-differential-integral control in response to the output signal of the temperature sensor. The memory system according to claim 6.
8. The aforementioned controller, Receive proportional gain, A first target value for the power consumption is determined using the output signal of the temperature sensor and the received proportional gain. The memory system according to claim 7.
9. The aforementioned controller, Receive proportional and integral gains, A first target value for the power consumption is determined using the output signal of the temperature sensor and the received proportional gain and integral gain. The memory system according to claim 7.
10. The aforementioned controller, Receive proportional gain, integral gain, and differential gain, A first target value for the power consumption is determined using the output signal of the temperature sensor and the received proportional gain, differential gain, and integral gain. The memory system according to claim 7.
11. The aforementioned multiple operating modes have different data transfer rates between the non-volatile memory and the external device. The memory system according to claim 1.
12. The external device writes data to the non-volatile memory and reads data from the non-volatile memory. The data transfer rate is the data transfer rate when the external device writes data to the non-volatile memory or the data transfer rate when the external device reads data from the non-volatile memory. The memory system according to claim 11.
13. An information processing system comprising an external device and a memory system powered by the external device and capable of operating in any of a plurality of operating modes with different power consumption, The aforementioned memory system Non-volatile memory and The system comprises a controller for controlling the operation of the non-volatile memory, The memory system can operate in any of several operating modes with different power consumption, The non-volatile memory stores a formula that expresses the ratio of the operating time of each of the multiple operating modes for achieving a desired operating speed using power consumption. The aforementioned controller, The calculation formula is read from the non-volatile memory, Based on the first target value for power consumption and the calculation formula, the ratio of the operating time for each of the multiple operating modes is determined. The operation mode is switched and executed based on the determined ratio of the operation time. Information processing system.
14. The operating speed is the write speed or read speed to the non-volatile memory. The information processing system according to claim 13.
15. The first target value for the power consumption is the power that the external device can supply to the memory system. The information processing system according to claim 14.
16. The aforementioned controller, The first information is received from the external device. Based on the first information, a first target value for the power consumption is determined. The information processing system according to claim 15.
17. The aforementioned controller, The second information is received from the aforementioned external device. Based on the second information, a first target value for the power consumption is determined. The information processing system according to claim 16.
18. The memory system has a temperature sensor, The controller determines a first target value for the power consumption based on the output signal of the temperature sensor. The information processing system according to claim 14.
19. The controller determines a first target value for power consumption by proportional control, proportional-integral control, or proportional-differential-integral control in response to the output signal of the temperature sensor. The information processing system according to claim 18.
20. The aforementioned controller, Receive proportional gain, A first target value for the power consumption is determined using the output signal of the temperature sensor and the received proportional gain. The information processing system according to claim 19.
21. The aforementioned controller, Receive proportional and integral gains, A first target value for the power consumption is determined using the output signal of the temperature sensor and the received proportional gain and integral gain. The information processing system according to claim 19.
22. The aforementioned controller, Receive proportional gain, integral gain, and differential gain, A first target value for the power consumption is determined using the output signal of the temperature sensor and the received proportional gain, differential gain, and integral gain. The information processing system according to claim 19.
23. The aforementioned multiple operating modes differ in the data transfer rate between the non-volatile memory and the external device. The information processing system according to claim 13.
24. The external device writes data to the non-volatile memory and reads data from the non-volatile memory. The data transfer rate is the data transfer rate when the external device writes data to the non-volatile memory or the data transfer rate when the external device reads data from the non-volatile memory. The information processing system according to claim 23.