Semiconductor light-emitting element and its manufacturing method

Abstract

To provide a semiconductor light emitting element capable of increasing light out-coupling efficiency and a method for manufacturing the same.SOLUTION: A semiconductor light emitting element has a first light-emitting part including a first n-side nitride semiconductor layer, a first active layer on the first n-side nitride semiconductor layer, and a first p-side nitride semiconductor layer on the first active layer, and a second n-side nitride semiconductor layer, and the first junction surface of the first light-emitting part and the second junction surface of the second n-side nitride semiconductor layer are directly bonded and a void exists between the first junction surface of the first light-emitting part and the second junction surface of the second n-side nitride semiconductor layer.SELECTED DRAWING: Figure 1A

Description

[Technical Field]

[0001] This disclosure relates to a semiconductor light-emitting element and a method for manufacturing the same. [Background technology]

[0002] In semiconductor light-emitting devices, in order to increase luminescence efficiency, it is necessary not only to emit light efficiently but also to efficiently extract the light emitted by the light-emitting layer (for example, Patent Document 1). [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2018-110173 [Overview of the project] [Problems that the invention aims to solve]

[0004] As the applications of semiconductor light-emitting devices expand, there is a growing demand for further improvements in light extraction efficiency.

[0005] Therefore, the object of this disclosure is to provide a semiconductor light-emitting element and a method for manufacturing the same that can improve light extraction efficiency. [Means for solving the problem]

[0006] To achieve the above objectives, the semiconductor light-emitting element relating to this disclosure is A first light-emitting section comprising a first n-side nitride semiconductor layer, a first active layer provided on the first n-side nitride semiconductor layer, and a first p-side nitride semiconductor layer provided on the first active layer, a second n-side nitride semiconductor layer; Includes, The first bonding surface of the first light-emitting portion and the second bonding surface of the second n-side nitride semiconductor layer are directly bonded. And, There is a gap between the first bonding surface of the first light-emitting part and the second bonding surface of the second n-side nitride semiconductor layer.

[0007] Moreover, the method for manufacturing a semiconductor light-emitting device according to the present disclosure is a step of preparing a first light-emitting part including a first active layer, a step of preparing a first semiconductor layer, a step of forming a first bonding surface including a first crystal plane by either treating the first main surface of the first light-emitting part with an acid or an alkali solution or polishing it, a step of forming a second bonding surface including a second crystal plane having a plane orientation different from that of the first crystal plane by either treating the second main surface of the first semiconductor layer with an acid or an alkali solution or polishing it, a step of forming a surface, a step of directly bonding the first bonding surface and the second bonding surface, and includes.

Advantages of the Invention

[0008] According to the semiconductor light-emitting device according to the present disclosure configured as described above, the light extraction efficiency of the semiconductor light-emitting device can be increased. Moreover, according to the semiconductor light-emitting device and the method for manufacturing the same according to the present disclosure, a semiconductor light-emitting device capable of increasing the light extraction efficiency can be manufactured.

Brief Description of the Drawings

[0009] [Figure 1A] It is a cross-sectional view of the semiconductor light-emitting device of Embodiment 1. [Figure 1B] It is a cross-sectional view showing the directly bonded part of the semiconductor light-emitting device of Embodiment 1 separated. [Figure 1C] It is a flowchart showing the manufacturing process of the semiconductor light-emitting device of Embodiment 1. [Figure 1D] It is a flowchart showing the details of the first light-emitting part preparation step S1. [Figure 1E] It is a flowchart showing the details of the second n-side nitride semiconductor layer preparation step S2. [Figure 1F]This is a schematic cross-sectional view showing one step of the first light-emitting section preparation process S1. [Figure 1G] This is a schematic cross-sectional view showing one step of the first light-emitting section preparation process S1. [Figure 1H] This is a schematic cross-sectional view showing one step of the second n-side nitride semiconductor layer preparation process S2. [Figure 1I] This is a schematic cross-sectional view showing one step of the second n-side nitride semiconductor layer preparation process S2. [Figure 1J] This is a schematic cross-sectional view showing one step of the second n-side nitride semiconductor layer preparation process S2. [Figure 1K] This is a schematic cross-sectional view showing one step of the direct bonding process S5. [Figure 1L] This is a schematic cross-sectional view showing one step of the direct bonding process S5. [Figure 2A] This is a cross-sectional view of the semiconductor light-emitting element of Embodiment 2. [Figure 2B] This is a cross-sectional view showing a separated portion of the directly bonded semiconductor light-emitting element of Embodiment 2. [Figure 3A] This is a cross-sectional view of the semiconductor light-emitting element of Embodiment 3. [Figure 3B] This is a cross-sectional view showing a separated portion of the directly bonded semiconductor light-emitting element of Embodiment 3. [Figure 3C] This is a flowchart showing the details of the preparation step S2 for the second n-side nitride semiconductor layer in Embodiment 3. [Figure 3D] This is a cross-sectional view of a semiconductor light-emitting element according to a modified example of Embodiment 3. [Figure 4A] This is a cross-sectional view of the semiconductor light-emitting element of Embodiment 4. [Figure 4B] This is a cross-sectional view showing a separated portion of the directly bonded semiconductor light-emitting element of Embodiment 4. [Figure 5A] This is a cross-sectional view of the semiconductor light-emitting element of Embodiment 5. [Figure 5B] This is a cross-sectional view showing a separated portion of the directly bonded semiconductor light-emitting element of Embodiment 5. [Figure 6] This is a cross-sectional view of a light-emitting device comprising a semiconductor light-emitting element according to one embodiment of the present disclosure. [Figure 7A]These are transmission electron microscope (TEM) images of the junction interface between the bonded layer and the second n-side nitride semiconductor layer in the semiconductor light-emitting element of Example 1, and its vicinity. [Figure 7B] Figure 7A shows the electron diffraction pattern at NBD1. [Figure 7C] Figure 7A shows the electron diffraction pattern at NBD2. [Figure 7D] Figure 7A shows the electron diffraction pattern at NBD3. [Figure 8] This graph shows the output ratio of the semiconductor light-emitting element in Example 1 and the output ratio of the semiconductor light-emitting element in the comparative example. [Figure 9A] These are transmission electron microscope (TEM) images of the junction interface and its vicinity in the semiconductor light-emitting element of Example 2. [Figure 9B] Figure 9A shows the electron diffraction pattern at SAD1. [Figure 9C] Figure 9A shows the electron diffraction pattern at SAD2. [Figure 9D] Figure 9A shows the electron diffraction pattern at NBD4. [Figure 10A] These are transmission electron microscope (TEM) images of the junction interface and its vicinity after annealing of the semiconductor light-emitting element of Example 2. [Figure 10B] Figure 10A shows the electron diffraction pattern at SAD3. [Figure 10C] Figure 10A shows the electron diffraction pattern at SAD4. [Figure 10D] Figure 10A shows the electron diffraction pattern at NBD5. [Modes for carrying out the invention]

[0010] The embodiments and examples for implementing this disclosure will be described below with reference to the drawings. The semiconductor devices and methods for manufacturing semiconductor devices described below are intended to embody the technical concept of this disclosure and, unless otherwise specified, this disclosure is not limited to the following. In each drawing, components with the same function may be denoted by the same reference numeral. For convenience, such as explaining key points or facilitating understanding, components may be shown separately as embodiments or examples, but partial substitution or combination of components shown in different embodiments or examples is possible. In the embodiments and examples described later, descriptions of matters common to those described above will be omitted, and only the differences will be explained. In particular, similar effects and benefits from similar components may not be mentioned sequentially in each embodiment or example. The size and positional relationships of components shown in each drawing may be exaggerated to clarify the explanation.

[0011] The semiconductor light-emitting element of the embodiment of the present disclosure includes a first light-emitting section comprising at least a first n-side nitride semiconductor layer, a first active layer provided on the first n-side nitride semiconductor layer, and a first p-side nitride semiconductor layer provided on the first active layer, and a second n-side nitride semiconductor layer directly bonded to the first light-emitting section. In the semiconductor light-emitting element of the embodiment, a gap is provided between the first bonding surface of the first light-emitting section and the second bonding surface of the second n-side nitride semiconductor layer, which are directly bonded. As a result, light from the first light-emitting section is scattered by the gap, thereby increasing the light extraction efficiency of the semiconductor light-emitting element. Here, the gap is formed, for example, by irregularities due to the surface roughness of the first bonding surface and / or irregularities due to the surface roughness of the second bonding surface. In other words, in the semiconductor light-emitting element of the embodiment, the junction between the first junction surface of the first light-emitting part and the second junction surface of the second n-side nitride semiconductor layer has a first portion where the first junction surface and the second junction surface are directly joined, and a second portion where the first junction surface and the second junction surface face each other with a gap in between. Direct joining means bringing the components into direct contact without using resin or adhesive. When the first junction surface 51 and the second junction surface 52 are in direct contact, for example, a direct connection of atomic arrangements can be confirmed between the first junction surface 51 and the second junction surface 52. This direct connection of atomic arrangements can be confirmed, for example, by a high-resolution transmission electron microscope. Direct joining refers to cases where components are joined in direct contact by methods such as surface activation bonding or atomic diffusion bonding. Furthermore, in this specification, nitride semiconductor refers to a binary to quaternary semiconductor containing at least one of boron (B), aluminum (Al), gallium (Ga), and indium (In) and nitrogen (N).

[0012] Furthermore, in the semiconductor light-emitting element of the embodiment, the first bonding surface of the first light-emitting portion that is directly bonded to the second n-side nitride semiconductor layer may be on the side of the first n-side nitride semiconductor layer or on the side of the first p-side nitride semiconductor layer. For example, in a semiconductor light-emitting element including a translucent substrate on which a first n-side nitride semiconductor layer, a first active layer, and a first p-side nitride semiconductor layer are grown in sequence, light can be efficiently extracted by directly bonding the second n-side nitride semiconductor layer to the first p-side nitride semiconductor layer. Alternatively, the light extraction efficiency can also be increased by directly bonding the second n-side nitride semiconductor layer to the first n-side nitride semiconductor layer.

[0013] In the semiconductor light-emitting element of the embodiment configured as described above, the junction between the first junction surface of the first light-emitting part and the second junction surface of the second n-side nitride semiconductor layer has a first portion where the first junction surface and the second junction surface are directly joined, and a second portion where the first junction surface and the second junction surface face each other with an air gap between them. Therefore, the light emitted by the first light-emitting part can be efficiently scattered at the junction portion, and the light can be efficiently extracted from the light-emitting surface on the opposite side of the junction portion.

[0014] Below, we will explain more specific examples of configurations with reference to the drawings.

[0015] [Embodiment 1] Figure 1A is a cross-sectional view of the semiconductor light-emitting element of Embodiment 1. Figure 1B is a cross-sectional view showing the directly bonded portion separated for clarity. As shown in Figure 1A, the semiconductor light-emitting element of Embodiment 1 includes, for example, a translucent substrate 1 such as sapphire, a first light-emitting portion 10 provided on the substrate 1, and a second n-side nitride semiconductor layer 21 directly bonded to the first light-emitting portion 10. In particular, in the semiconductor light-emitting element of Embodiment 1, the first light-emitting portion 10 includes a first n-side nitride semiconductor layer 11 provided on the substrate 1, a first active layer 12 provided on the first n-side nitride semiconductor layer 11, a first p-side nitride semiconductor layer 13 provided on the first active layer 12, and further includes a bonded layer 15 provided on the first p-side nitride semiconductor layer 13. In the semiconductor light-emitting element of Embodiment 1, the first bonding surface 51 of the first light-emitting section 10, that is, the first bonding surface 51 of the layer to be bonded 15, and the second bonding surface 52 of the second n-side nitride semiconductor layer 21 are directly bonded. The bonding interface is formed between the layer to be bonded 15 and the second n-side nitride semiconductor layer 21. In Embodiment 1, the first bonding surface 51 and the second bonding surface 52 are directly bonded without the use of an adhesive, for example, by a surface activation bonding method. Furthermore, in the semiconductor light-emitting element of Embodiment 1, the bonded layer 15 is made of a nitride semiconductor containing n-type impurities. Compared to the case where the first p-side nitride semiconductor layer 13 and the second n-side nitride semiconductor layer 21 are directly bonded, the direct bonding of the bonded layer 15 and the second n-side nitride semiconductor layer 21 makes it easier to spread the current, thereby improving the luminous efficiency of the semiconductor light-emitting element.

[0016] The crystal planes of the first bonding surface 51 and the second bonding surface 52 that are directly bonded may be polar planes, semi-polar planes, or non-polar planes. Preferably, polar planes can be used for the crystal planes of the first bonding surface 51 and the second bonding surface 52 that are directly bonded. For example, the polar plane is the c plane. In this case, one of the first bonding surface 51 and the second bonding surface 52 is the -c plane and the other is the +c plane. This can improve the output of the light-emitting element. It can also improve the internal quantum efficiency. Furthermore, polar planes can be prepared more easily than semi-polar or non-polar planes, so they can be manufactured at low cost. In this specification, even if there is a deviation of about the off-angle of the growth substrate, they are referred to as the +c plane and the -c plane. The off-angle of the growth substrate is, for example, 0.5° or less. For example, the +c plane is the Ga plane of GaN, and the -c plane is the N plane of GaN.

[0017] The semiconductor light-emitting element of Embodiment 1, configured as described above, has a first junction surface 51 of the first light-emitting section 10, that is, the first junction surface 51 of the layer to be bonded 15, and the second junction surface 52 of the second n-side nitride semiconductor layer 21. This junction portion has a first part where the first junction surface 51 and the second junction surface 52 are directly bonded, and a second part where the first junction surface 51 and the second junction surface 52 face each other with an air gap 53 in between. This allows the light emitted by the first light-emitting section 10 to be scattered at the junction portion, enabling efficient light extraction. The light emitted from the first light-emitting unit 10 is thought to be scattered by Rayleigh scattering, for example, by the air gap 53. By utilizing this, the light from the first light-emitting unit 10 can be efficiently extracted from the substrate 1 side.

[0018] Furthermore, it is preferable to create a tunnel junction between the bonded layer 15 and the first p-side nitride semiconductor layer 13 by increasing the n-type impurity concentration of the bonded layer 15 and / or the p-type impurity concentration of the first p-side nitride semiconductor layer 13. By creating a tunnel junction between the bonded layer 15 and the first p-side nitride semiconductor layer 13, the width of the depletion layer formed between them can be narrowed, thereby enabling effective current injection into the first active layer 12. The configurations of each semiconductor element in Embodiment 1 will be described in detail below.

[0019] <Circuit board> The material of the substrate 1 is, for example, sapphire, Si, SiC, or GaN. A buffer layer may be provided between the substrate 1 and the first n-side nitride semiconductor layer 11. The substrate 1 may be removed after the semiconductor layer, such as the first n-side nitride semiconductor layer 11, has been grown.

[0020] <First light-emitting section 10> The first light-emitting section 10 includes a first n-side nitride semiconductor layer 11, a first active layer 12, and a first p-side nitride semiconductor layer 13, and is constructed by stacking multiple semiconductor layers made of nitride semiconductors. The nitride semiconductor is In x Al y Ga 1-x-y The semiconductor may contain all compositions in which the composition ratios x and y are varied within their respective ranges in a chemical formula consisting of N (0≦x≦1, 0≦y≦1, x+y≦1). In the first light-emitting section 10, the first n-side nitride semiconductor layer 11, the first active layer 12, and the first p-side nitride semiconductor layer 13 are arranged in this order from the substrate 1 side.

[0021] <First n-side nitride semiconductor layer 11> The first n-side nitride semiconductor layer 11 has a nitride semiconductor layer containing n-type impurities such as silicon (Si) and germanium (Ge). The first n-side nitride semiconductor layer 11 includes one or more n-type nitride semiconductor layers. The first n-side nitride semiconductor layer 11 may also include an undoped semiconductor layer in part. Here, an undoped semiconductor layer refers to a layer that does not intentionally contain n-type impurities and / or p-type impurities. The concentrations of n-type and p-type impurities in the undoped semiconductor layer are below the detection limit in analytical results such as secondary ion mass spectrometry (SIMS). In the undoped semiconductor layer, for example, if Si is included as an n-type impurity, the n-type impurity concentration is 1 × 10⁻⁶. 16 cm -3 The following applies: If Ge is present as an n-type impurity, the n-type impurity concentration is 1 × 10⁻⁶. 17 cm -3The following is the case. The first n-side nitride semiconductor layer 11 includes, for example, an n-type GaN layer, and the thickness of the n-type GaN layer can be 5 μm or more and 15 μm or less. When the n-type GaN layer contains Si as an n-type impurity, the n-type impurity concentration of the n-type GaN layer is, for example, 1×10 18 cm -3 or more and 1×10 19 cm -3 or less.

[0022] <The first active layer 12> The first active layer 12 is provided between the first n-side nitride semiconductor layer 11 and the first p-side nitride semiconductor layer 13. The first active layer 12 is a light-emitting layer. The first active layer 12 is, for example, a nitride semiconductor layer that emits light with a peak emission wavelength range of 200 nm or more and 760 nm or less. The first active layer 12 has, for example, a multiple quantum well structure having a plurality of well layers and a plurality of barrier layers. When the first active layer 12 is a quantum well structure that emits light in the above wavelength range, the well layer is, for example, GaN, InGaN or AlGaN, and the barrier layer is, for example, AlGaN or GaN. Note that a superlattice layer in which an undoped GaN layer and an undoped InGaN layer are alternately stacked may be formed between the first n-side nitride semiconductor layer 11 and the first active layer 12.

[0023] <The first p-side nitride semiconductor layer 13> The first p-side nitride semiconductor layer 13 has, for example, a nitride semiconductor layer containing a p-type impurity such as magnesium (Mg). The first p-side nitride semiconductor layer 13 includes one or more p-type nitride semiconductor layers. In order to form a tunnel junction with the bonding layer 15 described later, it is preferable that at least the layer in contact with the bonding layer 15 is a nitride semiconductor layer containing a p-type impurity. The nitride semiconductor constituting the p-type nitride semiconductor layer is, for example, a p-type GaN layer, and may contain In and / or Al. The thickness of the p-type GaN layer can be 0.04 μm or more and 0.2 μm or less. When the p-type GaN layer contains Mg as a p-type impurity, the p-type impurity concentration of the p-type GaN layer is, for example, 1×10 19 cm -3 or more and 3×10 20 cm -3The following is possible. Furthermore, the first p-side nitride semiconductor layer 13 may include, for example, an undoped semiconductor layer.

[0024] <Joined layer 15> The first light-emitting section 10 further includes a bonded layer 15, and the upper surface of the bonded layer 15 can be the first bonding surface 51. The bonded layer 15 is, for example, a nitride semiconductor layer containing n-type impurities such as Si and Ge. The bonded layer 15 is formed in contact with the first p-side nitride semiconductor layer 13. The bonded layer 15 is, for example, an n-type GaN layer, and may also contain In and / or Al. The n-type impurity concentration of the bonded layer 15 is greater than the n-type impurity concentration contained in the second n-side nitride semiconductor layer 21, which will be described later. This allows the current to diffuse widely in the in-plane direction, and the current can be spread to the region directly below the void 53. In addition, the width of the depletion layer formed between the bonded layer 15 and the first p-side nitride semiconductor layer 13 can be narrowed, so that current can be effectively injected into the first active layer 12. The concentration of n-type impurities in the bonded layer 15 is, for example, 2 × 10⁻⁶ 20 cm -3 The above 1 x 10 22 cm -3 The following range allows for the formation of a tunnel junction with the first p-side nitride semiconductor layer 13, thereby reducing the forward voltage, for example. The concentration of n-type impurities in the bonded layer 15 is preferably 2 × 10⁻⁶. 20 cm -3 The above 1 x 10 21 cm -3 The following, more preferably, 2 × 10 20 cm -3 The above 5 x 10 20 cm -3The following applies. This allows for the formation of a tunnel junction with the first p-side nitride semiconductor layer 13 while reducing the deterioration of the crystallinity of the bonded layer 15 due to high impurity concentration, thereby suppressing a decrease in the characteristics of the semiconductor light-emitting element. The n-type impurity concentration in the bonded layer 15 may be uniform or vary in steps within the bonded layer 15. The thickness of the bonded layer 15 is, for example, 10 nm to 200 nm, preferably 10 nm to 100 nm, more preferably 20 nm to 50 nm, and even more preferably 30 nm to 45 nm. This allows for a narrower depletion layer width, reducing the forward voltage and improving the output. The thickness of the bonded layer 15 can also be analyzed in detail by using, for example, STEM (scanning transmission electron microscope) and EDS (energy-dispersive X-ray spectroscopy) analysis in combination.

[0025] <Second n-side nitride semiconductor layer> The second n-side nitride semiconductor layer 21 includes a nitride semiconductor layer containing n-type impurities such as silicon (Si) and germanium (Ge). The second n-side nitride semiconductor layer 21 includes one or more n-type nitride semiconductor layers. The second n-side nitride semiconductor layer 21 may also include an undoped semiconductor layer in part. The n-type impurity concentration (third concentration) of the second n-side nitride semiconductor layer 21 is smaller than the n-type impurity concentration of the bonded layer 15. The second n-side nitride semiconductor layer 21 includes, for example, an n-type GaN layer, and the thickness of the n-type GaN layer can be 0.1 μm or more and 15 μm or less. Preferably, the thickness of the n-type GaN layer can be 0.1 μm or more and 5 μm or less, more preferably 0.1 μm or more and 3 μm or less, and particularly preferably 0.1 μm or more and 1 μm or less. This can reduce light absorption in the second n-side nitride semiconductor layer 21. If the n-type GaN layer contains Si as an n-type impurity, the n-type impurity concentration of the n-type GaN layer is, for example, 1 × 10⁻⁶. 18 cm -3 The above 1 x 10 19 cm -3 The following is possible:

[0026] The following describes a method for manufacturing a semiconductor device according to Embodiment 1. The semiconductor light-emitting device is manufactured, for example, by the MOCVD (metal-organic chemical vapor deposition) method in a furnace in which the pressure and temperature can be controlled. Each nitride semiconductor layer can be formed by introducing a carrier gas and a raw material gas into the furnace. Hydrogen (H2) gas or nitrogen (N2) gas can be used as the carrier gas. Ammonia (NH3) gas can be used as the raw material gas for the N source. Trimethylgallium (TMG) gas or triethylgallium (TEG) gas can be used as the raw material gas for the Ga source. Trimethylindium (TMI) gas can be used as the raw material gas for the In source. Trimethylaluminum (TMA) gas can be used as the raw material gas for the Al source. Monosilane (SiH4) gas can be used as the raw material gas for the Si source. Bis(cyclopentadienyl)magnesium (Cp2Mg) gas can be used as the raw material gas for the Mg source.

[0027] A method for manufacturing a semiconductor device according to the embodiment includes the steps of: preparing a first light-emitting portion including a first active layer; preparing a first semiconductor layer; forming a first bonding surface including a first crystal plane by treating the first main surface of the first light-emitting portion with an acid or alkaline solution, or by polishing it; forming a second bonding surface including a second crystal plane having a different crystal orientation from the first crystal plane by treating the second main surface of the first semiconductor layer with an acid or alkaline solution, or by polishing it; and directly bonding the first bonding surface and the second bonding surface.

[0028] The step of preparing the first light-emitting section is, for example, the step of preparing a first light-emitting section that includes a first n-side nitride semiconductor layer, a first active layer provided on the first n-side nitride semiconductor layer, and a first p-side nitride semiconductor layer provided on the first active layer. The step of preparing the first semiconductor layer is, for example, the step of preparing a second n-side nitride semiconductor layer.

[0029] As shown in Figure 1C, the method for manufacturing a semiconductor device according to this embodiment includes a first light-emitting part preparation step S1, a second n-side nitride semiconductor layer preparation step S2, a first bonding surface formation step S3, a second bonding surface formation step S4, and a direct bonding step S5. Here, in the method for manufacturing a semiconductor device according to Embodiment 1, which includes a layer to be bonded 15, the first light-emitting part preparation step S1 includes a first light-emitting structure preparation step S11 and a layer to be bonded preparation step S12, as shown in Figure 1D. The following describes in detail each step in the semiconductor device manufacturing method according to Embodiment 1.

[0030] <First light-emitting section preparation step S1> In the first light-emitting section preparation step S1, a first light-emitting section 10 is prepared, which includes a first n-side nitride semiconductor layer 11, a first active layer 12 provided on the first n-side nitride semiconductor layer 11, and a first p-side nitride semiconductor layer 13 provided on the first active layer 12. In the manufacturing method of Embodiment 1, in the first light-emitting structure preparation step S11, the first light-emitting structure is prepared by growing the first n-side nitride semiconductor layer 11, the first active layer 12, and the first p-side nitride semiconductor layer 13 on a substrate 1 made of, for example, sapphire. The first light-emitting structure can be formed, for example, by the MOCVD method. Next, in the bonded layer preparation step S12, a bonded layer 15 is prepared by growing a nitride semiconductor layer containing n-type impurities on the first light-emitting structure. The bonded layer 15 may be formed using the MOCVD method described above, or by other methods. For example, it can be formed by physical vapor deposition (also known as physical vapor deposition (PVD)). As a PVD method, for example, sputtering or molecular beam epitaxy (MBE) can be used. It is preferable to use the MBE method for forming the bonded layer 15. This allows the bonded layer 15 to grow with good crystallinity and reduces the voltage rise caused by the bonded layer 15. In this way, the first light-emitting section 10 including the first light-emitting structure and the bonded layer 15 is prepared.

[0031] In the first light-emitting section preparation step S1, it is preferable to grow the surface that will become the bonding surface of the layer to be bonded 15 (the first main surface of the first light-emitting section 10) to a specific crystal plane (hereinafter referred to as the first crystal plane). For example, if a first n-side nitride semiconductor layer 11, a first active layer 12, a first p-side nitride semiconductor layer 13, and a layer to be bonded 15 are grown on the c-plane of a substrate 1 made of sapphire, the first crystal plane, which is the bonding surface of the layer to be bonded 15, will be the +c plane. Here, the +c plane is the end plane of a group III element. The -c plane is the N plane.

[0032] <Second n-side nitride semiconductor layer preparation step S2> In the second n-side nitride semiconductor layer preparation step S2, the second n-side nitride semiconductor layer 21 is prepared. As shown in Figure 1E, the second n-side nitride semiconductor layer preparation step S2 may include a growth substrate preparation step S21, a support substrate preparation step S22, a second n-side nitride semiconductor layer formation step S23, an adhesion step S24, and a growth substrate removal step S25. Here, first, in the growth substrate preparation step S21, a growth substrate made of, for example, sapphire is prepared. Next, in the support substrate preparation step S22, a support substrate 105 made of, for example, sapphire is prepared. Next, in the second n-side nitride semiconductor layer formation step S23, a second n-side nitride semiconductor layer 21 made of a nitride semiconductor containing n-type impurities is grown on the growth substrate 101 by the MOCVD method (Figure 1H). Next, in the bonding step S24, a resin layer 103 and a support substrate 105 are provided on the second n-side nitride semiconductor layer 21 in this order (Figure 1I). Finally, in the growth substrate removal step S25, the growth substrate 101 is removed from the second n-side nitride semiconductor layer 21 (Figure 1J). Preferably, the surface that becomes the bonding surface of the second n-side nitride semiconductor layer 21 (hereinafter also referred to as the second main surface) is a crystal plane with a different plane orientation from the first crystal plane (second crystal plane). Because the plane orientations of the second crystal plane and the first crystal plane are different, it is easier to create a difference in the arithmetic mean roughness of each bonding surface in the first bonding surface formation process and the second bonding surface formation process described later, and the formation of voids 53 is facilitated. For example, when a second n-side nitride semiconductor layer 21 is grown on the c-plane of a growth substrate 101 made of sapphire, the second crystal plane obtained by removing the growth substrate is the -c plane, and its plane orientation is different from that of the first crystal plane, which is the +c plane.

[0033] <First joint surface formation step S3> In the first bonding surface formation step S3, the first main surface of the first light-emitting part 10 is treated with an acid or alkaline solution and cleaned. This removes oxide films formed on the surface and unwanted bonds that inhibit direct bonding. Unwanted bonds that inhibit direct bonding refer to bonds that do not form nitrides. For example, bonds between Ga atoms. Such unwanted bonds that inhibit direct bonding are thought to be caused, for example, by the cooling process after the formation of the bonded layer, where the temperature is lower than the conditions for growing nitrides. This treatment with the acid or alkaline solution allows for the formation of a first bonding surface 51 including a first crystal plane. The first bonding surface 51 including a first crystal plane can be formed, for example, by immersing the first main surface of the first light-emitting part 10 in an acid or alkaline solution. In the first bonding surface formation step S3, this treatment with the acid or alkaline solution allows for the formation of nanometer-order irregularities on the first bonding surface 51. Here, nanometer-order irregularities refer to irregularities formed on a surface that has been flattened to have an arithmetic mean roughness of 3 nm or less. The nanometer-order irregularities are preferably formed on a surface flattened to have an arithmetic mean roughness of 1 nm or less, and more preferably on a surface flattened to have an arithmetic mean roughness of 0.5 nm or less. This allows the first light-emitting part 10 and the second n-side nitride semiconductor layer to be directly bonded. As for the acid or alkaline solution, in the case of an acid, for example, H2SO4 (sulfuric acid), HF (hydrofluoric acid), or HCl (hydrochloric acid) can be used. As for the alkaline solution, for example, TMAH (tetramethylammonium hydroxide) or KOH (potassium hydroxide) can be used. It is preferable to use TMAH as the acid or alkaline solution. This allows for the removal of organic matter, oxide films, residual metals, etc., from the first main surface. As for the treatment conditions with the acid or alkaline solution, in the case of TMAH, for example, the treatment temperature is 30°C to 90°C, preferably 50°C to 85°C. Also, in the case of TMAH, the treatment time is, for example, 1 minute to 30 minutes. For example, it can be immersed in water at 70°C for 20 minutes.If the first crystal plane is a +c plane, it is preferable not to perform chemical mechanical polishing (CMP), as described later, on the first principal plane. If the first crystal plane is a +c plane, treating the first principal plane with an acid or alkali solution will result in a first bonding surface with a lower arithmetic mean roughness than CMPing the first principal plane.

[0034] <Second joint surface formation step S4> In the second bonding surface formation step S4, the second main surface of the second n-side nitride semiconductor layer 21 is polished, for example, by CMP to remove oxide films and other materials formed on the surface and to flatten the surface. This forms a second bonding surface 52 that includes a second crystal plane having a different crystal orientation from the first crystal plane. In the second bonding surface formation step S4, CMP can be performed to form a flattened second bonding surface 52 with less unevenness than the first bonding surface 51. The arithmetic mean roughness of the second bonding surface 52 is 1 nm or less, preferably 0.5 nm or less, and more preferably 0.2 nm or less. Here, CMP is performed using a pad while mixing silica particles with an alkaline solution such as KOH and dropping it as a slurry. Alternatively, mechanical polishing may be performed on the second main surface before CMP in the second bonding surface formation step S4.

[0035] <Direct joining process S5> In the direct bonding process S5, a first bonding surface 51 containing a first crystal plane and a second bonding surface 52 containing a second crystal plane having a different orientation from the first bonding surface are directly bonded (Figures 1K and 1L). This direct bonding is performed, for example, by a surface activation bonding method between the first bonding surface 51 and the second bonding surface 52. The surface activation bonding method is generally a method in which both bonding surfaces are planarized and cleaned before bonding. The cleaning process is performed, for example, by irradiating each bonding surface with an ion beam in a vacuum chamber. In Embodiment 1, the first bonding surface 51 obtained by treatment with this acid or alkaline solution has irregularities on the order of nanometers. On the other hand, the second bonding surface 52 is planarized by CMP so that its irregularities are smaller than those of the first bonding surface 51. These first bonding surface 51 and second bonding surface 52 are directly bonded. The bonding interface is formed between the layer to be bonded 15 and the second n-side nitride semiconductor layer 21. By directly joining them in this manner, the joint portion of the first joining surface 51 and the second joining surface 52 can be formed as follows: a first portion where the first joining surface 51 and the second joining surface 52 are directly joined, and a second portion where the first joining surface 51 and the second joining surface 52 face each other with a gap 53 in between. That is, the joint portion of the first joining surface 51 and the second joining surface 52 can be formed as follows: a first portion where the first joining surface 51 and the second joining surface 52 are in direct contact without an adhesive, and a second portion where the first joining surface 51 and the second joining surface 52 face each other with a gap 53 in between. When the first joining surface 51 and the second joining surface 52 are in direct contact, for example, a direct connection of atomic arrangements between the first joining surface 51 and the second joining surface 52 can be confirmed. This direct connection of atomic arrangements can be confirmed, for example, by a high-resolution transmission electron microscope. The joint interface between the first light-emitting part 10 and the second n-side nitride semiconductor layer 21, which includes a gap, can include a crystalline region. This reduces light absorption at the junction interface. The crystalline region may be a single crystal region. The size of the void 53 is on the order of nanometers, and the maximum length of the void 53 is, for example, in the range of 50 nm or less, preferably 30 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less. This makes the void 53 sufficiently smaller than the wavelength of light from the first light-emitting part 10, and allows the light from the first light-emitting part 10 to be scattered effectively. The maximum length of the void 53 can be estimated by the following method.A cross-sectional TEM image of the semiconductor light-emitting element is observed, and the length of the major axis of each void observed between the first bonding surface 51 and the second bonding surface 52 is measured within a range of approximately 660 μm along the bonding interface. The largest of these can be estimated as the maximum length of the void 53. The size of this void 53 can be adjusted to the desired size by, for example, adjusting the type of acid or alkali solution in the first bonding surface formation step S3, the processing conditions, and the bonding conditions in the direct bonding step. Here, the bonding conditions in the surface activation bonding method include the ion beam irradiation time, the pressure applied to bonding, the temperature when applying pressure, and the time the pressurized state is maintained. The pressure applied when performing the surface activation bonding method is, for example, 10 MPa or more and 200 MPa or less, preferably 50 MPa or more and 150 MPa or less. The temperature range when applying pressure is, for example, 0°C or more and 70°C or less, preferably 0°C or more and 50°C or less, more preferably 0°C or more and 30°C or less. This allows the first light-emitting section 10 and the second n-side nitride semiconductor layer 21 to be firmly bonded together.

[0036] Furthermore, when joining in the direct joining process, the crystal axis direction within the plane of the first crystal plane and the crystal axis direction within the plane of the second crystal plane may or may not coincide. For example, if the first crystal plane is a +c plane and the second crystal plane is a -c plane, the a-axis direction within the plane of the first crystal plane (+c plane) and the a-axis direction within the plane of the second crystal plane (-c plane) may be offset during joining. This eliminates the need for a step to align the orientations within each joining plane in the direct joining process, thereby simplifying the manufacturing process. According to the manufacturing method of Embodiment 1, even if the crystal axis direction within the plane of the first crystal plane and the crystal axis direction within the plane of the second crystal plane are offset during direct joining, the crystal planes (first crystal plane and second crystal plane) can be joined together. It is generally thought that joining is difficult when the crystal axes are offset because stress and / or strain are applied to the joining plane. However, in the direct bonding process according to Embodiment 1, the first light-emitting portion and the second n-side nitride semiconductor layer can be firmly bonded. The misalignment of the crystal axes can be confirmed by performing a φ scan of the asymmetric plane to verify the rotational symmetry of the asymmetric plane. The misalignment of the crystal axes of the first and second crystal planes is repeatedly observed according to the rotational symmetry. The asymmetric plane is, for example, the (102) plane of gallium nitride.

[0037] Furthermore, it is preferable to anneal the first bonding surface 51 and the second bonding surface 52 after directly bonding them. This reduces the electrical resistance of the semiconductor light-emitting element. This is thought to be because the adhesion is improved while maintaining the crystallinity near the bonding interface. This annealing is performed, for example, without applying pressure. The temperature range inside the furnace during heat treatment is, for example, 300°C to 700°C, preferably 350°C to 600°C, and more preferably 350°C to 450°C. The annealing temperature is appropriately set within the above temperature range depending on the nitride semiconductor material constituting the bonded layer 15 and the secondn-side nitride semiconductor layer 21. For example, when both the bonded layer 15 and the secondn-side nitride semiconductor layer 21 are made of GaN, it is considered that annealing within the above temperature range can improve the adhesion between the bonded layer 15 and the secondn-side nitride semiconductor layer 21 while maintaining crystallinity.

[0038] Furthermore, this annealing process allows for the simultaneous heating of the resin layer 103 and the support substrate 105 provided on the second n-side nitride semiconductor layer 21. In other words, this annealing process allows for the removal of the support substrate 105 by melting or burning the resin layer 103. This prevents the second n-side nitride semiconductor layer 21 from peeling off the first light-emitting section 10 when the support substrate 105 is removed from the resin layer 103. After removing the resin layer and the support substrate, the surface of the second n-side nitride semiconductor layer 21 can be cleaned, and electrodes 26 can be formed on the cleaned surface.

[0039] In the manufacturing method of Embodiment 1 configured as described above, in the first bonding surface formation step S3, the first main surface of the first light-emitting part 10 is treated with an acid or alkaline solution to form a first bonding surface 51 including a first crystal plane, and in the second bonding surface formation step S4, the second main surface of the second n-side nitride semiconductor layer 21 is polished to form a second bonding surface 52 including a second crystal plane having a different crystal orientation from the first crystal plane, and then in the direct bonding step S5, the first bonding surface 51 and the second bonding surface 52 are directly bonded. This allows the crystal planes (first crystal plane and second crystal plane) to come into contact at the joint, resulting in a good bond, and also allows for the formation of a nanometer-order void 53 between the first and second crystal planes. Here, the maximum length of the void 53 is in the range of 50 nm or less, preferably 30 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less.

[0040] Therefore, the semiconductor light-emitting element manufactured by the manufacturing method of Embodiment 1 has a nanometer-order void 53 between the first crystal plane and the second crystal plane, which allows the light emitted from the first light-emitting part 10 to be scattered, and thus enables efficient extraction of light from the semiconductor light-emitting element.

[0041] In the semiconductor light-emitting device of Embodiment 1, a configuration was described in which the layer to be bonded 15 is provided on the first p-side nitride semiconductor layer 13. However, the second n-side nitride semiconductor layer 21 can also include the layer to be bonded 15, and the lower surface of the layer to be bonded 15 can be used as the second bonding surface. That is, the first bonding surface 51 formed on the upper surface of the first p-side nitride semiconductor layer 13 and the second bonding surface 52 formed on the lower surface of the layer to be bonded 15 included in the second n-side nitride semiconductor layer 21 can be directly bonded. The bonding interface is formed between the first p-side nitride semiconductor layer 13 and the layer to be bonded 15. Similar to Embodiment 1, the directly bonded portion includes a first portion in which the first bonding surface 51 and the second bonding surface 52 are directly bonded, and a second portion in which the first bonding surface 51 and the second bonding surface 52 face each other with a gap 53 in between. This allows the light emitted by the first light-emitting unit 10 to be scattered in the bonded portion, thereby increasing the light extraction efficiency. Furthermore, since the semiconductor light-emitting element includes a junction layer containing n-type impurities, the current can be broadened, further increasing the light extraction efficiency of the semiconductor light-emitting element.

[0042] In Embodiment 1 described above, the region near the bonding interface containing the void 53 may form a region with disordered crystallinity compared to a region sufficiently far from the bonding interface formed by direct bonding. A region sufficiently far from the bonding interface is, for example, a region where a periodic atomic arrangement is clearly observed in TEM analysis. This periodic atomic arrangement may be, for example, in a region more than 5 nm away from the bonding interface. It may also be in a region more than 20 nm away from the bonding interface. For example, the region including the bonding interface may form a distorted region compared to the interior of the bonded layer 15 and the second n-side nitride semiconductor layer 21 sufficiently far from the bonding interface. Figure 1A exaggerates and illustrates a state in which a region with disordered crystallinity is formed at a bonding interface containing a void formed by direct bonding, as confirmed in Embodiment 2 described later. However, a region with disordered crystallinity does not necessarily have to be formed at the bonding interface in this way. Note that in other embodiments described later, regions with disordered crystallinity are illustrated similarly to Figure 1A.

[0043] [Embodiment 2] Figure 2A is a cross-sectional view of the semiconductor light-emitting element of Embodiment 2. Figure 2B is a cross-sectional view that separates and shows the directly bonded portion in order to clearly show the directly bonded portion. As shown in Figure 2A, the semiconductor light-emitting element of Embodiment 2 is configured the same as the semiconductor light-emitting element of Embodiment 1, except that it does not include the bonded layer 15.

[0044] Specifically, as shown in Figure 2A, the semiconductor light-emitting element of Embodiment 2 includes, for example, a translucent substrate 1 such as sapphire, a first light-emitting section 10 including a first n-side nitride semiconductor layer 11, a first active layer 12, and a first p-side nitride semiconductor layer 13 provided on the substrate 1, and a second n-side nitride semiconductor layer 21 directly bonded to the first light-emitting section 10. In the semiconductor light-emitting element of Embodiment 2, the first light-emitting section 10 includes a first n-side nitride semiconductor layer 11 provided on the substrate 1, a first active layer 12 provided on the first n-side nitride semiconductor layer 11, and a first p-side nitride semiconductor layer 13 provided on the first active layer 12, the upper surface of the first p-side nitride semiconductor layer 13 being a first bonding surface 51, and the first bonding surface 51 and the second bonding surface 52 of the second n-side nitride semiconductor layer 21 being directly bonded. The junction interface is formed between the first p-side nitride semiconductor layer 13 and the second n-side nitride semiconductor layer 21.

[0045] In the manufacturing method of Embodiment 2, the surface of the first p-side nitride semiconductor layer 13 can be treated with an acid or alkaline solution to form a first bonding surface 51 including a first crystal plane. The second bonding surface 52 can be formed in the same manner as in Embodiment 1.

[0046] The semiconductor light-emitting element of Embodiment 2, configured as described above, has a first junction surface 51 of the first light-emitting section 10, that is, the junction surface 51 of the first p-side nitride semiconductor layer 13, and the second junction surface 52 of the second n-side nitride semiconductor layer 21. Similar to Embodiment 1, the junction surface 51 and the second junction surface 52 are directly joined, and a second junction surface 51 and the second junction surface 52 face each other with a gap 53 in between. This allows the light emitted by the first light-emitting section 10 to be scattered at the junction, similar to the semiconductor light-emitting element of Embodiment 1, and light to be extracted efficiently.

[0047] [Embodiment 3] Figure 3A is a cross-sectional view of the semiconductor light-emitting element of Embodiment 3. Figure 3B is a cross-sectional view showing the directly bonded portion separated for clarity. As shown in Figure 3A, the semiconductor light-emitting element of Embodiment 3 includes, for example, a translucent substrate 1 such as sapphire, a first light-emitting portion 10 provided on the substrate 1, and a second light-emitting portion 20 including a second n-side nitride semiconductor layer 21 that is directly bonded to the first light-emitting portion 10. The semiconductor light-emitting element of Embodiment 3 is configured similarly to the semiconductor light-emitting element of Embodiment 1, except that it includes the second light-emitting portion 20. That is, in the semiconductor light-emitting element of Embodiment 3, the first light-emitting portion 10 includes a bonded layer 15 provided on a first p-side nitride semiconductor layer 13, and the first bonding surface 51 of the bonded layer 15 and the second bonding surface 52 of the second n-side nitride semiconductor layer 21 are directly bonded. The bonding interface is formed between the bonded layer 15 and the second n-side nitride semiconductor layer 21. In the semiconductor light-emitting element of Embodiment 3, the bonded layer 15 is composed of a nitride semiconductor containing n-type impurities, similar to the semiconductor light-emitting element of Embodiment 1.

[0048] In the semiconductor light-emitting element of Embodiment 3, the second light-emitting section 20 includes a second n-side nitride semiconductor layer 21, a second active layer 22 provided on the second n-side nitride semiconductor layer 21, and a second p-side nitride semiconductor layer 23 provided on the second active layer 22. The second p-side nitride semiconductor layer is provided on the side opposite to the second junction surface of the second n-side nitride semiconductor layer. Here, the peak wavelength of the light emitted by the first light-emitting unit 10 and the peak wavelength of the light emitted by the second light-emitting unit 20 may be different or the same, but it is preferable that they be different. Since the ease with which light scattering occurs in the air gap 53 can be changed for each wavelength, the light emitted from the semiconductor light-emitting element including the first light-emitting unit 10 and the second light-emitting unit 20 can be efficiently extracted from either the substrate 1 side or the second light-emitting unit 20 side. For example, when mounting a semiconductor light-emitting element as a flip chip, it is preferable that the peak wavelength of the light emitted by the first light-emitting unit 10 is shorter than the peak wavelength of the light emitted by the second light-emitting unit 20. This is because Rayleigh scattering is expected to occur in the air gap 53. Rayleigh scattering is more likely to occur with shorter wavelength light and less likely with longer wavelength light. As a result, by making the wavelength of the light emitted by the first light-emitting unit 10 shorter than that of the light emitted by the second light-emitting unit 20, it is possible to make the light emitted by the first light-emitting unit 10 more easily scattered by the air gap 53, and the light emitted by the second light-emitting unit 20 less easily scattered by the air gap 53. Therefore, light from both the first light-emitting section 10 and the second light-emitting section 20 can be efficiently extracted. The semiconductor light-emitting element can emit light with shorter peak wavelengths in order from the light-emitting section closest to the light extraction surface. For example, the semiconductor light-emitting element can emit blue light and green light, blue light and red light, or green light and red light. Furthermore, when the semiconductor light-emitting element is mounted face up, it is thought that if the peak wavelength of the light emitted by the second light-emitting section 20 is made shorter than the peak wavelength of the light emitted by the first light-emitting section 10, light from both the first and second light-emitting sections can be efficiently extracted in a similar manner.

[0049] The semiconductor light-emitting element of Embodiment 3, configured as described above, has a first portion where the first bonding surface 51 of the bonded layer 15 and the second bonding surface 52 of the second n-side nitride semiconductor layer 21 are directly bonded, and a second portion where the first bonding surface 51 and the second bonding surface 52 face each other with an air gap 53 in between. This allows the light emitted by the first light-emitting part or the second light-emitting part to be scattered at the bonding portion, thereby efficiently extracting light from the semiconductor light-emitting element.

[0050] Furthermore, in the semiconductor light-emitting element of Embodiment 3, it is preferable to make the junction between the bonded layer 15 and the first p-side nitride semiconductor layer 13 a tunnel junction by increasing the n-type impurity concentration of the bonded layer 15 and / or the p-type impurity concentration of the first p-side nitride semiconductor layer 13. By making the junction between the bonded layer 15 and the first p-side nitride semiconductor layer 13 a tunnel junction, the width of the depletion layer formed between them can be narrowed, so that current can be effectively injected into the first active layer 12. In addition, the forward voltage can also be reduced.

[0051] Furthermore, in the method for manufacturing a semiconductor light-emitting element of Embodiment 3, the second n-side nitride semiconductor layer preparation step S2 is a step of preparing a second light-emitting unit that includes a second n-side nitride semiconductor layer, a second p-side nitride semiconductor layer provided on the side opposite to the second junction surface of the second n-side nitride semiconductor layer, and a second active layer provided between the second n-side nitride semiconductor layer and the second p-side nitride semiconductor layer. The second n-side nitride semiconductor layer preparation step S2 includes, for example, the second n-side nitride semiconductor layer formation step S201, the second active layer formation step S202, and the second p-side nitride semiconductor layer formation step S203 shown in Figure 3C, to prepare the second light-emitting unit 20.

[0052] Specifically, in the second n-side nitride semiconductor layer formation step S201, a second n-side nitride semiconductor layer 21 made of a nitride semiconductor containing n-type impurities is grown on a growth substrate made of, for example, sapphire. Next, in the second active layer formation step S202, a second active layer 22 is grown on the second n-side nitride semiconductor layer 21. Then, in the second p-side nitride semiconductor layer formation step S203, a second p-side nitride semiconductor layer 23 is grown on the second active layer 22. After growing the second p-side nitride semiconductor layer 23, a resin layer and a support substrate are sequentially formed on the second p-side nitride semiconductor layer 23, and the growth substrate is removed. The second n-side nitride semiconductor layer 21, the second active layer 22, and the second p-side nitride semiconductor layer can be formed by, for example, MOCVD or PVD. Thereafter, the semiconductor light-emitting element of Embodiment 3 can be fabricated by performing the first bonding surface formation step S3, the second bonding surface formation step S4, and the direct bonding step S5 in the same manner as in Embodiment 1.

[0053] As described in Embodiment 1, the second n-side nitride semiconductor layer 21 may include the layer to be bonded 15, and the lower surface of the layer to be bonded 15 may be used as the second bonding surface. That is, the first bonding surface 51 formed on the upper surface of the first p-side nitride semiconductor layer 13 and the second bonding surface 52 formed on the lower surface of the layer to be bonded 15 included in the second n-side nitride semiconductor layer 21 can be directly bonded.

[0054] In Embodiment 3, a semiconductor light-emitting element in which a first light-emitting element and a second light-emitting element are directly joined has been described. However, the following configuration is also possible. That is, as shown in Figure 3D, a third light-emitting element 30 can be provided on the second light-emitting element. This third light-emitting element 30 may be grown by MOCVD or PVD, or it may be formed by the direct joining described above, but direct joining is preferred. As a result, the first light-emitting element 10, the second light-emitting element 20, and the third light-emitting element 30 can be prepared from wafers in which they have been grown separately, thus reducing the thermal damage that each light-emitting element receives during growth compared to the case in which the first light-emitting element 10, the second light-emitting element 20, and the third light-emitting element 30 are grown sequentially. When the third light-emitting section 30 is directly bonded to the second light-emitting section 20, the process may include: preparing the third light-emitting section comprising a third n-side nitride semiconductor layer 31, a third active layer 32, and a third p-side nitride semiconductor layer 33; treating the third main surface of the second light-emitting section 20 with an acid or alkaline solution to form a third bonding surface including a third crystal plane; polishing the fourth main surface of the third n-side nitride semiconductor layer 31 to form a fourth bonding surface including a fourth crystal plane having a different orientation from the third crystal plane; and directly bonding the third bonding surface and the fourth bonding surface.

[0055] The semiconductor light-emitting element shown in Figure 3D has a third light-emitting element 30 in addition to the first light-emitting element 10 and the second light-emitting element 20. The third light-emitting element 30 includes a third n-side semiconductor layer 31, a third p-side semiconductor layer 33, and a third active layer 32 provided between the third n-side semiconductor layer 31 and the third p-side semiconductor layer 33. The third junction surface of the second light-emitting element 20 and the fourth junction surface of the third n-side semiconductor layer 31, which is on the opposite side from where the third p-side semiconductor layer is provided, are directly joined, and there is an air gap 53 between the third junction surface of the second light-emitting element 20 and the fourth junction surface of the third n-side semiconductor layer 31. This allows light to be scattered in the air gap 53, and light can be efficiently extracted from the semiconductor light-emitting element. The third junction surface is provided on the side opposite to the second junction surface.

[0056] Furthermore, the second light-emitting section 20 is disposed on the second p-side nitride semiconductor layer 23 and further includes a bonded layer 15 made of a nitride semiconductor layer containing n-type impurities, and the upper surface of the bonded layer 15 can be the third bonding surface. This semiconductor light-emitting device can be assembled by directly bonding the first light-emitting section 10 and the second light-emitting section 20, and then directly bonding the second light-emitting section 20 and the third light-emitting section 30, or by directly bonding the second light-emitting section 20 and the third light-emitting section 30, and then directly bonding the second light-emitting section 20 and the first light-emitting section 10. A gap 53 is provided between the third bonding surface and the fourth bonding surface of the second light-emitting section 20. The bonding portion between the third bonding surface of the second light-emitting section 20 and the fourth bonding surface of the third n-side nitride semiconductor layer 31 includes a third portion where the third bonding surface and the fourth bonding surface are directly bonded, and a fourth portion where the third bonding surface and the fourth bonding surface are opposed to each other via a gap. This allows light to be scattered in the air gap 53, enabling efficient extraction of light from the semiconductor light-emitting element. The light emitted by the first light-emitting section 10, the second light-emitting section 20, and the third light-emitting section 30 can all have different peak wavelengths. The semiconductor light-emitting element can, for example, emit light with shorter peak wavelengths in order from the light-emitting section closest to the light extraction surface. For example, the first light-emitting section 10 can emit blue light, the second light-emitting section 20 can emit green light, and the third light-emitting section 30 can emit red light. As a result, white light can be extracted by having a single semiconductor element emit blue, green, and red light.

[0057] [Embodiment 4] Figure 4A is a cross-sectional view of the semiconductor light-emitting element of Embodiment 4. Figure 4B is a cross-sectional view that separates and shows the directly bonded portion for easier understanding. As shown in Figure 4A, the semiconductor light-emitting element of Embodiment 4 is configured similarly to the semiconductor light-emitting element of Embodiment 3, except that it does not include the bonded layer 15.

[0058] Specifically, in the semiconductor light-emitting element of Embodiment 4, the upper surface of the first p-side nitride semiconductor layer 13 is the first junction surface 51, and this first junction surface 51 and the second junction surface 52 of the second n-side nitride semiconductor layer 21 are directly joined. The junction interface is formed between the first p-side nitride semiconductor layer 13 and the second n-side nitride semiconductor layer 21.

[0059] As described above, the semiconductor light-emitting element of Embodiment 4 has a junction portion where the first junction surface 51 of the first p-side nitride semiconductor layer 13 and the second junction surface 52 of the second n-side nitride semiconductor layer 21 are directly joined, and a portion where the first junction surface 51 and the second junction surface 52 face each other with a gap 53 in between. As a result, the semiconductor light-emitting element of Embodiment 4 can obtain the same effects as the semiconductor light-emitting element of Embodiment 3.

[0060] [Embodiment 5] Figure 5A is a cross-sectional view of the semiconductor light-emitting element of Embodiment 5. Figure 5B is a cross-sectional view showing the directly bonded portion separated for clarity. As shown in Figure 5A, the semiconductor light-emitting element of Embodiment 5 is configured similarly to the semiconductor light-emitting element of Embodiment 1, except that the first bonding surface 51 and the second bonding surface 52 are directly bonded via the metal layer 40.

[0061] Specifically, the semiconductor light-emitting element of Embodiment 5 differs from the semiconductor light-emitting element of Embodiment 1 in that a first metal layer 41 and a second metal layer 42 are provided on the first bonding surface 51 of the bonded layer 15 and on the second bonding surface 52 of the second n-side nitride semiconductor layer 21, respectively, and the first metal layer 41 and the second metal layer 42 are directly bonded by atomic diffusion bonding. Examples of materials for the first metal layer 41 and the second metal layer 42 include aluminum, titanium, and gold. The materials for the first metal layer 41 and the second metal layer 42 may be the same or different. Furthermore, the thickness of the first metal layer 41 and the second metal layer 42 can be, for example, 0.2 nm to 5 nm, preferably 0.4 nm to 2 nm. This makes it possible to reduce the absorption of light emitted from the first light-emitting part while maintaining bonding strength.

[0062] The semiconductor light-emitting element of Embodiment 5, configured as described above, has a first portion where the first junction surface 51 of the first light-emitting section 10 and the second junction surface 52 of the second n-side nitride semiconductor layer 21 are directly joined via a metal layer 40, and a second portion where the first junction surface 51 and the second junction surface 52 face each other via a gap 53. This allows for efficient scattering of light emitted by the first active layer 12 at the junction portion, thereby efficiently extracting light from the semiconductor light-emitting element.

[0063] Furthermore, similar to Embodiments 3 and 4, a second light-emitting unit 20 is prepared, which includes a second n-side nitride semiconductor layer 21, a second active layer 22 provided on the second n-side nitride semiconductor layer 21, and a second p-side nitride semiconductor layer 23 provided on the second active layer 22 side, and the first bonding surface 51 of the first light-emitting unit and the bonding surface of the second bonding surface 52 of the second n-side nitride semiconductor layer 21 can be directly bonded.

[0064] <Light-emitting device> Figure 6 is a cross-sectional view of a light-emitting device equipped with a semiconductor light-emitting element according to one embodiment of the present disclosure.

[0065] The semiconductor light-emitting element of the above-described embodiment is flip-chip mounted on wiring electrodes formed on a mounting substrate 60. Flip-chip mounting is performed by connecting the wiring electrodes formed on the mounting substrate 60 with electrodes 16 and 26 using connecting members 70a and 70b. The connecting members 70a and 70b are formed by bumps, plating, etc. A wavelength conversion member 80 can be provided on the substrate 1. For example, a sintered body containing a phosphor can be used for the wavelength conversion member 80. A light-reflective resin layer 90 is formed so as to cover the sides of the semiconductor light-emitting element and the wavelength conversion member 80. The first light-emitting part 10 and the second n-side nitride semiconductor layer 21 are exposed on the sides of the semiconductor light-emitting element, but as a light-emitting device, the sides of the first light-emitting part 10 and the second n-side nitride semiconductor layer 21 are covered by the resin layer 90. The resin layer 90 contains particles with a refractive index different from that of the resin in the resin layer 90. Aluminum oxide, titanium oxide, etc. can be used as such particles. Light from the semiconductor light-emitting element is mainly extracted from the upper surface of the wavelength conversion member 80 exposed from the resin layer 90. In addition, a portion of the light from the semiconductor light-emitting element is scattered by the air gap 53 and extracted from the upper surface of the wavelength conversion member 80. The conductive layer 4 contains a metal film such as Ag or Al and can reflect light from the semiconductor light-emitting element. At this time, a portion of the light emitted from the first light-emitting unit 10 toward the mounting substrate 60 is reflected toward the wavelength conversion member 80 by at least the conductive layer 4, electrodes 16, 26, resin layer 90, and connecting members 70a, 70b. Although the light-emitting device is illustrated using the light-emitting element of Embodiment 1, it is not limited to this. The light-emitting device can also be formed using a light-emitting element in which the first light-emitting unit 10 and the aforementioned second light-emitting unit 20 are directly joined. In this case, the wavelength conversion member 80 may or may not be provided. [Examples]

[0066] [Example 1] In Example 1, a semiconductor light-emitting element according to Embodiment 3 shown in Figure 3A was fabricated. In Example 1, first, an undoped GaN layer was grown 3 μm thick on the c-plane of a sapphire substrate 1 via a buffer layer made of AlGaN with a thickness of 20 nm, and then 6 × 10⁻⁶ n-type impurities, such as Si, were added. 18 / cm 3 A first n-side nitride semiconductor layer 11 was grown by growing a 7 μm thick n-type GaN layer containing the specified impurity concentration. Next, a barrier layer made of undoped GaN with a thickness of 5 nm is placed on the first n-side nitride semiconductor layer 11, and an undoped In layer with a thickness of 3.5 nm is placed on top of it. x Ga 1-x The first active layer 12 was grown by alternately stacking nine pairs of well layers consisting of N (x=0.14).

[0067] Next, the first p-side nitride semiconductor layer 13 was grown on the first active layer 12 by sequentially growing a 10 nm thick Mg-doped AlGaN layer, a 70 nm thick undoped GaN layer, and a 20 nm thick Mg-doped GaN layer. Furthermore, on the first p-side nitride semiconductor layer 13, a layer with a thickness of 120 nm and containing 2 × 10 n-type impurities of Si is added. 20 / cm 3 A bonded layer 15 was formed by growing an n-type GaN layer containing the specified concentration using the MBE method. As described above, a first light-emitting unit 10 was prepared in which the surface of the bonded layer 15, which serves as the bonding surface, is a +c plane.

[0068] Next, a second n-side nitride semiconductor layer 21 was grown on the +c plane of the growth substrate 101 made of sapphire, in the same manner as the first n-side nitride semiconductor layer 11. Next, a second active layer 22 was grown on the second n-side nitride semiconductor layer 21 in the same manner as the first active layer 12. Next, a second p-side nitride semiconductor layer 23 was grown on the second active layer 22 in the same manner as the first p-side nitride semiconductor layer 13. Then, a support substrate made of sapphire was attached to the second p-side nitride semiconductor layer 23 via an adhesive resin made of polyimide, and the growth substrate 101 made of sapphire was removed. As described above, a second light-emitting section 20 was prepared in which the surface of the second n-side nitride semiconductor layer 21, which serves as the bonding surface, is the -c plane.

[0069] Next, the surface of the bonded layer 15 of the first light-emitting section 10 was immersed in TMAH at 70°C for 20 minutes to clean the surface of the bonded layer 15, which then became the first bonded surface 51.

[0070] Next, the surface of the second n-side nitride semiconductor layer 21 of the second light-emitting section 20 was planarized using CMP with a pad while dropping a slurry of silica particles mixed in a KOH solution, thereby forming the second junction surface 52.

[0071] Then, the first bonding surface 51 of the bonded layer 15 of the first light-emitting unit 10 and the second bonding surface 52 of the second n-side nitride semiconductor layer 21 of the second light-emitting unit 20 were each irradiated with a high-speed ion beam for 30 seconds in a vacuum chamber. After that, the first bonding surface and the second bonding surface were bonded by a surface activation bonding method under a pressure of 100 MPa in the same chamber.

[0072] Finally, a portion of the second light-emitting section 20 and a portion of the first light-emitting section 10 were removed by etching from the second light-emitting section 20 towards the substrate 1 to expose a portion of the surface of the first n-side nitride semiconductor layer 11, and an n-electrode was formed on that surface, and a p-electrode was formed on the surface of the second p-side nitride semiconductor layer 23. When the junction interface between the bonded layer 15 and the second n-side nitride semiconductor layer 21 of the semiconductor light-emitting element of Example 1, fabricated as described above, was examined using a transmission electron microscope (TEM), a void 53 of several nanometers was observed. A cross-sectional TEM image of the semiconductor light-emitting element was observed, and the length of the major axis of each void observed between the first junction surface 51 and the second junction surface 52 was measured within a 660 μm range along the junction interface. The maximum length of the void was estimated to be 30 nm.

[0073] TEM analysis was performed on the semiconductor light-emitting element of Example 1, which was fabricated as described above. Figure 7A shows an image of the junction interface between the bonded layer 15 and the second n-side nitride semiconductor layer 21 and its vicinity. Figure 7B shows the electron diffraction pattern at measurement point NBD1 shown in Figure 7A. Figure 7C shows the electron diffraction pattern at measurement point NBD2 shown in Figure 7A. Figure 7D shows the electron diffraction pattern at measurement point NBD3 shown in Figure 7A. As shown in Figures 7A to 7D, diffraction spots were observed at and near the junction interface. Furthermore, from Figure 7A, a direct connection in the atomic arrangement of the bonded layer 15 and the second n-side nitride semiconductor layer 21 was confirmed. Figures 7B to 7D show the results of nano-beam electron diffraction (NBD).

[0074] Furthermore, in order to confirm that the output was improved due to the formation of a void 53 at the bonding interface, semiconductor light-emitting devices with a bonding interface and a comparative example without a void 53 at the interface were fabricated and their output (luminescence intensity) was compared. The comparative semiconductor light-emitting device was fabricated by continuously growing a semiconductor light-emitting device with the same layer configuration as Example 1 on a substrate 1 using the MOCVD method. In other words, the comparative semiconductor light-emitting device is the same as the semiconductor light-emitting device of Example 1, except that it does not include a bonding interface, as it has a first light-emitting portion and a second light-emitting portion that include a layer corresponding to the bonded layer 15 of Example 1, grown continuously. Furthermore, a first reference semiconductor light-emitting element and a second reference semiconductor light-emitting element were fabricated to serve as a standard for comparing output levels. This first reference semiconductor light-emitting device differs from the semiconductor light-emitting device of Example 1 in that it does not include the bonded layer 15 and the second light-emitting portion 20. Furthermore, the second reference semiconductor light-emitting device differs from the semiconductor light-emitting device of the comparative example in that it does not include the layer corresponding to the bonded layer 15 of Example 1 and the second light-emitting portion 20.

[0075] The output of the semiconductor light-emitting element of Example 1, the semiconductor light-emitting element of the comparative example, the first reference semiconductor light-emitting element, and the second reference semiconductor light-emitting element, each prepared as described above, was measured by varying the input current value. The measurement results of the output are shown in Figure 8. Here, the output was segmented and mounted in a lamp-type package, and measured using an integrating sphere.

[0076] The graph in Figure 8 shows the output ratios with the reference output (mW) of the reference semiconductor light-emitting element set to 1, at input current values ​​of 20mA, 60mA, 350mA, 500mA, and 1000mA. In Figure 8, the black plots represent the output ratios of the semiconductor light-emitting element of Example 1, and the white plots represent the output ratios of the semiconductor light-emitting element of the comparative example. As shown in Figure 8, it was confirmed that the semiconductor light-emitting element of Example 1, which includes a junction interface with a gap 53, obtained a higher output than the semiconductor light-emitting element of the comparative example, which does not include a junction interface.

[0077] [Example 2] In Example 2, a semiconductor light-emitting element according to Embodiment 2 shown in Figure 2A was fabricated. In Example 2, a first n-side nitride semiconductor layer 11, a first active layer 12, and a first p-side nitride semiconductor layer 13 were formed on the c-plane of a sapphire substrate 1 in the same manner as in Example 1. In this manner, a first light-emitting section 10 was prepared in which the surface of the first p-side nitride semiconductor layer 13, which serves as the bonding surface, is a +c plane.

[0078] Next, a second n-side nitride semiconductor layer 21 was grown on the c-plane of a sapphire substrate 1 in the same manner as in Example 1. Then, the same support substrate used in Example 1 was attached to the second n-side nitride semiconductor layer 21 via the same adhesive resin used in Example 1, and the sapphire substrate 1 was removed. As described above, a second n-side nitride semiconductor layer 21 was prepared, the surface that would serve as the bonding surface being the -c plane.

[0079] Next, the surface of the first p-side nitride semiconductor layer 13 of the first light-emitting section 10 was cleaned in the same manner as in Example 1 to form the first bonding surface 51.

[0080] Next, the surface of the second n-side nitride semiconductor layer 21 was planarized by CMP in the same manner as in Example 1 to form the second junction surface 52.

[0081] Then, the first bonding surface 51 of the first p-side nitride semiconductor layer 13 of the first light-emitting section 10 and the second bonding surface 52 of the second n-side nitride semiconductor layer 21 were directly bonded by a surface activation bonding method under the same conditions as in Example 1.

[0082] Finally, after removing the support substrate, a portion of the second n-side nitride semiconductor layer 21 and a portion of the first light-emitting portion 10 were removed by etching from the second n-side nitride semiconductor layer 21 towards the substrate 1 to expose a portion of the surface of the first n-side nitride semiconductor layer 11, and an n electrode was formed on that surface, and a p electrode was formed on the surface of the second p-side nitride semiconductor layer 23. When the junction interface between the first p-side nitride semiconductor layer 13 and the second n-side nitride semiconductor layer 21 of the semiconductor light-emitting element of Example 2, which was fabricated as described above, was examined with a scanning electron microscope, a void 53 was confirmed. TEM analysis was performed on the semiconductor light-emitting element of Example 2, which was fabricated as described above. Figure 9A shows images of the junction interface between the first p-side nitride semiconductor layer 13 and the second n-side nitride semiconductor layer 21 and its vicinity. Figure 9B shows the electron diffraction pattern at measurement location SAD1 shown in Figure 9A. Figure 9C shows the electron diffraction pattern at measurement location SAD2 shown in Figure 9A. Figure 9D shows the electron diffraction pattern at measurement location NBD4 shown in Figure 9A. Figures 9B and 9C show the results of Selected Area Electron Diffraction (SAD), and Figure 9D shows the results of NBD. As shown in Figures 9A to 9D, diffraction spots were observed at and near the junction interface. Furthermore, Figure 9A confirmed a direct connection in the atomic arrangement of the first p-side nitride semiconductor layer 13 and the second n-side nitride semiconductor layer 21.

[0083] Furthermore, a semiconductor light-emitting element fabricated under the same conditions as in Example 2 was bonded under the same conditions as in Example 2 and then annealed at 700°C. TEM analysis was performed on the annealed semiconductor light-emitting element. Figure 10A shows the TEM images of the bonding interface and its vicinity. Figure 10B shows the electron diffraction pattern at measurement point SAD3 shown in Figure 10A. Figure 10C shows the electron diffraction pattern at measurement point SAD4 shown in Figure 10A. Figure 10D shows the electron diffraction pattern at measurement point NBD5 shown in Figure 10A. Figures 10B and 10C are the results for SAD, and Figure 10D is the result for NBD. As shown in Figures 10A to 10D, diffraction spots were observed at and near the junction interface. Furthermore, Figure 10A confirmed a direct connection in the atomic arrangement of the first p-side nitride semiconductor layer 13 and the second n-side nitride semiconductor layer 21. Comparing Figure 9A and Figure 10A, the contrast between the bonding interface containing NBD5 and the vicinity of the bonding interface containing SAD3 and SAD4 in Figure 10A was smaller than the contrast between the bonding interface containing NBD4 and the vicinity of the bonding interface containing SAD1 and SAD2 in Figure 9A. These results suggest that the crystallinity near the bonding interface was improved by annealing after directly bonding the first light-emitting portion and the second n-side nitride semiconductor layer. [Explanation of Symbols]

[0084] 1 circuit board 10 First light-emitting section 11 First n-side nitride semiconductor layer 12 1st active layer 13 First p-side nitride semiconductor layer 15 Bonded layer 20 Second light-emitting section 21 2nd n-side nitride semiconductor layer 22 2nd active layer 23 2nd p-side nitride semiconductor layer 30 Third light-emitting section 31 3rd n-side nitride semiconductor layer 32 3rd active layer 33 Third p-side nitride semiconductor layer 51 1st joint surface 52 Second joint surface 53 gaps

Claims

1. A first light-emitting section comprising a first n-side nitride semiconductor layer, a first active layer provided on the first n-side nitride semiconductor layer, and a first p-side nitride semiconductor layer provided on the first active layer, a second n-side nitride semiconductor layer; Includes, The first bonding surface of the first light-emitting portion and the second bonding surface of the second n-side nitride semiconductor layer are directly bonded. There is a gap between the first bonding surface of the first light-emitting portion and the second bonding surface of the second n-side nitride semiconductor layer. The first light-emitting portion is disposed on the first p-side nitride semiconductor layer and includes a bonded layer made of a nitride semiconductor containing n-type impurities. The n-type impurity concentration in the bonded layer is greater than the n-type impurity concentration in the second n-side nitride semiconductor layer. The upper surface of the layer to be joined is the first joining surface, The first bonding surface and the second bonding surface are directly in contact or directly bonded via a metal layer. Semiconductor light-emitting element.

2. A first light-emitting section comprising a first n-side nitride semiconductor layer, a first active layer provided on the first n-side nitride semiconductor layer, and a first p-side nitride semiconductor layer provided on the first active layer, a second n-side nitride semiconductor layer; Includes, The first bonding surface of the first light-emitting portion and the second bonding surface of the second n-side nitride semiconductor layer are directly bonded. There is a gap between the first bonding surface of the first light-emitting portion and the second bonding surface of the second n-side nitride semiconductor layer. The upper surface of the first p-side nitride semiconductor layer is the first bonding surface, and the first bonding surface and the second bonding surface are in direct contact and directly bonded. Semiconductor light-emitting element.

3. A semiconductor light-emitting element according to claim 1 or 2, comprising a second light-emitting section including the second n-side nitride semiconductor layer, a second p-side nitride semiconductor layer provided on the side opposite to the second junction surface of the second n-side nitride semiconductor layer, and a second active layer provided between the second n-side nitride semiconductor layer and the second p-side nitride semiconductor layer.

4. The semiconductor light-emitting element according to claim 3, wherein the peak wavelength of the light emitted by the first light-emitting element and the peak wavelength of the light emitted by the second light-emitting element are different wavelengths.

5. The semiconductor light-emitting element according to any one of claims 1 to 4, wherein the maximum length of the void is 50 nm or less.

6. The semiconductor light-emitting element according to any one of claims 1 to 5, wherein the junction interface between the first light-emitting portion and the second n-side nitride semiconductor layer, including the aforementioned void, includes a single-crystal region.

7. A step of preparing a first light-emitting section including a first active layer, A process for preparing the first semiconductor layer, A step of forming a first bonding surface including a first crystal plane by treating the first main surface of the first light-emitting part with an acid or alkaline solution, or by polishing it, A step of forming a second bonding surface including a second crystal plane having a different crystal orientation from the first crystal plane by treating the second main surface of the first semiconductor layer with an acid or alkaline solution, or by polishing it, A step of directly joining the first joining surface and the second joining surface, Includes, The aforementioned direct bonding step is performed by a surface activation bonding method or an atomic diffusion bonding method. A method for manufacturing semiconductor light-emitting elements.

8. The step of preparing the first semiconductor layer is the step of preparing the second n-side nitride semiconductor layer, The step of forming the first bonding surface is a step of treating the first main surface of the first light-emitting part with an acid or alkaline solution to form a first bonding surface including the first crystal plane. The method for manufacturing a semiconductor light-emitting element according to claim 7, wherein the step of forming the second junction surface is to polish the second main surface of the second n-side nitride semiconductor layer to form a second junction surface including a second crystal plane having a different crystal orientation from the first crystal plane.

9. In the process of forming the first bonding surface, A method for manufacturing a semiconductor light-emitting element according to claim 7, wherein the first main surface of the first light-emitting portion is treated with an acid or alkaline solution to form the first junction surface including the first crystal plane.

10. The step of preparing the second n-side nitride semiconductor layer is: The method for manufacturing a semiconductor light-emitting element according to claim 8, comprising the step of preparing a second light-emitting section including the second n-side nitride semiconductor layer, a second p-side nitride semiconductor layer provided on the side opposite to the second junction surface of the second n-side nitride semiconductor layer, and a second active layer provided between the second n-side nitride semiconductor layer and the second p-side nitride semiconductor layer.

11. The first crystal plane is the +c plane, The method for manufacturing a semiconductor light-emitting element according to any one of claims 7 to 10, wherein the second crystal plane is a -c plane.

12. A method for manufacturing a semiconductor light-emitting element according to any one of claims 7 to 11, wherein in the direct bonding step, the bonding is performed with a displacement between the a-axis direction in the plane of the first crystal plane and the a-axis direction in the plane of the second crystal plane.

13. A method for manufacturing a semiconductor light-emitting element according to any one of claims 7 to 12, wherein, after the direct bonding step, the first bonding surface and the second bonding surface are annealed at 300°C to 700°C.

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