Printed circuit board manufacturing method and printed circuit board

Abstract

To provide a manufacturing method of a print circuit board, that realizes a characteristic impedance with high accuracy, and the print circuit board or the like.SOLUTION: A manufacturing method of a print circuit board, includes steps of: forming wiring onto a base material by a conductor; forming a solder resist layer covering at least one part of the wiring; acquiring a measurement result by measuring at least one of a thickness of the solder resist layer and a characteristic impedance of the wiring; setting a change amount of the thickness of the solder resist layer on the basis of the measurement result and a target impedance being a target value of the characteristic impedance of the wiring; and changing the thickness of the solder resist layer on the basis of the change amount to be set.SELECTED DRAWING: Figure 1

Description

Technical Field

[0006] , ,

[0001] The present invention relates to a method for manufacturing a printed circuit board and a printed circuit board and the like.

Background Art

[0002] Conventionally, various methods for manufacturing a printed circuit board have been known. For example, Patent Document 1 discloses a method in which a circuit pattern (wiring pattern) is formed by copper thin film etching, then the impedance of the circuit pattern is measured, and additional etching is performed based on the measurement data.

Prior Art Documents

Patent Documents

[0003] [[ID=​​​​​​​​​​​​​​​​​​​​​​One aspect of the present disclosure relates to a method for manufacturing a printed circuit board, comprising: forming wiring on a substrate using a conductor; forming a solder resist layer covering at least a portion of the wiring; obtaining measurement results by measuring at least one of the thickness of the solder resist layer and the characteristic impedance of the wiring; setting an amount to change the thickness of the solder resist layer based on the measurement results and a target impedance which is a target value of the characteristic impedance of the wiring; and changing the thickness of the solder resist layer based on the set amount to change.

[0007] Another aspect of the present disclosure relates to a printed circuit board comprising a substrate, wiring formed on the substrate by a conductor, and a solder resist layer covering at least a portion of the wiring, wherein, in a plan view, a region of the wiring corresponding to a first wiring having a relatively high required accuracy for a target impedance (a target value of characteristic impedance) is defined as a first region, and a region corresponding to a second wiring having a relatively low required accuracy for a target impedance is defined as a second region, and the thickness of the solder resist layer in the first region is different from the thickness of the solder resist layer in the second region. [Brief explanation of the drawing]

[0008] [Figure 1] This is a flowchart explaining the manufacturing method of printed circuit boards. [Figure 2A] This is a cross-sectional view illustrating the step of forming a wiring pattern. [Figure 2B] This is a cross-sectional view illustrating the step of forming a wiring pattern. [Figure 2C] This is a cross-sectional view illustrating the step of forming a wiring pattern. [Figure 2D] This is a cross-sectional view illustrating the step of forming a wiring pattern. [Figure 3] This is a cross-sectional view illustrating the step of forming the solder resist layer. [Figure 4] This is an example of the relationship between the thickness of the solder resist layer and characteristic impedance. [Figure 5A]This is an example of a plan view of a printed circuit board after the solder resist layer has been formed. [Figure 5B] This is an example of a plan view of a printed circuit board after adjusting the thickness of the solder resist layer. [Figure 6] This is an example of a cross-sectional view of a printed circuit board after adjusting the thickness of the solder resist layer. [Figure 7] This is an example of a cross-sectional view of a printed circuit board after adjusting the thickness of the solder resist layer. [Figure 8] This is an example of a cross-sectional view of a printed circuit board after adjusting the thickness of the solder resist layer. [Figure 9] This is an example of a cross-sectional view of a printed circuit board after adjusting the thickness of the solder resist layer. [Modes for carrying out the invention]

[0009] This embodiment will be described below with reference to the drawings. In the drawings, the same or equivalent elements are denoted by the same reference numerals, and redundant descriptions are omitted. This embodiment described below is not intended to unduly limit the content described in the claims. Furthermore, not all of the configurations described in this embodiment are essential components of this disclosure.

[0010] 1. First Embodiment Figure 1 is a flowchart illustrating the manufacturing method of the printed circuit board 100 according to this embodiment. The printed circuit board 100 in this embodiment is a rigid board using a base material 10 which is, for example, an inflexible insulator. However, the printed circuit board 100 may be a flexible board using a flexible base material 10, or a rigid-flexible board that combines these. The following explanation will use a rigid board as an example. Furthermore, the following explanation will describe an example of a single-sided board, but the printed circuit board 100 in this embodiment may be a double-sided board or a multilayer board.

[0011] Furthermore, the printed circuit board 100 in this embodiment may be a glass epoxy substrate, a glass composite substrate, or any other type of substrate. In other words, the base material 10 of the printed circuit board 100 in this embodiment can be made from various materials. Assume that the base material 10 is prepared before the process shown in Figure 1.

[0012] First, in step S101, wiring is formed on the substrate 10 using a conductor. Specifically, the wiring here refers to a wiring pattern in which multiple wires are arranged on the substrate 10 according to a predetermined pattern. The conductor here is, for example, a metal, and more narrowly, a copper thin film 20. However, in this embodiment, a metal other than copper may be used as the conductor, or a non-metallic conductor may be used.

[0013] Figures 2A to 2D are cross-sectional views illustrating an example of the wiring pattern formation step in step S101. Note that Figures 2A to 2D show only a portion of the printed circuit board 100 under formation; for example, the substrate 10 and the copper thin film 20 may extend to areas not shown in the drawings. The same applies to Figures 3 and 6 to 9, which will be discussed later, in which only a portion of the printed circuit board 100 is shown.

[0014] First, as shown in Figure 2A, a layer of copper thin film 20 is formed on the substrate 10. Then, as shown in Figure 2B, a resist 30 in the shape of the wiring pattern is formed. For example, after the layer of resist 30 is formed to cover the entire copper thin film 20, the resist 30 may be exposed to light using a photomask with the same shape as the wiring pattern to form the resist 30 pattern shown in Figure 2B. Furthermore, copper foil etching is performed to remove the copper thin film 20 in areas other than where the resist 30 is formed, as shown in Figure 2C. After this, the wiring pattern is formed by removing the resist 30. Figure 2D shows an example in which wiring 21, 22, 23, and 24 are formed. Various methods for forming a wiring pattern on the substrate 10 are known, and these can be widely applied in this embodiment.

[0015] After the formation of the wiring pattern, in step S102, a solder resist layer 40 is formed. FIG. 3 is an example of a cross-sectional view of the printed circuit board 100 on which the solder resist layer 40 is formed. The solder resist layer 40 is an insulating film applied to protect the wiring pattern. For example, by forming the solder resist layer 40, it is possible to suppress the adhesion of solder to unnecessary portions when components are mounted on the printed circuit board 100. The solder resist layer 40 also contributes to suppressing short circuits between wirings. For example, the solder resist layer 40 is applied to a region of the base material 10 on which the wiring pattern is formed, excluding portions that become electrical contacts. Note that several types of solder resists are known, such as alkali-developable solder resists, UV-curable solder resists, heat-curable solder resists, etc., depending on the forming method, and these can be widely applied in this embodiment. In the example of FIG. 3, the solder resist layer 40 is formed so as to cover the wirings 21 to 24.

[0016] FIG. 4 is a diagram showing an example of the relationship between the thickness of the solder resist layer 40 and the characteristic impedance. The thickness of the solder resist layer 40 here is, for example, the thickness of the solder resist layer 40 in a region overlapping with the wiring in a plan view observed from a direction intersecting (strictly, orthogonal) the printed circuit board 100. For example, in FIG. 3, the thickness L1 in the region overlapping with the wirings 21 to 24 may be the thickness of the solder resist layer 40 in FIG. 4. As shown in FIG. 4, the characteristic impedance changes according to the thickness of the solder resist layer 40. For example, as the thickness of the solder resist layer 40 becomes thinner, the value of the characteristic impedance becomes larger. Also, the relationship between the thickness (for example, the thickness L2 in FIG. 3) in a region not overlapping with the wiring and the characteristic impedance may be obtained. In this case as well, as the thickness of the solder resist layer 40 becomes thinner, the value of the characteristic impedance becomes larger.

[0017] The aforementioned Patent Document 1 describes a method for re-etching a circuit pattern (wiring pattern) after its formation and before the application of solder resist. The method of Patent Document 1 corresponds, for example, to repeating the process in step S101 in the flowchart of Figure 1. However, as shown in Figure 4, the characteristic impedance changes depending on the solder resist layer 40, so even if the characteristic impedance is adjusted using the method of Patent Document 1, the characteristic impedance may deviate from the target value due to the subsequent formation of the solder resist layer 40. If the thickness of the solder resist layer 40 is always constant, it may be possible to adjust the wiring pattern taking into account the change in characteristic impedance due to the solder resist layer 40. However, the thickness of the solder resist layer 40 may vary from lot to lot or from substrate to substrate.

[0018] Therefore, the method for manufacturing the printed circuit board 100 according to this embodiment may include the following steps. The method for manufacturing the printed circuit board 100 includes the step (S101) of forming wiring (including wiring 21 to 24) on a substrate 10 using conductors, and the step (S102) of forming a solder resist layer 40 that covers at least a part of the wiring. Furthermore, the method for manufacturing the printed circuit board 100 includes the step (S103) of obtaining measurement results by measuring at least one of the thickness of the solder resist layer 40 and the characteristic impedance of the wiring, the step (S105) of setting the amount of change to the thickness of the solder resist layer 40 based on the measurement results and the target impedance, which is a target value of the characteristic impedance of the wiring, and the step (S106) of changing the thickness of the solder resist layer 40 based on the set amount of change. For example, steps S101 and S102 are performed by a printed circuit board manufacturing apparatus (in the narrow sense, an apparatus that performs developing, etching, peeling, etc.). Step S103 is performed by a measuring apparatus. The measuring device may be a thickness measuring device using a photoelectric sensor, an X-ray inspection device, a device using time-domain reflection as described later, or any other device. The measuring device may also include a processor that controls the operation of the above devices. The process in step S105 is performed, for example, by the processor. The processor here may be a PC (Personal Computer) or a server, or it may be included in the above manufacturing device or measuring device. Step S106 is performed, for example, by a printed circuit board manufacturing device (specifically, a laser processing machine).

[0019] In the method of this embodiment, the characteristic impedance can be brought closer to the target impedance by adjusting the thickness of the solder resist layer 40 after it has been formed. That is, since it is possible to adjust the final characteristic impedance while taking into account the influence of the formed solder resist layer 40 on the characteristic impedance, it becomes possible to adjust the value of the characteristic impedance with high precision. In this case, since the adjustment is made based on the thickness of the solder resist layer 40 and the measurement results of the characteristic impedance, appropriate adjustment can be achieved. The specific method of this embodiment will be described in detail below.

[0020] After the formation of the solder resist layer 40, in step S103, a measurement is performed to measure at least one of the thickness of the solder resist layer 40 and the characteristic impedance of the wiring, thereby obtaining the measurement result. That is, the measurement result here may be the thickness of the solder resist layer 40, the value of the characteristic impedance, or both.

[0021] For example, a cross-sectional observation sample is prepared by cutting and polishing one printed circuit board per lot using a given cutting surface. Various methods for cross-sectional observation are known, and these can be widely applied in this embodiment. The thickness of the solder resist layer 40 can be obtained as a measurement result by cross-sectional observation. The thickness here may be the thickness of the area overlapping with the wiring (for example, thickness L1 in Figure 3), the thickness of the area not overlapping with the wiring (for example, thickness L2 in Figure 3), or both. In step S103, the thickness of the solder resist layer 40 near the wiring to be adjusted for characteristic impedance among the wiring patterns formed in step S101 may be measured. However, if the thickness variation of the solder resist layer 40 depending on the position is assumed to be sufficiently small, the thickness measurement may be performed at any position on the printed circuit board 100.

[0022] Furthermore, the width and spacing of the wiring may be measured during cross-sectional observation. The width of the wiring represents the length of each wiring in the shorter direction. In the example in Figure 3, the width of wiring 21 corresponds to width L3. The spacing of the wiring represents the distance between two different wirings. In the example in Figure 3, the spacings of the wiring are L41, L42, L43, etc. Spacing L41 represents the spacing between wiring 21 and wiring 22. Spacing L42 represents the spacing between wiring 21 and wiring 23. Spacing L43 represents the spacing between wiring 22 and wiring 24.

[0023] Furthermore, the measurement of the thickness of the solder resist layer 40 is not limited to destructive methods; non-destructive methods may also be used. For example, the cross-sectional structure of the printed circuit board 100 may be observed non-destructively using an X-ray microscope or the like. In this case as well, the thickness of the solder resist layer 40 is obtained as a measurement result based on the observation results of the cross-sectional structure.

[0024] In step S103, the characteristic impedance of the wiring to be adjusted may also be measured. For example, time-domain reflectometry (TDR) may be used to measure the characteristic impedance. TDR is a method in which a high-speed pulse or the like is applied to the wiring and the reflected waveform is observed. The characteristic impedance value is obtained as a measurement result. However, the method for measuring the characteristic impedance is not limited to TDR, and advanced methods or other methods may be used.

[0025] In step S104, it is determined whether the measurement results are within an acceptable range. For example, HDMI (High-Definition Multimedia Interface, HDMI is a registered trademark) wiring requires the characteristic impedance to be set to 100Ω ± 10%. Similarly, USB (Universal Serial Bus) wiring requires the characteristic impedance to be set to 90Ω ± 10%. In cases where a wiring has a defined required characteristic impedance, it is determined whether the measurement results for that wiring meet the requirement.

[0026] For example, if the characteristic impedance is measured in step S103, in step S104 it is determined whether the characteristic impedance is within the range of the target impedance. The target impedance here is the target value of the characteristic impedance, and for example, in the case of HDMI wiring, it may be in the range of 90Ω to 110Ω. Note that a stricter target impedance may be set to take into account fluctuations in characteristic impedance due to aging, etc.

[0027] As shown in Figure 4, the relationship between the thickness of the solder resist layer 40 and the characteristic impedance of a specific wiring can be determined using simulations. For example, when the characteristic impedance of wirings 21 and 22 is adjusted by adjusting the thickness of region RE1, as will be described later using Figure 6, simulation results showing the relationship between the thickness of the solder resist layer 40 in region RE1 and the characteristic impedance of wirings 21 and 22 are obtained in advance. As will be described later using Figures 7 and 8, the target region for adjusting the thickness of the solder resist layer 40 may be a different region, so the simulation settings may be changed according to the specific location and shape of the target region. The target region for thickness adjustment may also be changed dynamically, and simulation results for multiple patterns with different target regions may be obtained in advance. For example, the range of the target thickness of the solder resist layer 40 may be set based on the simulation results and the target impedance. If the thickness of the solder resist layer 40 is measured in step S103, it may be determined in step S104 whether the thickness is within the range of the target thickness.

[0028] If the measurement result is within the acceptable range (step S104: Yes), the process shown in Figure 1 is terminated without performing steps S105 to S106. In other words, since the characteristic impedance already meets the desired conditions, the thickness adjustment of the solder resist layer 40 can be omitted.

[0029] On the other hand, if the measurement result is not within the acceptable range (step S104: No), the amount of change in the thickness of the solder resist layer 40 is set in step S105. For example, as described above, information showing the relationship between the thickness of the solder resist layer 40 and the characteristic impedance may be obtained based on simulation or the like. In this embodiment, the amount of change in thickness is determined based on the information showing this relationship and the measurement result which includes at least one of the thickness of the solder resist layer 40 and the characteristic impedance.

[0030] For example, if the characteristic impedance is measured in step S103, the current thickness of the solder resist layer 40 can be determined based on that characteristic impedance. As mentioned above, the measurement result may include the current thickness of the solder resist layer 40. Also, since the target impedance value is known, it is possible to determine the thickness of the solder resist layer 40 that achieves the target impedance. For example, if the target impedance has a range such as 90Ω to 110Ω as described above, one of the values ​​within that range is selected, and the thickness of the solder resist layer 40 that achieves the selected value is determined as the target thickness. The selected value may be set to the center or close to the center of the target impedance range, and in the case of HDMI wiring, it may be 100Ω. However, the selected value does not necessarily have to be near the center of the target impedance range; it is sufficient if it is within the range of the target impedance.

[0031] As described above, based on the measurement results and target impedance, the current thickness of the solder resist layer 40 and the target thickness of the solder resist layer 40 can be determined. Therefore, by calculating the difference between these two values, the amount of change in the thickness of the solder resist layer 40 can be determined.

[0032] In step S106, the thickness of the solder resist layer 40 is changed based on the set amount of change. Here, the manufacturing method of the printed circuit board 100 according to this embodiment may include a step of setting the amount to remove from the solder resist layer 40 based on the measurement result and the target impedance (corresponding to step S105), and a step of reducing the thickness of the solder resist layer 40 based on the set amount of removal (corresponding to step S106). In other words, changing the thickness of the solder resist layer 40 may be achieved by reducing the thickness of the solder resist layer 40. In this way, since recoating or the like to increase the thickness of the solder resist layer 40 is unnecessary, it becomes possible to adjust the thickness by a relatively easy process such as thickness reduction by laser processing. For example, in the printed circuit board 100 of this embodiment, the width and spacing of the wiring in step S102 and the thickness of the solder resist layer 40 in step S103 may be set so that the characteristic impedance of the wiring to be targeted is within or below the target impedance. This increases the likelihood that adjustments will be needed to increase the characteristic impedance, and therefore, a process to reduce the thickness of the solder resist layer 40 is performed as a thickness adjustment.

[0033] Figures 5A and 5B show examples of areas where the thickness of the solder resist layer 40 is subject to adjustment, as viewed from a direction intersecting the printed circuit board 100 in a plan view. For example, Figure 5A shows the board before thickness adjustment, where the wiring WI is the wiring whose characteristic impedance is to be adjusted. Wiring WI is, for example, HDMI wiring or USB wiring. Figure 5B shows the board after thickness adjustment, where, for example, area RE, represented in a different color than in Figure 5A, represents the area where the thickness of the solder resist layer 40 has been adjusted. As shown in Figure 5B, the thickness adjustment of the solder resist layer 40 may be applied to an area along the wiring WI to be adjusted. For example, area RE is the area between one endpoint and the other endpoint of the wiring WI. One endpoint of the wiring WI represents, for example, the electrical contact with the connector to which the HDMI cable is connected, and the other endpoint represents, for example, the electrical contact with the HDMI processing IC (integrated circuit) that processes the signal from the HDMI cable. In this way, it becomes possible to appropriately adjust the characteristic impedance of a wide range of the target wiring WI (in a narrow sense, the entire wiring WI).

[0034] Figure 6 is a diagram illustrating the cross-sectional configuration of the printed circuit board 100 after thickness adjustment. In the example in Figure 6, the wirings whose characteristic impedance is to be adjusted are, for example, wiring 21 and wiring 22. As shown in Figure 6, in the manufacturing method of the printed circuit board 100 according to this embodiment, when changing the thickness of the solder resist layer 40 (step S106), the thickness of the solder resist layer 40 in the area that overlaps with the wiring (wiring 21 and wiring 22) in a plan view may be changed. Of the solder resist layer 40, the area that covers the wiring is considered to contribute the most to the characteristic impedance of the wiring. Therefore, by adjusting the thickness of the solder resist layer 40 in the area that overlaps with the wiring in a plan view, it becomes possible to efficiently adjust the characteristic impedance.

[0035] Furthermore, when reducing the thickness of the solder resist layer 40 (step S106), if the thickness of the area of ​​the solder resist layer 40 that overlaps with the wiring in a plan view is changed, the amount of removal may be set to a value that does not expose the wiring. As mentioned above, the solder resist layer 40 is formed to protect the wiring, so if the solder resist layer 40 is removed to the extent that the wiring is exposed, the purpose of forming the solder resist layer 40 may be lost. In this respect, the wiring can be properly protected by limiting the maximum amount of removal.

[0036] Furthermore, when changing the thickness of the solder resist layer 40 (step S106), it is not prevented to change the thickness of the solder resist layer 40 in areas that are less than or equal to a predetermined distance from the wiring in a plan view and do not overlap with the wiring. In this case as well, since the thickness of the solder resist layer 40 in areas that are relatively close to the wiring is adjusted, the characteristic impedance of the wiring can be appropriately adjusted. In the example shown in Figure 6, area RE1, which includes both the area that overlaps with either wiring 21 or wiring 22 in a plan view and the area that does not overlap with either wiring 21 or wiring 22, is set as the area to be adjusted for the thickness of the solder resist layer 40. As shown in Figure 6, by deleting the solder resist layer 40 over a relatively wide area all at once, it becomes possible to easily implement thickness reduction processing using laser processing, etc. Also, if the thickness of the solder resist layer 40 that overlaps with the wiring is originally thin, the amount of deletion in that area is limited, so there is great significance in adjusting the characteristic impedance by deleting the solder resist layer 40 in areas that do not overlap with the wiring.

[0037] For example, when reducing the thickness of the solder resist layer 40 (step S106), if the thickness of the solder resist layer 40 is reduced in a region that is less than or equal to a predetermined distance from the wiring in a plan view and does not overlap with the wiring, the amount of reduction may be set within a range that includes a value that exposes the substrate 10. Even if the substrate 10 is exposed, there is no risk of deterioration of the wiring (thin copper film) or short circuit. Therefore, when adjusting the thickness of the solder resist layer 40 in a region that does not overlap with the wiring, it is possible to significantly reduce the thickness of the solder resist layer 40.

[0038] In step S106, after the thickness of the solder resist layer 40 has been adjusted, the measurement process in step S104 may be performed again, as shown in Figure 1. In this way, at least one of the characteristic impedance after thickness adjustment and the thickness of the solder resist layer 40 can be measured. That is, it can be determined whether the characteristic impedance has fallen within the range of the target impedance as a result of the adjustment in step S106. In subsequent measurement processes, similar to the example above, the characteristic impedance may be measured, the thickness of the solder resist layer 40 may be measured, or both may be performed. Furthermore, the content of the measurement process may be changed depending on the situation, such as measuring both the characteristic impedance and thickness in the first measurement and measuring one of them in the second measurement. For example, in the first measurement process, the thickness of the solder resist layer 40 may be measured using a destructive method on a given printed circuit board 100 in the lot, and based on the measurement result, the thickness of the solder resist layer 40 of another printed circuit board 100 in the same lot (in the narrow sense, a printed circuit board 100 to be shipped) may be adjusted. In the second measurement process, the thickness of the solder resist layer 40 may be measured using a non-destructive method on the other printed circuit board 100. Alternatively, in the second measurement process, the thickness measurement may be omitted, and only the characteristic impedance may be measured.

[0039] If the measurement process determines that the characteristic impedance is within the target impedance range, the process shown in Figure 1 is terminated. If the measurement process determines that the characteristic impedance is not within the target impedance range, the removal amount is set again, and the thickness of the solder resist layer 40 is reduced again (steps S105, S106). By repeating the measurement process and adjusting the thickness, it becomes possible to precisely adjust the characteristic impedance.

[0040] As described above, the characteristic impedance of the wiring pattern can be adjusted by adjusting the thickness of the solder resist layer 40. Therefore, compared to conventional methods of adjusting the characteristic impedance before forming the solder resist layer 40, it becomes possible to adjust the characteristic impedance with greater precision.

[0041] Figure 6 illustrates an example in which the thickness of the solder resist layer 40 is reduced by the same amount across the entire region RE1, which includes both the region overlapping with the wiring and the region not overlapping with the wiring. However, the method for reducing the thickness of the solder resist layer 40 is not limited to the example shown in Figure 6. For example, the thickness may be reduced only in the region overlapping with the wiring, and the thickness of the region not overlapping with the wiring may not be reduced. In this way, it becomes possible to adjust the thickness of the solder resist layer 40 only in regions that have a large contribution to the characteristic impedance. In this case, for example, as information corresponding to Figure 4, information is acquired in advance that identifies the change in the characteristic impedance of the wiring when only the thickness of the solder resist layer 40 in the region overlapping with the wiring is changed. Then, in step S103, for example, the thickness of the solder resist layer 40 in the region overlapping with the wiring is measured, and in step S105, the amount to be removed is determined based on the measurement result and the target impedance (target thickness).

[0042] Figure 7 is another diagram illustrating the cross-sectional configuration of the printed circuit board 100 after thickness adjustment. As shown in Figure 7, the thickness may be reduced only in areas that do not overlap with the wiring, and the thickness of areas that overlap with the wiring may not be reduced. In the example in Figure 7, the thickness of area RE2 between wirings 21 and 22, which are subject to characteristic impedance adjustment, is reduced within the solder resist layer 40. The reduction amount in Figure 7 is the amount of substrate 10 that is exposed, but other reduction amounts may be set. Also, as shown in Figure 7, within the solder resist layer 40, the thickness of area RE3 on the opposite side of wiring 22 from wiring 21, which is subject to characteristic impedance adjustment, may be reduced. Similarly, within the solder resist layer 40, the thickness of area RE4 on the opposite side of wiring 21 from wiring 21, which is subject to characteristic impedance adjustment, may be reduced. As described above, in areas that do not overlap with the wiring, the risk of wiring exposure due to reduction is low, and the amount of reduction can be flexibly set. In this case, for example, as information corresponding to Figure 4, information is acquired in advance to identify the change in the characteristic impedance of the wiring when only the thickness of the solder resist layer 40 in the area that does not overlap with the wiring is changed. Then, in step S103, for example, the thickness of the solder resist layer 40 in an area that does not overlap with the wiring is measured, and in step S105, the amount to be removed is determined based on the measurement result and the target impedance (target thickness).

[0043] In this embodiment, the area subject to thickness adjustment of the solder resist layer 40 may be dynamically changed based on the measurement results of the thickness of the solder resist layer 40. For example, in the measurement process shown in step S103, the thickness of the solder resist layer 40 may be measured, at least in the area that overlaps with the wiring in a plan view. If the thickness of the solder resist layer 40 in the area overlapping with the wiring is determined to be above a predetermined threshold, the thickness of the solder resist layer 40 in the area overlapping with the wiring is reduced. In this case, the thickness of the solder resist layer 40 in the area not overlapping with the wiring may or may not be reduced. On the other hand, if the thickness of the solder resist layer 40 in the area overlapping with the wiring is determined to be below a predetermined threshold, the thickness of the solder resist layer 40 in the area that is not overlapping with the wiring and is at or below a predetermined distance from the wiring may be reduced. In this case, the thickness of the solder resist layer 40 in the area overlapping with the wiring is not reduced. In this way, the area subject to thickness adjustment can be appropriately set according to the thickness of the solder resist layer 40 covering the wiring. For example, if the thickness of the solder resist layer 40 covering the wiring is sufficient, the area to be adjusted for thickness is set from the perspective of eliminating areas that have a greater impact on the characteristic impedance. If the thickness is insufficient, the area to be adjusted for thickness is set from the perspective of protecting the wiring.

[0044] Furthermore, the amount by which the thickness of the solder resist layer 40 is changed may vary depending on its position in a plan view. Figure 8 is another diagram illustrating the cross-sectional configuration of the printed circuit board 100 after thickness adjustment. Region RE1 in Figure 8 corresponds to region RE1 in Figure 6, and regions RE2 to RE4 correspond to regions RE2 to RE4 in Figure 7. In the example of Figure 8, the solder resist layer 40 is removed with a relatively small amount in regions RE1 that are different from any of regions RE2 to RE4, while the solder resist layer 40 is removed with a relatively large amount in regions RE2 to RE4. In this way, the amount of removal can be flexibly set according to the position relative to the wiring.

[0045] The above examples show some regions and amounts for reducing the thickness of the solder resist layer 40. However, the methods for reducing the thickness of the solder resist layer 40 are not limited to those shown in Figures 6 to 8, and various modifications are possible.

[0046] For example, in step S105, the direction of thickness adjustment (whether to reduce or increase the thickness) is determined based on the measurement result and the target impedance, and the values ​​of the reduction or increase may be given fixed values. For example, in this embodiment, the thickness of the solder resist layer 40 may be changed by a fixed amount until the characteristic impedance is determined to be within the range of the target impedance in step S104.

[0047] Furthermore, the thickness adjustment of the solder resist layer 40 may be performed after the components are mounted on the printed circuit board 100. These components include resistors, capacitors, ICs, and other electronic components fixed to the printed circuit board 100 using solder, for example. This allows for individual adjustment of the characteristic impedance after component mounting, thereby improving the accuracy of the characteristic impedance.

[0048] Furthermore, the method of this embodiment can be applied to a printed circuit board 100 which includes a base material 10, wiring (wiring 21, etc.) formed on the base material by a conductor (e.g., a copper thin film 20), and a solder resist layer 40 that covers at least a portion of the wiring. Of the printed circuit board 100, the region corresponding to the first wiring in a plan view is called the first region, and the region corresponding to the second wiring is called the second region. The first wiring represents wiring that has a relatively high required accuracy for the target impedance, which is the target value of the characteristic impedance. The second wiring represents wiring that has a lower required accuracy for the target impedance compared to the first wiring. In the printed circuit board 100 of this embodiment, the thickness of the solder resist layer 40 in the first region is different from the thickness of the solder resist layer 40 in the second region. The thickness being compared here may be, for example, the distance from the surface of the base material 10 to the surface of the solder resist layer 40. For example, if the first region or the second region overlaps with the wiring, the thickness in each region may be the sum of the actual thickness of the solder resist layer 40 and the thickness of the wiring.

[0049] Even if one attempts to apply the solder resist layer 40 uniformly across all areas, errors may occur, and even before thickness adjustment, slight differences in the thickness of the solder resist layer 40 may occur depending on its position in a plan view. However, since the method of this embodiment intentionally adjusts the thickness of the solder resist layer 40 using laser processing or the like, the amount of change in thickness is noticeably larger than the slight differences that occur naturally. Therefore, the difference between the thickness of the solder resist layer 40 in the first area and the thickness of the solder resist layer 40 in the printed circuit board 100 of this embodiment may be larger than the maximum thickness variation that occurs in one solder resist layer 40 application process. The thickness variation that occurs in one solder resist layer 40 application process can be statistically determined from the characteristics of the manufacturing equipment used and the measurement results of the actually manufactured product.

[0050] In the examples shown in Figures 5A and 5B, the first wiring, which has a relatively high required accuracy for the target impedance, corresponds to wiring WI, and the first region corresponds to region RE. Specifically, the first region may be the region corresponding to HDMI (High-Definition Multimedia Interface) wiring or the region corresponding to USB (Universal Serial Bus) wiring. As mentioned above, HDMI wiring and USB wiring have higher required accuracy for the target impedance compared to other wiring, making them more likely to be subject to adjustment of the solder resist layer 40 thickness. In other words, by making the thickness of the solder resist layer 40 in the first region corresponding to these wirings different from the thickness in the second region, it becomes possible to adjust the characteristic impedance of the wiring with high accuracy.

[0051] In the example described above, the thickness of the solder resist layer 40 is reduced when adjusting the characteristic impedance. Therefore, the thickness of the solder resist layer 40 in the first region is thinner than the thickness of the solder resist layer 40 in the second region.

[0052] 2. Second Embodiment The above describes an example of adjusting the characteristic impedance of a wiring pattern by reducing the thickness of the solder resist layer 40 using laser processing or the like. However, the embodiments of this disclosure are not limited thereto.

[0053] For example, in step S105 of Figure 1, a process may be performed to set the amount of increase in the solder resist layer 40 based on the measurement results and the target impedance. Then, in step S106, a process is performed to increase the thickness of the solder resist layer 40 based on the set amount of increase. For example, a process is performed to mask the area other than the area to be increased in thickness of the solder resist layer 40, and then reapply solder resist to the target area. As described above using Figure 4, it is possible to reduce the characteristic impedance by increasing the thickness of the solder resist layer 40. Therefore, if the current characteristic impedance is larger than the target impedance, it is possible to appropriately adjust the characteristic impedance by increasing the thickness of the solder resist layer 40.

[0054] In other words, in the printed circuit board 100 according to this embodiment, when viewed in plan, the region corresponding to the first wiring, which has a relatively high required accuracy for the target impedance (a target value of the characteristic impedance), is defined as the first region, and the region corresponding to the second wiring, which has a relatively low required accuracy for the target impedance, is defined as the second region, the thickness of the solder resist layer 40 in the first region is greater than the thickness of the solder resist layer 40 in the second region. By making the thickness of the solder resist layer 40 in the first region different from that in the second region, it becomes possible to accurately adjust the characteristic impedance of the wiring that has a high required accuracy.

[0055] Figure 9 is a diagram illustrating the cross-sectional configuration of the printed circuit board 100 after thickness adjustment. In the example in Figure 9, the wirings whose characteristic impedance is to be adjusted are, for example, wiring 21 and wiring 22. As shown in Figure 9, in the manufacturing method of the printed circuit board 100 according to this embodiment, in the step of changing the thickness of the solder resist layer 40 (step S106), the thickness of the solder resist layer 40 is increased in the region that overlaps with the wiring (wiring 21 and wiring 22) in a plan view. Of the solder resist layer 40, the region that covers the wiring is considered to contribute the most to the characteristic impedance of the wiring. Therefore, by adjusting the thickness of the solder resist layer 40 in the region that overlaps with the wiring in a plan view, it becomes possible to efficiently adjust the characteristic impedance.

[0056] Furthermore, in the step of increasing the thickness of the solder resist layer 40, the thickness of the solder resist layer 40 may be increased in areas where the distance from the wiring in a plan view is less than or equal to a predetermined value and which do not overlap with the wiring. Even in areas that do not overlap with the wiring, if the distance from the wiring is close, it will affect the characteristic impedance of the wiring. Therefore, by increasing the thickness of areas where the distance from the wiring is less than or equal to a predetermined value and which do not overlap with the wiring, it is possible to appropriately adjust the characteristic impedance of the target wiring.

[0057] Figure 9 illustrates an example where the thickness of the solder resist layer 40 increases by the same amount across the entire region RE5, which includes both areas overlapping with and areas not overlapping with the wiring. This approach allows for consolidating the areas where the thickness of the solder resist layer 40 is increased into a single area, and ensures a constant increase in thickness within that area, thereby facilitating the recoating process for the solder resist. However, the areas and thicknesses of the solder resist layer 40 are not limited to the example shown in Figure 9. For example, the thickness may be increased only in the areas overlapping with the wiring, or only in the areas not overlapping with the wiring. Furthermore, the amount of thickness increase in each area may differ.

[0058] Furthermore, when increasing the thickness of the solder resist layer 40, unlike when decreasing the thickness, it is not expected that the wiring will be exposed due to the thickness adjustment. Therefore, even when adjusting the thickness of areas that overlap with the wiring, there is no need to set an upper limit on the amount of adjustment from the perspective of whether or not the wiring will be exposed.

[0059] Although this embodiment has been described in detail above, it will be readily apparent to those skilled in the art that many modifications are possible without substantially departing from the novel aspects and effects of this embodiment. Therefore, all such modifications are included within the scope of this disclosure. For example, any term that appears at least once in the specification or drawings together with a broader or synonymous term may be replaced with that different term anywhere in the specification or drawings. Furthermore, all combinations of this embodiment and its modifications are also included within the scope of this disclosure. In addition, the configuration and operation of printed circuit boards, etc., are not limited to those described in this embodiment, and various modifications are possible. [Explanation of Symbols]

[0060] 10…Substrate, 20…Copper thin film, 21~24…Wiring, 30…Photomask, 40…Solder resist layer, L1,L2…Thickness, L3…Wiring width, L41~L43…Wiring spacing, WI…Wiring, RE,RE1~RE5…Areas where the thickness of the solder resist layer is changed

Claims

1. A wiring is formed on the substrate using a conductor. A solder resist layer is formed to cover at least a portion of the wiring. The measurement results are obtained by measuring at least one of the thickness of the solder resist layer and the characteristic impedance of the wiring. Based on the measurement results and the target impedance, which is the target value of the characteristic impedance of the wiring, the amount of thickness reduction of the solder resist layer is set. Based on the set amount of removal, the thickness of the formed solder resist layer is reduced. A method for manufacturing printed circuit boards.

2. In claim 1, A method for manufacturing a printed circuit board, wherein when reducing the thickness of the solder resist layer, the thickness of the solder resist layer is reduced in the region that overlaps with the wiring in a plan view.

3. In claim 1, When reducing the thickness of the solder resist layer, the thickness of the region of the solder resist layer that overlaps with the wiring in a plan view is reduced. A method for manufacturing a printed circuit board, wherein the amount of removal is set to a value such that the wiring is not exposed.

4. In claim 1, A method for manufacturing a printed circuit board, wherein when reducing the thickness of the solder resist layer, the thickness of a region of the solder resist layer that is less than or equal to a predetermined distance from the wiring in a plan view and does not overlap with the wiring is reduced.

5. In claim 1, When reducing the thickness of the solder resist layer, the thickness of the solder resist layer in a region where the distance from the wiring in a plan view is less than or equal to a predetermined value and does not overlap with the wiring is reduced. A method for manufacturing a printed circuit board, wherein the amount of removal is set to any value within a range that includes a value in which the substrate is exposed.

6. In claim 1, The thickness of the solder resist layer in the region that overlaps with the wiring in a plan view is measured. If the thickness of the solder resist layer in the region overlapping with the wiring is determined to be greater than or equal to a predetermined threshold, the thickness of the solder resist layer in the region overlapping with the wiring is reduced. A method for manufacturing a printed circuit board, wherein, if the thickness of the solder resist layer in the area overlapping with the wiring is determined to be less than the predetermined threshold, the distance from the wiring is less than or equal to a predetermined value, and the thickness of the solder resist layer in the area not overlapping with the wiring is reduced.

7. Substrate and Wiring formed on the substrate by a conductor, A solder resist layer covering at least a portion of the aforementioned wiring, Includes, In a plan view, when the region corresponding to the first wiring, which has a high required accuracy for the target impedance (the target value of the characteristic impedance), is defined as the first region, and the region corresponding to the second wiring, which has a lower required accuracy for the target impedance compared to the first wiring, is defined as the second region, The thickness of the solder resist layer in the first region is thinner than the thickness of the solder resist layer in the second region. The thickness of the solder resist layer in the first region is determined by reducing the thickness of the solder resist layer in the formed first region based on the measurement results and the amount of removal set based on the target impedance, which is the target value of the characteristic impedance of the first wiring. The measurement results are obtained by measuring at least one of the thickness of the solder resist layer in the first region and the characteristic impedance of the first wiring, in a printed circuit board.

8. In claim 7, The first region is a printed circuit board that corresponds to HDMI (High-Definition Multimedia Interface) wiring or USB (Universal Serial Bus) wiring.

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