Semiconductor device

Abstract

Provided is a semiconductor device that occupies a small area. The semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, a second conductive layer, and a first insulation layer. The first insulation layer is provided on the first conductive layer. The second conductive layer is provided on the first insulation layer. The first insulation layer and the second conductive layer include an opening that reaches the first conductive layer. The first semiconductor layer contacts an upper surface of the first conductive layer, a side surface of the first insulation layer, and an upper surface and a side surface of the second conductive layer. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer. The first semiconductor layer includes a first material. The second semiconductor layer includes a second material. The third semiconductor layer includes a third material. A band gap of the first material is greater than a band gap of the second material. A band gap of the third material is greater than the band gap of the second material.

Description

Semiconductor Devices

[0001] BACKGROUND OF THE INVENTION 1. Field of the Invention One embodiment of the present invention relates to a semiconductor device and a manufacturing method thereof. 2. Description of the Related Art One embodiment of the present invention relates to a transistor and a manufacturing method thereof.

[0002] One embodiment of the present invention is not limited to the above technical field, and examples of the technical field of one embodiment of the present invention include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, an electronic device, a lighting device, an input device (for example, a touch sensor), an input / output device (for example, a touch panel), a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device having such a circuit, etc. Also, it refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, and an electronic component in which a chip is housed in a package are examples of semiconductor devices. Furthermore, a memory device, a display device, a light-emitting device, a lighting device, and an electronic device may themselves be semiconductor devices and each may have a semiconductor device.

[0004] Semiconductor devices including transistors are widely used in electronic devices. For example, in display devices, pixel size can be reduced by reducing the area occupied by a transistor, and resolution can be increased. Therefore, miniaturized transistors are in demand.

[0005] As devices requiring high-definition display devices, devices for virtual reality (VR), augmented reality (AR), substitutional reality (SR), and mixed reality (MR) are being actively developed.

[0006] 2. Description of the Related Art As display devices, for example, light-emitting devices having organic electroluminescence (EL) elements or light-emitting diodes (LEDs) have been developed.

[0007] Patent Document 1 discloses a high-definition display device using organic EL elements.

[0008] International Publication No. 2016 / 038508

[0009] An object of one embodiment of the present invention is to provide a transistor with a small size. Another object is to provide a transistor with a short channel length. Another object is to provide a transistor with high on-state current. Another object is to provide a transistor with favorable electrical characteristics. Another object is to provide a semiconductor device with a small occupation area. Another object is to provide a semiconductor device with low wiring resistance. Another object is to provide a semiconductor device or display device with low power consumption. Another object is to provide a highly reliable transistor, semiconductor device, or display device. Another object is to provide a high-resolution display device. Another object is to provide a method for manufacturing a semiconductor device or display device with high productivity. Another object is to provide a novel transistor, semiconductor device, or display device, or a manufacturing method thereof.

[0010] Note that the description of these problems does not preclude the existence of other problems. One embodiment of the present invention does not necessarily have to solve all of these problems. Problems other than these can be extracted from the description in the specification, drawings, and claims.

[0011] One embodiment of the present invention is a semiconductor device including a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, a second conductive layer, and a first insulating layer. The first insulating layer is provided on the first conductive layer. The second conductive layer is provided on the first insulating layer. The first insulating layer and the second conductive layer have openings reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer. The first semiconductor layer includes a first material. The second semiconductor layer includes a second material. The third semiconductor layer includes a third material. The band gap of the first material is larger than the band gap of the second material. The band gap of the third material is larger than the band gap of the second material.

[0012] In the above-described semiconductor device, the first material is preferably the same as the third material.

[0013] One embodiment of the present invention is a semiconductor device including a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, a second conductive layer, and a first insulating layer. The first insulating layer is provided over the first conductive layer. The second conductive layer is provided over the first insulating layer. The first insulating layer and the second conductive layer have openings reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is provided over the first semiconductor layer. The third semiconductor layer is provided over the second semiconductor layer. The first semiconductor layer includes a first metal oxide. The second semiconductor layer includes a second metal oxide. The third semiconductor layer includes a third metal oxide. The band gap of the first metal oxide is larger than the band gap of the second metal oxide. The bandgap of the third metal oxide is larger than the bandgap of the second metal oxide.

[0014] In the above-described semiconductor device, the composition of the first metal oxide is preferably the same as the composition of the third metal oxide.

[0015] One embodiment of the present invention is a semiconductor device including a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, a second conductive layer, and a first insulating layer. The first insulating layer is provided over the first conductive layer. The second conductive layer is provided over the first insulating layer. The first insulating layer and the second conductive layer have openings reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is provided over the first semiconductor layer. The third semiconductor layer is provided over the second semiconductor layer. The first semiconductor layer includes a first metal oxide. The second semiconductor layer includes a second metal oxide. The third semiconductor layer includes a third metal oxide. The first metal oxide includes indium and a first element. The second metal oxide includes indium. The third metal oxide includes indium and a second element. The first element is one or more of gallium, aluminum, and tin. The second element is one or more of gallium, aluminum, and tin. The content of the first element in the first metal oxide is higher than the sum of the contents of gallium, aluminum, and tin in the second metal oxide. The content of the second element in the third metal oxide is higher than the sum of the contents of gallium, aluminum, and tin in the second metal oxide.

[0016] In the above-described semiconductor device, the composition of the first metal oxide is preferably the same as the composition of the third metal oxide.

[0017] In the semiconductor device described above, the first semiconductor layer is preferably thinner than the second semiconductor layer, and the third semiconductor layer is preferably thinner than the second semiconductor layer.

[0018] In the above-described semiconductor device, the first conductive layer and the second conductive layer each preferably contain an oxide conductor.

[0019] In the semiconductor device described above, the first insulating layer preferably includes a second insulating layer, a third insulating layer on the second insulating layer, and a fourth insulating layer on the third insulating layer. The third insulating layer preferably contains oxygen. The second insulating layer and the fourth insulating layer preferably contain nitrogen.

[0020] In the above-described semiconductor device, the first insulating layer preferably includes a second insulating layer, a third insulating layer on the second insulating layer, a fourth insulating layer on the third insulating layer, a fifth insulating layer on the fourth insulating layer, and a sixth insulating layer on the fifth insulating layer. The fourth insulating layer preferably contains oxygen. The second insulating layer, the third insulating layer, the fifth insulating layer, and the sixth insulating layer preferably each contain nitrogen. The second insulating layer preferably has a region having a higher hydrogen content than the third insulating layer. The sixth insulating layer preferably has a region having a higher hydrogen content than the fifth insulating layer.

[0021] According to one embodiment of the present invention, a transistor with a small size can be provided. Alternatively, a transistor with a short channel length can be provided. Alternatively, a transistor with high on-state current can be provided. Alternatively, a transistor with favorable electrical characteristics can be provided. Alternatively, a semiconductor device with a small occupation area can be provided. Alternatively, a semiconductor device with low wiring resistance can be provided. Alternatively, a semiconductor device or display device with low power consumption can be provided. Alternatively, a highly reliable transistor, semiconductor device, or display device can be provided. Alternatively, a high-resolution display device can be provided. Alternatively, a method for manufacturing a semiconductor device or display device with high productivity can be provided. Alternatively, a novel transistor, semiconductor device, or display device, or a manufacturing method thereof can be provided.

[0022] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of these effects. Effects other than these can be extracted from the description in the specification, drawings, and claims.

[0023] FIG. 1A is a top view showing an example of a semiconductor device. FIGS. 1B and 1C are cross-sectional views showing an example of a semiconductor device. FIGS. 2A to 2D are perspective views showing an example of a semiconductor device. FIG. 3 is a cross-sectional view showing an example of a semiconductor device. FIG. 4A is a top view showing an example of a semiconductor device. FIG. 4B is a cross-sectional view showing an example of a semiconductor device. FIG. 5 is a cross-sectional view showing an example of a semiconductor device. FIGS. 6A and 6B are cross-sectional views showing an example of a semiconductor device. FIGS. 7A and 7B are cross-sectional views showing an example of a semiconductor device. FIG. 8 is a cross-sectional view showing an example of a semiconductor device. FIGS. 9A to 9C are cross-sectional views showing an example of a semiconductor device. FIG. 10A is a top view showing an example of a semiconductor device. FIGS. 10B and 10C are cross-sectional views showing an example of a semiconductor device. FIG. 11A is a top view showing an example of a semiconductor device. FIGS. 11B and 11C are cross-sectional views showing an example of a semiconductor device. FIG. 12 is a cross-sectional view showing an example of a semiconductor device. FIGS. 13A to 13I are circuit diagrams showing an example of a semiconductor device. FIG. 14A is a top view showing an example of a semiconductor device. FIGS. 14B and 14C are cross-sectional views showing an example of a semiconductor device. 15A to 15C are cross-sectional views showing an example of a semiconductor device. FIG. 16A is a top view showing an example of a semiconductor device. FIGS. 16B and 16C are cross-sectional views showing an example of a semiconductor device. FIG. 17A is a top view showing an example of a semiconductor device. FIGS. 17B and 17C are cross-sectional views showing an example of a semiconductor device. FIG. 18A is a top view showing an example of a semiconductor device. FIG. 18B is a cross-sectional view showing an example of a semiconductor device. FIG. 19A is a top view showing an example of a semiconductor device. FIG. 19B is a cross-sectional view showing an example of a semiconductor device. FIGS. 20A and 20B are equivalent circuit diagrams of a semiconductor device. FIG. 20C is a top view showing an example of a semiconductor device. FIG. 21 is a cross-sectional view showing an example of a semiconductor device. FIG. 22 is a perspective view showing an example of a semiconductor device. FIGS. 23A to 23D are perspective views showing an example of a semiconductor device. FIGS. 24A and 24B are equivalent circuit diagrams of a semiconductor device. FIG. 24C is a top view showing an example of a semiconductor device. FIG. 25 is a cross-sectional view showing an example of a semiconductor device. FIG. 26 is a perspective view showing an example of a semiconductor device.27A to 27D are perspective views showing an example of a semiconductor device. FIGS. 28A to 28E are cross-sectional views showing an example of a manufacturing method of a semiconductor device. FIGS. 29A to 29D are cross-sectional views showing an example of a manufacturing method of a semiconductor device. FIG. 30 is a perspective view showing an example of a display device. FIGS. 31A and 31B are cross-sectional views showing an example of a display device. FIG. 32 is a cross-sectional view showing an example of a display device. FIGS. 33A to 33C are cross-sectional views showing an example of a display device. FIGS. 34A and 34B are cross-sectional views showing an example of a display device. FIG. 35 is a cross-sectional view showing an example of a display device. FIG. 36 is a cross-sectional view showing an example of a display device. FIG. 37 is a cross-sectional view showing an example of a display device. FIGS. 38A and 38B are cross-sectional views showing an example of a display device. FIGS. 39A to 39F are cross-sectional views showing an example of a manufacturing method of a display device. FIGS. 40A to 40D are views showing an example of an electronic device. FIGS. 41A to 41F are views showing an example of an electronic device. FIGS. 42A to 42G are views showing an example of an electronic device. FIG. 43 is a diagram showing the Id-Vg characteristics of the transistor according to the example.

[0024] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes can be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below.

[0025] In the configuration of the invention described below, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and repeated explanations thereof will be omitted. Furthermore, when referring to similar functions, the same hatching pattern may be used and no particular reference numeral may be assigned.

[0026] For ease of understanding, the position, size, range, etc. of each component shown in the drawings may not represent the actual position, size, range, etc. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.

[0027] In this specification, the ordinal numbers "first" and "second" are used for convenience and do not limit the number of components or the order of the components (for example, the order of processes or the order of stacking). Furthermore, the ordinal numbers assigned to components in one part of this specification may not match the ordinal numbers assigned to the same components in other parts of this specification or in the claims.

[0028] The terms "film" and "layer" can be interchangeable depending on the circumstances. For example, the term "conductive layer" can be changed to the term "conductive film." Or, for example, the term "insulating film" can be changed to the term "insulating layer."

[0029] A transistor is a type of semiconductor element that can perform functions such as amplifying current or voltage and performing switching operations to control conduction or non-conduction. The term "transistor" as used herein includes an insulated gate field effect transistor (IGFET) and a thin film transistor (TFT).

[0030] The functions of "source" and "drain" may be interchanged when transistors of different polarities are used or when the direction of current changes during circuit operation. For this reason, the terms "source" and "drain" may be used interchangeably in this specification. Note that the names of the source and drain of a transistor may be appropriately changed depending on the situation, such as the source terminal and drain terminal, or the source electrode and drain electrode.

[0031] In this specification, "electrically connected" includes connection via "something that has some kind of electrical function." Here, "something that has some kind of electrical function" is not particularly limited as long as it allows electrical signals to be transmitted and received between the connected objects. For example, "something that has some kind of electrical function" includes electrodes or wiring, as well as switching elements such as transistors, resistive elements, coils, capacitive elements, and other elements with various functions.

[0032] In this specification and the like, unless otherwise specified, the off-state current refers to the leakage current between the source and drain when the transistor is in an off state (also referred to as a non-conducting state or a cut-off state). Unless otherwise specified, the off-state current refers to the leakage current between the source and the gate when the voltage V ｇｓ is the threshold voltage V ｔｈ (For p-channel transistors, V ｔｈ This refers to a state of being (higher than)

[0033] In this specification, the phrase "top surface shapes are approximately the same" refers to at least a portion of the contours of stacked layers overlapping. For example, this includes cases where the upper and lower layers are processed using the same mask pattern or a portion of the same mask pattern. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer, or the upper layer may be located outside the lower layer. In these cases, the phrase "top surface shapes are approximately the same" may also be used. Furthermore, when the top surface shapes are the same or approximately the same, it can also be said that the edges are aligned or approximately aligned.

[0034] In this specification, a tapered shape refers to a shape in which at least a portion of the side surface of a structure is inclined relative to the substrate surface or the surface to be formed. For example, it is preferable to have a region in which the angle (also called the taper angle) between the inclined side surface and the substrate surface or the surface to be formed is less than 90 degrees. Note that the side surface of the structure, the substrate surface, and the surface to be formed do not necessarily need to be completely flat, and may be approximately planar with a slight curvature or approximately planar with a slight unevenness.

[0035] In this specification, etc., a device fabricated using a metal mask or an FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. Also, in this specification, etc., a device fabricated without using a metal mask or an FMM may be referred to as a device with an MML (metal maskless) structure.

[0036] In this specification and the like, a structure in which different light-emitting layers are formed for light-emitting elements (also referred to as light-emitting devices) with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. The SBS structure allows the materials and configuration to be optimized for each light-emitting element, increasing the degree of freedom in selecting materials and configurations and making it easier to improve brightness and reliability.

[0037] In this specification and the like, holes or electrons may be referred to as "carriers." Specifically, a hole injection layer or an electron injection layer may be referred to as a "carrier injection layer," a hole transport layer or an electron transport layer may be referred to as a "carrier transport layer," and a hole block layer or an electron block layer may be referred to as a "carrier block layer." Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier block layer may not be clearly distinguishable from each other depending on their cross-sectional shapes or characteristics. Furthermore, one layer may have two or three functions among the carrier injection layer, carrier transport layer, and carrier block layer.

[0038] In this specification and the like, a light-emitting element has an EL layer between a pair of electrodes. The EL layer has at least a light-emitting layer. Here, examples of layers (also referred to as functional layers) included in the EL layer include a light-emitting layer, a carrier injection layer (a hole injection layer and an electron injection layer), a carrier transport layer (a hole transport layer and an electron transport layer), and a carrier block layer (a hole block layer and an electron block layer). In this specification and the like, a light-receiving element (also referred to as a light-receiving device) has at least an active layer that functions as a photoelectric conversion layer between a pair of electrodes. In this specification and the like, one of the pair of electrodes may be referred to as a pixel electrode, and the other as a common electrode.

[0039] In this specification and the like, the sacrificial layer (which may also be referred to as a mask layer) is located above at least the light-emitting layer (more specifically, a layer that is processed into an island shape among the layers that make up the EL layer), and has the function of protecting the light-emitting layer during the manufacturing process.

[0040] In this specification and the like, a step disconnection refers to a phenomenon in which a layer, a film, or an electrode is separated due to the shape of the surface on which it is formed (for example, a step or the like).

[0041] Embodiment 1 In this embodiment, a semiconductor device of one embodiment of the present invention will be described with reference to FIGS.

[0042] <Configuration Example 1> [Configuration Example 1-1] A transistor that can be used in a semiconductor device according to one embodiment of the present invention will be described. FIG. 1A shows a top view (also referred to as a plan view) of a transistor 100. FIG. 1B shows a cross-sectional view of the section taken along dashed dotted line A1-A2 in FIG. 1A, and FIG. 1C shows a cross-sectional view of the section taken along dashed dotted line B1-B2 in FIG. 1A. Note that some components of the transistor 100 (such as a gate insulating layer) are omitted in FIG. 1A. As in FIG. 1A, some components are omitted from the top views of the transistor in the following drawings.

[0043] 2A to 2D are perspective views of the transistor 100. FIG. 2B shows a cross section taken along dashed line C1-C2 in FIG. 2A. FIG. 2C shows a perspective view of the insulating layer shown in FIG. 2A, with the outline indicated by a dashed line. Similarly, FIG. 2D shows a perspective view of the insulating layer shown in FIG. 2B, with the outline indicated by a dashed line.

[0044] The transistor 100 is provided over a substrate 102. The transistor 100 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 112a, and a conductive layer 112b. The conductive layer 104 functions as a gate electrode (also referred to as a first gate electrode). A part of the insulating layer 106 functions as a gate insulating layer (also referred to as a first gate insulating layer). The conductive layer 112a functions as one of a source electrode and a drain electrode, and the conductive layer 112b functions as the other. An entire region of the semiconductor layer 108 that overlaps with the gate electrode via the gate insulating layer between the source electrode and the drain electrode functions as a channel formation region. A region of the semiconductor layer 108 that is in contact with the source electrode functions as a source region, and a region that is in contact with the drain electrode functions as a drain region.

[0045] A conductive layer 112a is provided on a substrate 102, an insulating layer 110 is provided on the conductive layer 112a, and a conductive layer 112b is provided on the insulating layer 110. The insulating layer 110 has a region sandwiched between the conductive layer 112a and the conductive layer 112b. The conductive layer 112a has a region overlapping with the conductive layer 112b via the insulating layer 110. The insulating layer 110 has an opening 141 reaching the conductive layer 112a. It can also be said that the conductive layer 112a is exposed in the opening 141. The conductive layer 112b has an opening 143 in a region overlapping with the conductive layer 112a. The opening 143 is provided in a region overlapping with the opening 141. Note that in FIG. 1A and other drawings, the opening 141 in the insulating layer 110 and the opening 143 in the conductive layer 112b are denoted by different reference numerals, but these openings can also be collectively referred to as a single opening. In other words, the insulating layer 110 and the conductive layer 112b have openings that reach the conductive layer 112a.

[0046] The semiconductor layer 108 is provided to cover the openings 141 and 143. The semiconductor layer 108 has regions in contact with the top surface and side surfaces of the conductive layer 112b, the side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a. The semiconductor layer 108 is electrically connected to the conductive layer 112a in the opening 141. The semiconductor layer 108 has a shape that follows the shapes of the top surface and side surfaces of the conductive layer 112b, the side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.

[0047] 1B and other drawings show a configuration in which the semiconductor layer 108 has a stacked structure of a semiconductor layer 108a, a semiconductor layer 108b on the semiconductor layer 108a, and a semiconductor layer 108c on the semiconductor layer 108b.

[0048] The insulating layer 106, which functions as a gate insulating layer of the transistor 100, is provided to cover the openings 141 and 143. The insulating layer 106 is provided over the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110. The insulating layer 106 has a region in contact with the top surface and side surfaces of the semiconductor layer 108, the top surface and side surfaces of the conductive layer 112b, and the top surface of the insulating layer 110. The insulating layer 106 has a shape that follows the shapes of the top surface of the insulating layer 110, the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the semiconductor layer 108, and the top surface of the conductive layer 112a.

[0049] The conductive layer 104, which functions as a gate electrode of the transistor 100, is provided over the insulating layer 106 and has a region in contact with the top surface of the insulating layer 106. The conductive layer 104 has a region overlapping with the semiconductor layer 108 with the insulating layer 106 interposed therebetween. The conductive layer 104 has a shape that follows the shape of the top surface of the insulating layer 106.

[0050] The transistor 100 is a so-called top-gate transistor having a gate electrode above the semiconductor layer 108. Furthermore, since the bottom surface of the semiconductor layer 108 is in contact with the source electrode and the drain electrode, the transistor 100 can be referred to as a top-gate bottom-contact (TGBC) transistor. Furthermore, in the transistor 100, the source electrode and the drain electrode are located at different heights with respect to the surface of the substrate 102, which is the surface where the transistor 100 is formed, and a drain current flows in a direction perpendicular to or approximately perpendicular to the surface of the substrate 102. It can also be said that the drain current flows vertically or approximately vertically in the transistor 100. Therefore, the transistor of one embodiment of the present invention can be referred to as a vertical channel transistor or a VFET (Vertical Field Effect Transistor).

[0051] The channel length of the transistor 100 can be controlled by the thickness of the insulating layer 110 provided between the conductive layer 112a and the conductive layer 112b. Therefore, a transistor having a channel length shorter than the resolution limit of an exposure device used to manufacture the transistor can be manufactured with high precision. Furthermore, the variation in characteristics among multiple transistors 100 is also reduced. Therefore, the operation of a semiconductor device including the transistor 100 can be stabilized, and reliability can be improved. Furthermore, the reduced variation in characteristics increases the degree of freedom in circuit design, allowing the operating voltage of the semiconductor device to be lowered. Therefore, the power consumption of the semiconductor device can be reduced.

[0052] In the transistor of one embodiment of the present invention, a source electrode, a semiconductor layer, and a drain electrode can be provided so as to overlap with each other; therefore, the area occupied by the transistor can be significantly reduced compared to a so-called planar transistor in which a semiconductor layer is arranged in a planar shape.

[0053] The conductive layers 112a, 112b, and 104 can each function as wirings, and the transistor 100 can be provided in a region where these wirings overlap. That is, in a circuit including the transistor 100 and the wirings, the area occupied by the transistor 100 and the wirings can be reduced. Therefore, the area occupied by the circuit can be reduced, and a small-sized semiconductor device can be provided.

[0054] For example, when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-resolution display device can be obtained.Furthermore, when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (for example, one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, and a display device with a narrow frame can be obtained.

[0055] 1B and the like show an example in which the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 cover the openings 141 and 143; however, one embodiment of the present invention is not limited to this. A structure in which a step is formed between the insulating layer 110, the conductive layer 112b, and the conductive layer 112a, and the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 are provided along the step may also be used.

[0056] [Semiconductor Layer 108] The semiconductor layer 108 includes a semiconductor layer 108a, a semiconductor layer 108b on the semiconductor layer 108a, and a semiconductor layer 108c on the semiconductor layer 108b.

[0057] The band gap of the first material used for the semiconductor layer 108a is preferably different from the band gap of the second material used for the semiconductor layer 108b. The band gap of the third material used for the semiconductor layer 108c is preferably different from the band gap of the second material used for the semiconductor layer 108b. Note that the band gap of the third material may be the same as, or approximately the same as, the band gap of the first material, or may be different.

[0058] The band gap of the first material is preferably larger than that of the second material. The band gap of the third material is preferably larger than that of the second material. The semiconductor layer 108b is sandwiched between the semiconductor layers 108a and 108c, each of which has a larger band gap than the semiconductor layer 108b, to form a buried channel. This allows the semiconductor layer 108b to be the main current path in the semiconductor layer 108.

[0059] The conduction band minimum of the first material is preferably closer to the vacuum level than the conduction band minimum of the second material. The conduction band minimum of the third material is preferably closer to the vacuum level than the conduction band minimum of the second material. In other words, the electron affinity of the first material is preferably smaller than the electron affinity of the second material. The electron affinity of the third material is preferably smaller than the electron affinity of the second material. The electron affinity of the third material may be the same as or approximately the same as the electron affinity of the first material, or may be different.

[0060] Here, trap levels due to impurities or defects can be formed at and near the interface between the insulating layer 110 and the semiconductor layer 108. Examples of such impurities include residual components of an etchant or etching gas used to form the opening 141, and components of the conductive layers 112a and 112b that adhere to the side surfaces of the insulating layer 110 when the opening 141 is formed. By providing the semiconductor layer 108a between the semiconductor layer 108b and the insulating layer 110, the semiconductor layer 108b can be kept away from the trap levels.

[0061] Damage may occur to the interface between the insulating layer 106 and the semiconductor layer 108 and its vicinity when the insulating layer 106 is formed. As a result, trap states may be formed at the interface between the insulating layer 106 and the semiconductor layer 108 and its vicinity. By providing the semiconductor layer 108c between the semiconductor layer 108b and the insulating layer 106, the semiconductor layer 108b can be kept away from the trap states.

[0062] By sandwiching the semiconductor layer 108b, which is the main current path of the semiconductor layer 108, between the semiconductor layer 108a and the semiconductor layer 108c, it is possible to reduce trap levels at the interface of the semiconductor layer 108b and in the vicinity of the interface. This makes it possible to provide a transistor with a large on-state current and high reliability. Therefore, it is possible to provide a semiconductor device that has both high performance and high reliability.

[0063] The semiconductor material used for the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c is not particularly limited. For example, a semiconductor made of a single element or a compound semiconductor can be used. Examples of semiconductors made of a single element include silicon and germanium. Examples of compound semiconductors include gallium arsenide and silicon germanium. Other examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors. Note that these semiconductor materials may contain impurities as dopants.

[0064] The first material is preferably different from the second material, and the third material is preferably different from the second material, and the third material may be the same as, or substantially the same as, the first material, or may be different.

[0065] In this specification and the like, different materials refer to materials in which some or all of the constituent elements are different, or materials in which the constituent elements are the same but the composition is different.

[0066] The crystallinity of the semiconductor material used for the semiconductor layer 108 a, the semiconductor layer 108 b, and the semiconductor layer 108 c is not particularly limited, and any of an amorphous semiconductor, a single crystalline semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) may be used. The use of a single crystalline semiconductor or a crystalline semiconductor is preferable because it can suppress deterioration of transistor characteristics.

[0067] Each of the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c preferably includes a metal oxide (also referred to as an oxide semiconductor) that exhibits semiconductor characteristics.

[0068] The band gap of each of the first metal oxide used in the semiconductor layer 108a, the second metal oxide used in the semiconductor layer 108b, and the third metal oxide used in the semiconductor layer 108c is preferably 2.0 eV or more, more preferably 2.5 eV or more.

[0069] The band gap of the first metal oxide is preferably different from the band gap of the second metal oxide. For example, the difference between the band gap of the first metal oxide and the band gap of the second metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, and even more preferably 0.3 eV or more. The band gap of the third metal oxide is preferably different from the band gap of the second metal oxide. For example, the difference between the band gap of the third metal oxide and the band gap of the second metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, and even more preferably 0.3 eV or more. The band gap of the third metal oxide may be the same as or approximately the same as the band gap of the first metal oxide, or may be different.

[0070] The band gap of the first metal oxide is preferably larger than the band gap of the second metal oxide, and the band gap of the third metal oxide is preferably larger than the band gap of the second metal oxide, thereby achieving a buried channel structure.

[0071] The conduction band minimum of the first metal oxide is preferably closer to the vacuum level than the conduction band minimum of the second metal oxide. The conduction band minimum of the third metal oxide is preferably closer to the vacuum level than the conduction band minimum of the second metal oxide. In other words, the electron affinity of the first metal oxide is preferably smaller than that of the second metal oxide. The electron affinity of the third metal oxide is preferably smaller than that of the second metal oxide. The electron affinity of the third metal oxide may be the same as or approximately the same as that of the first metal oxide, or may be different.

[0072] The composition of the first metal oxide is preferably different from the composition of the second metal oxide. The composition of the third metal oxide is preferably different from the composition of the second metal oxide. The composition of the third metal oxide may be the same as, approximately the same as, or different from the composition of the first metal oxide.

[0073] The composition of the first metal oxide used for the semiconductor layer 108 a is preferably the same as the composition of the third metal oxide used for the semiconductor layer 108 c. By making the compositions the same, for example, the semiconductor layer 108 a and the semiconductor layer 108 c can be formed using the same sputtering target, thereby reducing manufacturing costs.

[0074] Examples of the first metal oxide, the second metal oxide, and the third metal oxide include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably contains at least indium or zinc. The metal oxide preferably contains two or three elements selected from indium, element M, and zinc. The element M is a metal element or semimetal element having a high bond energy with oxygen, for example, a metal element or semimetal element having a bond energy with oxygen higher than that of indium. Specific examples of the element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M contained in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably one or more selected from gallium, aluminum, and tin. In this specification and the like, metal elements and metalloid elements may be collectively referred to as "metal elements," and the "metal elements" described in this specification and the like may include metalloid elements.

[0075] The first metal oxide, the second metal oxide, and the third metal oxide may each be, for example, indium zinc oxide (In—Zn oxide, also referred to as IZO (registered trademark)), indium tin oxide (In—Sn oxide, also referred to as ITO), indium titanium oxide (In—Ti oxide), indium gallium oxide (In—Ga oxide), indium tungsten oxide (In—W oxide, also referred to as IWO), indium gallium aluminum oxide (In—Ga—Al oxide), indium gallium tin oxide (In—Ga—Sn oxide, also referred to as IGTO), gallium zinc oxide (Ga—Zn oxide, also referred to as GZO), aluminum zinc Examples of usable materials include indium tin oxide (Al-Zn oxide, also referred to as AZO), indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also referred to as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also referred to as IGZTO), and indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO, IGZAO, or IAGZO). Alternatively, indium tin oxide containing silicon (ITSO), gallium tin oxide (Ga-Sn oxide), and aluminum tin oxide (Al-Sn oxide) can be used.

[0076] By increasing the ratio of the number of indium atoms to the total number of atoms of all metal elements contained in the metal oxide, the field-effect mobility of the transistor can be increased, and a transistor with a large on-state current can be realized.

[0077] Note that the metal oxide may contain one or more metal elements with higher period numbers in the periodic table instead of or in addition to indium. The greater the overlap of the orbitals of metal elements, the greater the carrier conduction in the metal oxide. Therefore, including a metal element with a higher period number may improve the field-effect mobility of a transistor. Examples of metal elements with higher period numbers include metal elements belonging to the fifth period and the sixth period. Specific examples of such metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0078] The metal oxide may contain one or more nonmetallic elements. The nonmetallic elements in the metal oxide may increase the carrier concentration or narrow the band gap, thereby increasing the field-effect mobility of the transistor. Examples of nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0079] By increasing the ratio of the number of zinc atoms to the sum of the numbers of atoms of all metal elements contained in the metal oxide, the metal oxide can be made highly crystalline, and the diffusion of impurities in the metal oxide can be suppressed, thereby suppressing fluctuations in the electrical characteristics of the transistor and improving its reliability.

[0080] By increasing the ratio of the number of atoms of element M to the sum of the numbers of atoms of all metal elements contained in the metal oxide, the formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, carrier generation due to oxygen vacancies can be suppressed, and a transistor with a small off-state current can be obtained. Furthermore, fluctuations in the electrical characteristics of the transistor can be suppressed, thereby improving reliability.

[0081] The electrical characteristics and reliability of the transistors vary depending on the composition of the metal oxide used in the semiconductor layers 108 a, 108 b, and 108 c. Therefore, by varying the composition of the metal oxide depending on the electrical characteristics and reliability required of the transistors, a semiconductor device that has both excellent electrical characteristics and high reliability can be obtained.

[0082] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of the element M. Examples of atomic ratios of metal elements in such In-M-Zn oxides include In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:3, In:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4.1, In:M:Zn = 5:1:3, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5:1:8, In:M Examples of suitable compositions include In:M:Zn = 6:1:6, In:M:Zn = 10:1:1, In:M:Zn = 10:1:3, In:M:Zn = 10:1:4, In:M:Zn = 10:1:6, In:M:Zn = 10:1:7, In:M:Zn = 10:1:8, In:M:Zn = 5:2:5, In:M:Zn = 10:1:10, In:M:Zn = 20:1:10, In:M:Zn = 40:1:10, and compositions in the vicinity thereof. Note that a composition in the vicinity includes a range of ±30% of the desired atomic ratio. Increasing the atomic ratio of indium in the metal oxide can increase the on-state current or field-effect mobility of the transistor.

[0083] The atomic ratio of In in the In-M-Zn oxide may be less than the atomic ratio of the element M. Examples of atomic ratios of metal elements in such In-M-Zn oxide include In:M:Zn=1:3:2, In:M:Zn=1:3:3, In:M:Zn=1:3:4, and compositions close to these. By increasing the proportion of M atoms in the metal oxide, the generation of oxygen vacancies can be suppressed.

[0084] When the element M contains a plurality of metal elements, the total proportion of the number of atoms of the metal elements can be used as the proportion of the number of atoms of the element M.

[0085] In this specification and the like, the ratio of the number of indium atoms to the sum of the numbers of atoms of all contained metal elements may be referred to as the indium content. The same applies to other metal elements.

[0086] The band gap can be adjusted by differentiating the composition of the first metal oxide used in the semiconductor layer 108a from the composition of the second metal oxide used in the semiconductor layer 108b. Specifically, the content of element M in the first metal oxide is preferably higher than the content of element M in the second metal oxide. This allows the band gap of the first metal oxide to be larger than the band gap of the second metal oxide. For example, when the first metal oxide and the second metal oxide are In-M-Zn oxides, the first metal oxide can have a composition of In:M:Zn=1:1:1 (atomic ratio) or a composition thereabout, and the second metal oxide can have a composition of In:M:Zn=40:1:10 (atomic ratio) or a composition thereabout. Alternatively, the first metal oxide can have a composition of In:M:Zn=1:1:1 (atomic ratio) or a composition thereabout, and the second metal oxide can have a composition of In:M:Zn=10:1:10 (atomic ratio) or a composition thereabout. Alternatively, the first metal oxide may have a composition of In:M:Zn = 1:1:1 [atomic ratio] or a composition thereabout, and the second metal oxide may have a composition of In:M:Zn = 10:1:40 [atomic ratio] or a composition thereabout. It is particularly preferable to use one or more of gallium, aluminum, and tin as the element M. The element M contained in the first metal oxide, the element M contained in the second metal oxide, and the element M contained in the third metal oxide may be the same as or different from each other. Furthermore, when one or more of the first metal oxide, the second metal oxide, and the third metal oxide contain multiple elements M, each of the elements M may be the same as or different from the element M contained in the other metal oxides.

[0087] The composition of the third metal oxide is preferably different from the composition of the second metal oxide. Specifically, the content of element M in the third metal oxide is preferably higher than the content of element M in the second metal oxide. This allows the band gap of the third metal oxide to be larger than the band gap of the second metal oxide. For the third metal oxide, the description of the first metal oxide can be referred to. Note that the content of element M in the third metal oxide may be the same as or approximately the same as the content of element M in the first metal oxide, or may be different.

[0088] For example, the first metal oxide may have a composition of In:M:Zn=1:1:1 (atomic ratio) or thereabout, the second metal oxide may have a composition of In:M:Zn=40:1:10 (atomic ratio) or thereabout, the third metal oxide may have a composition of In:M:Zn=1:1:1 (atomic ratio) or thereabout, or the first metal oxide may have a composition of In:M:Zn=1:1:1 (atomic ratio) or thereabout, the second metal oxide may have a composition of In:M:Zn=10:1:10 (atomic ratio) or thereabout, and the third metal oxide may have a composition of In:M:Zn=1:1:1 (atomic ratio) or thereabout. Alternatively, the first metal oxide may have a composition of In:M:Zn=1:1:1 [atomic ratio] or a composition thereabout, the second metal oxide may have a composition of In:M:Zn=10:1:40 [atomic ratio] or a composition thereabout, and the third metal oxide may have a composition of In:M:Zn=1:1:1 [atomic ratio] or a composition thereabout.

[0089] More specifically, the first metal oxide may have an atomic ratio of In:Ga:Zn=1:1:1 or a similar composition, the second metal oxide may have an atomic ratio of In:Sn:Zn=40:1:10 or a similar composition, and the third metal oxide may have an atomic ratio of In:Ga:Zn=1:1:1 or a similar composition. Alternatively, the first metal oxide may have an atomic ratio of In:Ga:Zn=1:1:1 or a similar composition, the second metal oxide may have an atomic ratio of In:Sn:Zn=10:1:10 or a similar composition, and the third metal oxide may have an atomic ratio of In:Ga:Zn=1:1:1 or a similar composition. Alternatively, the first metal oxide may preferably have a composition of In:Ga:Zn=1:1:1 [atomic ratio] or a composition thereabout, the second metal oxide may preferably have a composition of In:Sn:Zn=10:1:40 [atomic ratio] or a composition thereabout, and the third metal oxide may preferably have a composition of In:Ga:Zn=1:1:1 [atomic ratio] or a composition thereabout.

[0090] The second metal oxide may not contain the element M. For example, the second metal oxide may be an In—Zn oxide, and the first and third metal oxides may be In-M-Zn oxides. Specifically, the second metal oxide may be an In—Zn oxide, and the first and third metal oxides may be In-M-Zn oxides. More specifically, the first metal oxide may have an In:Ga:Zn=1:1:1 (atomic ratio) or a composition therearound, the second metal oxide may have an In:Zn=4:1 (atomic ratio) or a composition therearound, and the third metal oxide may have an In:Ga:Zn=1:1:1 (atomic ratio) or a composition therearound. Alternatively, the first metal oxide may have an atomic ratio of In:Ga:Zn=1:1:1 or a similar composition, the second metal oxide may have an atomic ratio of In:Zn=1:1 or a similar composition, and the third metal oxide may have an atomic ratio of In:Ga:Zn=1:1:1 or a similar composition. Alternatively, the first metal oxide may have an atomic ratio of In:Ga:Zn=1:1:1 or a similar composition, the second metal oxide may have an atomic ratio of In:Zn=1:4 or a similar composition, and the third metal oxide may have an atomic ratio of In:Ga:Zn=1:1:1 or a similar composition.

[0091] The ratio of the content of element M to indium in the first metal oxide is preferably higher than the ratio of the content of element M to indium in the second metal oxide. This allows the band gap of the first metal oxide to be larger than the band gap of the second metal oxide. Similarly, the ratio of the content of element M to indium in the third metal oxide is preferably higher than the ratio of the content of element M to indium in the second metal oxide. This allows the band gap of the third metal oxide to be larger than the band gap of the second metal oxide.

[0092] Alternatively, the content of element M in the first metal oxide is preferably equal to or greater than the content of indium (i.e., the ratio of the content of element M to the content of indium is 1 or greater). The content of element M in the second metal oxide is preferably less than the content of indium (i.e., the ratio of the content of element M to the content of indium is less than 1). The content of element M in the third metal oxide is preferably equal to or greater than the content of indium (i.e., the ratio of the content of element M to the content of indium is 1 or greater).

[0093] The indium content of the second metal oxide is preferably higher than that of the first metal oxide, and the indium content of the second metal oxide is preferably higher than that of the third metal oxide, thereby enabling a transistor with a large on-state current to be obtained.

[0094] The compositions of the first metal oxide, the second metal oxide, and the third metal oxide can be analyzed by, for example, energy dispersive X-ray spectrometry (EDX), X-ray photoelectron spectrometry (XPS), inductively coupled plasma mass spectrometry (ICP-MS), or inductively coupled plasma atomic emission spectrometry (ICP-AES). Alternatively, a combination of these techniques may be used for the analysis. For elements with low content, the actual content may differ from the content obtained by analysis due to the influence of analytical accuracy. For example, when the content of element M is low, the content of element M obtained by analysis may be lower than the actual content, or it may be difficult to quantify, or element M may not be detected.

[0095] A specific example of using EDX to analyze the compositions of a first metal oxide, a second metal oxide, and a third metal oxide will be described. EDX can calculate the atomic ratio of each element constituting the target of analysis. Differences in indium content can be confirmed by comparing the atomic ratio (content) of indium to the calculated sum of atomic ratios of all metal elements. Furthermore, in EDX, the count number of characteristic X-rays corresponds to the ratio of elements constituting the metal oxide. Therefore, differences in indium content can be confirmed by the height of the indium peak. For example, if the indium content of the second metal oxide is higher than that of the first metal oxide, the count number of characteristic X-rays originating from indium in the second metal oxide will be higher than the count number of characteristic X-rays originating from indium in the first metal oxide. In EDX, the peak of a certain element refers to the point where the count number of that element reaches a maximum value in a spectrum where the horizontal axis represents the energy of the characteristic X-rays and the vertical axis represents the count number of the characteristic X-rays. Alternatively, the difference in content may be confirmed using the count number at the energy of characteristic X-rays specific to the element. For example, for indium, the count number at 3.287 keV (In-Lα) can be used.

[0096] Although the content of indium has been described as an example here, the same applies to the content of other elements. When checking the difference in content using the count number at the energy of characteristic X-rays specific to the element, for example, the count number at 9.243 keV (Ga-Kα) can be used for gallium, and the count number at 8.632 keV (Zn-Kα) can be used for zinc.

[0097] The metal oxide can be preferably formed by sputtering or atomic layer deposition (ALD). When the metal oxide is formed by sputtering, the composition of the formed metal oxide may differ from the composition of the sputtering target. In particular, the zinc content in the formed metal oxide may be reduced to about 50% of that of the sputtering target.

[0098] The semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c are preferably formed using a crystalline metal oxide. Examples of the structure of a crystalline metal oxide include a c-axis aligned crystal (CAAC) structure, a polycrystalline structure, and a nanocrystalline (nc) structure. By using a crystalline metal oxide for the semiconductor layer 108, the density of defect states in the semiconductor layer 108 can be reduced, and a highly reliable semiconductor device can be realized.

[0099] By using a metal oxide with high crystallinity for the semiconductor layer, the density of defect states in the semiconductor layer can be reduced, while by using a metal oxide with low crystallinity, a transistor capable of passing a large current can be realized.

[0100] Note that by using a crystalline first metal oxide for the semiconductor layer 108a, the crystallinity of the second metal oxide included in the semiconductor layer 108b formed thereon can be increased. Similarly, by using a crystalline second metal oxide for the semiconductor layer 108b, the crystallinity of the third metal oxide included in the semiconductor layer 108c formed thereon can be increased.

[0101] The higher the substrate temperature during metal oxide formation, the higher the crystallinity of the resulting metal oxide. The substrate temperature during formation can be adjusted, for example, by the temperature of the stage on which the substrate is placed during formation. Furthermore, the higher the ratio of the flow rate of oxygen gas to the total film formation gas used for formation (hereinafter also referred to as oxygen flow rate ratio) or the oxygen partial pressure in the processing chamber, the higher the crystallinity of the resulting metal oxide.

[0102] The composition of the first metal oxide used in the semiconductor layer 108a, the composition of the second metal oxide used in the semiconductor layer 108b, and the composition of the third metal oxide used in the semiconductor layer 108c may be the same or approximately the same. By using the same composition, for example, the same sputtering target can be used for formation, thereby reducing manufacturing costs. The crystallinity of the semiconductor layer 108b is preferably different from that of the semiconductor layer 108a. The crystallinity of the semiconductor layer 108b is preferably different from that of the semiconductor layer 108c. Specifically, the crystallinity of the semiconductor layer 108b is preferably lower than that of the semiconductor layer 108a. The crystallinity of the semiconductor layer 108b is preferably lower than that of the semiconductor layer 108c. This increases the conductivity of the semiconductor layer 108b, resulting in a transistor with a large on-state current. Furthermore, by providing the semiconductor layer 108a with high crystallinity on the insulating layer 110 side, it is possible to suppress diffusion of impurities at the interface between the insulating layer 110 and the semiconductor layer 108 and in the vicinity thereof into the semiconductor layer 108. By providing the semiconductor layer 108c with high crystallinity on the insulating layer 106 side, it is possible to reduce damage to the semiconductor layer 108 when forming the insulating layer 106. For example, it is possible to make the semiconductor layer 108b have a microcrystalline (nc) structure, and make the semiconductor layers 108a and 108c each have a CAAC structure.

[0103] Here, the example in which the crystallinity of the semiconductor layer 108b is lower than that of the semiconductor layer 108a and the semiconductor layer 108c is shown, but one embodiment of the present invention is not limited to this. The crystallinity of the semiconductor layer 108b may be higher than that of the semiconductor layer 108a and the semiconductor layer 108c.

[0104] Note that the composition of the first metal oxide may be the same as or approximately the same as the composition of the second metal oxide, and the composition of the third metal oxide may be different from the composition of the second metal oxide. In this case, the crystallinity of the semiconductor layer 108a is preferably different from that of the semiconductor layer 108b. Specifically, the crystallinity of the semiconductor layer 108a is preferably higher than that of the semiconductor layer 108b. Alternatively, the composition of the third metal oxide may be the same as or approximately the same as that of the second metal oxide, and the composition of the first metal oxide may be different from that of the second metal oxide. In this case, the crystallinity of the semiconductor layer 108c is preferably different from that of the semiconductor layer 108b. Specifically, the crystallinity of the semiconductor layer 108c is preferably higher than that of the semiconductor layer 108b.

[0105] The crystallinity of the semiconductor layer 108 a, the semiconductor layer 108 b, and the semiconductor layer 108 c can be analyzed by, for example, X-ray diffraction (XRD), a transmission electron microscope (TEM), or electron diffraction (ED). Alternatively, the analysis may be performed by combining a plurality of these techniques.

[0106] Note that when the composition of the first metal oxide and the composition of the second metal oxide are the same or approximately the same, the boundary (interface) between the semiconductor layer 108 a and the semiconductor layer 108 b may not be clearly visible. Similarly, when the composition of the second metal oxide and the composition of the third metal oxide are the same or approximately the same, the boundary (interface) between the semiconductor layer 108 b and the semiconductor layer 108 c may not be clearly visible.

[0107] An enlarged view of the side surface of the insulating layer 110 and its vicinity is shown in Figure 3. In Figure 3, the thickness T108a of the semiconductor layer 108a, the thickness T108b of the semiconductor layer 108b, and the thickness T108c of the semiconductor layer 108c are each indicated by a solid double-headed arrow. Here, the shortest distance between the insulating layer 110 and the insulating layer 106 in a cross-sectional view is taken as the thickness of the semiconductor layer 108. Specifically, the thicknesses of the layers of the semiconductor layer 108 at the midpoint between the heights of the top and bottom surfaces of the insulating layer 110 are shown.

[0108] The thickness T108b of the semiconductor layer 108b is preferably 1.0 nm or more and 100 nm or less, more preferably 1.0 nm or more and 50 nm or less, even more preferably 3.0 nm or more and 50 nm or less, even more preferably 3.0 nm or more and 40 nm or less, even more preferably 3.0 nm or more and 30 nm or less, even more preferably 3.0 nm or more and 20 nm or less, even more preferably 3.0 nm or more and 15 nm or less, even more preferably 3.0 nm or more and 10 nm or less, even more preferably 5.0 nm or more and 10 nm or less.

[0109] If the thickness T108a of the semiconductor layer 108a is small, the distance between the semiconductor layer 108b, which is the main current path, and the trap levels at or near the interface between the insulating layer 110 and the semiconductor layer 108 is shortened, and the on-current may be reduced. Furthermore, reliability may be degraded. On the other hand, if the thickness T108a of the semiconductor layer 108a is large, the distance between the semiconductor layer 108b and the conductive layers 112a and 112b, which function as the source and drain electrodes, is lengthened, and the on-current may be reduced. The thickness T108a of the semiconductor layer 108a is preferably 0.1 nm to 10 nm, more preferably 0.3 nm to 10 nm, further preferably 0.3 nm to 5.0 nm, further preferably 0.5 nm to 5.0 nm, further preferably 0.5 nm to 3.0 nm, further preferably 0.7 nm to 3.0 nm, further preferably 0.7 nm to 2.0 nm, and further preferably 1.0 nm to 2.0 nm. By setting the thickness of the semiconductor layer 108a within the above range, a transistor with high on-state current and high reliability can be obtained.

[0110] If the thickness T108c of the semiconductor layer 108c is small, the distance between the trap levels at or near the interface between the insulating layer 106 and the semiconductor layer 108 and the semiconductor layer 108b, which is the main current path, becomes short, and the on-current may become small. Furthermore, reliability may be deteriorated. On the other hand, if the thickness T108c of the semiconductor layer 108c is large, the distance between the conductive layer 104, which functions as a gate electrode, and the semiconductor layer 108b becomes long, and the on-current may become small. The thickness T108c of the semiconductor layer 108c is preferably 0.5 nm to 20 nm, more preferably 0.5 nm to 15 nm, further preferably 1.0 nm to 15 nm, further preferably 1.0 nm to 10 nm, further preferably 2.0 nm to 10 nm, further preferably 2.0 nm to 7.0 nm, and further preferably 2.0 nm to 5.0 nm. When the thickness of the semiconductor layer 108c is in the above range, a transistor with large on-state current and high reliability can be obtained.

[0111] When an oxide semiconductor is used for the semiconductor layer 108, hydrogen contained in the oxide semiconductor reacts with oxygen that is bonded to a metal atom to form water, and oxygen vacancies (V Ｏ Furthermore, defects in which hydrogen enters an oxygen vacancy (hereinafter referred to as V Ｏ Hydrogen atoms (H) may function as donors and generate electrons as carriers. Furthermore, some of the hydrogen atoms may bond with oxygen atoms that are bonded to metal atoms to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to have normally-on characteristics. Furthermore, hydrogen in an oxide semiconductor is easily moved by stresses such as heat and an electric field. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be reduced.

[0112] When an oxide semiconductor is used for the semiconductor layer 108, V in the semiconductor layer 108 Ｏ It is preferable to reduce H as much as possible to obtain high-purity intrinsic or substantially high-purity intrinsic. ＯTo obtain an oxide semiconductor in which H is sufficiently reduced, it is important to remove impurities such as water and hydrogen from the oxide semiconductor (sometimes referred to as dehydration or dehydrogenation treatment) and to supply oxygen to the oxide semiconductor to repair oxygen vacancies. Ｏ By using an oxide semiconductor in which impurities such as H are sufficiently reduced for a channel formation region of a transistor, stable electrical characteristics can be obtained. Note that supplying oxygen to an oxide semiconductor to repair oxygen vacancies is sometimes referred to as oxygen addition treatment. In particular, the semiconductor layer 108b, which is a main current path, is formed by V Ｏ It is preferable that H is low.

[0113] In the case where an oxide semiconductor is used for the semiconductor layer 108, the carrier concentration of the oxide semiconductor in a region functioning as a channel formation region is 1×10 １８ cm −３ Preferably, it is 1×10 or less. １７ cm −３ More preferably, it is less than 1×10 １６ cm −３ More preferably, it is less than 1×10 １３ cm −３ More preferably, it is less than 1×10 １２ cm −３ Note that the lower limit of the carrier concentration of the oxide semiconductor in the region functioning as a channel formation region is not limited, but is preferably less than 1×10 −９ cm −３ In the semiconductor layer 108b, a region that functions as a channel formation region preferably has a low carrier concentration, and the carrier concentration is preferably in the above-described range.

[0114] A transistor using an oxide semiconductor (hereinafter referred to as an OS transistor) has extremely high field-effect mobility compared to a transistor using amorphous silicon. Furthermore, an OS transistor has an extremely low off-state current and can hold charge accumulated in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of an OS transistor can reduce the power consumption of a semiconductor device.

[0115] OS transistors exhibit little change in electrical characteristics due to radiation exposure, i.e., have high radiation resistance, and therefore can be suitably used in environments where radiation may be incident. It can also be said that OS transistors have high reliability against radiation. For example, OS transistors can be suitably used in pixel circuits of X-ray flat panel detectors. Furthermore, OS transistors can be suitably used in semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton rays, and neutron rays).

[0116] Examples of silicon that can be used for the semiconductor layer 108 include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polysilicon (LTPS).

[0117] A transistor using amorphous silicon for the semiconductor layer 108 can be formed over a large glass substrate and can be manufactured at low cost. A transistor using polycrystalline silicon for the semiconductor layer 108 has high field-effect mobility and can operate at high speed. A transistor using microcrystalline silicon for the semiconductor layer 108 has higher field-effect mobility and can operate at high speed than a transistor using amorphous silicon.

[0118] The semiconductor layer 108 may include a layered material that functions as a semiconductor. A layered material is a general term for a group of materials that have a layered crystal structure. A layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked via bonds weaker than covalent bonds or ionic bonds, such as van der Waals bonds. A layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, a transistor with a large on-state current can be provided.

[0119] Examples of the layered material include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogen (an element belonging to Group 16). Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides. Specific examples of transition metal chalcogenides that can be used as semiconductor layers of transistors include molybdenum sulfide (typically MoS ２ ), molybdenum selenide (typically MoSe ２ ), molybdenum telluride (typically MoTe ２ ), tungsten sulfide (typically WS ２ ), tungsten selenide (typically WSe ２ ), tungsten tellurium (typically WTe ２ ), hafnium sulfide (typically HfS ２ ), hafnium selenide (typically HfSe ２ ), zirconium sulfide (typically ZrS ２ ), zirconium selenide (typically ZrSe ２ ) etc.

[0120] [Opening 141, Opening 143] The top surface shapes of openings 141 and 143 are not limited and may be, for example, a circle, an ellipse, a triangle, a quadrangle (including a rectangle, a diamond, and a square), a pentagon, or other polygonal shape, or a shape with rounded corners. The polygon may be either a concave polygon (a polygon with at least one interior angle exceeding 180 degrees) or a convex polygon (a polygon with all interior angles less than 180 degrees). As shown in FIG. 1A and other figures, the top surface shapes of openings 141 and 143 are preferably circular. By making the top surface shapes of the openings circular, the processing accuracy when forming the openings can be improved, allowing for the formation of openings of finer sizes. Note that, in this specification and other figures, "circular" is not limited to a perfect circle.

[0121] In this specification and the like, the top surface shape of opening 141 refers to the shape of the top surface end portion of insulating layer 110 on the opening 141 side. Also, the top surface shape of opening 143 refers to the shape of the bottom surface end portion of conductive layer 112b on the opening 143 side.

[0122] 1A and other figures, the top surface shapes of openings 141 and 143 can be made to match or approximately match each other. In this case, as shown in Figures 1B and 1C and other figures, it is preferable that the bottom surface edge of conductive layer 112b on the opening 143 side match or approximately match the top surface edge of insulating layer 110 on the opening 141 side. The bottom surface of conductive layer 112b refers to the surface on the insulating layer 110 side. The top surface of insulating layer 110 refers to the surface on the conductive layer 112b side.

[0123] The top surface shapes of openings 141 and 143 do not have to match each other. Furthermore, when the top surfaces of openings 141 and 143 are circular, openings 141 and 143 may or may not be concentric.

[0124] The channel length and channel width of the transistor 100 will be described with reference to FIGS. 4A and 4B, which are enlarged views of FIGS. 1A and 1B.

[0125] In the semiconductor layer 108, a region in contact with the conductive layer 112a functions as one of a source region and a drain region, a region in contact with the conductive layer 112b functions as the other of the source region and the drain region, and a region between the source region and the drain region functions as a channel formation region.

[0126] The channel length of the transistor 100 is the distance between the source region and the drain region. In Figure 4B, the channel length L100 of the transistor 100 is indicated by a dashed double-headed arrow. The channel length L100 can be considered to be the shortest distance between the region of the semiconductor layer 108 that contacts the conductive layer 112a and the region that contacts the conductive layer 112b in a cross-sectional view.

[0127] The channel length L100 of the transistor 100 corresponds to the length of the side surface of the insulating layer 110 on the opening 141 side in a cross-sectional view. That is, the channel length L100 is determined by the film thickness T110 of the insulating layer 110 and the angle θ110 between the side surface of the insulating layer 110 on the opening 141 side and the surface on which the insulating layer 110 is to be formed (here, the upper surface of the conductive layer 112a). Therefore, for example, the channel length L100 can be set to a value smaller than the resolution limit of the exposure equipment, thereby enabling the realization of a transistor with a very small size. Specifically, it is possible to realize a transistor with an extremely short channel length that could not be realized using conventional exposure equipment for mass production of flat panel displays (e.g., a minimum line width of approximately 2 μm or 1.5 μm). Furthermore, it is also possible to realize a transistor with a channel length of less than 10 nm without using the extremely expensive exposure equipment used in cutting-edge LSI technology.

[0128] The channel length L100 may be, for example, 5 nm or more, 7 nm or more, or 10 nm or more, and may be less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less. For example, the channel length L100 may be 100 nm or more and 1 μm or less.

[0129] By shortening the channel length L100, the on-state current of the transistor 100 can be increased. By using the transistor 100, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, a small-sized semiconductor device can be obtained. For example, when the semiconductor device of one embodiment of the present invention is applied to a large display device or a high-resolution display device, even if the number of wirings is increased, signal delay in each wiring can be reduced, and display unevenness can be suppressed. Furthermore, since the area occupied by the circuit can be reduced, the frame of the display device can be narrowed.

[0130] The channel length L100 can be controlled by adjusting the thickness T110 and angle θ110 of the insulating layer 110. In Fig. 4B, the thickness T110 of the insulating layer 110 is indicated by a dashed double-headed arrow.

[0131] The thickness T110 of the insulating layer 110 can be, for example, 5 nm or more, 7 nm or more, or 10 nm or more, and less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less.

[0132] The side surface of the insulating layer 110 on the opening 141 side is preferably tapered. The angle θ110 formed between the side surface of the insulating layer 110 on the opening 141 side and the surface on which the insulating layer 110 is to be formed (here, the top surface of the conductive layer 112a) is preferably less than 90 degrees. By reducing the angle θ110, the coverage of a layer (e.g., the semiconductor layer 108) formed on the insulating layer 110 can be improved. Furthermore, the smaller the angle θ110, the longer the channel length L100 can be, and the larger the angle θ110, the shorter the channel length L100 can be.

[0133] The angle θ110 may be, for example, 30 degrees or more, 35 degrees or more, 40 degrees or more, 45 degrees or more, 50 degrees or more, 55 degrees or more, 60 degrees or more, 65 degrees or more, or 70 degrees or more, and may be less than 90 degrees, 85 degrees or less, or 80 degrees or less. The angle θ110 may also be 75 degrees or less, 70 degrees or less, 65 degrees or less, or 60 degrees or less.

[0134] 1B and the like show a cross-sectional configuration in which the side surface of the insulating layer 110 on the opening 141 side has a straight line shape; however, one embodiment of the present invention is not limited to this. In a cross-sectional view, the side surface of the insulating layer 110 on the opening 141 side may have a curved line shape or may have both a straight line region and a curved line region. Similarly, the side surface of the conductive layer 112b on the opening 143 side may have a curved line shape or may have both a straight line region and a curved line region.

[0135] 4A and 4B, the width D143 of the opening 143 is indicated by a two-dot chain line with a double arrow. FIG. 4A shows an example in which the top surface shapes of the openings 141 and 143 are circular. In this case, the width D143 corresponds to the diameter of the circle, and the channel width W100 of the transistor 100 is the length of the circumference of the circle. In other words, the channel width W100 is π×D143. In this way, when the top surface shapes of the openings 141 and 143 are circular, a transistor with a smaller channel width W100 can be realized compared to other shapes.

[0136] The diameter of the opening 141 and the diameter of the opening 143 may differ from each other. Furthermore, the inner diameter of the opening 141 and the inner diameter of the opening 143 may each vary in the depth direction. The diameter of the opening may be, for example, the average value of the diameter at the highest point, the diameter at the lowest point, and the diameter at the midpoint between these in a cross-sectional view of the insulating layer 110 (or the insulating layer 110b). Alternatively, the diameter of the opening may be, for example, any of the diameter at the highest point, the diameter at the lowest point, or the diameter at the midpoint between these in a cross-sectional view of the insulating layer 110 (or the insulating layer 110b).

[0137] When the opening 143 is formed using photolithography, the width D143 of the opening 143 is equal to or greater than the limit resolution of the exposure device. The width D143 can be, for example, 200 nm or greater, 300 nm or greater, 400 nm or greater, or 500 nm or greater, and can be less than 5.0 μm, 4.5 μm or less, 4.0 μm or less, 3.5 μm or less, 3.0 μm or less, 2.5 μm or less, 2.0 μm or less, 1.5 μm or less, or 1.0 μm or less.

[0138] [Insulating Layer 110] The insulating layer 110 may have a single-layer structure or a stacked structure of two or more layers. The insulating layer 110 preferably has one or more inorganic insulating films. Examples of inorganic insulating films include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Examples of oxide insulating films include a silicon oxide film, an aluminum oxide film, a magnesium oxide film, a gallium oxide film, a germanium oxide film, an yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, a neodymium oxide film, a hafnium oxide film, a tantalum oxide film, a cerium oxide film, a gallium zinc oxide film, and a hafnium aluminate film. Examples of nitride insulating films include a silicon nitride film and an aluminum nitride film. Examples of oxynitride insulating films include a silicon oxynitride film, an aluminum oxynitride film, a gallium oxynitride film, an yttrium oxynitride film, and a hafnium oxynitride film. Examples of nitride oxide insulating films include a silicon nitride oxide film and an aluminum nitride oxide film.

[0139] In this specification and the like, an oxynitride refers to a material having a composition in which oxygen is contained in a larger amount than nitrogen, and a nitride oxide refers to a material having a composition in which nitrogen is contained in a larger amount than oxygen.

[0140] The insulating layer 110 has a region in contact with the semiconductor layer 108. When an oxide semiconductor is used for the semiconductor layer 108, it is preferable to use oxide or oxynitride for at least a part of the region of the insulating layer 110 in contact with the semiconductor layer 108 in order to improve the interface characteristics between the semiconductor layer 108 and the insulating layer 110. Specifically, it is preferable to use oxide or oxynitride for the region of the insulating layer 110 in contact with the channel formation region of the semiconductor layer 108.

[0141] It is preferable to use one or more of the above-described oxide insulating film and oxynitride insulating film for the insulating layer 110b in contact with the channel formation region of the semiconductor layer 108. Specifically, it is preferable to use one or both of a silicon oxide film and a silicon oxynitride film for the insulating layer 110b.

[0142] It is more preferable to use a film that releases oxygen when heated for the insulating layer 110b. When heat is applied during the manufacturing process of the transistor 100, the insulating layer 110b releases oxygen, thereby supplying oxygen to the semiconductor layer 108. By supplying oxygen from the insulating layer 110b to the semiconductor layer 108, particularly to the channel formation region of the semiconductor layer 108, oxygen vacancies in the semiconductor layer 108 can be reduced, and a transistor with good electrical characteristics and high reliability can be obtained.

[0143] For example, oxygen can be supplied to the insulating layer 110b by heat treatment in an oxygen-containing atmosphere or plasma treatment in an oxygen-containing atmosphere. Alternatively, oxygen may be supplied by forming an oxide film on the top surface of the insulating layer 110b by sputtering in an oxygen-containing atmosphere. The oxide film may then be removed. Note that in Embodiment 2 described later, an example in which oxygen is supplied to the insulating layer 110b by forming a metal oxide layer will be described.

[0144] Here, oxygen released from the insulating layer 110b reaches the semiconductor layer 108b via the semiconductor layer 108a. If the thickness T108a of the semiconductor layer 108a is large, the amount of oxygen supplied to the semiconductor layer 108b, which is the main current path, may decrease, resulting in increased oxygen vacancies in the semiconductor layer 108b. The thickness T108a of the semiconductor layer 108a is preferably within the above-mentioned range. Furthermore, the thickness T108a of the semiconductor layer 108a is preferably thinner than the thickness T108b of the semiconductor layer 108b and thinner than the thickness T108c of the semiconductor layer 108c. This increases the amount of oxygen supplied to the semiconductor layer 108b, thereby reducing oxygen vacancies in the semiconductor layer 108b. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained. Note that the thickness T108a of the semiconductor layer 108a is preferably thinner than the thickness T108b of the semiconductor layer 108b. The thickness T108a of the semiconductor layer 108a may be the same as the thickness T108c of the semiconductor layer 108c, or may be thicker than the thickness T108c.

[0145] The insulating layer 110b is preferably formed by a deposition method such as a sputtering method or a plasma-enhanced chemical vapor deposition (PECVD) method. In particular, by using a sputtering method without using a gas containing hydrogen as a deposition gas, a film with an extremely low hydrogen content can be obtained. Therefore, supply of hydrogen to the semiconductor layer 108 can be suppressed, and the electrical characteristics of the transistor 100 can be stabilized.

[0146] The thickness of the insulating layer 110b can be determined within the range of the thickness T110 of the insulating layer 110 described above.

[0147] It is preferable to use a film through which oxygen does not easily diffuse for each of the insulating layers 110a and 110c. This prevents oxygen contained in the insulating layer 110b from permeating to the substrate 102 side through the insulating layer 110a and from permeating to the insulating layer 106 side through the insulating layer 110c due to heating. In other words, by sandwiching the insulating layer 110b between the insulating layers 110a and 110c, through which oxygen does not easily diffuse, the oxygen contained in the insulating layer 110b can be confined. This allows oxygen to be effectively supplied to the semiconductor layer 108.

[0148] The insulating layer 110a and the insulating layer 110c are preferably formed using a film through which hydrogen does not easily diffuse, which can prevent hydrogen from diffusing from the outside of the transistor to the semiconductor layer 108 through the insulating layer 110a or the insulating layer 110c.

[0149] For the insulating layer 110a and the insulating layer 110c, it is preferable to use one or more of the above-mentioned oxide insulating film, nitride insulating film, oxynitride insulating film, and nitride oxide insulating film, and it is preferable to use one or more of a silicon nitride film, a silicon nitride oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, an aluminum nitride film, a hafnium oxide film, and a hafnium aluminate film. In particular, a silicon nitride film and a silicon nitride oxide film have characteristics of releasing little impurities (e.g., water and hydrogen) from themselves and being less permeable to oxygen and hydrogen, and therefore can be suitably used for the insulating layer 110a and the insulating layer 110c.

[0150] Oxygen contained in the insulating layer 110b may oxidize the conductive layer 112a and the conductive layer 112b, resulting in an increase in electrical resistance. By providing the insulating layer 110a between the insulating layer 110b and the conductive layer 112a, it is possible to prevent the conductive layer 112a from being oxidized and the electrical resistance from increasing. Similarly, by providing the insulating layer 110c between the insulating layer 110b and the conductive layer 112b, it is possible to prevent the conductive layer 112b from being oxidized and the electrical resistance from increasing. At the same time, the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 increases, thereby reducing oxygen vacancies in the semiconductor layer 108.

[0151] The thickness of each of the insulating layers 110a and 110c is preferably 5 nm to 100 nm, more preferably 5 nm to 70 nm, further preferably 10 nm to 70 nm, further preferably 10 nm to 50 nm, further preferably 20 nm to 50 nm, and further preferably 20 nm to 40 nm. By setting the thicknesses of the insulating layers 110a and 110c within the above ranges, oxygen vacancies in the semiconductor layer 108, particularly in the channel formation region, can be reduced.

[0152] For example, it is preferable to use a silicon nitride film for the insulating layer 110a and the insulating layer 110c, and a silicon oxynitride film for the insulating layer 110b.

[0153] In the semiconductor layer 108, one or both of a region in contact with the insulating layer 110a and a region in contact with the insulating layer 110c may have a higher carrier concentration and lower resistance than the channel formation region. In some cases, the region in contact with the insulating layer 110a and the region in contact with the insulating layer 110c may function as a source region or a drain region, respectively. In this case, the effective channel length of the transistor 100 may be shorter than the aforementioned channel length L100.

[0154] For example, by using a material that releases impurities (for example, water or hydrogen) for the insulating layer 110a, the electrical resistance of a region of the semiconductor layer 108 in contact with the insulating layer 110a may be reduced. This region can function as a buffer region for alleviating the drain electric field. Note that this region may also function as a source region or a drain region. The same applies to the insulating layer 110c.

[0155] 5 shows a structure in which a region of the semiconductor layer 108 in contact with the insulating layer 110b functions as a channel formation region. The channel length L100 of the transistor 100 is determined by the thickness T110b of the insulating layer 110b in contact with the channel formation region in a cross-sectional view and the angle θ110b formed between the side surface of the insulating layer 110b on the opening 141 side and the surface where the insulating layer 110b is to be formed (here, the top surface of the insulating layer 110a). The thickness T110b is preferably in the range of the thickness T110 described above. The angle θ110b is preferably in the range of the angle θ110 described above.

[0156] Here, hydrogen may diffuse from one or more of the insulating layers 110a and 110c to the region of the semiconductor layer 108 that is in contact with the insulating layer 110b. However, oxygen is supplied from the insulating layer 110b to the semiconductor layer 108, which may cause oxygen deficiency (V Ｏ ) and V Ｏ An increase in H is suppressed. Therefore, at least a region of the semiconductor layer 108 in contact with the insulating layer 110b can function as a channel formation region, and a highly reliable transistor can be obtained which has favorable electrical characteristics.

[0157] Note that when the channel length L100 of the transistor 100 is shortened, the thicknesses of the insulating layers 110a and 110c are preferably thin. For example, when the channel length L100 is set to 100 nm or less, the thicknesses of the insulating layers 110a and 110c are preferably 1.0 nm to 50 nm, more preferably 3.0 nm to 50 nm, even more preferably 3.0 nm to 40 nm, still more preferably 3.0 nm to 30 nm, still more preferably 3.0 nm to 20 nm, still more preferably 3.0 nm to 15 nm, even more preferably 3.0 nm to 10 nm, and still more preferably 5.0 nm to 10 nm. This can reduce the amount of hydrogen diffusing into the region of the semiconductor layer 108 that is in contact with the insulating layer 110b. This can result in a transistor that exhibits good electrical characteristics and is highly reliable even when the channel length L100 is short.

[0158] [Conductive Layer 112a, Conductive Layer 112b, and Conductive Layer 104] The conductive layer 112a, the conductive layer 112b, and the conductive layer 104 may each have a single-layer structure or a stacked structure of two or more layers. Materials that can be used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 include, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, as well as alloys containing one or more of the above metals. Low-resistance conductive materials containing one or more of copper, silver, gold, and aluminum can be preferably used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104. Copper and aluminum are particularly preferred because of their excellent mass productivity.

[0159] The conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can each be formed using a conductive metal oxide (also referred to as an oxide conductor). Examples of oxide conductors (OC) include indium oxide, zinc oxide, In—Sn oxide (ITO), In—Zn oxide, In—W oxide, In—W—Zn oxide, In—Ti oxide, In—Ti—Sn oxide, In—Sn—Si oxide (also referred to as ITO containing silicon, ITSO), zinc oxide to which gallium is added, and In—Ga—Zn oxide. In particular, oxide conductors containing indium are preferable because of their high conductivity.

[0160] When oxygen vacancies are formed in a metal oxide having semiconductor properties and hydrogen is added to the oxygen vacancies, a donor level is formed near the conduction band. As a result, the metal oxide becomes electrically conductive, and the conductivity of the metal oxide increases. The metal oxide that has become electrically conductive can be called an oxide conductor.

[0161] The conductive layers 112a, 112b, and 104 may each have a stacked-layer structure of a conductive film containing the oxide conductor (metal oxide) and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, wiring resistance can be reduced.

[0162] A Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied to each of the conductive layer 112 a, the conductive layer 112 b, and the conductive layer 104. By using a Cu-X alloy film, it is possible to process the film by wet etching, thereby reducing manufacturing costs.

[0163] Note that the conductive layers 112a, 112b, and 104 may all be formed using the same material, or at least one of them may be formed using a different material.

[0164] The conductive layer 112a and the conductive layer 112b each have a region in contact with the semiconductor layer 108. When an oxide semiconductor is used for the semiconductor layer 108, if a metal that is easily oxidized (e.g., aluminum) is used for the conductive layer 112a or the conductive layer 112b, an insulating oxide (e.g., aluminum oxide) may be formed between the conductive layer 112a or the conductive layer 112b and the semiconductor layer 108, which may hinder conduction therebetween. Therefore, for the conductive layer 112a and the conductive layer 112b, it is preferable to use a conductive material that is not easily oxidized, a conductive material that maintains low electrical resistance even when oxidized, or an oxide conductor.

[0165] For the conductive layer 112a and the conductive layer 112b, it is preferable to use, for example, titanium, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel. These are preferable because they are conductive materials that are resistant to oxidation or materials that maintain low electrical resistance even when oxidized. Note that when the conductive layer 112a or the conductive layer 112b has a stacked structure, it is preferable to use a conductive material that is resistant to oxidation for at least the layer in contact with the semiconductor layer 108.

[0166] The conductive layer 112 a and the conductive layer 112 b can each be formed using any of the above-described oxide conductors, such as indium oxide, zinc oxide, ITO, In—Zn oxide, In—W oxide, In—W—Zn oxide, In—Ti oxide, In—Ti—Sn oxide, In—Sn oxide containing silicon, and zinc oxide doped with gallium.

[0167] The conductive layer 112a and the conductive layer 112b may each be made of a nitride conductor, such as tantalum nitride or titanium nitride.

[0168] [Insulating Layer 106] The insulating layer 106 may have a single-layer structure or a stacked structure of two or more layers. The insulating layer 106 preferably includes one or more inorganic insulating films. Examples of inorganic insulating films include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. The insulating layer 106 can be formed using the same material as that used for the insulating layer 110.

[0169] The insulating layer 106 has a region in contact with the semiconductor layer 108. When an oxide semiconductor is used for the semiconductor layer 108, any one of the above-described oxide insulating film and oxynitride insulating film is preferably used for at least a film that is in contact with the semiconductor layer 108 among films that form the insulating layer 106. It is more preferable to use a film that releases oxygen by heating for the insulating layer 106.

[0170] Specifically, when the insulating layer 106 has a single-layer structure, it is preferable to use a silicon oxide film or a silicon oxynitride film for the insulating layer 106 .

[0171] The insulating layer 106 can have a stacked-layer structure of an oxide insulating film or an oxynitride insulating film on a side in contact with the semiconductor layer 108 and a nitride insulating film or a nitride oxide insulating film on a side in contact with the conductive layer 104. As the oxide insulating film or the oxynitride insulating film, for example, a silicon oxide film or a silicon oxynitride film is preferably used. As the nitride insulating film or the nitride oxide insulating film, a silicon nitride film or a silicon nitride oxide film is preferably used.

[0172] A silicon nitride film and a silicon nitride oxide film have characteristics of releasing little impurities (for example, water and hydrogen) from themselves and being difficult for oxygen and hydrogen to permeate, and therefore can be suitably used as the insulating layer 106. By suppressing the diffusion of impurities from the insulating layer 106 to the semiconductor layer 108, the electrical characteristics of the transistor can be improved and the reliability can be increased.

[0173] Note that in a miniaturized transistor, a thin gate insulating layer may result in a large leakage current. By using a material with a high relative dielectric constant (also referred to as a high-k material) for the gate insulating layer, a transistor can be operated at a low voltage while maintaining a physical film thickness. Examples of high-k materials that can be used for the insulating layer 106 include gallium oxide, hafnium oxide, zirconium oxide, an oxide containing aluminum and hafnium, an oxynitride containing aluminum and hafnium, an oxide containing silicon and hafnium, an oxynitride containing silicon and hafnium, and a nitride containing silicon and hafnium.

[0174] [Substrate 102] There are no significant limitations on the material of the substrate 102, but it must have at least heat resistance sufficient to withstand subsequent heat treatment. For example, the substrate 102 may be a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate. A semiconductor element may be provided on the substrate 102. The semiconductor substrate and the insulating substrate may have either a circular or rectangular shape.

[0175] A flexible substrate may be used as the substrate 102, and the transistor 100 and the like may be formed directly on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100 and the like. By providing the peeling layer, after a semiconductor device is partially or entirely completed thereon, it can be separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 and the like can also be transferred to a substrate with poor heat resistance or a flexible substrate.

[0176] Note that the semiconductor layer 108a may have a stacked-layer structure. The same applies to the semiconductor layer 108b and the semiconductor layer 108c. Although FIG. 1B and other drawings illustrate an example in which the semiconductor layer 108 has a three-layer structure including the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c, one embodiment of the present invention is not limited to this structure. For example, a structure without one or both of the semiconductor layer 108a and the semiconductor layer 108c may be used. Specifically, as shown in FIG. 6A , the semiconductor layer 108 can have a two-layer structure including the semiconductor layer 108a and the semiconductor layer 108b. Alternatively, as shown in FIG. 6B , the semiconductor layer 108 can have a two-layer structure including the semiconductor layer 108b and the semiconductor layer 108c.

[0177] The following describes a configuration example that has some configurations different from the above-described configuration example 1. Note that, in the following, descriptions of parts that overlap with the above-described configuration example 1 may be omitted. Also, in the drawings shown below, parts that have the same functions as the above-described configuration example 1 may be hatched with the same pattern and may not be assigned reference numerals.

[0178] 7A and 7B are cross-sectional views of a transistor 100A that can be used in a semiconductor device according to one embodiment of the present invention. For a top view of the transistor 100A, refer to FIG. 1A. FIG. 7A is a cross-sectional view of a section taken along dashed line A1-A2 in FIG. 1A, and FIG. 7B is a cross-sectional view of a section taken along dashed line B1-B2 in FIG. 1A.

[0179] The transistor 100A differs from the transistor 100 illustrated in FIG. 1B and the like mainly in that the insulating layer 110a has a stacked-layer structure and the insulating layer 110c has a stacked-layer structure.

[0180] 8 shows an enlarged view of FIG. 7A. The insulating layer 110a includes an insulating layer 110a_1 and an insulating layer 110a_2 over the insulating layer 110a_1. The insulating layer 110a_1 and the insulating layer 110a_2 can each be formed using a material that can be used for the insulating layer 110a. For example, a silicon nitride film or a silicon nitride oxide film can be preferably used for the insulating layer 110a_1 and the insulating layer 110a_2.

[0181] The insulating layer 110c includes an insulating layer 110c_1 and an insulating layer 110c_2 over the insulating layer 110c_1. The insulating layer 110c_1 and the insulating layer 110c_2 can be formed using the same material as that used for the insulating layer 110c. For example, a silicon nitride film or a silicon nitride oxide film can be preferably used for the insulating layer 110c_1 and the insulating layer 110c_2.

[0182] By using a material that releases impurities (e.g., water or hydrogen) for the insulating layer 110a_1, a region of the semiconductor layer 108 in contact with the insulating layer 110a_1 can be a low-resistance region. The semiconductor layer 108 can have a low-resistance region between a region in contact with the conductive layer 112a (one of the source region and the drain region) and the channel formation region. Similarly, by using a material that releases impurities for the insulating layer 110c_2, a region of the semiconductor layer 108 in contact with the insulating layer 110c_2 can be a low-resistance region. The semiconductor layer 108 can have a low-resistance region between a region in contact with the conductive layer 112b (the other of the source region and the drain region) and the channel formation region. The low-resistance region can function as a buffer region for reducing the drain electric field. Note that these low-resistance regions may function as source or drain regions.

[0183] By providing a low-resistance region between the drain region and the channel formation region, a high electric field is less likely to be generated near the drain region, which can suppress the generation of hot carriers and the deterioration of the transistor. For example, when the conductive layer 112a functions as a drain electrode and the conductive layer 112b functions as a source electrode, by making the region of the semiconductor layer 108 in contact with the insulating layer 110a_1 a low-resistance region, a high electric field is less likely to be generated near the drain region, which can suppress the generation of hot carriers and the deterioration of the transistor. When the conductive layer 112a functions as a source electrode and the conductive layer 112b functions as a drain electrode, by making the region of the semiconductor layer 108 in contact with the insulating layer 110c_2 a low-resistance region, a high electric field is less likely to be generated near the drain region, which can suppress the generation of hot carriers and the deterioration of the transistor.

[0184] When a region of the semiconductor layer 108 in contact with the insulating layer 110a_1 functions as a source region or a drain region, the shortest distance from the source region to the gate electrode and the shortest distance from the drain region to the gate electrode of the semiconductor layer 108 can be made more uniform. This makes it possible to make the electric field of the gate electrode applied to the channel formation region more uniform.

[0185] The insulating layer 110a_2 preferably emits little impurities from itself and is less permeable to impurities, which can prevent hydrogen from diffusing into the channel formation region of the semiconductor layer 108 and its vicinity through the insulating layer 110a_2 and the insulating layer 110b, thereby enabling a highly reliable transistor to exhibit favorable electrical characteristics.

[0186] The insulating layer 110a_1 preferably has a region with a higher hydrogen content than the insulating layer 110a_2. The hydrogen content of the insulating layer 110a can be analyzed by, for example, secondary ion mass spectrometry (SIMS).

[0187] The amount of released hydrogen can be adjusted by differentiating the deposition conditions between the insulating layer 110a_1 and the insulating layer 110a_2. Specifically, the insulating layer 110a_1 and the insulating layer 110a_2 may be formed differently from each other in one or more of the deposition power (deposition power density), deposition pressure, deposition gas type, deposition gas flow rate ratio, deposition temperature, and the distance between the substrate and the electrode. For example, by making the deposition power density of the insulating layer 110a_1 lower than the deposition power density of the insulating layer 110a_2, the hydrogen content in the insulating layer 110a_1 can be made higher than the hydrogen content in the insulating layer 110a_2. This can increase the amount of hydrogen released from the insulating layer 110a_1 due to heat applied to the insulating layer 110a_1.

[0188] The deposition gas used to form the insulating layer 110a_1 preferably contains more hydrogen than the deposition gas used to form the insulating layer 110a_2. Specifically, when silicon nitride films or silicon nitride oxide films are formed for each of the insulating layers 110a_1 and 110a_2 by a PECVD method, the ratio of the flow rate of ammonia gas to the total flow rate of the deposition gas used to form the insulating layer 110a_1 (hereinafter also referred to as the ammonia flow rate ratio) is preferably higher than the ammonia flow rate ratio of the deposition gas used to form the insulating layer 110a_2. By forming the insulating layer 110a_1 under conditions with a high ammonia flow rate ratio, the hydrogen content in the insulating layer 110a_1 can be increased. Furthermore, the amount of hydrogen released from the insulating layer 110a_1 due to heat applied to the insulating layer 110a_1 can be increased. The insulating layer 110a_1 can be formed using ammonia gas, and the insulating layer 110a_2 can also be formed without using ammonia gas (the flow rate of ammonia gas can be said to be zero). In this case, the ammonia flow ratio of the deposition gas used to form the insulating layer 110a_2 can be said to be zero, and the ammonia flow ratio of the deposition gas used to form the insulating layer 110a_1 can be said to be higher than the ammonia flow ratio of the deposition gas used to form the insulating layer 110a_2.

[0189] The film density of the insulating layer 110a_2 is preferably higher than that of the insulating layer 110a_1. This can suppress diffusion of hydrogen contained in the insulating layer 110a_1 to the channel formation region of the semiconductor layer 108 and its vicinity through the insulating layer 110a_2 and the insulating layer 110b. The film density can be evaluated by, for example, Rutherford backscattering spectrometry (RBS) or X-ray reflection (XRR). The difference in film density can sometimes be evaluated by a cross-sectional transmission electron microscope (TEM) image. In TEM observation, a high film density results in a dense (dark) transmission electron (TE) image, whereas a low film density results in a faint (bright) transmission electron (TE) image. Therefore, in a transmission electron (TE) image, the insulating layer 110a_2 may appear denser (darker) than the insulating layer 110a_1. Even when the same material is used for the insulating layer 110a_1 and the insulating layer 110a_2, the film densities are different, and therefore, in a cross-sectional TEM image, the boundary between these layers may be observed as a difference in contrast.

[0190] The insulating layer 110c_1 preferably emits little impurities from itself and is less permeable to impurities. This can suppress diffusion of impurities into the channel formation region of the semiconductor layer 108 and its vicinity through the insulating layer 110c_1 and the insulating layer 110b, thereby providing a highly reliable transistor with favorable electrical characteristics. The film density of the insulating layer 110c_1 is preferably higher than that of the insulating layer 110c_2. For the insulating layer 110c_1, the description of the insulating layer 110a_2 can be referred to.

[0191] Note that although the insulating layer 110 has a five-layer structure here, one embodiment of the present invention is not limited to this. The insulating layer 110 may have a two-layer, three-layer, four-layer, six-layer or more-layer structure, or a single-layer structure.

[0192] The configuration of the insulating layer 110a and the insulating layer 110c shown in Configuration Example 1-2 can also be applied to other configuration examples.

[0193] 9A and 9B are cross-sectional views of a transistor 100B that can be used in a semiconductor device according to one embodiment of the present invention. For a top view of the transistor 100B, refer to FIG. 1A. FIG. 9A is a cross-sectional view of a section taken along dashed line A1-A2 in FIG. 1A, and FIG. 9B is a cross-sectional view of a section taken along dashed line B1-B2 in FIG. 1A.

[0194] The transistor 100B differs from the transistor 100 shown in FIG. 1B, etc., mainly in that the angle formed between the side surface of the conductive layer 112b on the opening 143 side and the surface on which the conductive layer 112b is to be formed (here, the top surface of the insulating layer 110) is different from the angle formed between the side surface of the insulating layer 110 on the opening 141 side and the surface on which the insulating layer 110 is to be formed (here, the top surface of the conductive layer 112a).

[0195] 9C is an enlarged view of FIG. 9A . As shown in FIG. 9C , in a cross-sectional view, the angle θ112b formed between the side surface of the conductive layer 112b on the opening 143 side and the surface on which the conductive layer 112b is to be formed (here, the top surface of the insulating layer 110) is preferably smaller than the angle θ110. By making the angle θ112b smaller than the angle θ110, the step on the surface on which the conductive layer 112b and a layer (e.g., the semiconductor layer 108) formed on the insulating layer 110 are formed is reduced, thereby improving the coverage of the layer. This makes it possible to prevent defects such as discontinuities or voids in the layer.

[0196] For example, by using different methods for forming openings 141 and 143, it is possible to make angle θ112b of conductive layer 112b different from angle θ110 of insulating layer 110. For example, by using wet etching to form opening 143 and dry etching to form opening 141, it is possible to make angle θ112b smaller than angle θ110.

[0197] The configuration of the insulating layer 110 and the conductive layer 112b shown in Structural Example 1-3 can also be applied to other structural examples.

[0198] 10A is a top view of a transistor 100C that can be used in a semiconductor device according to one embodiment of the present invention. FIG. 10B is a cross-sectional view taken along dashed dotted line A1-A2 in FIG. 10A , and FIG. 10C is a cross-sectional view taken along dashed dotted line B1-B2 in FIG.

[0199] The transistor 100C differs from the transistor 100 shown in FIG. 1B and other figures mainly in that the top surface shapes of the openings 141 and 143 do not match.

[0200] 10A, the opening 143 preferably encompasses the opening 141 in a top view. Also, as shown in FIGS. 10B and 10C, the insulating layer 110 preferably has a region protruding from the conductive layer 112b on the opening 141 side in a cross-sectional view. This configuration reduces the step on the formation surface of a layer (e.g., the semiconductor layer 108) formed on the conductive layer 112b and the insulating layer 110, thereby improving the coverage of the layer. This can prevent defects such as discontinuities or voids in the layer.

[0201] The semiconductor layer 108 has a region in contact with the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a. The semiconductor layer 108 has a shape that follows the shapes of the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.

[0202] When the upper surfaces of the openings 141 and 143 are circular, the openings 141 and 143 may or may not be concentric.

[0203] The configuration of the opening 141 and the opening 143 shown in Configuration Example 1-4 can also be applied to other configuration examples.

[0204] 11A is a top view of a transistor 100D that can be used in a semiconductor device according to one embodiment of the present invention. FIG. 11B is a cross-sectional view taken along dashed dotted line A1-A2 in FIG. 11A , and FIG. 11C is a cross-sectional view taken along dashed dotted line B1-B2 in FIG.

[0205] The transistor 100D differs from the transistor 100 shown in FIG. 1B and the like mainly in that the transistor 100D includes a conductive layer 103 and an insulating layer 107.

[0206] An enlarged view of Fig. 11B is shown in Fig. 12. As shown in Fig. 12, the transistor 100D includes the conductive layer 103 and the insulating layer 107 between the conductive layer 112a and the insulating layer 110.

[0207] The insulating layer 107 is located over the conductive layer 112a and is provided to cover the top and side surfaces of the conductive layer 112a.

[0208] The conductive layer 103 is located on the insulating layer 107. The conductive layer 112a and the conductive layer 103 are electrically insulated from each other by the insulating layer 107. An opening 148 is provided in the conductive layer 103, reaching the insulating layer 107, in a region overlapping with the conductive layer 112a.

[0209] The insulating layer 110 is provided over the insulating layer 107 and the conductive layer 103. The insulating layer 110 is provided to cover the top surface and side surfaces of the conductive layer 103 and the top surface of the insulating layer 107. An opening 141 reaching the conductive layer 112a is provided in the insulating layer 110 and the insulating layer 107.

[0210] The insulating layer 110a is located over the insulating layer 107 and the conductive layer 103. The insulating layer 110a is provided so as to cover the top and side surfaces of the conductive layer 103. The insulating layer 110a is also provided so as to cover a part of the opening 148. The insulating layer 110a is in contact with the insulating layer 107 through the opening 148.

[0211] The top surface shape of opening 148 is not particularly limited. The top surface shape of opening 148 can be any shape that can be applied to openings 141 and 143. As shown in Fig. 11A, the top surface shapes of openings 141, 143, and 148 are preferably circular. By making the top surface shapes of the openings circular, processing accuracy can be improved when forming the openings, and openings of fine sizes can be formed.

[0212] In this specification and the like, the top surface shape of the opening 148 refers to the shape of the top surface end or the bottom surface end of the conductive layer 103 on the opening 148 side.

[0213] When the top surface shapes of the openings 141 and 148 are circular, the openings 141 and 148 are preferably concentric. This allows the shortest distance between the semiconductor layer 108 and the conductive layer 103 in a cross-sectional view to be equal on the left and right sides of the opening 141. Furthermore, the openings 141 and 148 may not be concentric.

[0214] In the transistor 100D, the semiconductor layer 108 has a region that overlaps with the conductive layer 104 via the insulating layer 106 and also overlaps with the conductive layer 103 via parts of the insulating layer 110 (particularly, the insulating layer 110a and the insulating layer 110b). In other words, the semiconductor layer 108 has a region that is sandwiched between the conductive layer 104 via the insulating layer 106 and the conductive layer 103 via parts of the insulating layer 110 (particularly, the insulating layer 110a and the insulating layer 110b).

[0215] The conductive layer 103 functions as a back gate electrode (also referred to as a second gate electrode) of the transistor 100D. Part of the insulating layer 110 functions as a back gate insulating layer (also referred to as a second gate insulating layer) of the transistor 100D. The conductive layer 103 can be formed using the same material as can be used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104. Note that the conductive layer 103 is not necessarily provided.

[0216] By providing the back gate electrode in the transistor 100D, the potential of the back channel side of the semiconductor layer 108 is fixed, and the saturation of the Id-Vd characteristics can be improved.

[0217] In this specification and the like, a small change in current in the saturation region in the Id-Vd characteristics of a transistor may be expressed as "high saturation."

[0218] Since the transistor 100D has a back gate electrode, the potential on the back channel side of the semiconductor layer 108 can be fixed, and a shift in the threshold voltage can be suppressed. Here, if the threshold voltage of the transistor shifts, the drain current (hereinafter also referred to as cutoff current) that flows when the gate voltage is 0 V may become large. By suppressing the shift in the threshold voltage, a transistor with a small cutoff current can be obtained. This allows a semiconductor device with low power consumption.

[0219] The insulating layer 107 can be formed using a material that can be used for the insulating layer 110. The insulating layer 107 in contact with the conductive layer 112a and the conductive layer 103 is preferably formed using an insulating layer containing nitrogen. The insulating layer 107 can be formed using a material that can be used for the insulating layer 110a and the insulating layer 110c. For example, silicon nitride can be preferably used for the insulating layer 107. Note that although the insulating layer 107 has a single-layer structure in this embodiment, one embodiment of the present invention is not limited thereto. The insulating layer 107 may have a stacked structure of two or more layers.

[0220] The conductive layer 103 may be electrically connected to the conductive layer 112a. For example, an opening may be provided in a region of the insulating layer 107 that overlaps with the conductive layer 112a, and the conductive layer 103 may be provided to cover the opening, thereby enabling the conductive layer 103 to be in contact with the conductive layer 112a. The conductive layer 112a, which functions as a source or drain electrode, is electrically connected to the conductive layer 103, which functions as a backgate electrode, so that the source or drain electrode and the gate electrode can have the same potential. For example, when the conductive layer 112a functions as a source electrode, a shift in the threshold voltage of the transistor 100D can be suppressed. Furthermore, the reliability of the transistor 100D can be improved. Note that the conductive layer 103 may be formed in contact with the top surface of the conductive layer 112a without providing the insulating layer 107.

[0221] The conductive layer 103 may be electrically connected to the conductive layer 112b. For example, an opening may be provided in a region of the insulating layer 110 that overlaps with the conductive layer 103, and the conductive layer 112b may be provided to cover the opening, thereby making it possible to have a structure in which the conductive layer 103 and the conductive layer 112b are in contact with each other.

[0222] The conductive layer 103 may be electrically connected to the conductive layer 104. For example, openings may be provided in regions of the insulating layer 106 and the insulating layer 110 that overlap with the conductive layer 103, and the conductive layer 104 may be provided to cover the openings, thereby making it possible to have a structure in which the conductive layer 103 and the conductive layer 104 are in contact with each other. By electrically connecting the conductive layer 104 that functions as a gate electrode to the conductive layer 103 that functions as a back gate electrode, the back gate electrode and the gate electrode can have the same potential, and the on-state current of the transistor 100D can be increased.

[0223] The thickness T103 of the conductive layer 103 may be larger than the thickness T110 of the insulating layer 110. This allows the potential on the back channel side of the semiconductor layer 108 to be fixed over a wide range between the source region and the drain region in the semiconductor layer 108.

[0224] The transistor 100D has a region in which the conductive layer 103, the insulating layer 110, the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 overlap in this order in one direction without any other layers therebetween. The direction may be perpendicular to the channel length direction. By widening the region, the potential on the back channel side of the semiconductor layer 108 can be more reliably controlled.

[0225] The thickness T103 of the conductive layer 103 can be larger than the sum of the thickness of the portion of the semiconductor layer 108 that contacts the conductive layer 112a inside the opening 141 and the thickness of the insulating layer 106 that contacts this portion.

[0226] The structures of the conductive layer 103 and the insulating layer 107 shown in Structural Example 1-5 can also be applied to other structural examples.

[0227] 13A to 13I show circuit diagrams of a semiconductor device of one embodiment of the present invention. FIGS. 14 to 19 show top views and cross-sectional views of the semiconductor device of one embodiment of the present invention. Hereinafter, the transistor 100 will be mainly used as an example of a transistor included in the semiconductor device of one embodiment of the present invention. The semiconductor device of one embodiment of the present invention is not limited to this, and may include one or more of the above-described transistors 100 to 100D.

[0228] A semiconductor device of one embodiment of the present invention includes at least two transistors, and one of the gate, source, or drain of one transistor is electrically connected to the gate, source, or drain of another transistor.

[0229] 13A includes a transistor 100 and a transistor 200. One of the source and the drain of the transistor 200 is electrically connected to the gate of the transistor 100.

[0230] 13A to 13C, the transistors 100 and 200 are n-channel transistors; however, one embodiment of the present invention is not limited to this. One or both of the transistors 100 and 200 may be p-channel transistors.

[0231] 14A shows a top view of a semiconductor device 10 according to one embodiment of the present invention, FIG. 14B shows a cross-sectional view of the cut surface taken along dashed dotted line A1-A2 in FIG. 14A , and FIG. 14C shows cross-sectional views of the cut surfaces taken along dashed dotted line B1-B2 and dashed dotted line B3-B4.

[0232] The semiconductor device 10 includes a transistor 100 and a transistor 150. In the semiconductor device 10, any one of the gate, source, and drain of the transistor 100 can be electrically connected to any one of the gate, source, and drain of the transistor 150. Note that electrical connection between the transistor 100 and the transistor 150 is omitted in FIGS. 14A to 14C .

[0233] The transistor 100 and the transistor 200 are each provided on a substrate 102 .

[0234] The transistor 100 can be described above, and therefore a detailed description thereof will be omitted.

[0235] The transistor 150 includes a conductive layer 202, an insulating layer 110, an insulating layer 120, a semiconductor layer 208, an insulating layer 106, a conductive layer 204, a conductive layer 212a, and a conductive layer 212b. Each layer included in the transistor 150 may have a single-layer structure or a stacked-layer structure.

[0236] A conductive layer 202 is provided over the substrate 102. The conductive layer 202 functions as a back gate electrode of the transistor 150. The conductive layer 202 can be formed using the same material as the conductive layer 112a included in the transistor 100. The conductive layer 202 can be formed in the same process as the conductive layer 112a. For example, the conductive layer 112a and the conductive layer 202 can be formed by forming a film to be the conductive layer 112a and the conductive layer 202 and processing the film. Note that the transistor 150 does not necessarily have a back gate electrode.

[0237] An insulating layer 110 is provided to cover the conductive layer 202, and an insulating layer 120 is provided over the insulating layer 110. The insulating layer 110 and the insulating layer 120 function as back-gate insulating layers of the transistor 150. The insulating layer 120 is in contact with the channel formation region of the semiconductor layer 208, and therefore is preferably an insulating layer containing oxygen. The insulating layer 120 can be formed using, for example, a material suitable for the insulating layer 110b.

[0238] A semiconductor layer 208 is provided over the insulating layer 120. The semiconductor layer 208 has a region overlapping with the conductive layer 202 with the insulating layer 110 and the insulating layer 120 interposed therebetween. The semiconductor layer 208 can be formed using the same material as the semiconductor layer 108. The semiconductor layer 208 can be formed in the same process as the semiconductor layer 108.

[0239] 14B and 14C show a configuration in which the semiconductor layer 208 has a stacked structure of a semiconductor layer 208a, a semiconductor layer 208b on the semiconductor layer 208a, and a semiconductor layer 208c on the semiconductor layer 208b. For example, the semiconductor layer 108 and the semiconductor layer 208 can be formed by forming a film that will become the semiconductor layer 108 and the semiconductor layer 208 and processing the film. The semiconductor layer 208a can be made of the same material as the semiconductor layer 108a. The semiconductor layer 208b can be made of the same material as the semiconductor layer 108b. The semiconductor layer 208c can be made of the same material as the semiconductor layer 108c.

[0240] The insulating layer 106 is provided to cover the insulating layer 120 and the semiconductor layer 208. The insulating layer 106 functions as a gate insulating layer of the transistor 150. The insulating layer 106 has openings 147a and 147b that reach the semiconductor layer 208.

[0241] A conductive layer 204, a conductive layer 212a, and a conductive layer 212b are provided over the insulating layer 106. The same material as that of the conductive layer 104 can be used for the conductive layer 204, the conductive layer 212a, and the conductive layer 212b. The conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed in the same process as that for the conductive layer 104. For example, the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed by forming films that will become the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b and processing the films.

[0242] The conductive layer 212a and the conductive layer 212b are provided to cover parts of the openings 147a and 147b. The conductive layer 212a is electrically connected to the semiconductor layer 208 through the opening 147a. The conductive layer 212b is electrically connected to the semiconductor layer 208 through the opening 147b. The conductive layer 212a functions as one of a source electrode and a drain electrode of the transistor 150, and the conductive layer 212b functions as the other.

[0243] The conductive layer 204 has a region overlapping with the semiconductor layer 208 with the insulating layer 106 interposed therebetween. The conductive layer 204 functions as a gate electrode of the transistor 150.

[0244] 14C , the conductive layer 204 may be electrically connected to the conductive layer 202. This allows the conductive layer 204 and the conductive layer 202 to be applied with the same potential. Applying the same potential to the conductive layer 204 and the conductive layer 202 can increase the current that can flow when the transistor 200 is on. The conductive layer 204 can be in contact with the conductive layer 202 through openings 149 provided in the insulating layers 106, 120, and 110.

[0245] The conductive layer 212a or the conductive layer 212b may be electrically connected to the conductive layer 202. By applying the same potential to the source and the back gate, the potential of the back channel can be stabilized, and the saturation of the Id-Vd characteristics of the transistor can be increased. The conductive layer 212a or the conductive layer 212b can be in contact with the conductive layer 202 through openings provided in the insulating layers 106 and 110.

[0246] The conductive layer 202 may be electrically connected to none of the conductive layer 204, the conductive layer 212a, and the conductive layer 212b. For example, a constant potential can be supplied to the back gate, and a signal for driving the transistor 150 can be supplied to the gate. In this way, the threshold voltage when driving the transistor 150 can be controlled by the potential supplied to the back gate.

[0247] The entire region of the semiconductor layer 208 that overlaps with the gate electrode between the source electrode and the drain electrode via the gate insulating layer functions as a channel formation region. The semiconductor layer 208 has a pair of regions 208L that sandwich the channel formation region and a pair of regions 208D outside the pair of regions 208L.

[0248] The region 208D can also be referred to as a region with a higher carrier concentration than the channel formation region, a low-resistance region, or an n-type region. The region of the semiconductor layer 208 that is in contact with the conductive layer 212a and the region 208D adjacent to the conductive layer 212a functions as one of the source and drain regions. The region of the semiconductor layer 208 that is in contact with the conductive layer 212b and the region 208D adjacent to the conductive layer 212b functions as the other of the source and drain regions.

[0249] The region 208L can also be referred to as a region having the same or lower electrical resistance, the same or higher carrier concentration, the same or higher oxygen defect density, or the same or higher impurity concentration as the channel formation region. Furthermore, the region 208L can also be referred to as a region having the same or higher electrical resistance, the same or lower carrier concentration, the same or lower oxygen defect density, or the same or lower impurity concentration as the channel formation region.

[0250] The region 208L functions as a buffer region for reducing the drain electric field. Since the region 208L does not overlap with the conductive layer 204, a channel is hardly formed in the region 208L even when a gate voltage is applied to the conductive layer 204. The region 208L preferably has a higher carrier concentration than the channel formation region. This allows the region 208L to function as an LDD (lightly doped drain) region. By providing the region 208L functioning as an LDD region between the channel formation region and the region 208D, the transistor 150 can have a high drain breakdown voltage.

[0251] For example, after forming the conductive layer 204, the conductive layer 212a, and the conductive layer 212b, the region 208L and the region 208D can be formed by adding an impurity element to the semiconductor layer 208 using these conductive layers as a mask. The region 208L is a region of the semiconductor layer 208 that overlaps with the insulating layer 106 but does not overlap with the conductive layer 204. The region 208D is a region of the semiconductor layer 208 that overlaps with neither the insulating layer 106 nor the conductive layer 204.

[0252] 14A and 14B , partial ends of the conductive layers 212a and 212b are preferably located inside the openings 147a and 147b. In other words, partial ends of the conductive layers 212a and 212b are preferably in contact with the semiconductor layer 208 in the openings 147a and 147b. This allows the region in contact with the conductive layer 212a to be adjacent to one of the pair of regions 208D, and similarly, the region in contact with the conductive layer 212b to be adjacent to the other of the pair of regions 208D. Note that there are no particular limitations on the top surface shapes of the openings 147a and 147b.

[0253] Region 208L and region 208D contain impurity elements. The impurity elements may be one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, magnesium, silicon, and noble gases. Typical examples of noble gases include helium, neon, argon, krypton, and xenon. It is particularly preferable to use one or more of boron, phosphorus, aluminum, magnesium, and silicon as the impurity elements.

[0254] When the impurity element is added to the semiconductor layer 208 to form the regions 208L and 208D, the impurity element may be supplied to the semiconductor layer 108 through the insulating layer 106, using the conductive layer 104 as a mask. As a result, a region containing the impurity element is formed in a region of the semiconductor layer 108 that does not overlap with the conductive layer 104. Here, in the transistor 100, a region of the semiconductor layer 108 in contact with the conductive layer 112b functions as a source region or a drain region. Therefore, the region containing the impurity element is formed in a part of the source region or the drain region.

[0255] The transistor 150 is a so-called top-gate transistor having a gate electrode above the semiconductor layer 208. For example, by adding an impurity element to the semiconductor layer 208 using the conductive layer 204 functioning as the gate electrode as a mask, the source region and the drain region can be formed in a self-aligned manner. The transistor 150 can be called a TGSA (Top Gate Self-Aligned) transistor.

[0256] The channel length of the transistor 150 can be controlled by the width of the conductive layer 204 in the channel length direction. Therefore, the channel length of the transistor 150 is equal to or greater than the resolution limit of an exposure apparatus used to manufacture the transistor. By increasing the channel length, the transistor can have high saturation properties.

[0257] An insulating layer 195 is provided to cover the transistor 100 and the transistor 150. The insulating layer 195 functions as a protective layer. The insulating layer 195 is preferably made of a material that does not easily diffuse impurities. By providing the insulating layer 195, it is possible to effectively prevent impurities from diffusing into the transistor from the outside, thereby improving the reliability of the semiconductor device. Examples of impurities include water and hydrogen. For example, the insulating layer 195 includes one or both of an inorganic insulating layer and an organic insulating layer. The insulating layer 195 may have a stacked structure of an inorganic insulating layer and an organic insulating layer.

[0258] Examples of inorganic insulating films that can be used for the insulating layer 195 include an insulating oxide film, an insulating nitride film, an insulating oxynitride film, and an insulating nitride oxide film. Specific examples of these inorganic insulating films are as described for the insulating layer 110. More specifically, the insulating layer 195 can include one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate. The insulating layer 195 can include one or more of an acrylic resin and a polyimide resin as an organic material, for example.

[0259] In manufacturing the semiconductor device 10, the transistor 100 with a short channel length and the transistor 150 with a long channel length can be formed over the same substrate by sharing some of the steps. For example, by applying the transistor 100 to a transistor that requires a large on-state current and the transistor 150 to a transistor that requires high saturation, a high-performance semiconductor device can be obtained.

[0260] Here, the structure in which the conductive layers 212a and 212b are formed in the same process as the conductive layers 104 and 204 is shown; however, one embodiment of the present invention is not limited to this. For example, the conductive layers 212a and 212b may be formed after the insulating layer 195 is formed. Specifically, after the insulating layer 195 is provided to cover the conductive layers 104 and 204, openings may be formed in the insulating layer 195 and the insulating layer 106, and the conductive layers 212a and 212b may be provided to cover the openings, so that the conductive layers 212a and 212b are electrically connected to the semiconductor layer 208.

[0261] 15A and 15B are cross-sectional views of a semiconductor device 10A according to one embodiment of the present invention. For a top view of the semiconductor device 10A, see FIG. 14A. FIG. 15A is a cross-sectional view of a cut surface taken along dashed dotted line A1-A2 in FIG. 14A, and FIG. 15B is a cross-sectional view of a cut surface taken along dashed dotted line B1-B2 in FIG. 14A.

[0262] The semiconductor device 10A includes a transistor 100 and a transistor 150A. The transistor 150A differs mainly from the transistor 150 shown in FIG. 14B and the like in that a conductive layer 202 is provided between the insulating layer 110 and the insulating layer 120.

[0263] 15C is an enlarged view of Fig. 15A. A conductive layer 202 is provided over the insulating layer 110. The conductive layer 202 can be formed using the same material as the conductive layer 112b. The conductive layer 202 can be formed in the same process as the conductive layer 112b.

[0264] An insulating layer 120 is provided over the conductive layer 202. The insulating layer 120 is provided to cover part of the top surface and side surface of the conductive layer 202. In the transistor 150A, part of the insulating layer 120 functions as a back-gate insulating layer. By providing the conductive layer 202 between the insulating layer 110 and the insulating layer 120, the thickness of the back-gate insulating layer of the transistor 150A can be reduced. This can strengthen the electric field of the back gate electrode. Furthermore, the saturation of the Id-Vd characteristics of the transistor 150A can be increased. Furthermore, a shift in the threshold voltage can be suppressed, resulting in a transistor with a small cutoff current.

[0265] The insulating layer 120 preferably has a laminated structure. Figure 15A and other figures show an example in which the insulating layer 120 has a laminated structure of an insulating layer 120a and an insulating layer 120b on the insulating layer 120a.

[0266] The insulating layer 120a provided in contact with the conductive layer 202 is preferably made of a material that does not easily diffuse a metal element contained in the conductive layer 202. This can prevent the metal element contained in the conductive layer 202 from diffusing into the channel formation region of the semiconductor layer 208 and its vicinity. The insulating layer 120a can preferably be made of a material that can be used for the insulating layer 110a and the insulating layer 110c. For example, silicon nitride can be preferably used for the insulating layer 120a.

[0267] The insulating layer 120b having a region in contact with the channel formation region of the semiconductor layer 208 is preferably an insulating layer containing oxygen. The insulating layer 120b can be formed using a material suitable for the insulating layer 110b. For example, silicon oxynitride can be preferably used for the insulating layer 120b.

[0268] The transistor 100 can be described in detail above, and therefore will not be described in detail again.

[0269] [Configuration Example 2-3] Fig. 13B shows a circuit diagram of a semiconductor device 10B according to one embodiment of the present invention. Fig. 16A shows a top view of the semiconductor device 10B. Fig. 16B shows a cross-sectional view of the cut surface taken along dashed dotted line A1-A2 in Fig. 16A, and Fig. 16C shows cross-sectional views of the cut surfaces taken along dashed dotted line B1-B2 and dashed dotted line B3-B4.

[0270] The semiconductor device 10B includes a transistor 100 and a transistor 200. The other of the source and the drain of the transistor 200 is electrically connected to the other of the source and the drain of the transistor 100.

[0271] The transistor 100 and the transistor 200 are each provided on a substrate 102 .

[0272] The transistor 100 can be described above, and therefore a detailed description thereof will be omitted.

[0273] The transistor 200 includes a conductive layer 112b, a conductive layer 112c, a semiconductor layer 208, an insulating layer 106, and a conductive layer 204. The transistor 200 can have a structure similar to that of the transistor 100.

[0274] The conductive layer 112c functions as one of the source electrode and the drain electrode of the transistor 200. The conductive layer 112b functions as the other of the source electrode and the drain electrode of the transistor 100 and also functions as the other of the source electrode and the drain electrode of the transistor 200. Sharing the conductive layer 112b between the transistors 100 and 200 can reduce the area occupied by the semiconductor device. Part of the insulating layer 106 functions as a gate insulating layer of the transistor 200. The conductive layer 204 functions as a gate electrode of the transistor 200.

[0275] The conductive layer 112c can be formed using the same material as the conductive layer 112a. The conductive layer 112c can be formed in the same process as the conductive layer 112a. The insulating layer 110 has an opening 241 that reaches the conductive layer 112c. The opening 241 can be formed in the same process as the opening 141. The conductive layer 112b has an opening 243 in a region overlapping with the opening 241. The opening 243 can be formed in the same process as the opening 143. The top shapes of the openings 241 and 243 are not limited, but are preferably circular. Although the top shapes of the openings 241 and 243 are shown here as being identical to each other, one embodiment of the present invention is not limited thereto. The top shapes of the openings 241 and 243 do not necessarily have to be identical to each other.

[0276] The width of the opening 143 may be different from the width of the opening 243. By making the widths of the openings different, two transistors having different channel widths can be manufactured.

[0277] A semiconductor layer 208 is provided so as to cover the openings 241 and 243. The semiconductor layer 208 can be formed in the same process as the semiconductor layer 108. The insulating layer 106 is provided over the semiconductor layer 208, and the conductive layer 204 is provided over the insulating layer 106. The conductive layer 204 can be formed in the same process as the conductive layer 104.

[0278] [Configuration Example 2-4] Fig. 13C shows a circuit diagram of a semiconductor device 10C according to one embodiment of the present invention. Fig. 17A shows a top view of the semiconductor device 10C. Fig. 17B shows a cross-sectional view of the semiconductor device 10C taken along dashed dotted line A1-A2 in Fig. 17A, and Fig. 17C shows cross-sectional views of the semiconductor device 10C taken along dashed dotted line B1-B2 and dashed dotted line B3-B4.

[0279] The semiconductor device 10C includes a transistor 100 and a transistor 200. One of the source and the drain of the transistor 200 is electrically connected to one of the source and the drain of the transistor 100.

[0280] The transistor 100 and the transistor 200 are each provided on a substrate 102 .

[0281] The transistor 100 can be described above, and therefore a detailed description thereof will be omitted.

[0282] The transistor 200 includes a conductive layer 112 a , a conductive layer 112 c , a semiconductor layer 208 , an insulating layer 106 , and a conductive layer 204 .

[0283] The conductive layer 112c functions as one of a source electrode and a drain electrode of the transistor 200. The conductive layer 112a functions as one of a source electrode and a drain electrode of the transistor 100 and also functions as the other of the source electrode and the drain electrode of the transistor 200. By sharing the conductive layer 112a between the transistors 100 and 200, the area occupied by the semiconductor device can be reduced.

[0284] The conductive layer 112c can be formed using the same material as the conductive layer 112b and in the same process as the conductive layer 112b.

[0285] 13D is a circuit diagram of a semiconductor device 10D according to one embodiment of the present invention. FIG. 18A is a top view of the semiconductor device 10D. FIG. 18B is a cross-sectional view taken along dashed dotted line A1-A2 in FIG. 18A.

[0286] The semiconductor device 10D includes a transistor 100 and a transistor 250. One of a source and a drain of the transistor 250 is electrically connected to one of a source and a drain of the transistor 100.

[0287] 13D to 13H, the transistor 100 is illustrated as an n-channel transistor and the transistor 250 is illustrated as a p-channel transistor, but one embodiment of the present invention is not limited thereto. Both the transistor 100 and the transistor 250 may be n-channel transistors or p-channel transistors. Alternatively, the transistor 100 may be a p-channel transistor and the transistor 250 may be an n-channel transistor.

[0288] The transistor 100 and the transistor 250 are each provided on a substrate 102 .

[0289] The semiconductor device 10D has a conductive layer 259 over the substrate 102, an insulating layer 252 over the substrate 102 and the conductive layer 259, and a semiconductor layer 253 over the insulating layer 252. The semiconductor device 10D also has an insulating layer 254 over the insulating layer 252 and the semiconductor layer 253, and a conductive layer 255 over the insulating layer 254. The semiconductor layer 253 and the conductive layer 255 overlap each other in a region. The conductive layer 259 functions as a back gate electrode of the transistor 250, and the insulating layer 252 functions as a back gate insulating layer. The insulating layer 254 functions as a gate insulating layer, and the conductive layer 255 functions as a gate electrode.

[0290] An insulating layer 256 is provided over the insulating layer 254 and the conductive layer 255. An opening 257a is provided in the insulating layer 254 and the insulating layer 256 in a region overlapping with part of the semiconductor layer 253. An opening 257b is provided in the insulating layer 254 and the insulating layer 256 in a region overlapping with another part of the semiconductor layer 253.

[0291] A conductive layer 258a is provided over the insulating layer 256 and the opening 257a, and a conductive layer 258b is provided over the insulating layer 256 and the opening 257b. The conductive layer 258a is electrically connected to the semiconductor layer 253 in the opening 257a. The conductive layer 258b is electrically connected to the semiconductor layer 253 in the opening 257b.

[0292] In the semiconductor layer 253, a region overlapping with the conductive layer 255 functions as a channel formation region. The semiconductor layer 253 has a pair of regions 253D sandwiching the channel formation region. One of the pair of regions 253D functions as one of the source region and the drain region and is electrically connected to the conductive layer 258a. The other of the pair of regions 253D functions as the other of the source region and the drain region and is electrically connected to the conductive layer 258b.

[0293] The insulating layer 110 is provided over the insulating layer 256, the conductive layer 258a, and the conductive layer 258b, and the conductive layer 112b is provided over the insulating layer 110.

[0294] The conductive layer 112b and the insulating layer 110 have an opening 146 in a region overlapping with part of the conductive layer 258a (FIG. 18A). The semiconductor layer 108 is provided to cover the opening 146.

[0295] The insulating layer 106 is provided over the insulating layer 110, the conductive layer 112b, and the semiconductor layer 108, and the conductive layer 104 is provided over the insulating layer 106. In addition, an insulating layer 195 is provided over the insulating layer 106 and the conductive layer 104.

[0296] The conductive layer 259 preferably overlaps with the channel formation region and extends beyond the edge of the channel formation region. That is, the conductive layer 259 is preferably larger than the channel formation region. The conductive layer 259 also preferably extends beyond the edge of the semiconductor layer 253. That is, the conductive layer 259 is preferably larger than the semiconductor layer 253.

[0297] The gate electrode and the back gate electrode are arranged to sandwich a channel formation region of the semiconductor layer. The threshold voltage of the transistor can be changed by changing the potential of the back gate electrode. The potential of the back gate electrode may be ground potential or any other potential.

[0298] The back gate electrode can be formed using the same materials and methods as the gate electrode, source electrode, drain electrode, etc. Furthermore, since the gate electrode and the back gate electrode are conductive layers, they have a function of preventing an electric field generated outside the transistor from acting on the semiconductor layer in which the channel is formed (particularly, an electric field shielding function against static electricity). That is, the electrical characteristics of the transistor can be prevented from fluctuating due to the influence of an external electric field such as static electricity. Furthermore, by providing the back gate electrode, the amount of change in the threshold voltage of the transistor before and after a BT (Bias Temperature) stress test can be reduced. By providing the back gate electrode, the variation in the characteristics of the transistor can be reduced, and the reliability of the semiconductor device can be improved.

[0299] As shown in Fig. 13E, the back gate and the gate of the transistor 250 may be electrically connected. Alternatively, as shown in Fig. 13F, the back gate and the source or the drain of the transistor 250 may be electrically connected. Alternatively, as shown in Fig. 13G, the transistor 250 may not have a back gate.

[0300] Like the transistor 100, the transistor 250 may be an OS transistor.

[0301] Here, the same material or different materials may be used for the semiconductor layer 108 and the semiconductor layer 253. For the configurations of the semiconductor layer 108 and the semiconductor layer 253, the description of the semiconductor layer 108 and the semiconductor layer 208 in the semiconductor device 10 can also be referred to.

[0302] The transistor 250 may be a transistor using silicon in a channel formation region (hereinafter also referred to as a Si transistor).

[0303] Examples of silicon include single-crystal silicon, polycrystalline silicon, and amorphous silicon. In particular, a transistor having an LTPS semiconductor layer (hereinafter also referred to as an LTPS transistor) can be used. The LTPS transistor has high field-effect mobility and good frequency characteristics.

[0304] The transistor 100 has the same structure as that described above (see FIG. 1) except that a conductive layer 258a is included instead of the conductive layer 112a.

[0305] The conductive layer 258a functions as one of a source electrode and a drain electrode of the transistor 100 and also functions as one of a source electrode and a drain electrode of the transistor 250. When the conductive layer 258a is shared between the transistors 100 and 250, the area occupied by the semiconductor device can be reduced.

[0306] As described above, the transistor 100 is a vertical channel transistor. On the other hand, in the transistor 250, the current flowing through the semiconductor layer is in the horizontal direction, that is, in the direction parallel or substantially parallel to the surface of the substrate 102. Such a transistor can be called a horizontal channel transistor.

[0307] In this manner, the semiconductor device of one embodiment of the present invention may include not only a vertical channel transistor but also a lateral channel transistor.

[0308] Note that the transistor 100 may be formed in a region overlapping with the opening 257a. Specifically, an opening 146 may be provided in the region overlapping with the opening 257a, and the conductive layer 258a and the semiconductor layer 108 may be in contact with each other at the opening 257a. Furthermore, the conductive layer 258a may not be provided, and the region 253D and the semiconductor layer 108 may be in contact with each other at the opening 257a. With such a structure, a semiconductor device with a smaller occupation area can be obtained.

[0309] 13H is a circuit diagram of a semiconductor device 10E according to one embodiment of the present invention. FIG. 19A is a top view of the semiconductor device 10E. FIG. 19B is a cross-sectional view taken along dashed dotted line A1-A2 in FIG. 19A.

[0310] The semiconductor device 10E includes a transistor 100 and a transistor 250. A gate of the transistor 250 is electrically connected to one of the source and the drain of the transistor 100.

[0311] The semiconductor device 10E is different from the semiconductor device 10D mainly in that the opening 146 is provided to overlap with the conductive layer 255 that functions as the gate electrode of the transistor 250. Therefore, in the semiconductor device 10D, the transistor 100 is provided to overlap with the gate electrode of the transistor 250.

[0312] 19A and 19B , the opening 146 overlaps with the channel formation region, but this is not limiting. The opening 146 may not overlap with the channel formation region and may overlap with the conductive layer 255. In the semiconductor device 10E, the conductive layer 255 functions as a gate electrode of the transistor 250 and also as one of the source and drain electrodes of the transistor 100.

[0313] By providing the transistor 100 and the transistor 250 so that they overlap, a semiconductor device with a smaller occupation area can be realized.

[0314] The semiconductor device 10E differs from the semiconductor device 10D in the configurations of the opening 257a, the opening 257b, the conductive layer 258a, and the conductive layer 258b.

[0315] The openings 257a and 257b are formed by selectively removing parts of the insulating layer 254 and the insulating layer 110 in regions overlapping with the region 253D of the semiconductor layer 253. The conductive layers 258a and 258b are provided on the insulating layer 110 and are electrically connected to the region 253D through the openings 257a and 257b.

[0316] In the semiconductor device 10E, the conductive layers 258a and 258b can be formed in the same process as the conductive layer 112b. Since it is not necessary to form the conductive layers 258a and 258b and the conductive layer 112b in separate processes, the manufacturing process of the semiconductor device can be shortened, and productivity of the semiconductor device can be improved.

[0317] A semiconductor device of one embodiment of the present invention includes at least one transistor and at least one capacitor, and has a structure in which a source or a drain of the transistor is electrically connected to one of a pair of electrodes of the capacitor. FIG. 13I illustrates an example in which the source or drain of the transistor 100 is electrically connected to one of the electrodes of the capacitor 190.

[0318] The transistor of one embodiment of the present invention is a type of vertical transistor, and since a source electrode, a semiconductor layer, and a drain electrode can be provided in a stacked manner, the occupied area can be significantly reduced compared to a planar transistor. Furthermore, by using a p-channel Si transistor as the planar transistor and an n-channel OS transistor as the vertical transistor, a complementary metal oxide semiconductor (CMOS) circuit can be configured. Furthermore, by using this structure and providing the planar transistor and the vertical transistor in a stacked manner, the occupied area of ​​the CMOS circuit can be reduced.

[0319] 20A illustrates an equivalent circuit diagram of a semiconductor device 30 according to one embodiment of the present invention. The semiconductor device 30 includes transistors 100_1 to 100_p (p is an integer greater than or equal to 2). The transistors 100_1 to 100_p are connected in parallel, and the semiconductor device 30 can be regarded as a single transistor.

[0320] Gate electrodes of the transistors 100_1 to 100_p are electrically connected to each other, source electrodes of the transistors 100_1 to 100_p are electrically connected to each other, and drain electrodes of the transistors 100_1 to 100_p are electrically connected to each other.

[0321] 20A illustrates the transistors 100_1 to 100_p as n-channel transistors, one embodiment of the present invention is not limited to this. The transistors 100_1 to 100_p may be p-channel transistors.

[0322] A specific description will be given taking the case where p is 4 as an example. FIG. 20B shows an equivalent circuit diagram of a semiconductor device 30 according to one embodiment of the present invention. FIG. 20C shows a top view of the semiconductor device 30. FIG. 21 shows a cross-sectional view taken along dashed dotted line A3-A4 in FIG. 20C. FIG. 22 shows a perspective view of the semiconductor device 30.

[0323] The semiconductor device 30 includes transistors 100_1 to 100_4. The structure of the transistor 100 described above can be applied to each of the transistors 100_1 to 100_4. Note that although the transistor 100 is used as an example in the description here, one embodiment of the present invention is not limited thereto. Any of the transistors 100A to 100D may be applied to the transistors 100_1 to 100_4.

[0324] 15C and other figures show a configuration in which the transistors 100_1 to 100_4 are arranged in two rows and two columns, the arrangement of the transistors is not particularly limited. For example, the transistors 100_1 to 100_4 may be arranged in one row and four columns.

[0325] The transistors 100_1 to 100_4 each include a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 112a, and a conductive layer 112b. The conductive layer 104 functions as a gate electrode of the transistors 100_1 to 100_4. Part of the insulating layer 106 functions as a gate insulating layer of the transistors 100_1 to 100_4. The conductive layer 112a functions as the other of the source and drain electrodes of the transistors 100_1 to 100_4, and the conductive layer 112b functions as one of the source and drain electrodes.

[0326] FIG. 23A is a perspective view showing an extracted conductive layer 112a.

[0327] 23B is a perspective view illustrating the conductive layer 112a, the conductive layer 112b, the openings 141_1 to 141_4, and the openings 143_1 to 143_4. Note that the openings 141_1 to 141_4 provided in the insulating layer 110 are indicated by dashed lines. The openings 141_1 to 141_4 and the openings 143_1 to 143_4 can be described with reference to the description of the openings 141 and 143, and therefore detailed description thereof will be omitted.

[0328] When the semiconductor device 30 is considered as one transistor, the channel width of the transistor is the sum of the channel widths of the transistors 100_1 to 100_4. For example, if the top shapes of the openings 143_1 to 143_4 are circular, and the widths of the openings 143_1 to 143_4 are each defined as D143, the semiconductor device 30 can be considered as a transistor having a channel width of "D143×π×4" (see FIGS. 4A and 4B). The semiconductor device 30 including p transistors can be considered as a transistor having a channel width of "D143×π×p". Note that the semiconductor device 30 can be considered as a transistor having a channel length L100 (see FIG. 4B). Connecting multiple transistors in parallel increases the channel width, thereby increasing the on-state current. Furthermore, the channel width can be varied by adjusting the number (p) of transistors connected in parallel. The number (p) of transistors connected in parallel can be determined so as to achieve a desired on-state current.

[0329] 23C is a perspective view illustrating the conductive layer 112a and the semiconductor layer 108. The semiconductor layer 108 is provided to cover the openings 141_1 to 141_4 and the openings 143_1 to 143_4. Note that although FIG. 23C and other drawings illustrate a structure in which the transistors 100_1 to 100_4 share the semiconductor layer 108, one embodiment of the present invention is not limited to this. The semiconductor layer 108 may be separate for each of the transistors 100_1 to 100_4.

[0330] 23D is a perspective view illustrating the conductive layer 112a and the conductive layer 104. The conductive layer 104 is provided to cover the openings 141_1 to 141_4 and the openings 143_1 to 143_4.

[0331] The configuration of the semiconductor device 30 shown in Configuration Example 2-7 can also be applied to other configuration examples. For example, the semiconductor device 30 may be applied to one or more of the transistors included in the semiconductor devices shown in FIGS.

[0332] 24A illustrates an equivalent circuit diagram of a semiconductor device 40 according to one embodiment of the present invention. The semiconductor device 40 includes transistors 100_1 to 100_q (q is an integer greater than or equal to 2). The transistors 100_1 to 100_q are connected in series, and the semiconductor device 40 can be regarded as a single transistor.

[0333] 24A illustrates the transistors 100_1 to 100_q as n-channel transistors, one embodiment of the present invention is not limited thereto. The transistors 100_1 to 100_q may be p-channel transistors.

[0334] A specific description will be given taking the case where q is 4 as an example. FIG. 24B shows an equivalent circuit diagram of a semiconductor device 40 according to one embodiment of the present invention. FIG. 24C shows a top view of the semiconductor device 40. FIG. 25 shows a cross-sectional view of the cut surface taken along dashed dotted line A5-A6 in FIG. 24C. FIG. 26 shows a perspective view of the semiconductor device 40.

[0335] The semiconductor device 40 includes transistors 100_1 to 100_4. The structure of the transistor 100 described above can be applied to each of the transistors 100_1 to 100_4. Note that although the transistor 100 is used as an example in the description here, one embodiment of the present invention is not limited thereto. Any of the transistors 100A to 100D may be applied to the transistors 100_1 to 100_4.

[0336] 24C and other figures show a configuration in which the transistors 100_1 to 100_4 are arranged in two rows and two columns, the arrangement of the transistors is not particularly limited. For example, the transistors 100_1 to 100_4 may be arranged in one row and four columns.

[0337] The transistor 100_1 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108_1, a conductive layer 112a, and a conductive layer 112b. The conductive layer 112a functions as one of a source electrode and a drain electrode of the transistor 100_1, and the conductive layer 112b functions as the other electrode.

[0338] The transistor 100_2 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108_2, a conductive layer 112a, and a conductive layer 112c. The conductive layer 112a serves as one of a source electrode and a drain electrode of the transistor 100_2, and the conductive layer 112c serves as the other electrode. The conductive layer 112a is shared by the transistor 100_1 and the transistor 100_2.

[0339] The transistor 100_3 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108_3, a conductive layer 112c, and a conductive layer 112d. The conductive layer 112c serves as one of a source electrode and a drain electrode of the transistor 100_3, and the conductive layer 112d serves as the other electrode. The conductive layer 112c is shared by the transistors 100_2 and 100_3.

[0340] The transistor 100_4 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108_4, a conductive layer 112d, and a conductive layer 112e. The conductive layer 112d functions as one of a source electrode and a drain electrode of the transistor 100_4, and the conductive layer 112e functions as the other. The conductive layer 112d is shared by the transistors 100_3 and 100_4.

[0341] 27A is a perspective view showing the conductive layer 112a and the conductive layer 112d. The conductive layer 112a and the conductive layer 112d can be formed in the same process.

[0342] 27B is a perspective view illustrating the conductive layers 112a, 112b, 112c, 112d, and 112e, the openings 141 to 1414, and the openings 1431 to 1434. The conductive layers 112a to 112e can be formed in the same process. The conductive layer 112b has an opening 1431, the conductive layer 112c has openings 1432 and 1433, and the conductive layer 112e has an opening 1434.

[0343] 27C is a perspective view illustrating the conductive layer 112a, the conductive layer 112d, and the semiconductor layers 108_1 to 108_4. The semiconductor layers 108_1 to 108_4 can be formed in the same process.

[0344] 27D is a perspective view illustrating the conductive layer 112a, the conductive layer 112d, and the conductive layer 104. The conductive layer 104 functions as a gate electrode of the transistors 100_1 to 100_4.

[0345] One of the source electrode and the drain electrode of the transistor 100_1 is electrically connected to one of the source electrode and the drain electrode of the transistor 100_2. The other of the source electrode and the drain electrode of the transistor 100_2 is electrically connected to one of the source electrode and the drain electrode of the transistor 100_3. The other of the source electrode and the drain electrode of the transistor 100_3 is electrically connected to one of the source electrode and the drain electrode of the transistor 100_4.

[0346] When the semiconductor device 40 is regarded as a single transistor, the channel length of the transistor is the sum of the channel lengths of the transistors 100_1 to 100_4. For example, if the channel length of each of the transistors 100_1 to 100_4 is L100, the semiconductor device 40 can be regarded as a transistor having a channel length of "L100×4" (see FIG. 4B). The semiconductor device 40, which is composed of q transistors, can be regarded as a transistor having a channel length of "L100×q". Note that the semiconductor device 40 can be regarded as a transistor having a channel width W100 (see FIGS. 4A and 4B). By connecting multiple transistors in series, the channel length is increased, thereby improving saturation. Furthermore, the channel lengths can be varied by adjusting the number (q) of transistors connected in series. The number (q) of transistors connected in series can be determined so as to achieve the desired saturation.

[0347] The configuration of the semiconductor device 40 shown in Configuration Example 2-8 can also be applied to other configuration examples. For example, the semiconductor device 40 may be applied to one or more of the transistors included in the semiconductor devices shown in FIGS.

[0348] The semiconductor device 40 may be applied to each transistor included in the semiconductor device 30. That is, a configuration can be achieved in which a group of parallel-connected transistors are further connected in series (hereinafter also referred to as series-parallel connection).

[0349] This embodiment mode can be combined with other embodiment modes as appropriate. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be combined as appropriate.

[0350] 28A to 29D , a method for manufacturing a semiconductor device according to one embodiment of the present invention will be described. Note that with regard to materials and formation methods of elements, descriptions of parts similar to those described in Embodiment 1 may be omitted.

[0351] 28A to 29D show a cross-sectional view taken along dashed dotted line A1-A2 and a cross-sectional view taken along dashed dotted line B1-B2 shown in FIG. 1A side by side.

[0352] Thin films (insulating films, semiconductor films, conductive films, etc.) constituting semiconductor devices can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an ALD method, etc. CVD methods include a PECVD method and a thermal CVD method. One type of thermal CVD method is a metal organic chemical vapor deposition (MOCVD) method.

[0353] Thin films (insulating films, semiconductor films, conductive films, etc.) that constitute semiconductor devices can be formed by wet film formation methods such as spin coating, dipping, spray coating, inkjet, dispensing, screen printing, offset printing, doctor knife method, slit coating, roll coating, curtain coating, or knife coating.

[0354] When processing a thin film constituting a semiconductor device, a photolithography method or the like can be used. Alternatively, the thin film may be processed by a nanoimprint method, a sandblasting method, a lift-off method, or the like. Furthermore, an island-shaped thin film may be directly formed by a film formation method using a shielding mask such as a metal mask.

[0355] There are two typical photolithography methods: one is to form a resist mask on the thin film to be processed, process the thin film by etching or the like, and then remove the resist mask; the other is to form a photosensitive thin film, and then process the thin film into the desired shape by exposure and development.

[0356] In photolithography, the light used for exposure may be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these. Other light sources that can be used include ultraviolet light, KrF laser light, ArF laser light, etc. Exposure may also be performed by immersion exposure technology. Extreme ultraviolet (EUV) light or X-rays may also be used as the light used for exposure. An electron beam may also be used instead of the light used for exposure. Extreme ultraviolet light, X-rays, or an electron beam are preferred because they enable extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, a photomask is not required.

[0357] The thin film can be etched by one or more of dry etching, wet etching, and sandblasting.

[0358] First, a conductive film to be the conductive layer 112a is formed over the substrate 102, and then processed to form the conductive layer 112a (FIG. 28A). The conductive film can be preferably formed by sputtering.

[0359] Subsequently, an insulating film 110af that will become the insulating layer 110a and an insulating film 110bf that will become the insulating layer 110b are formed on the conductive layer 112a (FIG. 28B).

[0360] The insulating films 110af and 110bf can be preferably formed by sputtering or PECVD. After forming the insulating film 110af, it is preferable to form the insulating film 110bf in vacuum without exposing the surface of the insulating film 110af to the atmosphere. By forming the insulating films 110af and 110bf in succession, it is possible to prevent impurities from the atmosphere from adhering to the surface of the insulating film 110af. Examples of such impurities include water and organic substances.

[0361] The substrate temperature during the formation of the insulating films 110af and 110bf is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 400° C. or lower, further preferably 350° C. or higher and 400° C. or lower. By setting the substrate temperature during the formation of the insulating films 110af and 110bf within the above-described range, it is possible to reduce the release of impurities (e.g., water and hydrogen) from the insulating films themselves and to suppress the diffusion of impurities into the semiconductor layer 108. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.

[0362] Since the insulating films 110af and 110bf are formed before the semiconductor layer 108, there is no need to worry about oxygen being desorbed from the semiconductor layer 108 due to heat applied during the formation of the insulating films 110af and 110bf.

[0363] After the insulating film 110bf is formed, oxygen may be supplied to the insulating film 110bf. Examples of a method for supplying oxygen include ion implantation, ion doping, plasma immersion ion implantation, and plasma treatment. For the plasma treatment, an apparatus that converts oxygen gas into plasma using high-frequency power can be suitably used. Examples of apparatus that convert gas into plasma using high-frequency power include a PECVD apparatus, a plasma etching apparatus, and a plasma ashing apparatus. The plasma treatment is preferably performed in an atmosphere containing oxygen. For example, oxygen, nitrous oxide (N ２ O), nitrogen dioxide (NO ２ It is preferable to perform the plasma treatment in an atmosphere containing one or more of carbon monoxide, carbon dioxide, and / or arsenic.

[0364] The plasma treatment may be performed continuously in a vacuum without exposing the surface of the insulating film 110bf to the atmosphere. For example, when a PECVD apparatus is used to form the insulating film 110bf, it is preferable to perform the plasma treatment in the PECVD apparatus. This can improve productivity. Specifically, after the insulating film 110bf is formed in the PECVD apparatus, N ２ O plasma treatment can be performed.

[0365] Subsequently, a metal oxide layer 139 is preferably formed on the insulating film 110bf (FIG. 28C). By forming the metal oxide layer 139, oxygen can be supplied to the insulating film 110bf.

[0366] The conductivity of the metal oxide layer 139 does not matter. At least one of an insulating film, a semiconductor film, and a conductive film can be used as the metal oxide layer 139. For example, aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or silicon-containing indium tin oxide (ITSO) can be used as the metal oxide layer 139.

[0367] The metal oxide layer 139 is preferably an oxide containing one or more of the same elements as those of the semiconductor layer 108. In particular, it is preferable to use an oxide applicable to the semiconductor layer 108.

[0368] When forming the metal oxide layer 139, the amount of oxygen supplied to the insulating film 110bf can be increased by increasing the oxygen flow rate of the deposition gas introduced into the treatment chamber of the deposition apparatus or the oxygen partial pressure in the treatment chamber. The oxygen flow rate or oxygen partial pressure is, for example, 50% to 100%, preferably 65% ​​to 100%, more preferably 80% to 100%, and even more preferably 90% to 100%. In particular, it is preferable to set the oxygen flow rate to 100% and the oxygen partial pressure as close to 100% as possible.

[0369] In this way, by forming the metal oxide layer 139 by a sputtering method in an atmosphere containing oxygen, oxygen can be supplied to the insulating film 110bf and oxygen desorption from the insulating film 110bf can be prevented during the formation of the metal oxide layer 139. As a result, a large amount of oxygen can be confined in the insulating film 110bf. Then, a large amount of oxygen can be supplied to the semiconductor layer 108 by a subsequent heat treatment. As a result, oxygen vacancies and V in the semiconductor layer 108 can be reduced. Ｏ H can be reduced, and a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0370] Heat treatment may be performed after the metal oxide layer 139 is formed. By performing heat treatment after the metal oxide layer 139 is formed, oxygen can be effectively supplied from the metal oxide layer 139 to the insulating film 110bf.

[0371] The temperature of the heat treatment is preferably 150° C. or higher and lower than the strain point of the substrate, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 400° C. or lower, and further preferably 350° C. or higher and 400° C. or lower. The heat treatment can be performed in an atmosphere containing one or more of a noble gas, nitrogen, or oxygen. As the nitrogen-containing atmosphere or the oxygen-containing atmosphere, dry air (CDA: Clean Dry Air) may be used. Note that the content of hydrogen, water, and the like in the atmosphere is preferably as low as possible. As the atmosphere, it is preferable to use a high-purity gas with a dew point of −60° C. or lower, preferably −100° C. or lower. Using an atmosphere containing as little hydrogen, water, and the like as possible can prevent hydrogen, water, and the like from being taken into the insulating film 110af and the insulating film 110bf as much as possible. The heat treatment can be performed using an oven, a rapid thermal annealing (RTA) device, etc. By using an RTA device, the heat treatment time can be shortened.

[0372] After the metal oxide layer 139 is formed or after the heat treatment, oxygen may be supplied to the insulating film 110bf through the metal oxide layer 139. Oxygen can be supplied by, for example, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment. The above description of the plasma treatment can be referred to, and therefore detailed description thereof will be omitted.

[0373] Next, the metal oxide layer 139 is removed. There is no particular limitation on the method for removing the metal oxide layer 139, but wet etching can be suitably used. By using wet etching, etching of the insulating film 110bf can be suppressed when removing the metal oxide layer 139. This can suppress the thickness of the insulating film 110bf from becoming thin, and can make the thickness of the insulating layer 110b uniform.

[0374] The process of supplying oxygen to the insulating film 110bf is not limited to the above-described method. For example, oxygen radicals, oxygen atoms, oxygen atomic ions, or oxygen molecular ions may be supplied to the insulating film 110bf by ion doping, ion implantation, or plasma treatment. Alternatively, a film that suppresses oxygen desorption may be formed on the insulating film 110bf, and then oxygen may be supplied to the insulating film 110bf through the film. The film is preferably removed after oxygen is supplied. The film that suppresses oxygen desorption may be a conductive film or a semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, and tungsten.

[0375] Next, an insulating film 110cf, which will become the insulating layer 110c, is formed on the insulating film 110bf (FIG. 28D). The description of the formation of the insulating film 110cf can be referred to, and therefore a detailed description thereof will be omitted.

[0376] Next, a conductive film 112bf that will become the conductive layer 112b is formed on the insulating film 110cf (FIG. 28E). The conductive film 112bf can be preferably formed by sputtering.

[0377] Next, the conductive film 112bf is processed to form a conductive layer 112B (FIG. 29A). The conductive layer 112B will later become the conductive layer 112b. The conductive layer 112B can be preferably formed by, for example, wet etching.

[0378] Subsequently, a part of the conductive layer 112B is removed to form a conductive layer 112b having an opening 143. The conductive layer 112b can be preferably formed by wet etching.

[0379] Subsequently, parts of the insulating films 110af, 110bf, and 110cf are removed to form the insulating layer 110 having an opening 141 ( FIG. 29B ). The opening 141 is provided in a region overlapping with the opening 143. The formation of the opening 141 exposes the conductive layer 112a. The insulating layer 110 can be preferably formed by dry etching.

[0380] The opening 141 can be formed using, for example, the resist mask used to form the opening 143. Specifically, a resist mask is formed over the conductive layer 112B, part of the conductive layer 112B is removed using the resist mask to form the opening 143, and part of the insulating films 110af, 110bf, and 110cf is removed using the resist mask to form the opening 141. The opening 141 may be formed using a resist mask different from the resist mask used to form the opening 143.

[0381] Next, a metal oxide film 108f to be the semiconductor layer 108 is formed so as to cover the openings 141 and 143 ( FIG. 29C ). Here, the metal oxide film 108f is formed by stacking a metal oxide film 108af to be the semiconductor layer 108a, a metal oxide film 108bf to be the semiconductor layer 108b, and a metal oxide film 108cf to be the semiconductor layer 108c. The metal oxide film 108f is provided in contact with the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.

[0382] The metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf are preferably formed by sputtering using a metal oxide target. Alternatively, the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf are preferably formed by ALD. After forming the metal oxide film 108af, the metal oxide film 108bf is preferably formed successively without exposing the surface of the metal oxide film 108af to the atmosphere. Similarly, after forming the metal oxide film 108bf, the metal oxide film 108cf is preferably formed successively without exposing the surface of the metal oxide film 108bf to the atmosphere. By successively forming the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf, the adhesion of impurities derived from the atmosphere to the surface of the metal oxide film 108af can be suppressed. Examples of such impurities include water and organic substances. Note that the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf may be formed using different apparatuses or different formation methods. For example, the metal oxide film 108af and the metal oxide film 108cf may be formed by an ALD method, and the metal oxide film 108bf may be formed by a sputtering method.

[0383] Because the ALD method has high coverage, it can be suitably used to form one or more of the metal oxide films 108af, 108bf, and 108cf that cover the openings 141 and 143. By using the ALD method, a metal oxide film can be formed with high coverage on the side surfaces of the insulating layer 110. Furthermore, because the ALD method makes it easy to control the film formation rate, a thin film can be formed with a high yield. Therefore, the ALD method can be suitably used to form the metal oxide film 108af, which becomes the thin semiconductor layer 108a. Instead of the sputtering method and the ALD method, a CVD method may be used to form one or more of the metal oxide films 108af, 108bf, and 108cf.

[0384] The metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf are preferably dense films with as few defects as possible. Furthermore, the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf are preferably high-purity films in which impurities including hydrogen elements are reduced as much as possible. In particular, it is preferable to use crystalline metal oxide films as the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf.

[0385] Oxygen gas is preferably used when the metal oxide films 108af, 108bf, and 108cf are formed. In particular, by using oxygen gas when the metal oxide film 108af is formed, oxygen can be suitably supplied into the insulating layer 110. For example, when an oxide or an oxynitride is used for the insulating layer 110b, oxygen can be suitably supplied into the insulating layer 110b.

[0386] By supplying oxygen to the insulating layer 110b, oxygen is supplied to the semiconductor layer 108 in a later step, and oxygen vacancies and V Ｏ H can be reduced.

[0387] When forming the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf, oxygen gas may be mixed with an inert gas (e.g., helium gas, argon gas, xenon gas, etc.). Note that the higher the oxygen flow rate ratio of the deposition gas or the oxygen partial pressure in the processing chamber when forming the metal oxide film, the higher the crystallinity of the metal oxide film, resulting in a highly reliable transistor. On the other hand, the lower the oxygen flow rate ratio or the oxygen partial pressure, the lower the crystallinity and the higher the electrical conductivity of the metal oxide film, resulting in a transistor with a large on-state current. In particular, by lowering the oxygen flow rate ratio or the oxygen partial pressure when forming the metal oxide film 108bf, which serves as the main current path, a transistor with a large on-state current can be obtained. By varying the oxygen flow rate ratio when forming the metal oxide film 108af, the oxygen flow rate ratio when forming the metal oxide film 108bf, and the oxygen flow rate ratio when forming the metal oxide film 108cf, the crystallinity of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf can be varied. Note that these oxygen flow rate ratios may be the same or different from one another. The same applies to the oxygen partial pressure.

[0388] Here, if the oxygen flow rate ratio or oxygen partial pressure is high, the metal oxide film may become polycrystalline. In the case of a polycrystalline metal oxide film, the crystal grain boundaries become recombination centers, and carriers may be captured, resulting in a small on-state current of the transistor. Therefore, it is preferable to adjust the oxygen flow rate ratio or oxygen partial pressure of each of the metal oxide films 108af, 108bf, and 108cf so that they do not become polycrystalline. Since the ease with which the metal oxide film becomes polycrystalline differs depending on the composition of the metal oxide film, the oxygen flow rate ratio or oxygen partial pressure may be varied depending on the composition of the metal oxide film 108af, 108bf, and 108cf.

[0389] For example, when the metal oxide film 108bf is made of a material that easily becomes a polycrystalline structure, the oxygen flow rate ratio when the metal oxide film 108bf is formed is preferably lower than the oxygen flow rate ratio when the metal oxide film 108af is formed and the oxygen flow rate ratio when the metal oxide film 108cf is formed. The same applies to the oxygen partial pressure.

[0390] The higher the substrate temperature when forming the metal oxide film, the higher the crystallinity and density of the resulting metal oxide film. On the other hand, the lower the substrate temperature, the lower the crystallinity and electrical conductivity of the resulting metal oxide film. The substrate temperatures when forming the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf may be the same or different from one another. By varying the substrate temperatures, the crystallinity of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf can be varied.

[0391] The substrate temperature during the formation of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf is preferably from room temperature to 250° C., more preferably from room temperature to 200° C., and even more preferably from room temperature to 140° C. For example, a substrate temperature of from room temperature to 140° C. is preferable because productivity is increased. Furthermore, by forming the metal oxide film at room temperature or without heating the substrate, the crystallinity can be reduced.

[0392] If the substrate temperature is high, the metal oxide film may have a polycrystalline structure. It is preferable to adjust the substrate temperature of each of the metal oxide films 108af, 108bf, and 108cf so that the metal oxide films do not have a polycrystalline structure. The substrate temperature may be varied depending on the composition of the metal oxide film 108af, 108bf, and 108cf.

[0393] For example, when a material that easily becomes a polycrystalline structure is used for the metal oxide film 108bf, it is preferable that the substrate temperature when forming the metal oxide film 108bf be lower than the substrate temperature when forming the metal oxide film 108af and the substrate temperature when forming the metal oxide film 108cf.

[0394] Here, using the same sputtering target to form any two or more of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf can reduce manufacturing costs. Furthermore, by using the same substrate temperature during the formation of any two or more of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf, the metal oxide films can be formed with high productivity using the same treatment chamber. For example, the metal oxide film 108bf and the metal oxide film 108cf can be formed successively in the same treatment chamber using the same sputtering target. In this case, the substrate temperature can be kept the same, and the oxygen flow rate ratio or oxygen partial pressure during the formation of the metal oxide film 108bf can be made different from the oxygen flow rate ratio or oxygen partial pressure during the formation of the metal oxide film 108cf.

[0395] When the ALD method is used, it is preferable to use a film formation method such as a thermal ALD method or PEALD (Plasma Enhanced ALD). The thermal ALD method is preferable because it exhibits extremely high coverage. The PEALD method is preferable because it not only exhibits high coverage but also allows low-temperature film formation.

[0396] The metal oxide film can be formed by, for example, the ALD method using a precursor containing the constituent metal element and an oxidizing agent.

[0397] For example, when forming an In—Ga—Zn oxide, three precursors, i.e., a precursor containing indium, a precursor containing gallium, and a precursor containing zinc, can be used, or two precursors, i.e., a precursor containing indium and a precursor containing gallium and zinc, can be used.

[0398] Examples of precursors containing indium include triethylindium, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)indium, cyclopentadienylindium, indium(III) chloride, and (3-(dimethylamino)propyl)dimethylindium.

[0399] Gallium-containing precursors include, for example, trimethylgallium, triethylgallium, gallium trichloride, tris(dimethylamido)gallium(III), gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)gallium, dimethylchlorogallium, and diethylchlorogallium.

[0400] Examples of zinc-containing precursors include dimethylzinc, diethylzinc, zinc bis(2,2,6,6-tetramethyl-3,5-heptanedionate), and zinc chloride.

[0401] Oxidizing agents include, for example, ozone, oxygen, and water.

[0402] Methods for controlling the composition of the resulting film include adjusting one or more of the type of source gas, the flow rate ratio of the source gas, the time for which the source gas is flowed, and the order in which the source gas is flowed. By adjusting these, the compositions of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf can be controlled. Furthermore, by adjusting these, it is also possible to form a film whose composition changes continuously. A configuration in which the composition of one or more of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108bf changes continuously may be used.

[0403] For example, the precursor used to form the metal oxide film 108bf preferably has a lower gallium content than the precursor used to form the metal oxide film 108af and the precursor used to form the metal oxide film 108cf. Alternatively, a precursor not containing gallium may be used to form the metal oxide film 108bf, and a precursor containing gallium may be used to form the metal oxide film 108af and the metal oxide film 108cf. Note that although gallium is used as the element M in the description here, one embodiment of the present invention is not limited thereto. One or more of the above-described elements M may be used instead of or in addition to gallium.

[0404] Before forming the metal oxide film 108f (specifically, the metal oxide film 108af), it is preferable to perform at least one of a treatment for removing water, hydrogen, organic substances, and the like adsorbed on the surface of the insulating layer 110 and a treatment for supplying oxygen into the insulating layer 110. For example, heat treatment can be performed at a temperature of 70° C. or higher and 200° C. or lower in a reduced pressure atmosphere. Alternatively, plasma treatment in an atmosphere containing oxygen may be performed. Alternatively, dinitrogen monoxide (N ２ Oxygen may be supplied to the insulating layer 110 by plasma treatment in an atmosphere containing an oxidizing gas such as nitrous oxide (NO). When plasma treatment containing nitrous oxide gas is performed, oxygen can be supplied while organic substances on the surface of the insulating layer 110 are suitably removed. After such treatment, it is preferable to form the metal oxide film 108f continuously without exposing the surface of the insulating layer 110 to the air.

[0405] Subsequently, the metal oxide film 108f is processed into an island shape to form the semiconductor layer 108 (FIG. 29D).

[0406] The semiconductor layer 108 can be preferably formed by wet etching. At this time, a part of the conductive layer 112b in a region that does not overlap with the semiconductor layer 108 may be etched and thinned. Similarly, a part of the insulating layer 110 in a region that does not overlap with both the semiconductor layer 108 and the conductive layer 112b may be etched and thinned. For example, the insulating layer 110c of the insulating layer 110 may be removed by etching, and the surface of the insulating layer 110b may be exposed. Note that, in etching the metal oxide film 108f, using a material with a high etching selectivity for the insulating layer 110c can prevent the insulating layer 110c from becoming thin.

[0407] Heat treatment is preferably performed after the metal oxide film 108f is formed or after the metal oxide film 108f is processed into the semiconductor layer 108. The heat treatment can remove hydrogen or water contained in or adsorbed on the surface of the metal oxide film 108f or the semiconductor layer 108. Furthermore, the heat treatment may improve the film quality of the metal oxide film 108f or the semiconductor layer 108 (for example, reduce defects or improve crystallinity).

[0408] By the heat treatment, oxygen can also be supplied from the insulating layer 110b to the metal oxide film 108f or the semiconductor layer 108. In this case, it is preferable to perform the heat treatment before processing into the semiconductor layer 108. The above description can be referred to for the heat treatment, and therefore detailed description thereof will be omitted.

[0409] Note that this heat treatment does not have to be performed if it is not necessary. Alternatively, the heat treatment may be omitted here and may be combined with a heat treatment performed in a later step. Furthermore, a process in which heat is applied in a later step (e.g., a film formation step) may also serve as this heat treatment.

[0410] Subsequently, the insulating layer 106 is formed to cover the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110. The insulating layer 106 can be formed preferably by, for example, a PECVD method or an ALD method.

[0411] When an oxide semiconductor is used for the semiconductor layer 108, the insulating layer 106 preferably functions as a barrier film that suppresses oxygen diffusion. The insulating layer 106 has a function of suppressing oxygen diffusion, which suppresses oxygen from diffusing from above the insulating layer 106 to the conductive layer 104, thereby suppressing oxidation of the conductive layer 104. As a result, a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0412] In this specification and the like, a barrier film refers to a film having barrier properties. For example, an insulating layer having barrier properties can be referred to as a barrier insulating layer. In this specification and the like, the barrier properties refer to one or both of a function of suppressing the diffusion of a corresponding substance (also referred to as low permeability) and a function of capturing or fixing a corresponding substance (also referred to as gettering).

[0413] By increasing the temperature during the formation of the insulating layer 106 that functions as a gate insulating layer, the insulating layer can have fewer defects. However, if the temperature during the formation of the insulating layer 106 is high, oxygen is released from the semiconductor layer 108, causing oxygen vacancies and V in the semiconductor layer 108. ＯH may increase. The substrate temperature during the formation of the insulating layer 106 is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, and further preferably 300° C. or higher and 400° C. or lower. By setting the substrate temperature during the formation of the insulating layer 106 within the above range, defects in the insulating layer 106 can be reduced and oxygen can be prevented from being released from the semiconductor layer 108. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.

[0414] Before forming the insulating layer 106, plasma treatment may be performed on the surface of the semiconductor layer 108. The plasma treatment can reduce impurities such as water adsorbed on the surface of the semiconductor layer 108. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 106 can be reduced, and a highly reliable transistor can be realized. This is particularly suitable for the case where the surface of the semiconductor layer 108 is exposed to the air between the formation of the semiconductor layer 108 and the formation of the insulating layer 106. The plasma treatment can be performed in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, or the like, for example. Furthermore, the plasma treatment and the formation of the insulating layer 106 are preferably performed successively without exposure to the air.

[0415] Subsequently, a conductive layer 104 is formed over the insulating layer 106 (FIGS. 1A and 1B). A conductive film that becomes the conductive layer 104 can be suitably formed by, for example, a sputtering method, a thermal CVD method (including an MOCVD method), or an ALD method.

[0416] Through the above steps, a semiconductor device of one embodiment of the present invention can be manufactured.

[0417] This embodiment mode can be combined with other embodiment modes as appropriate.

[0418] Embodiment 3 In this embodiment, a display device of one embodiment of the present invention will be described with reference to FIGS.

[0419] The display device of this embodiment can be a high-resolution display device or a large-sized display device. Therefore, the display device of this embodiment can be used as a display unit for electronic devices having relatively large screens, such as television devices, desktop or notebook computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound reproduction devices.

[0420] The display device of the present embodiment can be a high-definition display device, and can therefore be used, for example, as a display unit for a wristwatch-type or bracelet-type information terminal (wearable device), as well as a display unit for a wearable device that can be worn on the head, such as a head-mounted display (HMD) for VR, or a glasses-type AR device.

[0421] The semiconductor device of one embodiment of the present invention can be used for a display device or a module including the display device. Examples of the module including the display device include a module in which a connector such as a flexible printed circuit (hereinafter referred to as FPC) or a tape carrier package (TCP) is attached to the display device, and a module in which an integrated circuit (IC) is mounted by a chip-on-glass (COG) method, a chip-on-film (COF) method, or the like.

[0422] The display device of this embodiment may have a function as a touch panel. For example, various detection elements (also referred to as sensor elements) that can detect the proximity or contact of a detection target such as a finger can be applied to the display device.

[0423] Examples of sensor types include a capacitance type, a resistive film type, a surface acoustic wave type, an infrared type, an optical type, and a pressure-sensitive type.

[0424] The capacitance type includes, for example, a surface capacitance type and a projected capacitance type. The projected capacitance type includes, for example, a self-capacitance type and a mutual capacitance type. The mutual capacitance type is preferred because it enables simultaneous multi-point detection.

[0425] Examples of touch panels include out-cell, on-cell, and in-cell types. Note that an in-cell touch panel is a type in which electrodes constituting a detection element are provided on one or both of a substrate supporting a display element and an opposing substrate.

[0426] [Display Device 50A] FIG. 30 shows a perspective view of the display device 50A.

[0427] The display device 50A has a configuration in which a substrate 152 and a substrate 151 are bonded together. In Fig. 30, the substrate 152 is indicated by a dashed line.

[0428] The display device 50A includes a display portion 162, a connection portion 140, a circuit portion 164, a conductive layer 165, etc. Fig. 30 shows an example in which an IC 173 and an FPC 172 are mounted on the display device 50A. Therefore, the configuration shown in Fig. 30 can also be said to be a display module including the display device 50A, an IC, and an FPC.

[0429] The connection portion 140 is provided on the outside of the display portion 162. The connection portion 140 can be provided along one side or multiple sides of the display portion 162. There may be one or multiple connection portions 140. FIG. 30 shows an example in which the connection portion 140 is provided so as to surround the four sides of the display portion. The connection portion 140 electrically connects the common electrode of the display element and the conductive layer, and can supply a potential to the common electrode.

[0430] The circuit portion 164 includes, for example, a scan line driver circuit (also referred to as a gate driver). Alternatively, the circuit portion 164 may include both a scan line driver circuit and a signal line driver circuit (also referred to as a source driver).

[0431] The conductive layer 165 has a function of supplying signals and power to the display portion 162 and the circuit portion 164. The signals and power are input to the conductive layer 165 from the outside through the FPC 172 or are input to the conductive layer 165 from the IC 173.

[0432] 30 shows an example in which an IC 173 is provided on a substrate 151 by a COG method, a COF method, or the like. The IC 173 may be, for example, an IC having one or both of a scanning line driver circuit and a signal line driver circuit. The display device 50A and the display module may be configured without an IC. The IC may also be mounted on an FPC by a COF method, or the like.

[0433] The semiconductor device of one embodiment of the present invention can be used for one or both of the display portion 162 and the circuit portion 164 of the display device 50A, for example.

[0434] For example, when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, resulting in a high-resolution display device. Furthermore, when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (e.g., one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, resulting in a display device with a narrow frame. Furthermore, since the semiconductor device of one embodiment of the present invention has good electrical characteristics, its use in a display device can improve the reliability of the display device.

[0435] The display section 162 is an area in the display device 50A that displays an image, and has a plurality of periodically arranged pixels 201. Fig. 30 shows an enlarged view of one pixel 201.

[0436] The pixel arrangement in the display device of this embodiment is not particularly limited, and various methods can be applied, such as a stripe arrangement, an S-stripe arrangement, a matrix arrangement, a delta arrangement, a Bayer arrangement, and a pentile arrangement.

[0437] The pixel 201 shown in FIG. 30 has a sub-pixel 11R that emits red light, a sub-pixel 11G that emits green light, and a sub-pixel 11B that emits blue light.

[0438] Each of the sub-pixels 11R, 11G, and 11B includes a display element and a circuit that controls the driving of the display element.

[0439] Various elements can be used as the display element, including, for example, a liquid crystal element and a light-emitting element. Other examples include shutter-type or optical interference-type MEMS (Micro Electro Mechanical Systems) elements, display elements that employ a microcapsule method, an electrophoresis method, an electrowetting method, or an electronic liquid powder (registered trademark) method, etc. Furthermore, a QLED (Quantum-dot LED) that uses a light source and color conversion technology using quantum dot materials may also be used.

[0440] Examples of display devices using liquid crystal elements include transmissive liquid crystal display devices, reflective liquid crystal display devices, and semi-transmissive liquid crystal display devices.

[0441] Examples of modes that can be used in display devices using liquid crystal elements include vertical alignment (VA) mode, Fringe Field Switching (FFS) mode, In-Plane-Switching (IPS) mode, Twisted Nematic (TN) mode, Axially Symmetric Aligned Micro-cell (ASM) mode, Optically Compensated Birefringence (OCB) mode, Ferroelectric Liquid Crystal (FLC) mode, Anti-Ferroelectric Liquid Crystal (AFLC) mode, and Electrically Compensated Birefringence (ECB) mode. Examples of the VA mode include a Multi-Domain Vertical Alignment (MVA) mode, a Patterned Vertical Alignment (PVA) mode, and an Advanced Super View (ASV) mode.

[0442] Examples of liquid crystal materials that can be used in liquid crystal elements include thermotropic liquid crystals, low-molecular-weight liquid crystals, polymer liquid crystals, polymer-dispersed liquid crystals (PDLCs), polymer network liquid crystals (PNLCs), ferroelectric liquid crystals, and antiferroelectric liquid crystals. These liquid crystal materials exhibit cholesteric phases, smectic phases, cubic phases, chiral nematic phases, isotropic phases, blue phases, and the like, depending on the conditions. Furthermore, either positive-type or negative-type liquid crystals may be used as the liquid crystal material, and the type can be selected depending on the mode or design to be applied.

[0443] Examples of the light-emitting element include self-luminous light-emitting elements such as LEDs (Light Emitting Diodes), OLEDs (Organic LEDs), semiconductor lasers, etc. Examples of the LED that can be used include mini LEDs and micro LEDs.

[0444] Examples of light-emitting substances that the light-emitting element has include fluorescent substances (fluorescent materials), phosphorescent substances (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF materials), and inorganic compounds (quantum dot materials, etc.).

[0445] The light-emitting element can emit light of infrared, red, green, blue, cyan, magenta, yellow, white, etc. Furthermore, the color purity can be improved by providing the light-emitting element with a microcavity structure.

[0446] One of a pair of electrodes included in the light-emitting element functions as an anode, and the other electrode functions as a cathode.

[0447] Note that the display device of one embodiment of the present invention may be any of a top-emission type that emits light in a direction opposite to a substrate on which a light-emitting element is formed, a bottom-emission type that emits light toward a substrate on which a light-emitting element is formed, and a dual-emission type that emits light to both sides.

[0448] Figure 31A shows an example of a cross section of the display device 50A when a portion of the area including the FPC 172, a portion of the circuit section 164, a portion of the display section 162, a portion of the connection section 140, and a portion of the area including the end portion are cut away.

[0449] 31A includes transistors 205D, 205R, 205G, and 205B, a light-emitting element 130R, a light-emitting element 130G, and a light-emitting element 130B between a substrate 151 and a substrate 152. The light-emitting element 130R is a display element included in the sub-pixel 11R that emits red light, the light-emitting element 130G is a display element included in the sub-pixel 11G that emits green light, and the light-emitting element 130B is a display element included in the sub-pixel 11B that emits blue light.

[0450] The display device 50A employs an SBS structure, which allows the materials and configuration to be optimized for each light-emitting element, increasing the degree of freedom in the selection of materials and configurations and facilitating improvements in brightness and reliability.

[0451] The display device 50A is a top emission type, which allows transistors and the like to be arranged overlapping the light emitting region of the light emitting element, thereby enabling a higher pixel aperture ratio than a bottom emission type.

[0452] The transistors 205D, 205R, 205G, and 205B are all formed on the substrate 151. These transistors can be manufactured using the same material and in the same process.

[0453] In this embodiment, an example in which OS transistors are used as the transistors 205D, 205R, 205G, and 205B will be described. The transistors according to one embodiment of the present invention can be used as the transistors 205D, 205R, 205G, and 205B. That is, the display device 50A includes the transistor according to one embodiment of the present invention in both the display portion 162 and the circuit portion 164. By using the transistor according to one embodiment of the present invention in the display portion 162, the pixel size can be reduced, leading to higher resolution. Furthermore, by using the transistor according to one embodiment of the present invention in the circuit portion 164, the area occupied by the circuit portion 164 can be reduced, leading to a narrower frame. The description of the previous embodiment can be referred to for the transistor according to one embodiment of the present invention.

[0454] Specifically, the transistors 205D, 205R, 205G, and 205B each include a conductive layer 104 that functions as a gate, an insulating layer 106 that functions as a gate insulating layer, conductive layers 112a and 112b that function as a source and a drain, a semiconductor layer 108 containing metal oxide, and an insulating layer 110 (insulating layers 110a, 110b, and 110c). Here, the same hatched pattern is applied to multiple layers obtained by processing the same conductive film. The insulating layer 110 is located between the conductive layer 112a and the conductive layer 112b. The insulating layer 106 is located between the conductive layer 104 and the semiconductor layer 108.

[0455] Note that the transistor included in the display device of this embodiment is not limited to the transistor of one embodiment of the present invention. For example, the display device may include a combination of the transistor of one embodiment of the present invention and a transistor having another structure.

[0456] The display device of this embodiment may include, for example, one or more of a planar transistor, a staggered transistor, and an inverted staggered transistor. The transistor included in the display device of this embodiment may be either a top-gate transistor or a bottom-gate transistor. Alternatively, gates may be provided above and below a semiconductor layer in which a channel is formed.

[0457] The display device of this embodiment may have a Si transistor.

[0458] To increase the emission luminance of a light-emitting element included in a pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting element. To achieve this, it is necessary to increase the source-drain voltage of a driving transistor included in the pixel circuit. Since an OS transistor has a higher withstand voltage between its source and drain than a Si transistor, a high voltage can be applied between the source and drain of the OS transistor. Therefore, by using an OS transistor as the driving transistor included in a pixel circuit, it is possible to increase the amount of current flowing through the light-emitting element and increase the emission luminance of the light-emitting element.

[0459] When a transistor operates in a saturation region, an OS transistor can reduce the change in source-drain current with respect to a change in gate-source voltage compared to a Si transistor. Therefore, by using an OS transistor as a driving transistor included in a pixel circuit, the current flowing between the source and drain can be precisely controlled by changing the gate-source voltage, thereby controlling the amount of current flowing to a light-emitting element. This allows a pixel circuit to have a larger number of gray levels.

[0460] In terms of the saturation of the current that flows when a transistor operates in the saturation region, an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a driving transistor, a stable current can be passed to a light-emitting element, even when the current-voltage characteristics of the light-emitting element vary. In other words, when an OS transistor operates in the saturation region, the source-drain current hardly changes even when the source-drain voltage is changed, thereby stabilizing the light-emitting luminance of the light-emitting element.

[0461] The transistors included in the circuit portion 164 and the transistors included in the display portion 162 may have the same structure or different structures. The transistors included in the circuit portion 164 may all have the same structure or may have two or more types. Similarly, the transistors included in the display portion 162 may all have the same structure or may have two or more types.

[0462] All the transistors included in the display portion 162 may be OS transistors, all the transistors included in the display portion 162 may be Si transistors, or some of the transistors included in the display portion 162 may be OS transistors and the rest may be Si transistors.

[0463] For example, by using both an LTPS transistor and an OS transistor in the display portion 162, a display device with low power consumption and high driving capability can be realized. A structure in which an LTPS transistor and an OS transistor are combined is sometimes referred to as LTPO. Note that a more preferable example is a structure in which an OS transistor is used as a transistor that functions as a switch for controlling conduction / non-conduction between wirings, and an LTPS transistor is used as a transistor for controlling current.

[0464] For example, one of the transistors included in the display portion 162 functions as a transistor for controlling a current flowing to a light-emitting element and can also be called a driving transistor. One of the source and drain of the driving transistor is electrically connected to a pixel electrode of the light-emitting element. The driving transistor is preferably an LTPS transistor. This can increase the current flowing to the light-emitting element in the pixel circuit.

[0465] On the other hand, another transistor included in the display portion 162 functions as a switch for controlling pixel selection / non-selection and can also be called a selection transistor. The gate of the selection transistor is electrically connected to a gate line, and one of the source and drain is electrically connected to a source line (signal line). An OS transistor is preferably used as the selection transistor. This allows the gradation of a pixel to be maintained even when the frame frequency is significantly reduced (for example, 1 fps or less). Therefore, power consumption can be reduced by stopping the driver when displaying a still image.

[0466] An insulating layer 218 is provided to cover the transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided over the insulating layer 218.

[0467] The insulating layer 218 preferably functions as a protective layer for the transistor. The insulating layer 218 is preferably made of a material through which impurities such as water and hydrogen are less likely to diffuse. This allows the insulating layer 218 to function as a barrier film. With such a structure, diffusion of impurities from the outside into the transistor can be effectively suppressed, and the reliability of the display device can be improved.

[0468] The insulating layer 218 preferably includes one or more inorganic insulating films. Examples of the inorganic insulating film include an insulating oxide film, an insulating nitride film, an insulating oxynitride film, and an insulating nitride oxide film. Specific examples of these inorganic insulating films are as described above.

[0469] The insulating layer 235 preferably functions as a planarization layer, and is preferably an organic insulating film. Materials that can be used for the organic insulating film include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene resin, phenolic resin, and precursors of these resins. The insulating layer 235 may also have a laminated structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 preferably functions as an etching protection layer. This prevents recesses from being formed in the insulating layer 235 during processing of the pixel electrodes 111R, 111G, 111B, etc. Alternatively, recesses may be formed in the insulating layer 235 during processing of the pixel electrodes 111R, 111G, 111B, etc.

[0470] On the insulating layer 235, the light emitting elements 130R, 130G, and 130B are provided.

[0471] The light-emitting element 130R has a pixel electrode 111R on the insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R. The light-emitting element 130R shown in Fig. 31A emits red light (R). The EL layer 113R has a light-emitting layer that emits red light.

[0472] The light-emitting element 130G has a pixel electrode 111G on the insulating layer 235, an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G. The light-emitting element 130G shown in Fig. 31A emits green light (G). The EL layer 113G has a light-emitting layer that emits green light.

[0473] The light-emitting element 130B has a pixel electrode 111B on the insulating layer 235, an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B. The light-emitting element 130B shown in Fig. 31A emits blue light (B). The EL layer 113B has a light-emitting layer that emits blue light.

[0474] 31A, the EL layers 113R, 113G, and 113B are all shown with the same film thickness, but this is not limited to this. The EL layers 113R, 113G, and 113B may have different film thicknesses. For example, it is preferable to set the film thickness of the EL layers 113R, 113G, and 113B so that the optical path length increases the intensity of the light emitted by each layer. This allows for a microcavity structure to be realized, and the color purity of the light emitted from each light-emitting element to be improved.

[0475] The pixel electrode 111R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235. Similarly, the pixel electrode 111G is electrically connected to the conductive layer 112b of the transistor 205G, and the pixel electrode 111B is electrically connected to the conductive layer 112b of the transistor 205B.

[0476] Ends of each of the pixel electrodes 111R, 111G, and 111B are covered with an insulating layer 237. The insulating layer 237 functions as a partition wall. The insulating layer 237 can be formed in a single layer structure or a stacked layer structure using one or both of an inorganic insulating material and an organic insulating material. For example, the materials that can be used for the insulating layer 218 and the insulating layer 235 can be used for the insulating layer 237. The insulating layer 237 can electrically insulate the pixel electrode and the common electrode. Furthermore, the insulating layer 237 can electrically insulate adjacent light-emitting elements from each other.

[0477] The insulating layer 237 is provided at least in the display unit 162. The insulating layer 237 may be provided not only in the display unit 162 but also in the connection unit 140 and the circuit unit 164. Furthermore, the insulating layer 237 may be provided up to the edge of the display device 50A.

[0478] The common electrode 115 is a continuous film provided in common to the light-emitting elements 130R, 130G, and 130B. The common electrode 115 shared by the plurality of light-emitting elements is electrically connected to a conductive layer 123 provided in the connection portion 140. The conductive layer 123 is preferably formed using the same material and in the same process as the pixel electrodes 111R, 111G, and 111B.

[0479] In a display device according to one embodiment of the present invention, a conductive film that transmits visible light is preferably used for the pixel electrode and the common electrode, which are electrodes from which light is extracted, and a conductive film that reflects visible light is preferably used for the electrode from which light is not extracted.

[0480] A conductive film that transmits visible light may also be used for the electrode on the side from which light is not extracted. In this case, it is preferable to place the electrode between the reflective layer and the EL layer. In other words, the light emitted from the EL layer may be reflected by the reflective layer and extracted from the display device.

[0481] Materials for forming the pair of electrodes of the light-emitting element can include metals, alloys, electrically conductive compounds, and mixtures thereof, as appropriate. Specific examples of such materials include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, as well as alloys containing these metals in combination. Other examples of such materials include indium tin oxide (In-Sn oxide, also referred to as ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide), and In-W-Zn oxide. Other examples of such materials include aluminum-containing alloys (aluminum alloys), such as an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), and silver-containing alloys, such as an alloy of silver and magnesium and an alloy of silver, palladium, and copper (Ag-Pd-Cu, also referred to as APC). Other examples of the material include elements belonging to Group 1 or 2 of the periodic table (e.g., lithium, cesium, calcium, and strontium) that are not exemplified above, rare earth metals such as europium and ytterbium, alloys containing appropriate combinations of these, and graphene.

[0482] The light-emitting element preferably has a micro-optical resonator (microcavity) structure. Therefore, one of the pair of electrodes of the light-emitting element is preferably an electrode that is transparent and reflective to visible light (semi-transmissive / semi-reflective electrode), and the other is preferably an electrode that is reflective to visible light (reflective electrode). By having the light-emitting element have a microcavity structure, the light emitted from the light-emitting layer can be resonated between both electrodes, thereby intensifying the light emitted from the light-emitting element.

[0483] The light transmittance of the transparent electrode is 40% or more. For example, it is preferable to use an electrode having a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more for the transparent electrode of the light-emitting element. The visible light reflectance of the semi-transmissive / semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less. Furthermore, the resistivity of these electrodes is 1×10 −２ Preferably, it is Ωcm or less.

[0484] The EL layers 113R, 113G, and 113B are each provided in an island shape. In FIG. 31A , the ends of adjacent EL layers 113R and 113G overlap, the ends of adjacent EL layers 113G and 113B overlap, and the ends of adjacent EL layers 113R and 113B overlap. When forming island-shaped EL layers using a fine metal mask, the ends of adjacent EL layers may overlap as shown in FIG. 31A , but this is not limited to this. In other words, adjacent EL layers may not overlap but may be spaced apart. Furthermore, the display device may have both overlapping portions between adjacent EL layers and portions between adjacent EL layers that do not overlap but are spaced apart.

[0485] Each of the EL layers 113R, 113G, and 113B includes at least a light-emitting layer. The light-emitting layer includes one or more light-emitting materials. As the light-emitting material, a material that emits light of a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used. Furthermore, a material that emits near-infrared light can also be used as the light-emitting material.

[0486] The light-emitting material may include a fluorescent material, a phosphorescent material, a TADF material, and a quantum dot material.

[0487] The light-emitting layer may contain one or more organic compounds (host materials, assist materials, etc.) in addition to a light-emitting substance (guest material). As the one or more organic compounds, one or both of a substance with high hole-transport properties (hole-transport material) and a substance with high electron-transport properties (electron-transport material) can be used. Furthermore, as the one or more organic compounds, a bipolar substance (a substance with high electron-transport properties and hole-transport properties) or a TADF material can be used.

[0488] The light-emitting layer preferably includes, for example, a phosphorescent material and a hole-transporting material and an electron-transporting material, which are a combination that easily forms an exciplex. This configuration allows efficient emission using Exciplex-Triple Energy Transfer (ExTET), which is energy transfer from the exciplex to the light-emitting material (phosphorescent material). By selecting a combination that forms an exciplex that emits light that overlaps with the wavelength of the lowest-energy absorption band of the light-emitting material, energy transfer becomes smooth, allowing efficient emission. This configuration simultaneously enables high efficiency, low-voltage operation, and long life of the light-emitting element.

[0489] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole-injecting properties (hole-injecting layer), a layer containing a hole-transporting material (hole-transporting layer), a layer containing a substance with high electron-blocking properties (electron-blocking layer), a layer containing a substance with high electron-injecting properties (electron-injecting layer), a layer containing an electron-transporting material (electron-transporting layer), and a layer containing a substance with high hole-blocking properties (hole-blocking layer).In addition, the EL layer may include one or both of a bipolar substance and a TADF material.

[0490] The light-emitting element can be made of either a low-molecular-weight compound or a high-molecular-weight compound, and may contain an inorganic compound. The layers constituting the light-emitting element can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0491] The light-emitting element may have a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units). The light-emitting unit has at least one light-emitting layer. The tandem structure is a structure in which multiple light-emitting units are connected in series via a charge-generating layer. When a voltage is applied between a pair of electrodes, the charge-generating layer injects electrons into one of the two light-emitting units and holes into the other. The tandem structure allows the light-emitting element to emit light with high brightness. Furthermore, the tandem structure can reduce the current required to achieve the same brightness compared to a single structure, thereby improving reliability. The tandem structure may also be called a stack structure.

[0492] In Figure 31A, when light-emitting elements with a tandem structure are used, it is preferable that EL layer 113R has a structure having multiple light-emitting units that emit red light, EL layer 113G has a structure having multiple light-emitting units that emit green light, and EL layer 113B has a structure having multiple light-emitting units that emit blue light.

[0493] A protective layer 131 is provided on the light-emitting elements 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded via an adhesive layer 142. A light-shielding layer 117 is provided on the substrate 152. For example, a solid sealing structure or a hollow sealing structure can be applied to seal the light-emitting elements. In FIG. 31A , the space between the substrates 152 and 151 is filled with the adhesive layer 142, and a solid sealing structure is applied. Alternatively, the space may be filled with an inert gas (such as nitrogen or argon), and a hollow sealing structure may be applied. In this case, the adhesive layer 142 may be provided so as not to overlap with the light-emitting elements. Alternatively, the space may be filled with a resin different from the frame-shaped adhesive layer 142.

[0494] The protective layer 131 is preferably provided on at least the display unit 162, and is preferably provided so as to cover the entire display unit 162. The protective layer 131 is preferably provided so as to cover not only the display unit 162, but also the connection unit 140 and the circuit unit 164. The protective layer 131 is preferably provided up to the edge of the display device 50A. On the other hand, the connection unit 197 has a portion where the protective layer 131 is not provided, in order to electrically connect the FPC 172 and the conductive layer 166.

[0495] By providing the protective layer 131 on the light emitting elements 130R, 130G, and 130B, the reliability of the light emitting elements can be improved.

[0496] The protective layer 131 may have a single layer structure or a stacked structure of two or more layers. The conductivity of the protective layer 131 does not matter. The protective layer 131 can be formed using at least one of an insulating film, a semiconductor film, and a conductive film.

[0497] The protective layer 131 has an inorganic film, which can prevent oxidation of the common electrode 115, prevent impurities (moisture, oxygen, etc.) from entering the light-emitting element, and so on, thereby suppressing deterioration of the light-emitting element and improving the reliability of the display device.

[0498] For the protective layer 131, for example, an inorganic insulating film such as an insulating oxide film, an insulating nitride film, an insulating oxynitride film, or an insulating nitride oxide film can be used. Specific examples of these inorganic insulating films are as described above. In particular, the protective layer 131 preferably includes an insulating nitride film or an insulating nitride oxide film, and more preferably includes an insulating nitride film.

[0499] The protective layer 131 may be an inorganic film containing ITO, In—Zn oxide, Ga—Zn oxide, Al—Zn oxide, IGZO, or the like. The inorganic film preferably has high resistance, specifically, preferably has higher resistance than the common electrode 115. The inorganic film may further contain nitrogen.

[0500] When light emitted from the light-emitting element is extracted through the protective layer 131, it is preferable that the protective layer 131 has high transparency to visible light. For example, ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that have high transparency to visible light.

[0501] For example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used as the protective layer 131. By using such a stacked structure, impurities (water, oxygen, etc.) can be prevented from entering the EL layer side.

[0502] Furthermore, the protective layer 131 may have an organic film. For example, the protective layer 131 may have both an organic film and an inorganic film. Examples of organic films that can be used for the protective layer 131 include the organic insulating films that can be used for the insulating layer 235.

[0503] A connection portion 197 is provided in a region of the substrate 151 where the substrate 152 does not overlap. In the connection portion 197, the conductive layer 165 is electrically connected to the FPC 172 via the conductive layer 166 and the connection layer 242. The conductive layer 165 has a single-layer structure obtained by processing the same conductive film as the conductive layer 112b. The conductive layer 166 has a single-layer structure obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B. The conductive layer 166 is exposed on the top surface of the connection portion 197. This allows the connection portion 197 and the FPC 172 to be electrically connected via the connection layer 242.

[0504] The display device 50A is a top-emission type. Light emitted by the light-emitting elements is emitted toward the substrate 152. The substrate 152 is preferably made of a material that is highly transparent to visible light. The pixel electrodes 111R, 111G, and 111B contain a material that reflects visible light, and the counter electrode (common electrode 115) contains a material that transmits visible light.

[0505] It is preferable to provide a light-shielding layer 117 on the surface of the substrate 152 facing the substrate 151. The light-shielding layer 117 can be provided between adjacent light-emitting elements, in the connection section 140, in the circuit section 164, and the like.

[0506] A colored layer such as a color filter may be provided on the surface of the substrate 152 on the substrate 151 side or on the protective layer 131. When a color filter is provided over the light-emitting element, the color purity of light emitted from the pixel can be increased.

[0507] The colored layer is a colored layer that selectively transmits light in a specific wavelength range and absorbs light in other wavelength ranges. For example, a red (R) color filter that transmits light in the red wavelength range, a green (G) color filter that transmits light in the green wavelength range, and a blue (B) color filter that transmits light in the blue wavelength range can be used. Each colored layer can be made of one or more of a metal material, a resin material, a pigment, and a dye. The colored layers are formed at desired positions by a printing method, an inkjet method, an etching method using photolithography, or the like.

[0508] Various optical members can be arranged on the outside of the substrate 152 (the surface opposite to the substrate 151). Examples of optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light-collecting film. In addition, a surface protection layer such as an anti-static film that suppresses the adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches during use, or an impact absorbing layer may be arranged on the outside of the substrate 152. For example, a glass layer or a silica layer (SiO ｘ The surface protection layer can be preferably formed of a material such as DLC (diamond-like carbon), aluminum oxide (AlO ｘ ), polyester-based materials, or polycarbonate-based materials may also be used. Note that it is preferable to use a material with high transmittance to visible light for the surface protection layer. It is also preferable to use a material with high hardness for the surface protection layer.

[0509] The substrate 151 and the substrate 152 can each be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like. A material that transmits light is used for the substrate on the side from which light from the light-emitting element is extracted. When a flexible material is used for the substrate 151 and the substrate 152, the flexibility of the display device can be increased, and a flexible display can be realized. Furthermore, a polarizing plate may be used for at least one of the substrates 151 and 152.

[0510] Substrate 151 and substrate 152 can be made of polyester resin such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. At least one of substrate 151 and substrate 152 can be made of glass having a thickness sufficient to provide flexibility.

[0511] When a circularly polarizing plate is superimposed on a display device, it is preferable that the display device has a substrate with high optical isotropy. A substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small). Examples of films with high optical isotropy include triacetyl cellulose (TAC, also called cellulose triacetate) films, cycloolefin polymer (COP) films, cycloolefin copolymer (COC) films, and acrylic films.

[0512] The adhesive layer 142 can be made of various curable adhesives, such as a photo-curable adhesive (e.g., an ultraviolet curable adhesive), a reactive curable adhesive, a thermosetting adhesive, or an anaerobic adhesive. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, a material with low moisture permeability, such as epoxy resin, is preferable. Alternatively, a two-component resin may be used. Alternatively, an adhesive sheet or the like may be used.

[0513] The connection layer 242 may be an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like.

[0514] [Display Device 50B] Figure 31B shows an example of a cross section of the display unit 162 of the display device 50B. The display device 50B differs from the display device 50A mainly in that each subpixel of each color uses a light-emitting element having a common EL layer 113 and a colored layer (such as a color filter). The configuration shown in Figure 31B can be combined with the region including the FPC 172, the circuit portion 164, the stacked structure from the substrate 151 to the insulating layer 235 of the display unit 162, the connection portion 140, and the end portion configuration shown in Figure 31A. Note that in the following description of the display device, descriptions of parts similar to those of the display device described above may be omitted.

[0515] A display device 50B shown in FIG. 31B includes light-emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.

[0516] The light emitting element 130R has a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113. The light emitted from the light emitting element 130R is extracted as red light to the outside of the display device 50B via the colored layer 132R.

[0517] The light emitting element 130G has a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113. Light emitted from the light emitting element 130G is extracted as green light to the outside of the display device 50B via the colored layer 132G.

[0518] The light emitting element 130B has a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113. Light emitted from the light emitting element 130B is extracted as blue light to the outside of the display device 50B via the colored layer 132B.

[0519] The light-emitting elements 130R, 130G, and 130B each share the EL layer 113 and the common electrode 115. The configuration in which the subpixels of each color are provided with a common EL layer 113 can reduce the number of manufacturing steps compared to the configuration in which the subpixels of each color are provided with different EL layers.

[0520] For example, the light emitting elements 130R, 130G, and 130B shown in Fig. 31B emit white light. The white light emitted from the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0521] A light-emitting element that emits white light preferably includes two or more light-emitting layers. When two light-emitting layers are used to obtain white light emission, light-emitting layers may be selected such that the emission colors of the two light-emitting layers have a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer have a complementary color relationship, a configuration in which the light-emitting element as a whole emits white light can be obtained. Furthermore, when three or more light-emitting layers are used to obtain white light emission, the emission colors of the three or more light-emitting layers may be combined to form a configuration in which the light-emitting element as a whole emits white light.

[0522] The EL layer 113 preferably includes, for example, a light-emitting layer having a light-emitting substance that emits blue light and a light-emitting layer having a light-emitting substance that emits visible light with a wavelength longer than blue. The EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0523] A tandem structure is preferably used for the light-emitting element emitting white light. Specifically, a two-stage tandem structure having a light-emitting unit that emits yellow light and a light-emitting unit that emits blue light, a two-stage tandem structure having a light-emitting unit that emits red and green light and a light-emitting unit that emits blue light, a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and a light-emitting unit that emits blue light, in this order, or a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and red light, and a light-emitting unit that emits blue light, in this order, or the like can be applied. For example, the number of stacked light-emitting units and the order of colors can be, from the anode side, a two-layer structure of B and Y, a two-layer structure of B and light-emitting unit X, a three-layer structure of B, Y, and B, and the number of stacked light-emitting layers in light-emitting unit X and the order of colors can be, from the anode side, a two-layer structure of R and Y, a two-layer structure of R and G, a two-layer structure of G and R, a three-layer structure of G, R, and G, or a three-layer structure of R, G, and R. Furthermore, another layer can be provided between the two light-emitting layers.

[0524] By applying a microcavity structure, a light-emitting element configured to emit white light may emit light of a specific wavelength, such as red, green, or blue, intensified.

[0525] Alternatively, for example, the light-emitting elements 130R, 130G, and 130B shown in FIG. 31B emit blue light. In this case, the EL layer 113 includes one or more light-emitting layers that emit blue light. In the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. Furthermore, in the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, a color conversion layer can be provided between the light-emitting element 130R or light-emitting element 130G and the substrate 152 to convert the blue light emitted by the light-emitting element 130R or light-emitting element 130G into light with a longer wavelength, thereby extracting red or green light. Furthermore, it is preferable to provide a coloring layer 132R between the color conversion layer and the substrate 152 on the light-emitting element 130R, and a coloring layer 132G between the color conversion layer and the substrate 152 on the light-emitting element 130G. A portion of the light emitted by the light-emitting element may be transmitted directly without being converted by the color conversion layer. By extracting the light transmitted through the color conversion layer via the colored layer, light other than the desired color can be absorbed by the colored layer, thereby increasing the color purity of the light emitted by the sub-pixel.

[0526] [Display Device 50C] A display device 50C shown in FIG. 32 differs from the display device 50B mainly in that it is a bottom-emission display device.

[0527] Light emitted from the light-emitting element is emitted toward the substrate 151. A material that is highly transparent to visible light is preferably used for the substrate 151. On the other hand, the light-transmitting property of a material used for the substrate 152 does not matter.

[0528] It is preferable to form a light-shielding layer 117 between the substrate 151 and the transistor. Fig. 32 shows an example in which the light-shielding layer 117 is provided over the substrate 151, the insulating layer 153 is provided over the light-shielding layer 117, and the transistors 205D, 205R (not shown), 205G, and 205B are provided over the insulating layer 153. In addition, the coloring layers 132R, 132G, and 132B are provided over the insulating layer 218, and the insulating layer 235 is provided over the coloring layers 132R, 132G, and 132B.

[0529] The light emitting element 130R overlapping the colored layer 132R includes a pixel electrode 111R, an EL layer 113, and a common electrode 115.

[0530] The light emitting element 130G overlapping the colored layer 132G includes a pixel electrode 111G, an EL layer 113, and a common electrode 115.

[0531] The light emitting element 130B overlapping the colored layer 132B has a pixel electrode 111B, an EL layer 113 and a common electrode 115.

[0532] The pixel electrodes 111R, 111G, and 111B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom-emission display device, a low-resistance metal or the like can be used for the common electrode 115, which can suppress voltage drops caused by the resistance of the common electrode 115 and achieve high display quality.

[0533] The transistor of one embodiment of the present invention can be miniaturized and its occupation area can be reduced; therefore, in a bottom-emission display device, the aperture ratio of a pixel can be increased or the pixel size can be reduced.

[0534] [Display Device 50D] A display device 50D shown in FIG. 33A differs from the display device 50A mainly in that it has a light receiving element 130S.

[0535] The display device 50D has a light-emitting element and a light-receiving element in each pixel. In the display device 50D, it is preferable to use an organic EL element as the light-emitting element and an organic photodiode as the light-receiving element. The organic EL element and the organic photodiode can be formed on the same substrate. Therefore, an organic photodiode can be built into a display device using an organic EL element.

[0536] In the display device 50D, in which pixels have a light-emitting element and a light-receiving element, the pixels have a light-receiving function, so that it is possible to detect contact or proximity of an object while displaying an image. Therefore, the display unit 162 has one or both of an imaging function and a sensing function in addition to an image display function. For example, in addition to displaying an image using all of the sub-pixels of the display device 50D, it is also possible for some sub-pixels to emit light as a light source, other sub-pixels to perform light detection, and the remaining sub-pixels to display an image.

[0537] Therefore, there is no need to provide a light receiving unit and a light source separately from the display device 50D, and the number of components in the electronic device can be reduced. For example, there is no need to provide a separate biometric authentication device or a capacitive touch panel for scrolling, etc. Therefore, by using the display device 50D, it is possible to provide an electronic device with reduced manufacturing costs.

[0538] When a light receiving element is used as an image sensor, the display device 50D can capture an image using the light receiving element. For example, the image sensor can capture an image for personal authentication using a fingerprint, palm print, iris, pulse shape (including vein shape and artery shape), face, or the like.

[0539] The light receiving element can be used as a touch sensor (also called a direct touch sensor) or a non-contact sensor (also called a hover sensor, hover touch sensor, or touchless sensor). A touch sensor can detect an object (such as a finger, hand, or pen) when the object comes into direct contact with the display device. A non-contact sensor can detect an object without the object touching the display device.

[0540] The light receiving element 130S has a pixel electrode 111S on an insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S. Light Lin is incident on the functional layer 113S from outside the display device 50D.

[0541] The pixel electrode 111S is electrically connected to the conductive layer 112b of the transistor 205S through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.

[0542] The end of the pixel electrode 111S is covered with an insulating layer 237.

[0543] The common electrode 115 is a continuous film provided in common to the light receiving element 130S, the light emitting element 130R (not shown), the light emitting element 130G, and the light emitting element 130B. The common electrode 115 shared by the light emitting element and the light receiving element is electrically connected to the conductive layer 123 provided in the connection portion 140.

[0544] The functional layer 113S has at least an active layer (also referred to as a photoelectric conversion layer). The active layer includes a semiconductor. Examples of the semiconductor include inorganic semiconductors such as silicon and organic semiconductors including organic compounds. In this embodiment, an example in which an organic semiconductor is used as the semiconductor included in the active layer is shown. Using an organic semiconductor is preferable because the light-emitting layer and the active layer can be formed by the same method (for example, vacuum deposition), allowing the use of a common manufacturing device.

[0545] The functional layer 113S may further include a layer containing a substance with high hole transporting properties, a substance with high electron transporting properties, a bipolar substance, or the like, as a layer other than the active layer. Furthermore, without being limited to the above, the functional layer 113S may further include a layer containing a substance with high hole injection properties, a hole blocking material, a substance with high electron injection properties, an electron blocking material, or the like. For example, the materials that can be used for the light-emitting element described above can be used for the functional layer 113S.

[0546] The light-receiving element can be made of either a low-molecular-weight compound or a high-molecular-weight compound, and may contain an inorganic compound. The layers constituting the light-receiving element can be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet printing, or coating.

[0547] A display device 50D shown in FIGS. 33B and 33C has, between a substrate 151 and a substrate 152, a layer 353 having a light receiving element, a circuit layer 355, and a layer 357 having a light emitting element.

[0548] The layer 353 includes, for example, the light receiving element 130S. The layer 357 includes, for example, the light emitting elements 130R, 130G, and 130B.

[0549] The circuit layer 355 includes a circuit for driving the light receiving element and a circuit for driving the light emitting element. The circuit layer 355 includes, for example, transistors 205R, 205G, and 205B. In addition, the circuit layer 355 may include one or more of a switch, a capacitor, a resistor, a wiring, a terminal, and the like.

[0550] 33B shows an example in which the light receiving element 130S is used as a touch sensor. As shown in FIG. 33B, light emitted by the light emitting element in layer 357 is reflected by a finger 352 that touches the display device 50D, and the light receiving element in layer 353 detects the reflected light. This makes it possible to detect that the finger 352 has touched the display device 50D.

[0551] 33C shows an example in which the light receiving element 130S is used as a non-contact sensor. As shown in FIG. 33C, light emitted by a light emitting element in a layer 357 is reflected by a finger 352 that is close to (i.e., not in contact with) the display device 50D, and the light receiving element in a layer 353 detects the reflected light.

[0552] 34A is an example of a display device employing an MML (metal maskless) structure. That is, the display device 50E has light-emitting elements fabricated without using a fine metal mask. The stacked structures from the substrate 151 to the insulating layer 235 and from the protective layer 131 to the substrate 152 are similar to those of the display device 50A, and therefore will not be described here.

[0553] In FIG. 34A, light emitting elements 130 R, 130 G, and 130 B are provided on an insulating layer 235 .

[0554] The light-emitting element 130R includes a conductive layer 124R on the insulating layer 235, a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114. The light-emitting element 130R shown in FIG. 34A emits red light (R). The layer 133R includes a light-emitting layer that emits red light. In the light-emitting element 130R, the layer 133R and the common layer 114 can be collectively referred to as an EL layer. One or both of the conductive layer 124R and the conductive layer 126R can be referred to as a pixel electrode.

[0555] The light-emitting element 130G includes a conductive layer 124G on the insulating layer 235, a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114. The light-emitting element 130G shown in FIG. 34A emits green light (G). The layer 133G includes a light-emitting layer that emits green light. In the light-emitting element 130G, the layer 133G and the common layer 114 can be collectively referred to as an EL layer. Furthermore, one or both of the conductive layer 124G and the conductive layer 126G can be referred to as a pixel electrode.

[0556] The light-emitting element 130B has a conductive layer 124B on the insulating layer 235, a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114. The light-emitting element 130B shown in FIG. 34A emits blue light (B). The layer 133B has a light-emitting layer that emits blue light. In the light-emitting element 130B, the layer 133B and the common layer 114 can be collectively referred to as an EL layer. Furthermore, one or both of the conductive layer 124B and the conductive layer 126B can be referred to as a pixel electrode.

[0557] In this specification and the like, among the EL layers included in the light-emitting elements, layers provided in an island shape for each light-emitting element are referred to as layers 133B, 133G, or 133R, and a layer shared by a plurality of light-emitting elements is referred to as a common layer 114. Note that in this specification and the like, the layers 133R, 133G, and 133B may be referred to as island-shaped EL layers, EL layers formed in an island shape, or the like, without including the common layer 114.

[0558] The layers 133R, 133G, and 133B are spaced apart from one another. By providing an island-shaped EL layer for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This makes it possible to prevent unintended light emission due to crosstalk, and realize a display device with extremely high contrast.

[0559] 34A, the layers 133R, 133G, and 133B are all shown to have the same thickness, but this is not limitative and the layers 133R, 133G, and 133B may have different thicknesses.

[0560] The conductive layer 124R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235. Similarly, the conductive layer 124G is electrically connected to the conductive layer 112b of the transistor 205G, and the conductive layer 124B is electrically connected to the conductive layer 112b of the transistor 205B.

[0561] The conductive layers 124R, 124G, and 124B are formed so as to cover the openings provided in the insulating layer 235. A layer 128 is buried in the recesses of the conductive layers 124R, 124G, and 124B, respectively.

[0562] The layer 128 has a function of planarizing the recesses of the conductive layers 124R, 124G, and 124B. Conductive layers 126R, 126G, and 126B, which are electrically connected to the conductive layers 124R, 124G, and 124B, are provided on the conductive layers 124R, 124G, and 124B and the layer 128. Therefore, the regions overlapping with the recesses of the conductive layers 124R, 124G, and 124B can also be used as light-emitting regions, thereby increasing the aperture ratio of the pixel. It is preferable to use a conductive layer that functions as a reflective electrode for the conductive layers 124R and 126R.

[0563] The layer 128 may be an insulating layer or a conductive layer. Various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate for the layer 128. In particular, the layer 128 is preferably formed using an insulating material, and more preferably using an organic insulating material. For example, the organic insulating material that can be used for the insulating layer 237 described above can be used for the layer 128.

[0564] 34A shows an example in which the top surface of layer 128 has a flat portion, but there are no particular limitations on the shape of layer 128. The top surface of layer 128 can have at least one of a convex curved surface, a concave curved surface, and a flat surface.

[0565] The height of the upper surface of layer 128 and the height of the upper surface of conductive layer 124R may be the same or approximately the same, or may be different from each other. For example, the height of the upper surface of layer 128 may be lower or higher than the height of the upper surface of conductive layer 124R.

[0566] The end of the conductive layer 126R may be flush with the end of the conductive layer 124R, or may cover the side surface of the end of the conductive layer 124R. The end of each of the conductive layers 124R and 126R preferably has a tapered shape. Specifically, the end of each of the conductive layers 124R and 126R preferably has a tapered shape with a taper angle greater than 0 degrees and less than 90 degrees. When the end of the pixel electrode has a tapered shape, the layer 133R provided along the side surface of the pixel electrode has an inclined portion. By tapering the side surface of the pixel electrode, the coverage of the EL layer provided along the side surface of the pixel electrode can be improved.

[0567] The conductive layers 124G, 126G and the conductive layers 124B, 126B are similar to the conductive layers 124R, 126R, and therefore detailed description thereof will be omitted.

[0568] The upper surface and side surfaces of the conductive layer 126R are covered with the layer 133R. Similarly, the upper surface and side surfaces of the conductive layer 126G are covered with the layer 133G, and the upper surface and side surfaces of the conductive layer 126B are covered with the layer 133B. Therefore, the entire region where the conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting region of the light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.

[0569] Part of the top surface and side surfaces of each of the layers 133R, 133G, and 133B are covered with insulating layers 125 and 127. A common layer 114 is provided on the layers 133R, 133G, 133B, and insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. The common layer 114 and the common electrode 115 are each a continuous film provided in common to a plurality of light-emitting elements.

[0570] In Figure 34A, the insulating layer 237 shown in Figure 31A and other figures is not provided between the conductive layer 126R and the layer 133R. That is, the display device 50E does not have an insulating layer (also called a partition, bank, spacer, etc.) that is in contact with the pixel electrode and covers the upper edge of the pixel electrode. This allows the distance between adjacent light-emitting elements to be extremely narrow. This allows for a high-definition or high-resolution display device. Furthermore, a mask for forming the insulating layer is not required, thereby reducing the manufacturing cost of the display device.

[0571] As described above, the layers 133R, 133G, and 133B each have a light-emitting layer. The layers 133R, 133G, and 133B each preferably have a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. Alternatively, the layers 133R, 133G, and 133B each preferably have a light-emitting layer and a carrier block layer (hole block layer or electron block layer) on the light-emitting layer. Alternatively, the layers 133R, 133G, and 133B each preferably have a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. Because the surfaces of the layers 133R, 133G, and 133B are exposed during the manufacturing process of the display device, providing one or both of a carrier transport layer and a carrier block layer on the light-emitting layer can prevent the light-emitting layer from being exposed to the outermost surface and reduce damage to the light-emitting layer. This can improve the reliability of the light-emitting element.

[0572] The common layer 114 includes, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The common layer 114 is shared by the light-emitting elements 130R, 130G, and 130B.

[0573] The side surfaces of the layers 133R, 133G, and 133B are covered with the insulating layer 125. The insulating layer 127 covers the side surfaces of the layers 133R, 133G, and 133B with the insulating layer 125 interposed therebetween.

[0574] The side surfaces (and even part of the upper surfaces) of the layers 133R, 133G, and 133B are covered with at least one of the insulating layer 125 and the insulating layer 127, which prevents the common layer 114 (or the common electrode 115) from coming into contact with the pixel electrodes and the side surfaces of the layers 133R, 133G, and 133B, thereby preventing short circuits in the light-emitting elements, thereby improving the reliability of the light-emitting elements.

[0575] The insulating layer 125 is preferably in contact with each side surface of the layer 133R, the layer 133G, and the layer 133B. By configuring the insulating layer 125 to be in contact with the layer 133R, the layer 133G, and the layer 133B, peeling of the layer 133R, the layer 133G, and the layer 133B can be prevented, and the reliability of the light-emitting element can be improved.

[0576] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recesses in the insulating layer 125. The insulating layer 127 preferably covers at least a part of the side surface of the insulating layer 125.

[0577] By providing the insulating layers 125 and 127, the gaps between adjacent island-shaped layers can be filled, which reduces large unevenness in height on the surface on which layers (e.g., a carrier injection layer, a common electrode, etc.) are formed on the island-shaped layers, thereby making the surface flatter, thereby improving the coverage of the carrier injection layer, the common electrode, etc.

[0578] The common layer 114 and the common electrode 115 are provided over the layer 133R, the layer 133G, the layer 133B, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are provided, a step is generated between a region where the pixel electrode and the island-shaped EL layer are provided and a region where the pixel electrode and the island-shaped EL layer are not provided (a region between light-emitting elements). In the display device of one embodiment of the present invention, the insulating layer 125 and the insulating layer 127 can flatten the step, thereby improving the coverage of the common layer 114 and the common electrode 115. Therefore, poor connection due to disconnection can be suppressed. Furthermore, the step can suppress an increase in electrical resistance due to a local thinning of the common electrode 115.

[0579] The upper surface of the insulating layer 127 preferably has a shape with high flatness. The upper surface of the insulating layer 127 may have at least one of a flat surface, a convex curved surface, and a concave curved surface. For example, the upper surface of the insulating layer 127 preferably has a convex curved surface shape with a large radius of curvature.

[0580] The insulating layer 125 can be an insulating layer containing an inorganic material. For example, an inorganic insulating film such as an insulating oxide film, a nitride insulating film, an oxynitride insulating film, or a nitride oxide insulating film can be used for the insulating layer 125. Specific examples of these inorganic insulating films are as described above. The insulating layer 125 may have a single-layer structure or a stacked-layer structure. Aluminum oxide is particularly preferable because it has a high etching selectivity with respect to the EL layer and protects the EL layer in the formation of the insulating layer 127 described later. By using an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by an ALD method as the insulating layer 125, the insulating layer 125 can be formed with fewer pinholes and excellent protection of the EL layer. The insulating layer 125 may also have a stacked-layer structure of a film formed by an ALD method and a film formed by a sputtering method. For example, the insulating layer 125 may have a stacked-layer structure of an aluminum oxide film formed by an ALD method and a silicon nitride film formed by a sputtering method.

[0581] The insulating layer 125 preferably functions as a barrier insulating layer against at least one of water and oxygen. The insulating layer 125 preferably has a function of suppressing diffusion of at least one of water and oxygen. The insulating layer 125 preferably has a function of capturing or fixing (also referred to as gettering) at least one of water and oxygen.

[0582] The insulating layer 125 has a function as a barrier insulating layer, which can suppress the entry of impurities (typically, at least one of water and oxygen) that may diffuse into each light-emitting element from the outside. With this structure, a highly reliable light-emitting element and a highly reliable display device can be provided.

[0583] The insulating layer 125 preferably has a low impurity concentration. This can prevent impurities from entering the EL layer from the insulating layer 125 and causing deterioration of the EL layer. Furthermore, by reducing the impurity concentration in the insulating layer 125, the barrier properties against at least one of water and oxygen can be improved. For example, it is desirable that the insulating layer 125 has a sufficiently low hydrogen concentration or a sufficiently low carbon concentration, or preferably both of them.

[0584] The insulating layer 127 provided on the insulating layer 125 has a function of flattening large unevenness of the insulating layer 125 formed between adjacent light-emitting elements. In other words, the insulating layer 127 has the effect of improving the flatness of the surface on which the common electrode 115 is formed.

[0585] An insulating layer containing an organic material can be suitably used as the insulating layer 127. A photosensitive organic resin is preferably used as the organic material, and for example, a photosensitive resin composition containing an acrylic resin is preferably used. Note that in this specification and the like, the term "acrylic resin" does not refer only to polymethacrylic acid ester or methacrylic resin, but may refer to all acrylic polymers in a broad sense.

[0586] The insulating layer 127 may be made of an acrylic resin, a polyimide resin, an epoxy resin, an imide resin, a polyamide resin, a polyimideamide resin, a silicone resin, a siloxane resin, a benzocyclobutene-based resin, a phenolic resin, or a precursor of any of these resins. Alternatively, the insulating layer 127 may be made of an organic material such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or an alcohol-soluble polyamide resin. Alternatively, a photoresist may be used as the photosensitive resin. Either a positive-type material or a negative-type material may be used as the photosensitive organic resin.

[0587] The insulating layer 127 may be made of a material that absorbs visible light. The insulating layer 127 absorbs light emitted from the light-emitting element, thereby suppressing leakage of light from the light-emitting element to an adjacent light-emitting element through the insulating layer 127 (stray light). This can improve the display quality of the display device. Furthermore, since the display quality can be improved without using a polarizing plate in the display device, the display device can be made lighter and thinner.

[0588] Examples of materials that absorb visible light include materials containing pigments such as black, materials containing dyes, light-absorbing resin materials (e.g., polyimide), and resin materials that can be used for color filters (color filter materials). In particular, using a resin material in which two or more color filter materials are laminated or mixed is preferable because it can enhance the visible light blocking effect. In particular, mixing three or more color filter materials makes it possible to form a black or nearly black resin layer.

[0589] [Display Device 50F] Figure 34B shows an example cross section of the display unit 162 of the display device 50F. The display device 50F differs from the display device 50E mainly in that a colored layer (such as a color filter) is used in each subpixel of each color. The configuration shown in Figure 34B can be combined with the region including the FPC 172, the circuit unit 164, the stacked structure from the substrate 151 to the insulating layer 235 of the display unit 162, the connection unit 140, and the configuration of the end portion shown in Figure 34A.

[0590] A display device 50F shown in FIG. 34B includes light-emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.

[0591] The light emitted from the light emitting element 130R is extracted as red light to the outside of the display device 50F via the colored layer 132R. Similarly, the light emitted from the light emitting element 130G is extracted as green light to the outside of the display device 50F via the colored layer 132G. The light emitted from the light emitting element 130B is extracted as blue light to the outside of the display device 50F via the colored layer 132B.

[0592] Each of the light-emitting elements 130R, 130G, and 130B has a layer 133. These three layers 133 are formed using the same material and in the same process. Furthermore, these three layers 133 are spaced apart from one another. By providing an island-shaped EL layer for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This makes it possible to prevent unintended light emission due to crosstalk, and realize a display device with extremely high contrast.

[0593] 34B emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0594] Alternatively, for example, the light-emitting elements 130R, 130G, and 130B shown in FIG. 34B emit blue light. In this case, the layer 133 includes one or more light-emitting layers that emit blue light. In the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. Furthermore, in the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, a color conversion layer can be provided between the light-emitting element 130R or the light-emitting element 130G and the substrate 152 to convert the blue light emitted by the light-emitting element 130R or the light-emitting element 130G into light with a longer wavelength, thereby allowing red or green light to be extracted. Furthermore, it is preferable to provide a coloring layer 132R between the color conversion layer and the substrate 152 on the light-emitting element 130R, and a coloring layer 132G between the color conversion layer and the substrate 152 on the light-emitting element 130G. By extracting the light transmitted through the color conversion layer via the colored layer, light other than the desired color can be absorbed by the colored layer, thereby increasing the color purity of the light emitted by the sub-pixel.

[0595] [Display Device 50G] A display device 50G shown in FIG. 35 differs from the display device 50F mainly in that it is a bottom-emission display device.

[0596] Light emitted from the light-emitting element is emitted toward the substrate 151. A material that is highly transparent to visible light is preferably used for the substrate 151. On the other hand, the light-transmitting property of a material used for the substrate 152 does not matter.

[0597] It is preferable to form a light-shielding layer 117 between the substrate 151 and the transistor. Fig. 35 shows an example in which the light-shielding layer 117 is provided over the substrate 151, the insulating layer 153 is provided over the light-shielding layer 117, and the transistors 205D, 205R (not shown), 205G, and 205B are provided over the insulating layer 153. In addition, the coloring layers 132R, 132G, and 132B are provided over the insulating layer 218, and the insulating layer 235 is provided over the coloring layers 132R, 132G, and 132B.

[0598] The light emitting element 130R overlapping the colored layer 132R includes a conductive layer 124R, a conductive layer 126R, a layer 133, a common layer 114, and a common electrode 115.

[0599] The light emitting element 130G overlapping the colored layer 132G includes a conductive layer 124G, a conductive layer 126G, a layer 133, a common layer 114, and a common electrode 115.

[0600] The light emitting element 130B overlapping the colored layer 132B has a conductive layer 124B, a conductive layer 126B, a layer 133, a common layer 114, and a common electrode 115.

[0601] The conductive layers 124R, 124G, 124B, 126R, 126G, and 126B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom-emission display device, a low-resistance metal or the like can be used for the common electrode 115, which can suppress voltage drops caused by the resistance of the common electrode 115 and achieve high display quality.

[0602] The transistor of one embodiment of the present invention can be miniaturized and its occupation area can be reduced; therefore, in a bottom-emission display device, the aperture ratio of a pixel can be increased or the pixel size can be reduced.

[0603] [Display Device 50H] A display device 50H shown in FIG. 36 is a VA mode liquid crystal display device.

[0604] Substrate 151 and substrate 152 are bonded together by adhesive layer 144. Liquid crystal 262 is sealed in the area surrounded by substrate 151, substrate 152, and adhesive layer 144. Polarizing plate 260a is located on the outer surface of substrate 152, and polarizing plate 260b is located on the outer surface of substrate 151. Although not shown, a backlight can be provided outside polarizing plate 260a or polarizing plate 260b.

[0605] Transistors 205D, 205R, and 205G, a connection portion 197, a spacer 224, and the like are provided on the substrate 151. The transistor 205D is provided in the circuit portion 164, and the transistors 205R and 205G are provided in the display portion 162. The conductive layers 112b of the transistors 205R and 205G function as pixel electrodes of the liquid crystal element 60.

[0606] The substrate 152 is provided with colored layers 132R and 132G, a light-shielding layer 117, an insulating layer 225, a conductive layer 263, etc. The conductive layer 263 functions as a common electrode for the liquid crystal element 60.

[0607] The transistors 205D, 205R, and 205G each include a conductive layer 112a, a semiconductor layer 108, an insulating layer 106, a conductive layer 104, and a conductive layer 112b. The conductive layer 112a functions as one of a source electrode and a drain electrode, and the conductive layer 112b functions as the other of the source electrode and the drain electrode. The conductive layer 104 functions as a gate electrode. A part of the insulating layer 106 functions as a gate insulating layer.

[0608] As described above, in this embodiment, OS transistors are used as the transistors 205D, 205R, and 205G. The transistors 205D, 205R, and 205G can be transistors of one embodiment of the present invention. That is, the display device 50H includes transistors of one embodiment of the present invention in both the display portion 162 and the circuit portion 164. By using the transistor of one embodiment of the present invention in the display portion 162, the pixel size can be reduced, leading to higher resolution. Furthermore, by using the transistor of one embodiment of the present invention in the circuit portion 164, the area occupied by the circuit portion 164 can be reduced, leading to a narrower frame. The description of the previous embodiment can be referred to for the transistor of one embodiment of the present invention.

[0609] The transistors 205D, 205R, and 205G are covered with an insulating layer 218. The insulating layer 218 functions as a protective layer for the transistors 205D, 205R, and 205G.

[0610] Each subpixel included in the display unit 162 includes a transistor, a liquid crystal element 60, and a colored layer. For example, a subpixel that emits red light includes a transistor 205R, a liquid crystal element 60, and a colored layer 132R that transmits red light. A subpixel that emits green light includes a transistor 205G, a liquid crystal element 60, and a colored layer 132G that transmits green light. Although not shown, a subpixel that emits blue light similarly includes a transistor, a liquid crystal element 60, and a colored layer that transmits blue light.

[0611] The liquid crystal element 60 includes a conductive layer 112b, a conductive layer 263, and a liquid crystal 262 sandwiched between them.

[0612] A conductive layer 264 is provided on the substrate 151 and is located on the same plane as the conductive layer 112a. The conductive layer 264 has a portion that overlaps with the conductive layer 112b via the insulating layer 110 (insulating layer 110a, insulating layer 110b, and insulating layer 110c). A storage capacitor is formed by the conductive layer 112b, the conductive layer 264, and the insulating layer 110 therebetween. Note that it is sufficient that there be one or more insulating layers between the conductive layer 112b and the conductive layer 264, and one or two of the insulating layers 110 may be removed by etching.

[0613] On the substrate 152 side, an insulating layer 225 is provided to cover the colored layers 132R and 132G and the light-shielding layer 117. The insulating layer 225 may also function as a planarizing film. The insulating layer 225 can make the surface of the conductive layer 263 approximately flat, thereby making the alignment state of the liquid crystal 262 uniform.

[0614] In addition, an alignment film for controlling the alignment of the liquid crystal 262 may be provided on the surfaces of the conductive layer 263, the insulating layer 218, etc. that come into contact with the liquid crystal 262 (see the alignment film 265 in Figures 38A and 38B).

[0615] The conductive layer 112b and the conductive layer 263 transmit visible light. That is, a transmissive liquid crystal device can be formed. For example, if a backlight is disposed on the substrate 152 side, light from the backlight polarized by the polarizing plate 260a passes through the substrate 152, the conductive layer 263, the liquid crystal 262, the conductive layer 112b, and the substrate 151, and reaches the polarizing plate 260b. At this time, the orientation of the liquid crystal 262 can be controlled by applying a voltage between the conductive layer 112b and the conductive layer 263, thereby controlling the optical modulation of light. That is, the intensity of light emitted via the polarizing plate 260b can be controlled. Furthermore, light outside a specific wavelength range of the incident light is absorbed by the colored layer, so that the extracted light exhibits, for example, red light.

[0616] Here, a linear polarizer may be used as the polarizer 260b, but a circular polarizer can also be used. For example, a linear polarizer and a quarter-wave retardation plate stacked together can be used as the circular polarizer. By using a circular polarizer as the polarizer 260b, it is possible to suppress reflection of external light.

[0617] When a circular polarizer is used as polarizer 260b, a circular polarizer or a normal linear polarizer may also be used as polarizer 260a. The desired contrast can be achieved by adjusting the cell gap, orientation, drive voltage, etc. of the liquid crystal element used in liquid crystal element 60 depending on the type of polarizer used for polarizers 260a and 260b.

[0618] The conductive layer 263 is electrically connected to a conductive layer 166b provided on the substrate 151 side by a connector 223 in the connection portion 140. The conductive layer 166b is connected to the conductive layer 165b through an opening provided in the insulating layer 110. This allows a potential or a signal to be supplied to the conductive layer 263 from an FPC or an IC arranged on the substrate 151 side. The configuration shown in Figure 36 shows an example in which the conductive layer 165b is formed using the same material and to the same extent as the conductive layer 112a, and the conductive layer 166b is formed using the same material and in the same process as the conductive layer 112b.

[0619] The connectors 223 can be, for example, conductive particles. Examples of conductive particles include particles of organic resin or silica coated with a metal material. Nickel or gold is preferable as the metal material because it reduces contact resistance. It is also preferable to use particles coated with two or more layers of metal materials, such as nickel coated with gold. It is also preferable to use a material that undergoes elastic or plastic deformation as the connectors 223. In this case, the conductive particles may be crushed vertically, as shown in FIG. 36 . This increases the contact area between the connectors 223 and the conductive layer electrically connected to them, thereby reducing contact resistance and preventing problems such as poor connection. The connectors 223 are preferably arranged so that they are covered by the adhesive layer 144. For example, it is preferable to disperse the connectors 223 in the adhesive layer 144 before curing.

[0620] A connection portion 197 is provided in a region near the end of the substrate 151. In the connection portion 197, the conductive layer 166a is electrically connected to the FPC 172 via a connection layer 242. The conductive layer 166a is connected to the conductive layer 165a via an opening provided in the insulating layer 110. In the structure shown in FIG. 36, the conductive layer 165a is formed using the same material and in the same process as the conductive ...

Claims

1. A semiconductor layer having a channel-forming region of a transistor; a first conductive layer having the function of either the source electrode or the drain electrode of the transistor; a second conductive layer having the function of the other source electrode or the drain electrode of the transistor; a first insulating layer; a second insulating layer; a third insulating layer; The first insulating layer has a region located on the first conductive layer, The second insulating layer has a region located on the first insulating layer, The third insulating layer has a region located on the second insulating layer, The second conductive layer has a region located on the third insulating layer, The first insulating layer, the second insulating layer, the third insulating layer, and the second conductive layer each have an opening that reaches the first conductive layer. The semiconductor layer comprises a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. The first semiconductor layer has a region located within the opening, and includes a region in contact with the upper surface of the first conductive layer, a region in contact with the side surface of the second insulating layer, a region in contact with the upper surface of the second conductive layer, and a region in contact with the side surface of the second conductive layer. The second semiconductor layer has a region located within the opening and a region in contact with the first semiconductor layer. The third semiconductor layer has a region located within the opening and a region facing the first semiconductor layer via the second semiconductor layer. The first semiconductor layer comprises the first material, The second semiconductor layer comprises the second material, The aforementioned third semiconductor layer has a third material, The band gap of the first material is larger than the band gap of the second material. The band gap of the third material is larger than the band gap of the second material. The second insulating layer contains oxygen, The first insulating layer and the third insulating layer each contain nitrogen in a semiconductor device.

2. In claim 1, A semiconductor device wherein the first material is the same as the third material.

3. A semiconductor layer having a channel-forming region of a transistor; a first conductive layer having the function of either the source electrode or the drain electrode of the transistor; a second conductive layer having the function of either the source electrode or the drain electrode of the transistor; a first insulating layer; a second insulating layer; a third insulating layer; The first insulating layer has a region located on the first conductive layer, The second insulating layer has a region located on the first insulating layer, The third insulating layer has a region located on the second insulating layer, The second conductive layer has a region located on the third insulating layer, The first insulating layer, the second insulating layer, the third insulating layer, and the second conductive layer each have an opening that reaches the first conductive layer. The semiconductor layer comprises a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. The first semiconductor layer has a region located within the opening, and includes a region in contact with the upper surface of the first conductive layer, a region in contact with the side surface of the second insulating layer, a region in contact with the upper surface of the second conductive layer, and a region in contact with the side surface of the second conductive layer. The second semiconductor layer has a region located within the opening and a region in contact with the first semiconductor layer. The third semiconductor layer has a region located within the opening and a region facing the first semiconductor layer via the second semiconductor layer. The first semiconductor layer has a first metal oxide, The second semiconductor layer has a second metal oxide, The third semiconductor layer has a third metal oxide, The band gap of the first metal oxide is larger than the band gap of the second metal oxide. The band gap of the third metal oxide is larger than that of the second metal oxide. The second insulating layer contains oxygen, The first insulating layer and the third insulating layer each contain nitrogen in a semiconductor device.

4. In claim 3, A semiconductor device wherein the composition of the first metal oxide is the same as the composition of the third metal oxide.

5. A semiconductor layer having a channel-forming region of a transistor; a first conductive layer having the function of either the source electrode or the drain electrode of the transistor; a second conductive layer having the function of the other source electrode or the drain electrode of the transistor; a first insulating layer; a second insulating layer; a third insulating layer; The first insulating layer has a region located on the first conductive layer, The second insulating layer has a region located on the first insulating layer, The third insulating layer has a region located on the second insulating layer, The second conductive layer has a region located on the third insulating layer, The first insulating layer, the second insulating layer, the third insulating layer, and the second conductive layer each have an opening that reaches the first conductive layer. The semiconductor layer comprises a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. The first semiconductor layer has a region located within the opening, and includes a region in contact with the upper surface of the first conductive layer, a region in contact with the side surface of the second insulating layer, a region in contact with the upper surface of the second conductive layer, and a region in contact with the side surface of the second conductive layer. The second semiconductor layer has a region located within the opening and a region in contact with the first semiconductor layer. The third semiconductor layer has a region located within the opening and a region facing the first semiconductor layer via the second semiconductor layer. The first semiconductor layer has a first metal oxide, The second semiconductor layer has a second metal oxide, The third semiconductor layer has a third metal oxide, The first metal oxide comprises indium and a first element, The second metal oxide contains indium, The third metal oxide comprises indium and a second element, The first element is one or more of gallium, aluminum, and tin. The second element is one or more of gallium, aluminum, and tin. The content of the first element in the first metal oxide is greater than the sum of the content of gallium, aluminum, and tin in the second metal oxide. The content of the second element in the third metal oxide is greater than the sum of the content of gallium, aluminum, and tin in the second metal oxide. The second insulating layer contains oxygen, The first insulating layer and the third insulating layer each contain nitrogen in a semiconductor device.

6. In claim 5, A semiconductor device wherein the composition of the first metal oxide is the same as the composition of the third metal oxide.

7. In any one of claims 1 to 6, The thickness of the first semiconductor layer is smaller than the thickness of the second semiconductor layer. A semiconductor device in which the thickness of the third semiconductor layer is smaller than the thickness of the second semiconductor layer.

8. In any one of claims 1 to 6, The first conductive layer and the second conductive layer each include an oxide conductor in the semiconductor device.

9. In any one of claims 1 to 6, A fourth insulating layer having a region sandwiched between the upper surface of the first insulating layer and the lower surface of the second insulating layer, It has a fifth insulating layer having a region sandwiched between the upper surface of the second insulating layer and the lower surface of the third insulating layer, The second insulating layer contains oxygen, The first insulating layer, the third insulating layer, the fourth insulating layer, and the fifth insulating layer each contain nitrogen. The first insulating layer has a region with a higher hydrogen content than the fourth insulating layer. The semiconductor device wherein the third insulating layer has a region in which the hydrogen content is higher than that of the fifth insulating layer.

10. In any one of Claims 1 to 6, The thickness of the second insulating layer is greater than the thickness of the first insulating layer. A semiconductor device in which the thickness of the second insulating layer is greater than the thickness of the third insulating layer.

11. In any one of Claims 1 to 6, The first semiconductor layer is a semiconductor device having a region in contact with the upper surface of the third insulating layer.