Signal Detection Circuit
Patent Information
- Application Number
- JP2024564630
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-06-07
- Publication Date
- 2025-05-19
- Estimated Expiration
- 2043-06-07
AI Technical Summary
Conventional signal detection circuits require significant processing and result in large circuit sizes due to the need for both I and Q signals, leading to increased complexity and circuit scale.
The signal detection circuit shifts the input signal frequency to the Nyquist frequency, uses a moving sum calculation of absolute values of the I or Q signal, and employs a threshold determination to detect signals, reducing the need for both I and Q signal processing and minimizing circuit scale.
This approach allows for signal detection with reduced circuit size and complexity by processing only one of the I or Q signals, thereby suppressing circuit scale and reducing delay.
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a signal detection circuit. [Background technology]
[0002] Conventionally, a method has been disclosed for a digital circuit to detect the presence or absence of an input electrical signal, in which frequency shifting and downsampling are performed in accordance with the processing rate, the center frequency of the expected signal band is frequency shifted to the baseband to convert it into I and Q signals, the change in power √(I^2+Q^2) over time is calculated, and the presence or absence of a signal is determined by comparing it with a threshold value (see Patent Document 1). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] US Patent No. 09450598 Summary of the Invention [Problem to be solved by the invention]
[0004] However, the method described in Patent Document 1 requires information on both I and Q signals to calculate the signal power, which necessitates a lot of processing such as multiplication and root calculation, and therefore has the problem that the circuit size of the digital circuit tends to become large.
[0005] The present disclosure is intended to solve the above-mentioned problems, and has an object to provide a signal detection circuit that can prevent the circuit size from becoming larger than before. [Means for solving the problem]
[0006] The signal detection circuit according to the present disclosure is characterized by comprising a frequency shift unit that shifts the frequency of an input signal from an analog-digital converter that converts an analog signal into a digital signal and outputs the input signal so that the center frequency of the band of the input signal becomes the Nyquist frequency, a moving sum calculation unit that calculates the sum over a fixed period of time of the absolute values of the signal output from the frequency shift unit, and a signal detection unit that detects a specific signal included in the input signal using the calculation result by the moving sum calculation unit. Effect of the Invention
[0007] According to the present disclosure, signal detection is possible through processing using only either the I signal or the Q signal, so that it is possible to prevent the circuit scale from becoming larger than in the past. [Brief description of the drawings]
[0008] [Figure 1] 1 is a block diagram showing a configuration of a signal detection circuit according to a first embodiment. [Diagram 2] 4 is a diagram showing a frequency spectrum of a signal output from an A / D converter of the signal detection circuit according to the first embodiment. [Diagram 3] 4 is a diagram showing a frequency spectrum of a signal output from a mixer of the signal detection circuit according to the first embodiment. [Figure 4] 4 is a diagram showing frequency spectra of an I signal and a Q signal output from a downsampling unit of the signal detection circuit according to the first embodiment. [Diagram 5] 4 is a diagram showing a frequency spectrum of an I signal output from a downsampling unit of the signal detection circuit according to the first embodiment. [Figure 6] 4 is a diagram showing a time waveform of a signal output from an absolute value calculation unit of the signal detection circuit according to the first embodiment. [Figure 7] 4 is a diagram showing a time waveform of a signal output from a sum calculation unit of the signal detection circuit according to the first embodiment. [Figure 8] 4 is a diagram showing a time waveform of a signal output from a threshold value determination unit of the signal detection circuit according to the first embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Embodiment 1 First, a schematic configuration of a signal detection circuit according to the first embodiment will be described with reference to Fig. 1. Fig. 1 is a block diagram showing a configuration of a signal detection circuit 10 according to the first embodiment. As shown in Fig. 1, the signal detection circuit 10 according to the first embodiment includes an A / D converter 1, a numerically controlled oscillator 2 for Nyquist shift, a mixer 3, a frequency filter 4, a downsampling unit 5, an absolute value calculation unit 6, a delay holding unit 7, a sum calculation unit 8, and a threshold determination unit 9.
[0010] The A / D converter 1, which serves as an analog-to-digital converter, samples an input analog signal 101 at a specific sampling frequency that is set in advance, thereby converting the signal 101 into a digital signal 102. The A / D converter 1 outputs the signal 102 to a mixer 3.
[0011] The Nyquist shift numerically controlled oscillator 2 serving as a signal generating unit generates a signal 201 which is a local signal for shifting the center frequency of the band of the signal 102 output from the A / D converter 1 to the Nyquist frequency of the signal sampled by the A / D converter 1. The Nyquist shift numerically controlled oscillator 2 outputs the generated signal 201 to the mixer 3.
[0012] The mixer 3 multiplies the signal 102, which is an input signal from the A / D converter 1, by the signal 201 output from the Nyquist shift numerically controlled oscillator 2, thereby shifting the frequency of the signal 102. The mixer 3 outputs a signal 301 whose frequency has been shifted to the frequency filter 4.
[0013] The frequency filter 4 extracts only the signal band of the analog signal 101, which is a specific signal band, from the signal 301 output from the mixer 3. The frequency filter 4 outputs the extracted signal 401.
[0014] The downsampling unit 5 performs sample decimation on the signal 401 output from the frequency filter 4 in accordance with the sampling frequency. In other words, the downsampling unit 5 performs downsampling on the signal of a specific band extracted by the frequency filter 4. The downsampling unit 5 outputs the decimated signal 501 to the absolute value calculation unit 6. Note that the downsampling value according to the first embodiment is a value determined by the subsequent operating frequency, and any value can be adopted in accordance with the principles of the configuration according to the present disclosure.
[0015] The Nyquist shift numerically controlled oscillator 2, the mixer 3, the frequency filter 4, and the downsampling unit 5 constitute the frequency shift unit in the first embodiment.
[0016] The absolute value calculation unit 6 calculates the absolute value of the I signal (I component) of the signal 501 output from the downsampling unit 5. The absolute value calculation unit 6 may be configured to calculate the absolute value of either the I signal or the Q signal (Q component) of the signal 501 output from the downsampling unit 5. The absolute value calculation unit 6 outputs the calculation result to the delay holding unit 7 as a signal 601.
[0017] The delay holding unit 7 holds samples (a fixed number of samples) for a fixed time of the signal 601 output from the absolute value calculation unit 6. The delay holding unit 7 outputs the signal of the samples held for the fixed time as a signal 701 to the sum calculation unit 8. Note that the time for which the delay holding unit according to the first embodiment holds the samples can be any time.
[0018] The sum calculation unit 8 calculates the sum of the signals 701 output from the delay holding unit 7. The sum calculation unit 8 outputs a signal 801 as the calculation result to the threshold determination unit 9.
[0019] The absolute value calculation unit 6, the delay holding unit 7, and the sum calculation unit 8 constitute a moving sum calculation unit in the first embodiment.
[0020] Threshold determination unit 9 as a signal detection unit compares signal 801 output from sum calculation unit 8 with a preset threshold value, and determines whether or not a signal to be detected is included in analog signal 101 based on the magnitude relationship between signal 801 and the threshold value. In other words, it detects a specific signal included in analog signal 101 using signal 801 output from sum calculation unit 8. Threshold determination unit 9 outputs signal 901 as the determination result.
[0021] Next, the operation of the signal detection circuit 10 will be described in detail with reference to Figs. 2 to 8. In the following description, it is assumed that the signal to be detected is a chirp signal with a frequency band of Δf. It is also assumed that the downsampling value by the downsampling unit 5 is 1 / 2. The input analog signal 101 is sampled by the A / D converter 1 at a preset sampling frequency f S The signal is sampled at 300 MHz and converted into a digital signal 102.
[0022] 2 is a diagram showing the frequency spectrum of the signal 102 output from the A / D converter 1 of the signal detection circuit 10 according to the first embodiment. The signal 102 output from the A / D converter 1 and the signal 201, which is an I signal output from the Nyquist shift numerically controlled oscillator 2, are multiplied by the mixer 3 and output as a signal 301. Here, while the conventional method performs a multiplication to shift the center frequency of the band to the baseband, the Nyquist shift numerically controlled oscillator 2 according to the first embodiment shifts the center frequency of the band of the signal 102 to f S / 4.
[0023] 3 is a diagram showing a frequency spectrum of a signal 301 output from a mixer 3 of a signal detection circuit 10 according to embodiment 1. A desired signal is extracted from the signal 301 output from the mixer 3 by a frequency filter 4, and then the signal is downsampled by a downsampling unit 5 and output as a signal 501.
[0024] 4 is a diagram showing a frequency spectrum of a signal 501 output from the downsampling unit 5 of the signal detection circuit 10 according to the first embodiment. The downsampling unit 5 according to the first embodiment performs a process of thinning out the signal 401 output from the frequency filter 4 to 1 / 2 (a process of thinning out one point for every two points). As a result, the Nyquist band becomes 1 / 2.
[0025] 5 is a diagram showing a frequency spectrum of the I component of the signal 501 output from the downsampling unit 5 of the signal detection circuit 10 according to the embodiment 1. The downsampling unit 5 extracts only the I component (or the Q component) as the signal 501 as the output signal.
[0026] The signal 501 output from the downsampling unit 5 is input to the absolute value calculation unit 6. The absolute value calculation unit 6 calculates the absolute value of the signal 501, and outputs a signal 601 which is the calculation result.
[0027] 6 is a diagram showing the time waveform of a signal 601 output from an absolute value calculation unit 6 of a signal detection circuit 10 according to the first embodiment. The signal 601 output from the absolute value calculation unit 6 is held for a certain time A by a delay holding unit 7 and then output. A sum calculation unit 8 calculates the sum of the values of the signals 701 output from the delay holding unit 7, and outputs the calculation result as a signal 801.
[0028] 7 is a diagram showing a time waveform of a signal 801 output from a sum calculation unit 8 of a signal detection circuit 10 according to the first embodiment. A threshold determination unit 9 performs threshold determination using the value of the signal 801 output from the sum calculation unit 8. The threshold determination unit 9 outputs, as an output signal (signal 901 which is a result of threshold determination), 1 if the value of the signal 801 exceeds the threshold, and 0 if the value is below the threshold. As a high-frequency signal, the moving sum of a certain number of samples of the absolute value |I| of even just the I signal always exceeds the threshold (has a certain magnitude), and can be detected as a signal.
[0029] Fig. 8 is a diagram showing the time waveform of a signal 901 output from the threshold value determination unit 9 of the signal detection circuit 10 according to the embodiment 1. Fig. 8 shows the signal 901 when the value of the signal 801 exceeds the threshold value, in other words, when it is always determined that there is a signal.
[0030] If the processing of the first embodiment is applied to the conventional method, when the signal to be detected is near the baseband, the signal will be very slow (<f S In this case, in the range where the amplitude is small for a long period of time in the time waveform, the value becomes very small even if the sum is taken for a certain period of time, and the signal may not be detected because it does not exceed the threshold value in the threshold judgment.
[0031] On the other hand, in the signal detection circuit 10 of the first embodiment, as shown in FIG. 2 to FIG. 5, both the signal 1 and the signal 2 are f N -Δf / 2 <f<f N Since the frequency components are in the range of f N =f S As a result, there is no continuous period of low amplitude in the time waveform, and the sum of the constant periods always exceeds the threshold, so it is expected that the signal can be detected.
[0032] With this configuration, the signal detection circuit 10 according to the first embodiment is capable of detecting a signal by processing using only one of the I signal and the Q signal without using a band near the baseband, whereas the conventional technology requires both I and Q signal components. This also makes it possible to reduce the number of multiplication circuits compared to the conventional technology, thereby preventing the circuit scale from becoming large. Furthermore, by preventing the circuit scale from becoming large, the circuit delay can be reduced.
[0033] In addition, in the present disclosure, any of the components of the embodiments may be modified or combined, or any of the components of the embodiments may be omitted. [Industrial Applicability]
[0034] The new signal detection circuit according to the present disclosure can be used, for example, to detect a specific signal contained in an analog signal. [Explanation of symbols]
[0035] Reference Signs List: 1 A / D converter (analog-to-digital converter), 2 numerically controlled oscillator for Nyquist shift (frequency shift section, signal generation section), 3 mixer (frequency shift section), 4 frequency filter (frequency shift section), 5 downsampling section (frequency shift section), 6 absolute value calculation section (moving sum calculation section), 7 delay hold section (moving sum calculation section), 8 sum calculation section (moving sum calculation section), 9 threshold determination section (signal detection section), 10 signal detection circuit.
Claims
1. a frequency shift unit that shifts a frequency of an input signal from an analog-to-digital converter that converts an analog signal into a digital signal so that a center frequency of a band of the input signal becomes the Nyquist frequency, and outputs the shifted signal; a moving sum calculation unit that calculates the sum of absolute values of the signal output from the frequency shift unit over a certain period of time; a signal detection unit that detects a specific signal included in the input signal using a calculation result by the moving sum calculation unit. A signal detection circuit comprising:
2. The frequency shift unit is a signal generating unit that generates a signal for shifting a center frequency of a band of the input signal to a Nyquist frequency by being multiplied with the input signal; a frequency filter for extracting a signal of a specific band of the input signal whose center frequency has been shifted to the Nyquist frequency; a downsampling unit that performs downsampling on the signal of the specific band extracted by the frequency filter; 2. The signal detection circuit according to claim 1.
3. The moving sum calculation unit is an absolute value calculation unit that calculates an absolute value of either an I component or a Q component of the signal output from the frequency shift unit; a delay holding unit that holds a signal of the calculation result by the absolute value calculation unit for a certain period of time; a sum calculation unit that calculates the sum of the signals held by the delay holding unit for a certain period of time; a threshold determination unit that detects a specific signal included in the input signal by comparing a result of the sum calculation unit with a preset threshold value.
2. The signal detection circuit according to claim 1.
4. The analog-to-digital converter 4. The signal detection circuit according to claim 1, wherein the first and second input terminals are connected to each other.