Transfer device, transfer method, and transfer program
Patent Information
- Application Number
- JP2024574622
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-12-18
- Publication Date
- 2025-06-10
- Estimated Expiration
- 2043-07-05
AI Technical Summary
Existing Time-Aware Shaper (TAS) systems fail to ensure transmission quality when communication streams violate the communication cycle, leading to increased terminal costs due to the need for precise synchronization and sophisticated timing control.
A transfer device with a frame identification unit, distribution unit, and reception gate control unit that assigns identifiers to frames, stores them in reception queues, and executes gate control processing to absorb transmission timing errors, reducing the required synchronization accuracy and terminal costs.
The solution ensures transmission quality by queuing frames that violate the communication cycle, thereby reducing terminal costs and maintaining network integrity without the need for high-precision synchronization.
Abstract
Description
Transfer device, transfer method, and transfer program
[0001] The present disclosure relates to a transfer device, a transfer method, and a transfer program.
[0002] IEEE 802.1Q-2018 defines TAS. TAS is an abbreviation for Time-Aware Shaper. TAS is a specification for a transfer device that ensures the transmission quality of each communication stream in a network where communication streams with different required quality levels coexist. TAS performs scheduled transfer based on time synchronized within the network. However, if a communication stream occurs that violates the communication cycle defined in the network design phase, the scheduled transfer by TAS will fail. To solve this problem, IEEE 802.1Q-2018 also defines PSFP as a specification that discards communication streams that violate the cycle when received by a transfer device. PSFP is an abbreviation for Per-Stream Filtering and Policing.
[0003] Furthermore, IEEE 802.1Q-2018 defines FP as a specification for transfer devices to guarantee the delay of high-priority communication streams. FP is an abbreviation for Frame Preemption. With FP, when a request for transfer of a high-priority frame requiring low-latency transfer occurs during the transfer of a low-priority frame that does not require low-latency transfer, the transfer of the low-priority frame is suspended and divided, and the high-priority frame is transferred using an interrupt transfer, thereby reducing the transfer delay of the high-priority frame. The low-priority frame divided by the interrupt transfer is transferred after the transfer of the high-priority frame is completed, and is then combined by the receiving transfer device to restore the original frame before being divided.
[0004] IEEE802.1Q-2018-IEEE Standard for Local and Metropolitan Area Networks--Bridges and Bridged Networks
[0005] By having a transfer device support PSFP, the transmission quality of a communication stream that does not violate the period is ensured. However, a communication stream that violates the period is simply discarded, and the transmission quality is not ensured. In order for a terminal to prevent a communication stream from violating the period, it is necessary to synchronize the time between terminals with high precision and to perform advanced transmission timing control using the synchronized time. However, advanced transmission timing control using synchronized time generally increases the cost of terminals. If a terminal that can control transmission timing with high precision cannot be used, a problem arises in that transfer control using PSFP cannot ensure the transmission quality of a communication stream with a large transmission timing error.
[0006] The present disclosure aims to relax the required accuracy of terminal transmission timing synchronization and reduce terminal costs.
[0007] The transfer device according to the present disclosure comprises: a frame identification unit that assigns a corresponding identifier to a received frame based on the contents of the received frame; a distribution unit that stores the received frame in a receiving queue that corresponds to the identifier assigned to the received frame; a setting unit that sets gate control settings that set opening / closing information for the receiving queue, the gate control settings being used to set a received frame that has violated a communication cycle to wait in the receiving queue; and a receiving gate control unit that executes a receiving gate control process that reads the received frame from the receiving queue based on the gate control settings.
[0008] In the transfer device according to the present disclosure, received frames are read from the receive queue based on a gate control setting that causes received frames that have violated the communication cycle to wait in the receive queue. Therefore, according to the transfer device according to the present disclosure, by absorbing the transmission timing error of the terminal, the required accuracy of the transmission timing synchronization of the terminal can be relaxed, which can contribute to reducing terminal costs.
[0009] FIG. 1 is a diagram showing a failure of scheduled transfer by TAS. FIG. 2 is a diagram showing an overview of the operation of a transfer device that supports PSFP. FIG. 3 is a diagram showing an example of the functional configuration of a transfer device according to a first embodiment. FIG. 4 is a diagram showing an example of the overall configuration of a transfer system and an overview of the operation of a transfer device according to a first embodiment. FIG. 5 is a diagram showing an example of the structure of gate control settings according to the first embodiment. FIG. 6 is a diagram showing an example of gate opening and closing operation based on gate control settings according to the first embodiment. FIG. 7 is a diagram showing an example of the hardware configuration of a transfer device according to the first embodiment. FIG. 8 is a diagram showing another example of the hardware configuration of a transfer device according to the first embodiment. FIG. 9 is a diagram showing an example of the functional configuration of a transfer device according to a second embodiment.
[0010] The present embodiment will be described below with reference to the drawings. In each drawing, identical or corresponding parts are designated by the same reference numerals. In the description of the embodiment, the description of identical or corresponding parts will be omitted or simplified as appropriate. Arrows in the drawings mainly indicate the flow of data or the flow of processing. Furthermore, the sized relationships between components in the following drawings may differ from the actual relationships. Furthermore, in the description of the embodiment, directions or positions such as up, down, left, right, front, rear, front and back may be indicated. These notations are used for convenience of explanation and do not limit the placement, direction or orientation of devices, instruments, parts, etc.
[0011] First Embodiment Fig. 1 is a diagram showing a breakdown of scheduled transfer by TAS. Fig. 2 is a diagram showing an overview of the operation of a transfer device that supports PSFP. Figs. 1 and 2 show an example of a transfer device that is a premise of this embodiment.
[0012] The TAS shown in Fig. 1 performs scheduled transfers based on synchronized time within the network. However, as shown in Fig. 1, if a communication stream occurs that violates the communication cycle defined in the network design stage, the scheduled transfers by the TAS will fail.
[0013] 2, by the transfer device supporting PSFP, the transmission quality of communication stream #1, which does not violate the period, is ensured. However, communication stream #2, which violates the period, is simply discarded, and the transmission quality is not ensured.
[0014] ***Description of Configuration*** FIG. 3 is a diagram showing an example of the functional configuration of the transfer device 10 according to this embodiment.
[0015] 3, the transfer device 10 includes a port 101, a receiving unit 102, a transmitting unit 103, and a setting unit 104. The receiving unit 102 includes a frame identifying unit 121, a sorting unit 122, a receiving queue 123, a receiving gate control unit 124, and a multiplexing unit 125. The transmitting unit 103 includes a separating unit 131, a transmitting queue 132, and a transmitting gate control unit 133. Note that the number of these functional blocks does not need to be limited to the number shown in FIG. 3, and the number of each may be more or less than the number shown in FIG. 3.
[0016] ***Description of Operation*** Next, the operation of the transfer device 10 according to this embodiment will be described. The operation procedure of the transfer device 10 corresponds to a transfer method. Furthermore, the program that realizes the operation of the transfer device 10 corresponds to a transfer program.
[0017] 4 is a diagram showing an example of the overall configuration of a transfer system 500 according to this embodiment and an overview of the operation of the transfer device 10. As shown in FIG. 4, in the transfer system 500, the transfer device transfers communication streams transmitted and received between terminals. In the transfer system of FIG. 2, communication stream #2, which violated the period, was discarded, and transmission quality was not ensured. On the other hand, in the transfer system 500 according to this embodiment, the transfer device 10 queues and waits frames that violate the period, making it possible to transfer communication streams #1 and #2 according to schedule.
[0018] The port 101 transfers a frame received from an external device to the frame identification unit 121 .
[0019] The frame identification unit 121 assigns a corresponding identifier to the received frame based on the contents of the received frame received from the port 101. The unique identifier is determined by pattern matching the attributes of the received frame with the settings acquired from the setting unit 104. The attributes of the received frame include the receiving port number of the received frame, header information, payload information, and error information.
[0020] The setting unit 104 sets setting information for determining an identifier. The setting unit 104 also sets gate control settings. The setting unit 104 also allows each port that receives a received frame to be set as either a branch port or a trunk port.
[0021] The setting information is, for example, a setting that assigns ID=1 when the destination MAC address of a received frame received on port number 1 is "12-34-56-AB-CD-EF" and the EtherType is "0x0800" (IP communication). MAC is an abbreviation for Media Access Control. IP is an abbreviation for Internet Protocol. ID is an abbreviation for Identifier. At this time, the frame identification unit 121 determines whether the received frame matches the above settings, and if so, assigns ID=1 to the received frame. An identifier may be assigned to a received frame by temporarily replacing part of the frame content within the transfer device. Alternatively, a signal indicating the identifier may be transmitted in parallel with the received frame and transferred to a subsequent functional block. Furthermore, the identification conditions may be set by the user in the setting unit 104 as described above, or may be statically recorded in the frame identification unit 121. Gate setting control and port type setting will be described later.
[0022] The allocating unit 122 receives received frames from the frame identifying unit 121. Based on the identifier assigned to the received frame by the frame identifying unit 121, the allocating unit 122 transfers the received frame to a receiving queue 123 corresponding to the identifier. Specifically, if the transfer device 10 has a receiving queue corresponding to the identifier assigned to the received frame, the allocating unit 122 stores the received frame in the corresponding receiving queue. On the other hand, if the transfer device 10 does not have a corresponding receiving queue, the allocating unit 122 transmits the received frame to the receiving gate control unit 124. In other words, if the transfer device 10 does not have a corresponding receiving queue, general PSFP processing is performed.
[0023] The receiving queue 123 temporarily stores received frames received from the sorting unit 122. The receiving queue 123 transmits information on whether a frame is stored and the frame length of the frame at the top of the queue to the receiving gate control unit 124. It is not necessary to provide one receiving queue for each identifier. For example, by associating multiple identifiers with one receiving queue, it is possible to provide fewer receiving queues than the number of identifiers that can be set in the transfer device 10. Furthermore, transfer devices equipped with the FP function usually have a receiving queue for combining divided frames, but the receiving queue 123 may be the same receiving queue used in this FP function.
[0024] The receive gate control unit 124 executes receive gate control processing to read receive frames from the receive queue 123 based on the gate control settings set in the setting unit 104. If frames are accumulated in the receive queue 123 based on the gate control settings, the receive gate control unit 124 reads the frames from the receive queue 123. Specifically, as the receive gate control processing, the receive gate control unit 124 selects either queuing or discarding based on the difference between the gate control setting and the arrival timing of the receive frame. In other words, it selects forwarding or discarding depending on the degree of period violation.
[0025] The gate control setting sets the open / close information for the receive queue. The gate control setting is information for storing receive frames that violate the communication cycle in a receive queue. FIG. 5 is a diagram showing an example of the structure of the gate control setting according to this embodiment. FIG. 6 is a diagram showing an example of gate open / close operation based on the gate control setting according to this embodiment. The gate control setting has a list structure and is composed of a list index, receive queue open / close information, and time. The receive queue open / close information is open / close information for each receive queue and is a value of 0 or 1. 0 indicates that reading of the receive queue is prohibited. 1 indicates that reading of the receive queue is permitted. The time setting value is the time for which reading is permitted. The time setting value is set, for example, as an integer value in nanoseconds. The gate control setting for index = 1 in FIG. 5 indicates that reading of receive queue 1 is permitted for 512 nanoseconds.
[0026] The receive gate control unit 124 references the gate control settings in ascending order of index, reads frames only from receive queues that are currently permitted to be read, and transfers them to the multiplexer 125. If there are multiple receive queues that are currently permitted to be read, the receive queue to be read is determined according to a specific rule. Specifically, the receive gate control unit 1024 reads receive frames from receive queue 1 for 512 ns when index = 1, then reads receive frames from receive queues 1 and 2 for 256 ns when index = 2, and so on. Examples of specific rules include the strict priority rule and the round robin rule. The strict priority rule is a rule that prioritizes reading frames from receive queues with the lowest number. The round robin rule is a rule that switches the receive queue to be read at regular intervals. When the receive gate control unit 124 references the gate control setting at the end of the list, it references the list again from the beginning.
[0027] If the transfer device 10 does not have a receiving queue corresponding to the identifier, the sorting unit 122 does not store the received frame in the receiving queue 123, but transfers it to the receiving gate control unit 124. The receiving gate control unit 124 receives gate control settings for each received frame identifier from the setting unit 104, similar to the gate control settings for each receiving queue as shown in FIG. 5. The receiving gate control unit 124 then discards frames that are currently prohibited from being read. The gate control settings for each frame identifier, similar to the gate control settings for each receiving queue, specifically include settings such as how many seconds a frame with ID=1 will last, how many seconds a frame with ID=2 will last, and so on. Note that the reference to the gate control settings for each receiving queue and the reference to the gate control settings for each frame identifier are executed in parallel.
[0028] The receive gate control unit 124 does not necessarily need to strictly follow the time information in the gate control settings. The setting unit 104 may separately set time information indicating an allowable error, and if the difference between the time within the range of permitted readout and the current time is within the allowable error range, the frame may be forwarded without being discarded. Furthermore, if a frame is accumulated in the receive queue even though the difference between the time within permitted readout and the current time is outside the allowable error range, the accumulated frame may be discarded without being forwarded to the multiplexer 125. Taking the allowable error into consideration in this way makes it possible to discard frames that clearly violate the periodicity, thereby reducing the network bandwidth usage. As described above, the receive gate control unit 124 allows frames whose transmission timing from the terminal is not according to the schedule, i.e., not according to the gate control settings, to wait in the receive queue until the time permitted for forwarding in the gate control settings. This allows the forwarding device to absorb the terminal's transmission timing error and relax the required accuracy of the terminal's transmission timing synchronization.
[0029] The setting unit 104 allows the type of "branch port" or "trunk port" to be set for each port of the transfer device 10. The setting value of this port type is transmitted to the receiving unit 102. A "branch port" is, for example, a port connected to a terminal. A "trunk port" is, for example, a port connected to another transfer device 10. A port set as a branch port executes the above-mentioned reception gate control process, and a port set as a trunk port does not execute reception gate control process but executes normal transfer control.
[0030] In a port set as a trunk port, the process of assigning an identifier referenced by the distribution unit 122 in the frame identification unit 121 is omitted. Then, the distribution unit 122 does not store the frame in the reception queue 123, but transfers it to the reception gate control unit 124. Then, the gate control process in the reception gate control unit 124 can also be omitted. The reason for this is as follows. When reception gate control process is performed at a branch port and transmission timing errors of the terminal are absorbed, the normality of the transfer schedule of each communication stream is guaranteed at the trunk port. For this reason, the reason is that processing to absorb transmission timing errors is not required at the trunk port. By omitting the reception gate control process at the trunk port, it is possible to obtain the effect of reducing calculation costs and the effect of reducing transfer delays of communication streams on the trunk.
[0031] The multiplexing unit 125 multiplexes multiple frames received from the reception gate control unit of each port. The demultiplexing unit 131 stores the received frames in the transmission queue 132 of the port corresponding to the destination of the frame. The transmission queue 132 and the transmission gate control unit perform scheduling transfer control in accordance with TAS defined in IEEE802.1Q-2018.
[0032] ***Explanation of Hardware Configuration Example*** The transfer device 10 is a computer. In the transfer device 10, the functions of the receiving unit 102, the transmitting unit 103, and the setting unit 104 are realized by hardware, software, firmware, or a combination thereof.
[0033] <Realized by Software> Fig. 7 is a diagram showing an example of the hardware configuration of the transfer device 10 according to this embodiment. The transfer device 10 is a computer. The transfer device 10 includes a processor 910, as well as other hardware such as a memory 921, an auxiliary storage device 922, an input / output interface 930, and a communication interface 950. The processor 910 is connected to the other hardware via a signal line 80 and controls this other hardware.
[0034] As described above, the transfer device 10 includes, as functional elements, a port 101, a receiving unit 102, a transmitting unit 103, and a setting unit 104. The functions of the receiving unit 102, the transmitting unit 103, and the setting unit 104 are realized by software. The functions of the receiving unit 102, the transmitting unit 103, and the setting unit 104 may also be referred to as functions of the transfer device 10. The receiving unit 102, the transmitting unit 103, and the setting unit 104 may also be referred to as each unit of the transfer device 10.
[0035] The processor 910 is a device that executes a transfer program. The transfer program is a program that realizes the functions of the transfer device 10. The processor 910 is an IC that performs arithmetic processing. Specific examples of the processor 910 are a CPU, a DSP, and a GPU. IC is an abbreviation for Integrated Circuit. CPU is an abbreviation for Central Processing Unit. DSP is an abbreviation for Digital Signal Processor. GPU is an abbreviation for Graphics Processing Unit.
[0036] The memory 921 is a storage device that temporarily stores data. Specific examples of the memory 921 are SRAM and DRAM. SRAM is an abbreviation for Static Random Access Memory. DRAM is an abbreviation for Dynamic Random Access Memory. The auxiliary storage device 922 is a storage device that saves data. A specific example of the auxiliary storage device 922 is an HDD. The auxiliary storage device 922 may also be a portable storage medium such as an SD (registered trademark) memory card, CF, NAND flash, flexible disk, optical disk, compact disk, Blu-ray (registered trademark) disk, or DVD. Note that HDD is an abbreviation for Hard Disk Drive. SD (registered trademark) is an abbreviation for Secure Digital. CF is an abbreviation for CompactFlash (registered trademark). DVD is an abbreviation for Digital Versatile Disk.
[0037] The input / output interface 930 is an interface for connecting input / output devices. Specific examples of the input / output interface 930 include USB and HDMI (registered trademark) ports. USB stands for Universal Serial Bus. HDMI (registered trademark) stands for High-Definition Multimedia Interface.
[0038] The communication interface 950 is an interface for communicating with an external device. Specific examples of the communication interface 950 include an Ethernet (registered trademark) port and a device for wireless communication. The communication interface 950 is also referred to as data communication hardware. The port 101 is realized by the communication interface 950.
[0039] The transfer program is executed in the transfer device 10. The transfer program is read into the processor 910 and executed by the processor 910. The memory 921 stores not only the transfer program but also an OS. OS is an abbreviation for Operating System. The processor 910 executes the transfer program while executing the OS. The transfer program and the OS may be stored in an auxiliary storage device 922. The transfer program and the OS stored in the auxiliary storage device 922 are loaded into the memory 921 and executed by the processor 910. Note that part or all of the transfer program may be incorporated into the OS.
[0040] The transfer device 10 may include multiple processors that replace the processor 910. These multiple processors share the execution of the transfer program. Each processor is a device that executes the transfer program in the same way as the processor 910.
[0041] Data, information, signal values and variable values used, processed or output by the transfer program are stored in memory 921, auxiliary storage device 922, or registers or cache memory within processor 910.
[0042] The "part" of each part of the transfer device 10 may be read as a "circuit," "step," "procedure," "process," or "circuitry." The transfer program causes a computer to execute each process, where the "part" of each part of the transfer device 10 is read as a "process." The "process" of each process of the transfer device 10 may be read as a "program," "program product," "computer-readable storage medium storing a program," or "computer-readable recording medium recording a program." Furthermore, the transfer method is a method performed by the transfer device 10 executing the transfer program. The transfer program may be provided by being stored in a computer-readable recording medium. Furthermore, the transfer program may be provided as a program product.
[0043] <Implemented in Hardware> Fig. 8 is a diagram showing another example of the hardware configuration of the transfer device 10 according to the present embodiment. In this embodiment, the functions of each unit of the transfer device 10 are implemented in software. As a modified example, the functions of each unit of the transfer device 10 may be implemented in hardware. Specifically, the transfer device 10 includes an electronic circuit 909 instead of a processor 910.
[0044] The electronic circuit 909 is a dedicated electronic circuit that realizes the functions of each part of the transfer device 10. Specifically, the electronic circuit 909 is a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, a logic IC, a GA, an ASIC, or an FPGA. GA is an abbreviation for Gate Array. ASIC is an abbreviation for Application Specific Integrated Circuit. FPGA is an abbreviation for Field-Programmable Gate Array.
[0045] The functions of each unit of the transfer device 10 may be realized by a single electronic circuit, or may be realized by distributing the functions across multiple electronic circuits.
[0046] As another modification, some of the functions of each unit of the transfer device 10 may be realized by electronic circuits, and the remaining functions may be realized by software. Also, some or all of the functions of each unit of the transfer device 10 may be realized by firmware.
[0047] Each of the processor and electronic circuits is also called a processing circuitry. That is, the functions of each part of the transfer device 10 are realized by the processing circuitry.
[0048] ***Explanation of the Effects of the Present Embodiment*** In the transfer device according to the present embodiment, before the received frames are multiplexed within the transfer device, each frame is sorted into the corresponding receive queue. Then, by having the received frames wait in the queue in accordance with the gate control settings, which are the settings for scheduled transfer, it is possible to absorb transmission timing errors of the devices and prevent scheduled transfers from failing after multiplexing.
[0049] Therefore, according to the transfer device of this embodiment, by absorbing the transmission timing error of devices such as terminals, the required accuracy of device transmission timing synchronization can be relaxed, contributing to a reduction in device costs.
[0050] Embodiment 2 In this embodiment, differences from and additions to embodiment 1 will be mainly described. In this embodiment, components having the same functions as those in embodiment 1 will be assigned the same reference numerals, and descriptions thereof will be omitted.
[0051] ***Description of Configuration*** Fig. 9 is a diagram showing an example of the functional configuration of a transfer device 10 according to this embodiment. In this embodiment, a configuration will be described in which a terminal is connected to a specific port of the transfer device 10. For example, this is a configuration in which a terminal is connected to an electrical port of the transfer device 10, and another transfer device 10 is connected to an optical port of the transfer device 10.
[0052] In this way, when the ports to which terminals are connected are limited, as described in the first embodiment, it is sufficient to perform receive gate control processing only at the branch port to which the terminal is connected. As shown in Fig. 9, it is sufficient to have a distribution unit 122, a receive queue 123, and a receive gate control unit 124 only at a specific port. In the case of Fig. 9, port 101 corresponds to the branch port, and port 105 corresponds to the trunk port. The operation of each unit of the transfer device 10 is the same as in the first embodiment.
[0053] ***Explanation of Effects of This Embodiment*** In addition to the effects of the first embodiment, the transfer device according to this embodiment can further reduce the equipment costs of the transfer device.
[0054] In the first and second embodiments described above, each unit of the transfer device has been described as an independent functional block. However, the configuration of the transfer device does not have to be the same as that of the above-described embodiments. The functional blocks of the transfer device may have any configuration as long as they can realize the functions described in the above-described embodiments. Furthermore, the transfer device may not be a single device, but may be a system composed of multiple devices. Furthermore, multiple parts of the first and second embodiments may be combined and implemented. Alternatively, only one part of these embodiments may be implemented. In addition, these embodiments may be combined in any way, either as a whole or in part. In other words, in the first and second embodiments, the respective embodiments may be freely combined, or any component of each embodiment may be modified, or any component of each embodiment may be omitted.
[0055] The above-described embodiments are essentially preferred examples and are not intended to limit the scope of the present disclosure, the scope of application of the present disclosure, or the scope of use of the present disclosure. The above-described embodiments can be modified in various ways as needed. For example, the procedures described using flow charts or sequence diagrams may be modified as appropriate.
[0056] 10 Transfer device, 101 Port, 102 Receiving unit, 103 Transmitting unit, 104 Setting unit, 121 Frame identification unit, 122 Distribution unit, 123 Receiving queue, 124 Receiving gate control unit, 125 Multiplexing unit, 103 Transmitting unit, 131 Separating unit, 132 Transmitting queue, 133 Transmitting gate control unit, 500 Transfer system, 909 Electronic circuit, 910 Processor, 921 Memory, 922 Auxiliary storage device, 930 Input / output interface, 950 Communication interface.
Claims
1. a frame identification unit that assigns a corresponding identifier to a received frame based on the contents of the received frame; a distribution unit that stores a received frame in a receiving queue that corresponds to an identifier assigned to the received frame; a setting unit that sets gate control setting information for opening and closing a reception queue, the gate control setting being for causing a reception frame that has violated a communication cycle to wait in the reception queue; a reception gate control unit that executes a reception gate control process to read reception frames from the reception queue based on the gate control setting; Equipped with The allocating unit includes: A transfer device that stores the received frame in a corresponding receiving queue if the transfer device has a receiving queue corresponding to the identifier assigned to the received frame, and transmits the received frame to the receiving gate control unit if the transfer device does not have a corresponding queue.
2. The setting unit sets setting information for determining an identifier, The frame identification unit 2. The transfer device according to claim 1, wherein a corresponding identifier is assigned by pattern matching between attributes including a receiving port number, header information, payload information, and error information of the received frame and the setting information.
3. The receiving gate control unit includes:
3. The transfer device according to claim 1, wherein as the reception gate control process, either queuing or discarding is selected based on a difference between the gate control setting and an arrival timing of the received frame.
4. The setting unit is Each port that receives an incoming frame can be set to either a branch port or a trunk port; 3. The transfer device according to claim 1, wherein a port set as a branch port executes the reception gate control process, and a port set as a trunk port does not execute the reception gate control process and executes normal transfer control.
5. The computer assigns a corresponding identifier to the received frame based on the content of the received frame; The computer performs a sorting step of storing the received frame in a receiving queue corresponding to an identifier assigned to the received frame; a computer sets gate control setting for setting open / close information for a receiving queue, the gate control setting being for allowing a received frame that has violated a communication cycle to wait in the receiving queue; a computer executes a receive gate control process for reading receive frames from the receive queue based on the gate control setting; A transfer method in which, in the sorting process, if a transfer device has a receiving queue corresponding to an identifier assigned to the received frame, a computer stores the received frame in the corresponding receiving queue, and if the transfer device does not have a corresponding queue, the computer sends the received frame to the receiving gate control process.
6. a frame identification process for assigning a corresponding identifier to a received frame based on the content of the received frame; A distribution process of storing a received frame in a receiving queue corresponding to an identifier assigned to the received frame; a setting process for setting gate control setting for setting opening / closing information of a receiving queue, the gate control setting being for allowing a receiving frame that has violated a communication cycle to wait in the receiving queue; a reception gate control process for reading reception frames from the reception queue based on the gate control setting; Run the following on your computer: The allocation process includes: A transfer program that stores the received frame in a corresponding receiving queue if the transfer device has a receiving queue corresponding to an identifier assigned to the received frame, and transmits the received frame to the receiving gate control unit if the transfer device does not have a corresponding queue.