Display Apparatus

Abstract

The present invention provides a display device comprising: a substrate having a display area in which a plurality of display elements are arranged and a peripheral area in contact with the display area; an inorganic insulating layer arranged on the display area and the peripheral area; a thin film encapsulation layer arranged on the display elements and having a first inorganic encapsulation layer, a second inorganic encapsulation layer, and an organic encapsulation layer arranged between the first inorganic encapsulation layer and the second inorganic encapsulation layer; a dam arranged on the peripheral area to surround the display area; a fan-out wiring arranged on the peripheral area to transmit a signal to the plurality of display elements; and a power supply line arranged on the peripheral area so as to overlap at least a portion with the fan-out wiring; wherein the first inorganic encapsulation layer and the second inorganic encapsulation layer include an inorganic contact area that extends outward from the dam and contacts the inorganic insulating layer, and a plurality of protrusion patterns are located at the end of the power supply line that overlaps with the inorganic contact area.

Description

Technology Field

[0001] The present invention relates to a display device, and more specifically, to a display device that is robust against moisture permeability at the outer edge of the display area. Background Technology

[0002] Among display devices, organic light-emitting diodes (OLEDs) are attracting attention as next-generation display devices due to their advantages, including a wide viewing angle, excellent contrast, and fast response speed.

[0003] Generally, organic light-emitting display devices form thin-film transistors and organic light-emitting diodes as display elements on a substrate, and operate by the organic light-emitting diodes emitting light themselves. Such organic light-emitting display devices are used as display units for small products such as mobile phones, as well as for large products such as televisions. The problem to be solved

[0004] However, in these conventional display devices, the display element acting as the light-emitting element had a problem of being vulnerable to external moisture penetration.

[0005] The present invention aims to solve various problems, including those mentioned above, by providing a display device that is robust against moisture permeability at the periphery of the display area. However, this objective is exemplary and does not limit the scope of the present invention. means of solving the problem

[0006] According to one aspect of the present invention, a display device is provided having a substrate having a display area in which a plurality of display elements are arranged and a peripheral area in contact with the display area; an inorganic insulating layer arranged on the display area and the peripheral area; a thin film encapsulation layer arranged on the display elements and having a first inorganic encapsulation layer, a second inorganic encapsulation layer, and an organic encapsulation layer arranged between the first inorganic encapsulation layer and the second inorganic encapsulation layer; a dam arranged on the peripheral area to surround the display area; a fan-out wiring arranged on the peripheral area to transmit a signal to the plurality of display elements; and a power supply line arranged on the peripheral area so as to overlap at least a portion with the fan-out wiring; wherein the first inorganic encapsulation layer and the second inorganic encapsulation layer include an inorganic contact area that extends outward from the dam and contacts the inorganic insulating layer, and a plurality of protrusion patterns are located at the end of the power supply line that overlaps with the inorganic contact area.

[0007] In the present embodiment, the power supply line includes a main line extended in a first direction and a connection line extended in a second direction intersecting the first direction, and each of the plurality of protrusion patterns may be extended in a third direction intersecting the first direction and the second direction simultaneously.

[0008] In the present embodiment, each of the plurality of protrusion patterns may include a plurality of irregularities extended in the third direction.

[0009] In this embodiment, the plurality of irregularities may have a rounded wave shape.

[0010] In the present embodiment, the fan-out wiring includes a first wiring and a second wiring that is located on the first wiring, which is on a different layer from the first wiring, and is arranged alternately with the first wiring.

[0011] The vertices corresponding to the crests and valleys of each of the plurality of irregularities may be located on the same wiring among the first wiring and the second wiring.

[0012] In this embodiment, the vertices corresponding to the crests and valleys of each of the plurality of protrusion patterns may be located on the second wiring.

[0013] In the present embodiment, each of the first wiring and the second wiring may be arranged in a third direction that intersects the first direction and the second direction simultaneously.

[0014] In this embodiment, the power supply line is disposed on the inorganic insulating layer, and

[0015] At least a portion of the above power supply line can be in direct contact with the first inorganic encapsulation layer in the above inorganic contact area.

[0016] In this embodiment, the plurality of protrusion patterns can come into direct contact with the first inorganic sealing layer extending to the outer edge of the dam.

[0017] In this embodiment, the first inorganic sealing layer extending to the outer edge of the dam can come into direct contact with the inorganic insulating layer.

[0018] In this embodiment, the power supply line may have a triple-layer structure comprising a first layer and a third layer containing the same material, and a second layer interposed between the first layer and the third layer.

[0019] In this embodiment, the first layer and the third layer of the power supply line may include titanium (Ti), and the second layer may include aluminum (Al).

[0020] In this embodiment, each end of the first layer and the third layer may have a tip that protrudes more than the end of the second layer.

[0021] In this embodiment, the end of the second layer is recessed inward from the tip of each of the first layer and the third layer, and an undercut space may be provided between the tip of each of the first layer and the third layer and the end of the second layer.

[0022] In the present embodiment, the first inorganic encapsulation layer may be arranged to cover the space between the tips of each of the first layer and the third layer.

[0023] In this embodiment, the first inorganic encapsulation layer can be in direct contact with the side of the second layer.

[0024] In the present embodiment, the thin-film transistor comprises a semiconductor layer on the display area, a gate electrode that overlaps at least a portion with the semiconductor layer, and an electrode layer disposed on the gate electrode and connected to the semiconductor layer; and a connecting metal disposed on the thin-film transistor and connected to the electrode layer; wherein the power supply line may include the same material as the electrode layer or the connecting metal.

[0025] In the present embodiment, the fan-out wiring includes a first wiring and a second wiring that is positioned on the first wiring, which is a different layer from the first wiring, and is arranged alternately with the first wiring, and further includes an upper electrode that is interposed between the gate electrode and the electrode layer and overlaps at least partially with the gate electrode, and the first wiring may include the same material as the gate electrode and the second wiring may include the same material as the upper electrode.

[0026] In this embodiment, on a plane, the end of the power supply line may include a bent portion extended toward the display area.

[0027] In this embodiment, the plurality of protrusion patterns may be provided at the end of the bent portion.

[0028] Other aspects, features, and advantages other than those described above will become clear from the following drawings, claims, and detailed description of the invention.

[0029] These general and specific aspects may be implemented using a system, method, computer program, or any combination of a system, method, or computer program. Effects of the invention

[0030] According to one embodiment of the present invention as described above, a display device robust against moisture permeability at the outer edge of the display area can be implemented. Of course, the scope of the present invention is not limited by this effect. Brief explanation of the drawing

[0031] FIG. 1 is a schematic plan view illustrating a part of a display device according to one embodiment of the present invention. FIGS. 2a and FIGS. 2b are cross-sectional views schematically illustrating a cross-section taken along the line A-A' of the display device of FIG. 1. FIG. 3 is an equivalent circuit diagram of a pixel that may be included in a display device according to one embodiment of the present invention. FIG. 4 is a schematic plan view illustrating a display panel included in the display device of FIG. 1. Figure 5 is a plan view showing an enlarged view of part B of Figure 4. FIG. 6 is a schematic cross-sectional view showing a cross-section taken along the CC' line of the display device of FIG. 4. FIG. 7 is a schematic plan view showing an enlarged view of area D of the display device of FIG. 5. Figure 8 is an enlarged view of a part of Figure 7. FIG. 9 is a schematic cross-sectional view taken along the line E-E' of the display device of FIG. 8. Fig. 10 is a modified example of Fig. 9. FIG. 11 is a plan view schematically illustrating a part of a display device according to one embodiment of the present invention. FIGS. 12 and FIGS. 13 are plan views schematically illustrating a part of a display device according to one embodiment of the present invention. Specific details for implementing the invention

[0032] The present invention is capable of various modifications and may have various embodiments; specific embodiments are illustrated in the drawings and described in detail in the detailed description. The effects and features of the present invention, and the methods for achieving them, will become clear by referring to the embodiments described below in detail together with the drawings. However, the present invention is not limited to the embodiments disclosed below but can be implemented in various forms.

[0033] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. When describing with reference to the drawings, identical or corresponding components are given the same reference numerals, and redundant descriptions thereof will be omitted.

[0034] In this specification, terms such as first, second, etc. are used not in a limiting sense, but for the purpose of distinguishing one component from another.

[0035] In this specification, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0036] In this specification, terms such as "include" or "have" mean that the features or components described in the specification exist, and do not preclude the possibility that one or more other features or components may be added.

[0037] In this specification, when a part such as a film, region, or component is described as being on or above another part, it includes not only cases where it is immediately above the other part, but also cases where another film, region, or component is interposed therein.

[0038] In this specification, when it is stated that a membrane, region, component, etc. is connected, it includes cases where the membrane, region, or component is directly connected, or / or cases where other membranes, regions, or components are interposed between them to form an indirect connection. For example, when it is stated that a membrane, region, or component, etc. is electrically connected in this specification, it indicates cases where the membrane, region, or component, etc. are directly electrically connected, and / or cases where other membranes, regions, or components are interposed between them to form an indirect electrical connection.

[0039] In this specification, "A and / or B" indicates the case where it is A, B, or both A and B. And, "at least one of A and B" indicates the case where it is A, B, or both A and B.

[0040] In this specification, the x-axis, y-axis, and z-axis are not limited to three axes in an orthogonal coordinate system and may be interpreted in a broader sense that includes them. For example, the x-axis, y-axis, and z-axis may be orthogonal to each other, but they may also refer to different directions that are not orthogonal to each other.

[0041] Where any embodiment in this specification can be implemented differently, a specific process sequence may be performed differently from the order described. For example, two processes described consecutively may be performed substantially simultaneously or proceed in the reverse order of the order described.

[0042] In the drawings, the size of components may be exaggerated or reduced for convenience of explanation. For example, the size and thickness of each component shown in the drawings are depicted arbitrarily for convenience of explanation, so the present invention is not necessarily limited to what is illustrated.

[0044] FIG. 1 is a schematic plan view illustrating a part of a display device (1) according to one embodiment of the present invention.

[0045] Referring to FIG. 1, a display device (1) includes a display area (DA) and a peripheral area (NDA) outside the display area (DA). A plurality of pixels (P) containing display elements are arranged in the display area (DA), and the display device (1) can provide an image using light emitted from the plurality of pixels (P) arranged in the display area (DA). The peripheral area (NDA) is a type of non-display area in which display elements are not arranged, and the display area (DA) can be entirely surrounded by the peripheral area (NDA).

[0046] In FIG. 1, a display device (1) having a flat display surface is shown, but the present invention is not limited thereto. In other embodiments, the display device (1) may include a three-dimensional display surface or a curved display surface.

[0047] When the display device (1) includes a three-dimensional display surface, the display device (1) includes a plurality of display areas indicating different directions, and, for example, may include a polygonal columnar display surface. In another embodiment, when the display device (1) includes a curved display surface, the display device (1) can be implemented in various forms such as a flexible, foldable, or rollable display device.

[0048] In addition, as an embodiment, FIG. 1 illustrates a display device (1) that can be applied to a mobile phone terminal. Although not illustrated, electronic modules mounted on a main board, a camera module, a power module, etc. can be arranged together with the display device (1) in a bracket / case, etc. to form a mobile phone terminal. The display device (1) according to the present invention can be applied to large electronic devices such as televisions and monitors, as well as small and medium-sized electronic devices such as tablets, car navigation systems, game consoles, and smartwatches.

[0049] In FIG. 1, the display area (DA) of the display device (1) is illustrated as a square with rounded corners, but in other embodiments, the shape of the display area (DA) may be a circle, an ellipse, or a polygon such as a triangle or a pentagon.

[0050] Additionally, within the display area (DA) of the display device (1), a component area in which the arrangement of multiple pixels (P) differs from the surrounding area may be included. The display device (1) includes a display panel (DP, see FIG. 4), and on one side of the display panel (DP), an example such as a sensor or camera may be located overlapping with the component area. In another embodiment, the component area may be located within a surrounding area (NDA).

[0051] In the following description, an organic light-emitting display device is used as an example of a display device (1) according to one embodiment of the present invention, but the display device of the present invention is not limited thereto. As another embodiment, the display device (1) of the present invention may be an inorganic light-emitting display device (Inorganic Light Emitting Display or Inorganic EL Display Device) or a display device such as a quantum dot light-emitting display device. For example, the light-emitting layer of a display element provided in the display device (1) may include an organic material, an inorganic material, a quantum dot, an organic material and a quantum dot, or an inorganic material and a quantum dot.

[0052] FIGS. 2a and FIGS. 2b are cross-sectional views schematically illustrating a cross-section taken along the line A-A' of the display device (1) of FIG. 1.

[0053] FIGS. 2a and FIGS. 2b are simply illustrated to explain the stacking relationship of functional panels and / or functional layers constituting a display device (1).

[0054] Referring to FIG. 2a, a display device (1) according to one embodiment of the present invention may include a display layer (DU), an input sensing layer (TU), an optical functional layer (OU), an anti-reflection layer (PU), and a window layer (WU). At least some of the components of the display layer (DU), the input sensing layer (TU), the optical functional layer (OU), the anti-reflection layer (PU), and the window layer (WU) may be formed by a continuous process, or at least some of the components may be joined together through an adhesive member. In FIG. 2a, an optically transparent adhesive member (OCA) is exemplarily illustrated as the adhesive member. The adhesive member described below may include a conventional adhesive or a pressure-sensitive adhesive. In one embodiment of the present invention, the anti-reflection layer (PU) and the window layer (WU) may be replaced with other components or omitted.

[0055] In one embodiment, the input sensing layer (TU) is placed directly on the display layer (DU). In this specification, "configuration B is placed directly on configuration A" means that no separate adhesive layer / adhesive member is placed between configuration A and configuration B. Configuration B is formed through a continuous process on the base surface provided by configuration A after configuration A is formed.

[0056] It can be defined as a display panel (DP) including a display layer (DU), an input sensing layer (TU) and an optical function layer (OU) placed directly on the display layer (DU). In one embodiment, as shown in FIG. 2a, an optically transparent adhesive member (OCA) may be placed between the display panel (DP) and the anti-reflection layer (PU), and between the anti-reflection layer (PU) and the window layer (WU), respectively.

[0057] In another embodiment, as shown in FIG. 2b, the display panel (DP) may include an anti-reflection layer (CU). The anti-reflection layer (CU) may be disposed between an input sensing layer (TU) and an optical function layer (OU). The anti-reflection layer (CU) may include a color filter provided to correspond to the light-emitting region of each pixel (P) and a light-blocking layer provided to correspond to the non-light-emitting region between each pixel (P). In one embodiment, an optically transparent adhesive member (OCA) is not interposed between the anti-reflection layer (CU) and the display panel (DP), and the anti-reflection layer (CU) may be disposed directly on the display panel (DP).

[0058] The display layer (DU) generates an image, and the input detection layer (TU) acquires coordinate information of an external input (e.g., a touch event). Although not separately illustrated, a display panel (DP) according to one embodiment of the present invention may further include a protective member disposed on the lower surface of the display layer (DU). The protective member and the display layer (DU) may be joined through an adhesive member.

[0059] The optical functional layer (OU) can improve light efficiency. The optical functional layer (OU) can improve, for example, the frontal light efficiency and / or side visibility of light emitted from an organic light-emitting diode (OLED).

[0060] The anti-reflection layer (PU) reduces the reflectance of external light incident from the upper side of the window layer (WU). The anti-reflection layer (PU) according to one embodiment of the present invention may include a phase retarder and a polarizer. The phase retarder may be a film type or a liquid crystal coating type, and / 2 phase delayer and / or / 4 It may include a phase retarder. The polarizer may also be of the film type or liquid crystal coating type. The film type may include an extended synthetic resin film, and the liquid crystal coating type may include liquid crystals arranged in a predetermined arrangement. The phase retarder and polarizer may further include a protective film. The phase retarder and polarizer themselves, or the protective film, may be defined as the base layer of the anti-reflection layer (PU).

[0061] FIG. 3 is an equivalent circuit diagram of a pixel (P) that may be included in a display device (1) according to one embodiment of the present invention.

[0062] Referring to FIG. 3, each pixel (P) includes a pixel circuit (PC) connected to a scan line (SL) and a data line (DL), and an organic light-emitting diode (OLED) connected to the pixel circuit (PC).

[0063] The pixel circuit (PC) includes a driving thin-film transistor (Td), a switching thin-film transistor (Ts), and a storage capacitor (Cst). The switching thin-film transistor (Ts) is connected to a scan line (SL) and a data line (DL), and transmits a data signal (Dm) input through the data line (DL) to the driving thin-film transistor (Td) according to a scan signal (Sn) input through the scan line (SL).

[0064] The storage capacitor (Cst) is connected to the switching thin-film transistor (Ts) and the driving voltage line (PL), and stores a voltage corresponding to the difference between the voltage received from the switching thin-film transistor (Ts) and the driving voltage (ELVDD) supplied to the driving voltage line (PL).

[0065] The driving thin-film transistor (Td) is connected to the driving voltage line (PL) and the storage capacitor (Cst), and can control the driving current flowing from the driving voltage line (PL) to the organic light-emitting diode (OLED) in correspondence with the voltage value stored in the storage capacitor (Cst). The organic light-emitting diode (OLED) is driven by the driving current (I dIt can emit light with a predetermined brightness by ).

[0066] FIG. 3 describes a case where the pixel circuit (PC) includes two thin-film transistors and one storage capacitor, but the present invention is not limited thereto. In another embodiment, the pixel circuit (PC) may include seven thin-film transistors and one storage capacitor. In another embodiment, the pixel circuit (PC) may include two or more storage capacitors.

[0067] FIG. 4 is a schematic plan view of a display panel (DP) included in the display device (1) of FIG. 1, and FIG. 5 is an enlarged plan view of part B of FIG. 4.

[0068] Referring to FIG. 4, the display panel (DP) includes a display unit (10) disposed on a substrate (100), first and second scan driving units (20, 30), a terminal unit (40), a data driving unit (50), a driving voltage supply line (60), and a common voltage supply line (70). Although not shown, a light emission control driving unit (not shown) may be further disposed on one side of the first scan driving unit (20).

[0069] The substrate (100) may be formed from a material such as glass, metal, or organic material. According to one embodiment, the substrate (100) may be formed from a flexible material. For example, the substrate (100) may include a polymer resin such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate.

[0070] Of course, the substrate (100) may have a multilayer structure including two layers each containing such a polymer resin and a barrier layer containing an inorganic material (such as silicon oxide, silicon nitride, silicon oxynitride) interposed between the layers, and various other variations are possible.

[0071] The substrate (100) may include a display area (DA) and a peripheral area (NDA) surrounding the display area (DA). A portion of the peripheral area (NDA) may extend to one side (e.g., in the -y direction). A terminal portion (40), a data driving portion (50), a driving voltage supply line (60), and a fan-out wiring (FW), etc., may be located on the extended peripheral area (NDA). For example, the width of the extended peripheral area (NDA) in the x-axis direction may be smaller than the width of the display area (DA) in the x-axis direction.

[0072] The substrate (100) may include a bending area (BA) in which a portion of the extended peripheral area (NDA) is bent. As the extended peripheral area (NDA) is folded based on the bending area (BA), the extended peripheral area (NDA) may partially overlap with the display area (DA). Through this structure, the width of the peripheral area (NDA) can be reduced because the extended peripheral area (NDA) is not visible to the user.

[0073] The display unit (10) is located on the display area (DA) and includes pixels (P) connected to a scan line (SL) extended in a first direction (e.g., x-direction), a data line (DL) extended in a second direction (e.g., y-direction) intersecting the first direction (e.g., x-direction), and a driving voltage line (PL). Each pixel (P) emits light, for example, red, green, blue, or white light, and may include, for example, an organic light-emitting diode (OLED). In one embodiment, referring to FIG. 5, the pixel (P) may include a red subpixel (Pr), a green subpixel (Pg), and a blue subpixel (Pb).

[0074] The display unit (10) provides a predetermined image through light emitted from pixels (P), and the display area (DA) is defined by the pixels (P). The display unit (10) has a roughly rectangular shape, but as various embodiments, it may be provided in a polygonal, circular, elliptical, or a shape corresponding to a part thereof. In one embodiment, the display unit (10) has an overall rectangular shape, but may have rounded corner portions with curved corners. The substrate (100) on which the display unit (10) is located may have curved edges in at least a portion of the outer edge.

[0075] The first scan driving unit (20) and the second scan driving unit (30) are positioned on the peripheral area (NDA) of the substrate (100) and generate and transmit a scan signal to each pixel (P) through a scan line (SL). For example, the first scan driving unit (20) may be positioned on the left side of the display unit (10), and the second scan driving unit (30) may be positioned on the right side of the display unit (10). In this embodiment, a structure is shown in which the first and second scan driving units (20, 30) are positioned on both sides of the display unit (10), but in other embodiments, the scan driving units may be positioned only on one side of the display unit (10).

[0076] The terminal portion (40) is disposed at one end of the substrate (100) and includes a plurality of terminals (41, 42, 43, 44). The terminal portion (40) is exposed without being covered by an insulating layer and can be electrically connected to a control unit such as a flexible printed circuit board or an IC chip.

[0077] The data driving unit (50) is positioned on the peripheral area (NDA) of the substrate (100) and generates and transmits a data signal to each pixel (P) through a data line (DL). The data driving unit (50) may be positioned on one side of the display unit (10), for example, between the terminal unit (40) and the display unit (10). Although FIG. 4 shows the data driving unit (50) positioned on the substrate (100), in another embodiment, the data driving unit (50) may be provided on a flexible printed circuit board connected to the terminal unit (40).

[0078] A control unit (not shown) converts a plurality of video signals transmitted from the outside into a plurality of video data signals and transmits the converted signals to a data driving unit (50) through a terminal (41). Additionally, the data driving unit (50) generates data signals, and the generated data signals can be transmitted to a display area (DA) through a fan-out wiring (FW). Furthermore, the control unit receives a vertical synchronization signal, a horizontal synchronization signal, and a clock signal, generates a control signal to control the driving of the first and second scan driving units (20, 30), and transmits it to each through a terminal (43). The control unit transmits a driving voltage (ELVDD) and a common voltage (ELVSS) to the driving voltage supply line (60) and the common voltage supply line (70), respectively, through terminals (42, 44).

[0079] The driving voltage supply line (60) may be placed on the peripheral area (NDA). For example, the driving voltage supply line (60) may be placed between the data driving unit (50) and the display unit (10). The driving voltage supply line (60) provides a driving voltage (ELVDD) to the pixels (P). The driving voltage supply line (60) may include a main line (61) extended in a first direction (e.g., x-direction) and a connecting line (62) extended from the main line (61) in a second direction (e.g., y-direction). The driving voltage supply line (60) may have a shape such as 'Π' (Pi) by including the main line (61) and the connecting line (62). The driving voltage supply line (60) may be connected to a plurality of driving voltage lines (PL) placed in the second direction (e.g., y-direction).

[0080] The driving voltage supply line (60) may overlap with the fan-out wiring (FW). A portion of the fan-out wiring (FW) may be positioned to be inclined obliquely in a third direction that intersects simultaneously with the first direction (e.g., x direction) and the second direction (e.g., y direction).

[0081] A common voltage supply line (70) is positioned on a peripheral area (NDA) and provides a common voltage (ELVSS) to the opposing electrode (230, see FIG. 6) of an organic light-emitting diode (OLED, see FIG. 6) of a pixel (P). For example, the common voltage supply line (70) may be in the form of a loop with one side open and may extend along the edge of the substrate (100) excluding the terminal portion (40).

[0082] Meanwhile, referring to FIGS. 4 and FIGS. 5 together, a dam (DM) may be located on the surrounding area (NDA). The dam (DM) may be positioned to surround the outer edge of the display unit (10). For example, the dam (DM) may include a first dam (DM1) and a second dam (DM2). The first dam (DM1) may surround the display unit (10), and the second dam (DM2) may be positioned to surround the first dam (DM1). The first dam (DM1) and the second dam (DM2) may be positioned spaced apart by a predetermined distance, as shown in FIG. 5.

[0083] The dam (DM) may be positioned outside the common voltage supply line (70) or may be positioned overlapping at least partially with the common voltage supply line (70). FIG. 4 illustrates the dam (DM) being positioned outside the common voltage supply line (70).

[0084] A thin film encapsulation layer (300) is disposed in the display area (DA) to cover pixels (P), and a portion of the thin film encapsulation layer (300) may extend into the surrounding area (NDA). The thin film encapsulation layer (300) has a multilayer structure including at least one organic encapsulation layer and at least one inorganic encapsulation layer, and a dam (DM) may serve to prevent the organic encapsulation layer (320, see FIG. 6) included in the thin film encapsulation layer (300) from overflowing.

[0085] The thin film encapsulation layer (300) may further include an inorganic encapsulation layer in addition to the organic encapsulation layer (320), and the inorganic encapsulation layer may include a first inorganic encapsulation layer (310) and a second inorganic encapsulation layer (330) as shown in FIG. 6, which will be described later. The first and second inorganic encapsulation layers (310, 330) may extend beyond the dam (DM) toward the edge of the substrate (100), and an inorganic contact region (ICR) may be formed in the outer region of the dam (DM) where the first inorganic encapsulation layer (310) and the lower inorganic film (IL) come into contact. This will be described in detail later.

[0086] At least a portion of the inorganic contact area (ICR) may overlap with the driving voltage supply line (60), and more specifically, may overlap with a portion of the connecting line (62) of the driving voltage supply line (60) extended in a second direction (e.g., y-direction). On the inorganic contact area (ICR), the connecting line (62) may be interposed between the lower inorganic membrane (IL) and the first inorganic encapsulation layer (310), and as the connecting line (62) extends in the second direction (e.g., y-direction), there is a possibility of moisture penetration into the interior of the dam (DM) through the edge of the connecting line (62).

[0087] Accordingly, the driving voltage supply line (60) according to the present embodiment may have a plurality of protrusion patterns (PP) in a portion overlapping with the inorganic contact area (ICR). The plurality of protrusion patterns (PP) are formed on the edge of the driving voltage supply line (60) and may be in a shape that protrudes outward on the xy plane. By extending the edge moisture permeation path of the driving voltage supply line (60) (e.g., a path in the +y direction toward the display area (DA)) in the portion overlapping with the inorganic contact area (ICR), the transmission of moisture into the inside of the dam (DM) through the edge of the driving voltage supply line (60) can be prevented or minimized.

[0088] FIG. 6 is a schematic cross-sectional view illustrating a part of a display device according to one embodiment of the present invention. FIG. 6 corresponds to a cross-section taken along the CC' line of FIG. 4.

[0089] First, the structure of the display layer (DU) on the display area (DA) will be explained with reference to FIG. 6.

[0090] A buffer layer (111) may be disposed on the substrate (100). The buffer layer (111) may serve to prevent impurities from entering various components disposed on the substrate (100) through the substrate (100).

[0091] A pixel circuit (PC) including a thin-film transistor (TFT) and a storage capacitor (Cst) may be disposed on a buffer layer (111). The thin-film transistor (TFT) may include a semiconductor layer (A), a gate electrode (G) that overlaps with the channel region of the semiconductor layer (A), and a source electrode (S) and a drain electrode (D) respectively connected to the source region and the drain region of the semiconductor layer (A). A gate insulating layer (112) may be interposed between the semiconductor layer (A) and the gate electrode (G), and a first interlayer insulating layer (113) and a second interlayer insulating layer (114) may be disposed between the gate electrode (G) and the source electrode (S), and between the gate electrode (G) and the drain electrode (D).

[0092] A storage capacitor (Cst) may be placed in overlap with a thin-film transistor (TFT). The storage capacitor (Cst) may include a first capacitor plate (CE1) and a second capacitor plate (CE2) that overlap each other. In one embodiment, the gate electrode (G) of the thin-film transistor (TFT) may be integrally formed with the first capacitor plate (CE1) of the storage capacitor (Cst). A first interlayer insulating layer (113) may be placed between the first capacitor plate (CE1) and the second capacitor plate (CE2).

[0093] The semiconductor layer (A) may include a channel region, an impurity-doped source region, and a drain region. In one embodiment, the semiconductor layer (A) may include a silicon semiconductor material. In one embodiment, the semiconductor layer (A) may include polysilicon or amorphous silicon. In one embodiment, the semiconductor layer (A) may include an oxide semiconductor material. In one embodiment, a plurality of thin-film transistors (TFTs) are included within a pixel circuit (PC), and some of the plurality of thin-film transistors (TFTs) may include a silicon semiconductor material, while other thin-film transistors (TFTs) may include an oxide semiconductor material. When the semiconductor layer (A) includes an oxide semiconductor material, for example, it may include an oxide of at least one material selected from the group comprising indium (In), gallium (Ga), tin (Sn), zirconium (Zr), hafnium (Hf), titanium (Ti), and zinc (Zn).

[0094] The gate insulating layer (112) may include an inorganic insulating material such as silicon oxide, silicon oxynitride, or silicon nitride, and may be a single layer or multilayer structure including the aforementioned material.

[0095] The gate electrode (G) or the first capacitor plate (CE1) may include a low-resistance conductive material such as molybdenum (Mo), aluminum (Al), copper (Cu) and / or titanium (Ti), and may be a single layer or multilayer structure made of the aforementioned material.

[0096] The first interlayer insulating layer (113) may include an inorganic insulating material such as silicon oxide, silicon oxynitride, or silicon nitride, and may be a single layer or multilayer structure including the aforementioned material.

[0097] The second capacitor (CE2) may include aluminum (Al), chromium (Cr), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may be a single layer or multilayer structure including the aforementioned materials.

[0098] The second interlayer insulating layer (114) may include an inorganic insulating material such as silicon oxide, silicon oxynitride, or silicon nitride, and may be a single layer or multilayer structure including the aforementioned material.

[0099] The source electrode (S) or drain electrode (D) may include aluminum (Al), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may be a single layer or multilayer structure including the aforementioned materials. For example, the source electrode (S) or drain electrode (D) may be a three-layer structure of titanium layer / aluminum layer / titanium layer (Ti / Al / Ti).

[0100] The first planarizing insulating layer (117) may include a material different from at least one inorganic insulating layer (IOL) disposed therebelow, such as a buffer layer (111), a gate insulating layer (112), a first interlayer insulating layer (113), and a second interlayer insulating layer (114). The first planarizing insulating layer (117) may include an organic insulating material such as acrylic, BCB (Benzocyclobutene), polyimide, or HMDSO (Hexamethyldisiloxane).

[0101] A second planarizing insulating layer (118) may be disposed on the first planarizing insulating layer (117). The second planarizing insulating layer (118) may include an organic insulating material such as acrylic, BCB (Benzocyclobutene), polyimide, or HMDSO (Hexamethyldisiloxane). A contact metal (120) is disposed on the first planarizing insulating layer (117), and a thin film transistor (TFT) and a pixel electrode (210) may be electrically connected through the contact metal (120).

[0102] A pixel electrode (210) may be disposed on a second planarizing insulating layer (118). The pixel electrode (210) may include a reflective film comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof. The pixel electrode (210) may include a reflective film comprising the aforementioned materials, and a transparent conductive film disposed above or / and below the reflective film. The transparent conductive film may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO), etc. In one embodiment, the pixel electrode (210) may have a three-layer structure of ITO layer / Ag layer / ITO layer stacked sequentially.

[0103] The pixel defining film (119) covers the edge of the pixel electrode (210) and may include an opening that exposes the center of the pixel electrode (210). The pixel defining film (119) may include an organic insulating material such as BCB (Benzocyclobutene), polyimide, or HMDSO (Hexamethyldisiloxane). A light-emitting region (EA) may be defined through the opening of the pixel defining film (119), and red, green, or blue light may be emitted through the light-emitting region (EA). The area or width of the light-emitting region (EA) may define the area or width of the pixel.

[0104] A spacer (121) can be formed on a pixel defining film (119). The spacer (121) can prevent damage to the layers below the spacer (121) by a mask during the formation process of an intermediate layer (220), etc., to be described later. In one embodiment, the spacer (121) may include the same material as the pixel defining film (119) or may include different materials. For example, if the spacer (121) includes the same material as the pixel defining film (119), the spacer (121) and the pixel defining film (119) can be formed integrally through a half-tone mask.

[0105] The intermediate layer (220) includes a light-emitting layer that overlaps with the pixel electrode (210). The light-emitting layer may include an organic material. The light-emitting layer may include a high-molecular-weight organic material or a low-molecular-weight organic material that emits light of a predetermined color. The light-emitting layer may be formed through a deposition process using a mask as described above.

[0106] A first functional layer and a second functional layer may be disposed below and / or above the light-emitting layer, respectively. In one embodiment, unlike the light-emitting layer being patterned and disposed for each pixel, the first functional layer and the second functional layer may be integrally provided across the entire front surface of the display area (DA).

[0107] The first functional layer may be a single layer or a multilayer. For example, if the first functional layer is formed from a polymer material, the first functional layer may be formed from polyethylene dihydroxythiophene (PEDOT) or polyaniline (PANI) as a single-layer hole transport layer (HTL). If the first functional layer is formed from a low-molecular-weight material, the first functional layer may include a hole injection layer (HIL) and a hole transport layer (HTL).

[0108] The second functional layer may be optional. For example, if the first functional layer and the light-emitting layer are formed from a polymer material, it may be desirable to form a second functional layer. The second functional layer may be a single layer or a multilayer. The second functional layer may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0109] The counter electrode (230) may be made of a conductive material having a relatively low work function. For example, the counter electrode (230) may include a (semi)transparent layer comprising silver (Ag), magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof. Alternatively, the counter electrode (230) may further include a layer such as ITO, IZO, ZnO, or In2O3 on the (semi)transparent layer comprising the aforementioned materials. In one embodiment, the counter electrode (230) may include silver (Ag) and magnesium (Mg).

[0110] A stacked structure of sequentially stacked pixel electrodes (210), intermediate layers (220), and counter electrodes (230) can form a light-emitting diode, such as an organic light-emitting diode (OLED). A display layer (200) comprising a pixel circuit (PC), insulating layers, and an organic light-emitting diode (OLED) can be covered by a thin film encapsulation layer (300).

[0111] The thin film encapsulation layer (300) may include first and second inorganic encapsulation layers (310, 330) and an organic encapsulation layer (320) between them.

[0112] The first and second inorganic encapsulation layers (310, 330) may each include one or more inorganic insulating materials. The inorganic insulating materials may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, or / and silicon oxynitride. The first and second inorganic encapsulation layers (310, 330) may be formed via chemical vapor deposition.

[0113] The organic encapsulation layer (320) may include a polymer-based material. Polymer-based materials may include acrylic resin, epoxy resin, polyimide, and polyethylene. For example, the organic encapsulation layer (320) may include an acrylic resin, such as polymethyl methacrylate or polyacrylic acid. The organic encapsulation layer (320) may be formed by curing a monomer or by applying a polymer.

[0114] The thin film encapsulation layer (300) covers the entire display area (DA) and can be positioned to extend toward the peripheral area (NDA) to cover a portion of the peripheral area (NDA). The thin film encapsulation layer (300) can extend to the outer region of the driving voltage supply line (60).

[0115] On the upper part of the thin film encapsulation layer (300), that is, on the display layer (DU), an input sensing layer (TU) and an optical function layer (OU), as described with reference to FIG. 2a, etc., may be further disposed. Meanwhile, with reference to the surrounding area (NDA), a dam (DM) may be disposed on the surrounding area (NDA) adjacent to the display area (DA). The dam (DM) may be disposed to surround the display area (DA) as described with reference to FIG. 4.

[0116] FIG. 6 illustrates that the dam (DM) includes a first dam (DM1) and a second dam (DM2), but in other embodiments, it is possible to have only the first dam (DM1) or to have additional partitions adjacent to the second dam (DM2). The first dam (DM1) and the second dam (DM2) may be arranged to surround the display area (DA). Additionally, the first dam (DM1) and the second dam (DM2) may be arranged spaced apart from each other. A valley may be provided between the first dam (DM1) and the display area (DA), and between the first dam (DM1) and the second dam (DM2), respectively. These first dam (DM1), second dam (DM2), and the valley structure formed therefrom may serve to prevent the organic encapsulation layer (320) of the thin film encapsulation layer (300) from overflowing toward the edge of the substrate (100).

[0117] The organic encapsulation layer (320) may be in contact with the inner surface of the first dam (DM1) facing the display area (DA). At this time, the statement that the organic encapsulation layer (320) is in contact with the inner surface of the first dam (DM1) can be understood as the first inorganic encapsulation layer (310) being located between the organic encapsulation layer (320) and the first dam (DM1), and the organic encapsulation layer (320) being in direct contact with this first inorganic encapsulation layer (310). The first inorganic encapsulation layer (310) and the second inorganic encapsulation layer (330) are placed on the first dam (DM1) and the second dam (DM2), and may extend toward the edge of the substrate (100).

[0118] The first dam (DM1) and the second dam (DM2) may be located on the first flattening insulation layer (117). The first flattening insulation layer (117) extends into the surrounding area (NDA), and the first dam (DM1) and the second dam (DM2) may be placed on the first flattening insulation layer (117) that extends into the surrounding area (NDA). Of course, the first flattening insulation layer (117) may also be patterned and utilized as a layer constituting the first dam (DM1) and the second dam (DM2).

[0119] The first dam (DM1) may include a part (118P1) of the second flattening insulating layer (118) and a part (119P1) of the pixel defining film (119), and the second dam (DM2) may include a part (118P2) of the second flattening insulating layer (118), a part (119P2) of the pixel defining film (119), and a part (121P2) of the spacer (121). In another embodiment, the first dam (DM1) and the second dam (DM2) may further include parts of other layers, and some of the layers described above may be omitted.

[0120] The driving voltage supply line (60) (i.e., power supply line) may be positioned to overlap at least partially with the dam (DM). The driving voltage supply line (60) may extend past the lower part of the first dam (DM1) to the second dam (DM2). In one embodiment, the driving voltage supply line (60) may include the same material as the source electrode (S) and drain electrode (D) of a thin-film transistor (TFT). The driving voltage supply line (60) may be electrically connected to the opposing electrode (230) by connecting to the connecting electrode (60a) located above. The connecting electrode (60a) may be positioned on the same layer as the contact metal (120) described later and may include the same material. In some cases, the driving voltage supply line (60) and the opposing electrode (230) may be directly connected without the connecting electrode (60a).

[0121] As described above through FIG. 4, the surrounding area (NDA) may include a bending area (BA) in at least a portion. The bending area (BA) may be spaced apart from the first dam (DM1) and the second dam (DM2). In one embodiment, the inorganic insulating layer (IOL) corresponding to the bending area (BA) may have an opening (IOL-OP). That is, the inorganic insulating layer (IOL) positioned corresponding to the bending area (BA) may be removed from the bending area (BA). FIG. 6 illustrates that the inorganic insulating layer (IOL) corresponding to the bending area (BA) is completely removed, but in another embodiment, the buffer layer (111) may remain partially or entirely unremoved. In this way, by removing part or all of the inorganic insulating layer (IOL) located on the bending area (BA), crack propagation by the inorganic insulating layer (IOL) during the bending of the substrate (100) can be prevented.

[0122] In one embodiment, a barrier (PW) may be located on the bending region (BA). As described above, if an inorganic film is located on the bending region (BA), cracks may occur in the inorganic film; therefore, the barrier (PW) may generally include an organic insulating material. In one embodiment, the barrier (PW) may include a part (117P3) of the first flattening insulating layer (117), a part (118P3) of the second flattening insulating layer (118), a part (119P3) of the pixel defining film (119), and a part (121P3) of the spacer (121). In another embodiment, the barrier structure on the bending region (BA) may be omitted.

[0123] Meanwhile, a connecting wire (CW) may be placed on the bending region (BA). The connecting wire (CW) may be part of the fan-out wire (FW) of FIG. 4. The fan-out wire (FW) can transmit data signals to each pixel through the connecting wire (CW) located on the bending region (BA). In one embodiment, the connecting wire (CW) may be interposed between a first organic layer, which is part (117P3) of the first planarizing insulating layer (117), and a second organic layer, which is part (118P3) of the second planarizing insulating layer (118). In this case, the connecting wire (CW) may include the same material as the contact metal (120). In another embodiment, the connecting wire (CW) may include the same material as the source electrode (S) of the thin-film transistor (TFT). The metal layer forming the connecting wire (CW) may have a characteristic of superior tensile strength compared to the fan-out wire (FW) placed in the surrounding area (NDA) other than the bending area (BA). In one embodiment, the fan-out wire (FW) placed in the surrounding area (NDA) other than the bending area (BA) may include the same material as the gate electrode (G) of the thin-film transistor (TFT) or the second capacitor plate (CE2) of the storage capacitor (Cst).

[0124] The first inorganic sealing layer (310) and the second inorganic sealing layer (330) of the thin film sealing layer (300) may extend toward the partition wall (PW). In one embodiment, the ends of the first inorganic sealing layer (310) and the second inorganic sealing layer (330) may overlap with the partition wall (PW) as shown in FIG. 6. That is, the ends of the first inorganic sealing layer (310) and the second inorganic sealing layer (330) may be located on a part (118P3) of the second flattening insulation layer (118) of the partition wall (PW), but are not necessarily limited thereto.

[0125] Alternatively, in another embodiment, the ends of the first inorganic sealing layer (310) and the second inorganic sealing layer (330) may be located between the second dam (DM2) and the bulkhead (PW). In another embodiment, the ends of the first inorganic sealing layer (310) and the second inorganic sealing layer (330) may be located on the bulkhead (PW), that is, on a part (121P3) of the spacer (121).

[0126] Meanwhile, the first inorganic encapsulation layer (310) and the second inorganic encapsulation layer (330) of the thin film encapsulation layer (300) may extend to the outer edge of the dam (DM) and come into contact with the inorganic insulating layer (IOL). This area may be defined as the inorganic contact area (ICR) below. Corresponding to the inorganic contact area (ICR), an organic layer may not be disposed between the inorganic insulating layer (IOL) and the thin film encapsulation layer (300). The inorganic contact area (ICR) may serve to prevent the inflow of moisture, etc., which can penetrate from the edge of the substrate (100).

[0127] FIG. 7 is a plan view schematically illustrating a part of a display device according to an embodiment of the present invention, and FIG. 8 is an enlarged view of a part of FIG. 7. FIG. 7 may correspond to area D of FIG. 5.

[0128] Referring to FIGS. 7 and 8, fan-out wiring (FW) may be placed in the weapon contact area (ICR). Although the fan-out wiring (FW) is omitted in FIG. 5 for convenience of explanation, the fan-out wiring (FW) may be placed in the weapon contact area (ICR) and on the surrounding area (NDA) between the terminal part (40) and the display area (DA).

[0129] In one embodiment, the fan-out wiring (FW) may include a first wiring (FW1) and a second wiring (FW2) arranged alternately. The first wiring (FW1) and the second wiring (FW2) may be arranged on different layers. The fan-out wiring (FW) may have a shape that is densely arranged with small spacing in the portion adjacent to the terminal portion (40) and spreads out radially as it approaches the display area (DA). In this case, the fan-out wiring (FW) corresponding to the weapon contact area (ICR) may be arranged in an oblique direction that intersects simultaneously with the first direction (e.g., x-direction) and the second direction (e.g., y-direction), as shown in FIG. 7. That is, the fan-out wiring (FW) may be arranged in a third direction (e.g., w-direction) that is tilted at a predetermined angle to intersect simultaneously with the first direction (e.g., x-direction) and the second direction (e.g., y-direction).

[0130] In the inorganic contact area (ICR), a connection line (62) of the driving voltage supply line (60) may be located in overlap with the fan-out wiring (FW). The fan-out wiring (FW) is covered with an inorganic insulating film, and the connection line (62) may be located on the inorganic insulating film. The connection line (62) may be arranged in a second direction (e.g., y-direction) to cross the inorganic contact area (ICR).

[0131] The edge of the connecting line (62) may have a plurality of protrusion patterns (PP). The plurality of protrusion patterns (PP) may extend in a third direction (e.g., w direction) that intersects the first direction (e.g., x direction) and the second direction (e.g., y direction) simultaneously. In other words, the direction in which the plurality of protrusion patterns (PP) extend may be the same direction as the direction in which the fan-out wiring (FW) is arranged.

[0132] Each of the plurality of protrusion patterns (PP) extends in a third direction (e.g., w-direction) and may have a plurality of irregularities (e) on its edge. The plurality of irregularities (e) may have a rounded shape. A rounded shape may mean a shape consisting of rounded curves with no sharp edges. The plurality of irregularities (e) formed on each of the plurality of protrusion patterns (PP) may represent, for example, a waveform in the form of a trigonometric function, i.e., a wave shape. Each of the plurality of protrusion patterns (PP) may have a shape in which a plurality of irregularities (e) are symmetrically formed in a wave shape on both sides with respect to the first axis (AX1).

[0133] Referring to the enlarged FIG. 8, the plurality of irregularities (e) formed on each plurality of protrusion patterns (PP) have a wave shape as described above, and each has a portion corresponding to a crest (e1) and a trough (e2). The portion corresponding to the crest (e1) and the trough (e2) is defined as a vertex (e1e2) below.

[0134] In FIG. 7, the wave-shaped multiple irregularities (e) formed on each of the multiple protrusion patterns (PP) include 10 crests (e1) and 9 ridges (e2), but are not necessarily limited thereto, and it is understood that each of the multiple protrusion patterns (PP) can be modified according to the extended length. For example, the wave-shaped multiple irregularities (e) formed on each of the multiple protrusion patterns (PP) may include at least 1 crest (e1) and at least 1 ridge (e2). When the wave-shaped multiple irregularities (e) formed on each of the multiple protrusion patterns (PP) include 1 crest (e1) and 1 ridge (e2), the multiple protrusion patterns (PP) arranged along the second direction (e.g., y-direction) can form a zipper pattern.

[0135] In one embodiment, the vertices (e1e2) of each plurality of protrusion patterns (PP) may be located on the fan-out wiring (FW). In other words, the vertices (e1e2) of each plurality of protrusion patterns (PP) may be located on the first wiring (FW1) or the second wiring (FW2), but may not be located between the first wiring (FW1) and the second wiring (FW2).

[0136] In one embodiment, the vertices (e1e2) of each of the plurality of protrusion patterns (PP) are located on the fan-out wiring (FW), and may be located only on the same wiring among the first wiring (FW1) or the second wiring (FW2). In other words, the vertices (e1e2) of each of the plurality of protrusion patterns (PP) may all be located on the first wiring (FW1), or the vertices (e1e2) of each of the plurality of protrusion patterns (PP) may all be located on the second wiring (FW2).

[0137] FIG. 9 is a schematic cross-sectional view illustrating a part of a display device according to one embodiment of the present invention, and FIG. 10 is a modified example of FIG. 9. FIG. 9 may correspond to a cross-section taken along the line D-D' of FIG. 8.

[0138] Referring to FIG. 9, a structure corresponding to an inorganic contact area (ICR) is illustrated. On the inorganic contact area (ICR), an inorganic insulating layer (IOL) disposed on the substrate (100), a fan-out wiring (FW), and a first inorganic encapsulation layer (310) and a second inorganic encapsulation layer (330) of a thin film encapsulation layer (300) disposed on the inorganic insulating layer (IOL) covering the fan-out wiring (FW) may be located. FIG. 9 is a cross-section taken along the line D-D' of FIG. 8, but the thin film encapsulation layer (300) was omitted in FIG. 8 for convenience of explanation.

[0139] The fan-out wiring (FW) may include a first wiring (FW1) and a second wiring (FW2) arranged alternately. The first wiring (FW1) and the second wiring (FW2) may be arranged on different layers. For example, the first wiring (FW1) may be arranged on a gate insulating layer (112), and the second wiring (FW2) may be arranged on a first interlayer insulating layer (113).

[0140] Referring to FIG. 6, the first wiring (FW1) may be placed on the same layer as the gate electrode (G) of the thin-film transistor (TFT), and the second wiring (FW2) may be placed on the same layer as the second capacitor plate (CE2) of the storage capacitor (Cst). At this time, "placed on the same layer" means that they are formed simultaneously by the same mask process during the manufacturing process, and thus can be understood as being formed of the same material.

[0141] A connection line (62) of a driving voltage supply line (60) may be located on the inorganic insulating layer (IOL). The connection line (62) may extend in a second direction (e.g., y-direction) across the inorganic contact area (ICR). FIG. 9 illustrates a cross-section of a plurality of protrusion patterns (PP) located at the end of the connection line (62).

[0142] In one embodiment, the connecting line (62), i.e., the plurality of protrusion patterns (PP), may be provided with a triple-layer structure. Although a cross-section of the connecting line (62) is shown in FIG. 7, the driving voltage supply line (60), including the main line (61) and the connecting line (62), may have a triple-layer structure overall. The plurality of protrusion patterns (PP) may include a first layer (62a), a third layer (62c), and a second layer (62b) interposed between them. For example, the first layer (62a) and the third layer (62c) may contain the same material, and the second layer (62b) may contain a different material from the first layer (62a) and the third layer (62c). For example, the first layer (62a) and the third layer (62c) may contain titanium (Ti), and the second layer (62b) may contain aluminum (Al).

[0143] The ends of the plurality of protrusion patterns (PP) described with reference to FIGS. 7 to 9 may have an undercut structure. Each end of the first layer (62a) and the third layer (62c) of the plurality of protrusion patterns (PP) may have a protruding tip (PT) that protrudes more than the end of the second layer (62b). This structure may be caused by a difference in etching rates between the metal material forming the first layer (62a) and the third layer (62c) and the metal material forming the second layer (62b). In the case of the driving voltage supply line (60), since it is exposed to the outside when forming a pattern such as the pixel electrode (210) of FIG. 6, the edges are exposed to the etching solution, and as a result, a shape such as FIG. 9 may be formed.

[0144] As described above with reference to FIGS. 7 and 8, the vertices (e1e2) of each plurality of protrusion patterns (PP) may be located on the fan-out wiring (FW), and the vertices (e1e2) of each plurality of protrusion patterns (PP) (corresponding to the peak (e1) portion in FIG. 9) may be based on the ends (62ae, 62ce), i.e., tips (PT), of the first layer (62a) and the third layer (62c), respectively.

[0145] The end of the second layer (62b) is recessed inward from the tip (PT), so that an undercut space (UC) is formed between the tip (PT) of the first layer (62a) and the third layer (62c) and the end (62be) of the second layer (62b). As in this embodiment, when the vertices (e1e2) of a plurality of protrusion patterns (PP) are located on the fan-out wiring (FW), the tips (PT) of the first layer (62a) and the third layer (62c) can be positioned upward (+z direction) as shown in FIG. 9.

[0146] The first inorganic encapsulation layer (310) and the second inorganic encapsulation layer (330) of the thin film encapsulation layer (300) may be arranged to cover the undercut space (UC) entirely. More specifically, the first inorganic encapsulation layer (310) is arranged to contact the tip (PT) of each of the first layer (62a) and the third layer (62c) that formed the undercut space (UC), and the end (62be) of the second layer (62b) along the structure of these, so that the undercut space (UC) can be filled by the first inorganic encapsulation layer (310) and the second inorganic encapsulation layer (330). At this time, the tip (PT) of each of the first layer (62a) and the third layer (62c) is arranged facing upward (+z direction), thereby enabling the first inorganic encapsulation layer (310) to fill the undercut space (UC) more effectively.

[0147] As a comparative example, when the vertices (e1e2) of the multiple protrusion patterns (PP) are located between the first wiring (FW1) and the second wiring (FW2) rather than on the fan-out wiring (FW), the tips (PT) of the first layer (62a) and the third layer (62c) are positioned facing downward (-z direction). In this case, the space is difficult to fill with the first inorganic sealing layer (310) because the tips (PT) of the first layer (62a) and the third layer (62c) are positioned facing downward (-z direction), and therefore the undercut space (UC) exists as a void. Since this void acts as a path for moisture permeability, moisture penetrating through it can cause reliability failures that damage various components and circuits.

[0148] Accordingly, the vertices (e1e2) of a plurality of protrusion patterns (PP) according to one embodiment of the present invention may be positioned on the fan-out wiring (FW), that is, the first wiring (FW1) or the second wiring (FW2). Through this structure, the tips (PT) of the first layer (62a) and the third layer (62c), respectively, are arranged facing upward (+z direction), and the first inorganic encapsulation layer (310) and the second inorganic encapsulation layer (330) of the thin film encapsulation layer (300) can efficiently cover the undercut space (UC) to prevent or minimize the occurrence of voids in the undercut space (UC).

[0149] FIG. 9 illustrates a case where the vertices (e1e2) of each of the plurality of protrusion patterns (PP) are all located on the second wiring (FW2), and FIG. 10 illustrates a case where the vertices (e1e2) of each of the plurality of protrusion patterns (PP) are all located on the first wiring (FW1). In the case where the vertices (e1e2) of each of the plurality of protrusion patterns (PP) are all located on the second wiring (FW2) as in FIG. 9, since the second wiring (FW2) is located on an upper layer than the first wiring (FW1), the tips (PT) of each of the first layer (62a) and the third layer (62c) are arranged relatively further upward (+z direction), so the first inorganic encapsulation layer (310) has the effect of covering the undercut space (UC) more effectively.

[0150] Meanwhile, reference may be made to FIGS. 12 and FIGS. 13 for other embodiments. FIGS. 12 and FIGS. 13 show that the plurality of protrusions (e) formed on each of the plurality of protrusion patterns (PP) have a wave shape as described above, but are arranged in a direction intersecting the direction in which the fan-out wiring (FW) is arranged, rather than in the same direction. That is, the plurality of protrusion patterns (PP) can be arranged to extend in a first direction (e.g., x-direction) or a second direction (e.g., y-direction). These plurality of protrusion patterns (PP) can extend the penetration path of moisture through the inorganic contact area (ICR), thereby having the effect of preventing moisture penetration.

[0151] The plurality of protrusion patterns (PP) of FIG. 12 may have a plurality of irregularities (e) in a wave shape as described above with reference to FIG. 7 and FIG. 8. In another embodiment, as shown in FIG. 13, the plurality of protrusion patterns (PP) may be formed as a zipper pattern. That is, the shape and arrangement direction of the plurality of protrusion patterns (PP) can be freely modified. By providing the plurality of protrusion patterns (PP) at the edge of the connection line (62) located on the inorganic contact area (ICR) through the plurality of protrusion patterns (PP), the penetration path of moisture entering through the undercut space (UC, FIG. 9 and FIG. 10) at the edge of the connection line (62) on the inorganic contact area (ICR) can be extended, and substantially, the shape and extension direction of the plurality of protrusion patterns (PP) can be modified.

[0152] FIG. 11 is a plan view schematically illustrating a part of a display device according to one embodiment of the present invention.

[0153] FIG. 11 is a modified example of FIG. 5, differing in the shape of the connection line (62) of the driving voltage supply line (60) on the inorganic contact area (ICR). The rest of the configuration is the same as described above with reference to FIG. 5, so the following description will focus on the difference in the shape of the connection line (62).

[0154] The connection line (62) of the driving voltage supply line (60) placed on the weapon contact area (ICR) may include a bent portion (62p) that extends toward the display area (DA). The bent portion (62p) may extend outward from the end of the driving voltage supply line (60), i.e., the end of the connection line (62). In FIG. 11, the bent portion (62p) is bent once to form a shape like 'L', but in other embodiments, the bent portion (62p) may be bent two or more times.

[0155] A plurality of protrusion patterns (PP) may be located on the edge of the fold portion (62p). The plurality of protrusion patterns (PP) may have, for example, a zipper pattern, or may have a shape as described with reference to FIG. 7. In addition, the cross-sectional shape of FIG. 9 described above may be applied in the same way to the plurality of protrusion patterns (PP) of the fold portion (62p) of FIG. 11.

[0156] In this way, a bend (62p) is placed at the end of the driving voltage supply line (60), i.e., the connection line (62), which is placed on the weapon contact area (ICR), and a plurality of protrusion patterns (PP) are provided on the edge of the bend (62p), thereby making the moisture penetration path longer and thus effectively preventing moisture penetration.

[0157] Although the invention has been described primarily with respect to display devices, it is not limited thereto. For example, a manufacturing method for forming such a display device is also considered to fall within the scope of the invention.

[0158] The present invention has been described with reference to the embodiments illustrated in the drawings, but this is merely illustrative, and those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present invention should be determined by the technical spirit of the appended claims. Explanation of the symbols

[0159] 100: Substrate IOL: Inorganic insulating layer 300: Thin film encapsulation layer 310: 1st Inorganic Sealing Layer 320: Organic bag layer 330: Second inorganic sealing layer 60: Driving voltage supply line 70: Common voltage supply line ICR: Weapon Contact Area PP: Multiple protrusion patterns

Claims

Claim 1 A substrate having a display area having a plurality of display elements and a peripheral area in contact with the display area; an inorganic insulating layer disposed on the display area and the peripheral area; a thin film encapsulation layer disposed on the display elements and comprising a first inorganic encapsulation layer, a second inorganic encapsulation layer, and an organic encapsulation layer disposed between the first inorganic encapsulation layer and the second inorganic encapsulation layer; a dam disposed on the peripheral area to surround the display area; and fan-out wiring disposed on the peripheral area to transmit signals to the plurality of display elements. A display device comprising: a power supply line disposed on the surrounding area such that at least a portion overlaps with the fan-out wiring; wherein the first inorganic sealing layer and the second inorganic sealing layer include an inorganic contact area that extends to the outer edge of the dam and contacts the inorganic insulating layer, and a plurality of protrusion patterns are located at the end of the power supply line that overlaps with the inorganic contact area, and the power supply line includes a main line extended in a first direction and a connecting line extended in a second direction that intersects the first direction, and each of the plurality of protrusion patterns extends in a third direction that intersects the first direction and the second direction simultaneously. Claim 2 delete Claim 3 A display device according to claim 1, wherein each of the plurality of protrusion patterns comprises a plurality of irregularities extended in the third direction. Claim 4 In paragraph 3, the plurality of irregularities have a rounded wave shape, a display device. Claim 5 A display device according to claim 4, wherein the fan-out wiring comprises a first wiring and a second wiring that is positioned on the first wiring which is on a different layer from the first wiring and is arranged alternately with the first wiring, and the vertices corresponding to the crests and valleys of each of the plurality of irregularities are located on the same wiring among the first wiring and the second wiring. Claim 6 In claim 5, the vertices corresponding to the crests and valleys of each of the plurality of protrusion patterns are located on the second wiring, in a display device. Claim 7 A display device according to claim 5, wherein each of the first wiring and the second wiring is arranged in a third direction that intersects simultaneously with the first direction and the second direction. Claim 8 A display device according to claim 1, wherein the power supply line is disposed on the inorganic insulating layer, and at least a portion of the power supply line is in direct contact with the first inorganic encapsulation layer in the inorganic contact area. Claim 9 In claim 8, the plurality of protrusion patterns are in direct contact with the first inorganic sealing layer extending to the outer edge of the dam, a display device. Claim 10 A display device according to claim 8, wherein the first inorganic encapsulation layer extending to the outer edge of the dam is in direct contact with the inorganic insulation layer. Claim 11 A display device according to claim 1, wherein the power supply line has a triple-layer structure comprising a first layer and a third layer containing the same material, and a second layer interposed between the first layer and the third layer. Claim 12 A display device according to claim 11, wherein the first layer and the third layer of the power supply line comprise titanium (Ti), and the second layer comprises aluminum (Al). Claim 13 A display device according to claim 11, wherein each end of the first layer and the third layer has a tip protruding more than the end of the second layer. Claim 14 A display device according to claim 13, wherein the end of the second layer is recessed inwardly from the tip of each of the first layer and the third layer, and an undercut space is provided between the tip of each of the first layer and the third layer and the end of the second layer. Claim 15 In paragraph 14, the display device wherein the first inorganic encapsulation layer is positioned to cover between the tips of each of the first layer and the third layer. Claim 16 In item 15, the display device wherein the first inorganic encapsulation layer is in direct contact with the side of the second layer. Claim 17 A display device according to claim 1, further comprising: a thin-film transistor comprising a semiconductor layer on the display area, a gate electrode that overlaps at least a portion with the semiconductor layer, and an electrode layer disposed on the gate electrode and connected to the semiconductor layer; and a connecting metal disposed on the thin-film transistor and connected to the electrode layer; wherein the power supply line comprises the same material as the electrode layer or the connecting metal. Claim 18 A display device according to claim 17, wherein the fan-out wiring comprises a first wiring and a second wiring positioned on the first wiring which is a different layer from the first wiring and arranged alternately with the first wiring, and further comprises an upper electrode interposed between the gate electrode and the electrode layer and overlapping at least partially with the gate electrode, wherein the first wiring comprises the same material as the gate electrode and the second wiring comprises the same material as the upper electrode. Claim 19 A display device according to claim 1, wherein, on a plane, the end of the power supply line includes a bent portion extending toward the display area. Claim 20 In claim 19, the plurality of protrusion patterns are a display device provided at the end of the bend portion. Claim 21 A display device comprising: a substrate having a display area having a plurality of display elements and a peripheral area in contact with the display area; an inorganic insulating layer disposed on the display area and the peripheral area; an encapsulation layer disposed on the display elements and having a first inorganic encapsulation layer; a fan-out wiring disposed on the peripheral area to transmit a signal to the plurality of display elements and disposed at an angle on a plane; and a power supply line disposed on the peripheral area such that at least a portion overlaps with the fan-out wiring and includes a plurality of protrusion patterns on the edge, wherein the plurality of protrusion patterns are extended to be angled in a direction parallel to the fan-out wiring on an inorganic contact area where the first inorganic encapsulation layer and the inorganic insulating layer are in contact. Claim 22 A display device according to claim 21, further comprising a dam disposed on the surrounding area to surround the display area, wherein the inorganic contact area is an area in which the first inorganic sealing layer extends outward from the dam and contacts the inorganic insulating layer. Claim 23 A display device according to claim 21, wherein each of the plurality of protrusion patterns has a wave shape extending in a direction parallel to the fan-out wiring. Claim 24 In paragraph 23, a display device wherein the vertices corresponding to the crests and troughs of the wave shape are located on the fan-out wiring. Claim 25 A display device according to claim 24, wherein first vertices corresponding to the crests of the wave shape are located on the first wiring of the fan-out wiring, and second vertices corresponding to the troughs of the wave shape are located on the second wiring of the fan-out wiring. Claim 26 A display device according to claim 21, wherein the power supply line is a triple-layer structure comprising a first layer and a third layer containing the same material, and a second layer interposed between the first layer and the third layer. Claim 27 A display device according to claim 26, wherein each end of the first layer and the third layer has a tip protruding more than the end of the second layer.

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