Mac address synchronization methods, data exchange device and storage medium

Abstract

The present disclosure belongs to the field of communications. Provided in the embodiments are MAC address synchronization methods, a data exchange device and a storage medium. A method comprises: a software platform acquires a first MAC address entry reported by a bottom-layer switching chip, the first MAC address entry comprising a message data logical port; according to the first MAC address entry and a first preset relationship group, generating a second MAC address entry, the second MAC address entry comprising a message data physical port; according to the second MAC address entry, generating a third MAC address entry, the third MAC address entry comprising the message data logical port; and issuing the third MAC address entry to the bottom-layer switching chip, so that the bottom-layer switching chip updates according to the third MAC address entry.

Description

MAC address synchronization method, data exchange device and storage medium

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This disclosure is based on Chinese patent application CN202310799643.6, filed on June 30, 2023, entitled “MAC address synchronization method, data exchange device and storage medium”, and claims the priority of the patent application, and all the contents disclosed therein are incorporated into this disclosure by reference. Technical Field

[0003] The present disclosure relates to the field of communication technology, and in particular to a MAC address synchronization method, a data exchange device, and a storage medium. Background Art

[0004] A VLAN (Virtual Local Area Network) logically divides a physical LAN into multiple broadcast domains. Hosts within the same VLAN can communicate directly, but hosts in different VLANs cannot. This restricts broadcast packets to a single VLAN. VLAN mapping enables communication between different VLANs. Because hosts in different VLANs cannot directly access each other, it improves network security.

[0005] Currently, the "many-to-one" VLAN translation scenario is gaining increasing attention and recognition in the industry. However, when data switching equipment enables multiple users to access the same VLAN, the software platform cannot identify the logical port from the MAC (Media Access Control) address entries reported by the underlying switching chip. This leads to inconsistent MAC address aging between the software platform and the underlying switching chip.

[0006] Summary of the Invention

[0007] The embodiments of the present disclosure provide a MAC address synchronization method, a data exchange device, and a storage medium, which aim to solve the problem of inconsistent MAC address aging between the software platform and the underlying switching chip.

[0008] In a first aspect, an embodiment of the present disclosure provides a MAC address synchronization method, which is applied to a software platform of a data exchange device, wherein the data exchange device also includes an underlying switching chip, and the method includes: obtaining a first MAC address entry reported by the underlying switching chip, the first MAC address entry including the MAC address, logical port and network side VLAN of the message data; generating a second MAC address entry based on the first MAC address entry and a first preset relationship group; wherein the second MAC address entry includes the physical port, MAC address, user side VLAN and network side VLAN of the message data; the first preset relationship group includes multiple correspondences between at least two parameters for characterizing the logical port, physical port, user side VLAN and network side VLAN; generating a third MAC address entry based on the second MAC address entry; wherein the third MAC address entry includes the logical port, MAC address, network side VLAN and next hop identifier of the message data; and sending the third MAC address entry to the underlying switching chip so that the underlying switching chip is updated according to the third MAC address entry.

[0009] In the second aspect, an embodiment of the present disclosure also provides a MAC address synchronization method, which is applied to the underlying switching chip of a data exchange device, and the data exchange device also includes a software platform. The method includes: generating a first MAC address entry, the first MAC address entry including the MAC address, logical port and network side VLAN of the message data; reporting the first MAC address entry to the software platform, so that the software platform generates a second MAC address entry based on the first MAC address entry and the first preset relationship group, and generates a third MAC address entry based on the second MAC address entry; wherein the second MAC address entry includes the physical port, MAC address, user side VLAN and network side VLAN of the message data, and the third MAC address entry includes the logical port, MAC address, network side VLAN and next hop identifier of the message data; receiving the third MAC address entry issued by the software platform, and updating it according to the third MAC address entry.

[0010] In a third aspect, an embodiment of the present disclosure further provides a data exchange device, which includes a software platform and an underlying switching chip. The software platform is configured to implement a MAC address synchronization method applied to the software platform as described in any one of the embodiments of the present disclosure, and the underlying switching chip is configured to implement a MAC address synchronization method applied to the underlying switching chip as described in any one of the embodiments of the present disclosure.

[0011] In a fourth aspect, an embodiment of the present disclosure further provides a storage medium for computer-readable storage, wherein the storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement any MAC address synchronization method provided in an embodiment of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] FIG1 is a schematic diagram of a process flow of a MAC address synchronization method provided by an embodiment of the present disclosure;

[0013] FIG2 is a schematic diagram of a scenario for implementing the MAC address synchronization method provided by an embodiment of the present disclosure;

[0014] FIG3 is a schematic diagram of a sub-step flow chart of the MAC address synchronization method in FIG1 ;

[0015] FIG4 is a schematic diagram of a process flow of another MAC address synchronization method provided by an embodiment of the present disclosure;

[0016] FIG5 is a schematic block diagram of the structure of a data exchange device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0017] The following will clearly and completely describe the technical solutions in the embodiments of the present disclosure in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present disclosure without making any creative efforts shall fall within the scope of protection of the present disclosure.

[0018] The flowcharts shown in the accompanying drawings are for illustrative purposes only and do not necessarily include all contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may be decomposed, combined, or partially merged, so the actual execution order may vary depending on the actual situation.

[0019] It should be understood that the terms used in this disclosure are only for the purpose of describing particular embodiments and are not intended to limit the disclosure. As used in this disclosure and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise.

[0020] Currently, the many-to-one VLAN model is gaining increasing attention and recognition in the industry. This model simplifies VLAN planning in upper-layer networks and reduces network planning and management costs. Many-to-one VLAN conversion converts packets from multiple user-side VLANs received on a port into packets from the network-side VLAN.

[0021] In some data switching devices, many-to-one VLAN conversion is implemented based on logical ports and next hops. This implementation requires that the switching chip support learning and aging of logical ports. However, current software platforms often do not support learning and aging of logical ports and can only support learning and aging of physical ports. Therefore, the aging consistency of the software platform and the switching chip MAC address cannot be guaranteed.

[0022] In view of this, the embodiment of the present disclosure proposes a MAC address synchronization method, which can synchronously realize the update of the physical port on the software platform and the update of the logical port on the underlying switching chip, thereby synchronizing the MAC address entries of the message data on the software platform and the underlying switching chip, thereby ensuring the consistency of MAC address synchronization.

[0023] The present disclosure provides a MAC address synchronization method, a data exchange device, and a storage medium. The MAC address synchronization method can be applied to a data exchange device, which may include but is not limited to switches, routers, and other electronic devices with data exchange or communication relay functions.

[0024] Specifically, the MAC address synchronization method can be applied to a software platform or underlying switching chip in a data exchange device. The software platform can be a software environment that provides a running dependency for implementing underlying data exchange functions. The underlying switching chip can be a circuit module for implementing underlying data exchange functions.

[0025] The following describes some embodiments of the present disclosure in detail with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features therein may be combined with each other.

[0026] Please refer to FIG. 1 , which is a flowchart illustrating the steps of a MAC address synchronization method provided by an embodiment of the present disclosure.

[0027] As shown in FIG1 , the MAC address synchronization method includes steps S101 to S104 and can be applied to a software platform of a data exchange device.

[0028] Step S101: Obtain a first MAC address entry reported by an underlying switch chip.

[0029] The first MAC address entry includes the MAC address of the message data, the logical port, and the network-side VLAN. It should be noted that in a many-to-one VLAN conversion scenario, the underlying switching chip can learn the first MAC address entry based on the logical port and report the first MAC address entry to the software platform.

[0030] Exemplarily, the underlying switching chip obtains a first MAC address entry based on logical port learning, including: the underlying switching chip obtains message data sent by an external device; parses the message data to obtain the physical port and user-side VLAN of the message data; determines the logical port and network-side VLAN of the message data based on the physical port and user-side VLAN of the message data; and merges the MAC address, logical port, and network-side VLAN of the message data to obtain the first MAC address entry.

[0031] For example, as shown in the networking diagram of Figure 2, to simplify the many-to-one VLAN scenario, assume two users access the network: a PC and an IPTV. Packets from the PC and IPTV are sent via gateway 10 to data switching device 20, which then forwards them to upper-level device 30. In data switching device 20, the underlying switching chip parses the packet data sent by the PC and obtains the packet's uplink inbound port as gei_0 / 1 / 1 / 1, MAC address 0000.1111.1111, and user-side VLAN 100. The underlying switching chip parses the packet data sent by IPTV and obtains the packet's uplink inbound port as gei_0 / 1 / 1 / 1, MAC address 0000.2222.2222, and user-side VLAN 200. The underlying switching chip is configured with user-side VLAN and network-side VLAN translation rules. For example, user-side VLAN 100 is translated to network-side VLAN 1000, and user-side VLAN 200 is translated to network-side VLAN 1000. Therefore, based on gei_0 / 1 / 1 / 1+user-side VLAN 100 and gei_0 / 1 / 1 / 1+user-side VLAN 200, the user-side VLANs of the two packets are converted to network-side VLAN 1000, and two logical ports (logicport) are assigned to the two packets. In this example, logicport 210 and logicport 220 are assigned to the two packets. Therefore, the first MAC address entries that can be learned by the uplink ingress port gei_0 / 1 / 1 / 1 of the underlying switch chip are: 0000.1111.1111+VLAN 1000+logicport 210; 0000.2222.2222+VLAN 1000+logicport 220.

[0032] For example, as shown in the network of Figure 2, the upper-level device 30 returns the message data to the data switching device 20, which then forwards the message data to the PC and IPTV through the gateway 10. In the data switching device 20, the underlying switching chip parses the message data sent by the PC and obtains the downstream inbound port of the message data as gei_0 / 1 / 1 / 2, the MAC address as 0000.3333.3333, and the network-side VLAN as 1000. The underlying switching chip parses the message data sent by the IPTV and obtains the downstream inbound port as gei_0 / 1 / 1 / 2, the MAC address as 0000.4444.4444, and the user-side VLAN as 1000. The underlying switching chip allocates the logical port logicport230 to the network-side VLAN 1000. Therefore, the first MAC address entries learned by the downstream ingress gei_0 / 1 / 1 / 2 of the bottom switching chip include: 0000.3333.3333+VLAN1000+logicport230; 0000.4444.4444+VLAN1000+logicport230.

[0033] In one embodiment, the software platform can be responsible for uniformly managing the allocation and recovery of logical ports and next-hop identifiers. For example, the software platform allocates logical ports and next-hop identifiers based on physical ports and user-side VLANs, and stores this information in two data tables: a logical port table containing {physical port, user-side VLAN, logical port}, and a next-hop identifier table containing {physical port, user-side VLAN, next-hop identifier}.

[0034] For example, the software platform finds three sets of idle logical ports and next hop identifiers from the software allocation pool, such as logicport210, logicport220, logicport230, nexthop110, nexthop120, and nexthop130. These values ​​are bound to the physical ports and user-side VLANs, and the software platform saves the corresponding relationships, as shown in Table 1 and Table 2:

[0035] Table 1: Logical port table

[0036] Table 2: Next hop identifier table

[0037] Step S102: Generate a second MAC address entry according to the first MAC address entry and the first preset relationship group.

[0038] The second MAC address entry includes the physical port, MAC address, user-side VLAN, and network-side VLAN of the message data. The first preset relationship group includes multiple correspondences between at least two parameters representing the logical port, physical port, user-side VLAN, and network-side VLAN. By changing the mapping between the first MAC address entry and the second MAC address entry, the software platform can convert unrecognizable logical ports into recognizable physical ports, thereby enabling synchronous updates of the physical and logical ports in subsequent MAC address entries.

[0039] It should be noted that the software platform needs to obtain the second MAC address entry that includes {physical port, MAC address, user-side VLAN, network-side VLAN}. However, the data learned from the first MAC address entry of the underlying switch chip only includes {logical port, MAC address, network-side VLAN}. Therefore, the software platform also needs to know the physical port and user-side VLAN corresponding to the packet data.

[0040] It should be noted that the first preset relationship group may include at least two relationship comparison tables, each relationship comparison table including the correspondence between at least two parameters in the logical port, physical port, user-side VLAN and network-side VLAN, so that the physical port and user-side VLAN corresponding to the message data can be accurately found according to the first MAC address entry.

[0041] In one embodiment, as shown in FIG3 , step S102 includes: sub-steps S1021 to S1023 .

[0042] Sub-step S1021: Determine the physical port of the message data according to the logical port in the first MAC address entry and the first relationship comparison table.

[0043] The first relationship comparison table records the correspondence between physical ports and logical ports. The first MAC address entry records the logical port of the message data, so the physical port of the message data can be accurately found from the first relationship comparison table based on the logical port in the first MAC address entry.

[0044] For example, the first relationship comparison table is shown in Table 3:

[0045] Table 3: First relationship comparison table

[0046] For example, the logical port in the first MAC address entry is logicport210. Through the first relationship comparison table, it can be accurately known that logicport210 corresponds to gei_0 / 1 / 1 / 1, so the physical port of the message data can be found to be Gei_0 / 1 / 1 / 1.

[0047] Sub-step S1022: Determine the user-side VLAN of the message data according to the network-side VLAN in the first MAC address entry, the second relationship comparison table, and the physical port of the message data.

[0048] The second relationship comparison table records the correspondence between the physical port, the user-side VLAN, and the network-side VLAN. The first MAC address entry records the network-side VLAN of the message data. Therefore, based on the network-side VLAN in the first MAC address entry and the physical port found, the user-side VLAN of the message data can be accurately found in the second relationship comparison table.

[0049] For example, the second relationship comparison table is shown in Table 4:

[0050] Table 4: Second relationship comparison table

[0051] In one embodiment, the second relationship comparison table is traversed based on the network side VLAN in the first MAC address entry and the physical port of the message data to find the target user side VLAN corresponding to the first MAC address entry; and the target user side VLAN is determined as the user side VLAN of the message data.

[0052] For example, according to the logical port in the first MAC address entry and the first relationship comparison table, the physical port of the message data is determined to be Gei_0 / 1 / 1 / 1, and the network side VLAN in the first MAC address entry is 1000. Therefore, according to the network side VLAN 1000 in the first MAC address entry and the physical port Gei_0 / 1 / 1 / 1 obtained by the search, the target user side VLAN of the message data can be accurately found out from the second relationship comparison table as 100 and 200.

[0053] In one embodiment, determining the target user-side VLAN as the user-side VLAN of the message data includes: obtaining a third relationship comparison table, the third relationship comparison table recording the correspondence between the physical port, the user-side VLAN, and the logical port; traversing the third relationship comparison table according to the target user-side VLAN and the physical port of the message data to find the target logical port corresponding to both the target user-side VLAN and the physical port; when the target logical port is consistent with the logical port in the first MAC address entry, determining the target user-side VLAN corresponding to the logical port in the first MAC address entry as the user-side VLAN of the message data.

[0054] It should be noted that the third relationship comparison table may be, for example, Table 1 mentioned above, and thus the third relationship comparison table may specifically refer to the logical port table shown in Table 1. Therefore, based on the network-side VLAN in the first MAC address entry and the physical port found, the target logical port of the message data can be accurately found in the third relationship comparison table, and the target user-side VLAN corresponding to the logical port in the first MAC address entry is determined as the user-side VLAN of the message data.

[0055] For example, when the target user-side VLANs include 100 and 200, the third relationship comparison table is traversed to find target logical ports, such as logicport 210 and logicport 220. If the logical port in the first MAC address entry is logicport 210, the user-side VLAN 100 corresponding to logicport 210 can be determined as the user-side VLAN of the message data.

[0056] Exemplarily, referring to the second relationship comparison table and the third relationship comparison table, the second relationship comparison table is traversed according to the physical port gei_0 / 1 / 1 / 1 and the network side VLAN1000 in the first MAC address entry, with the aim of finding out which user-side VLANs the physical port gei_0 / 1 / 1 / 1 and the network side VLAN1000 correspond to. Then, using the traversed physical port gei_0 / 1 / 1 / 1 and the user-side VLAN100 and the user-side VLAN200 as indexes, the third relationship comparison table is traversed to find out the corresponding logical ports, which are logicport210 and logicport220 respectively. When the logical port found in the table is consistent with the logical port in the first MAC address entry reported by the underlying switching chip, it is considered that the user-side VLAN corresponding to the first MAC address entry learned by the underlying switching chip is found.

[0057] Sub-step S1023: Generate a second MAC address entry according to the first MAC address entry, the physical port of the message data, and the user-side VLAN.

[0058] It should be noted that the first MAC address entry includes the MAC address, logical port and network-side VLAN of the message data. By merging the physical port and user-side VLAN of the message data with the MAC address and user-side VLAN in the first MAC address entry, the second MAC address entry that the software platform needs to obtain can be obtained. The second MAC address entry includes {physical port, MAC address, user-side VLAN, network-side VLAN}.

[0059] It is understandable that the above-mentioned first relationship comparison table, second relationship comparison table and third relationship comparison table are only specific examples of the first preset relationship group. In actual applications, the first preset relationship group may also include relationship comparison tables of other contents, and the embodiments of the present disclosure do not specifically limit this.

[0060] Step S103: Generate a third MAC address entry according to the second MAC address entry.

[0061] The second MAC address entry includes the physical port, MAC address, user-side VLAN, and network-side VLAN of the message data. The third MAC address entry includes the logical port, MAC address, network-side VLAN, and next-hop identifier of the message data.

[0062] By changing the mapping between the second MAC address entry and the third MAC address entry, the software platform can convert the physical port that the underlying switching chip cannot recognize into a logical port that it can recognize, and send the third MAC address entry to the underlying switching chip, thereby achieving synchronous updates of the physical port and the logical port in subsequent MAC address entries.

[0063] Exemplarily, based on the second MAC address entry, a logical port and a next hop identifier of the message data are obtained, and based on the second MAC address entry, the logical port and the next hop identifier of the message data, a third MAC address entry is generated. The third MAC address entry includes {logical port, MAC, network-side VLAN, next hop identifier}.

[0064] In one embodiment, after generating the second MAC address entry, the software platform may update the second MAC address entry in the MAC address learning table. When updating the second MAC address entry, the software platform may determine whether the network-side VLAN in the second MAC address entry was learned based on the logical port. If not, the software platform directly writes the second MAC address entry to the underlying switching chip. If the network-side VLAN was learned based on the logical port, the MAC address entry sent to the underlying switching chip must be remapped, for example, only after the third MAC address entry is generated can it be written to the underlying switching chip.

[0065] Among them, the configuration record of the underlying switching chip stores the network-side VLAN corresponding to the logical port learning. By querying the configuration record, you can know whether the network-side VLAN is learned based on the logical port. It should be noted that the underlying switching chip needs to set the MAC address entry for the logical port learning as {logical port, MAC address, network-side VLAN, next hop identifier}. Therefore, it is necessary to map the second MAC address entry {physical port, MAC address, user-side VLAN, network-side VLAN} to the third MAC address entry {logical port, MAC, network-side VLAN, next hop identifier} and then send it to the underlying switching chip.

[0066] In one embodiment, a third MAC address entry is generated based on the second MAC address entry and a second preset relationship group, wherein the second preset relationship group includes a plurality of correspondences between parameters representing at least two of a logical port, a physical port, a user-side VLAN, and a next-hop identifier. The third MAC address entry includes the logical port, MAC address, network-side VLAN, and next-hop identifier of the packet data.

[0067] In one embodiment, the logical port corresponding to the second MAC address entry is determined based on the physical port, user-side VLAN, and a third relationship comparison table in the second MAC address entry; the next hop identifier corresponding to the second MAC address entry is determined based on the logical port corresponding to the second MAC address entry and a fourth relationship comparison table; and the third MAC address entry is generated based on the second MAC address entry, the logical port corresponding to the second MAC address entry, and the next hop identifier. The third relationship comparison table records the correspondence between the physical port, user-side VLAN, and logical port, and the fourth relationship comparison table records the correspondence between the logical port and the next hop identifier.

[0068] It should be noted that the third relationship comparison table can be, for example, Table 1 mentioned above, so the third relationship comparison table can specifically refer to the logical port table shown in Table 1 to accurately obtain the logical port corresponding to the second MAC address entry. The fourth relationship comparison table records the correspondence between the logical port and the next hop identifier. Therefore, based on the logical port corresponding to the second MAC address entry, the next hop identifier of the message data can be accurately found from the fourth relationship comparison table, thereby being able to generate the third MAC address entry {logical port, MAC, network-side VLAN, next hop identifier} based on the second MAC address entry, the logical port corresponding to the second MAC address entry, and the next hop identifier.

[0069] For example, the fourth relationship comparison table is shown in Table 5:

[0070] Table 5: Fourth relationship comparison table

[0071] For example, according to the physical port number gei_0 / 1 / 1 / 1 and cvlan100 and 200, the corresponding logical port numbers logicport210 and logicport220 are found from the third relationship comparison table. After finding the logical port corresponding to the second MAC address entry, the correspondence between the logical port and the next hop nexthop is obtained according to Table 5, that is, logicport210 corresponds to nexthop110, and logicport220 corresponds to nexthop220, so the third MAC address entry {logical port, MAC address, user-side VLAN, next hop identifier} can be generated.

[0072] In one embodiment, the logical port corresponding to the second MAC address entry is determined based on the physical port, user-side VLAN and third relationship comparison table in the second MAC address entry, including: obtaining the user-side VLAN of the message data reported by the underlying switching chip; judging whether the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip; when the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip, traversing the third relationship comparison table based on the physical port and user-side VLAN in the second MAC address entry to find the target logical port corresponding to both the physical port and the user-side VLAN.

[0073] It should be noted that before traversing the third relationship comparison table based on the physical port and user-side VLAN in the second MAC address entry to find the target logical port corresponding to both the physical port and the user-side VLAN, it is necessary to determine whether the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip. In the case that the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip, it can be determined that the second MAC address entry and the related first MAC address entry are obtained based on logical port learning, and the MAC address entry sent to the underlying switching chip needs to be remapped, such as writing to the underlying switching chip only after the third MAC address entry is generated, thereby avoiding mapping other MAC address entries that are not obtained based on logical port learning, thereby improving the reliability of the data conversion device.

[0074] Step S104: Send the third MAC address entry to the underlying switch chip, so that the underlying switch chip is updated according to the third MAC address entry.

[0075] The software platform can identify the physical port of the message data using the second MAC address entry. Furthermore, the software platform sends the third MAC address entry to the underlying switching chip, which then identifies the logical port of the message data. This allows for synchronous updates of the physical and logical ports in the MAC address entry, ensuring consistency in MAC address aging between the software platform and the underlying switching chip.

[0076] In one embodiment, after receiving the third MAC address entry, the underlying switching chip checks whether a MAC address entry identical to the third MAC address entry already exists in the current MAC address learning table. If so, the MAC address entry is updated and its aging time is reset. If not, the third MAC address entry is reset to the MAC address learning table of the underlying switching chip.

[0077] In one embodiment, when the software platform sends the third MAC address entry to the underlying switch chip, the software platform performs an update based on the second MAC address entry. For example, the software platform first checks whether a MAC address entry identical to the second MAC address entry already exists in the current MAC address learning table. If so, the software platform updates the MAC address entry and resets the aging timer for the MAC address entry. If not, the software platform resets the second MAC address entry to the software platform's MAC address learning table.

[0078] For example, the software platform calls the underlying switching chip to set a third MAC address entry. After the underlying switching chip is successfully set, the software platform's command line indicates that MAC learning was successful. Specifically, the software platform displays {physical port, MAC address, network-side VLAN}, and the underlying switching chip displays {logical port, MAC address, network-side VLAN}. Simultaneously, the software platform timer is enabled, and MAC aging begins. The platform resets the MAC address entry reported by the underlying switching chip into the underlying switching chip's MAC learning table. This resets the aging timer, allowing the platform to accurately monitor MAC learning aging.

[0079] The MAC address synchronization method provided in the above embodiment enables the software platform to identify the physical port of the message data and the underlying switching chip to identify the logical port of the message data through mapping changes between multiple MAC address entries, thereby achieving synchronous updates of the physical port and the logical port in the MAC address entry, and ensuring consistency in MAC address aging between the software platform and the underlying switching chip. Current software platforms often do not support learning and aging of logical ports, but only support learning and aging of physical ports. Therefore, there is a problem of inconsistency between the MAC address entries reported by the underlying switching chip and the MAC address entries that the platform can recognize.

[0080] Please refer to FIG. 4 , which is a flowchart illustrating the steps of another MAC address synchronization method provided by an embodiment of the present disclosure.

[0081] As shown in FIG4 , the MAC address synchronization method includes steps S201 to S203 . The MAC address synchronization method can be applied to a bottom-layer switching chip of a data switching device.

[0082] Step S201: Generate a first MAC address entry.

[0083] In one embodiment, message data sent by an external device is obtained; a logical port and a network-side VLAN are assigned to the message data; and a MAC address, logical port, and network-side VLAN of the message data are combined to obtain a first MAC address entry, wherein the first MAC address entry includes the MAC address, logical port, and network-side VLAN of the message data.

[0084] In one embodiment, allocating a logical port and a network-side VLAN to message data includes: parsing the message data to obtain the physical port and user-side VLAN of the message data; and determining the logical port and network-side VLAN of the message data based on the physical port and user-side VLAN of the message data.

[0085] For example, configuration rules based on logical port learning are set on the underlying switching chip. Rules are configured on the upstream inlet. Upstream rules are mainly used for upstream VLAN conversion, matching physical ports and user-side VLANs, and allocating logical ports and network-side VLANs. For example, two rules are written for the upstream inlet. The first rule is: match gei_0 / 1 / 1 / 1 and VLAN 100, allocate logical port 210 and network-side VLAN 1000, and the second rule is: match gei_0 / 1 / 1 / 1 and VLAN 200, allocate logical port 220 and network-side VLAN 1000. The configuration rules are shown in Table 6:

[0086] In one embodiment, a next hop identifier is assigned to the message data based on the logical port and network-side VLAN of the message data. It should be noted that a single logical port cannot achieve downstream one-to-many conversion. Therefore, a next hop identifier, "nexthop," is assigned based on each network-side VLAN and logical port to identify the specific message data. The chip needs to be configured as follows: For network-side VLAN 1000 and logical port 210, assign the next hop identifier, "nexthop 110"; for network-side VLAN 1000 and logical port 220, assign the next hop identifier, "nexthop 120."

[0087] Since the message needs to be forwarded through gei_0 / 1 / 1 / 2, and the underlying switching chip learns based on logical ports, the physical port gei_0 / 1 / 1 / 2 also needs to be assigned a logical port and next hop identifier. Therefore, the logical port of the physical port gei_0 / 1 / 1 / 2 is specified as 230, and based on the network-side VLAN 1000 and the logical port 230, the next hop identifier is assigned as nexthop 130. When the message data is forwarded upstream, the outgoing port found based on the network-side VLAN 1000 is logical port 230, and the next hop identifier of the logical port 230 is found as nexthop 130. Nexthop 130 corresponds to the physical port gei_0 / 1 / 1 / 2, so it is forwarded from gei_0 / 1 / 1 / 2. The corresponding relationships of the above configuration are shown in Table 7 and Table 8:

[0088] Table 7:

[0089] Combining Tables 6, 7, and 8, we can see that the correspondence between physical ports and logical ports is as follows, as shown in Table 9:

[0090] Finally, you need to configure a downstream outbound rule. This rule is primarily used for downstream outbound VLAN "one-to-many" conversion. The matching condition is the next hop. The specific action is to modify the network-side VLAN to the user-side VLAN and specify the egress (physical port) for forwarding. The packet data from the downstream ingress port VLAN 1000 finds the logical egress for downstream forwarding based on the MAC address entry learned by the underlying switching chip, which are 210 and 220, respectively. As can be seen from the previous step, the next hops are 110 and 120, and according to the rules configured in this step, they are converted to user-side VLAN 100 and user-side VLAN 200 and forwarded out of the gei_0 / 1 / 1 / 1 port. The table entries of the underlying switching chip involved are shown in Table 10:

[0091] The above-mentioned entries are all entries of the underlying switching chip, not the entries saved by the software platform. The synchronization between the MAC learning of the software platform and the MAC learning of the underlying switching chip relies on the above-mentioned implementation principles. The implementation method of MAC learning synchronization can be found in other embodiments of this disclosure.

[0092] Step S202: Report the first MAC address entry to the software platform, so that the software platform generates a second MAC address entry according to the first MAC address entry and the first preset relationship group, and generates a third MAC address entry according to the second MAC address entry.

[0093] The second MAC address entry includes the message data's physical port, MAC address, user-side VLAN, and network-side VLAN, while the third MAC address entry includes the message data's logical port, MAC address, network-side VLAN, and next-hop identifier. By changing the mapping between the first and second MAC address entries, and between the second and third MAC address entries, the software platform can convert unrecognizable logical ports into recognizable physical ports. The underlying switching chip can identify the message data's logical port through the third MAC address entry, thereby achieving synchronized updates of the physical and logical ports in the MAC address entries.

[0094] In one embodiment, the first preset relationship group includes multiple correspondences between at least two parameters representing a logical port, a physical port, a user-side VLAN, and a network-side VLAN. The first preset relationship group may include at least two relationship comparison tables, each relationship comparison table including correspondences between at least two parameters representing a logical port, a physical port, a user-side VLAN, and a network-side VLAN, thereby accurately finding the physical port and user-side VLAN corresponding to the message data based on the first MAC address entry.

[0095] In one embodiment, the software platform determines the physical port of the message data based on the logical port in the first MAC address entry and the first relationship comparison table; determines the user-side VLAN of the message data based on the network-side VLAN in the first MAC address entry, the second relationship comparison table, and the physical port of the message data; and generates the second MAC address entry based on the first MAC address entry, the physical port of the message data, and the user-side VLAN.

[0096] In one embodiment, the software platform determines the logical port corresponding to the second MAC address entry based on the physical port, user-side VLAN, and a third relationship comparison table in the second MAC address entry; determines the next hop identifier corresponding to the second MAC address entry based on the logical port corresponding to the second MAC address entry and a fourth relationship comparison table; and generates a third MAC address entry based on the second MAC address entry, the logical port corresponding to the second MAC address entry, and the next hop identifier. The third relationship comparison table records the correspondence between the physical port, user-side VLAN, and logical port, and the fourth relationship comparison table records the correspondence between the logical port and the next hop identifier.

[0097] Step S203: Receive the third MAC address entry issued by the software platform, and update according to the third MAC address entry.

[0098] The software platform can identify the physical port of the message data using the second MAC address entry. Furthermore, the software platform sends the third MAC address entry to the underlying switching chip, which then identifies the logical port of the message data. This allows for synchronous updates of the physical and logical ports in the MAC address entry, ensuring consistency in MAC address aging between the software platform and the underlying switching chip.

[0099] In one embodiment, after receiving the third MAC address entry, the underlying switching chip checks whether a MAC address entry identical to the third MAC address entry already exists in the current MAC address learning table. If so, the MAC address entry is updated and its aging time is reset. If not, the third MAC address entry is reset to the MAC address learning table of the underlying switching chip.

[0100] In one embodiment, when the software platform sends the third MAC address entry to the underlying switch chip, the software platform performs an update based on the second MAC address entry. For example, the software platform first checks whether a MAC address entry identical to the second MAC address entry already exists in the current MAC address learning table. If so, the software platform updates the MAC address entry and resets the aging timer for the MAC address entry. If not, the software platform resets the second MAC address entry to the software platform's MAC address learning table.

[0101] The MAC address synchronization method provided in the above embodiment enables the software platform to identify the physical port of the message data and the underlying switching chip to identify the logical port of the message data through the mapping changes between multiple MAC address entries, thereby achieving synchronous updates of the physical port and the logical port in the MAC address entry and ensuring the aging consistency of the MAC address between the software platform and the underlying switching chip.

[0102] Please refer to FIG5 , which is a schematic block diagram of the structure of a data exchange device provided by an embodiment of the present disclosure.

[0103] As shown in Figure 5, the data exchange device 300 includes a software platform 310 and an underlying switching chip 320. The software platform 310 is configured to implement any of the MAC address synchronization methods applied to the software platform 310 in the embodiments of the present disclosure, and the underlying switching chip 320 is configured to implement any of the MAC address synchronization methods applied to the underlying switching chip 320 in the embodiments of the present disclosure.

[0104] In one embodiment, the software platform 310 is configured to implement:

[0105] Obtain a first MAC address entry reported by the underlying switching chip 320, where the first MAC address entry includes a MAC address, a logical port, and a network-side VLAN of the message data;

[0106] Generate a second MAC address entry based on the first MAC address entry and the first preset relationship group; wherein the second MAC address entry includes the physical port, MAC address, user-side VLAN, and network-side VLAN of the message data; and the first preset relationship group includes a plurality of corresponding relationships between at least two parameters representing the logical port, the physical port, the user-side VLAN, and the network-side VLAN.

[0107] Generate a third MAC address entry according to the second MAC address entry; wherein the third MAC address entry includes the logical port, MAC address, network side VLAN and next hop identifier of the message data;

[0108] The third MAC address entry is sent to the underlying switch chip 320, so that the underlying switch chip 320 is updated according to the third MAC address entry.

[0109] In one embodiment, when implementing the generation of the second MAC address entry according to the first MAC address entry and the first preset relationship group, the software platform 310 is configured to implement:

[0110] Determining the physical port of the message data according to the logical port in the first MAC address entry and a first relationship comparison table; the first relationship comparison table records the correspondence between the physical port and the logical port;

[0111] Determine the user-side VLAN of the message data according to the network-side VLAN in the first MAC address entry, the second relationship comparison table, and the physical port of the message data; the second relationship comparison table records the correspondence between the physical port, the user-side VLAN, and the network-side VLAN;

[0112] The second MAC address entry is generated according to the first MAC address entry, the physical port of the message data, and the user-side VLAN.

[0113] In one embodiment, when implementing the determination of the user-side VLAN of the message data based on the network-side VLAN in the first MAC address entry, the second relationship comparison table, and the physical port of the message data, the software platform 310 is configured to implement:

[0114] Traversing the second relationship comparison table according to the network-side VLAN in the first MAC address entry and the physical port of the message data to find a target user-side VLAN corresponding to the first MAC address entry;

[0115] The target user-side VLAN is determined as the user-side VLAN of the message data.

[0116] In one embodiment, when implementing the step of determining the target user-side VLAN as the user-side VLAN of the message data, the software platform 310 is configured to implement:

[0117] Obtain a third relationship comparison table, wherein the third relationship comparison table records the correspondence between the physical port, the user-side VLAN, and the logical port;

[0118] According to the target user-side VLAN and the physical port of the message data, the third relationship comparison table is traversed to find the target logical port corresponding to both the target user-side VLAN and the physical port;

[0119] When the target logical port is consistent with the logical port in the first MAC address entry, the target user-side VLAN corresponding to the logical port is determined as the user-side VLAN of the message data.

[0120] In one embodiment, when implementing the generating of the third MAC address entry according to the second MAC address entry, the software platform 310 is configured to implement:

[0121] A third MAC address entry is generated according to the second MAC address entry and the second preset relationship group; wherein the second preset relationship group includes a plurality of correspondences between at least two parameters for characterizing a logical port, a physical port, a user-side VLAN and a next hop identifier.

[0122] In one embodiment, when implementing the generating of the third MAC address entry according to the second MAC address entry and the second preset relationship group, the software platform 310 is configured to implement:

[0123] Determine the logical port corresponding to the second MAC address entry according to the physical port, the user-side VLAN, and the third relationship comparison table in the second MAC address entry;

[0124] Determine the next hop identifier corresponding to the second MAC address entry according to the logical port corresponding to the second MAC address entry and a fourth relationship comparison table; the fourth relationship comparison table records the correspondence between the logical port and the next hop identifier;

[0125] A third MAC address entry is generated according to the second MAC address entry, the logical port corresponding to the second MAC address entry, and the next hop identifier.

[0126] In one embodiment, when determining the logical port corresponding to the second MAC address entry based on the physical port, the user-side VLAN, and the third relationship comparison table in the second MAC address entry, the software platform 310 is configured to implement:

[0127] Obtaining the user-side VLAN of the message data reported by the underlying switching chip 320;

[0128] Determine whether the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip 320;

[0129] When the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip 320, the third relationship comparison table is traversed according to the physical port and user-side VLAN in the second MAC address entry to find the target logical port corresponding to both the physical port and the user-side VLAN.

[0130] In one embodiment, the underlying switching chip 320 is configured to implement:

[0131] Generate a first MAC address entry, where the first MAC address entry includes a MAC address, a logical port, and a network-side VLAN of the message data;

[0132] Reporting the first MAC address entry to the software platform 310, so that the software platform 310 generates a second MAC address entry based on the first MAC address entry and the first preset relationship group, and generates a third MAC address entry based on the second MAC address entry; wherein the second MAC address entry includes the physical port, MAC address, user-side VLAN, and network-side VLAN of the message data, and the third MAC address entry includes the logical port, MAC address, network-side VLAN, and next-hop identifier of the message data;

[0133] Receive the third MAC address entry sent by the software platform 310, and update according to the third MAC address entry.

[0134] In one embodiment, the underlying switching chip 320 is configured to implement the following when implementing the generation of the first MAC address entry:

[0135] Get the message data sent by the external device;

[0136] Allocating a logical port and a network-side VLAN for the message data;

[0137] The MAC address, logical port, and network-side VLAN of the message data are combined to obtain a first MAC address entry.

[0138] In one embodiment, when allocating the logical port and the network-side VLAN to the message data, the underlying switching chip 320 is configured to implement:

[0139] Parsing the message data to obtain the physical port and user-side VLAN of the message data;

[0140] Based on the physical port and user-side VLAN of the message data, the logical port and network-side VLAN of the message data are determined.

[0141] Those skilled in the art will understand that the structure shown in FIG5 is merely a block diagram of a partial structure related to the embodiment of the present disclosure, and does not constitute a limitation on the data exchange device to which the embodiment of the present disclosure is applied. The specific data exchange device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0142] It should be noted that technical personnel in the relevant field can clearly understand that for the convenience and conciseness of description, the specific working process of the software platform and the underlying switching chip of the data exchange device described above can refer to the corresponding process in the corresponding embodiment of the aforementioned MAC address synchronization method, and will not be repeated here.

[0143] An embodiment of the present disclosure also provides a storage medium for computer-readable storage, wherein the storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the steps of any MAC address synchronization method provided in the embodiment of the present disclosure.

[0144] The storage medium may be an internal storage unit of the data exchange device described in the aforementioned embodiment, such as a hard disk or memory of the data exchange device. The storage medium may also be an external storage device of the data exchange device, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the data exchange device.

[0145] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As is well known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable, and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data).

[0146] Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those skilled in the art that communication media generally embodies computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0147] The serial numbers of the embodiments of the present disclosure are for description only and do not represent the advantages or disadvantages of the embodiments. The above description is only a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present disclosure, and these modifications or replacements should be included in the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A MAC address synchronization method, applied to a software platform of a data exchange device, wherein the data exchange device further comprises an underlying exchange chip, and the method comprises: Obtain a first MAC address entry reported by the underlying switching chip, where the first MAC address entry includes a MAC address, a logical port, and a network-side VLAN of the message data; Generate a second MAC address entry according to the first MAC address entry and the first preset relationship group; wherein the second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data; the first preset relationship group includes a plurality of corresponding relationships between at least two parameters for characterizing the logical port, the physical port, the user-side VLAN and the network-side VLAN; Generate a third MAC address entry according to the second MAC address entry; wherein the third MAC address entry includes the logical port, MAC address, network side VLAN and next hop identifier of the message data; The third MAC address entry is sent to the bottom layer switch chip, so that the bottom layer switch chip is updated according to the third MAC address entry.

2. The MAC address synchronization method according to claim 1, wherein: The generating a second MAC address entry according to the first MAC address entry and the first preset relationship group includes: Determine the physical port of the message data according to the logical port in the first MAC address entry and a first relationship comparison table; the first relationship comparison table records the correspondence between the physical port and the logical port; Determine the user side VLAN of the message data according to the network side VLAN in the first MAC address entry, the second relationship comparison table and the physical port of the message data; the second relationship comparison table records the correspondence between the physical port, the user side VLAN and the network side VLAN; The second MAC address entry is generated according to the first MAC address entry, the physical port of the message data, and the user-side VLAN.

3. The MAC address synchronization method according to claim 2, wherein: The determining the user-side VLAN of the message data according to the network-side VLAN in the first MAC address entry, the second relationship comparison table, and the physical port of the message data includes: According to the network-side VLAN in the first MAC address entry and the physical port of the message data, the second relationship comparison table is traversed to find the target user-side VLAN corresponding to the first MAC address entry; The target user-side VLAN is determined as the user-side VLAN of the message data.

4. The MAC address synchronization method according to claim 3, wherein: The step of determining the target user-side VLAN as the user-side VLAN of the message data includes: Obtain a third relationship comparison table, wherein the third relationship comparison table records the correspondence between the physical port, the user-side VLAN, and the logical port; According to the target user-side VLAN and the physical port of the message data, the third relationship comparison table is traversed to find the target logical port corresponding to both the target user-side VLAN and the physical port; When the target logical port is consistent with the logical port in the first MAC address entry, the target user-side VLAN corresponding to the logical port is determined as the user-side VLAN of the message data.

5. The MAC address synchronization method according to any one of claims 1 to 4, wherein: The generating a third MAC address entry according to the second MAC address entry comprises: A third MAC address entry is generated according to the second MAC address entry and the second preset relationship group; wherein the second preset relationship group includes a plurality of corresponding relationships between at least two parameters for characterizing a logical port, a physical port, a user-side VLAN and a next hop identifier.

6. The MAC address synchronization method according to claim 5, wherein: The generating a third MAC address entry according to the second MAC address entry and the second preset relationship group includes: Determine the logical port corresponding to the second MAC address entry according to the physical port, the user-side VLAN, and the third relationship comparison table in the second MAC address entry; Determine the next hop identifier corresponding to the second MAC address entry according to the logical port corresponding to the second MAC address entry and a fourth relationship comparison table; the fourth relationship comparison table records the correspondence between the logical port and the next hop identifier; A third MAC address entry is generated according to the second MAC address entry, the logical port corresponding to the second MAC address entry, and the next hop identifier.

7. The MAC address synchronization method according to claim 6, wherein: The determining, according to the physical port in the second MAC address entry, the user-side VLAN, and the third relationship comparison table, the logical port corresponding to the second MAC address entry includes: Obtaining a user-side VLAN of the message data reported by the underlying switching chip; Determine whether the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip; When the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip, the third relationship comparison table is traversed according to the physical port and user-side VLAN in the second MAC address entry to find the target logical port corresponding to both the physical port and the user-side VLAN.

8. A MAC address synchronization method, applied to an underlying switching chip of a data exchange device, wherein the data exchange device also includes a software platform, and the method comprises: Generate a first MAC address entry, wherein the first MAC address entry includes a MAC address, a logical port, and a network-side VLAN of the message data; Reporting the first MAC address entry to the software platform, so that the software platform generates a second MAC address entry according to the first MAC address entry and a first preset relationship group, and generates a third MAC address entry according to the second MAC address entry; wherein the second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data, and the third MAC address entry includes the logical port, MAC address, network-side VLAN and next-hop identifier of the message data; Receive the third MAC address entry sent by the software platform, and update according to the third MAC address entry.

9. The MAC address synchronization method according to claim 8, wherein: The generating a first MAC address entry comprises: Get the message data sent by the external device; Allocating a logical port and a network-side VLAN to the message data; The MAC address, logical port and network-side VLAN of the message data are combined to obtain a first MAC address entry.

10. The MAC address synchronization method according to claim 9, wherein: The allocating a logical port and a network-side VLAN to the message data includes: Parsing the message data to obtain the physical port and user-side VLAN of the message data; Based on the physical port of the message data and the user-side VLAN, the logical port and the network-side VLAN of the message data are determined.

11. A data exchange device, comprising a software platform and an underlying switching chip, wherein the software platform is configured to implement the MAC address synchronization method as described in any one of claims 1 to 7, and the underlying switching chip is configured to implement the MAC address synchronization method as described in any one of claims 8 to 10.

12. A storage medium for computer-readable storage, wherein: The storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the MAC address synchronization method according to any one of claims 1 to 10.

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