Pixel circuit board and display device

Abstract

A pixel circuit board (1) comprises: first wiring (130); second wiring (131); relay wiring (132) formed so as to straddle the first wiring (130) and the second wiring (131); a first contact hole (133) for electrically connecting the first wiring (130) and the relay wiring (132); a second contact hole (134) for electrically connecting the second wiring (131) and the relay wiring (132); and power-supply wiring (14) formed in a higher layer than the relay wiring (132).

Description

Pixel circuit board and display device

[0001] The present disclosure relates to a pixel circuit substrate and a display device.

[0002] Japanese Patent Application Laid-Open No. 2004-122222 discloses a flat panel display device in which gate lines extend to the outer periphery of a light-emitting region.

[0003] Japanese Patent Application Publication No. 2005-258423

[0004] During the manufacturing process of pixel circuit substrates, electric charges may accumulate in wiring formation locations due to ion implantation or the like. Static electricity corresponding to the electric charges accumulated during this production process may damage thin-film transistors and other components being formed on the pixel circuit substrate, resulting in a decrease in the production yield of pixel circuit substrates. For example, when forming long gate lines as in Patent Document 1, electric charges accumulated on the gate line during formation may cause static damage to the thin-film transistors being formed.

[0005] The present disclosure has been made in consideration of the above problems, and aims to improve the production yield of pixel circuit substrates.

[0006] In order to solve the above problems, the pixel circuit substrate according to the present disclosure includes a plurality of pixel circuits including a first pixel circuit and a second pixel circuit, a first wiring formed in the first pixel circuit, a second wiring formed in the second pixel circuit, a relay wiring formed in a layer above the first wiring and the second wiring so as to straddle the first wiring and the second wiring, a first contact hole that electrically connects the first wiring and the relay wiring, a second contact hole that electrically connects the second wiring and the relay wiring, and a power supply wiring formed in a layer above the relay wiring and electrically connected to either the first pixel circuit or the second pixel circuit.

[0007] According to the present disclosure, it is possible to improve the production yield of pixel circuit substrates.

[0008] FIG. 3 is a plan view schematically showing a pixel circuit substrate according to a first embodiment of the present disclosure. FIG. 4 is a diagram showing a configuration example of a relay section 13 of FIG. 1. FIG. 5 is a plan view showing an example of a layout of a pixel circuit substrate according to a first embodiment of the present disclosure. FIG. 6 is a cross-sectional view taken along the line A-A of FIG. 3. FIG. 7 is a plan view schematically showing a pixel circuit substrate according to a second embodiment of the present disclosure. FIG. 8 is a plan view schematically showing a pixel circuit substrate according to a third embodiment of the present disclosure. FIG. 9 is a plan view showing an example of a layout of a pixel circuit substrate according to a fourth embodiment of the present disclosure.

[0009] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that the drawings are schematic, and the correlation between the size and position of images shown in different drawings is not necessarily accurately depicted and may be changed as appropriate. In the following description, similar components are illustrated with the same reference numerals.

[0010] [First Embodiment] A pixel circuit substrate 1 according to a first embodiment of the present disclosure is a pixel circuit substrate provided in a display device, and has a plurality of pixel circuits arranged in row and column directions. Fig. 1 is a plan view schematically showing the pixel circuit substrate 1 according to the first embodiment of the present disclosure. The pixel circuit substrate 1 shown in Fig. 1 includes a plurality of pixel circuits 10, a plurality of scanning signal lines 11, and a plurality of data signal lines 12.

[0011] The scanning signal line 11 is an example of a first signal line. The data signal line 12 is an example of a second signal line, and intersects with the scanning signal line 11 in a plan view. A plurality of pixel circuits 10 are arranged along the plurality of scanning signal lines 11 and the plurality of data signal lines 12. A relay portion 13 is provided for each pixel circuit 10 on the scanning signal line 11. In FIG. 1 , the relay portion 13 is arranged between two pixel circuits 10 adjacent to each other along the scanning signal line 11, but the relay portion 13 does not need to be formed so as to straddle the boundary between the two pixel circuits 10, and may be formed inside either of the two pixel circuits 10.

[0012] 2 is a diagram showing an example of the configuration of a relay section 13 formed in two pixel circuits 10. FIG. 2 schematically shows a first pixel circuit 10A and a second pixel circuit 10B included in a plurality of pixel circuits 10. The first pixel circuit 10A and the second pixel circuit 10B are arranged along the row direction of the pixel circuit substrate 1. As shown in FIG. 2, the relay section 13 is composed of a first wiring 130, a second wiring 131, a relay wiring 132, a first contact hole 133, and a second contact hole 134.

[0013] 2 , the first wiring 130 is formed in the first pixel circuit 10A. The second wiring 131 is formed in the second pixel circuit 10B. The relay wiring 132 is formed in a layer above the first wiring 130 and the second wiring 131 so as to straddle the first wiring 130 and the second wiring 131. The relay wiring 132 straddling the first wiring 130 and the second wiring 131 means that the relay wiring 132 overlaps with the first wiring 130 and the second wiring 131 in a plan view.

[0014] The first contact hole 133 is formed in, for example, the first pixel circuit 10A and electrically connects the first wiring 130 and the relay wiring 132. The second contact hole 134 is formed in, for example, the second pixel circuit 10B and electrically connects the second wiring 131 and the relay wiring 132. The first contact hole 133 is formed in a portion where the relay wiring 132 and the first wiring 130 overlap in a plan view. The second contact hole 134 is formed in a portion where the relay wiring 132 and the second wiring 131 overlap in a plan view.

[0015] The first wiring 130 and the second wiring 131 are formed on a first conductive layer made of, for example, a single layer or a laminated film of molybdenum, and the relay wiring 132 is formed on a second conductive layer made of, for example, a single layer or a laminated film containing aluminum.

[0016] The first wiring 130, the second wiring 131, and the relay wiring 132 extend in the same direction. The relay wiring 132 extends in a direction parallel to the arrangement direction of the first pixel circuits 10A and the second pixel circuits 10B, i.e., in the row direction of the pixel circuit substrate 1. The first wiring 130 extends in a direction parallel to the arrangement direction of the first pixel circuits 10A and the second pixel circuits 10B, i.e., in the row direction of the pixel circuit substrate 1. The second wiring 131 extends in a direction parallel to the arrangement direction of the first pixel circuits 10A and the second pixel circuits 10B, i.e., in the row direction of the pixel circuit substrate 1.

[0017] The scanning signal line 11 shown in FIG. 1 is an example of a first signal line and is formed by a first wiring 130, a second wiring 131, a relay wiring 132, a first contact hole 133, and a second contact hole 134. The scanning signal line 11 includes multiple sets of the first wiring 130, the second wiring 131, the relay wiring 132, the first contact hole 133, and the second contact hole 134. Specifically, the scanning signal line 11 has relay wirings 132 formed in the second conductive layer at each position of the relay section 13. The relay wirings 132 are connected to wirings formed in the first conductive layer by the first contact hole 133 and the second contact hole 134, respectively. The wirings formed in the first conductive layer are the first wiring 130, the second wiring 131, or both. Of the wiring formed on the first conductive layer, the wiring extending between two relay portions 13 is a first wiring 130 connected to one of the relay portions 13 and a second wiring 131 connected to the other relay portion 13.

[0018] As described above, the relay portion 13 does not need to be formed so as to straddle the boundary between the first pixel circuit 10A and the second pixel circuit 10B, and may be formed inside either the first pixel circuit 10A or the second pixel circuit 10B. When the relay portion 13 is formed in the first pixel circuit 10A, the second contact hole 134 is formed in the first pixel circuit 10A. The second wiring 131 connected to the relay wiring 132 by the second contact hole 134 extends from the first pixel circuit 10A to the second pixel circuit 10B. In other words, even when the relay portion 13 is formed in the first pixel circuit 10A, the second wiring 131 is formed in the second pixel circuit 10B. When the relay portion 13 is formed in the second pixel circuit 10B, the first contact hole 133 is formed in the second pixel circuit 10B. The first wiring 130, which is connected to the relay wiring 132 by the first contact hole 133, extends from the second pixel circuit 10B to the first pixel circuit 10A. That is, even if the relay section 13 is formed in the second pixel circuit 10B, the first wiring 130 is formed in the first pixel circuit 10A.

[0019] 3 is a plan view showing an example of the layout of the pixel circuit substrate 1 according to the first embodiment of the present disclosure. In FIG. 3, the relay portions 13 of the scanning signal lines 11 are arranged inside the pixel circuits 10. The pixel circuit substrate 1 includes power supply wiring 14 electrically connected to the pixel circuits 10 for each pixel column of the pixel circuit substrate 1. The power supply wiring 14 is connected to the positive electrode of the power supply for the pixel circuit substrate 1, which is electrically connected to the pixel circuits 10.

[0020] The power supply wiring 14 extends in the same direction as the second signal lines such as the data signal lines 12, and intersects with the first signal lines such as the scanning signal lines 11 in a planar view. The relay portion 13 is disposed at a position where the first signal lines and the power supply wiring 14 overlap in a planar view. For example, the relay portion 13 is disposed at a position where the scanning signal lines 11 and the power supply wiring 14 overlap. In a planar view, the power supply wiring 14 overlaps with the relay wiring 132 of the relay portion 13, which is electrically connected to the pixel circuit 10 to which the power supply wiring 14 is connected.

[0021] The power supply wiring 14 is formed in a layer above the relay wiring 132. In other words, the relay wiring 132 is formed between the layer on which the power supply wiring 14 is formed and the layer on which the first wiring 130 and the second wiring 131 are formed.

[0022] Furthermore, the power supply wiring 14 is electrically connected by a third contact hole 22 to a wiring layer that is in the same layer and made of the same material as the relay wiring 132, for example, the second conductive layer.

[0023] The relay section 13 can be provided on a line other than the scanning signal line 11. In Fig. 3, the light emission control lines 20 and 21 of the pixel circuit substrate 1 are an example of a first signal line, and are provided with the relay section 13 in the same manner as the scanning signal line 11.

[0024] 4 is a cross-sectional view taken along the line A-A in FIG. 3. As shown in FIG. 4, the power supply wiring 14 is formed in a layer above the relay wiring 132 of the light-emitting control line 20. An insulating film 24 is provided between the power supply wiring 14 and the relay wiring 132. The data signal line 12, which is an example of a second signal line, is formed in the same layer and made of the same material as the relay wiring 132. For example, the data signal line 12 is formed in the second conductive layer using, for example, a single-layer aluminum film or a laminated film containing aluminum.

[0025] In conventional pixel circuit substrates, first signal lines such as scanning signal line 11 and light-emission control lines 20 and 21 are not divided into multiple lines but are single long lines. In the ion implantation process, when ions are bombarded into the wiring for the first signal line, electric charge accumulates in the wiring. The amount of electric charge accumulated in the wiring increases as the length of the wiring increases. In conventional pixel circuit substrates, the electric charge accumulated in the wiring for the first signal line can cause static electricity damage to the insulating film between the wiring for the first signal line and wiring formed below the wiring for the first signal line.

[0026] In the pixel circuit substrate 1 according to the first embodiment, the first signal line of each row is provided with a relay portion 13, and the length of each line is shortened by dividing the first signal line into multiple lines. By dividing the first signal line into multiple lines, the amount of charge accumulated during an ion implantation process or the like is reduced compared to conventional methods. This makes it possible to prevent damage caused by static electricity to, for example, the insulating film 25 between the light-emission control line 20 and the line 23 formed below the light-emission control line 20, and improve the production yield of the pixel circuit substrate 1.

[0027] [Second Embodiment] In the pixel circuit substrate 1 of the first embodiment, the scanning signal line 11 has a relay portion 13 for every two pixel circuits 10 adjacent along the scanning signal line 11, but the present disclosure is not limited to this form.

[0028] 5 is a plan view schematically illustrating a pixel circuit substrate 2 according to a second embodiment of the present disclosure. In the pixel circuit substrate 2 according to the second embodiment of the present disclosure, relay portions 13 are provided for each of a predetermined number of pixel circuits 10 in each of the scanning signal lines 11. For example, relay portions 13 are provided for each of 10 to 100 pixel circuits 10 in each of the scanning signal lines 11. In this case, the first wiring 130 is formed across a plurality of pixel circuits 10 (third pixel circuits) including the first pixel circuit 10A, and the second wiring 131 is formed across a plurality of pixel circuits 10 (fourth pixel circuits) including the second pixel circuit 10B.

[0029] In the pixel circuit substrate 2 according to the second embodiment of the present disclosure, the first wiring 130 shown in Fig. 2 is formed across a plurality of pixel circuits 10 including at least a first pixel circuit 10A. The second wiring 131 shown in Fig. 2 is formed across a plurality of pixel circuits 10 including at least a second pixel circuit 10B. The first wiring 130 spanning a plurality of pixel circuits 10 means that the first wiring 130 is formed so as to overlap the plurality of pixel circuits 10 in a planar view. The second wiring 131 spanning a plurality of pixel circuits 10 means that the second wiring 131 is formed so as to overlap the plurality of pixel circuits 10 in a planar view.

[0030] In this way, the pixel circuit board 2 according to the second embodiment of the present disclosure can reduce the layout area occupied by the relay portion 13 compared to the pixel circuit board 1 according to the first embodiment. The pixel circuit board 2 according to the second embodiment of the present disclosure is easier to produce than the pixel circuit board 1 according to the first embodiment.

[0031] [Third Embodiment] In the pixel circuit substrate 2 of the second embodiment, the relay portions 13 are formed at the same position in each row of the pixel circuit substrate 2, but the present disclosure is not limited to this. Fig. 6 is a plan view schematically showing a pixel circuit substrate 3 according to a third embodiment of the present disclosure. In the pixel circuit substrate 3 according to the third embodiment of the present disclosure, the pixel positions at which the relay portions 13 are formed are different for each row of the scanning signal lines 11.

[0032] In the pixel circuit substrate 3 according to the third embodiment, the positions at which the relay sections 13 are disposed are changed by a predetermined number of pixels for each row of the scanning signal lines 11, but the amount by which the positions are changed for each row does not have to be constant. By dispersing the positions at which the relay sections 13 are provided, the influence of the presence or absence of the relay sections 13 on the image display can be made less noticeable.

[0033] Fourth Embodiment In the first to third embodiments described above, the data signal lines 12 are formed in the same layer and from the same material as the relay wiring 132, but the present disclosure is not limited to this configuration.

[0034] 7 is a plan view showing an example of the layout of a pixel circuit substrate 4 according to the fourth embodiment of the present disclosure. In the pixel circuit substrate 4 shown in Fig. 7, the data signal line 41 is formed in the same layer and made of the same material as the power supply wiring 14. The data signal line 41 is electrically connected to a wiring layer in the same layer and made of the same material as the relay wiring 132 via a fourth contact hole 42.

[0035] The present disclosure is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the present disclosure. Furthermore, new technical features can be formed by combining the technical means disclosed in each embodiment.

[0036] 1, 2, 3, 4 Pixel circuit substrate 10 Pixel circuit 10A First pixel circuit 10B Second pixel circuit 11 Scanning signal line 12, 41 Data signal line 14 Power supply wiring 20, 21 Emission control line 24 Insulating film 130 First wiring 131 Second wiring 132 Relay wiring 133 First contact hole 134 Second contact hole 22 Third contact hole

Claims

1. A pixel circuit substrate comprising: a plurality of pixel circuits including a first pixel circuit and a second pixel circuit; a first wiring formed in the first pixel circuit; a second wiring formed in the second pixel circuit; a relay wiring formed in a layer above the first wiring and the second wiring and straddling the first wiring and the second wiring; a first contact hole electrically connecting the first wiring and the relay wiring; a second contact hole electrically connecting the second wiring and the relay wiring; and a power supply wiring formed in a layer above the relay wiring and electrically connected to either the first pixel circuit or the second pixel circuit.

2. The pixel circuit substrate according to claim 1, wherein the first wiring, the second wiring, and the relay wiring extend in a direction parallel to an arrangement direction of the first pixel circuits and the second pixel circuits.

3. A pixel circuit board as described in claim 1 or 2, comprising a first signal line formed by the first wiring, the second wiring, the relay wiring, the first contact hole, and the second contact hole, and in a planar view, the power supply wiring intersects with the first signal line.

4. The pixel circuit board according to claim 3, wherein the first signal line includes a plurality of sets of the first wiring, the second wiring, the relay wiring, the first contact hole, and the second contact hole.

5. A pixel circuit board as described in claim 3 or 4, further comprising a second signal line intersecting the first signal line in a plan view, the first signal line being a scanning signal line or a light emission control line, the second signal line being a data signal line, the plurality of pixel circuits being arranged along the first signal line and the second signal line, and the second signal line being formed in the same layer and from the same material as the relay wiring.

6. A pixel circuit substrate according to any one of claims 1 to 5, wherein the first wiring is formed across a plurality of third pixel circuits including the first pixel circuit, and the second wiring is formed across a plurality of fourth pixel circuits including the second pixel circuit.

7. A pixel circuit board according to claim 1, wherein, in a plan view, the power supply wiring overlaps with the relay wiring that is electrically connected to a pixel circuit to which the power supply wiring is connected.

8. The pixel circuit substrate according to claim 1, wherein the first contact hole is formed in the first pixel circuit, and the second contact hole is formed in the second pixel circuit.

9. The pixel circuit board according to claim 1, wherein the power supply wiring is electrically connected to a wiring layer which is in the same layer and made of the same material as the relay wiring through a third contact hole.

10. The pixel circuit board according to claim 1, wherein the power supply wiring is connected to a positive electrode of a power supply electrically connected to the first pixel circuit.

11. The pixel circuit board according to claim 1, further comprising an insulating film between the power supply wiring and the relay wiring.

12. The pixel circuit substrate according to claim 1, wherein the first wiring and the second wiring are formed in a first conductive layer made of a single layer or a multilayer film of molybdenum.

13. The pixel circuit board according to claim 1, wherein the relay wiring is formed on a second conductive layer made of a single layer of aluminum or a laminated film containing aluminum.

14. A display device comprising a pixel circuit substrate according to any one of claims 1 to 13.

Images