Display pixel comprising light-emitting diodes having a reduced static consumption and display screen having such display pixels

Abstract

The present description concerns a display pixel (12i,j) comprising a first electrically conductive bonding pad intended to receive a high reference voltage (Vcc ), a second electrically conductive bonding pad ( P_Gnd) intended to receive a low reference voltage ( Gnd), a light-emitting device ( LED), a current source (ACS ) supplying said light-emitting device ( LED) with a current, the light-emitting device ( LED) being in series with the current source (ACS ) between the first and second electrically conductive bonding pads, the only electrical path from the current source up to the first electrically conductive bonding pad or up to the second electrically conductive bonding pad being through the light-emitting device ( LED).

Description

DESCRIPTIONTITLE : Display pixel comprising light-emitting diodes having a reduced static consumption and display screen having such display pixelsThis application claims the priority benefit of French patent application number 23 / 09980 , filed on 21 / 09 / 2023 , entitled "Display pixel comprising light-emitting diodes having a reduced static consumption and display screen having such display pixels" , which is hereby incorporated by reference to the maximum extent allowable by law .Technical background

[0001] The present disclosure concerns a display pixel comprising light-emitting diodes and a display screen having such display pixels .Prior art

[0002] A pixel of an image corresponds to the unit element of the image displayed by a display screen . For the display of color images , the display screen generally comprises , for the display of each pixel of the image , at least three components , also called display sub-pixels , which each emit a light radiation, called image pixel color component substantially in a single color ( for example , red, green, and blue ) . The superposition of the image pixel color components emitted by the three display sub-pixels provides the observer with the colored sensation corresponding to the pixel of the displayed image . In this case , the assembly formed by the three display sub-pixels used for the display of a pixel of an image is called display pixel of the display screen . Each display sub-pixel may comprise a light source , particularly a light-emitting diode .

[0003] The display pixels may be distributed in an array, each display pixel being located at the intersection of a row ( or line ) and of a column of the array . Generally, each row of display pixels is successively selected, and the display pixels of the selected row are programmed to display the desired image pixels .

[0004] An active array is a screen drive architecture enabling to maintain all the pixel rows active for the entire duration of an image , conversely to arrays called passive , where each row is only active for a time T = Tframe / N (where Tframe is the duration of the image and N is the number of rows of the screen) . This enables to increase the luminosity o f the display screen . Further, it is possible to send low voltage or current levels onto the array control lines , which enables to display more signi ficant data flows .

[0005] An active array can comprise display pixels each comprising light-emitting diodes and a driver circuit for controlling the light-emitting diodes . It is then spoken of smart pixels . This particularly enables to simpli fy the forming of an active array, since the control electronics of the light-emitting diodes of the display pixel is for the most part embedded on the display pixel .

[0006] The static power consumption of a display pixel corresponds to the electric power consumed by the display pixel when the latter emits no light . It may be formed of the leakage currents of components or currents necessary to the internal operation of the display pixel driver circuit .

[0007] The tendency is to the increase of the number of display pixels of the display screen . The static power consumption of the display pixels may then become acritical factor . Indeed, for a so-called 4K di splay screen having a resolution of 2 , 160 by 3 , 840 display pixels , the static power consumption of the display screen may be greater than 150 W .

[0008] Document US2022223103A1 discloses a display pixel receiving a high reference voltage and a low reference voltage , a light-emitting device , a current source supplying said light-emitting device with a current , the light-emitting device being in series with the current source between the source of the high reference voltage and the source of the low reference voltage . The current source comprises a switch in series with a constant current source . The constant current source receives digital signals and is connected to the source of the high reference voltage .

[0009] There is a need to decrease the static power consumption of the display screen .Summary of the invention

[0010] An obj ect of an embodiment is to provide a display pixel comprising light-emitting diodes and a display screen comprising such display pixels overcoming all or part of the disadvantages of existing display pixels comprising light-emitting diodes and display screens comprising such display pixels .

[0011] An embodiment provides a display pixel comprising a first electrically conductive bonding pad intended to receive a high reference voltage , a second electrically conductive bonding pad intended to receive a low reference voltage , a light-emitting device , a current source supplying said light-emitting device with a current , the light-emitting device being in series with the current source between the first and second electrically conductivebonding pads , the only electrical path from the current source up to the first electrically conductive bonding pad or up to the second electrically conductive bonding pad being through the light-emitting device . The static current consumption of the current source is advantageously reduced since there is no current consumption when light-emitting diode is of f .

[0012] According to an embodiment , the display pixel further comprises a switch in series with the light-emitting device and the current source . When switch is open, the current source is advantageously not supplied .

[0013] According to an embodiment , the display pixel further comprises a driver circuit for driving the switch, the display pixel being configured to receive a first binary signal , the driver circuit being configured to determine a digital signal from successively received values of the first binary signal and to command the switch based on the digital signal , for example by pulse-width modulation . Power is supplied to the current source according to the first binary signal that can correspond to video data . I f the video data command an opening of the switch, no static consumption is induced by the current source . When the switch is closed, the autonomous current source provides a current with a constant current intensity that is set and constant and that does not vary depending on the digital signal that commands the switch . The autonomous current source does not receive data, which would imply that the autonomous current source needs to be permanently powered .

[0014] According to an embodiment , the switch is interposed between the light-emitting device and the current source .

[0015] According to an embodiment, the light-emitting device comprises a light-emitting diode, the anode of the lightemitting diode being coupled to the first electrically conductive bonding pad.

[0016] According to an embodiment, the current source comprises a first current source terminal and a second current source terminal, the second current source terminal being coupled to the second electrically conductive bonding pad .

[0017] According to an embodiment, the current source comprises first and second current sources in parallel, the first current source being configured to provide a first current that is proportional to absolute temperature and the second current source being configured to provide a second current that is complementary to absolute temperature. The intensity of the first and second currents and the rates of variations of the first and second currents can advantageously be determined so that the current provided by the current source, that is equal to the sum of the first and second currents, is substantially independent from the temperature, in a usual temperature operation range of the display pixel, for example from - 35 °C to 85 °C. The current intensity is self-fixed by the operation of the current source and does not change with temperature due to the temperature compensation circuit, comprising the first and second current sources, incorporated in the current source.

[0018] According to an embodiment, the current source comprises : -first and second current source terminals;-first, second, third, fourth, fifth, sixth, and seventh MOS transistors, each having a first power terminal, asecond power terminal and a gate ;- first and second resistances , each having first and second resistance terminals , the second power terminals of the first and second transistors being coupled to the first resistance terminal of the first resistance , the second resistance terminal of the first resistance being coupled to the second current source terminal , the gate of the third transistor being coupled to the first power terminal of the third transistor, to the gate of the fourth transistor, and to the gate of the fi fth transistor, the second power terminals of the third, fourth, and fi fth transistor being coupled to the first current source terminal , the first power terminal of the third transistor being coupled to the first power terminal of the first transistor, the first power terminal of the fourth transistor being coupled to the first power terminal of the second transistor, the first power terminal of the fi fth transistor being coupled to the gate of the second transistor, the second power terminal of the sixth transistor being coupled to the second current source terminal , the first power terminal of the sixth transistor being coupled to the gate of the second transistor, the gate of the sixth transistor being coupled to the first power terminal of the sixth transistor, the second power terminal of the seventh transistor being coupled to the first current source terminal , the first power terminal of the seventh transistor being coupled to the gate of the first transistor, the gate of the seventh transistor being coupled to the first power terminal of the second transistor, the first resistance terminal of the second resistance being coupled to the gate of the first transistor, and the second resistance terminal of thesecond resistance being coupled to second current source terminal . The structure of the current source is advantageously simple since it comprises only seven transistors and two resistances .

[0019] Another embodiment provides a display screen comprising : display pixels as previously defined; first electrodes coupled to the display pixels ; a first circuit for delivering a selection signal on each first electrode for the selection of the display pixels coupled to the first electrode ; second electrodes coupled to the display pixels ; and a second circuit for delivering data signals on the second electrodes .Brief description of the drawings

[0020] The foregoing features and advantages , as well as others , will be described in detail in the rest of the disclosure of speci fic embodiments given by way of illustration and not limitation with reference to the accompanying drawings , in which :

[0021] Figure 1 partially and schematically shows an embodiment of a display screen;

[0022] Figure 2 shows a block diagram of an embodiment of a display pixel of the display screen of Figure 1 ;

[0023] Figure 3 shows a block diagram of an example of a light-emitting circuit and of a light-emitting driver of the display pixel of Figure 2 ;

[0024] Figure 4 illustrates a drawback of the light-emitting driver shown in Figure 3 ;

[0025] Figure 5 shows a block diagram of an embodiment of the light-emitting circuit and of the light-emitting driver of the display pixel of Figure 2 ;

[0026] Figure 6 shows a more detailed embodiment of the light-emitting circuit and the light-emitting driver of Figure 5 ;

[0027] Figure 7 shows curves of evolution of currents of the circuit of Figure 6 with respect to the temperature ;

[0028] Figure 8 shows a circuit diagram of an embodiment of a current source of the light-emitting circuit of Figure 6 ;

[0029] Figure 9 shows the curves of evolution of the resistance of a resistor and a gate-source voltage of a MOS transistor of the circuit of Figure 8 with respect to the temperature ;

[0030] Figure 10 shows another more detailed embodiment of the light-emitting circuit and the light-emitting driver of Figure 5 .Description of the embodiments

[0031] Like features have been designated by like references in the various figures . In particular, the structural and / or functional features that are common among the various embodiments may have the same references and may dispose identical structural , dimensional and material properties .

[0032] For the sake of clarity, only the operations and elements that are useful for an understanding of the embodiments described herein have been illustrated and described in detail .

[0033] In the following disclosure , unless indicated otherwise , when reference is made to absolute positionalqualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or to relative positional qualifiers, such as the terms "above", "below", "higher", "lower", etc., or to qualifiers of orientation, such as "horizontal", "vertical", etc., reference is made to the orientation shown in the figures.

[0034] Unless indicated otherwise, when reference is made to two elements connected together, this signifies a direct connection without any intermediate elements other than conductors, and when reference is made to two elements coupled together, this signifies that these two elements can be connected or they can be coupled via one or more other elements. Further, a signal which alternates between a first constant state, for example, a low logical state, noted "0", and a second constant state, for example, a high logical state, noted "1", is called a "binary signal". The high and low states of different binary signals of a same electronic circuit may be different. In practice, the binary signals may correspond to voltages or to currents which may not be perfectly constant in the high or low state .

[0035] Further, unless indicated otherwise, when it is spoken of a voltage at a conductive pad, the difference between the potential at said conductive pad and a reference potential, for example, the ground, taken as equal to 0 V, is considered. Further, in the following description, the source and the drain of a MOS transistor are called "power terminals" of the insulated gate field-effect transistor, or MOS transistor.

[0036] Unless specified otherwise, the expressions "around", "approximately", "substantially" and "in the order of" signify within 10%, and preferably within 5%. Further theexpression " substantially constant" means which varies by less than 10% over time with respect to a reference value .

[0037] Figure 1 partially and schematically shows a known example of a display screen 10 . Display screen 10 comprises display pixels 12l fj , for example , arranged in M rows and in N columns , M being an integer varying from 1 to 8 , 000 and N being an integer varying from 1 to 16 , 000 , i being an integer varying from 1 to M, and j being an integer varying from 1 to N . As an example , in Figure 1 , M and N are equal to 6 . Each display pixel 12i fj is coupled to a source of a low reference potential Gnd, for example , the ground, via an electrode 14i and to a source of a high reference potential Vcc via an electrode 16j . As an example , electrodes 14i are shown as being aligned along the rows in Figure 1 and electrodes 16j are shown as being aligned along the columns in Figure 1 , the reverse layout being possible . The power supply voltage of the display screen corresponds to the voltage between high reference potential Vcc and low reference potential Gnd, and is noted Vcc like the high reference potential . Power supply voltage Vcc particularly depends on the arrangement of the light-emitting diodes and on the technology according to which the light-emitting diodes are manufactured . As an example , power supply voltage Vcc may be in the order of from 4 V to 5 V .

[0038] For each row, the display pixels 12i fj in the row are coupled to a row electrode 18i . For each column, the display pixels 12i fj in the column are coupled to a column electrode 20j . Display screen 10 comprises a selection circuit 22 coupled to row electrodes 18±and adapted to delivering a selection signal Comi on each row electrode 18±. Display screen 10 comprises a data delivery circuit 24 coupled to column electrodes 20j and adapted to delivering a data signal Dataj on each column electrode 20j . Selection circuit22 and control circuit 24 are controlled by a circuit 26 , for example comprising a microprocessor .

[0039] Figure 2 shows an example of a block diagram of a display pixel 12l fj of display screen 10 .

[0040] Display pixel 12l fj comprises bonding conductive pads P_Gnd, P_Vcc, P_Col , P_Row . Each conductive pad P_Gnd, P_Vcc, P_Col , P_Row is intended to be coupled to one of the electrodes 14±, 16j , 18±, 20j , not shown in Figure 2 . The first conductive pad P_Vcc is coupled, preferably connected, to electrode 14i and receives high reference potential Vcc . The second conductive pad P_Gnd is coupled, preferably connected, to electrode 16j and receives low reference potential Gnd . The third conductive pad P_Col is coupled, preferably connected, to column electrode 20j and receives data signal Dataj . The fourth conductive pad P_Row is coupled, preferably connected, to row electrode 18i and receives selection and timing signal Comi .

[0041] For a color display screen, display pixel 12i fj comprises a light-emitting circuit 52 comprising at least three light-emitting diodes emitting radiations of di f ferent colors , for example red, green, and blue , a single light-emitting diode LED being shown in Figure 2 . In the present example , for each color, the anode of lightemitting diode LED is for example coupled, preferably connected, to the conductive pad P_Vcc receiving high reference potential Vcc and the cathode of light-emitting diode LED is for example coupled, preferably connected, to a terminal of a controllable current source CS , the other terminal of controllable current source CS being coupled, preferably connected, to the conductive pad P_Gnd receiving low reference potential Gnd . As a variation, for each light-emitting diode LED, the cathode of light-emittingdiode LED is for example coupled to the conductive pad P_Gnd receiving low reference potential Gnd and the anode of light-emitting diode LED is coupled to a terminal of controllable current source CS , the other terminal of controllable current source CS being coupled to the conductive pad P_Vcc receiving high reference potential Vcc .

[0042] Display pixel 12l fj further comprises a driver circuit 40 for driving controllable current source CS . Driver circuit 40 may particularly comprise electronic components such as MOS transistors or TFTs .

[0043] It may be desirable to use a decreased power supply voltage Vdd, inferior to supply voltage Vcc, for example lower than 4 V, in particular in the order of 1 V or of 1 . 8 V, to power at least some of the electronic components of driver circuit 40 , this decreased power supply voltage for example corresponding to the voltage likely to be applied between the power terminals of MOS transistors . For this purpose , display pixel 12i fj comprises a supply circuit 60 that supplies the decreased supply voltage Vdd . Supply circuit 60 receives high reference potential Vcc, and at least one of selection signal Comi and data signal Dataj and provides the decreased supply voltage Vdd . As an example , in Figure 2 , supply circuit 60 is shown receiving high reference potential Vcc, selection signal Comi and data signal Dataj . As a variation, di splay pixel 12i fj can comprise an additional bonding conductive pad receiving decreased supply voltage Vdd .

[0044] Driver circuit 40 comprises a circuit 46 (Mode selection) coupled to conductive pad P_Col receiving data signal Dataj and coupled to conductive pad P_Row receiving selection and timing signal Comi , and configured to delivera clock signal Clk and a data signal Data to a storage circuit 48 ( Color Data registers ) or to deliver a signal PWM to implement a pulse width modulation to a circuit 50 ( LED driver ) , called LED driving circuit hereafter, for controlling the controllable current source CS associated with each light-emitting diode LED . Storage circuit 48 is configured to store color signals R, G, B representative of the image pixel to be displayed . Circuit 50 is configured to control the controllable current sources CS coupled to light-emitting diodes LED with s ignals I_red, I_green, and I_blue , obtained from color signals R, G, B, and from signal PWM . In the present embodiment , data signal Data can correspond to data signal Dataj and clock signal Clk is obtained from selection and timing signal Comi . Circuit 50 is supplied with high reference potential Vcc and decreased supply voltage Vdd .

[0045] Figure 3 shows a block diagram of an example of lightemitting circuit 52 and of LED driving circuit 50 of display pixel 12i fj of Figure 2 for one color, for example blue .

[0046] Controllable current source CS comprises a switch SW in series with an adj ustable current source CCS providing a current ICS having a controllable intensity . Adj ustable current source CCS can be coupled between a terminal OUT of switch SW and conductive pad P_Gnd of display pixel 12i fj that is connected to the source of low reference potential Gnd . Switch SW is controlled by signal I_blue . Adj ustable current source CCS is controlled by constant biasing signal Bias . As an example , switch SW corresponds to a MOS transistor, for example a N-MOS transistor . Signal I_blue can then correspond to the voltage controlling the gate of the transistor . As an example , adj ustable current source CCS corresponds to a MOS transistor, for example a N-MOStransistor . Signal Bias can then correspond to the gatesource voltage of the transistor .

[0047] According to an embodiment , light-emitting diodes LED of display pixel 12i rj are controlled by pulse-width modulation . For this purpose , during a display phase , signal PWM, shown in Figure 2 , exhibits the succession of pulses at logical state " 1" which rates the operation of circuit 50 for the control of light-emitting diodes LED by pulse-width modulation . The number of pulses in the succession of pulses corresponds to the number NB of bits of each digital color signal R, G, and B . As an example , switch SW is closed or open, at the rate of the pulses of signal PWM, according to the logical value " 0" or " 1" of each bit of color signal R, G, or B, for example starting from the most signi ficant bit , this switch being maintained closed or open until the next pulse of signal PWM . The duration between two successive pulses of signal PWM is divided each time by two , so that the total duration for which the light-emitting diode is on depends on the value of color signal R, G, or B . The succession of pulses of signal PWM can be repeated until the display of another image pixel . In that case , the succession of pulses of signal PWM forms a display cycle and the display phase comprises more than one display cycle .

[0048] LED driving circuit 50 comprises a digital circuit 54 ( digital block) that provides signal I_blue and an analog circuit 56 (Analog block) that provides signal Bias . Digital circuit 54 can be supplied by reduced power voltage Vdd that is inferior to power supply Vcc . Analog circuit 56 needs to be supplied with power voltage Vcc . Analog circuit 56 can comprise a digital-to-analog converter providing signal Bias . When adj ustable current source CCS corresponds to a MOS transistor, analog circuit 56 providessignal Bias so that MOS transistor CCS is operated under saturation region .

[0049] A part of the static current consumption of display pixel 12l fj comes from the static current consumption of analog circuit 56 . When display screen comprises a high number of display pixels 12l fj , the static current consumption of the analog circuits 56 of all display pixels 12l fj can be high .

[0050] Moreover, with the structure of light-emitting circuit 52 and of LED driving circuit 50 shown in Figure 3 , it can be complex to command adj ustable current source CCS so that current ICS substantially does not vary with the temperature in a usual temperature operation range , for example from -35 ° C to 85 ° C .

[0051] Figure 4 illustrates a drawback of LED driving circuit 50 shown in Figure 3 . Light-emitting circuit 52 of a single display pixel 12i fj of screen is schematically shown on the left of Figure 4 with switch SW and adj ustable current source CCS corresponding to N-MOS transistors , whereas the other display pixels of display screen 10 are schematically shown by a bloc 58 on the right of Figure 4 . All display pixels of display screen 10 are coupled, preferably connected, to the source of low reference potential Gnd through electrodes that spread across display screen 10 . Due to the intern electrical resistances of the conductive tracks , electrical contacts , etc . , a common resistance is seen by each display pixel that is shown by a resistance Rcom present between the source of low reference potential Gnd and the display pixels . Therefore , there is a voltage VR across resistance Rcom when display screen 10 is in operation due to the currents supplying the light-emitting diodes LED of display pixels that emit light . Even i fresistance Room is kept as low as possible , voltage VR can be not negligible when the number of display pixels 12i fj is high . A drawback is that voltage VR modi fies gate-source voltage Vgs of adj ustable current source CCS . Therefore , it can be di f ficult to obtain a precise command Bias for adj ustable current source CCS , in particular when adj ustable current source CCS corresponds to a MOS transistor that is operated under saturation region .

[0052] Figure 5 shows a block diagram of an embodiment of light-emitting circuit 52 and of LED driving circuit 50 of the display pixel of Figure 2 . Light-emitting circuit 52 and LED driving circuit 50 in Figure 5 comprise all elements shown in Figure 3 except that analog circuit 56 is not present and adj ustable current source CCS is replaced with an autonomous current source ACS that is coupled between terminal OUT of switch SW and conductive pad P_Gnd of display pixel 12i fj that is connected to the source of low reference potential Gnd . Autonomous current source ACS supplies current ICS .

[0053] The only current that flows through autonomous current source ACS corresponds to current ICS . This means that autonomous current source ACS is supplied by a supply voltage VCS that corresponds to the voltage between terminal OUT of switch SW to which autonomous current source ACS is connected and conductive pad P_Gnd . In particular, when switch SW is open, current ICS is equal to 0 A and voltage VCS is equal to 0 V and autonomous current source ACS is not supplied . The static current consumption of autonomous current source ACS is advantageously reduced since there is no current consumption when light-emitting diode LED is of f . Power is supplied to the autonomous current source ACS according to the digital color signal R, G, and B that correspond tovideo data received by the display pixel 12i fj . I f the video data command an opening of the switch SW, no static consumption is induced by the autonomous current source ACS . When the switch SW is closed, the autonomous current source ACS provides a current ICS with a constant current intensity that is set and constant and that does not vary depending on the digital signal that commands the switch SW . The autonomous current source ACS does not receive data, which would imply that the autonomous current source ACS needs to be permanently powered .

[0054] Figure 6 is a similar figure to Figure 5 showing an embodiment of autonomous current source ACS .

[0055] According to an embodiment , autonomous current source ACS comprises a first current source CTAT and a second current source PTAT . Current source CTAT and current source PTAT are coupled in parallel between terminal OUT of switch SW and conductive pad P_Gnd . Current source CTAT provides a current ICTAT and current source PTAT provides a current IPTAT . Current ICS is equal to the sum of current ICTAT and current IPTAT . The intensity of current ICS is sel f- fixed by the operation of the autonomous current source ACS and does not change with temperature due to the temperature compensation circuit , comprising first current source CTAT and a second current source PTAT , incorporated in the autonomous current source ACS .

[0056] Figure 7 presents the curves of evolution of currents ICTAT , IPTAT , and ICS of the circuit of Figure 6 with respect to the temperature Temp . Current source CTAT provides a current ICTAT that decreases when the temperature of the components of the autonomous current source ACS increases . Current source PTAT provides a current IPTAT that increases when the temperature of thecomponents of the autonomous current source ACS increases . The intensity of currents ICTAT and PTAT and the rates of variations of currents ICTAT and PTAT are determined so that current ICS , that is equal to the sum of current ICTAT and current IPTAT , is substantially independent from the temperature , in a usual temperature operation range of the display pixel , for example from -35 ° C to 85 ° C .

[0057] Figure 8 shows a circuit diagram of an embodiment of autonomous current source ACS of Figure 6 .

[0058] Autonomous current source ACS comprises a di fferential pair comprising a MOS transistor Tl , for example an N-MOS transistor, and a MOS transistor T2 , for example an N-MOS transistor . The sources of transistors Tl and T2 are coupled, preferably connected, to a first terminal of a resistance Rl , the second terminal of resistance R1 being coupled, preferably connected, to conductive pad P_Gnd coupled to the source of low reference potential Gnd .

[0059] Autonomous current source ACS further comprises a current mirror comprising a MOS transistor T3 , for example a P-MOS transistor, a MOS transistor T4 , for example a P- MOS transistor, and a MOS transistor T5 , for example a P- MOS transistor . The gate of transistor T3 is coupled, preferably connected, to the drain of transistor T3 , to the gate of transistor T4 , and to the gate of transistor T5 . The source of transistor T3 , the source of transistor T4 , and the source of transistor T5 are coupled, preferably connected, to terminal OUT . The drain of transistor T3 is coupled, preferably connected, to the drain of transistor Tl . The drain of transistor T4 is coupled, preferably connected, to the drain of transistor T2 . The drain of transistor T5 is coupled, preferably connected, to the gate of transistor T2 .

[0060] Autonomous current source ACS further comprises a MOS transistor T6, for example a N-MOS transistor, that is diode mounted. The source of transistor T6 is coupled, preferably connected, to conductive pad P_Gnd. The drain of transistor T6 is coupled, preferably connected, to the gate of transistor T2. The gate of transistor T6 is coupled, preferably connected, to the drain of transistor T6. Autonomous current source ACS further comprises MOS transistor T7, for example a P-MOS transistor. The source of transistor T7 is coupled, preferably connected, to node OUT. The drain of transistor T7 is coupled, preferably connected, to the gate of transistor Tl. The gate of transistor T7 is coupled, preferably connected, to the drain of transistor T2. Autonomous current source ACS further comprises a resistance R2 having a first terminal coupled, preferably connected, to the gate of transistor Tl and having a second terminal coupled, preferably connected, to conductive pad P_Gnd.

[0061] A current II flows through transistor T3. Transistors T3, T4, and T5 form a current mirror so that the currents flowing through transistors T3, T4, and T5 are equal to current II. A current 12 flows through resistance R2. Current ICS is equal to the sum of current 12 and three times current II.

[0062] Calling Vgs6 the gate-source voltage of transistor T6 and Vgsl the gate-source voltage of transistor Tl, current Il is given by the following relation: [Math 1]11= (Vgs6-Vgsl) / (2-Rl)

[0063] Resistance R2, gate-source voltage Vgs6 and gatesource voltage Vgsl decrease with temperature. The variations of gate-source voltage Vgs6 and gate-sourcevoltage Vgsl with temperature being identical, this leads to an increase of II with temperature.

[0064] In operation, gate-source voltage Vgsl of transistor T1 and gate-source voltage Vgs2 of transistor T2 tend to be maintained equal. Therefore, current 12 is given by the following relation: [Math 2]12= (Vgs6) / (R2)

[0065] Figure 9 shows the curves of evolution of the variation, expressed in percent, of resistance R2 and the variation, expressed in percent, of gate-source voltage Vgs6 of transistor T6 of the circuit of Figure 8 with respect to the temperature Temp. Both resistance R2 and gate-source voltage Vgs6 decrease with temperature. As shown in Figure 9, the variation of gate-source voltage Vgs6 of transistor T6 is higher than the variation of resistance R2 with temperature. This leads to a decrease of 12 with temperature.

[0066] Current ICTAT previously disclosed corresponds to current 12. Current IPTAT previously disclosed corresponds to three times current II. The structure of autonomous current source ACS is advantageously simple since it comprises only seven MOS transistors and two resistances. The intensity of current ICS can be adjusted by modifying resistances R1 and R2. As an example, each of resistances R1 and R2 can be a variable resistance that can adjusted by a register.

[0067] Figure 10 is a figure similar to Figure 5 showing another embodiment of autonomous current source ACS. Autonomous adjustable current source ACS comprises the adjustable current source CCS and an analog circuit 60 (Analog block) that provides signal Bias. Analog circuit60 is supplied with power voltage VCS that corresponds to the voltage between terminal OUT of switch SW and conductive pad P_Gnd . As an example , adj ustable current source VCS corresponds to a MOS transistor, for example a N-MOS transistor . Signal Bias then corresponds to the gatesource voltage of transistor VCS .

[0068] Various embodiments and variants have been described . Those skilled in the art will understand that certain features of these various embodiments and variants may be combined, and other variants will occur to those skilled in the art .

[0069] Finally, the practical implementation of the described embodiments and variations is within the abilities of those skilled in the art based on the functional indications given hereabove .

[0070] In particular, in the previously disclosed embodiments of the light-emitting circuit 52 , the light-emitting diode LED is shown with its anode connected to conductive pad P_Vcc, autonomous current source ACS is shown coupling terminal OUT and conductive pad P_Gnd, and switch SW is shown interposed between light-emitting diode LED and autonomous current source ACS . However, the relative positions of light-emitting diode LED, switch SW, and autonomous current source ACS can be di f ferent . As an example , the cathode of light-emitting diode LED can be connected to conductive pad P_Gnd . As another example , autonomous current source ACS can be interposed between light-emitting diode LED and switch SW . As another example , light-emitting diode LED can be interposed between autonomous current source ACS and switch SW . As another example , autonomous current source ACS can be connected to conductive pad P_Vcc .

Claims

CLAIMS l. A display pixel (12lfj) comprising a first electrically conductive bonding pad (P_Vcc) intended to receive a high reference voltage (Vcc) , a second electrically conductive bonding pad (P_Gnd) intended to receive a low reference voltage (Gnd) , a light-emitting device (LED) , a current source (ACS) supplying said light-emitting device (LED) with a current, the light-emitting device (LED) being in series with the current source (ACS) between the first and second electrically conductive bonding pads (P_Vcc, P_Gnd) , the only electrical path from the current source (ACS) up to the first electrically conductive bonding pad (P_Vcc) or up to the second electrically conductive bonding pad (P_Gnd) being through the light-emitting device (LED) .

2. The display pixel according to claim 1, further comprising a switch (SW) in series with the light-emitting device (LED) and the current source (ACS) .

3. The display pixel according to claim 2, further comprising a driver circuit (40) for driving the switch (SW) , the display pixel (12ifj) being configured to receive a first binary signal (Dataj) , the driver circuit (40) being configured to determine a digital signal (R, G, B) from successively received values of the first binary signal (Dataj) and to command the switch (SW) by pulse-width modulation based on the digital signal (R, G, B) .

4. The display pixel according to claim 2 or 3, wherein the switch is interposed between the light-emitting device(LED) and the current source (ACS) .

5. The display pixel according to nay of claims 1 to 4, wherein the light-emitting device (LED) comprises a light-emitting diode, the anode of the light-emitting diode (LED) beingcoupled to the first electrically conductive bonding pad(P_Vcc) .

6. The display pixel according to any of claims 1 to 5, wherein the current source (ACS) comprises a first current source terminal and a second current source terminal, the second current source terminal being coupled to the second electrically conductive bonding pad (P_Gnd) .

7. The display pixel according to any of claims 1 to 6, wherein the current source (ACS) comprises first and second current sources in parallel, the first current source (PTAT) being configured to provide a first current (IPTAT) that is proportional to absolute temperature and the second current source (CTAT) being configured to provide a second current (ICTAT) that is complementary to absolute temperature.

8. The display pixel according to claim 7, wherein the current source (ACS) comprises:-first and second current source terminals (OUT, P_Gnd) ; -first, second, third, fourth, fifth, sixth, and seventh MOS transistors (Tl, T2, T3, T4, T5, T6, T7) , each having a first power terminal, a second power terminal and a gate; -first and second resistances (Rl, R2 ) , each having first and second resistance terminals, the second power terminals of the first and second transistors (Tl, T2) being coupled to the first resistance terminal of the first resistance (Rl) , the second resistance terminal of the first resistance (Rl) being coupled to the second current source terminal (P_Gnd) , the gate of the third transistor (T3) being coupled to the first power terminal of the third transistor (T3) , to the gate of the fourth transistor (T4) , and to the gate of the fifth transistor (T5) , the second power terminals of the third, fourth, and fifth transistor (T3, T4, T5) beingcoupled to the first current source terminal (OUT) , the first power terminal of the third transistor (T3) being coupled to the first power terminal of the first transistor (Tl) , the first power terminal of the fourth transistor (T4) being coupled to the first power terminal of the second transistor (T2) , the first power terminal of the fifth transistor (T5) being coupled to the gate of the second transistor (T2) , the second power terminal of the sixth transistor (T6) being coupled to the second current source terminal (P_Gnd) , the first power terminal of the sixth transistor (T6) being coupled to the gate of the second transistor (T2) , the gate of the sixth transistor (T6) being coupled to the first power terminal of the sixth transistor (T6) , the second power terminal of the seventh transistor (T7) being coupled to the first current source terminal (OUT) , the first power terminal of the seventh transistor (T7) being coupled to the gate of the first transistor (Tl) , the gate of the seventh transistor (T7) being coupled to the first power terminal of the second transistor (T2) , the first resistance terminal of the second resistance (R2) being coupled to the gate of the first transistor (Tl) , and the second resistance terminal of the second resistance (R2) being coupled to second current source terminal (P_Gnd) .

9. A display screen (10) comprising: display pixels (12ifj) according to any one of claims 1 to 8; first electrodes (18i) coupled to the display pixels; a first circuit (22) for delivering a selection signal (Comi) on each first electrode for the selection of the display pixels (12ifj) coupled to the first electrode; second electrodes (20j ) coupled to the display pixels; anda second circuit (24) for delivering data signals (Dataj) on the second electrodes.

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