Data transmission method and related apparatus

Abstract

Provided in the embodiments of the present application are a data transmission method and a related apparatus. Specifically, a sending end acquires a super-frame comprising a plurality of sub-frames, wherein each sub-frame comprises training symbols and pilot symbols; in a polarization direction, the number of training symbols in the sub-frame is NTS, the number of pilot symbols in the sub-frame is NPS, NTS and NPS are both an integer greater than 1, NTS+NPS is an odd number, and NTS+NPS is greater than or equal to 5; one symbol in the subframe is both a training symbol and a pilot symbol, each training symbol and each pilot symbol are each one of four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj in total, and A is a real number; and each consecutive NPG symbols in the subframe comprise a pilot symbol located at a fixed position, and NPG is 96 or 128. Further, a sending end sends a superframe. It can be seen that the interval for inserting pilot symbols in a subframe has been increased, thereby reducing redundancy. In addition, one symbol in the sub-frame is both a training symbol and a pilot symbol, thereby simplifying the structure of the sub-frame.

Description

A data transmission method and related device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on September 28, 2023, with application number 202311288520.2 and invention name “A Data Transmission Method and Related Devices”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The embodiments of the present application relate to the field of optical communications, and in particular to a data transmission method and related devices. Background Art

[0003] Driven by 5G, cloud computing, big data, and artificial intelligence, high-speed optical transmission networks are developing towards high capacity, packetization, and intelligence. Coherent optical communication systems utilize the amplitude, phase, polarization, and frequency of light waves to carry information. To combat optical signal distortion caused by dispersion, polarization-related impairments, noise, nonlinear effects, and other factors during transmission and maintain long-distance transmission, coherent optical communication systems typically incorporate a number of designed fixed symbol sequences into the transmitted symbol sequence to facilitate recovery of the transmitted symbols at the receiving end.

[0004] The existing transmission symbol sequence is mainly used in 400Gbps or 800Gbps scenarios, and cannot adapt to future scenarios above 800Gbps (including 1.2Tbps, 1.6Tbps, etc.), and the transmission redundancy is large.

[0005] Summary of the Invention

[0006] The embodiments of the present application provide a data transmission method and related devices, which solve the problem that the transmission symbol sequence of the prior art cannot be applied to scenarios above 800Gbps.

[0007] In a first aspect, an embodiment of the present application provides a data transmission method, which is applied to a transmitting end. Specifically, the transmitting end obtains a superframe including multiple subframes, and the subframe includes training symbols and pilot symbols. In one polarization direction, the number of training symbols in the subframe is N TS , the number of pilot symbols in a subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS Greater than or equal to 5. There is a symbol in the subframe that is both a training symbol and a pilot symbol. Each training symbol and each pilot symbol is one of the four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, where A is a real number. Each consecutive N in the subframePG The symbols include a pilot symbol located at a fixed position, N PG is 96 or 128. Furthermore, the transmitting end sends a superframe. It should be noted that this method can also be applied to a specific module in the transmitting end, such as a signal processor in the transmitting end. It should be understood that when a module acquires a superframe, it can be understood as the module itself generating a superframe, or it can be understood as the module receiving a superframe sent from a preceding module. It should also be understood that when a module sends a superframe, it can be understood as the module sending a superframe to a receiving end via a channel, or it can be understood as the module sending a superframe to a subsequent module.

[0008] In this embodiment, every 96 or 128 consecutive symbols in a subframe include a pilot symbol. This increases the spacing between pilot symbols within a subframe, reducing redundancy. Furthermore, one symbol in a subframe serves as both a training symbol and a pilot symbol, simplifying the subframe structure.

[0009] In some possible implementations, in a subframe, a training symbol sequence including multiple training symbols in a first polarization direction is different from a training symbol sequence including multiple training symbols in a second polarization direction, and a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, thereby avoiding the problem of a receiver being unable to distinguish between the two polarization directions during actual transmission. The first polarization direction and the second polarization direction are orthogonal to each other.

[0010] In some possible implementations, in one subframe, a total of N training symbols and all pilot symbols are included in one polarization direction. TS +N PS The sum of the real parts of the -1 symbols is 0, and the total number of N symbols in one polarization direction includes all training symbols and all pilot symbols. TS +N PS The sum of the imaginary parts of the -1 symbols is 0, thus achieving DC balance, which helps the receiving end restore signal quality.

[0011] In some possible implementations, in one subframe, a total of N training symbols and all pilot symbols are included in one polarization direction. TS +N PS The difference between the numbers of symbols with values ​​of -A-Aj, -A+Aj, A-Aj and A+Aj in the -1 symbol is less than or equal to 2, which effectively ensures that the number of symbols in each polarization direction is close to balance.

[0012] In some possible embodiments, in one subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, effectively ensuring the balance of the number of symbols in the two polarization directions.

[0013] In some possible implementations, in one subframe, N TS The continuous training symbols are arranged from the beginning of the subframe, making the structure of the subframe more neat.

[0014] In some possible implementations, N TS The symbol at the starting position in the consecutive training symbols is both a training symbol and a pilot symbol, so that the arrangement of the pilot symbols is more conducive to standardization.

[0015] In some possible implementations, the subframe arranged in the first position in the superframe is a first-class subframe, and the first-class subframe also includes a frame synchronization symbol, a reserved symbol, and a pre-framing symbol, which enriches the functional implementation of the first-class subframe. Each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j.A FAW -A FAW j and A FAW +A FAW One of the four plural forms of j, A FAW In the first type of subframe, the training symbol precedes the frame synchronization symbol, the frame synchronization symbol precedes the reserved symbol, and the reserved symbol precedes the pre-framing symbol.

[0016] In some possible implementations, A=A FAW .

[0017] In some possible implementations, the superframe includes at least one second-type subframe, the second-type subframe further includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

[0018] In some possible implementations, the number of pre-framing symbols in a superframe is N. CW , the total number of symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following:

[0019] N PG =128, NCW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080;

[0020] N PG =128, N CW =344064, N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160;

[0021] N PG =128, N CW =516096, N F =520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240;

[0022] N PG =128, N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320;

[0023] N PG =128, N CW =150528,N F =152064 or 152192 or 152320;

[0024] N PG =128, N CW =129024,N F =130048 or 130176 or 130560;

[0025] N PG =128, N CW =107520,N F =108416 or 108544 or 108672 or 108800;

[0026] N PG =128, N CW =175616, N F =177152 or 177280 or 177408 or 177536 or 177664;

[0027] N PG =128, N CW =351232, N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328;

[0028] N PG =128, N CW =526848,N F =531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120;

[0029] N PG =128, N CW =702464, N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656;

[0030] N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528;

[0031] N PG =96, N CW =344064, N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056;

[0032] N PG =96, N CW =516096, N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776;

[0033] N PG =96, NCW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400;

[0034] N PG =96, N CW =150528,N F =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736;

[0035] N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944;

[0036] N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056;

[0037] N PG =96, N CW =175616, N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176;

[0038] N PG =96, N CW =351232, N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448;

[0039] N PG =96, N CW =526848,N F=532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528;

[0040] N PG =96, N CW =702464, N F =709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

[0041] In some possible implementations, in one polarization direction, the modulation format of the symbols in the superframe is Quadrature Phase Shift Keying (QPSK), with A = -1 or 1. Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, with A = -1, 1, -3, 3, or Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, A = -1, 1, -3, 3, -5, 5, -7 or 7.

[0042] In a second aspect, an embodiment of the present application provides a data transmission method, which is applied to a receiving end. Specifically, the receiving end receives a superframe including multiple subframes, and the subframe includes training symbols and pilot symbols. In one polarization direction, the number of training symbols in the subframe is N. TS , the number of pilot symbols in a subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS Greater than or equal to 5. One symbol in a subframe is both a training symbol and a pilot symbol. Each training symbol and pilot symbol is one of four complex numbers: -A-Aj, -A+Aj, A-Aj, or A+Aj, where A is a real number. Every 96 or 128 consecutive symbols in a subframe contain a pilot symbol at a fixed position. The receiving end then decodes the superframe.

[0043] In some possible implementations, in a subframe, a training symbol sequence including multiple training symbols in a first polarization direction is different from a training symbol sequence including multiple training symbols in a second polarization direction, and a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, thereby avoiding the problem of a receiver being unable to distinguish between the two polarization directions during actual transmission. The first polarization direction and the second polarization direction are orthogonal to each other.

[0044] In some possible implementations, in one subframe, a total of N training symbols and all pilot symbols are included in one polarization direction. TS +N PS The sum of the real parts of the -1 symbols is 0, and the total number of N symbols in one polarization direction includes all training symbols and all pilot symbols. TS +N PS The sum of the imaginary parts of the -1 symbols is 0, thus achieving DC balance, which helps the receiving end restore signal quality.

[0045] In some possible implementations, in one subframe, a total of N training symbols and all pilot symbols are included in one polarization direction. TS +N PS The difference between the numbers of symbols with values ​​of -A-Aj, -A+Aj, A-Aj and A+Aj in the -1 symbol is less than or equal to 2, which effectively ensures that the number of symbols in each polarization direction is close to balance.

[0046] In some possible embodiments, in one subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, effectively ensuring the balance of the number of symbols in the two polarization directions.

[0047] In some possible implementations, in one subframe, N TS The continuous training symbols are arranged from the beginning of the subframe, making the structure of the subframe more neat.

[0048] In some possible implementations, N TS The symbol at the starting position in the consecutive training symbols is both a training symbol and a pilot symbol, so that the arrangement of the pilot symbols is more conducive to standardization.

[0049] In some possible implementations, the subframe arranged in the first position in the superframe is a first-class subframe, and the first-class subframe also includes a frame synchronization symbol, a reserved symbol, and a pre-framing symbol, which enriches the functional implementation of the first-class subframe. Each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j.A FAW -A FAW j and A FAW +A FAW One of the four plural forms of j, A FAW In the first type of subframe, the training symbol precedes the frame synchronization symbol, the frame synchronization symbol precedes the reserved symbol, and the reserved symbol precedes the pre-framing symbol.

[0050] In some possible implementations, A=A FAW .

[0051] In some possible implementations, the superframe includes at least one second-type subframe, the second-type subframe further includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

[0052] In some possible implementations, the number of pre-framing symbols in a superframe is N. CW , the total number of symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following:

[0053] N PG =128, N CW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080;

[0054] N PG =128, N CW =344064, N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160;

[0055] N PG =128, N CW =516096, N F=520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240;

[0056] N PG =128, N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320;

[0057] N PG =128, N CW =150528,N F =152064 or 152192 or 152320;

[0058] N PG =128, N CW =129024,N F =130048 or 130176 or 130560;

[0059] N PG =128, N CW =107520,N F =108416 or 108544 or 108672 or 108800;

[0060] N PG =128, N CW =175616, N F =177152 or 177280 or 177408 or 177536 or 177664;

[0061] N PG =128, N CW =351232, N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328;

[0062] N PG =128, N CW =526848,N F =531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120;

[0063] N PG =128, N CW =702464, N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656;

[0064] N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528;

[0065] N PG =96, N CW =344064, N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056;

[0066] N PG =96, N CW =516096, N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776;

[0067] N PG =96, N CW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400;

[0068] N PG =96, N CW =150528,N F =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736;

[0069] N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944;

[0070] N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056;

[0071] N PG =96, N CW =175616, N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176;

[0072] N PG =96, N CW =351232, N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448;

[0073] N PG =96, N CW =526848,N F =532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528;

[0074] N PG =96, N CW =702464, N F =709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

[0075] In some possible implementations, in one polarization direction, the modulation format of the symbols in the superframe is QPSK, A=-1 or 1. Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, A=-1, 1, -3, 3, or Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, A = -1, 1, -3, 3, -5, 5, -7 or 7.

[0076] In a third aspect, an embodiment of the present application provides a chip comprising a processor and a memory, the memory and the processor being interconnected via lines, instructions being stored in the memory, and the processor being used to execute the method described in any one of the embodiments of the first and second aspects.

[0077] In a fourth aspect, an embodiment of the present application provides a data transmission device applied to a transmitting end, the data transmission device comprising: a processing unit and a transmitting unit. The processing unit is configured to: obtain a superframe comprising a plurality of subframes, wherein the subframe comprises a training symbol and a pilot symbol. In one polarization direction, the number of training symbols in a subframe is N. TS , the number of pilot symbols in a subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS Greater than or equal to 5. One symbol in a subframe is both a training symbol and a pilot symbol. Each training symbol and each pilot symbol is one of four complex numbers: -A-Aj, -A+Aj, A-Aj, and A+Aj, where A is a real number. Every 96 or 128 consecutive symbols in a subframe include a pilot symbol at a fixed position. The transmitting unit is configured to transmit a superframe.

[0078] In some possible implementations, in a subframe, a training symbol sequence including multiple training symbols in a first polarization direction is different from a training symbol sequence including multiple training symbols in a second polarization direction, and a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, thereby avoiding the problem of a receiver being unable to distinguish between the two polarization directions during actual transmission. The first polarization direction and the second polarization direction are orthogonal to each other.

[0079] In some possible implementations, in one subframe, a total of N training symbols and all pilot symbols are included in one polarization direction. TS +N PSThe sum of the real parts of the -1 symbols is 0, and the total number of N symbols in one polarization direction includes all training symbols and all pilot symbols. TS +N PS The sum of the imaginary parts of the -1 symbols is 0, thus achieving DC balance, which helps the receiving end restore signal quality.

[0080] In some possible implementations, in one subframe, a total of N training symbols and all pilot symbols are included in one polarization direction. TS +N PS The difference between the numbers of symbols with values ​​of -A-Aj, -A+Aj, A-Aj and A+Aj in the -1 symbol is less than or equal to 2, which effectively ensures that the number of symbols in each polarization direction is close to balance.

[0081] In some possible embodiments, in one subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, effectively ensuring the balance of the number of symbols in the two polarization directions.

[0082] In some possible implementations, in one subframe, N TS The continuous training symbols are arranged from the beginning of the subframe, making the structure of the subframe more neat.

[0083] In some possible implementations, N TS The symbol at the starting position in the consecutive training symbols is both a training symbol and a pilot symbol, so that the arrangement of the pilot symbols is more conducive to standardization.

[0084] In some possible implementations, the subframe arranged in the first position in the superframe is a first-class subframe, and the first-class subframe also includes a frame synchronization symbol, a reserved symbol, and a pre-framing symbol, which enriches the functional implementation of the first-class subframe. Each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j.A FAW -A FAW j and A FAW +A FAW One of the four plural forms of j, A FAW In the first type of subframe, the training symbol precedes the frame synchronization symbol, the frame synchronization symbol precedes the reserved symbol, and the reserved symbol precedes the pre-framing symbol.

[0085] In some possible implementations, A=A FAW .

[0086] In some possible implementations, the superframe includes at least one second-type subframe, the second-type subframe further includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

[0087] In some possible implementations, the number of pre-framing symbols in a superframe is N. CW , the total number of symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following:

[0088] N PG =128, N CW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080;

[0089] N PG =128, N CW =344064, N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160;

[0090] N PG =128, N CW =516096, N F =520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240;

[0091] N PG =128, N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320;

[0092] N PG =128, N CW =150528,N F =152064 or 152192 or 152320;

[0093] N PG =128, N CW =129024,N F =130048 or 130176 or 130560;

[0094] N PG =128, N CW =107520,N F =108416 or 108544 or 108672 or 108800;

[0095] N PG =128, N CW =175616, N F =177152 or 177280 or 177408 or 177536 or 177664;

[0096] N PG =128, N CW =351232, N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328;

[0097] N PG =128, N CW =526848,N F =531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120;

[0098] N PG =128, N CW =702464, N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656;

[0099] N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528;

[0100] N PG =96, N CW=344064, N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056;

[0101] N PG =96, N CW =516096, N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776;

[0102] N PG =96, N CW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400;

[0103] N PG =96, N CW =150528,N F =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736;

[0104] N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944;

[0105] N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056;

[0106] N PG =96, N CW =175616, N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176;

[0107] N PG=96, N CW =351232, N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448;

[0108] N PG =96, N CW =526848,N F =532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528;

[0109] N PG =96, N CW =702464, N F =709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

[0110] In some possible implementations, in one polarization direction, the modulation format of the symbols in the superframe is QPSK, A=-1 or 1. Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, A=-1, 1, -3, 3, or Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, A = -1, 1, -3, 3, -5, 5, -7 or 7.

[0111] In a fifth aspect, an embodiment of the present application provides a data transmission device applied to a receiving end, the data transmission device comprising: a receiving unit and a processing unit. The receiving unit is configured to receive a superframe comprising a plurality of subframes, wherein the subframe comprises a training symbol and a pilot symbol. In one polarization direction, the number of training symbols in a subframe is N. TS , the number of pilot symbols in a subframe is N PS , N TS and N PS are all integers greater than 1, N TS +NPS is an odd number, N TS +N PS Greater than or equal to 5. One symbol in a subframe is both a training symbol and a pilot symbol. Each training symbol and each pilot symbol is one of four complex numbers: -A-Aj, -A+Aj, A-Aj, and A+Aj, where A is a real number. Every 96 or 128 consecutive symbols in a subframe contain a pilot symbol at a fixed position. The processing unit is configured to decode the superframe.

[0112] In some possible implementations, in a subframe, a training symbol sequence including multiple training symbols in a first polarization direction is different from a training symbol sequence including multiple training symbols in a second polarization direction, and a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, thereby avoiding the problem of a receiver being unable to distinguish between the two polarization directions during actual transmission. The first polarization direction and the second polarization direction are orthogonal to each other.

[0113] In some possible implementations, in one subframe, a total of N training symbols and all pilot symbols are included in one polarization direction. TS +N PS The sum of the real parts of the -1 symbols is 0, and the total number of N symbols in one polarization direction includes all training symbols and all pilot symbols. TS +N PS The sum of the imaginary parts of the -1 symbols is 0, thus achieving DC balance, which helps the receiving end restore signal quality.

[0114] In some possible implementations, in one subframe, a total of N training symbols and all pilot symbols are included in one polarization direction. TS +N PS The difference between the numbers of symbols with values ​​of -A-Aj, -A+Aj, A-Aj and A+Aj in the -1 symbol is less than or equal to 2, which effectively ensures that the number of symbols in each polarization direction is close to balance.

[0115] In some possible embodiments, in one subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, effectively ensuring the balance of the number of symbols in the two polarization directions.

[0116] In some possible implementations, in one subframe, N TSThe continuous training symbols are arranged from the beginning of the subframe, making the structure of the subframe more neat.

[0117] In some possible implementations, N TS The symbol at the starting position in the consecutive training symbols is both a training symbol and a pilot symbol, so that the arrangement of the pilot symbols is more conducive to standardization.

[0118] In some possible implementations, the subframe arranged in the first position in the superframe is a first-class subframe, and the first-class subframe also includes a frame synchronization symbol, a reserved symbol, and a pre-framing symbol, which enriches the functional implementation of the first-class subframe. Each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j.A FAW -A FAW j and A FAW +A FAW One of the four plural forms of j, A FAW In the first type of subframe, the training symbol precedes the frame synchronization symbol, the frame synchronization symbol precedes the reserved symbol, and the reserved symbol precedes the pre-framing symbol.

[0119] In some possible implementations, A=A FAW .

[0120] In some possible implementations, the superframe includes at least one second-type subframe, the second-type subframe further includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

[0121] In some possible implementations, the number of pre-framing symbols in a superframe is N. CW , the total number of symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following:

[0122] N PG =128, N CW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080;

[0123] N PG =128, N CW =344064, N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160;

[0124] N PG =128, N CW =516096, N F =520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240;

[0125] N PG =128, N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320;

[0126] N PG =128, N CW =150528,N F =152064 or 152192 or 152320;

[0127] N PG =128, N CW =129024,N F =130048 or 130176 or 130560;

[0128] N PG =128, N CW =107520,N F =108416 or 108544 or 108672 or 108800;

[0129] N PG =128, N CW =175616, N F =177152 or 177280 or 177408 or 177536 or 177664;

[0130] N PG =128, N CW =351232, N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328;

[0131] N PG =128, N CW =526848,N F=531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120;

[0132] N PG =128, N CW =702464, N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656;

[0133] N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528;

[0134] N PG =96, N CW =344064, N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056;

[0135] N PG =96, N CW =516096, N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776;

[0136] N PG =96, N CW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400;

[0137] N PG =96, N CW =150528,NF =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736;

[0138] N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944;

[0139] N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056;

[0140] N PG =96, N CW =175616, N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176;

[0141] N PG =96, N CW =351232, N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448;

[0142] N PG =96, N CW =526848,N F =532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528;

[0143] N PG =96, N CW =702464, N F=709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

[0144] In some possible implementations, in one polarization direction, the modulation format of the symbols in the superframe is QPSK, A=-1 or 1. Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, A=-1, 1, -3, 3, or Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, A = -1, 1, -3, 3, -5, 5, -7 or 7.

[0145] In the sixth aspect, an embodiment of the present application provides a data transmission system, which includes a data transmission device applied to the sending end as described in any embodiment of the fourth aspect and a data transmission device applied to the receiving end as described in any embodiment of the fifth aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0146] FIG1 is a schematic diagram of a communication system used in an embodiment of the present application;

[0147] FIG2 is a schematic diagram of a framing process in an embodiment of the present application;

[0148] FIG3 is a schematic diagram of a data transmission method according to an embodiment of the present application;

[0149] FIG4 is a schematic diagram of the structure of a superframe in an embodiment of the present application;

[0150] FIG5 is a schematic diagram of a structure of a subframe in an embodiment of the present application;

[0151] FIG6 is a schematic diagram of another structure of a subframe in an embodiment of the present application;

[0152] FIG7 is a schematic diagram of a constellation diagram in two polarization directions according to an embodiment of the present application;

[0153] FIG8 is another schematic diagram of a constellation diagram in two polarization directions according to an embodiment of the present application;

[0154] FIG9 is a schematic diagram of a simulated symbol data flow in an embodiment of the present application;

[0155] FIG10 is a schematic diagram of a first implementation of a superframe and a subframe in an embodiment of the present application;

[0156] FIG11 is a schematic diagram of a second implementation of a superframe and a subframe in an embodiment of the present application;

[0157] FIG12 is a schematic diagram of a third implementation of a superframe and a subframe in an embodiment of the present application;

[0158] FIG13 is a schematic diagram of a fourth implementation of a superframe and a subframe in an embodiment of the present application;

[0159] FIG14 is a schematic diagram of a fifth implementation of a superframe and a subframe in an embodiment of the present application;

[0160] FIG15 is a schematic diagram of a sixth implementation of a superframe and a subframe in an embodiment of the present application;

[0161] FIG16 is a schematic diagram of a seventh implementation of a superframe and a subframe in an embodiment of the present application;

[0162] FIG17 is a schematic diagram of an eighth implementation of a superframe and a subframe in an embodiment of the present application;

[0163] FIG18 is a schematic diagram of a ninth implementation of a superframe and a subframe in an embodiment of the present application;

[0164] FIG19 is a schematic diagram of a tenth implementation of a superframe and a subframe in an embodiment of the present application;

[0165] FIG20 is a schematic diagram of an eleventh implementation of a superframe and a subframe in an embodiment of the present application;

[0166] FIG21 is a schematic diagram of a twelfth implementation of a superframe and a subframe in an embodiment of the present application;

[0167] FIG22 is a schematic diagram of a thirteenth implementation of a superframe and a subframe in an embodiment of the present application;

[0168] FIG23 is a schematic diagram of a fourteenth implementation manner of a superframe and a subframe in an embodiment of the present application;

[0169] FIG24 is a schematic diagram of a fifteenth implementation of a superframe and a subframe in an embodiment of the present application;

[0170] FIG25 is a schematic diagram of a sixteenth implementation of a superframe and a subframe in an embodiment of the present application;

[0171] FIG26 is a schematic structural diagram of a data transmission device applied to a transmitting end in an embodiment of the present application;

[0172] FIG27 is a schematic structural diagram of a data transmission device applied to a receiving end in an embodiment of the present application;

[0173] FIG28 is another structural diagram of the data transmission device in an embodiment of the present application. DETAILED DESCRIPTION

[0174] The present invention provides a data transmission method and related apparatus. In a subframe, every 96 or 128 consecutive symbols include a pilot symbol. This increases the intervals between pilot symbols within the subframe, reducing redundancy. Furthermore, one symbol within the subframe serves as both a training symbol and a pilot symbol, simplifying the subframe structure.

[0175] Figure 1 is a schematic diagram of a communication system used in an embodiment of the present application. As shown in Figure 1, at the transmitting end, the information source provides a data stream to be sent; the encoder receives the data stream and encodes it, and the codeword information obtained by encoding the check bits and information bits is sent to the transmitting end signal processor for framing, and is transmitted through the channel to the receiving end; after the receiving end receives the distorted signal caused by noise or other damage in the channel, it is sent to the receiving end signal processor for dispersion compensation, synchronization, phase recovery and other operations, and then decoded by the decoder to restore the original data and send it to the destination. Among them, the data transmission method provided in the embodiment of the present application is applied to the transmitting end signal processor shown in Figure 1, which is a very important link in the communication system.

[0176] Figure 2 is a schematic diagram of the framing process in an embodiment of the present application. In a framing method, as shown in (a) in Figure 2, the received data sequence is symbol mapped (symbol map), including but not limited to Quadrature Phase Shift Keying (QPSK) and Quadrature Amplitude Modulation (QAM), and then polarization symbol division (Polarization distribution) is performed to obtain dual-polarization (DP) symbols, for example, DP-QPSK, DP-8QAM, DP-16QAM, DP-32QAM and DP-64QAM. A certain number of dual-polarization symbols are framed, and these dual-polarization symbols before framing are called pre-framing symbols, which can also be called payload symbols (payload). The framing process is as follows: A frame alignment word sequence (FAW sequence), a training sequence, reserved fields, and a pilot sequence are inserted into the X and Y polarization directions, respectively, to obtain a dual-polarization symbol sequence to be transmitted, called a super-frame (also known as a multi-frame). Here, the frame alignment word sequence is also referred to as a super-frame alignment word sequence. It should be noted that the frame alignment symbol sequence can also be used for link training; in this case, the frame alignment symbols can be considered a training symbol sequence.

[0177] In an embodiment of the present application, a dual-polarization symbol can be represented by two symbols, one of which is located in the X polarization direction and the other is located in the Y polarization direction, and each symbol can be represented by a complex number. For example, the symbol obtained by 16QAM modulation can be represented by any one of the following 16 complex numbers, ±1±1j, ±1±3j, ±3±1j and ±3±3j, where j is a complex unit and can also be represented by other letters such as i. It should be understood that in some cases, the real part and the imaginary part are normalized, but the essence does not change. Furthermore, a sequence with N dual-polarization symbols can be completely represented by two complex sequences of length N, one of which represents the symbol on the X polarization and the other represents the symbol on the Y polarization. Each complex sequence of length N is represented by a real sequence of length N and an imaginary sequence of length N, where N is an integer greater than 1.

[0178] Normally, the received data sequence is the information and check sequence obtained by the forward error correction code (FEC), and the framing operation shown in (a) of Figure 2 is performed on the symbols. In another framing method, as shown in (b) of Figure 2, the bits corresponding to the frame synchronization symbol sequence, the training symbol sequence, the reserved symbol sequence and the pilot symbol sequence are first inserted into the received data sequence according to the adopted symbol mapping rule, and then the symbols are mapped and polarization division is performed to obtain the same superframe as the operation in (a) of Figure 2. Similarly, in another framing method, as shown in (c) of Figure 2, the bits corresponding to the frame synchronization symbol sequence, the training symbol sequence, the reserved symbol sequence and the pilot symbol sequence are first inserted into the received data sequence according to the adopted symbol mapping rule, and then the polarization division and symbol mapping are performed to obtain the same superframe as the operation in (a) of Figure 2. It should be understood that in addition to the framing method introduced in Figure 2, there may be other similar framing methods, which will not be described in detail in this application.

[0179] Figure 3 is a schematic diagram of a data transmission method according to an embodiment of the present application. As shown in Figure 3, the data transmission method includes the following steps.

[0180] 101. A transmitting end obtains a superframe including multiple subframes.

[0181] FIG4 is a schematic diagram of the structure of a superframe in an embodiment of the present application. As shown in FIG4 , a superframe includes N SF subframes, each subframe includes N S symbols, then the superframe consists of N F Symbols, N F =N SF ×N S , N S and N SF are all integers greater than 1. The subframes in a superframe are divided into two categories, which are referred to as first-category subframes and second-category subframes. These two categories of subframes are introduced below.

[0182] FIG5 is a schematic diagram of a structure of a subframe in an embodiment of the present application. As shown in FIG5(a), the structure of the first type of subframe is shown. The first type of subframe includes training symbols, pilot symbols, frame synchronization symbols, reserved symbols and payload symbols. Usually, the first type of subframe is the subframe arranged in the first position in the superframe. Of course, it does not exclude the subframes located in other positions in the superframe. For example, the first type of subframe can also be the subframe arranged in the last position in the superframe. The other subframes in the superframe except the first type of subframe are the second type of subframes, as shown in FIG5(b). The second type of subframe is different from the first type of subframe. The second type of subframe includes training symbols, pilot symbols and payload symbols, but does not include frame synchronization symbols and reserved symbols.

[0183] For the first and second types of subframes, each subframe includes training symbols and pilot symbols. The training symbols are used for link training and / or subframe synchronization, and the pilot symbols are used for carrier phase recovery. In one polarization direction, the number of training symbols in a subframe is recorded as N. TS , the number of pilot symbols in a subframe is recorded as N PS , N TS and N PS are all integers greater than 1. It should be noted that there is a symbol in the subframe that is both a training symbol and a pilot symbol, that is, the symbol indicated by the dotted box in Figure 5. N TS The training symbols include the symbol indicated by the dotted box, N PS The pilot symbols also include the symbols indicated by the dotted box. TS +N PS Greater than or equal to 5, and N TS +N PS is an odd number. Usually, N TS Continuous training symbols are arranged from the beginning of the subframe, N TS The symbol at the starting position of the consecutive training symbols is both a training symbol and a pilot symbol. That is, the first symbol of the subframe is the first symbol of the training symbol sequence and the first symbol of the pilot symbol sequence. In other words, the first symbol of the training symbol sequence is also the first symbol of the pilot symbol sequence, and the first symbol of the training symbol sequence has the same value as the first symbol of the pilot symbol sequence. Of course, the symbol indicated by the dotted box in Figure 5 may also be N TS Any symbol among the training symbols is not limited in this application.

[0184] FIG6 is another structural diagram of a subframe in an embodiment of the present application. For each subframe in a superframe, each consecutive N PG symbols include a pilot symbol located at a fixed position, where N PG is 96 or 128. That is, N shown in Figure 5 PG is 128, and N shown in Figure 6 PG It is 96. It should be understood that since each successive N PG The position of the pilot symbol in each symbol is fixed, so the interval between two consecutive pilot symbols in the subframe is equal. PG The starting position of the symbols, of course, the pilot symbol is located at each consecutive N PG Any position in the symbol, no limitation is made here.

[0185] It should be noted that the frame synchronization symbol is used for synchronization between superframes. This frame synchronization symbol can be used together with the training symbols for synchronization between superframes, or together with the pilot symbols to achieve synchronization. It should be understood that the frame synchronization symbols are arranged continuously and can be immediately adjacent to the training symbols, as shown in Figures 5 and 6. In addition, there may be one or more symbol intervals between the frame synchronization symbol and the training symbols. Multiple frame synchronization symbols are typically followed by multiple reserved symbols, which can be reserved for other future uses. The reserved symbols should be randomized and may not be symbols on the constellation diagram of the modulation format used. Of course, in some applications, the reserved symbols may also be symbols on the constellation diagram of the modulation format used. A portion of the reserved symbols may also be fixed for other purposes, such as optical signal-to-noise ratio (OSNR) measurement, end-to-end (E2E) delay measurement, etc. The reserved symbols may also be located in one of multiple second-type subframes, which is not limited in this application. The remaining symbols are pre-framing symbols (i.e., payload symbols) that contain information and checksums. Pilot symbols do not overlap with reserved symbols, and pilot symbols do not overlap with pre-framing symbols. That is, there is no symbol that is both a pilot symbol and a pre-framing symbol, and there is no symbol that is both a pilot symbol and a reserved symbol.

[0186] Figure 7 is a schematic diagram of a constellation diagram in two polarization directions in an embodiment of the present application. Figure 8 is another schematic diagram of a constellation diagram in two polarization directions in an embodiment of the present application. It should be noted that each training symbol and each pilot symbol is one of four complex numbers: -A-Aj, -A+Aj, A-Aj and A+Aj, and A is a real number. In an embodiment of the present application, the value of A is determined by the modulation format used when generating the symbol. In some practical application scenarios, -A-Aj, -A+Aj, A-Aj and A+Aj are symbols on the constellation diagram of the modulation format used. For example, using QPSK, there are 4 symbols, and A=1 or -1. Each training symbol can be represented by one of -1-1j, -1+1j, 1-1j and 1+1j. In a subframe, the training symbols represented by the four complex numbers will exist, as will the pilot symbols. For another example, using 16QAM, there are 16 symbols, and A=1, -1, 3 or -3. Typically, training symbols and pilot symbols are the four outermost symbols on the constellation diagram, as shown by the hollow symbols in Figure 7 (a). In this case, when A = 3 or -3, each training symbol can be represented by one of -3-3j, -3+3j, 3-3j, and 3+3j. In a subframe, these four complex numbers representing training symbols also exist, as do pilot symbols. Similarly, using 64QAM, there are 64 symbols, and A = 1, -1, 3, -3, 5, -5, 7, or -7. Typically, the complex numbers representing training symbols and pilot symbols are A = 5, -5, 7, or -7. Assuming A = 7 or -7, as shown by the hollow symbols in Figure 8 (a), each training symbol can be represented by one of -7-7j, -7+7j, 7-7j, and 7+7j. In a subframe, these four complex numbers representing training symbols also exist, as do pilot symbols. In addition, a higher-order modulation format may be used, which will not be described in detail in this application. During actual transmission, the probability of symbol error can be reduced, which facilitates channel estimation.

[0187] It should be noted that each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j.A FAW -A FAW j and A FAW +A FAW One of the four plural forms of j, A FAW is a real number, where A FAW It may or may not be equal to A. Typically, A FAW Equal to A, at this time, the operation of inserting training symbols, pilot symbols, and frame synchronization symbols during the framing operation is relatively simple.

[0188] It should be noted that it is also possible to compress the symbols on the constellation diagram, and accordingly, the value of A will also be compressed accordingly. Taking 16QAM as an example, the power of the 16 symbols on the 16QAM constellation diagram is normalized, and the value becomes The value of A is or Taking 64QAM as an example, the power of the 64 symbols on the 64QAM constellation diagram is normalized. At this time, the value becomes The value of A is or In addition, other normalization methods may also be used, which are not limited in this application.

[0189] It should be understood that when the pilot symbols and training symbols -A-Aj, -A+Aj, A-Aj, and A+Aj use the outermost four symbols of the constellation, the sensitivity of the training and pilot symbols is high, but the peak-to-average power ratio is large. When the pilot symbols and training symbols take the values ​​-A-Aj, -A+Aj, A-Aj, and A+Aj and use the innermost four symbols of the constellation, the noise of the training and pilot symbols is small, but their sensitivity is low.

[0190] It should be noted that in some practical application scenarios, the pilot symbols and training symbols -A-Aj, -A+Aj, A-Aj, and A+Aj may not be symbols on the constellation diagram of the modulation format used. They may be four symbols in the middle area between the outermost four symbols and the innermost four symbols of the constellation diagram. In this case, the noise and sensitivity of the training and pilot symbols are average, but the peak-to-average power ratio is relatively low. Taking 16QAM as an example, the values ​​of the 16 symbols on the 16QAM constellation diagram are one of {±1±1j, ±1±3j, ±3±1j, ±3±3j}, and the value of the real number A satisfies 1≤A≤3. More specifically, as shown in (b) of Figure 7, the outermost four symbols of the constellation diagram are 3+3j, 3-3j, -3+3j, and -3-3j, and the innermost four symbols of the constellation diagram are 1+1j, 1-1j, -1+1j, and -1-1j. The values ​​of the pilot symbol and training symbol -A-Aj, -A+Aj, A-Aj, and A+Aj can be any four symbols in the middle area between the outermost four symbols and the innermost four symbols of the 16QAM constellation diagram. The specific value of the real number A can be selected according to the actual application scenario to achieve a good compromise between the peak-to-average power ratio of training and pilot, noise, and sensitivity. For example, the real number The values ​​of pilot symbols and training symbols are In addition, when the 16 symbols on the 16QAM constellation are power normalized, the value is One of the values ​​of real number A satisfies For example, real numbers The values ​​of pilot symbols and training symbols are Taking 64QAM as an example, the values ​​of the 64 symbols in the 64QAM constellation are one of {±1±1j, ±1±3j, ±1±5j, ±1±7j, ±3±1j, ±5±1j, ±7±1j, ±3±3j, ±3±5j, ±3±7j, ±5±3j, ±7±3j, ±5±5j, ±5±7j, ±7±5j, ±7±7j}, and the value of the real number A satisfies 1≤A≤7. More specifically, as shown in (b) of Figure 8, the outermost four symbols of the constellation are 7+7j, 7-7j, -7+7j, and -7-7j, and the innermost four symbols are 1+1j, 1-1j, -1+1j, and -1-1j. The values ​​of the pilot symbol and training symbol -A-Aj, -A+Aj, A-Aj, and A+Aj can be any four symbols in the middle area between the outermost four symbols and the innermost four symbols of the 64QAM constellation diagram. The specific value of the real number A can be selected according to the actual application scenario to achieve a good compromise between the peak-to-average power ratio of training and pilot, noise, and sensitivity. For example, the real number The values ​​of pilot symbols and training symbols are In addition, when the 64 symbols on the 64QAM constellation are power normalized, the value is One of the values ​​of real number A satisfies For example, real numbers The values ​​of pilot symbols and training symbols are One of them.

[0191] It should be noted that, in a subframe, the training symbol sequence including multiple training symbols in the X polarization direction is different from the training symbol sequence including multiple training symbols in the Y polarization direction, and the pilot symbol sequence including multiple pilot symbols in the X polarization direction is different from the pilot symbol sequence including multiple pilot symbols in the Y polarization direction. The X polarization direction and the Y polarization direction are orthogonal to each other. For example, the sequence of training symbols in the X polarization direction is -A-Aj, -A-Aj, A+Aj, A-Aj, and the sequence of training symbols in the Y polarization direction is -A-Aj, -A-Aj, A+Aj, A+Aj. There is one difference in the training symbol sequences in the two polarization directions, which avoids the problem that the receiving end cannot distinguish the two polarization directions during actual transmission.

[0192] It should be noted that in one subframe, a total of N training symbols and pilot symbols are included in one polarization direction. TS +N PS The sum of the real parts of the -1 symbols is 0, and the total number of N symbols in one polarization direction includes all training symbols and all pilot symbols. TS +N PS The sum of the imaginary parts of the -1 symbols is 0, thus achieving DC balance, which is beneficial for the receiving end to restore the signal quality. It should be understood that since the training symbol sequence and the pilot symbol sequence share one symbol in the subframe, the repeated shared symbol needs to be subtracted when the training symbol sequence and the pilot symbol sequence are combined to calculate the number of symbols, that is, the training symbol sequence and the pilot symbol sequence have a total of N TS +N PS -1 symbol.

[0193] In one possible scenario, in one subframe, N of the training symbol sequence and pilot symbol sequence in one polarization direction are TS +N PS The difference between the number of symbols with the values ​​of -A-Aj, -A+Aj, A-Aj and A+Aj in the -1 symbol is less than or equal to 2, which effectively ensures that the number of symbols in each polarization direction is close to balance. For example, in one polarization direction, the number of -A-Aj is -The number of A+Aj is The number of A-Aj is The number of A+Aj is For example, in one polarization direction, the number of -A-Aj is -The number of A+Aj is The number of A-Aj is The number of A+Aj is For another example, in one polarization direction, the number of -A-Aj is -The number of A+Aj is The number of A-Aj is The number of A+Aj is For example, in one polarization direction, the number of -A-Aj is -The number of A+Aj is The number of A-Aj is The number of A+Aj is in, Indicates that the positive real number a is rounded down

[0194] In one possible scenario, in one subframe, there are N training symbols and pilot symbols in two polarization directions.TS +N PS -1 symbol is the number of -A-Aj, and the total number of training symbols and pilot symbols in two polarization directions is N TS +N PS -1 symbol is -A+Aj, and the total number of training symbols and pilot symbols in two polarization directions is N TS +N PS -1 symbol is the number of A-Aj and the total number of training symbols and pilot symbols in two polarization directions is N TS +N PS The number of A+Aj in the -1 symbol is the same, which effectively ensures the balance of the number of symbols in the two polarization directions.

[0195] As an example, N TS +N PS -1 training symbols and pilot symbols in two polarization directions are -A-Aj, respectively. and N TS +N PS -1 training symbol and the sum of the number of pilot symbols in the two polarization directions is -A-Aj is (N TS +N PS -1) / 2; N TS +N PS -1 training symbols and pilot symbols in two polarization directions are -A+Aj, respectively. and N TS +N PS -1 training symbol and the sum of the number of pilot symbols in the two polarization directions is -A+Aj is (N TS +N PS -1) / 2; N TS +N PS -1 The number of training symbols and pilot symbols in the two polarization directions is A-Aj respectively and N TS +N PS -1 The sum of the number of training symbols and pilot symbols in the two polarization directions A-Aj is (N TS +N PS -1) / 2; N TS +N PS -1 The number of training symbols and pilot symbols in the two polarization directions is A+Aj respectively. and N TS +N PS -1 The sum of the number of training symbols and pilot symbols in the two polarization directions is A+Aj (NTS +N PS -1) / 2.

[0196] As another example, N TS +N PS -1 training symbols and pilot symbols in two polarization directions are -A-Aj, respectively. and N TS +N PS -1 training symbol and the sum of the number of pilot symbols in the two polarization directions is -A-Aj is (N TS +N PS -1) / 2; N TS +N PS -1 training symbols and pilot symbols in two polarization directions are -A+Aj, respectively. and N TS +N PS -1 training symbol and the sum of the number of pilot symbols in the two polarization directions is -A+Aj is (N TS +N PS -1) / 2; N TS +N PS -1 The number of training symbols and pilot symbols in the two polarization directions is A-Aj respectively and N TS +N PS -1 The sum of the number of training symbols and pilot symbols in the two polarization directions A-Aj is (N TS +N PS -1) / 2; N TS +N PS -1 The number of training symbols and pilot symbols in the two polarization directions is A+Aj respectively. and N TS +N PS -1 The sum of the number of training symbols and pilot symbols in the two polarization directions is A+Aj (N TS +N PS -1) / 2.

[0197] It should be noted that, in the embodiment of the present application, the number of pre-framing symbols in the superframe N CWThe values ​​include but are not limited to 172032, 344064, 516096, 688128, 150528, 129024, 107520, 175616, 351232, 526848, 702464, 172032, 344064, 516096, 688128, 150528, 129024, 107520, 175616, 351232, 526848, and 702464.

[0198] 102. The transmitter sends a superframe to the receiver.

[0199] The superframe sent by the transmitter will be transmitted through the channel to the receiver.

[0200] FIG9 is a schematic diagram of an analog symbol data stream according to an embodiment of the present invention. As shown in FIG9 , in some possible scenarios, after the superframe symbol data stream undergoes digital to analog conversion (DAC), it can be viewed as four analog symbol data streams, which are marked as X, I 、X Q 、Y I and Y Q Among them, X I Simulate symbolic data flow and X Q The analog symbol data streams correspond to the real part sequence data stream and the imaginary part sequence data stream in the X polarization direction respectively. I Simulate symbolic data flow and Y Q The analog symbol data streams correspond to the real and imaginary sequential data streams in the Y polarization direction, respectively. It should be understood that the X and Y polarization directions (also referred to as the H and V polarization directions) are two mutually orthogonal polarization directions, and that two mutually orthogonal phase channels, I (In-phase) and Q (Quadrature), exist in each polarization direction. I and Q correspond to the real and imaginary sequential data streams, respectively.

[0201] 103. The receiving end decodes the superframe.

[0202] It should be understood that this application will not introduce in detail the specific operations after the receiving end receives the superframe. For details, please refer to the relevant introduction of Figure 1.

[0203] The following introduces some specific examples of the number of symbols in different parts of the superframe provided in the embodiments of the present application.

[0204] (1) Number of symbols before framing N CW = 172032, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is adopted, and other encoding methods can also be adopted; each consecutive NPG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 1. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0205] Except for OH, all other parameters are symbol counts, which can be understood as the number of dual-polarization symbols or the number of symbols in one polarization direction. Moreover, the number of different symbols in the two polarization directions is the same. For example, if there are 10 training symbols in one polarization direction and 10 training symbols in the other polarization direction, overall, there are 10 dual-polarization training symbols. Subsequent tables can be understood in this way and will not be repeated in this application.

[0206] The frame redundancy of the superframe architecture listed in Table 1 is low, OH < 1.20%. Table 1 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 1 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0207] Table 1

[0208] Consider the number of training symbols N TS No more than 11, combined with Table 1, we can get Table 2. The frame redundancy OH of the superframe architecture listed in Table 2 is less than 1.20%; the number of training symbols N in each subframe TSThe value range is 2 to 11 symbols; Table 2 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0209] Table 2

[0210] In some specific applications, the bus width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. It should be understood that when N PG =128, that is, when the first symbol of every 128 symbols in each subframe is the pilot symbol, the number of symbols in the superframe N F and the number of symbols in each subframe N S It must be an integer multiple of 128. Therefore, when the first symbol of every 128 symbols in each subframe is used as a pilot symbol, only the number of symbols N in the superframe needs to be considered. F It can be an integer multiple of 192. The subsequent tables showing the first symbol of every 128 symbols in each subframe as a pilot symbol can be understood in this way, and this application will not go into details. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 2, we can get Table 3. The frame redundancy OH of the cases listed in Table 3 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 3 shows the number of symbols N in each subframe. S No restrictions.

[0211] Table 3

[0212] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. Sis an integer multiple of 192, combined with Table 3, we can get Table 4. The frame redundancy OH of the cases listed in Table 4 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0213] Table 4

[0214] (2) Number of symbols before framing N CW =344064, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is adopted, and other encoding methods can also be adopted; each consecutive N PG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 5. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0215] The frame redundancy of the superframe architecture listed in Table 5 is as low as OH < 1.20%. Table 5 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 5 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0216] Table 5

[0217] Consider the number of training symbols N TS No more than 11, combined with Table 5, we can get Table 6. The frame redundancy OH of the superframe architecture listed in Table 6 is less than 1.20%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 6 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0218] Table 6

[0219] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 6, we can get Table 7. The frame redundancy OH of the cases listed in Table 7 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 7 shows the number of symbols N in each subframe. S No restrictions.

[0220] Table 7

[0221] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192, combined with Table 7, we can get Table 8. The frame redundancy OH of the cases listed in Table 8 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TSThe value range of the number is from 2 to 11 symbols.

[0222] Table 8

[0223] (3) Number of symbols before framing N CW =516096, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is used, and other encoding methods can also be used; each consecutive N PG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 9. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0224] The frame redundancy of the superframe architecture listed in Table 9 is low, OH < 1.20%. Table 9 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 9 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0225] Table 9

[0226] Consider the number of training symbols N TS No more than 11, combined with Table 9, we can get Table 10. The frame redundancy OH of the superframe architecture listed in Table 10 is less than 1.20%; the number of training symbols N in each subframe TSThe value range of is 2 to 11 symbols; Table 10 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0227] Table 10

[0228] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 10, we can get Table 11. The frame redundancy OH of the cases listed in Table 11 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 11 shows the number of symbols N in each subframe. S No restrictions.

[0229] Table 11

[0230] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192, combined with Table 11, we can get Table 12. The frame redundancy OH of the cases listed in Table 12 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0231] Table 12

[0232] (4) Number of symbols before framing N CW =688128, for example, an open FEC (OFEC) encoding method with a coding redundancy of about 15.3% is used, or other encoding methods can be used; each consecutive N PG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 13. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0233] The frame redundancy of the superframe architecture listed in Table 13 is as low as OH < 1.20%. Table 13 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 13 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0234] Table 13

[0235] Consider the number of training symbols N TS No more than 11, combined with Table 13, we can get Table 14. Then the frame redundancy OH of the superframe architecture listed in Table 14 is less than 1.20%; the number of training symbols N in each subframeTS The value range of is 2 to 11 symbols; Table 14 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0236] Table 14

[0237] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 14, we can get Table 15. The frame redundancy OH of the cases listed in Table 15 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 15 shows the number of symbols N in each subframe. S No restrictions.

[0238] Table 15

[0239] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192, combined with Table 15, we can get Table 16. The frame redundancy OH of the cases listed in Table 16 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0240] Table 16

[0241] (5) Number of symbols before framing N CW =150528, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 17.9% is used, and other encoding methods can also be used; each consecutive N PG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 17. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0242] The frame redundancy of the superframe architecture listed in Table 17 is low, OH < 1.20%. Table 17 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 17 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0243] Table 17

[0244] Consider the number of training symbols N TS No more than 11, combined with Table 17, we can get Table 18. The frame redundancy OH of the superframe architecture listed in Table 18 is less than 1.20%; the number of training symbols N in each subframe TSThe value range of is 2 to 11 symbols; Table 18 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0245] Table 18

[0246] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 18, we can get Table 19. The frame redundancy OH of the cases listed in Table 19 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 19 shows the number of symbols N in each subframe. S No restrictions.

[0247] Table 19

[0248] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192, combined with Table 19, we can get Table 20. The frame redundancy OH of the cases listed in Table 20 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0249] Table 20

[0250] (6) Number of symbols before framing N CW = 129024, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 21.5% is used, and other encoding methods can also be used; each consecutive N PG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 21. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0251] The frame redundancy of the superframe architecture listed in Table 21 is low, OH < 1.20%. Table 21 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 21 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0252] Table 21

[0253] Consider the number of training symbols N TS No more than 11, combined with Table 21, we can get Table 22. Then the frame redundancy OH of the superframe architecture listed in Table 22 is less than 1.20%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 22 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N FIn some specific applications, the bit width of the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. It should be noted that the number of symbols N in the superframe for all cases listed in Table 22 is F It is an integer multiple of 192 and 128.

[0254] Table 22

[0255] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192, combined with Table 22, we can get Table 23. The frame redundancy OH of the cases listed in Table 23 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0256] Table 23

[0257] (7) Number of symbols before framing N CW = 107520, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 27.0% is adopted, and other encoding methods can also be adopted; each consecutive N PG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RESThe sum of the parameters is as shown in Table 24. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0258] The frame redundancy of the superframe architecture listed in Table 24 is low, OH < 1.20%. Table 24 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 24 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0259] Table 24

[0260] Consider the number of training symbols N TS No more than 11, combined with Table 24, we can get Table 25. Then the frame redundancy OH of the superframe architecture listed in Table 25 is less than 1.20%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 25 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0261] Table 25

[0262] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 25, we can get Table 26. The frame redundancy OH of the cases listed in Table 26 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TSThe value range of is 2 to 11 symbols; Table 26 shows the number of symbols N in each subframe. S It should be noted that in this case (7) there is no superframe symbol number N F is an integer multiple of 192 and 128, and the number of symbols in each subframe is N S This also applies to integer multiples of 192 and 128.

[0263] Table 26

[0264] (8) Number of symbols before framing N CW =175616, for example, using a CFEC encoding method with a coding redundancy of about 15.3%, or other encoding methods; each consecutive N PG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 27. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0265] The frame redundancy of the superframe architecture listed in Table 27 is low, OH < 1.20%. Table 27 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 27 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0266] Table 27

[0267] Consider the number of training symbols N TS No more than 11, combined with Table 27, we can get Table 28. The frame redundancy OH of the superframe architecture listed in Table 28 is less than 1.20%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 28 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0268] Table 28

[0269] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 28, we can get Table 29. The frame redundancy OH of the cases listed in Table 29 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 29 shows the number of symbols N in each subframe. S No restrictions.

[0270] Table 29

[0271] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192, combined with Table 29, we can get Table 30. The frame redundancy OH of the cases listed in Table 30 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0272] Table 30

[0273] (9) Number of symbols before framing N CW =351232, for example, using a CFEC encoding method with a coding redundancy of about 15.3%, or other encoding methods; each consecutive N PG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 31. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0274] The frame redundancy of the superframe architecture listed in Table 31 is as low as OH < 1.20%. Table 31 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 31 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0275] Table 31

[0276] Consider the number of training symbols N TS No more than 11, combined with Table 31, we can get Table 32. Then the frame redundancy OH of the superframe architecture listed in Table 32 is less than 1.20%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 32 shows the number of symbols N in each subframe. Sand the number of symbols in the superframe N F There is no restriction.

[0277] Table 32

[0278] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 32, we can get Table 33. The frame redundancy OH of the cases listed in Table 33 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 33 shows the number of symbols N in each subframe. S No restrictions.

[0279] Table 33

[0280] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192, combined with Table 33, we can get Table 34. The frame redundancy OH of the cases listed in Table 34 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0281] Table 34

[0282] (10) Number of symbols before framing N CW =526848, for example, a CFEC encoding method with a coding redundancy of about 15.3% is used, or other encoding methods can be used; each consecutive N PG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 35. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0283] The frame redundancy of the superframe architecture listed in Table 35 is as low as OH < 1.20%. Table 35 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 35 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0284] Table 35

[0285] Consider the number of training symbols N TS No more than 11, combined with Table 35, we can get Table 36. Then the frame redundancy OH of the superframe architecture listed in Table 36 is less than 1.20%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 36 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0286] Table 36

[0287] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 36, we can get Table 37. The frame redundancy OH of the cases listed in Table 37 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 37 shows the number of symbols N in each subframe. S No restrictions.

[0288] Table 37

[0289] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192, combined with Table 37, we can get Table 38. The frame redundancy OH of the cases listed in Table 38 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0290] Table 38

[0291] (11) Number of symbols before framing N CW=702464, for example, a CFEC encoding method with a coding redundancy of about 15.3% is used, or other encoding methods can be used; each consecutive N PG =The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 39. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0292] The frame redundancy of the superframe architecture listed in Table 39 is low, OH < 1.20%. Table 39 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 39 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0293] Table 39

[0294] Consider the number of training symbols N TS No more than 11, combined with Table 39, we can get Table 40. The frame redundancy OH of the superframe architecture listed in Table 40 is less than 1.20%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 40 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0295] Table 40

[0296] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 40, we can get Table 41. The frame redundancy OH of the cases listed in Table 41 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 41 shows the number of symbols N in each subframe. S No restrictions.

[0297] Table 41

[0298] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192, combined with Table 41, we can get Table 42. The frame redundancy OH of the cases listed in Table 42 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0299] Table 42

[0300] (12) Number of symbols before framing N CW =172032, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is adopted, and other encoding methods can also be adopted; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 43. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0301] The frame redundancy of the superframe architecture listed in Table 43 is as low as OH < 1.50%. Table 43 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 43 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0302] Table 43

[0303] Consider the number of training symbols N TS No more than 11, combined with Table 43, we can get Table 44. Then the frame redundancy OH of the superframe architecture listed in Table 44 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 44 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0304] Table 44

[0305] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 44, we can get Table 45. The frame redundancy OH of the cases listed in Table 45 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 45 shows the number of symbols N in each subframe. S It should be noted that in this case (12) there is no superframe symbol number N F is an integer multiple of 192 and 128, and the number of symbols in each subframe is N S This also applies to integer multiples of 192 and 128.

[0306] Table 45

[0307] (13) Number of symbols before framing N CW =344064, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is adopted, and other encoding methods can also be adopted; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 45. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT=N TS ×N SF .

[0308] The frame redundancy of the superframe architecture listed in Table 46 is low, OH < 1.50%. Table 46 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 46 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0309] Table 46

[0310] Consider the number of training symbols N TS No more than 11, combined with Table 46, we can get Table 47. Then the frame redundancy OH of the superframe architecture listed in Table 47 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 47 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0311] Table 47

[0312] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 47, we can get Table 48. The frame redundancy OH of the cases listed in Table 48 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 48 shows the number of symbols N in each subframe. S No restrictions.

[0313] Table 48

[0314] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192 and 128, combined with Table 48, we can get Table 49. The frame redundancy OH of the cases listed in Table 49 is less than 1.50%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0315] Table 49

[0316] (14) Number of symbols before framing N CW =516096, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 50. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0317] The frame redundancy of the superframe architecture listed in Table 50 is low, OH < 1.50%. Table 50 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 50 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0318] Table 50

[0319] Consider the number of training symbols N TS No more than 11, combined with Table 50, we can get Table 51. Then the frame redundancy OH of the superframe architecture listed in Table 51 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 51 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0320] Table 51

[0321] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 51, we can get Table 52. The frame redundancy OH of the cases listed in Table 52 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 52 shows the number of symbols N in each subframe. S No restrictions.

[0322] Table 52

[0323] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192 and 128, combined with Table 52, we can get Table 53. The frame redundancy OH of the cases listed in Table 53 is less than 1.50%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0324] Table 53

[0325] (15) Number of symbols before framing N CW =688128, for example, an open FEC (OFEC) encoding method with a coding redundancy of about 15.3% is used, or other encoding methods can be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 54. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×NSF .

[0326] The frame redundancy of the superframe architecture listed in Table 54 is low, OH < 1.50%. Table 54 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 54 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0327] Table 54

[0328] Consider the number of training symbols N TS No more than 11, combined with Table 54, we can get Table 55. Then the frame redundancy OH of the superframe architecture listed in Table 55 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 55 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0329] Table 55

[0330] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 55, we can get Table 56. The frame redundancy OH of the cases listed in Table 56 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 56 shows the number of symbols N in each subframe. S No restrictions.

[0331] Table 56

[0332] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192 and 128, combined with Table 56, we can get Table 57. The frame redundancy OH of the cases listed in Table 57 is less than 1.50%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0333] Table 57

[0334] (16) Number of symbols before framing N CW =150528, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 17.9% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 58. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×NSF ,N TS,TOT =N TS ×N SF .

[0335] The frame redundancy of the superframe architecture listed in Table 58 is as low as OH < 1.50%. Table 58 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 58 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0336] Table 58

[0337] Consider the number of training symbols N TS No more than 11, combined with Table 58, we can get Table 59. Then the frame redundancy OH of the superframe architecture listed in Table 59 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 59 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0338] Table 59

[0339] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 59, we can get Table 60. The frame redundancy OH of the cases listed in Table 60 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 60 shows the number of symbols N in each subframe. S It should be noted that in this case (16) there is no superframe symbol number N F is an integer multiple of 192 and 128, and the number of symbols in each subframe is N S This also applies to integer multiples of 192 and 128.

[0340] Table 60

[0341] (17) Number of symbols before framing N CW = 129024, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 21.5% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 61. TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0342] The frame redundancy of the superframe architecture listed in Table 61 is low, OH < 1.50%. Table 61 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 61 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0343] Table 61

[0344] Consider the number of training symbols N TS No more than 11, combined with Table 61, we can get Table 62. Then the frame redundancy OH of the superframe architecture in the case of Table 62 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 62 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0345] Table 62

[0346] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 62, we can get Table 63. The frame redundancy OH of the cases listed in Table 63 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 63 shows the number of symbols N in each subframe. S No restrictions.

[0347] Table 63

[0348] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192 and 128, combined with Table 63, we can get Table 64. The frame redundancy OH of the cases listed in Table 64 is less than 1.50%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0349] Table 64

[0350] (18) Number of symbols before framing N CW = 107520, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 26.9% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is NSF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 65. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0351] The frame redundancy of the superframe architecture listed in Table 65 is lower than OH<1.50%. Table 65 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 65 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0352] Table 65

[0353] Consider the number of training symbols N TS No more than 11, combined with Table 65, we can get Table 66. Then the frame redundancy OH of the superframe structure listed in Table 66 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 66 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0354] Table 66

[0355] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is FShould be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 66, we can get Table 67. The frame redundancy OH of the cases listed in Table 67 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 67 shows the number of symbols N in each subframe. S No restrictions.

[0356] Table 67

[0357] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192 and 128, combined with Table 67, we can get Table 68. The frame redundancy OH of the cases listed in Table 68 is less than 1.50%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0358] Table 68

[0359] (19) Number of symbols before framing N CW =175616, for example, using a CFEC encoding method with a coding redundancy of about 15.3%, or other encoding methods; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RESThe sum of the parameters is as shown in Table 68. TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0360] The frame redundancy of the superframe structure listed in Table 69 is lower than OH<1.50%. Table 69 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 69 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0361] Table 69

[0362] Consider the number of training symbols N TS No more than 11, combined with Table 69, we can get Table 70. The frame redundancy OH of the superframe structure listed in Table 70 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 70 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0363] Table 70

[0364] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 70, we can get Table 71. The frame redundancy OH of the cases listed in Table 71 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TSThe value range of is 2 to 11 symbols; Table 71 shows the number of symbols N in each subframe. S No restrictions.

[0365] Table 71

[0366] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192 and 128, combined with Table 71, we can get Table 72. The frame redundancy OH of the cases listed in Table 72 is less than 1.50%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0367] Table 72

[0368] (20) Number of symbols before framing N CW =351232, for example, using a CFEC encoding method with a coding redundancy of about 15.3%, or other encoding methods; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 73. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / NCW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0369] The frame redundancy of the superframe architecture listed in Table 73 is low, OH < 1.50%. Table 73 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 73 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0370] Table 73

[0371] Consider the number of training symbols N TS No more than 11, combined with Table 73, we can get Table 74. Then the frame redundancy OH of the superframe architecture listed in Table 74 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 74 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0372] Table 74

[0373] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 74, we can get Table 75. The frame redundancy OH of the cases listed in Table 75 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 75 shows the number of symbols N in each subframe. S No restrictions.

[0374] Table 75

[0375] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192 and 128, combined with Table 75, we can get Table 76. The frame redundancy OH of the cases listed in Table 76 is less than 1.50%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0376] Table 76

[0377] (21) Number of symbols before framing N CW =526848, for example, a CFEC encoding method with a coding redundancy of about 15.3% is used, or other encoding methods can be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 77. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =NTS ×N SF .

[0378] The frame redundancy of the superframe architecture listed in Table 77 is low, OH < 1.50%. Table 77 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 77 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0379] Table 77

[0380] Consider the number of training symbols N TS No more than 11, combined with Table 77, we can get Table 78. Then the frame redundancy OH of the superframe architecture listed in Table 78 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 78 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0381] Table 78

[0382] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 78, we can get Table 79. The frame redundancy OH of the cases listed in Table 79 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 79 shows the number of symbols N in each subframe. S No restrictions.

[0383] Table 79

[0384] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192 and 128, combined with Table 79, we can get Table 80. The frame redundancy OH of the cases listed in Table 80 is less than 1.50%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0385] Table 80

[0386] (22) Number of symbols before framing N CW =702464, for example, a CFEC encoding method with a coding redundancy of about 15.3% is used, or other encoding methods can be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 81. TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×NSF .

[0387] The frame redundancy of the superframe architecture listed in Table 81 is low, OH < 1.50%. Table 81 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 81 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0388] Table 81

[0389] Consider the number of training symbols N TS No more than 11, combined with Table 81, we can get Table 82. Then the frame redundancy OH of the superframe architecture listed in Table 82 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 82 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no restriction.

[0390] Table 82

[0391] In some specific applications, the bit width of the specific DSP implementation at the transceiver end is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F Should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 82, we can get Table 83. The frame redundancy OH of the cases listed in Table 83 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 83 shows the number of symbols N in each subframe. S No restrictions.

[0392] Table 83

[0393] In some specific applications, the bit width of the specific DSP implementation at the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe N S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the other way around. Consider the number of symbols N in each subframe. S is an integer multiple of 192 and 128, combined with Table 83, we can get Table 84. The frame redundancy OH of the cases listed in Table 84 is less than 1.50%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0394] Table 84

[0395] The present application also provides several specific superframe formats, which are described as follows:

[0396] Example 1: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 172032, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 85 below:

[0397] Table 85

[0398] Figure 10 is a schematic diagram of the first implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 12 subframes, and each subframe includes 14464 symbols, as shown in (a) in Figure 10. The first type of subframe is shown in (b) in Figure 10, which has 113 pilot symbols, 10 training symbols, 22 frame synchronization symbols, and 50 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 10, which also has 113 pilot symbols and 10 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N of the superframe is 192 or 128. F It is an integer multiple of 192 and 128, but the number of symbols in each subframe is N S Not an integer multiple of 192 or 128.

[0399] Example 2: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 344064, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 86 below:

[0400] Table 86

[0401] Figure 11 is a schematic diagram of the second implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 12 subframes, and each subframe includes 28928 symbols, as shown in (a) in Figure 11. The first type of subframe is shown in (b) in Figure 11, which has 226 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 218 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 11, which also has 226 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N of the superframe is 192 or 128. F It is an integer multiple of 192 and 128, but the number of symbols in each subframe is N S Not an integer multiple of 192 or 128.

[0402] Example 3: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 516096, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 87 below:

[0403] Table 87

[0404] Figure 12 is a schematic diagram of the third implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 97 subframes, and each subframe includes 5376 symbols, as shown in (a) in Figure 12. The first type of subframe is shown in (b) in Figure 12, which has 42 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 310 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 12, which also has 42 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N of the superframe is 192 or 128. F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe is S It is also an integer multiple of 192 and 128.

[0405] Example 4: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 688128, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 88 below:

[0406] Table 88

[0407] Figure 13 is a schematic diagram of the fourth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 67 subframes, and each subframe includes 10368 symbols, as shown in (a) in Figure 13. The first type of subframe is shown in (b) in Figure 13, which has 81 pilot symbols, 10 training symbols, 22 frame synchronization symbols, and 476 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 13, which also has 81 pilot symbols and 10 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is 192 or 128. F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe is S It is also an integer multiple of 192 and 128.

[0408] Example 5: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 17.9%. The number of pre-framing symbols is 150528, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 89 below:

[0409] Table 89

[0410] Figure 14 is a schematic diagram of the fifth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 22 subframes, and each subframe includes 6912 symbols, as shown in (a) in Figure 14. The first type of subframe is shown in (b) in Figure 14, which has 54 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 106 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 14, which also has 54 pilot symbols and 11 training symbols, as shown in (c) in Figure 14. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is 192 or 128. F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe is SIt is also an integer multiple of 192 and 128.

[0411] Example 6: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 21.5%. The number of pre-framing symbols is 129024, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 90 below:

[0412] Table 90

[0413] Figure 15 is a schematic diagram of the sixth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 34 subframes, and each subframe includes 3840 symbols, as shown in (a) in Figure 15. The first type of subframe is shown in (b) in Figure 15, which has 30 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 154 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 15, which also has 30 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is 192 or 128. F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe is S It is also an integer multiple of 192 and 128.

[0414] Example 7: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 27.0%. The number of pre-framing symbols is 107520, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 91 below:

[0415] Table 91

[0416] Figure 16 is a schematic diagram of the seventh implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 25 subframes, and each subframe includes 4352 symbols, as shown in (a) in Figure 16. The first type of subframe is shown in (b) in Figure 16, which has 34 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 158 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The first type of subframe is shown in (c) in Figure 16, which also has 34 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; the number of symbols N in the superframe F and the number of symbols in each subframe N S Neither is an integer multiple of 192 or 128.

[0417] Example 8: The pre-framing symbols are obtained by CFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 175616, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 92 below:

[0418] Table 92

[0419] Figure 17 is a schematic diagram of the eighth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 21 subframes, and each subframe includes 8448 symbols, as shown in (a) in Figure 17. The first type of subframe is shown in (b) in Figure 17, which has 66 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 174 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 17, which also has 66 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is 192 or 128. F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe is S It is also an integer multiple of 192 and 128.

[0420] Example 9: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 172032, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 93 below:

[0421] Table 93

[0422] Figure 18 is a schematic diagram of the ninth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 33 subframes, and each subframe includes 5280 symbols, as shown in (a) in Figure 18. The first type of subframe is shown in (b) in Figure 18, which has 55 pilot symbols, 10 training symbols, 22 frame synchronization symbols, and 74 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 18, which also has 55 pilot symbols and 10 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; the number of symbols N in the superframe is 22. F and the number of symbols in each subframe N S Neither is an integer multiple of 192 or 128.

[0423] Example 10: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 344064, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 94 below:

[0424] Table 94

[0425] Figure 19 is a schematic diagram of the tenth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 24 subframes, and each subframe includes 14496 symbols, as shown in (a) in Figure 19. The first type of subframe is shown in (b) in Figure 19, which has 151 pilot symbols, 6 training symbols, 22 frame synchronization symbols, and 74 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 19, which also has 151 pilot symbols and 6 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N of the superframe is 192 or 128. F It is an integer multiple of 192 and 128, but the number of symbols in each subframe is N S Not an integer multiple of 192 or 128.

[0426] Example 11: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 516096, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 95 below:

[0427] Table 95

[0428] Figure 20 is a schematic diagram of the eleventh implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 40 subframes, and each subframe includes 13056 symbols, as shown in (a) in Figure 20. The first type of subframe is shown in (b) in Figure 20, which has 136 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 282 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 20, which also has 136 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is 192 or 128. F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe is S It is also an integer multiple of 192 and 128.

[0429] Example 12: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 688128, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 96 below:

[0430] Table 96

[0431] Figure 21 is a schematic diagram of the twelfth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 49 subframes, and each subframe includes 14208 symbols, as shown in (a) in Figure 21. The first type of subframe is shown in (b) in Figure 21, which has 148 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 300 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The first type of subframe is shown in (c) in Figure 21, which also has 148 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N of the superframe is 192 or 128. F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe is S It is also an integer multiple of 192 and 128.

[0432] Example 13: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 17.9%. The number of pre-framing symbols is 150528, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 97 below:

[0433] Table 97

[0434] Figure 22 is a schematic diagram of the thirteenth implementation method of the superframe and subframe in the embodiment of the present application. The superframe includes 23 subframes, and each subframe includes 6624 symbols, as shown in (a) in Figure 22. The first type of subframe is shown in (b) in Figure 22, which has 69 pilot symbols, 6 training symbols, 22 frame synchronization symbols, and 100 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The first type of subframe is shown in (c) in Figure 22, which also has 69 pilot symbols and 6 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; the number of symbols N in the superframe is 236. F and the number of symbols in each subframe N S Neither is an integer multiple of 192 or 128.

[0435] Example 14: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 21.5%. The number of pre-framing symbols is 129024, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 98 below:

[0436] Table 98

[0437] Figure 23 is a schematic diagram of the fourteenth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 10 subframes, and each subframe includes 13056 symbols, as shown in (a) in Figure 23. The first type of subframe is shown in (b) in Figure 23, which has 136 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 54 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is shown in (c) in Figure 23, which also has 136 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is 192 or 128. F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe is S It is also an integer multiple of 192 and 128.

[0438] Example 15: The pre-framing symbols are obtained by OFEC encoding with a code redundancy of about 27.0%. The number of pre-framing symbols is 107520, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 99 below:

[0439] Table 99

[0440] Figure 24 is a schematic diagram of the fifteenth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 16 subframes, and each subframe includes 6816 symbols, as shown in (a) in Figure 24. The first type of subframe is shown in (b) in Figure 24, which has 71 pilot symbols, 10 training symbols, 22 frame synchronization symbols, and 234 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The first type of subframe is shown in (c) in Figure 24, which also has 71 pilot symbols and 10 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N of the superframe is 192 or 128. F It is an integer multiple of 192 and 128, but the number of symbols in each subframe is N S Not an integer multiple of 192 or 128.

[0441] Example 16: The pre-framing symbols are obtained by CFEC encoding with a code redundancy of about 15.2%. The number of pre-framing symbols is 175616, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 100 below:

[0442] Table 100

[0443] Figure 25 is a schematic diagram of the sixteenth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 58 subframes, and each subframe includes 3072 symbols, as shown in (a) in Figure 25. The first type of subframe is shown in (b) in Figure 25, which has 32 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 102 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The first type of subframe is shown in (c) in Figure 25, which also has 32 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is 192 or 128. F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe is S It is also an integer multiple of 192 and 128.

[0444] Figure 26 is a schematic diagram of the structure of the data transmission device applied to the sending end in an embodiment of the present application. As shown in Figure 26, the data transmission device includes: a processing unit 201 and a sending unit 202. The processing unit 201 is used to perform the operation of step 101 above, and the sending unit 202 is used to perform the operation of step 102 above. It should be understood that the data transmission device provided in the embodiment of the present application can also be implemented in other ways. For example, the unit division in the above-mentioned device is only a logical functional division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system. In addition, the functional units in the various embodiments of the present application can be integrated into one processing unit, or they can be independent physical units, or two or more functional units can be integrated into one processing unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

[0445] Figure 27 is a schematic diagram of the structure of the data transmission device applied to the receiving end in an embodiment of the present application. As shown in Figure 27, the data transmission device includes: a receiving unit 301 and a processing unit 302. The receiving unit 301 is used to perform the operation of step 102 above, and the processing unit 302 is used to perform the operation of step 103 above. It should be understood that the data transmission device provided in the embodiment of the present application can also be implemented in other ways. For example, the unit division in the above-mentioned device is only a logical functional division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system. In addition, the functional units in the various embodiments of the present application can be integrated into one processing unit, or they can be independent physical units, or two or more functional units can be integrated into one processing unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

[0446] Figure 28 is another structural schematic diagram of a data transmission device in an embodiment of the present application. The data transmission device can be applied to a transmitting end or a receiving end. As shown in Figure 28, the data transmission device includes a processor 401 and a transceiver 402. The processor 401 and the transceiver 402 are interconnected via a line. Specifically, the transceiver 402 is used to perform data transmission and reception operations, and the processor 401 is used to perform other operations other than data transmission and reception. In one possible embodiment, the processor 401 may include the processing unit 201 shown in Figure 26 above, and the transceiver 402 includes the transmitting unit 202 shown in Figure 26 above. In another possible embodiment, the processor 401 may include the processing unit 301 shown in Figure 27 above, and the transceiver 402 includes the receiving unit 301 shown in Figure 27 above. Optionally, the data transmission device may further include a memory 403, wherein the memory 403 is used to store program instructions and data.

[0447] The present application also provides a chip. This chip integrates circuitry and one or more interfaces for implementing the functions of the processor 401 described above. When the chip integrates memory, it can perform the method steps of any one or more of the aforementioned embodiments. When the chip does not integrate memory, it can be connected to an external memory via an interface. The chip implements the actions performed by the transmitting device or receiving device in the aforementioned embodiments based on program code stored in the external memory.

[0448] Finally, it should be noted that the above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any modifications or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present application should be included within the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A data transmission method, characterized in that: include: Obtain a superframe including a plurality of subframes, wherein the subframe includes training symbols and pilot symbols, wherein in one polarization direction, the number of the training symbols in the subframe is N TS , the number of pilot symbols in the subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS greater than or equal to 5, there is a symbol in the subframe that is both a training symbol and a pilot symbol, each of the training symbols and each of the pilot symbols is one of four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, A is a real number, and each consecutive N in the subframe PG The N symbols include a pilot symbol located at a fixed position. PG 96 or 128; The superframe is transmitted.

2. The method according to claim 1, characterized in that: In a subframe, a training symbol sequence including multiple training symbols in a first polarization direction is different from a training symbol sequence including multiple training symbols in a second polarization direction, a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, and the first polarization direction is orthogonal to the second polarization direction.

3. The method according to claim 1 or 2, characterized in that: In one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction TS +N PS The sum of the real parts of the N symbols is 0, including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the imaginary parts of -1 symbols is 0.

4. The method according to any one of claims 1 to 3, characterized in that In one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction TS +N PS The difference between the number of symbols with the values ​​of -A-Aj, -A+Aj, A-Aj and A+Aj in -1 symbols is less than or equal to 2.

5. The method according to any one of claims 1 to 4, characterized in that In a subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, and the two polarization directions are orthogonal to each other.

6. The method according to any one of claims 1 to 5, characterized in that In one subframe, N TS Continuous training symbols are arranged starting from the beginning of the subframe.

7. The method according to claim 6, characterized in that N TS The symbol at the starting position among the consecutive training symbols is both a training symbol and a pilot symbol.

8. The method according to any one of claims 1 to 7, characterized in that The subframe arranged at the first position in the superframe is a first-type subframe, and the first-type subframe also includes a frame synchronization symbol, a reserved symbol and a pre-framing symbol, each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j. A FAW -A FAW j and A FAW +A FAW j is one of the four plural forms, A FAW is a real number. In the first type of subframe, the training symbol is located before the frame synchronization symbol, the frame synchronization symbol is located before the reserved symbol, and the reserved symbol is located before the pre-framing symbol.

9. The method according to claim 8, characterized in that A=A FAW 。 10. The method according to any one of claims 1 to 9, characterized in that The superframe includes at least one second-type subframe, the second-type subframe also includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

11. The method according to any one of claims 8 to 10, characterized in that The number of pre-framing symbols in the superframe is N CW , the number of all symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following items: N PG =128,N CW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080; N PG =128,N CW =344064,N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160; N PG =128,N CW =516096,N F =520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240; N PG =128,N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320; N PG =128,N CW =150528,N F =152064 or 152192 or 152320; N PG =128,N CW =129024,N F =130048 or 130176 or 130560; N PG =128,N CW =107520,N F =108416 or 108544 or 108672 or 108800; N PG =128,N CW =175616,N F =177152 or 177280 or 177408 or 177536 or 177664; N PG =128,N CW =351232,N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328; N PG =128,N CW =526848,N F =531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120; N PG =128,N CW =702464,N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656; N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528; N PG =96, N CW =344064,N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056; N PG =96, N CW =516096,N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776; N PG =96, N CW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400; N PG =96, N CW =150528,N F =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736; N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944; N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056; N PG =96, N CW =175616,N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176; N PG =96, N CW =351232,N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448; N PG =96, N CW =526848,N F =532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528; N PG =96, N CW =702464,N F =709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

12. The method according to any one of claims 1 to 11, characterized in that In one polarization direction, the modulation format of the symbols in the superframe is quadrature phase shift keying QPSK, A=-1 or 1; Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, 13. A data transmission method, characterized in that: include: A superframe including a plurality of subframes is received, wherein the subframe includes training symbols and pilot symbols, wherein in one polarization direction, the number of the training symbols in the subframe is N TS , the number of pilot symbols in the subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS is greater than or equal to 5, one symbol in the subframe is both a training symbol and a pilot symbol, each of the training symbols and each of the pilot symbols is one of four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, A is a real number, and every consecutive 96 or 128 symbols in the subframe include a pilot symbol located at a fixed position; The superframe is decoded.

14. The method according to claim 13, characterized in that In one subframe, N TS Continuous training symbols are arranged starting from the beginning of the subframe.

15. The method according to claim 14, characterized in that N TS The symbol at the starting position among the consecutive training symbols is both a training symbol and a pilot symbol.

16. A chip, characterized in that: The chip includes a processor and a memory, wherein the memory and the processor are connected to each other via a line, instructions are stored in the memory, and the processor is used to execute the method according to any one of claims 1 to 15.

17. A data transmission device applied to a transmitting end, characterized in that: include: A processing unit and a sending unit; The processing unit is used to: obtain a superframe including a plurality of subframes, wherein the subframe includes training symbols and pilot symbols, wherein in one polarization direction, the number of the training symbols in the subframe is N TS , the number of pilot symbols in the subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS is greater than or equal to 5, one symbol in the subframe is both a training symbol and a pilot symbol, each of the training symbols and each of the pilot symbols is one of four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, A is a real number, and every consecutive 96 or 128 symbols in the subframe include a pilot symbol located at a fixed position; The sending unit is used to send the superframe.

18. The data transmission device according to claim 17, characterized in that: In a subframe, a training symbol sequence including multiple training symbols in a first polarization direction is different from a training symbol sequence including multiple training symbols in a second polarization direction, a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, and the first polarization direction is orthogonal to the second polarization direction.

19. The data transmission device according to claim 17 or 18, characterized in that: In one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction TS +N PS The sum of the real parts of the N symbols is 0, including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the imaginary parts of -1 symbols is 0.

20. The data transmission device according to any one of claims 17 to 19, characterized in that: In one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction TS +N PS The difference between the number of symbols with the values ​​of -A-Aj, -A+Aj, A-Aj and A+Aj in -1 symbols is less than or equal to 2.

21. The data transmission device according to any one of claims 17 to 20, characterized in that: In a subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, and the two polarization directions are orthogonal to each other.

22. The data transmission device according to any one of claims 17 to 21, characterized in that: In one subframe, N TS Continuous training symbols are arranged starting from the beginning of the subframe.

23. The data transmission device according to claim 22, characterized in that: N TS The symbol at the starting position among the consecutive training symbols is both a training symbol and a pilot symbol.

24. The data transmission device according to any one of claims 17 to 23, characterized in that: The subframe arranged at the first position in the superframe is a first-type subframe, and the first-type subframe also includes a frame synchronization symbol, a reserved symbol and a pre-framing symbol, each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j. A FAW -A FAW j and A FAW +A FAW j is one of the four plural forms, A FAW is a real number. In the first type of subframe, the training symbol is located before the frame synchronization symbol, the frame synchronization symbol is located before the reserved symbol, and the reserved symbol is located before the pre-framing symbol.

25. The data transmission device according to claim 24, characterized in that: A=A FAW 。 26. The data transmission device according to any one of claims 17 to 25, characterized in that: The superframe includes at least one second-type subframe, the second-type subframe also includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

27. The data transmission device according to any one of claims 24 to 26, characterized in that: The number of pre-framing symbols in the superframe is N CW , the number of all symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following items: N PG =128,N CW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080; N PG =128,N CW =344064,N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160; N PG =128,N CW =516096,N F =520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240; N PG =128,N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320; N PG =128,N CW =150528,N F =152064 or 152192 or 152320; N PG =128,N CW =129024,N F =130048 or 130176 or 130560; N PG =128,N CW =107520,N F =108416 or 108544 or 108672 or 108800; N PG =128,N CW =175616,N F =177152 or 177280 or 177408 or 177536 or 177664; N PG =128,N CW =351232,N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328; N PG =128,N CW =526848,N F =531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120; N PG =128,N CW =702464,N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656; N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528; N PG =96, N CW =344064,N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056; N PG =96, N CW =516096,N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776; N PG =96, N CW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400; N PG =96, N CW =150528,N F =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736; N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944; N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056; N PG =96, N CW =175616,N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176; N PG =96, N CW =351232,N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448; N PG =96, N CW =526848,N F =532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528; N PG =96, N CW =702464,N F =709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

28. The data transmission device according to any one of claims 17 to 27, characterized in that: In one polarization direction, the modulation format of the symbols in the superframe is quadrature phase shift keying QPSK, A=-1 or 1; Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, 29. A data transmission device applied to a receiving end, characterized in that: include: a receiving unit and a processing unit; The receiving unit is used to: receive a superframe including a plurality of subframes, wherein the subframe includes training symbols and pilot symbols, wherein in one polarization direction, the number of the training symbols in the subframe is N TS , the number of pilot symbols in the subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS is greater than or equal to 5, one symbol in the subframe is both a training symbol and a pilot symbol, each of the training symbols and each of the pilot symbols is one of four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, A is a real number, and every consecutive 96 or 128 symbols in the subframe include a pilot symbol located at a fixed position; The processing unit is used for decoding the super frame.

30. The data transmission device according to claim 29, characterized in that: In one subframe, N TS Continuous training symbols are arranged starting from the beginning of the subframe.

31. The data transmission device according to claim 30, characterized in that: N TS The symbol at the starting position among the consecutive training symbols is both a training symbol and a pilot symbol.

32. A data transmission system, characterized in that: include: A data transmission device applied to a transmitting end as claimed in any one of claims 17 to 28 and a data transmission device applied to a receiving end as claimed in any one of claims 29 to 31.

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