Display dimming method and related device

Abstract

Disclosed in the present application are a display dimming method and a related device. The method comprises: in response to the fact that the brightness of a screen is located within a first brightness interval, repeating a first basic pulse time sequence N times within the time width of each frame, so as to perform screen dimming, wherein the time width of each frame is determined on the basis of a first screen refresh rate, N is related to the first screen refresh rate, and N is a positive integer greater than 1. By using the method, the frequency of switching between bright and dark pixels can be improved, and higher-frequency dimming is realized, thereby improving the display effect and better facilitating eye protection.

Description

A display dimming method and related equipment

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on November 9, 2023, with application number 202311498669.3 and application name “Display dimming method and related equipment”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of computers, and in particular to a display dimming method and related equipment. Background Art

[0003] For Organic Light-Emitting Diode (OLED) screens, the corresponding current is small at low brightness and low grayscale, resulting in poor color and brightness uniformity, color cast, and uneven brightness. To improve the display effect at low brightness and low grayscale and solve the above-mentioned problems, pulse width modulation (PWM) dimming is usually used. The principle of PWM dimming is to control the brightness observed by the human eye by adjusting the ratio of the light-on time and the off time within the pixel flashing cycle.

[0004] The higher the frequency of pixel light-dark switching (the number of times a pixel switches between light and dark per unit time), the better the display effect and the better it is for eye protection. How to increase the frequency of pixel light-dark switching and improve the display effect has become a problem to be solved.

[0005] Summary of the Invention

[0006] The present application provides a display dimming method and related equipment, which can increase the frequency of pixel light and dark switching, achieve higher frequency dimming, thereby improving the display effect and being more conducive to eye protection.

[0007] In a first aspect, some embodiments of the present application provide a display dimming method. The display dimming method may include:

[0008] In response to the brightness of the screen being in the first brightness range, the first basic pulse timing is repeated N times within the time width of each frame to perform screen dimming. The time width of each frame is determined based on the first screen refresh rate. N is related to the first screen refresh rate, and N is a positive integer greater than 1.

[0009] Through the above method, the first basic pulse timing is repeated multiple times within the time width of a frame, so that the pulse specifications achieved within a frame are higher. The number of times the pixel switches between light and dark within a frame is determined by the pulse specifications. The higher the pulse specifications within a frame, the more times the pixel switches between light and dark within a frame. Therefore, based on the method described in the first aspect, it is beneficial to increase the frequency of pixel light and dark switching, achieve higher frequency dimming, and thus improve the display effect, which is more conducive to eye protection.

[0010] In one possible implementation, when the screen refresh rate changes from the first screen refresh rate to the second screen refresh rate, the first basic pulse timing is repeated M times within the time width of each frame to perform screen dimming, and the time width of each frame is determined based on the second screen refresh rate. M is related to the second screen refresh rate, M is a positive integer greater than 1, and the ratio between M and N is equal to the ratio between the first screen refresh rate and the second screen refresh rate.

[0011] Through the above method, it is possible to repeat the first basic pulse sequence multiple times at different screen refresh rates, so that the pulse sequence within a frame can achieve a higher pulse specification.

[0012] In one possible implementation, the first basic pulse timing includes multiple high levels and multiple low levels, the time width of the first high level in the first basic pulse timing is greater than the time width of any low level and the time width of any other high level in the first basic pulse timing, and the first high level is the first high level in the first basic pulse timing.

[0013] In a possible implementation, the time corresponding to the first high level is used to reset the pixel.

[0014] Through the above method, due to the first high level in the first basic pulse timing, each frame includes multiple first high levels, and reset can be performed within the time of each high level, so that the display dimming method can be applied to screens with multiple reset requirements.

[0015] In one possible implementation, in response to the brightness of the screen being in the second brightness range, the second basic pulse timing is repeated I times within the time width of each frame to perform screen dimming, and the time width of each frame is determined based on the third screen refresh rate, I is related to the third screen refresh rate, and I is a positive integer greater than 1; wherein, the first brightness range is smaller than the second brightness range, and the second basic pulse timing includes a high level and a low level.

[0016] Through the above method, for the highlight interval using the DC dimming method, multiple first high levels are reserved in each frame, and reset can be performed within the time width of each high level, so that the display dimming method can also be applied to screens with multiple reset requirements when using the DC dimming method.

[0017] In one possible implementation, in response to the brightness of the screen being within the first brightness range, the method further includes: detecting that the brightness of the screen is within the first brightness range.

[0018] In one possible implementation, detecting that the screen brightness is in the first brightness range includes: detecting that the screen brightness changes from the second brightness to the first brightness, the first brightness is in the first brightness range, and the second brightness is in the second brightness range.

[0019] Through the above method, the brightness range of the current screen can be accurately determined through the brightness of the screen.

[0020] In one possible implementation, the first brightness is smaller than the second brightness.

[0021] In a possible implementation, any brightness in the first brightness range is smaller than any brightness in the second brightness range.

[0022] In the second aspect, the present application provides an electronic device, which includes a chip and a screen, and the chip is connected to the screen, wherein: the chip is used to send a first basic pulse timing to the screen N times within the time width of each frame in response to the brightness of the screen being in a first brightness range, and the time width of each frame is determined based on the first screen refresh rate, N is related to the first screen refresh rate, and N is a positive integer greater than 1; the screen is used to dim the screen based on the first basic pulse timing repeated N times by the chip in each frame.

[0023] In one possible implementation, the chip is also used to send a first basic pulse timing to the screen M times within the time width of each frame when the screen refresh rate changes from a first screen refresh rate to a second screen refresh rate, and the time width of each frame is determined based on the second screen refresh rate, M is related to the second screen refresh rate, and M is a positive integer greater than 1; the screen is also used to dim the screen based on the first basic pulse timing repeatedly sent by the chip M times in each frame.

[0024] In one possible implementation, the first basic pulse timing includes multiple high levels and multiple low levels, the time width of the first high level in the first basic pulse timing is greater than the time width of any low level and the time width of any other high level in the first basic pulse timing, and the first high level is the first high level in the first basic pulse timing.

[0025] In a possible implementation, the time corresponding to the first high level is used to reset the pixel.

[0026] In one possible implementation, the chip is further used to send a second basic pulse timing to the screen repeatedly I times within the time width of each frame in response to the brightness of the screen being in the second brightness range, where the time width of each frame is determined based on a third screen refresh rate, I is related to the third screen refresh rate, and I is a positive integer greater than 1; the screen is also used to dim the screen based on the second basic pulse timing repeatedly sent by the chip I times within each frame; wherein the first brightness range is smaller than the second brightness range, and the second basic pulse timing includes a high level and a low level.

[0027] In one possible implementation, the chip is further used to determine whether the brightness of the screen is within a first brightness range.

[0028] In one possible implementation, the electronic device also includes a main chip, which is connected to the chip, and the chip is used to detect that the screen brightness is in a first brightness range, including: the main chip is used to send a first brightness to the chip, and the first brightness is the brightness of the screen; the chip determines that the brightness of the screen is in the first brightness range, including: the chip receives the first brightness sent by the main chip, and determines that the screen brightness changes from the second brightness to the first brightness, the first brightness is in the first brightness range, and the second brightness is in the second brightness range.

[0029] In one possible implementation, the first brightness is smaller than the second brightness.

[0030] In a possible implementation, any brightness in the first brightness range is smaller than any brightness in the second brightness range.

[0031] The beneficial effects of each implementation method in the above-mentioned second aspect can be referred to the beneficial effects of each implementation method in the above-mentioned first aspect, and this application will not go into details here.

[0032] On the third aspect, the present application provides a chip, which is used to be connected to a screen and is used to send a first basic pulse timing to the screen N times within the time width of each frame in response to the brightness of the screen being in a first brightness range to perform screen dimming. The time width of each frame is determined based on the first screen refresh rate, N is related to the first screen refresh rate, and N is a positive integer greater than 1.

[0033] In one possible implementation, the chip is also used to send a first basic pulse timing to the screen M times within the time width of each frame to perform screen dimming when the screen refresh rate changes from the first screen refresh rate to the second screen refresh rate. The time width of each frame is determined based on the second screen refresh rate, M is related to the second screen refresh rate, and M is a positive integer greater than 1.

[0034] In one possible implementation, the first basic pulse timing includes multiple high levels and multiple low levels, the time width of the first high level in the first basic pulse timing is greater than the time width of any low level and the time width of any other high level in the first basic pulse timing, and the first high level is the first high level in the first basic pulse timing.

[0035] In a possible implementation, the time corresponding to the first high level is used to reset the pixel.

[0036] In one possible implementation, the chip is further used to send a second basic pulse timing to the screen repeatedly I times within the time width of each frame in response to the brightness of the screen being in the second brightness range to perform screen dimming, and the time width of each frame is determined based on the third screen refresh rate, I is related to the third screen refresh rate, and I is a positive integer greater than 1; wherein, the first brightness range is smaller than the second brightness range, and the second basic pulse timing includes a high level and a low level.

[0037] In one possible implementation, the chip is further used to determine that the brightness of the screen is within a first brightness range.

[0038] In one possible implementation, the chip determines that the brightness of the screen is in the first brightness range, including: the chip receives the first brightness sent by the main chip, and determines that the screen brightness changes from the second brightness to the first brightness, the first brightness is in the first brightness range, and the second brightness is in the second brightness range.

[0039] In one possible implementation, the first brightness is smaller than the second brightness.

[0040] In a possible implementation, any brightness in the first brightness range is smaller than any brightness in the second brightness range.

[0041] In a fourth aspect, the present application provides a display dimming device, which may be an electronic device, a device in an electronic device, or a device that can be used in combination with an electronic device; wherein, the display dimming device may also be a chip, and the display dimming device may execute the method executed by the electronic device in the first aspect. The functions of the display dimming device may be implemented by hardware, or by hardware executing corresponding software implementations. The hardware or software includes one or more units corresponding to the above functions. The unit may be software and / or hardware. The operations and beneficial effects performed by the display dimming device may refer to the methods and beneficial effects described in the first aspect above, and the repeated parts will not be repeated.

[0042] In a fifth aspect, the present application provides an electronic device comprising one or more processors and one or more memories. The one or more memories are coupled to the one or more processors, and the one or more memories are used to store computer program code, wherein the computer program code comprises computer instructions. When the one or more processors execute the computer instructions, the electronic device performs the display dimming method according to any possible implementation of the first aspect.

[0043] In a sixth aspect, the present application provides a chip comprising a processor and an interface, the processor and the interface being coupled; the interface being used to receive or output signals, and the processor being used to execute code instructions to execute the display dimming method in any possible implementation of the first aspect above.

[0044] In a seventh aspect, the present application provides a computer storage medium comprising: computer instructions; when the computer instructions are executed on an electronic device, the electronic device executes the display dimming method in any possible implementation of the first aspect above.

[0045] In an eighth aspect, the present application provides a computer program product. When the computer program product is run on a computer, it enables the computer to execute the display dimming method in any possible implementation of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] FIG1A is a schematic diagram of a PWM dimming principle provided by an embodiment of the present application;

[0047] FIG1B is a timing diagram of a circuit of a 7T1C structure within two frames provided in an embodiment of the present application;

[0048] FIG1C is a schematic diagram of an EM timing sequence of three pulses with the same specifications provided in an embodiment of the present application;

[0049] FIG2 is a schematic flow chart of a display dimming method provided in an embodiment of the present application;

[0050] FIG3A is a schematic diagram of a pulse timing provided in an embodiment of the present application;

[0051] FIG3B is a schematic diagram of another pulse timing provided by an embodiment of the present application;

[0052] FIG3C is a schematic diagram of another pulse timing provided in an embodiment of the present application;

[0053] FIG3D is a schematic diagram of another pulse timing provided in an embodiment of the present application;

[0054] FIG4 is a schematic diagram of the hardware structure of a screen of an electronic device provided in an embodiment of the present application;

[0055] FIG5 is a schematic flow chart of another display dimming method provided in an embodiment of the present application;

[0056] FIG6 is a schematic flow chart of another display dimming method provided in an embodiment of the present application;

[0057] FIG7 is a schematic diagram of a user manually adjusting the screen brightness of an electronic device according to an embodiment of the present application;

[0058] FIG8 is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application;

[0059] FIG9 is a schematic diagram of a software structure of an electronic device provided in an embodiment of the present application;

[0060] FIG10 is a schematic structural diagram of a display dimming device provided in an embodiment of the present application;

[0061] FIG11 is a schematic structural diagram of a chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0062] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. In the description of the embodiments of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in the text is only a description of the association relationship of associated objects, indicating that there can be three relationships, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, "multiple" means two or more than two.

[0063] It should be understood that the terms "first," "second," and the like in the specification, claims, and drawings of this application are used to distinguish between different objects, rather than to describe a particular order. Furthermore, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0064] References to "embodiments" in this application mean that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described in this application may be combined with other embodiments.

[0065] To facilitate understanding of the solutions provided by the embodiments of the present application, the following describes the relevant concepts involved in the embodiments of the present application:

[0066] Organic Light-Emitting Diode (OLED) screen: It is an organic light-emitting diode technology. OLED screens provide brightness through self-luminescence of pixels. For example, the resolution of an OLED screen is 1920*1080, which means that it is illuminated by 2073600 pixels. Another common screen is the Liquid Crystal Display (LCD), which emits light through a backlight source, has few bulbs, and is easy to control. Generally, OLED screens have only three layers in their internal structure, while LCD screens have seven layers. Therefore, OLED screens are lighter and thinner than LCD screens. In the current era of pursuing lighter and thinner mobile phones, OLED screens are gaining more and more applications.

[0067] Pulse Width Modulation (PWM) dimming: PWM dimming is a technology that controls brightness by adjusting the pulse width of a signal. By periodically varying the duration of power supply and power outages, varying brightness effects can be simulated. For example, if a user sets the brightness of a mobile phone to 75%, the LEDs on the electronic device's screen will illuminate 75% of the time and off 25% of the time within a short period of time. Due to the persistence of vision effect, the screen will appear to be constantly lit at 75%.

[0068] PWM dimming changes the brightness of each pixel by adjusting the pulse width and period, thereby achieving overall dimming. As shown in Figure 1A, Figure 1A is a schematic diagram of the PWM dimming principle and shows a 7T1C circuit (7T1C refers to the circuit including seven thin-film transistors and one capacitor). In Figure 1A, ELVDD represents the internal operating voltage of the device, ELVSS represents the common ground voltage of the circuit, Cst represents the capacitor, Scan1, Scan2, and Scan3 represent scan signal lines, electromagnetic wave (EM) represents the light control line, Vdata represents the data transmission line, the electronic component marked 101 is the light-emitting diode 101, and the electronic components marked T1, T2, T3, T4, T5, T6, and T7 are transistors. The scan signal line is used to control the gate scanning signal. Scanning mainly includes resetting, charging, and compensating the pixels.

[0069] The PWM dimming principle is further described below with reference to FIG1A . The working process of the 7T1C structure circuit shown in FIG1A is mainly divided into a writing phase and a holding phase.

[0070] Writing phase: Scan1 is at a negative potential, turning on the T4 tube connected to Scan1 to charge the capacitor Cst; Scan3 is at a negative potential, turning on the T2, T1, and T3 tubes; Scan2 is at a negative potential, turning on the T7 tube to reset the OLED. As shown in FIG1B , FIG1B is a timing diagram corresponding to two frames of the 7T1C structure circuit shown in FIG1A above during operation. The 120HZ in FIG1B indicates that the screen refresh rate of the electronic device is 120HZ, which means that the time corresponding to one frame is 1 / 120 second, or 8.3 milliseconds. Within this one-frame time, the H1 time period is the time period corresponding to the writing phase. This H1 is located at the first high level in each frame EM timing.

[0071] Hold Phase: Through the high and low levels of EM, transistors T5 and T6 are turned on, allowing transistor T1 to operate in the saturation region, driving the OLED to emit light (LED 101 in FIG. 1A emits light). As shown in FIG. 1B , the time period corresponding to this hold phase is the time period in FIG. 1B excluding H1.

[0072] The ratio of the time when the light-emitting diode emits light to the time when the light-emitting diode does not emit light is called the duty cycle, and the duty cycle of the time when the light-emitting diode emits light to the time when the light-emitting diode does not emit light is determined by the pulse timing. Optionally, the pulse timing can also be called the EM timing. The duty cycle determines the brightness of the screen of the electronic device. The more the total time period corresponding to all low levels in the pulse timing accounts for the pulse timing, the brighter the screen of the electronic device. As shown in Figure 1C, Figure 1C shows three pulse timings with the same pulse specifications, among which the total time period corresponding to the low level in pulse timing 1 accounts for the least in pulse timing 1, and the total time period corresponding to the low level in pulse timing 3 accounts for the most in pulse timing 3. The total time period corresponding to the low level of the three pulse timings shown in Figure 1C accounts for the pulse timing as follows: pulse timing 1 < pulse timing 2 < pulse timing 3, so the brightness of the screen of the electronic device corresponding to the three timings is: the brightness of the screen of the electronic device corresponding to pulse timing 1 < the brightness of the screen of the electronic device corresponding to pulse timing 2 < the brightness of the screen of the electronic device corresponding to pulse timing 3.

[0073] Pulse Specification: This indicates the number of pulses in a pulse sequence. For example, in Figure 1C, the pulse specification for Pulse Sequence 1 is 4Pulse, meaning there are four high-level pulses. During the high-level duration of this pulse sequence, the pixel is dark; during the low-level duration of this pulse sequence, the pixel is bright. Therefore, this pulse specification also determines the number of times a pixel switches between bright and dark.

[0074] Pulse timing: In display technology, pulse timing refers to the process of sending drive signals and data to the display panel via electrical signals. In OLED panels, the brightness and color of each pixel are determined by the strength and timing of the electrical signals. Typically, when using PWM dimming, the duration of a pulse sequence is one frame.

[0075] Basic Pulse Sequence: A basic pulse sequence is a pulse sequence pre-set before an electronic device or chip leaves the factory. The pulse specifications and time width of this basic pulse sequence are also pre-set. In the embodiments of the present application, to achieve multiple repeats of the basic pulse sequence within a frame and thus achieve higher pulse specifications within a frame, the time width of this basic pulse sequence can be pre-set to be less than the time width of a frame corresponding to the desired screen refresh rate before the electronic device or chip leaves the factory.

[0076] Dimming frequency: Dimming frequency refers to the number of times a pixel changes from dark to bright within one second. The dimming frequency is the product of the screen refresh rate and the pulse specification within the time width of one frame. The highest pulse specification supported by the existing DDIC within one frame is: 32Pulse. When the screen refresh rate is 120HZ, the corresponding maximum dimming frequency is 120HZ*32Pulse=3840HZ, and the number of times the pixel is controlled to change from dark to bright within one second is 3840 times. It should be noted that the dimming frequency is proportional to the number of times the pixel switches from light to dark within one second. The higher the dimming frequency, the more times the pixel switches from light to dark within one second, and the better the display effect.

[0077] A higher dimming frequency (for example, a dimming frequency higher than 3840 Hz) produces better display effects and is more conducive to eye protection. To this end, this application provides a display control method and related equipment. The display dimming method provided in this application can improve the pulse specifications within a frame, thereby achieving a higher dimming frequency, thereby improving the display effect and being more conducive to eye protection.

[0078] The following further describes the display dimming method provided by the embodiment of the present application: Please refer to FIG2 , which is a flow chart of a display dimming method provided by the embodiment of the present application.

[0079] 201. In response to the brightness of the screen being in the first brightness range, the electronic device repeats the first basic pulse timing N times within the time width of each frame to dim the screen. The time width of each frame is determined based on the first screen refresh rate, N is related to the first screen refresh rate, and N is a positive integer greater than 1.

[0080] The first brightness range may be a preset brightness range. Optionally, the first brightness range may be a relatively low brightness range.

[0081] In a possible embodiment, the electronic device detects that the screen brightness is in a first brightness range.

[0082] In a possible embodiment, the electronic device detects that the screen brightness is in the first brightness range, including: the electronic device detects that the screen brightness changes from the second brightness to the first brightness, the first brightness is in the first brightness range, and the second brightness is in the second brightness range.

[0083] For example, at a first moment, the screen brightness of the electronic device is 100 nits, the first brightness interval is [0 nits, 90 nits (90 nits is within the first brightness interval)], and the second brightness interval is [90 nits, 200 nits]. The 100 nits is within the second brightness interval. At a second moment, the screen brightness of the electronic device changes to 80 nits. At this time, the electronic device detects that the screen brightness of 80 nits is within the first brightness interval. Optionally, the brightness interval demarcation value of 90 nits can be within the first brightness interval or the second brightness interval.

[0084] In a possible embodiment, the first brightness is less than the second brightness, which can be understood as the brightness of the screen changing from bright to dark.

[0085] In one possible embodiment, any brightness in the first brightness range is less than any brightness in the second brightness range. That is, the first brightness range and the second brightness range do not overlap, and a brightness that exists in the first brightness range does not exist in the second brightness range. For example, the first brightness range is [0 nits, 90 nits (90 nits is in the first brightness range)], and the second brightness range is [90 nits, 200 nits], and 90 nits is not included in the second brightness range.

[0086] Optionally, part of the brightness in the first brightness interval is the same as part of the brightness in the second brightness interval. That is, there is an overlap between the first brightness interval and the second brightness interval, and the brightness in the overlapping portion of the two brightness intervals exists in both the first brightness interval and the second brightness interval. For example, the first brightness interval is [0 nits, 90 nits (90 nits is in the first brightness interval)], the second brightness interval is [80 nits (80 nits is in the second brightness interval), 200 nits], and the overlapping portion of the first brightness interval and the second brightness interval is [80 nits, 90 nits].

[0087] Optionally, if the first brightness is located in the overlapping part of the first brightness interval and the second brightness interval, the first brightness can be regarded as being located in the first brightness interval. That is, the overlapping part is regarded as the first brightness interval. For example, the first brightness interval is [0 nits, 90 nits (90 nits is located in the first brightness interval)], and the second brightness interval is [80 nits (80 nits is located in the second brightness interval), 200 nits]. At the first moment, the screen brightness of the electronic device is 100 nits. At the second moment, the screen brightness of the electronic device changes to 85 nits. At this time, the electronic device detects that the screen brightness changes from the second brightness to the first brightness.

[0088] Optionally, if the second brightness is located in the overlapping part of the first brightness interval and the second brightness interval, the second brightness can be regarded as being located in the second brightness interval. That is, the overlapping part is regarded as the second brightness interval. For example, the first brightness interval is [0 nits, 90 nits (90 nits is located in the first brightness interval)], and the second brightness interval is [80 nits (80 nits is located in the second brightness interval), 200 nits]. At the first moment, the screen brightness of the electronic device is 85 nits. At the second moment, the screen brightness of the electronic device becomes 60 nits. At this time, the electronic device detects that the screen brightness changes from the second brightness to the first brightness.

[0089] Optionally, in addition to treating the overlapping portion as the first brightness interval or the second brightness interval as described above, other processing methods may be used for the brightness of the overlapping portion, and this application does not impose any limitation thereto.

[0090] Optionally, the first brightness range includes multiple screen brightnesses, and the pulse specifications of the first basic pulse timings corresponding to the first brightness ranges are the same. The duty cycles of the first basic pulse timings corresponding to different screen brightnesses in the first brightness range can be different. The basic pulse timings corresponding to the various brightnesses in the first brightness range are collectively referred to as the first basic pulse timings.

[0091] Optionally, the pulse specifications and time width of the first basic pulse sequence can be pre-set before the electronic device or chip leaves the factory. For example, the pulse specifications of the first basic pulse sequence can be one or more of the following: 4Pulse, 12Pulse or 32Pulse, etc. The duty cycle of the first basic pulse sequence can be determined based on the screen brightness of the electronic device. The lower the screen brightness of the electronic device, the more the total time corresponding to all high levels in the first basic pulse sequence accounts for the time width of the first basic timing. Conversely, the higher the screen brightness of the electronic device, the less the total time corresponding to all high levels in the first basic pulse sequence accounts for the time width of the first basic timing. Since the duty cycle of the first basic pulse sequence changes with the change of screen brightness, the first basic pulse sequence can be understood as a dynamic pulse sequence.

[0092] In a possible embodiment, when it is detected that the brightness of the screen changes from the second brightness to the first brightness, the electronic device determines the first basic pulse timing based on the default basic pulse timing and the first brightness. At this time, the first basic pulse timing is the basic pulse timing corresponding to the first brightness. The default basic pulse timing is pre-set, and the time width and pulse specifications of the default basic pulse timing and the first basic pulse timing are the same. The difference between the default basic pulse timing and the first basic pulse timing may be the duty cycle. The default basic pulse timing is the basic pulse timing corresponding to the brightness interval boundary value. For example, the first brightness interval is [0 nits, 90 nits], and the second brightness interval is [90 nits, 200 nits]. The brightness interval boundary value is 90 nits. The default basic pulse timing is the pulse timing corresponding to 90 nits.

[0093] In a possible embodiment, the electronic device determines the first basic pulse timing based on the default basic pulse timing and the first brightness, specifically: the electronic device determines the target level and the adjustment time width corresponding to the target level based on the first brightness; determines the first basic pulse timing based on the target level, the adjustment time width corresponding to the target level, and the default basic pulse timing.

[0094] The target level may be one or more levels in a default basic pulse sequence, the target level may be a high level or a low level, and the adjustment time width corresponding to the target level may be the time width after the target level is adjusted. The target level and the adjustment time width of the target level may be determined by a preset algorithm pre-set in the electronic device, and the preset algorithm may determine the target level and the adjustment time width based on screen brightness.

[0095] For example, 90 nits is the brightness interval demarcation value, and the basic pulse timing corresponding to the screen brightness of 90 nits is the default basic pulse timing. When the screen brightness becomes 80 nits (first brightness), based on the preset algorithm, it is determined that the first high level in the default basic pulse timing under the screen brightness of 80 nits is widened by 2 Hsyncs. Since the time width of the basic pulse timing has not changed, the time width of the high level is widened, and the total time corresponding to all high levels in the pulse timing accounts for more of the time width of the first basic timing, that is, the duty cycle becomes smaller, which meets the scenario of dimming the screen brightness. Among them, Hsync is a time period bit, and one Hsync is the time of one frame divided by the total number of screen lines. For example, the time of the next frame of 120HZ is 8.3 milliseconds, and the total number of screen lines is 2880 lines, then 1 Hsync is 8.3 milliseconds / 2880.

[0096] To achieve better display effects, a higher dimming frequency is required. To achieve a higher dimming frequency, the pulse specification within a frame needs to be higher. The first basic pulse sequence can be repeated multiple times within the time width of a frame to increase the pulse specification within a frame. For example, the first basic pulse sequence with a pulse specification of 12 pulses is repeated three times within the time width of a frame, achieving a pulse specification of 3*12pulse=36pulse within a frame.

[0097] In one possible implementation, in order to allow the first basic pulse sequence to be repeated multiple times within the time width of a frame, the time width of the first basic pulse sequence is smaller than the time width of a frame, and the ratio of the time width of a frame to the time width of the first basic pulse sequence is a positive integer.

[0098] As an example, the following, combined with FIG3A , further illustrates how to improve the pulse specification within a frame by repeating the first basic pulse sequence multiple times. Referring to FIG3A , the pulse sequence marked 301 in FIG3A is the first basic pulse sequence 301. The duration of the first basic pulse sequence 301 is approximately 2.8 milliseconds, and the pulse specification of the first basic pulse sequence 301 is 12 pulses. The screen refresh rate is 120 Hz, and the duration of a frame under this first refresh rate is 1 second / 120 Hz = 8.3 milliseconds. Therefore, if the first basic pulse sequence is repeated within the frame, the number of repetitions can reach three. In other words, the pulse sequence within the duration of a frame is shown in 302 , and the pulse specification within the frame can reach 3 * 12 pulses = 36 pulses. Since one second contains 120 frames, the dimming frequency is 120 Hz * 36 pulses = 4320 Hz.

[0099] It should be noted that, for the convenience of description, this application is only accurate to one decimal place, and the above-mentioned 2.8 milliseconds and 8.3 milliseconds are both accurate values.

[0100] It can be seen from the above example that since the time width of the first basic pulse sequence is fixed, the number of times the first basic pulse sequence is repeated within one second is also fixed, and the time width of a frame under different screen refresh frequencies is different, so the number of times the first basic pulse sequence is repeated within the time width of a frame under different frequency refresh rates is different.

[0101] In a possible embodiment, the first basic pulse timing is the basic pulse timing corresponding to the first brightness interval that is preset in the electronic device or chip before leaving the factory. The time width of a frame is determined based on the screen refresh rate. In order to ensure that the first basic pulse timing can be repeated multiple times within a frame at any screen refresh rate, the time width of the first basic pulse timing needs to be sufficient to be repeated multiple times within a frame at the highest screen refresh rate. In other words, the higher the screen refresh rate, the shorter the time width of the corresponding frame. Therefore, the time width of a frame corresponding to the highest screen refresh rate is the shortest. If the first basic pulse timing can be repeated multiple times within the time width of a frame at the highest screen refresh rate, then the first basic pulse timing can also be repeated multiple times within the time width of a frame at other screen refresh rates.

[0102] In a possible embodiment, in order to ensure that the first basic pulse timing can be repeated multiple times at any screen refresh rate, when pre-setting the first basic pulse timing, the time width of the first basic pulse timing is set to 1 / 2, 1 / 3, 1 / 4, etc. of the time width of a frame at the high screen refresh rate, based on a frame at the highest screen refresh rate.

[0103] Optionally, in order to ensure that the pulse specification achieved by repeating the first basic pulse sequence multiple times within the time width of one frame is higher, the pulse specification of the first basic pulse sequence is pre-set to, for example, 12 Pulse, 32 Pulse, etc.

[0104] For example, the maximum refresh rate of the screen is 120 Hz, and the time width of a frame at 120 Hz is 8.3 milliseconds. When presetting the first basic pulse timing, the time width of the first basic pulse timing is set to 2.8 milliseconds, so that the first basic pulse timing can be repeated 3 times at the maximum refresh rate of the screen. In order to make the pulse specification achieved within a frame higher, the pulse specification of the first basic pulse timing is set to 12 pulses, so that when the electronic device performs PWM dimming, the pulse specification within a frame can reach 3*12 pulses = 36 pulses.

[0105] In one possible embodiment, after the first basic pulse sequence corresponding to the first brightness range is pre-set for the electronic device or chip before shipment, during user use, as the screen refresh rate changes, the time width of a frame changes, and the number of times the first basic pulse sequence is repeated within a frame also changes accordingly. For example, if the screen refresh rate becomes lower (lower than the pre-set maximum screen refresh rate), the time width of a frame becomes wider, the number of times the first basic pulse sequence is repeated within a frame increases, and the pulse size within a frame becomes larger.

[0106] In a possible embodiment, when the screen refresh rate changes from the first screen refresh rate to the second screen refresh rate, the first basic pulse timing is repeated M times within the time width of each frame for dimming, and the time width of each frame is determined based on the second screen refresh rate. M is related to the second screen refresh rate, M is a positive integer greater than 1, and the ratio between M and N is equal to the ratio between the first screen refresh rate and the second screen refresh rate.

[0107] The second screen refresh rate is the refresh rate of the current screen. In a possible embodiment, the second screen refresh rate is less than the first screen refresh rate.

[0108] For example, the time width of the first basic pulse sequence is approximately 2.8 milliseconds, the pulse specification of the first basic pulse sequence is 12 pulses, the first screen refresh rate is 120 Hz, and the time corresponding to the first frame at the first screen refresh rate is 8.3 milliseconds; the second screen refresh rate is 60 Hz, and the time corresponding to the first frame at the second screen refresh rate is 16.6 milliseconds (1 second / 60 Hz). Then, at the second screen refresh rate, the first basic pulse sequence will be repeated 6 times (M=6) within the time width of each frame. At the second screen refresh rate, the pulse specification within one frame is 6*12 pulses=72 pulses. Since one second contains 60 frames, the dimming frequency is 60 Hz*72 pulses=4320 Hz.

[0109] That is, as shown in Figure 3B , the duration of a 60 Hz frame is twice that of a 120 Hz frame, while the duration of the first basic pulse sequence remains unchanged. Therefore, the number of repetitions of the first basic pulse sequence 304 at 60 Hz is twice that of the first basic pulse sequence 303 at 120 Hz. As can be seen from the above, the ratio of M to N is equal to the ratio of the first screen refresh rate to the second screen refresh rate (e.g., in the above example, 6 / 3 = 120 Hz / 60 Hz).

[0110] In a possible embodiment, the first basic pulse timing includes multiple high levels and multiple low levels, the time width of the first high level in the first basic pulse timing is greater than the time width of any low level and the time width of any other high level in the first basic pulse timing, and the first high level is the first high level in the first basic pulse timing.

[0111] The duration of the first high level is greater than the duration of any low level in the first basic pulse sequence, and the duration of the first high level is greater than the duration of any other high level in the first basic pulse sequence. Since a frame includes multiple first basic pulse sequences, each of which includes a first high level, the frame includes multiple first high levels. As shown in FIG3B , at 120 Hz, the duration of a frame includes three first high levels, and at 60 Hz, the duration of a frame includes six first high levels.

[0112] Optionally, as screen brightness changes, some high levels in the first basic pulse sequence may widen. Therefore, at certain screen brightnesses, the duration of the first high level may be equal to one or more high levels in the first basic pulse sequence other than the first high level. The first high level in the default basic pulse sequence may be greater than any other high level in the default basic pulse sequence.

[0113] In a possible embodiment, the duration of the first high level in each first basic pulse sequence is used to reset the pixel.

[0114] Since the pixel is reset within the time width of the first high level in each first basic pulse sequence, and the time width of one frame includes multiple first high levels, the pixel is reset multiple times within the time width of one frame.

[0115] For display panels with different processes, there are different reset timing requirements. For example, the reset timing requirements of 7T1C and 8T1C (8T1C means that the circuit includes 8 thin film transistors and one capacitor) shown in Figure 1A above are different. 7T1C and 8T1C are two different display panels. Usually, the reset is performed at equal time intervals and at the high level of the pulse timing. The existing implementation method requires the DDIC to accurately control each high level for reset. For example, for 8T1C, reset is required at the 1st high level, the 13th high level, and the 25th high level. It is necessary to redesign the DDIC, which consumes a lot of time and resources.

[0116] The display dimming method provided by the present application only needs to set the pulse specifications of the first basic pulse timing (such as 12Pulse) at the factory. By repeating, the same time interval can be achieved for reset, meeting the reset requirements of 8T1C. For example, as shown in Figure 3C, the pulse specification of the first basic pulse timing is 12Pulse. The first high level 305 of the first first basic pulse timing is the first high level, the first high level 306 of the second first basic pulse timing is the 13th high level, the first high level 307 of the third basic pulse timing is the 25th high level, and so on. It just meets the reset timing requirements of 8T1C.

[0117] Optionally, the duration of the first high level in each first basic pulse sequence is used to reset and / or compensate the pixel. The reset and compensation can be found in the introduction to PWM dimming in the above-mentioned related concepts, and will not be elaborated in this application.

[0118] The above embodiments are all for the first brightness range, which can be understood as a low brightness range. PWM dimming is usually used in this low brightness range. For the second brightness range, that is, the high brightness range, DC dimming is usually used. The following describes the scene where the screen brightness is in the high brightness range:

[0119] In a possible embodiment, in response to the brightness of the screen being in the second brightness range, the electronic device repeats the second basic pulse timing I times within the time width of each frame to perform screen dimming, and the time width of each frame is determined based on the third screen refresh rate, I is related to the third screen refresh rate, and I is a positive integer greater than 1; wherein, the first brightness range is smaller than the second brightness range, and the second basic pulse timing includes a high level and a low level.

[0120] In a possible embodiment, the second basic pulse timing is the basic pulse timing corresponding to the second brightness interval that is preset in the electronic device or chip before leaving the factory. The time width of a frame is determined based on the screen refresh rate. In order to ensure that the second basic pulse timing can be repeated multiple times within a frame at any screen refresh rate, the time width of the second basic pulse timing needs to be sufficient to be repeated multiple times within a frame at the highest screen refresh rate. In other words, the higher the screen refresh rate, the shorter the time width of the corresponding frame. Therefore, the time width of a frame corresponding to the highest screen refresh rate is the shortest. If the second basic pulse timing can be repeated multiple times within the time width of a frame at the highest screen refresh rate, then the second basic pulse timing can also be repeated multiple times within the time width of a frame at other screen refresh rates.

[0121] In a possible embodiment, in order to ensure that the second basic pulse timing can be repeated multiple times at any screen refresh rate, when pre-setting the second basic pulse timing, the time width of the second basic pulse timing is set to 1 / 2, 1 / 3, 1 / 4, etc. of the time width of a frame at the high screen refresh rate, based on a frame at the highest screen refresh rate.

[0122] For example, the maximum refresh rate of the screen is 120 Hz, and the time width of one frame at 120 Hz is 8.3 milliseconds. When presetting the second basic pulse timing, the time width of the second basic pulse timing is set to 2.8 milliseconds, so that the second basic pulse timing can be repeated three times at the maximum refresh rate of the screen.

[0123] In one possible embodiment, any screen brightness within the second brightness range is higher than any screen brightness within the first brightness range. The second brightness range can be understood as a high brightness range, and the first brightness range can be understood as a low brightness range. The second basic pulse timing is a preset basic pulse timing corresponding to the second brightness range, and the pulse specifications of the second basic pulse timing are set at the factory.

[0124] Among them, the third screen refresh rate can be the same as the first screen refresh rate, for example, the third screen refresh rate and the first screen refresh rate are both 120HZ; or, the third screen refresh rate can also be the same as the second screen refresh rate, for example, the third screen refresh rate and the second screen refresh rate are both 60HZ; or, the third screen refresh rate is neither the same as the first screen refresh rate nor the third screen refresh rate, for example, the first screen refresh rate is 120HZ, the second screen refresh rate is 60HZ, and the third screen refresh rate is 90HZ.

[0125] For DC dimming, a high level is also required to perform the above-mentioned reset and compensation operations. Please refer to Figure 3D. The pulse timing marked 308 in Figure 3D is the second basic pulse timing 308. The time width of the second basic pulse timing 308 is approximately 2.8 milliseconds, and the pulse specification of the second basic pulse timing 308 is 1 pulse. The first screen refresh rate of the screen is 120HZ. The time width of the next frame under this first screen refresh rate is 1 second / 120HZ = 8.3 milliseconds. This second basic pulse timing can be repeated 3 times (N = 3) within this frame, that is, the pulse timing within the time width of one frame is shown in 309.

[0126] It can be seen that in the DC dimming mode, a frame includes multiple first high levels, and the duration of the first high level can be used to perform the above-mentioned reset and other operations. The panel can meet the reset timing requirements.

[0127] In one possible embodiment, after the second basic pulse sequence corresponding to the second brightness range is pre-set for the electronic device or chip before shipment, during user use, as the screen refresh rate changes, the time width of a frame changes accordingly, and the number of times the second basic pulse sequence is repeated within a frame also changes accordingly. For example, if the screen refresh rate becomes lower (lower than the pre-set maximum screen refresh rate), the time width of a frame becomes wider, the number of times the second basic pulse sequence is repeated within a frame increases, and the number of first high levels within a frame increases.

[0128] In a possible embodiment, when the screen refresh rate changes from the third screen refresh rate to the fourth screen refresh rate, the second basic pulse timing is repeated J times within the time width of each frame for dimming, and the time width of each frame is determined based on the fourth screen refresh rate. J is related to the fourth screen refresh rate, J is a positive integer greater than 1, and the ratio between J and I is equal to the ratio between the third screen refresh rate and the fourth screen refresh rate.

[0129] Among them, this embodiment can refer to the introduction of the embodiment of the change of screen refresh rate in the first brightness range mentioned above. The embodiment of the change of screen refresh rate in the second brightness range is similar, and this application will not go into details here.

[0130] Through the above method, the first basic pulse timing is repeated multiple times within the time width of a frame, so that the pulse specifications achieved within a frame are higher. The number of times the pixel switches between light and dark within a frame is determined by the pulse specifications. The higher the pulse specifications within a frame, the more times the pixel switches between light and dark within a frame. Therefore, based on the method described in the first aspect, it is beneficial to increase the frequency of pixel light and dark switching, achieve higher frequency dimming, and thus improve the display effect, which is more conducive to eye protection.

[0131] The two aforementioned embodiments describe the dimming methods used in the high-brightness range and the low-brightness range, respectively: PWM dimming is used in the low-brightness range, while DC dimming is used in the high-brightness range. In one possible embodiment, PWM dimming can be used in both the high-brightness range and the low-brightness range. That is, when the screen brightness is within the first brightness range or the second brightness range, the screen dimming is performed by repeating the first basic pulse sequence N times within the duration of each frame. The duration of each frame is determined based on the first screen refresh rate, where N is related to the first screen refresh rate and is a positive integer greater than 1.

[0132] For details of this embodiment, please refer to the above introduction of PWM dimming in the low brightness range, which will not be described in detail in this application.

[0133] An embodiment of the present application provides an electronic device, wherein the display module of the electronic device includes a screen and a chip, and the screen is connected to the chip. Optionally, the screen includes a display panel (Panel) and a gate drive integrated on an array substrate (Gate Driven on Array, GOA) unit. Wherein, the display panel is connected to the chip, and the GOA unit is connected to the display panel, or the GOA unit is embedded in the display panel, and the chip can also be connected to the GOA. Optionally, the chip can be a DDIC, or other chips, such as Gate IC, T-CON, etc. Optionally, the electronic device also includes a main chip, and the main chip is connected to the DDIC.

[0134] Please refer to Figure 4, which is a schematic diagram of the hardware structure of a display module of an electronic device provided in an embodiment of the present application. Figure 4 takes the screen including a display panel and a GOA unit, the chip being a DDIC, and the electronic device also including a main chip as an example.

[0135] Display panel (display area): The display panel includes multiple pixels. The higher the resolution of the electronic device's screen, the more pixels the display panel includes. For example, if the electronic device's screen resolution is 1080x1920 pixels, each row of the display panel includes 1080 pixels, and each column includes 1920 rows of pixels, for a total of 2,073,600 pixels. As shown in Figure 4, each small square in the display panel corresponds to one pixel.

[0136] GOA unit: The GOA unit is connected to the display panel, or the GOA unit is embedded in the display panel, and the GOA unit can realize the row-by-row scanning driving function of the display panel. It should be noted that the display of the electronic device may include only one GOA unit (including only the GOA unit on the left side as shown in Figure 5, or including only the GOA unit on the right side as shown in Figure 4), or it may include two GOA units (as shown in Figure 4). Since the GOA unit drives the display panel row by row, the pixels in the same row are scan-driven at the same time, and the pixels in different rows may be driven inconsistently. That is, when the pixels in the same row are dimmed, the light-emitting diodes of the pixels in the same row are lit at the same time, and when the pixels in different rows are dimmed, the light-emitting diodes of the pixels in different rows may not be lit at the same time.

[0137] For example, the display panel includes the following six pixels: A11, A12, A13, A21, A22, and A23. A11, A12, and A13 are located in the first row of the display panel, and A21, A22, and A23 are located in the second row of the display panel. A11 and A21 are located in the first column of the display panel, as are A12 and A22, and A13 and A23. When the LED in A11 emits light, the LEDs in A12 and A13 also emit light, while the LEDs in A21, A22, and A23 do not emit light.

[0138] DDIC: DDIC sends drive signals and data to the display panel in the form of electrical signals. By controlling the screen's brightness and color, it enables image information such as letters and pictures to be displayed on the screen. This electrical signal can be specifically a pulse sequence.

[0139] Main chip: may include a processor, which may include one or more processing units. For example, the processor may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU). Different processing units may be independent devices or integrated into one or more processors.

[0140] The controller can be the nerve center and command center of the electronic device. The controller can generate operation control signals based on instruction operation codes and timing signals to complete the control of instruction fetching and execution.

[0141] The processor in the main chip can also be equipped with a memory for storing instructions and data. In some embodiments, the memory in the processor is a cache memory. This memory can store instructions or data that the processor has just used or is reusing. If the processor needs to use the instruction or data again, it can directly call it from the memory. This avoids repeated accesses, reduces processor latency, and thus improves system efficiency. The processor calls the instructions or data stored in the memory, causing the electronic device to execute the display dimming method performed by the electronic device in the following method embodiment.

[0142] In some embodiments, the processor in the main chip may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0143] The following describes the interaction between the DDIC and the screen in the electronic device, taking the DDIC as an example. FIG5 is a flow chart showing the interaction between hardware components in an electronic device according to an embodiment of the present application. The interaction flow includes steps 501 and 502.

[0144] 501. In response to the screen brightness being within a first brightness range, the DDIC sends a first basic pulse sequence to the screen N times within a time width of each frame. The time width of each frame is determined based on a first screen refresh rate. N is related to the first screen refresh rate and is a positive integer greater than 1. Accordingly, the screen receives the first basic pulse sequence sent by the DDIC N times within the time width of each frame.

[0145] The first brightness interval can be found in the introduction of step 201 above, and this application will not elaborate on it here. For DDIC, DDIC will continuously send the first basic pulse sequence to the screen. Since the preset time width of the first basic pulse sequence allows multiple first basic pulse sequences to be included within the time width of a frame, the effect presented is that the first basic pulse sequence is repeated multiple times within the time width of a frame, that is, the DDIC repeatedly sends multiple first basic pulse sequences within the time width of a frame.

[0146] Exemplarily, the time width of the first basic pulse sequence is approximately 2.8 milliseconds, and the pulse specification of the first basic pulse sequence is 12Pulse. The first screen refresh rate of the screen is 120HZ, and the time width of the next frame of the first screen refresh rate is 1 second / 120HZ=8.3 milliseconds. At the 0th millisecond, the DDIC sends a first basic pulse sequence to the screen. At the 2.8th millisecond, the DDIC sends a first basic pulse sequence to the screen again. At the 5.6th millisecond, the DDIC sends another first basic pulse sequence to the screen, and so on. The time it takes for the DDIC to send three first basic pulse sequences to the screen is exactly 8.3 milliseconds, which is the time width of the next frame at the screen refresh rate of 120HZ. The effect presented is that the DDIC sends the first basic pulse sequence three times within the time width of one frame.

[0147] Furthermore, the DDIC repeatedly sends multiple first basic pulse sequences to the screen within one frame, so that the pulse specification of one frame is higher and the dimming frequency is also higher.

[0148] Optionally, for different screen refresh rates, the DDIC still continues to send according to the first basic pulse timing.

[0149] In a possible embodiment, the DDIC sends a first basic pulse sequence to the screen based on the brightness of the screen. The brightness of the screen may be a brightness within a first brightness range.

[0150] Optionally, the logic of DDIC sending the first basic pulse timing to the screen based on the screen brightness in the first brightness interval is pre-set by DDIC. The first basic pulse timing can be a dynamic pulse timing, and the duty cycle in the first basic pulse timing changes with the screen brightness in the first brightness interval. The logic of how DDIC sends the first basic pulse timing with the corresponding duty cycle to the screen based on the screen brightness in different first brightness intervals is also pre-set. It can be understood that when DDIC is working in an electronic device, after DDIC receives the screen brightness, DDIC will automatically send the first basic pulse timing with the duty cycle corresponding to the screen brightness to the screen.

[0151] In one possible embodiment, the DDIC sends a clock (CLK) control signal, a gate control signal, and the like to the screen. The CLK control signal is used to ensure the normal operation of the screen and the accuracy of the screen's display effect. The Gate control signal is used to control the scanning of each row of the TFT screen. The screen will open the corresponding row to display the image according to the Gate control signal at the rising edge of each vertical clock signal. Specifically, the DDIC sends the Gate control signal to the GOA unit in the screen, and the GOA unit implements the row-by-row scanning drive function for the display panel. For details, please refer to the introduction of the GOA unit in the relevant hardware structure of the above-mentioned display module.

[0152] It should be noted that the DDIC can also send signals other than the above signals to the screen, and this application does not impose any restrictions on this.

[0153] 502. The screen performs screen dimming based on the N times of the first basic pulse sequence repeatedly sent in each frame.

[0154] In one possible embodiment, the high and low levels of the screen in the first basic pulse sequence control the brightness and darkness of pixels. Specifically, the screen scans pixels during the first high level of each first basic pulse sequence. During the time width other than the first high level of each first basic pulse sequence, the screen switches between high and low levels to achieve alternating brightness and darkness of the pixels.

[0155] The scanning of pixels can be referred to the description in the above background technology. The time width of each first basic pulse sequence except the first high level can be referred to the holding phase in the background technology, which will not be described in detail in this application.

[0156] In a possible embodiment, the screen specifically controls the alternation of pixel brightness and darkness based on the first basic pulse timing as follows: the light-emitting diode in the pixel is controlled not to emit light within the time width of a high level other than the first high level in the first basic pulse timing; and the light-emitting diode in the pixel is controlled to emit light within the time width of a low level in the first basic pulse timing.

[0157] It should be noted that during the duration of the first high level in the first basic pulse sequence, the light-emitting diode in the pixel does not emit light. Specifically, referring to the circuit diagram of FIG1A , the light-emitting diode 101 can be controlled by transistors T1, T5, and T6 to determine whether current flows through the light-emitting diode 101, thereby controlling whether the light-emitting diode 101 emits light.

[0158] Furthermore, the following describes the interaction between the main chip, DDIC, and screen of the electronic device described above, as shown in FIG6 , which is a flow chart illustrating the interaction between various hardware components in another electronic device provided in an embodiment of the present application. The interaction process includes steps 601 to 604. The main chip may also be another chip such as a T-CON. This embodiment takes the main chip as an example, wherein:

[0159] 601. The master chip sends a first brightness to the DDIC. Correspondingly, the DDIC receives the first brightness sent by the master chip.

[0160] The first brightness is the current brightness of the screen, and the brightness of the first brightness screen can be manually adjusted by the user.

[0161] For example, as shown in FIG7 , a user swipes from the upper right corner of the electronic device screen from top to bottom in the interface shown in the left image of FIG7 , triggering the display of the interface shown in the right image of FIG7 . The user slides the screen brightness slider marked 701 to manually adjust the screen brightness of the electronic device. It should be noted that FIG7 is for example only, and this application does not limit how a user manually adjusts the screen brightness of an electronic device.

[0162] Optionally, the screen brightness of the electronic device can be automatically adjusted by the electronic device based on the brightness of the environment in which the electronic device is currently located. Specifically, the electronic device further includes a photosensitive module. When the photosensitive module in the electronic device senses that the brightness of the environment has increased, the electronic device automatically increases the screen brightness so that the user can clearly see the electronic device screen even in a high-brightness environment; or, when the photosensitive module in the electronic device senses that the brightness of the environment has decreased, the electronic device automatically decreases the screen brightness so that the user's eyes are protected in a darker environment.

[0163] In a possible embodiment, the main chip sends the second screen refresh rate to the DDIC. Correspondingly, the DDIC receives the second screen refresh rate sent by the main chip.

[0164] Among them, the second screen refresh rate is the current screen refresh rate of the screen. When the screen refresh rate of the screen changes (such as from the first screen refresh rate to the second screen refresh rate), the main chip will send the changed screen refresh rate to the DDIC.

[0165] 602. The DDIC determines that the screen brightness changes from the second brightness to the first brightness, the first brightness is within the first brightness range, and the second brightness is within the second brightness range.

[0166] Among them, the first brightness, the second brightness, the first brightness range, and the second brightness range can refer to the above introduction to Figure 2, and this application will not elaborate on them here.

[0167] Optionally, the DDIC determines whether the current screen brightness is in the first brightness range by: the DDIC determines whether the brightness range of the screen brightness is the first brightness range based on the screen brightness sent by the main chip and the preset first brightness range and second brightness range.

[0168] Alternatively, the DDIC determines whether the screen brightness is greater than the brightness interval boundary value based on the screen brightness sent by the main chip and the preset brightness interval boundary value. If the screen brightness is less than the brightness interval boundary value, the DDIC determines that the screen brightness is in the first brightness interval; if the screen brightness is greater than the brightness interval boundary value, the DDIC determines that the screen brightness is in the second brightness interval.

[0169] 603. In response to the screen brightness being within the first brightness range, the DDIC sends a first basic pulse sequence to the screen N times within a time width of each frame. The time width of each frame is determined based on a first screen refresh rate. N is related to the first screen refresh rate and is a positive integer greater than 1. Accordingly, the screen receives the first basic pulse sequence sent by the DDIC to the screen N times within the time width of each frame.

[0170] This step can be referred to the description in the above step 501, and this application will not elaborate on it here.

[0171] 604. The screen performs screen dimming based on the N times of the first basic pulse sequence repeatedly sent in each frame.

[0172] This step can be referred to the description in the above step 502, and will not be described in detail in this application.

[0173] Further optionally, in addition to the above-mentioned main chip, chip and DDIC, the electronic device may also include more hardware, as shown in Figure 8, which is a schematic diagram of the hardware structure of the electronic device 100 provided in an embodiment of the present application. In addition to the above-mentioned display module 120 and main chip 110, the electronic device 100 may also include an internal memory 130, a sensor module 140, a USB interface 150, a charging management module 160, a power management module 161 and a battery 162, etc. Among them, the sensor module 140 may include a pressure sensor 140A, a proximity light sensor 140B, an ambient light sensor 140C, a touch sensor 140D, etc. Among them, the display module 120 may include a screen 120A and a chip 120B, etc.

[0174] It should be understood that the structure illustrated in the embodiments of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0175] The main chip 110 can refer to the above description of the main chip in Figure 4, and this application will not elaborate on it here.

[0176] The display module 120 is used to display images, videos, etc. The display module 120 includes a screen 120A (the screen 120A, as shown in FIG4 , may include a display panel and a GOA unit) and a chip 120B. In some embodiments, the electronic device 100 may include one or N display modules 120 , where N is a positive integer greater than 1. The display module 120 can be described in the above description of FIG4 , and will not be further described in this application.

[0177] The internal memory 130 can be used to store computer executable program codes, which include instructions. The processor in the main chip 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 130. The internal memory 130 may include a program storage area and a data storage area. Among them, the program storage area can store an operating system, an application required for at least one function (such as a sound playback function), etc. The data storage area can store data (such as audio data) created during the use of the electronic device 100, etc. In addition, the internal memory 130 may include a high-speed random access memory, and may also include a non-volatile memory, such as a flash memory device, etc.

[0178] The pressure sensor 140A in the sensor module 140 can be provided on the display module 120. The pressure sensor 140A can be used to sense user operations on the display module 120. The proximity light sensor 140B can include, for example, a light-emitting diode (LED) and a light detector. The ambient light sensor 140C is used to sense the brightness of ambient light. The touch sensor 140D, also known as a "touch panel", can be provided on the display module 120. The touch sensor 140D and the display module 120 form a touch screen, also known as a "touch screen". The touch sensor 140D is used to detect touch operations acting on or near it.

[0179] FIG9 is a schematic diagram of the software structure of an electronic device provided in an embodiment of the present application.

[0180] A layered architecture divides software into several layers, each with distinct roles and responsibilities. Layers communicate with each other through software interfaces. In some embodiments, the Android system is divided into four layers: the application layer, the application framework layer, the Android runtime and system libraries, and the kernel layer.

[0181] The application layer can include a series of application packages. As shown in Figure 9, the application layer can include applications such as camera, gallery, calendar, map, navigation, WLAN, Bluetooth, music, video, call, and short message.

[0182] The application framework layer provides an application programming interface (API) and programming framework for applications in the application layer. The application framework layer includes some predefined functions.

[0183] As shown in FIG9 , the application framework layer may include a window manager, a content provider, a view system, a telephony manager, a resource manager, a notification manager, and the like.

[0184] The window manager is used to manage window programs. The window manager can obtain the display size, determine whether there is a status bar, lock the screen, take screenshots, etc.

[0185] Content providers are used to store and retrieve data and make it accessible to applications. The data may include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

[0186] The view system includes visual controls, such as those for displaying text and images. The view system is used to build applications. A display interface can consist of one or more views. For example, a display interface containing a text notification icon might include a view for displaying text and a view for displaying images.

[0187] The phone manager is used to provide communication functions of the electronic device 100, such as management of call status (including answering, hanging up, etc.).

[0188] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0189] The Notification Manager allows applications to display notifications in the status bar. These messages can be displayed briefly and then disappear automatically, without requiring user interaction. For example, the Notification Manager can be used to notify users of completed downloads and message reminders. The Notification Manager can also display notifications in the system's top status bar as icons or scrolling text, such as notifications from background applications, or as dialog windows on the screen. Examples include displaying text messages in the status bar, emitting alert sounds, vibrating the user's terminal, and flashing indicator lights.

[0190] The Android runtime includes the core library and the virtual machine. The Android runtime is responsible for scheduling and management of the Android system.

[0191] The core library consists of two parts: one is the function that needs to be called by the Java language, and the other is the Android core library.

[0192] The application layer and application framework layer run in a virtual machine. The virtual machine executes Java files in the application layer and application framework layer as binary files. The virtual machine manages object lifecycles, stack management, thread management, security and exception management, and garbage collection.

[0193] The system library can include multiple functional modules, such as surface manager, media library, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.

[0194] The surface manager is used to manage the display subsystem and provide fusion of 2D and 3D layers for multiple applications.

[0195] The media library supports playback and recording of a variety of common audio and video formats, as well as static image files. The media library can support a variety of audio and video encoding formats, such as: MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.

[0196] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0197] A 2D graphics engine is a drawing engine for 2D drawings.

[0198] The kernel layer is the layer between hardware and software. The kernel layer includes at least display driver, camera driver, audio driver, and sensor driver.

[0199] The present application also provides a chip, wherein the chip can be the DDIC chip mentioned above, and the chip is used to operate inside an electronic device. For details, please refer to the description of the above DDIC, which will not be described in detail in this application. The chip is used to be connected to the screen, and is used to send a first basic pulse timing to the screen N times within the time width of each frame in response to the brightness of the screen being in the first brightness range, so as to perform screen dimming. The time width of each frame is determined based on the first screen refresh rate, N is related to the first screen refresh rate, and N is a positive integer greater than 1.

[0200] The chip may also be other chips besides DDIC, and this application does not impose any restrictions on this.

[0201] In one possible implementation, the chip is also used to send a first basic pulse timing to the screen M times within the time width of each frame to perform screen dimming when the screen refresh rate changes from the first screen refresh rate to the second screen refresh rate. The time width of each frame is determined based on the second screen refresh rate, M is related to the second screen refresh rate, and M is a positive integer greater than 1.

[0202] In one possible implementation, the first basic pulse timing includes multiple high levels and multiple low levels, the time width of the first high level in the first basic pulse timing is greater than the time width of any low level and the time width of any other high level in the first basic pulse timing, and the first high level is the first high level in the first basic pulse timing.

[0203] In a possible implementation, the time corresponding to the first high level is used to reset the pixel.

[0204] In one possible implementation, the chip is further used to send a second basic pulse timing to the screen repeatedly I times within the time width of each frame in response to the brightness of the screen being in the second brightness range to perform screen dimming, and the time width of each frame is determined based on the third screen refresh rate, I is related to the third screen refresh rate, and I is a positive integer greater than 1; wherein, the first brightness range is smaller than the second brightness range, and the second basic pulse timing includes a high level and a low level.

[0205] In one possible implementation, the chip is further used to determine that the brightness of the screen is within a first brightness range.

[0206] In one possible implementation, the chip determines that the brightness of the screen is in the first brightness range, including: the chip receives the first brightness sent by the main chip, and determines that the screen brightness changes from the second brightness to the first brightness, the first brightness is in the first brightness range, and the second brightness is in the second brightness range.

[0207] In one possible implementation, the first brightness is smaller than the second brightness.

[0208] In a possible implementation, any brightness in the first brightness range is smaller than any brightness in the second brightness range.

[0209] The above embodiment has been described with respect to DDIC in FIG4 , and this application will not elaborate on this.

[0210] Please refer to Figure 10, which is a schematic diagram of the structure of a display dimming device 1000 provided in an embodiment of the present application. The display dimming device shown in Figure 10 can be an electronic device, a device within an electronic device, or a device that can be used in conjunction with an electronic device. The display dimming device shown in Figure 10 can include a processing unit 1001 and a detection unit 1002.

[0211] in:

[0212] Processing unit 1001 is used to repeat the first basic pulse timing N times within the time width of each frame to perform screen dimming in response to the brightness of the screen being in the first brightness range, where the time width of each frame is determined based on the first screen refresh rate, N is related to the first screen refresh rate, and N is a positive integer greater than 1.

[0213] In one possible implementation, the processing unit 1001 is used to repeat the first basic pulse timing M times within the time width of each frame to perform screen dimming when the screen refresh rate changes from the first screen refresh rate to the second screen refresh rate. The time width of each frame is determined based on the second screen refresh rate, M is related to the second screen refresh rate, M is a positive integer greater than 1, and the ratio between M and N is equal to the ratio between the first screen refresh rate and the second screen refresh rate.

[0214] In one possible implementation, the first basic pulse timing includes multiple high levels and multiple low levels, the time width of the first high level in the first basic pulse timing is greater than the time width of any low level and the time width of any other high level in the first basic pulse timing, and the first high level is the first high level in the first basic pulse timing.

[0215] In a possible implementation, the time corresponding to the first high level is used to reset the pixel.

[0216] In one possible implementation, the processing unit 1001 is used to perform screen dimming by repeating the second basic pulse sequence I times within the time width of each frame in response to the brightness of the screen being in the second brightness range, where the time width of each frame is determined based on the third screen refresh rate, I is related to the third screen refresh rate, and I is a positive integer greater than 1; wherein the first brightness range is smaller than the second brightness range, and the second basic pulse sequence includes a high level and a low level.

[0217] In a possible implementation, the detection unit 1002 is configured to detect whether the brightness of the screen is within a first brightness range.

[0218] In one possible implementation, the detection unit 1002 is used to detect that the screen brightness is in the first brightness range, including: detecting that the screen brightness changes from the second brightness to the first brightness, the first brightness is in the first brightness range, and the second brightness is in the second brightness range.

[0219] In a possible implementation, the first brightness is smaller than the second brightness.

[0220] In a possible implementation, any brightness in the first brightness range is smaller than any brightness in the second brightness range.

[0221] In the case where the display dimming device can be a chip or a chip system, please refer to the chip structure diagram shown in Figure 11. The chip 1100 shown in Figure 11 includes a processor 1101 and an interface 1102. Optionally, it may also include a memory 1103. The number of processors 1101 can be one or more, and the number of interfaces 1102 can be multiple.

[0222] For the case where the chip is used to implement the electronic device in the embodiment of the present application:

[0223] The interface 1102 is used to receive or output signals;

[0224] The processor 1101 is used to perform data processing operations of the electronic device.

[0225] In one possible embodiment, interface 1102 is used to send a first basic pulse timing to the screen repeatedly N times within the time width of each frame to perform screen dimming in response to the brightness of the screen being in the first brightness range. The time width of each frame is determined based on the first screen refresh rate, N is related to the first screen refresh rate, and N is a positive integer greater than 1.

[0226] In a possible embodiment, interface 1102 is used to send a first basic pulse timing to the screen M times within the time width of each frame to perform screen dimming when the screen refresh rate changes from a first screen refresh rate to a second screen refresh rate. The time width of each frame is determined based on the second screen refresh rate, M is related to the second screen refresh rate, and M is a positive integer greater than 1.

[0227] In a possible embodiment, the first basic pulse timing includes multiple high levels and multiple low levels, the time width of the first high level in the first basic pulse timing is greater than the time width of any low level and the time width of any other high level in the first basic pulse timing, and the first high level is the first high level in the first basic pulse timing.

[0228] In a possible embodiment, the time corresponding to the first high level is used to reset the pixel.

[0229] In one possible embodiment, interface 1102 is used to send a second basic pulse timing to the screen repeatedly I times within the time width of each frame in response to the brightness of the screen being in the second brightness range to perform screen dimming, where the time width of each frame is determined based on a third screen refresh rate, I is related to the third screen refresh rate, and I is a positive integer greater than 1; wherein the first brightness range is smaller than the second brightness range, and the second basic pulse timing includes a high level and a low level.

[0230] In a possible embodiment, the processor 1101 is configured to determine that the brightness of the screen is within a first brightness range.

[0231] In a possible embodiment, the interface 1102 is used to receive the first brightness sent by the main chip, and the processor 1101 is used to set the screen brightness from the second brightness to the first brightness, the first brightness is in the first brightness range, and the second brightness is in the second brightness range.

[0232] In a possible embodiment, the first brightness is smaller than the second brightness.

[0233] In a possible implementation, any brightness in the first brightness range is smaller than any brightness in the second brightness range.

[0234] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

[0235] It is understood that some optional features in the embodiments of the present application may, in certain scenarios, be implemented independently of other features, such as the solutions on which they are currently based, to solve corresponding technical problems and achieve corresponding effects. Alternatively, they may be combined with other features in certain scenarios as needed. Accordingly, the display dimming device provided in the embodiments of the present application may also implement these features or functions accordingly, which will not be described in detail here.

[0236] It should be understood that the processor in the embodiment of the present application can be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method embodiment can be completed by an integrated logic circuit of hardware in the processor or instructions in the form of software. The above processor can be a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware component.

[0237] It is understood that the memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0238] The present application also provides a computer-readable storage medium, which stores a computer program. The computer program includes program instructions. When the program instructions are executed on an electronic device, the functions of any of the above method embodiments are implemented.

[0239] The present application also provides a computer program product, which, when executed on a computer, enables the computer to implement the functions of any of the above method embodiments.

[0240] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated therein. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a high-density digital video disc (DVD)), or a semiconductor medium (eg, a solid state disk (SSD)).

[0241] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A display dimming method, characterized in that: The method comprises: In response to the brightness of the screen being in the first brightness range, the first basic pulse timing is repeated N times within the time width of each frame to perform screen dimming, and the time width of each frame is determined based on the first screen refresh rate, and N is related to the first screen refresh rate, and N is a positive integer greater than 1.

2. The method according to claim 1, characterized in that The method further comprises: When the screen refresh rate changes from the first screen refresh rate to the second screen refresh rate, the first basic pulse timing is repeated M times within the time width of each frame to perform screen dimming, and the time width of each frame is determined based on the second screen refresh rate. The M is related to the second screen refresh rate, and the M is a positive integer greater than 1. The ratio of the M to the N is equal to the ratio of the first screen refresh rate to the second screen refresh rate.

3. The method according to claim 1 or 2, characterized in that: The first basic pulse timing includes multiple high levels and multiple low levels. The time width of the first high level in the first basic pulse timing is greater than the time width of any low level and the time width of any other high level in the first basic pulse timing. The first high level is the first high level in the first basic pulse timing.

4. The method according to claim 3, characterized in that The time corresponding to the first high level is used to reset the pixel.

5. The method according to claim 4, characterized in that The method further comprises: In response to the brightness of the screen being in the second brightness interval, the second basic pulse timing is repeated I times within the time width of each frame to perform screen dimming, wherein the time width of each frame is determined based on a third screen refresh rate, wherein I is related to the third screen refresh rate, and I is a positive integer greater than 1; The first brightness range is smaller than the second brightness range, and the second basic pulse timing sequence includes a high level and a low level.

6. The method according to any one of claims 1 to 5, characterized in that: Before the step of responding that the brightness of the screen is in the first brightness interval, the method further includes: The brightness of the screen is detected to be within the first brightness range.

7. The method according to claim 6, characterized in that The detecting screen brightness is within the first brightness range, comprising: It is detected that the brightness of the screen changes from the second brightness to the first brightness, the first brightness is within the first brightness interval, and the second brightness is within the second brightness interval.

8. The method according to claim 7, characterized in that The first brightness is lower than the second brightness.

9. The method according to claim 8, characterized in that Any brightness in the first brightness range is smaller than any brightness in the second brightness range.

10. An electronic device, characterized in that: The electronic device comprises a chip and a screen, wherein the chip is connected to the screen, wherein: The chip is used for sending a first basic pulse timing to the screen repeatedly N times within a time width of each frame in response to the brightness of the screen being in a first brightness interval, wherein the time width of each frame is determined based on a first screen refresh rate, wherein N is related to the first screen refresh rate, and N is a positive integer greater than 1; The screen is used to perform screen dimming based on the N times of the first basic pulse timing repeatedly sent by the chip in each frame.

11. The method according to claim 10, characterized in that The chip is further configured to, when the screen refresh rate changes from the first screen refresh rate to the second screen refresh rate, repeatedly send a first basic pulse timing to the screen M times within a time width of each frame, wherein the time width of each frame is determined based on the second screen refresh rate, and M is related to the second screen refresh rate, and M is a positive integer greater than 1; The screen is also used to perform screen dimming based on the M times of the first basic pulse timing repeatedly sent by the chip in each frame.

12. The method according to claim 10 or 11, characterized in that: The first basic pulse timing includes multiple high levels and multiple low levels. The time width of the first high level in the first basic pulse timing is greater than the time width of any low level and the time width of any other high level in the first basic pulse timing. The first high level is the first high level in the first basic pulse timing.

13. The method according to claim 12, characterized in that The time corresponding to the first high level is used to reset the pixel.

14. The method according to claim 13, characterized in that The chip is further configured to send a second basic pulse sequence to the screen repeatedly I times within a time width of each frame in response to the brightness of the screen being within a second brightness interval, wherein the time width of each frame is determined based on a third screen refresh rate, wherein I is related to the third screen refresh rate, and I is a positive integer greater than 1; The screen is further used to perform screen dimming based on the second basic pulse timing repeatedly sent by the chip in each frame; The first brightness range is smaller than the second brightness range, and the second basic pulse timing sequence includes a high level and a low level.

15. The method according to any one of claims 10 to 14, characterized in that: The chip is also used to determine that the brightness of the screen is within the first brightness range.

16. The method according to claim 15, characterized in that The electronic device further comprises a main chip, and the main chip is connected to the chip; The main chip is used to send a first brightness to the chip, where the first brightness is the brightness of the screen; The chip determines that the brightness of the screen is within the first brightness range, including: The chip receives the first brightness sent by the main chip, and determines that the screen brightness changes from the second brightness to the first brightness, the first brightness is within the first brightness interval, and the second brightness is within the second brightness interval.

17. The method according to claim 16, characterized in that The first brightness is lower than the second brightness.

18. The method according to claim 17, characterized in that Any brightness in the first brightness range is smaller than any brightness in the second brightness range.

19. A chip, characterized in that: The chip is used to be connected to the screen, and is used to send a first basic pulse timing to the screen N times within the time width of each frame in response to the brightness of the screen being in a first brightness range, so as to perform screen dimming. The time width of each frame is determined based on the first screen refresh rate, and N is related to the first screen refresh rate, and N is a positive integer greater than 1.

20. The method according to claim 19, characterized in that The chip is also used to send a first basic pulse timing to the screen M times within a time width of each frame to perform screen dimming when the screen refresh rate changes from the first screen refresh rate to the second screen refresh rate. The time width of each frame is determined based on the second screen refresh rate, M is related to the second screen refresh rate, and M is a positive integer greater than 1.

21. The method according to claim 19 or 20, characterized in that The first basic pulse timing includes multiple high levels and multiple low levels. The time width of the first high level in the first basic pulse timing is greater than the time width of any low level and the time width of any other high level in the first basic pulse timing. The first high level is the first high level in the first basic pulse timing.

22. The method according to claim 21, characterized in that The time corresponding to the first high level is used to reset the pixel.

23. The method according to claim 22, characterized in that The chip is further configured to, in response to the brightness of the screen being in a second brightness interval, repeatedly send a second basic pulse timing to the screen I times within a time width of each frame to perform screen dimming, wherein the time width of each frame is determined based on a third screen refresh rate, wherein I is related to the third screen refresh rate, and I is a positive integer greater than 1; The first brightness range is smaller than the second brightness range, and the second basic pulse timing sequence includes a high level and a low level.

24. The method according to any one of claims 19 to 23, characterized in that: The chip is also used to determine that the brightness of the screen is within the first brightness range.

25. The method according to claim 24, characterized in that The chip determines that the brightness of the screen is in a first brightness range, including: The chip receives the first brightness sent by the main chip, and determines that the screen brightness changes from the second brightness to the first brightness, the first brightness is within the first brightness interval, and the second brightness is within the second brightness interval.

26. The method according to claim 25, characterized in that The first brightness is lower than the second brightness.

27. The method according to claim 26, characterized in that Any brightness in the first brightness range is smaller than any brightness in the second brightness range.

28. An electronic device, comprising one or more memories and one or more processors, characterized in that: The memory is used to store a computer program; the processor is used to call the computer program so that the electronic device executes the method according to any one of claims 1 to 9.

29. A chip, applied to electronic equipment, characterized in that: The chip includes at least one processor and an interface, wherein the interface is used to receive instructions and transmit them to the at least one processor; the at least one processor executes the instructions so that the electronic device executes the method as described in any one of claims 1-9.

30. A computer-readable storage medium having a computer program / instruction stored thereon, characterized in that: When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

31. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

Images