White balance compensation method and system for LED display screen

Abstract

The present invention belongs to the technical field of injection-type electro luminescence display. Disclosed are a white balance compensation method and system for an LED display screen. The method comprises: using an FPGA chip to drive an LED full-color display screen; performing frequency division on a crystal oscillator by means of an FPGA, so as to obtain three synchronous clocks, which respectively control red, green and blue LED display drive subsystems; a drive system internally starting a timer, when a device is powered down, the FPGA being notified and writing the current count into an EEPROM, and during next power-on initialization, a counting register continuing accumulation on the basis of the EEPROM; before leaving a factory, the FPGA adjusting the resistance values of column strobing base adjustable resistors by means of an I2C bus once for the first time, and then adjusting a column drive current, such that the LED display screen reaches a white balance; and every other adjustment period of the column strobing base adjustable resistors, the FPGA adjusting the resistance values of the column strobing base adjustable resistors by means of the I2C bus once, and then adjusting the column drive current, such that the LED display screen reaches the white balance again. In the present invention, a method for periodically adjusting the resistance values of column strobing base adjustable resistors by means of an FPGA is used to make an LED display screen automatically reach a white balance.

Description

A white balance compensation method and system for LED display screen Technical Field

[0001] The present invention belongs to the technical field of injection-type electroluminescent display, and in particular relates to a white balance compensation method and system for an LED display screen. Background Art

[0002] Certain substances can emit light when driven by a certain voltage. This phenomenon, in which electrical energy is directly converted into visible light, is called electroluminescence (EL). Broadly speaking, EL includes not only light-emitting diodes (LEDs), organic light-emitting diodes (OLEDs), and electroluminescent displays (ELDs), but also semiconductor lasers. LEDs are considered "injection-type" EL devices. The main difference between the two is that LEDs use inorganic materials, while OLEDs use organic materials.

[0003] With the development of science and technology and the progress of society, LED large-screen displays, as an important branch of new display technologies, are developing rapidly and their application areas are constantly expanding. Among them, full-color LED displays are widely used in the service industry, finance, transportation, and other fields due to their advantages such as large size, high brightness, and seamless splicing. The color of each pixel on an LED full-color display is a combination of red, green, and blue LEDs with grayscale levels in a specified ratio. Therefore, the main characteristics of the white balance of LED displays are related to the brightness and chromaticity of the red, green, and blue LEDs. Stabilizing the matching ratio parameters of each primary color not only ensures the correct reproduction of the display's white balance, but also accurately restores the color tone of the displayed image. Although LED display products have many advantages, the light emission of LEDs is easily affected by many internal and external factors. For example, the temperature characteristics and attenuation characteristics of the LED, as well as the power supply of the driving circuit, can cause the brightness of each primary color to change over time, resulting in deviations in the brightness and chromaticity of the white balance.

[0004] The luminous flux of LED gradually declines with the accumulation of lighting time. The current research standard often regards the end of the life of the LED light source when the luminous flux decays to 70% (or 50%) of the initial value at the factory.

[0005] Regarding the causes of LED light decay, Georgiy Bobashev's team experimentally discovered that within the first 1000 hours of operation under low-stress conditions, the luminous flux of LEDs does not follow exponential decay. Researchers such as Rossi have shown that the primary cause of LED degradation is non-radiative recombination caused by carrier mobility defects, but they have not analyzed the impact of current, temperature, and other parameters on light decay. Narendran's research indicates that the junction temperature of an LED chip significantly impacts its operating lifespan; higher junction temperatures lead to faster LED light decay. However, this research lacks a comprehensive mathematical model linking light decay rate and junction temperature, making it theoretically unconvincing.

[0006] In terms of light decay compensation, Guo Jin and others obtained the light decay characteristic curve from the LED data sheet and designed a light decay compensated LED driver controller. The LED controller combines the light decay curve with the predetermined output current value, maintaining a certain degree of constancy in the light source's output luminous flux and achieving light decay compensation. However, LED light decay is affected by multiple factors, and the light decay characteristic curve only considers the LED junction temperature. While it can achieve light decay compensation in a short period of time, the long-term output stability of the light source is not ideal. Furthermore, Wang Qi and Zhang Bo analyzed the causes of LED light decay and, based on this research, designed a SEPIC-based LED driver circuit. This circuit can provide an appropriate operating voltage and drive current based on the light decay caused by changes in the lamp's operating temperature, thereby achieving adaptive light decay compensation. However, the circuit design of this topology is relatively complex, requiring a large number of components, which increases the cost of the LED driver design.

[0007] Addressing the widespread issue of colorimetric consistency in LED displays, Chen Yutao analyzed the causes of this problem from the perspectives of LED characteristics, the principles of full-color display, and the characteristics of constant-current drive. He then analyzed the feasibility of implementing point-by-point correction by modifying the pixel color space using the principle of three-primary-color mixing, providing a theoretical basis for implementing colorimetric correction in control systems. Due to the current characteristics of LED lamps, when the current is constant, the LED reaches maximum brightness at full pulse-width modulation (PWM) value. Increasing the PWM value cannot increase the average LED current. The overall concept of correction is to obtain new point-by-point PWM values ​​through color mixing to approximate the average LED current. These new PWM values ​​are somewhat lower than the original values, resulting in a decrease in brightness under normal operating conditions. Furthermore, Chen Yutao, considering the application requirements of high-density displays, determined the basic architecture of a FPGA-based control system. Technical issues

[0008] Although LED display technology in existing technologies has been widely used in many fields, it still faces some technical challenges and problems, including:

[0009] 1) High cost and workload of point-by-point correction:

[0010] Large LED displays are composed of a large number of tiny pixels, each of which needs to be independently calibrated to achieve the desired brightness.

[0011] If each pixel is corrected point by point, it will generate a huge amount of data processing, requiring high-performance processors and algorithms.

[0012] In addition, point-by-point calibration is also very costly, involving sophisticated calibration equipment and a time-consuming operation process.

[0013] 2) Brightness drop problem:

[0014] As the usage time increases, the brightness of the LED display will gradually decrease, a process usually referred to as "light decay".

[0015] This brightness drop affects the overall visual effect of the display, especially in applications that require long-term stable display, such as advertising screens and traffic signs.

[0016] 3) White balance offset:

[0017] On LED screens, white balance is achieved by adjusting the brightness and chromaticity of the red, green, and blue LED sub-pixels.

[0018] Over time, due to various reasons (such as temperature changes, material aging, etc.), the luminous efficiency of each color LED will change, which will cause the white balance to be inaccurate, thus affecting the display effect.

[0019] Due to light decay, white balancing the screen becomes more difficult after long-term use, as LEDs of different materials and colors decay at different rates. Technical Solutions

[0020] In view of the problems existing in the prior art, the present invention provides a method and system for white balance compensation of an LED display screen.

[0021] The present invention is implemented in this way. The LED display white balance compensation method includes the following steps:

[0022] In view of the problems existing in the prior art, the present invention provides a method and system for white balance compensation of an LED display screen.

[0023] The present invention is implemented as follows: a method for compensating white balance of an LED display screen, the method comprising the following steps:

[0024] Step 1: Use FPGA chip to drive M rows and N columns of LED full-color display screen, crystal oscillator frequency F co ;

[0025] Step 2: The crystal oscillator is divided by the FPGA chip W to obtain three synchronous clocks T clk = , respectively controlling the red LED display driving subsystem, the green LED display driving subsystem and the blue LED display driving subsystem;

[0026] Step 3: Start a timer in the drive system. When the device loses power, notify the FPGA. The FPGA writes the current count to the EEPROM. When the device is powered on again, the count register continues to accumulate based on the EEPROM.

[0027] Step 4: Before the FPGA chip leaves the factory, adjust the column gate base adjustable resistor value through the I2C bus for the first time to adjust the column drive current I LED , so that the LED display screen achieves white balance;

[0028] Step 5: every other column gate base adjustable resistor adjustment period T run , the FPGA chip adjusts the column gate base adjustable resistor value through the I2C bus to adjust the column drive current I LED , so that the LED display can reach white balance again.

[0029] Furthermore, in step 1, each color pixel contains one red, green, and blue sub-pixel. The entire driving system is divided into a general driving subsystem, a red LED display driving subsystem, a green LED display driving subsystem, and a blue LED display driving subsystem. The scanning time of each line of the red, green, and blue driving subsystems is BT. clk , the column strobe time corresponding to any pixel lighting is also BT clk .

[0030] Furthermore, the frame period is T=Mt row , , the selected parameters need to satisfy f r =f g =f b >50Hz.

[0031] Furthermore, the column drive current , where β 放大 is the amplification factor of the column driver transistor collector, I R_col is the column driver transistor base current, U col is the column driving transistor base voltage, U be is the base-emitter voltage of the column driving transistor, Rcol Adjustable resistor for the base of column drive transistor.

[0032] Further, using R(j) r_col 出厂 、R(j) g_col 出厂 and R(j) b_col 出厂 (j=1,2,3,…,N) represents the resistance value of the base adjustable resistor in the jth column of the red LED display driver subsystem, the green LED display driver subsystem and the blue LED display driver subsystem when the product leaves the factory. The resistance value makes the red LED display driver subsystem, the green LED display driver subsystem and the blue LED display driver subsystem meet the relative brightness ratio L of the red, green and blue sub-pixels in each pixel when they are normally lit before leaving the factory. r 出厂 :L g 出厂 :L b 出厂 =1.0000:4.5907:0.0601, which meets the white balance requirements of the LED display when it leaves the factory.

[0033] Furthermore, R(j) r_col_min 、R(j) g_col_min and R(j) b_col_min (j=1,2,3,…,N) is the minimum value of the base adjustable resistance in the jth column that enables the red LED display driving subsystem, the green LED display driving subsystem, and the blue LED display driving subsystem to satisfy a relative brightness ratio of 1.0000:4.5907:0.0601 for the red, green, and blue sub-pixels in each pixel when they are normally lit. It is also the minimum value that satisfies the inverse proportional relationship between the base adjustable resistance in the jth column of the red, green, and blue sub-pixels in each pixel and the brightness of that column.

[0034] Furthermore, when the working time is nT run (n=1,2,3,...n max )(n max Determined by the life of the display), the resistance of the base adjustable resistor is R(j) r_col 出厂 、R(j) g_col 出厂 and R(j) b_col 出厂 When (j=1,2,3,…,N), the relative brightness of the red, green and blue LED sub-pixels when they are normally lit are L r_nTrun_R 出厂 =α nTrun L r 出厂 , L g_nTrun_R 出厂=β nTrun L g 出厂 , L b_nTrun_R 出厂 =γ nTrun L b 出厂 , β nTrun ﹥α nTrun ﹥γ nTrun , where α nTrun , β nTrun and γ nTrun is the brightness attenuation coefficient corresponding to the working time.

[0035] Furthermore, when the working time is nT run (n=1,2,3,...n max )(n max (determined by the life of the display), the FPGA chip adjusts the resistance of the base adjustable resistor and satisfies R(j)r_col_nTrun=α nTrun R(j) r_col 出厂 R(j) r_col_min 、R(j)g_col_nTrun=β nTrun R(j) g_col 出厂 R(j) g_col_min and R(j)b_col_nTrun=R(j) b_col 出厂 γ nTrun R(j) b_col_min (j=1,2,3,…,N), and the relative brightness of the red, green and blue LED sub-pixels when they are normally lit are L r_nTrun = L r_nTrun_R 出厂 = α nTrun L r 出厂 =L r 出厂 , L g_nTrun = L g_nTrun_R 出厂 = β nTrun L g 出厂 =L g 出厂 , L b_nTrun = L b_nTrun_R 出厂 = γ nTrun L b 出厂 =L b 出厂 , then L r_nTrun :L g_nTrun :L b_nTrun =L r 出厂 :L g 出厂 :L b 出厂 , the LED display automatically adjusts to the white balance state.

[0036] Furthermore, when the working time is nT run (n=1,2,3,...n max )(n max Determined by the life of the display), α nTrun R(j) r_col 出厂 R(j) r_col_min , β nTrun R(j) g_col 出厂 R(j) g_col_min and R(j) b_col 出厂 γ nTrun R(j) b_col_min (j=1,2,3,…,N), the FPGA chip adjusts the resistance of the base adjustable resistor so that the resistance satisfies R(j)r_col_nTrun=R(j) r_col_min 、R(j)g_col_nTrun=R(j) g_col_min and R(j)b_col_nTrun=R(j) b_col_min (j=1,2,3,…,N), and the relative brightness of the red, green and blue LED sub-pixels when they are normally lit are L r_nTrun = L r_nTrun_R 出厂 = α nTrun L r 出厂 L r 出厂 , L g_nTrun = L g_nTrun_R 出厂 = β nTrun L g出厂 L g 出厂 , L b_nTrun = L b_nTrun_R 出厂 = γ nTrun L b 出厂 L b 出厂 , the LED display automatically approaches the white balance state.

[0037] Another object of the present invention is to provide an LED display screen white balance compensation system and a LED display screen white balance compensation method, the system comprising:

[0038] General drive subsystem, including crystal oscillator, frequency division module, timer module and EEPROM;

[0039] Frequency division module: the crystal oscillator is divided by the FPGA chip to obtain three synchronous clocks to control the red LED display drive subsystem, green LED display drive subsystem and blue LED display drive subsystem respectively;

[0040] The timer module is used to record the total working time of the display, record the current time when the power is off, and continue counting when the power is on next time;

[0041] The red LED display driving subsystem includes a red LED display hardware module, a red LED display row scanning module, and a red LED display column strobe module;

[0042] The red LED display hardware module includes hardware devices such as a row driver and a column driver suitable for red LED display, wherein the column driver uses an adjustable resistor chip as a base resistor;

[0043] Red LED display line scanning module, used for progressive scanning of red LED display;

[0044] The red LED display column selection module is used to control the selection of each column of the red LED display. When the product leaves the factory, the FPGA chip is used to adjust the resistance value of the column drive transistor base adjustable resistor chip to control the current of the red LED sub-pixel, thereby controlling the brightness of the red LED sub-pixel. Then, based on the red LED light attenuation law, within a certain base resistance range, the FPGA chip is used to periodically lower the resistance value of the column drive transistor base adjustable resistor chip to increase the current of the red LED sub-pixel, thereby increasing the brightness of the red LED sub-pixel.

[0045] Green LED display drive subsystem, including green LED display hardware module, green LED display row scanning module, green LED display column strobe module;

[0046] A green LED display hardware module includes hardware devices such as a row driver and a column driver suitable for green LED display, wherein the column driver uses an adjustable resistor chip as a base resistor;

[0047] Green LED display line scanning module, used for progressive scanning of green LED display;

[0048] The green LED display column selection module is used to control the selection of each column of the green LED display. When the product leaves the factory, the FPGA chip is used to adjust the resistance value of the column drive transistor base adjustable resistor chip to control the current of the green LED sub-pixel, and thus control the brightness of the green LED sub-pixel. Then, based on the green LED light decay law, within a certain base resistance range, the FPGA chip is used to periodically lower the resistance value of the column drive transistor base adjustable resistor chip to increase the current of the green LED sub-pixel, and thus increase the brightness of the green LED sub-pixel.

[0049] The blue LED display driver subsystem includes a blue LED display hardware module, a blue LED display row scanning module, and a blue LED display column strobe module;

[0050] A blue LED display hardware module includes hardware components such as a row driver and a column driver suitable for blue LED display, wherein the column driver uses an adjustable resistor chip as a base resistor;

[0051] Blue LED display line scanning module, used for line-by-line scanning of blue LED display;

[0052] The blue LED display column selection module is used to control the selection of each column of the blue LED display. When the product leaves the factory, the FPGA chip is used to adjust the resistance value of the column drive transistor base adjustable resistor chip to control the current of the blue LED sub-pixel, and thus control the brightness of the blue LED sub-pixel. Then, based on the blue LED light attenuation law, within a certain base resistance range, the FPGA chip is used to periodically lower the resistance value of the column drive transistor base adjustable resistor chip to increase the current of the blue LED sub-pixel, and thus increase the brightness of the blue LED sub-pixel. Beneficial effects

[0053] In combination with the above technical solutions and the technical problems solved, the advantages and positive effects of the technical solutions to be protected by the present invention are as follows:

[0054] First, the row drive of the present invention adopts a row-by-row scanning technology, and the column drive adopts a method of using an FPGA chip to adjust the resistance value of the column drive transistor base adjustable resistor chip. This solution uses an FPGA chip to adjust the resistance value of the column drive transistor base adjustable resistor chip when the product leaves the factory to control the current of the red, green, and blue sub-pixels in each pixel, thereby controlling the brightness of the sub-pixels. By first achieving the brightness uniformity of the red, green, and blue sub-pixels themselves, the white balance of the red, green, and blue colors is finally achieved. Then, in combination with the red, green, and blue light attenuation law, within a certain base resistance range, the FPGA chip is used to periodically lower the resistance value of the column drive transistor base adjustable resistor chip to increase the current of the red, green, and blue sub-pixels in each pixel, thereby increasing the brightness of the sub-pixels. By first achieving the brightness uniformity of the red, green, and blue sub-pixels themselves, the white balance of the red, green, and blue colors is finally achieved. In summary, this solution can achieve white balance while also compensating for the brightness loss caused by light attenuation in the later stage of LED display operation.

[0055] Second, the present invention only needs to calibrate column by column, and the number of corrections is the number of columns, which is much less than the number of rows × the number of columns of point-by-point calibration, resulting in lower costs and less workload.

[0056] The present invention uses a timer to record the display's operating time based on the varying relationships between the light decay and total operating time of red, green, and blue LEDs made of different materials. The drive system then compensates for the light decay of the red, green, and blue LEDs to restore the display's white balance. This consideration of light decay and compensation for it ensures that even after the screen has been lit for extended periods, the white balance remains excellent.

[0057] Third, the expected benefits and commercial value of the technical solution of the present invention after transformation are:

[0058] The LED display screen has a huge number of pixels. Directly performing point-by-point correction based on all the pixels of the display screen is costly and labor-intensive. The present invention performs column-by-column correction, and the number of corrections is equal to the number of columns, which is much smaller than the number of rows × the number of columns in point-by-point correction. This method has a lower cost and less workload.

[0059] The present invention solves the white balance problem of LED display screens, so that viewers can watch videos with pure colors, improve user perception, and facilitate product promotion.

[0060] The technical solution of the present invention solves the technical problem of white balance of LED display screens that people have long been eager to solve but have never been able to successfully solve.

[0061] Fourth, the significant technical advancements achieved by the LED display white balance compensation system provided by the present invention include:

[0062] 1. Precise control: Because each LED display driver subsystem (red, green, and blue) in the system includes dedicated row scanning and column gating modules, the system can precisely control the lighting time and current of each sub-pixel, thereby providing more accurate color brightness control and white balance adjustment, improving the quality of the display effect.

[0063] 2. High reliability: Implementing each LED display driver subsystem using FPGA improves system stability and reliability. The FPGA's parallel processing capabilities enable faster system response when adjusting white balance, reducing latency and distortion.

[0064] 3. Flexibility and Programmability: FPGAs offer a high degree of flexibility and programmability, enabling the system to dynamically adjust drive parameters based on different LED display screens, light decay, and other conditions. This flexibility also allows the system to adapt to new display technologies and standards through software updates, protecting investments and extending product lifespan.

[0065] 4. Easy maintenance and upgrade: By using EEPROM to store operating data and setting parameters, the system can save important information after power failure and continue to use it when power is restored, which makes system maintenance and upgrades more convenient.

[0066] 5. Overall performance improvement: By recording the total operating time of the display, the system can monitor and predict the aging of the LED display panel, automatically compensating for brightness when necessary, ensuring long-term color consistency and display quality.

[0067] The design of the system provided by the present invention takes into account various situations encountered by LED display screens during use, and provides an efficient, reliable and long-term maintainable solution through high customization and flexibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0069] FIG1 is a flow chart of a white balance compensation method for an LED display screen provided by an embodiment of the present invention;

[0070] FIG2 is a structural diagram of a white balance compensation system for an LED display screen provided by an embodiment of the present invention;

[0071] FIG3 is a flow chart of a white balance compensation method for an LED display screen provided by the present invention;

[0072] FIG4 is a driving circuit diagram of a single red LED according to an embodiment of the present invention;

[0073] FIG5 is a driving circuit diagram of a single green LED according to an embodiment of the present invention;

[0074] FIG6 is a driving circuit diagram of a single blue LED according to an embodiment of the present invention. Modes for Carrying Out the Invention

[0075] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0076] In view of the problems existing in the prior art, the present invention provides a method and system for white balance compensation of an LED display screen.

[0077] As shown in FIG1 , an embodiment of the present invention provides a method for compensating white balance of an LED display screen. The method comprises the following steps:

[0078] Step 1: Use FPGA chip to drive LED full-color display with M=512 rows and N=1024 columns, and the crystal oscillator frequency F co =20MHz;

[0079] Step 2: The crystal oscillator is divided by FPGA chip W=2 to obtain three synchronous clocks T clk = , respectively controlling the red LED display driving subsystem, the green LED display driving subsystem and the blue LED display driving subsystem;

[0080] Step 3: Start a timer in the drive system. When the device loses power, notify the FPGA. The FPGA writes the current count to the EEPROM. When the device is powered on again, the count register continues to accumulate based on the EEPROM.

[0081] Step 4: Before the FPGA chip leaves the factory, adjust the column gate base adjustable resistor value through the I2C bus for the first time to adjust the column drive current I LED , so that the LED display screen achieves white balance;

[0082] Step 5: every other column gate base adjustable resistor adjustment period T run =100h, the FPGA chip adjusts the column gate base adjustable resistor value through the I2C bus to adjust the column drive current I LED , so that the LED display can reach white balance again.

[0083] Furthermore, in step 1, each color pixel contains one red, green, and blue sub-pixel. The entire driving system is divided into a general driving subsystem, a red LED display driving subsystem, a green LED display driving subsystem, and a blue LED display driving subsystem. The scanning time of each line of the red, green, and blue driving subsystems is BT. clk , the column strobe time corresponding to any pixel lighting is also BT clk , where B=256.

[0084] Furthermore, the frame period is T=Mt row , , the selected parameters need to satisfy f r =f g =f b ≈76Hz>50Hz, which can meet the visual requirements of the human eye.

[0085] Furthermore, the column drive current , where β 放大 is the amplification factor of the column driver transistor collector, I R_col is the column driver transistor base current, U col is the column driving transistor base voltage, U be is the base-emitter voltage of the column driving transistor, R col Adjustable resistor for the base of column drive transistor.

[0086] Further, using R(j) r_col 出厂 、R(j) g_col 出厂 and R(j) b_col 出厂 (j=1,2,3,…,N) represents the resistance value of the base adjustable resistor in the jth column of the red LED display driver subsystem, the green LED display driver subsystem and the blue LED display driver subsystem when the product leaves the factory. The resistance value makes the red LED display driver subsystem, the green LED display driver subsystem and the blue LED display driver subsystem meet the relative brightness ratio L of the red, green and blue sub-pixels in each pixel when they are normally lit before leaving the factory. r 出厂 :L g 出厂 :L b 出厂 =1.0000:4.5907:0.0601, which meets the white balance requirements of the LED display when it leaves the factory.

[0087] Furthermore, R(j) r_col_min 、R(j) g_col_min and R(j) b_col_min(j=1,2,3,…,N) is the minimum value of the base adjustable resistance in the jth column that enables the red LED display driving subsystem, the green LED display driving subsystem, and the blue LED display driving subsystem to satisfy a relative brightness ratio of 1.0000:4.5907:0.0601 for the red, green, and blue sub-pixels in each pixel when they are normally lit. It is also the minimum value that satisfies the inverse proportional relationship between the base adjustable resistance in the jth column of the red, green, and blue sub-pixels in each pixel and the brightness of that column.

[0088] Furthermore, when the working time is nT run =100n hours (n=1,2,3,...n max )(n max Determined by the life of the display), the resistance of the base adjustable resistor is R(j) r_col 出厂 、R(j) g_col 出厂 and R(j) b_col 出厂 When (j=1,2,3,…,N), the relative brightness of the red, green and blue LED sub-pixels when they are normally lit are L r_nTrun_R 出厂 =α nTrun L r 出厂 , L g_nTrun_R 出厂 =β nTrun L g 出厂 , L b_nTrun_R 出厂 =γ nTrun L b 出厂 , β nTrun ﹥α nTrun ﹥γ nTrun , where α nTrun , β nTrun and γ nTrun is the brightness attenuation coefficient corresponding to the working time.

[0089] Furthermore, when the working time is nT run =100n hours (n=1,2,3,...n max )(n max (determined by the life of the display), the FPGA chip adjusts the resistance of the base adjustable resistor and satisfies R(j)r_col_nTrun=α nTrun R(j) r_col 出厂 R(j) r_col_min 、R(j)g_col_nTrun=β nTrun R(j) g_col出厂 R(j) g_col_min and R(j)b_col_nTrun=R(j) b_col 出厂 γ nTrun R(j) b_col_min (j=1,2,3,…,N), and the relative brightness of the red, green and blue LED sub-pixels when they are normally lit are L r_nTrun = L r_nTrun_R 出厂 = α nTrun L r 出厂 =L r 出厂 , L g_nTrun = L g_nTrun_R 出厂 = β nTrun L g 出厂 =L g 出厂 , L b_nTrun = L b_nTrun_R 出厂 = γ nTrun L b 出厂 =L b 出厂 , then L r_nTrun :L g_nTrun :L b_nTrun =L r 出厂 :L g 出厂 :L b 出厂 , the LED display automatically adjusts to the white balance state.

[0090] Furthermore, when the working time is nT run =100n hours (n=1,2,3,...n max )(n max Determined by the life of the display), α nTrun R(j) r_col 出厂 R(j) r_col_min , β nTrun R(j) g_col 出厂 R(j)g_col_min and R(j) b_col 出厂 γ nTrun R(j) b_col_min (j=1,2,3,…,N), the FPGA chip adjusts the resistance of the base adjustable resistor so that the resistance satisfies R(j)r_col_nTrun=R(j) r_col_min 、R(j)g_col_nTrun=R(j) g_col_min and R(j)b_col_nTrun=R(j) b_col_min (j=1,2,3,…,N), and the relative brightness of the red, green and blue LED sub-pixels when they are normally lit are L r_nTrun = L r_nTrun_R 出厂 = α nTrun L r 出厂 L r 出厂 , L g_nTrun = L g_nTrun_R 出厂 = β nTrun L g 出厂 L g 出厂 , L b_nTrun = L b_nTrun_R 出厂 = γ nTrun L b 出厂 L b 出厂 , the LED display automatically approaches the white balance state.

[0091] As shown in FIG2 , an embodiment of the present invention provides an LED display screen white balance compensation system and a LED display screen white balance compensation method. The system includes:

[0092] General drive subsystem, including crystal oscillator, frequency division module, timer module and EEPROM;

[0093] Frequency division module: the crystal oscillator is divided by the FPGA chip to obtain three synchronous clocks to control the red LED display drive subsystem, green LED display drive subsystem and blue LED display drive subsystem respectively;

[0094] The timer module is used to record the total working time of the display, record the current time when the power is off, and continue counting when the power is on next time;

[0095] The red LED display driving subsystem includes a red LED display hardware module, a red LED display row scanning module, and a red LED display column strobe module;

[0096] The red LED display hardware module includes hardware devices such as row driver and column driver suitable for red LED display. As shown in Figure 4, the red LED sub-pixel row driver adopts Darlington transistor drive mode, and the row driver base resistor is R r_row , the column drive adopts triode drive mode, the column drive base resistor R r_col Select adjustable resistor chip, R r_row Connect to one of the M=512 row driver output pins of the FPGA chip, R r_col Connect to one of the N=1024 column driver output pins of the FPGA chip, the red LED driver power supply V r Provide voltage support for the entire drive circuit;

[0097] Red LED display line scanning module, used for progressive scanning of red LED display;

[0098] The red LED display column selection module is used to control the selection of each column of the red LED display. When the product leaves the factory, the FPGA chip is used to adjust the resistance value of the column drive transistor base adjustable resistor chip to control the current of the red LED sub-pixel, thereby controlling the brightness of the red LED sub-pixel. Then, based on the red LED light attenuation law, within a certain base resistance range, the FPGA chip is used to periodically lower the resistance value of the column drive transistor base adjustable resistor chip to increase the current of the red LED sub-pixel, thereby increasing the brightness of the red LED sub-pixel.

[0099] Green LED display drive subsystem, including green LED display hardware module, green LED display row scanning module, green LED display column strobe module;

[0100] The green LED display hardware module includes hardware devices such as row driver and column driver suitable for green LED display. As shown in FIG5 , the green LED sub-pixel row driver adopts Darlington transistor drive mode, and the row driver base resistor is R g_row , the column drive adopts triode drive mode, the column drive base resistor R g_col Select adjustable resistor chip, R g_row Connect to one of the M=512 row driver output pins of the FPGA chip, R g_col Connect to one of the N=1024 column driver output pins of the FPGA chip, the green LED driver power supply V gProvide voltage support for the entire drive circuit;

[0101] Green LED display line scanning module, used for progressive scanning of green LED display;

[0102] The green LED display column selection module is used to control the selection of each column of the green LED display. When the product leaves the factory, the FPGA chip is used to adjust the resistance value of the column drive transistor base adjustable resistor chip to control the current of the green LED sub-pixel, and thus control the brightness of the green LED sub-pixel. Then, based on the green LED light decay law, within a certain base resistance range, the FPGA chip is used to periodically lower the resistance value of the column drive transistor base adjustable resistor chip to increase the current of the green LED sub-pixel, and thus increase the brightness of the green LED sub-pixel.

[0103] The blue LED display driver subsystem includes a blue LED display hardware module, a blue LED display row scanning module, and a blue LED display column strobe module;

[0104] The blue LED display hardware module includes hardware devices such as row driver and column driver suitable for blue LED display. As shown in FIG6 , the blue LED sub-pixel row driver adopts Darlington transistor drive mode, and the row driver base resistor is R b_row , the column drive adopts triode drive mode, the column drive base resistor R b_col Select adjustable resistor chip, R b_row Connect to one of the M=512 row driver output pins of the FPGA chip, R b_col Connect to one of the N=1024 column driver output pins of the FPGA chip, the blue LED driver power supply V b Provide voltage support for the entire drive circuit;

[0105] Blue LED display line scanning module, used for line-by-line scanning of blue LED display;

[0106] The blue LED display column selection module is used to control the selection of each column of the blue LED display. When the product leaves the factory, the FPGA chip is used to adjust the resistance value of the column drive transistor base adjustable resistor chip to control the current of the blue LED sub-pixel, and thus control the brightness of the blue LED sub-pixel. Then, based on the blue LED light attenuation law, within a certain base resistance range, the FPGA chip is used to periodically lower the resistance value of the column drive transistor base adjustable resistor chip to increase the current of the blue LED sub-pixel, and thus increase the brightness of the blue LED sub-pixel.

[0107] This technical solution is a white balance compensation system for LED displays. Its detailed working principle is as follows:

[0108] 1) General Drive Subsystem: The system first generates a reference clock signal using a crystal oscillator. This clock signal is then divided into three synchronized clock signals within the FPGA using a frequency divider module. These signals are used to control the red, green, and blue LED display drive subsystems. Furthermore, a timer module records the total operating time of the display, monitoring its usage and enabling aging compensation. An EEPROM is used to store system parameters and operating time data to ensure data is not lost in the event of a power outage.

[0109] 2) Red, green, and blue LED display driver subsystems: Each color LED display driver subsystem includes a hardware module, a row scan module, and a column selection module.

[0110] The hardware module includes row driver and column driver, which are the hardware that actually drives the LED display elements to light up. The column driver uses an adjustable resistor chip as the base resistor.

[0111] The line scanning module is used for line-by-line scanning of red, green and blue LED displays.

[0112] The column gating module, when shipped, uses an FPGA chip to adjust the resistance of the column driver transistor base adjustable resistor chip to control the current in each red, green, and blue sub-pixel, thereby controlling the sub-pixel brightness. This first achieves brightness uniformity within the red, green, and blue sub-pixels, ultimately achieving white balance for the red, green, and blue colors. Then, based on the red, green, and blue light decay patterns, the FPGA chip periodically lowers the resistance of the column driver transistor base adjustable resistor chip within a certain range to increase the current in each red, green, and blue sub-pixel, thereby increasing the sub-pixel brightness. This first achieves brightness uniformity within the red, green, and blue sub-pixels, ultimately achieving white balance for the red, green, and blue colors. This white balance is achieved while also compensating for brightness loss due to light decay in the later stages of LED display operation.

[0113] 3) White balance compensation: Because LED luminescent materials experience brightness drop and white balance shift after prolonged operation, the system needs to adjust the drive current of each sub-pixel to maintain white balance. The FPGA dynamically adjusts the drive current of each sub-pixel based on the recorded total operating time and a preset aging curve (row scan and column strobe times remain unchanged; only the drive current itself is changed). This compensates for brightness drop and white balance shift caused by aging, maintaining accurate and consistent color on the display panel.

[0114] 4) Dynamic adjustment: Due to the high flexibility and fast processing capabilities of FPGA, the system can monitor the display status in real time and quickly adjust the parameters of each driver module as needed to respond to different display content and environmental changes to maintain the best display effect.

[0115] The driving system provided by the embodiment of the present invention effectively achieves timely compensation of the white balance of the LED display screen through clock management and a method of accurately adjusting the resistance value of the adjustable resistor chip at the base of the column driving transistor. At the same time, it provides a stable solution that can adapt to long-term use changes and maintenance and is easy to upgrade.

[0116] The above description is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications, equivalent substitutions and improvements made by any technician familiar with this technical field within the technical scope disclosed by the present invention and within the spirit and principles of the present invention should be covered by the scope of protection of the present invention.

Claims

1. A method for white balance compensation of an LED display screen, characterized in that, It includes the following steps: Step 1, use an FPGA chip to drive an M-row and N-column full-color LED display, with a crystal oscillator frequency of F co ; Step 2: The crystal oscillator is divided by W through the FPGA chip to obtain three synchronous clocks T clk = , respectively control the red LED display driving subsystem, the green LED display driving subsystem, and the blue LED display driving subsystem; Step 3, start a timer in the driving system. When the device loses power, it notifies the FPGA, and the FPGA writes the current count to the EEPROM. When initializing during the next power-on, the count register continues to accumulate based on the EEPROM; Step 4: Before the FPGA chip leaves the factory, adjust the resistance value of the column selection base adjustable resistor once through the I2C bus to adjust the column drive current , make the LED display reach white balance; Step five, adjust every other column strobe base adjustable resistor adjustment period T run , the FPGA chip adjusts the resistance value of the column strobe base adjustable resistor through the I2C bus once to adjust the column drive current , make the LED display reach white balance again.

2. The white balance compensation method for an LED display screen according to claim 1, characterized in that, In Step 1, each color pixel contains one red, green, and blue sub-pixel. The entire driving system is divided into a general driving subsystem, a red LED display driving subsystem, a green LED display driving subsystem, and a blue LED display driving subsystem. The scanning time for each row of the red, green, and blue driving subsystems is BT clk , and the column strobe time corresponding to the lighting of any pixel is also BT clk .

3. The white balance compensation method for an LED display screen according to claim 1, characterized in that The frame period is T = Mt row , , the selected parameters need to satisfy f r = f g = f b > 50Hz.

4. The white balance compensation method for an LED display screen according to claim 1, wherein Column drive current , where β 放大 is the amplification factor of the collector of the column drive triode, I R_col is the base current of the column drive triode, U col is the base voltage of the column drive triode, U be is the base-emitter voltage of the column drive triode, R col is the adjustable resistor at the base of the column drive triode.

5. The white balance compensation method for an LED display screen according to claim 1, wherein Using R(j) r_col 出厂 , R(j) g_col 出厂 and R(j) b_col 出厂 (j = 1, 2, 3, …, N) respectively represent the resistance values of the base adjustable resistors in the j-th column of the red LED display driving subsystem, green LED display driving subsystem, and blue LED display driving subsystem when the product leaves the factory. This resistance value enables the red LED display driving subsystem, green LED display driving subsystem, and blue LED display driving subsystem to satisfy the relative brightness ratio L r 出厂 : L g 出厂 : L b 出厂 = 1.0000: 4.5907: 0.0601, meeting the white balance requirement when the LED display leaves the factory.

6. The white balance compensation method for an LED display screen according to claim 1, wherein, R(j) r_col_min 、R(j) g_col_min and R(j) b_col_min (j = 1, 2, 3, …, N) is the minimum value of the base adjustable resistor in the j-th column that enables the red LED display driving subsystem, the green LED display driving subsystem, and the blue LED display driving subsystem to satisfy the relative brightness ratio of 1.0000:4.5907:0.0601 when the red, green, and blue sub-pixels within each pixel are normally lit, and is also the minimum value of the base adjustable resistor in the j-th column of the red, green, and blue sub-pixels within each pixel where the base adjustable resistor in this column and the brightness satisfy an inverse proportional relationship.

7. The white balance compensation method for an LED display screen according to claim 1, wherein, When the working duration is nT run (n = 1, 2, 3,... n max )(n max determined by the lifespan of the display), the resistance value of the base adjustable resistor is R(j) r_col 出厂 、R(j) g_col 出厂 and R(j) b_col 出厂 (j = 1, 2, 3,…, N), when the red, green, and blue LED sub-pixels are normally lit, the relative luminances are L r_nTrun_R 出厂 = α nTrun L r 出厂 ,L g_nTrun_R 出厂 = β nTrun L g 出厂 , L b_nTrun_R 出厂 = γ nTrun L b 出厂 ,β nTrun ﹥α nTrun ﹥γ nTrun , where α nTrun 、β nTrun and γ nTrun are the luminance attenuation coefficients corresponding to the working time.

8. The white balance compensation method for an LED display screen according to claim 1, wherein When the working duration is nT run (n = 1, 2, 3,... n max )(n max determined by the lifespan of the display), the FPGA chip adjusts the resistance value of the base adjustable resistor, and satisfies R(j)r_col_nTrun = α nTrun R(j) r_col 出厂 R(j) r_col_min 、R(j)g_col_nTrun = β nTrun R(j) g_col 出厂 R(j) g_col_min and R(j)b_col_nTrun = R(j) b_col 出厂 γ nTrun R(j) b_col_min (j = 1, 2, 3,…, N), and when the red, green, and blue LED sub-pixels are normally lit, the relative brightnesses are L r_nTrun = L r_nTrun_R 出厂 = α nTrun L r 出厂 =L r 出厂 ,L g_nTrun = L g_nTrun_R 出厂 = β nTrun L g 出厂 =L g 出厂 ,L b_nTrun = L b_nTrun_R 出厂 = γ nTrun L b 出厂 =L b 出厂 ,then L r_nTrun :L g_nTrun :L b_nTrun =L r 出厂 :L g 出厂 :L b 出厂 ,the LED display automatically adjusts to the white balance state.

9. The white balance compensation method for an LED display screen according to claim 1, wherein When the working duration is nT run (n = 1, 2, 3,... n max )(n max determined by the lifespan of the display), α nTrun R(j) r_col 出厂 R(j) r_col_min , β nTrun R(j) g_col 出厂 R(j) g_col_min and R(j) b_col 出厂 γ nTrun R(j) b_col_min (j = 1, 2, 3,…, N), the FPGA chip adjusts the resistance value of the base adjustable resistor so that the resistance value satisfies R(j)r_col_nTrun = R(j) r_col_min , R(j)g_col_nTrun = R(j) g_col_min and R(j)b_col_nTrun = R(j) b_col_min (j = 1, 2, 3,…, N), and when the red, green, and blue LED sub - pixels are normally lit, the relative luminances are L r_nTrun = L r_nTrun_R 出厂 = α nTrun L r 出厂 L r 出厂 , L g_nTrun = L g_nTrun_R 出厂 = β nTrun L g 出厂 L g 出厂 , L b_nTrun = L b_nTrun_R 出厂 = γ nTrun L b 出厂 L b 出厂 , then the LED display automatically approaches the white - balance state.

10. An LED display white balance compensation system for an LED display white balance compensation method according to any one of claims 1 to 9, characterized in that, This system includes: A general driving subsystem, including a crystal oscillator, a frequency division module, a timer module, and an EEPROM; The frequency division module. The crystal oscillator is frequency-divided by the FPGA chip to obtain 3 synchronous clocks to respectively control the red LED display driving subsystem, the green LED display driving subsystem, and the blue LED display driving subsystem; The timer module is used to record the total working duration of the display, record the current duration when power is off, and continue timing when power is on next time; The red LED display driving subsystem, including a red LED display hardware module, a red LED display line scanning module, and a red LED display column strobe module; The red LED display hardware module includes hardware devices such as row driving devices and column driving devices suitable for red LED display. Among them, an adjustable resistor chip is used as the base resistor in the column driving device; The red LED display line scanning module is used for the progressive scanning of red LED display; The red LED display column strobe module is used to control the strobe of each column of red LED display. When the product leaves the factory, the FPGA chip is used to adjust the resistance value of the base adjustable resistor chip of the column driving triode to control the current of the red LED sub-pixel, thereby controlling the brightness of the red LED sub-pixel; combined with the red LED light decay law, within a certain range of base resistor values, the FPGA chip is used to periodically reduce the resistance value of the base adjustable resistor chip of the column driving triode to increase the current of the red LED sub-pixel, thereby increasing the brightness of the red LED sub-pixel. The green LED display driving subsystem, including a green LED display hardware module, a green LED display line scanning module, and a green LED display column strobe module; The green LED display hardware module includes hardware devices such as row driving devices and column driving devices suitable for green LED display. Among them, an adjustable resistor chip is used as the base resistor in the column driving device; The green LED display line scanning module is used for the progressive scanning of green LED display; The green LED display column strobe module is used to control the strobe of each column of green LED display. When the product leaves the factory, the FPGA chip is used to adjust the resistance value of the base adjustable resistor chip of the column driving triode to control the current of the green LED sub-pixel, thereby controlling the brightness of the green LED sub-pixel; combined with the green LED light decay law, within a certain range of base resistor values, the FPGA chip is used to periodically reduce the resistance value of the base adjustable resistor chip of the column driving triode to increase the current of the green LED sub-pixel, thereby increasing the brightness of the green LED sub-pixel. The blue LED display driving subsystem includes a blue LED display hardware module, a blue LED display line scanning module, and a blue LED display column strobe module; The blue LED display hardware module includes hardware devices such as row driving devices and column driving devices suitable for blue LED displays. Among them, an adjustable resistor chip is used as the base resistor in the column driving device; The blue LED display line scanning module is used for the progressive scanning of blue LED displays; The blue LED display column strobe module is used to control the strobe of each column of blue LED displays. When the product leaves the factory, the method of adjusting the resistance value of the adjustable resistor chip at the base of the column driving triode by using an FPGA chip is used to control the current of the blue LED sub-pixels, and then control the brightness of the blue LED sub-pixels. Combining with the blue LED light decay law, within a certain range of base resistor values, the method of periodically reducing the resistance value of the adjustable resistor chip at the base of the column driving triode by using an FPGA chip is used to increase the current of the blue LED sub-pixels, and then increase the brightness of the blue LED sub-pixels.

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