Display panel and manufacturing method therefor, and display device

Abstract

Provided in the present disclosure are a display panel and a manufacturing method therefor, and a display device. The display panel comprises: a base substrate; a plurality of pixel driving circuits, which are located on one side of the base substrate, wherein each pixel driving circuit comprises a drive transistor; a plurality of light-emitting devices, which are located on the sides of the pixel driving circuits facing away from the base substrate, wherein the light-emitting devices are electrically connected to the corresponding pixel driving circuits; and a plurality of light extraction enhancement structures, which are located between the pixel driving circuits and the light-emitting devices, wherein at least a portion of the orthographic projections of the light extraction enhancement structures on the base substrate covers the orthographic projections of the corresponding light-emitting devices on the base substrate, and the orthographic projections of the light extraction enhancement structures on the base substrate do not overlap the orthographic projections of channel regions of active layers in the driving transistors on the base substrate.

Description

Display panel, manufacturing method thereof, and display device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel, a manufacturing method thereof, and a display device. Background Art

[0002] To enhance the light extraction efficiency of OLED (Organic Light Emitting Diode) products, microlenses are often used to improve the light extraction efficiency of the product. However, while the microlens improves light extraction efficiency, it also causes more light to reach other parts of the OLED product (such as the active layer), thus affecting the performance of the OLED product.

[0003] Summary of the Invention

[0004] The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The specific solutions are as follows:

[0005] The present disclosure provides a display panel comprising:

[0006] substrate;

[0007] A plurality of pixel driving circuits are located on one side of the substrate, wherein the pixel driving circuits include driving transistors;

[0008] a plurality of light-emitting devices, located on a side of the pixel driving circuit away from the base substrate, the light-emitting devices being electrically connected to corresponding pixel driving circuits;

[0009] A plurality of light-extraction enhancement structures are located between the pixel driving circuit and the light-emitting device, wherein the orthographic projection of the light-extraction enhancement structure on the substrate at least partially covers the orthographic projection of the corresponding light-emitting device on the substrate, and the orthographic projection of the light-extraction enhancement structure on the substrate does not overlap with the orthographic projection of the channel region of the active layer in the driving transistor on the substrate.

[0010] In a possible implementation, in the above-mentioned display panel provided in the embodiment of the present disclosure, the distance between adjacent boundaries of the light extraction enhancement structure and the channel region of the active layer in the driving transistor projected onto the base substrate is proportional to the area of ​​the light-emitting device.

[0011] In a possible implementation, the display panel provided in the embodiment of the present disclosure further includes: a passivation layer located between the pixel driving circuit and the light-emitting device, a filter layer located between the passivation layer and the light-emitting device, a planarization layer located between the filter layer and the light-emitting device, a pixel defining layer located on a side of the planarization layer facing away from the base substrate, and a metal trace located between the base substrate and the passivation layer and electrically connected to the pixel driving circuit; wherein,

[0012] The pixel definition layer defines a plurality of sub-pixels, the plurality of light-emitting devices are correspondingly arranged in the plurality of sub-pixels, the filter layer includes a plurality of sub-filter layers correspondingly arranged in the plurality of sub-pixels, the planarization layer includes the light-emitting enhancement structure, and the orthographic projection of the pixel definition layer on the base substrate at least covers the orthographic projection of a partial area of ​​the metal trace on the base substrate.

[0013] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the light extraction enhancement structure includes a plurality of depressions and a plurality of protrusions, and the inclination angle of the protrusions is inversely proportional to the wavelength of the output light corresponding to the sub-pixel.

[0014] In one possible implementation, in the above-mentioned display panel provided in an embodiment of the present disclosure, the inclination angle of the protrusion corresponding to each sub-pixel is 30° to 60°, and the difference in inclination angle of the protrusion corresponding to each two adjacent sub-pixels of different emitted light wavelengths is 5° to 10°.

[0015] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the light extraction enhancement structure includes a plurality of depressions and a plurality of protrusions, and an orthographic projection area of ​​the protrusions on the base substrate is proportional to an area of ​​the sub-filter layer.

[0016] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the orthographic projection shape of the protrusion on the base substrate is a hexagon, a pentagon, or a triangle.

[0017] In a possible implementation, in the display panel provided by the embodiment of the present disclosure, the angle between the central axis of the orthographic projection of the protrusion on the base substrate and the vertical direction is proportional to the wavelength of the output light corresponding to the sub-pixel.

[0018] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the angles corresponding to the sub-pixels are 3° to 18°, and the difference in angles corresponding to each two adjacent sub-pixels with different emitted light wavelengths is 3° to 5°.

[0019] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the light extraction enhancement structure corresponding to at least one of the sub-pixels has a vacant portion on at least one side along the sub-pixel arrangement direction.

[0020] In a possible implementation, in the display panel provided by an embodiment of the present disclosure, the area of ​​the vacant portion is proportional to the area of ​​the sub-filter layer.

[0021] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the light-emitting device includes: an anode located between the planarization layer and the pixel defining layer, a light-emitting layer located on a side of the anode facing away from the base substrate, and a cathode located on a side of the light-emitting layer facing away from the base substrate;

[0022] Each sub-pixel further includes a light-blocking structure disposed between the anode and the light-emitting layer, the light-blocking structure being in contact with the inner wall of the pixel defining layer, and the orthographic projection of the light-blocking structure on the base substrate covering at least part of the orthographic projection of the light-emitting enhancement structure on the base substrate.

[0023] In one possible implementation, in the above-mentioned display panel provided by an embodiment of the present disclosure, the structure where the light-emitting enhancement structure is adjacent to the inner wall of the pixel defining layer is the recess, and the orthographic projection of the light-blocking structure on the base substrate at least covers the orthographic projection of the lowest point of the recess adjacent to the inner wall of the pixel defining layer on the base substrate.

[0024] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the orthographic projection of the light-blocking structure on the base substrate at least covers the orthographic projection of half the width of the metal trace on the base substrate.

[0025] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the light blocking structure and the pixel defining layer are provided in the same layer and with the same material.

[0026] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the material of the pixel defining layer is a black light-absorbing material.

[0027] In a possible implementation, in the display panel provided by an embodiment of the present disclosure, an orthographic projection area of ​​the light-blocking structure on the base substrate is proportional to an area of ​​the sub-filter layer.

[0028] In one possible implementation, in the above-mentioned display panel provided in the embodiment of the present disclosure, an anti-light crosstalk structure is arranged between each adjacent sub-filter layer, and the anti-light crosstalk structure, the light blocking structure and the metal traces have a first overlapping area as a positive projection on the substrate, and the width of the first overlapping area is greater than half the width of the metal traces.

[0029] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the material of the anti-light crosstalk structure is a black matrix.

[0030] In one possible implementation, in the above-mentioned display panel provided in the embodiment of the present disclosure, the anti-light crosstalk structure is a filter structure having a color different from that of the two adjacent sub-filter layers, and the light emitted by the two adjacent sub-filter layers and the light emitted by the anti-light crosstalk structure are mixed into white light.

[0031] In a possible implementation, the display panel provided in the embodiment of the present disclosure further includes an anti-reflection layer located between the metal trace and the passivation layer, and the orthographic projection of the metal trace on the base substrate is located within the orthographic projection range of the anti-reflection layer on the base substrate.

[0032] In one possible implementation, in the above-mentioned display panel provided in an embodiment of the present disclosure, the orthographic projections of the anti-reflection layer, the light-blocking structure and the metal trace on the base substrate have a second overlapping area, and the width of the second overlapping area is greater than half the width of the metal trace.

[0033] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the pixel defining layer has a first groove, and the first groove is filled with a light absorption structure.

[0034] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the depth of the first groove is less than or equal to the height of the pixel defining layer.

[0035] In a possible implementation, in the above-mentioned display panel provided in an embodiment of the present disclosure, the planarization layer has a second groove arranged corresponding to the first groove, the second groove penetrates the planarization layer, and the light absorption structure extends into the second groove and is arranged in contact with the anti-light crosstalk structure.

[0036] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the material of the light absorption structure is black organic resin.

[0037] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the material of the light absorption structure is ferrous metal, and the top of the light absorption structure facing away from the base substrate is electrically connected to the cathode.

[0038] Correspondingly, an embodiment of the present disclosure further provides a display device, comprising the above-mentioned display panel provided by an embodiment of the present disclosure.

[0039] Accordingly, an embodiment of the present disclosure further provides a method for manufacturing a display panel, which is used to manufacture the above-mentioned display panel provided in an embodiment of the present disclosure. The manufacturing method includes:

[0040] A plurality of pixel driving circuits are formed on a base substrate; wherein the pixel driving circuits include driving transistors;

[0041] A plurality of light-extraction enhancement structures are formed on a side of the pixel driving circuit facing away from the base substrate; wherein the orthographic projection of the light-extraction enhancement structure on the base substrate does not overlap with the orthographic projection of the channel region of the active layer in the driving transistor on the base substrate;

[0042] A plurality of light-emitting devices are formed on a side of the light-extraction enhancement structure away from the base substrate; wherein the orthographic projection of the light-extraction enhancement structure on the base substrate at least partially covers the orthographic projection of the corresponding light-emitting device on the base substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] FIG1 is a schematic diagram of a layout of a display panel provided in an embodiment of the present disclosure;

[0044] FIG2 is a schematic diagram of the cross-section integration along the CC', EE', and FF' directions in FIG1 ;

[0045] FIG3 is a schematic diagram of another layout of a display panel provided in an embodiment of the present disclosure;

[0046] FIG4 is a schematic diagram of the structure of a 3T1C pixel driving circuit;

[0047] FIG5 is a schematic diagram of the structure of a 2T1C pixel driving circuit;

[0048] FIG6 is a schematic diagram of the pixel driving circuit structure of 7T1C;

[0049] FIG7 is a schematic diagram illustrating a light-extraction enhancement structure above each sub-filter layer in FIG2 ;

[0050] FIG8 is a schematic diagram showing the orthographic projection areas of protrusions corresponding to sub-pixels of different areas;

[0051] FIG9 is another cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0052] FIG10 is another cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0053] FIG11 is another cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0054] FIG12 is another cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0055] FIG13 is another cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0056] FIG14 is another cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0057] FIG15 is another cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0058] FIG16 is another cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0059] FIG17 is another cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0060] FIG18 is another cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure;

[0061] FIG19 is a schematic flow chart of a method for manufacturing a display panel according to an embodiment of the present disclosure;

[0062] 20A-20D are schematic cross-sectional views of the display panel after each step is performed according to an embodiment of the present disclosure;

[0063] FIG21 is a schematic diagram of a display device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0064] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. And in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0065] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words “include” or “comprise” and the like used in this disclosure mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The words “connect” or “connected” and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. “Inside”, “outside”, “upper”, “lower”, etc. are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0066] It should be noted that the sizes and shapes of the figures in the accompanying drawings, unless otherwise specified, do not reflect the actual scale and are intended only to illustrate the present disclosure. The same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions.

[0067] An embodiment of the present disclosure provides a display panel, as shown in FIG1 and FIG2 . FIG1 is a schematic diagram of a layout of the display panel, and FIG2 is a schematic diagram of a cross-section integration along the CC', EE', and FF' directions in FIG1 . The display panel includes:

[0068] Base substrate 1;

[0069] A plurality of pixel driving circuits 2 are located on one side of the substrate 1, and the pixel driving circuit 2 includes a driving transistor T2;

[0070] A plurality of light-emitting devices 3 are located on a side of the pixel driving circuit 2 away from the substrate 1, and the light-emitting devices 3 are electrically connected to the corresponding pixel driving circuit 2;

[0071] Multiple light-emitting enhancement structures 4 are located between the pixel driving circuit 2 and the light-emitting device 3. The orthographic projection of the light-emitting enhancement structure 4 on the substrate 1 at least partially covers the orthographic projection of the corresponding light-emitting device 3 on the substrate 1, and the orthographic projection of the light-emitting enhancement structure 4 on the substrate 1 does not overlap with the orthographic projection of the transistor included in the pixel driving circuit 2 on the substrate 1. For example, the orthographic projection of the light-emitting enhancement structure 4 on the substrate 1 does not overlap with the orthographic projection of the active layer Act in the driving transistor T2 of the pixel driving circuit 2 (the channel region includes the overlapping area between the gate G2 of the driving transistor T2 and the active layer Act) on the substrate 1.

[0072] The above-mentioned display panel provided by the embodiment of the present disclosure can improve the light extraction rate of the display panel by setting a light extraction enhancement structure whose orthographic projection at least partially covers the light-emitting device; because the channel region of the active layer in the transistor (for example, the driving transistor) is greatly affected by light (for example, the channel region of the oxide-type active layer), the light extraction enhancement structure should be kept as far away from the channel region as possible. The present disclosure sets the orthographic projection of the light extraction enhancement structure on the substrate to not overlap with the orthographic projection of the channel region of the active layer in the transistor (for example, the driving transistor) on the substrate. In this way, while improving the light extraction rate of the product, it can avoid light from irradiating the channel region of the driving transistor, thereby ensuring that the channel region of the driving transistor is not affected by light, thereby improving the performance of the pixel driving circuit.

[0073] Optionally, as shown in FIG1 , the substrate 1 may include a plurality of sub-pixels, such as a red sub-pixel (R), a green sub-pixel (G), a blue sub-pixel (B), and a white sub-pixel (W), but the present invention is not limited thereto. For example, the substrate 1 may include a plurality of sub-pixels, such as a red sub-pixel (R), a green sub-pixel (G), and a blue sub-pixel (B).

[0074] In some embodiments, each sub-pixel generally includes a pixel driving circuit and a light-emitting device, and the pixel driving circuit drives the light-emitting device to emit light.

[0075] In some embodiments, in the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in FIG3 , the distances (D1, D2, D3, D4) between the adjacent boundaries of the light-emitting enhancement structure 4 and the channel region of the active layer Act in the driving transistor T2 projected on the substrate 1 are proportional to the area of ​​the light-emitting device 3. Optionally, for example, the area of ​​the light-emitting device 3 in the red sub-pixel (R), the area of ​​the light-emitting device 3 in the green sub-pixel (G), the area of ​​the light-emitting device 3 in the blue sub-pixel (B), and the area of ​​the light-emitting device 3 in the white sub-pixel (W) decrease in sequence, and the distance between the adjacent boundaries of the light-emitting enhancement structure 4 in the red sub-pixel (R) and the channel region of the active layer Act projected on the substrate 1 is D1, the distance between the adjacent boundaries of the light-emitting enhancement structure 4 in the green sub-pixel (G) and the channel region of the active layer Act projected on the substrate 1 is D2, and the distance between the adjacent boundaries of the light-emitting enhancement structure 4 in the blue sub-pixel (B) and the channel region of the active layer Act projected on the substrate 1 is D3. The distance between the boundaries is D3, and the distance between the adjacent boundaries of the positive projection of the light-emitting enhancement structure 4 in the white sub-pixel (W) and the channel region of the active layer Act on the substrate 1 is D4. In this way, D1>D2>D3>D4, that is, the larger the area of ​​the light-emitting device 3, the farther the light-emitting enhancement structure 4 is from the channel region of the active layer Act. Because the larger the area of ​​the light-emitting device 3, the area of ​​the light-emitting enhancement structure 4 is also relatively larger, and the coverage area of ​​the reflected light is larger. In order to avoid the reflected light affecting the channel region of the active layer Act, the larger the area of ​​the light-emitting device 3, the farther the light-emitting enhancement structure 4 should be from the channel region of the active layer Act to protect the channel region of the active layer Act from the influence of light.

[0076] In some embodiments, as shown in FIG3 , to reduce the complexity of the manufacturing process, the orthographic projection of the light extraction enhancement structure 4 on the base substrate 1 may not overlap with the orthographic projection of the active layer Act of the driving transistor T2 on the base substrate 1. Furthermore, the orthographic projection of the light extraction enhancement structure 4 on the base substrate 1 may not overlap with the orthographic projection of the entire pixel driving circuit 2 on the base substrate 1. This can further prevent light reflected by the light extraction enhancement structure 4 from irradiating the channel region of the active layer Act.

[0077] It should be noted that the embodiment of the present disclosure takes the example of dividing the base substrate 1 into red sub-pixels (R), green sub-pixels (G), blue sub-pixels (B) and white sub-pixels (W). Of course, it can also include only red sub-pixels (R), green sub-pixels (G) and blue sub-pixels (B), and the selection can be made according to display needs.

[0078] It should be noted that the embodiment of the present disclosure takes the areas of the light-emitting device 3 in the red sub-pixel (R), the light-emitting device 3 in the green sub-pixel (G), the light-emitting device 3 in the blue sub-pixel (B), and the light-emitting device 3 in the white sub-pixel (W) as an example, which decreases in sequence. Of course, it is not limited to this, and the area size of the light-emitting device 3 corresponding to each sub-pixel can be designed as needed.

[0079] In some embodiments, in the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in FIG2 , it further includes: a passivation layer 5 located between the pixel driving circuit 2 and the light-emitting device 3, a filter layer 6 located between the passivation layer 5 and the light-emitting device 3, a planarization layer 7 located between the filter layer 6 and the light-emitting device 3, a pixel defining layer 8 located on the side of the planarization layer 7 away from the base substrate 1, and a metal trace 9 located between the base substrate 1 and the passivation layer 5 and electrically connected to the pixel driving circuit 2 (for example, including a gate line G, a data signal line D, a fixed-level signal line (for example, a high-voltage line VDD), a fixed-level signal connection line V0, a ​​sensing line SL, a sensing signal connection line SL0, etc.); for example: the pixel driving circuits 2 corresponding to multiple sub-pixels (R, G, B, W) are connected to the fixed-level signal line (for example, the high-voltage line VDD) through the same fixed-level signal connection line V0; the pixel driving circuits 2 corresponding to multiple sub-pixels (R, G, B, W) are connected to the sensing line SL through the same sensing signal connection line SL0; wherein,

[0080] The pixel defining layer 8 defines a plurality of sub-pixels (R, G, B, W), a plurality of light-emitting devices 3 are correspondingly arranged in the plurality of sub-pixels (R, G, B, W), the filter layer 6 includes a plurality of sub-filter layers (61, 62, 63 and 64) correspondingly arranged in the plurality of sub-pixels (R, G, B, W), the planarization layer 7 includes a light-emitting enhancement structure 4 (that is, the light-emitting enhancement structure 4 is made using the planarization layer 7, which can reduce costs and does not increase the thickness of the display panel), and the orthographic projection of the pixel defining layer 8 on the base substrate 1 at least covers the orthographic projection of a portion of the metal trace 9 on the base substrate 1. In this way, the metal trace 9 is arranged below the pixel defining layer 8, which can avoid the metal trace 9 occupying the sub-pixel space, thereby improving the pixel aperture ratio.

[0081] In the embodiment of the present disclosure, the display panel may specifically be an OLED display panel adopting a bottom emission structure.

[0082] In some embodiments, as shown in FIG3 , the width of the fixed-level signal line (e.g., the high-voltage line VDD) is generally greater than the width of the data signal line (e.g., data). The overlapping area between the light-emitting enhancement structure 4 and the fixed-level signal line (e.g., the high-voltage line VDD) is greater than the overlapping area between the light-emitting enhancement structure 4 and the data signal line (e.g., data). This design is beneficial for improving the utilization of light in the edge area of ​​the sub-pixel.

[0083] In the disclosed embodiment, the multiple sub-filter layers (61, 62, 63, and 64) may include a red sub-filter layer 61, a green sub-filter layer 62, a blue sub-filter layer 63, and a white sub-filter layer 64, with the multiple sub-filter layers spaced apart from each other. It will be appreciated that the red sub-filter layer 61, the green sub-filter layer 62, the blue sub-filter layer 63, and the white sub-filter layer 64 are configured to allow red light, green light, blue light, and white light to pass through, respectively, to form the three primary colors displayed by the display panel. Of course, the white sub-filter layer 64 may be left untouched or provided with a transparent resin layer to increase light transmittance.

[0084] In the embodiment of the present disclosure, as shown in Figures 1 to 3, the pixel driving circuit 2 can adopt a structure including three transistors and one capacitor (3T1C). The equivalent circuit structure of 3T1C is shown in Figure 4. Optionally, the pixel driving circuit can also adopt various other structures. For example, the pixel driving circuit can be a structure including two transistors and one capacitor (2T1C), as shown in Figure 5, where T1 is a driving transistor; or the pixel driving circuit can be a structure including seven transistors and one capacitor (7T1C), as shown in Figure 6, where T3 is a driving transistor; and so on. The pixel driving circuit generally includes a driving thin film transistor, the remaining switching thin film transistors, and a storage capacitor.

[0085] As shown in Figures 1 to 4, the pixel driving circuit 2 includes a switching transistor T1, a driving transistor T2, a sensing transistor T3 and a capacitor C. The gate G1 of the switching transistor T1 is electrically connected to the gate line G, the first electrode S1 of the switching transistor is electrically connected to the data signal line D, the second electrode D1 of the switching transistor T1 is electrically connected to the gate G2 of the driving transistor T2, the first electrode S2 of the driving transistor T2 is electrically connected to the high voltage line VDD (for example, the first electrode S2 of the driving transistor T2 is electrically connected to the high voltage line VDD through the fixed level signal connection line V0), the second electrode D2 of the driving transistor T2 is electrically connected to the anode of the light-emitting device 3, the gate of the sensing transistor T3 is electrically connected to the gate line G, the first electrode of the sensing transistor T3 is electrically connected to the sensing line SL (for example, the first electrode of the sensing transistor T3 is electrically connected to the sensing line SL through the sensing signal connection line SL0), the second electrode of the sensing transistor T3 is electrically connected to the anode of the light-emitting device 3, the cathode of the light-emitting device 3 is electrically connected to the low voltage line VSS, one end of the capacitor C is electrically connected to the gate of the driving transistor T2, and the other end of the capacitor C is electrically connected to the anode of the light-emitting device 3.

[0086] In some embodiments, as shown in FIG2 , the light-emitting device 3 includes: an anode 31 located between a planarization layer 7 and a pixel defining layer 8; a light-emitting layer 32 located on a side of the anode 31 facing away from the substrate 1; and a cathode 33 located on a side of the light-emitting layer 32 facing away from the substrate 1. Specifically, holes from the anode 31 and electrons from the cathode 33 are injected into the light-emitting layer 32 to recombine and emit light.

[0087] In some embodiments, as shown in Figures 1 and 2, in at least one sub-pixel, the display panel further includes: a light shielding layer LS located between the base substrate 1 and the active layer Act, a buffer layer 10 located between the light shielding layer LS and the active layer Act, a gate insulating layer 20 located between the active layer Act and the gate electrode, an interlayer insulating layer 30 located between the gate electrode and the source and drain electrodes, and an encapsulation layer 40 located on the side of the cathode 33 facing away from the base substrate 1. The encapsulation layer 40 may be a thin film encapsulation layer. For example, the encapsulation layer 40 may include a first inorganic layer, an organic layer, and a second inorganic layer stacked in layers. The encapsulation layer 40 is used to encapsulate the light-emitting device 3 to prevent external water vapor from corroding the light-emitting device 3. Of course, other encapsulation methods may also be used, such as surface encapsulation.

[0088] In some embodiments, as shown in Figures 1 and 2, the anode 31 of the light-emitting device 3 at least partially overlaps with the corresponding light-shielding layer LS and the channel region of the active layer of the corresponding driving transistor T2, while the sub-filter layer of the sub-pixel does not overlap with the corresponding light-shielding layer LS. The area of ​​the anode 31 of the light-emitting device 3 can be larger than the area of ​​the corresponding sub-filter layer.

[0089] It should be noted that the principle of the pixel driving circuit shown in FIG4 driving the light emitting device 3 to emit light may be the same as that in the prior art and will not be described in detail here.

[0090] In some embodiments, in the above-mentioned display panel provided by the embodiments of the present disclosure, as shown in Figures 2 and 7, Figure 7 separately illustrates the light extraction enhancement structure 4 above each sub-filter layer (61, 62 and 63) in Figure 2. The light extraction enhancement structure 4 may include multiple recesses 41 and multiple protrusions 42. Since different light extraction enhancement structures 4 have different convergence effects on light of different wavelengths, in order to improve the light mixing effect, the inclination angle of the protrusion 42 in the light extraction enhancement structure 4 can be set to achieve better light extraction efficiency and better light mixing effect. For example, the inclination angle of the protrusion 42 is inversely proportional to the wavelength of the output light corresponding to the sub-pixel. Specifically, the wavelength of the emitted light of the red sub-pixel (R) is greater than the wavelength of the emitted light of the green sub-pixel (G), and the wavelength of the emitted light of the green sub-pixel (G) is greater than the wavelength of the emitted light of the blue sub-pixel (B). Therefore, the relationship between the inclination angle θ1 of the light emission enhancement structure 4 corresponding to the red sub-pixel (R), the inclination angle θ2 of the light emission enhancement structure 4 corresponding to the green sub-pixel (G), and the inclination angle θ3 of the light emission enhancement structure 4 corresponding to the blue sub-pixel (B) is: θ1<θ2<θ3.

[0091] Optionally, as shown in Figure 7, the inclination angle θ1 of the protrusion 42 corresponding to the red sub-pixel (R) can be 30°~60°, the inclination angle θ2 of the protrusion 42 corresponding to the green sub-pixel (G) can be 30°~60°, and the inclination angle θ3 of the protrusion 42 corresponding to the blue sub-pixel (B) can be 30°~60°.

[0092] Optionally, as shown in FIG7 , the difference in the tilt angles of the protrusions corresponding to each two adjacent sub-pixels of different emitting light wavelengths can be 5° to 10°, which is conducive to light convergence. For example, the difference between the tilt angle θ1 of the light-emitting enhancement structure 4 corresponding to the red sub-pixel (R) and the tilt angle θ2 of the light-emitting enhancement structure 4 corresponding to the green sub-pixel (G) is 5° to 10°, and the difference between the tilt angle θ2 of the light-emitting enhancement structure 4 corresponding to the green sub-pixel (G) and the tilt angle θ3 of the light-emitting enhancement structure 4 corresponding to the blue sub-pixel (B) is 5° to 10°. Optionally, the difference between θ1 and θ2 and the difference between θ2 and θ3 can be the same or different.

[0093] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in FIG2 and FIG8 , the light extraction enhancement structure 4 includes a plurality of recesses 41 and a plurality of protrusions 42. To improve the light focusing effect of the light extraction enhancement structure 4, the orthographic projection area of ​​the protrusions 42 on the base substrate 1 can be proportional to the area of ​​the sub-filter layer. Optionally, for example, the area of ​​the red sub-filter layer 61, the area of ​​the green sub-filter layer 62, and the area of ​​the blue sub-filter layer 63 decrease in sequence. The orthographic projection area of ​​the protrusion 42 corresponding to the red sub-pixel (R) on the base substrate 1 is S11, the orthographic projection area of ​​the protrusion 42 corresponding to the green sub-pixel (G) on the base substrate 1 is S12, and the orthographic projection area of ​​the protrusion 42 corresponding to the blue sub-pixel (B) on the base substrate 1 is S13. In this way, S11>S12>S13, that is, the larger the area of ​​the sub-filter layer, the larger the orthographic projection area of ​​the protrusion 42 on the base substrate 1.

[0094] Optionally, as shown in FIG8 , the orthographic projection shape of the protrusion 42 on the base substrate 1 is a hexagon; of course, the orthographic projection shape of the protrusion 42 on the base substrate 1 may also be a pentagon or a triangle, which is not limited in the present disclosure.

[0095] In some embodiments, to ensure uniform light leakage between the edges of adjacent sub-pixels and improve uniformity, in the display panel provided in the embodiments of the present disclosure, as shown in FIG1 , the light extraction enhancement structure 4 may be designed with an inclination, such that the angle between the central axis L1 of the projection of the protrusion 42 on the substrate 1 and the vertical direction (e.g., the column direction) is proportional to the wavelength of the emitted light corresponding to the sub-pixel. Specifically, for example, the angle between the central axis L1 of the projection of the protrusion 42 corresponding to the red sub-pixel (R) on the substrate 1 and the vertical direction is β1, the angle between the central axis L2 of the projection of the protrusion 42 corresponding to the green sub-pixel (G) on the substrate 1 and the vertical direction is β2, the angle between the central axis L3 of the projection of the protrusion 42 corresponding to the blue sub-pixel (B) on the substrate 1 and the vertical direction is β3, and the angle between the central axis L4 of the projection of the protrusion 42 corresponding to the white sub-pixel (W) on the substrate 1 and the vertical direction is β4, so β1>β2>β3>β4.

[0096] Optionally, as shown in Figure 1, the angle β1 corresponding to the red sub-pixel (R) can be 3°~18, the angle β2 corresponding to the green sub-pixel (G) can be 3°~18, the angle β3 corresponding to the blue sub-pixel (B) can be 3°~18, and the angle β4 corresponding to the white sub-pixel (W) can be 3°~18.

[0097] Optionally, as shown in FIG1 , the difference in angles corresponding to each two adjacent sub-pixels of different emitted light wavelengths may be 3° to 5°. For example, the difference between the angle β1 corresponding to the red sub-pixel (R) and the angle β2 corresponding to the green sub-pixel (G) is 3° to 5°, the difference between the angle β2 corresponding to the green sub-pixel (G) and the angle β3 corresponding to the blue sub-pixel (B) is 3° to 5°, and the difference between the angle β3 corresponding to the blue sub-pixel (B) and the angle β4 corresponding to the white sub-pixel (W) is 3° to 5°.

[0098] Optionally, the difference between β1 and β2, the difference between β2 and β3, and the difference between β3 and β4 may be the same or different.

[0099] It is understood that the light extraction enhancement structure provided in the embodiments of the present disclosure can be a micro-nano optical element, for example, composed of many tiny prisms or lenses, typically arranged in a regular array. These prisms or lenses can focus or disperse light, thereby achieving light control and regulation to improve the light extraction efficiency of OLED display products.

[0100] Optionally, the light extraction enhancement structure provided in the embodiment of the present disclosure may be a micro lens array made of a planarization layer. Optionally, the micro lens array may be formed by an exposure and development process or a dry etching process.

[0101] It can be understood that exposure and development is a photolithography process. The basic principle of this process is to cover the surface of a photosensitive material with a photomask, and then expose the photomask to ultraviolet light or visible light so that the pattern on the photomask is projected onto the surface of the photosensitive material, forming an exposed area and an unexposed area of ​​the pattern. Afterwards, the photosensitive material is developed so that the photosensitive material in the unexposed area is dissolved, while the photosensitive material in the exposed area is retained to form the desired microlens array. The dry etching process is a micro-nano processing process. The basic principle of this process is to use a high-energy ion beam or plasma to process the surface of the material to form the desired pattern or structure. The embodiment of the present disclosure can specifically use a physical dry etching process or a chemical dry etching process to form a microlens array.

[0102] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in Figures 1 and 3 , at least one side of the light-extraction enhancement structure 4 corresponding to at least one sub-pixel along the sub-pixel arrangement direction (e.g., the row direction) has a vacant portion 401. The design of the vacant portion 401 can, on the one hand, be used to create an alignment mark for the light-extraction enhancement structure 4 and identify the alignment of the light-extraction enhancement structure 4; on the other hand, it can also be used to compare the tilt angles of the light-extraction enhancement structures 4 corresponding to different sub-pixels.

[0103] Optionally, as shown in FIG1-3 , the area of ​​the vacant portion 401 is proportional to the area of ​​the sub-filter layer. That is, the larger the area of ​​the sub-filter layer, the larger the area of ​​the vacant portion 401. For example, the area of ​​the red sub-filter layer 61 is greater than the area of ​​the green sub-filter layer 62, and the area of ​​the blue sub-filter layer 63. Thus, the area of ​​the vacant portion 401 corresponding to the red sub-pixel (R) is greater than the area of ​​the vacant portion 401 corresponding to the green sub-pixel (G), and the area of ​​the vacant portion 401 corresponding to the blue sub-pixel (B).

[0104] Optionally, the vacant portion 401 can accommodate 4-10 hexagons.

[0105] Optionally, as shown in Figures 1 and 3, the vacant portions 401 corresponding to the sub-pixels may not be on the same horizontal line. This design facilitates independent alignment of sub-pixels of different colors.

[0106] In some embodiments, a portion of the light emitted by the light-emitting device or the ambient light will be incident on the surface of the metal wiring after being reflected by the microlens, and will be reflected again by the metal wiring to other adjacent sub-pixels, thereby causing light leakage, resulting in color crosstalk or crosstalk between adjacent sub-pixels. In order to improve the light leakage phenomenon of the display panel, in the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in Figure 9, each sub-pixel also includes a light-blocking structure 50 arranged between the anode 31 and the light-emitting layer 32. The light-blocking structure 50 is arranged in contact with the inner wall of the pixel defining layer 8, and the orthographic projection of the light-blocking structure 50 on the base substrate 1 covers at least part of the orthographic projection of the light-emitting enhancement structure 4 on the base substrate 1. The present disclosure adds a light-blocking structure 50 covering at least part of the light-emitting enhancement structure at the corresponding position of the metal wiring 9 of the adjacent sub-pixel, so that the light-blocking structure 50 is located on the path of light reflected by the light-emitting enhancement structure 4 close to other sub-pixels, thereby blocking the light from being emitted to the metal wiring below, and thus preventing it from being reflected to other sub-pixels, thereby avoiding light crosstalk between adjacent sub-pixels and thus avoiding the phenomenon of light leakage in the display panel. For example, after the light emitted by the light-emitting device 3 of the red sub-pixel (R) is scattered by the light-emitting enhancement structure 4, a portion of the light directly enters the red photon filter layer 61 arranged opposite, and then emits light of the corresponding color after being filtered by the red photon filter layer 61. Another portion of the light easily enters other sub-filter layers (such as the green photon filter layer 62) adjacent to the red photon filter layer 61 or is incident on the metal trace 9 and then reflected to the adjacent green photon filter layer 62. The light-blocking structure 50 provided in the present disclosure can block the aforementioned other portion of light from entering the adjacent green photon filter layer 62, thereby avoiding crosstalk between adjacent sub-pixels.

[0107] In some embodiments, as shown in Figures 1 and 3, the light extraction enhancement structure 4 and the fixed-level signal connection line V0 near the driving transistor T2 do not overlap, so as to reduce the light reflected from the fixed-level signal connection line V0 to the area where the driving transistor is located. Optionally, the distance between the light extraction enhancement structure 4 and the fixed-level signal connection line V0 can be proportional to the area of ​​the corresponding light-emitting device 3. Because the larger the area of ​​the light-emitting device 3, the larger the area of ​​the light extraction enhancement structure 4, the larger the coverage area of ​​the reflected light. In order to prevent the reflected light from affecting the channel region of the active layer Act, the larger the area of ​​the light-emitting device 3, the farther the light extraction enhancement structure 4 should be from the fixed-level signal connection line V0 to protect the channel region of the active layer Act from being affected by light.

[0108] In some embodiments, in the above-mentioned display panel provided by the embodiments of the present disclosure, as shown in FIG9 , the structure adjacent to the inner wall of the pixel defining layer 8 of the light-emitting enhancement structure 4 is a recess 41, and the orthographic projection of the light-blocking structure 50 on the base substrate 1 at least covers the orthographic projection of the lowest point of the recess 41 adjacent to the inner wall of the pixel defining layer 8 on the base substrate 1. Specifically, for example, after the ambient light a passes through the protrusion 42, its reflected light b must at least exceed the lowest point O of the recess 41 before it can enter other adjacent sub-pixels. Therefore, it is ideal that the light-blocking structure 50 should cover point O, that is, one end of the light-blocking structure 50 is arranged in contact with the interior of the pixel defining layer 8, and the other end extends at least to the lowest point O of the recess 41 adjacent to the inner wall of the pixel defining layer 8.

[0109] Optionally, as shown in FIG9 , the orthographic projection of the light-blocking structure 50 on the base substrate 1 can cover the orthographic projections of a recess 41 and a protrusion 42 adjacent to the inner wall of the pixel-defining layer 8 on the base substrate 1. This can further block the light reflected by the light-extraction enhancement structure 4 and avoid crosstalk between adjacent sub-pixels.

[0110] In some embodiments, to block light reflected from metal traces and entering adjacent sub-pixels, in the display panel provided in the embodiments of the present disclosure, as shown in FIG9 , the pixel defining layer 8 overlaps with both metal traces 9, and the orthographic projection of the light-blocking structure 50 on the base substrate 1 covers at least half the orthographic projection of the width of the metal traces 9 on the base substrate 1. This can block light reflected from most areas of the metal traces 9 and reaching adjacent sub-pixels.

[0111] Optionally, the orthographic projection of the light-blocking structure 50 on the base substrate 1 may cover the orthographic projection of the entire metal trace 9 on the base substrate 1 , thereby blocking more light.

[0112] Optionally, as shown in Figure 9, the length L of the light-blocking structure 50 satisfies: L≥h / CosB, where L is the length of the light-blocking structure 50 extending from the pixel defining layer 8 toward the light-emitting enhancement structure 4, for example: L is the length of the light-blocking structure 50 extending toward the light-emitting enhancement structure 4 from the point where the light-blocking structure 50 contacts the anode 31; the angle B is the angle formed by the line L1 connecting the highest point of the protrusion 42 and the lowest point O of the recess 41 close to the light-blocking structure 50, and the perpendicular line L2 (perpendicular to the substrate) to the highest point of the protrusion 42; h is the height from the highest point of the protrusion 42 to the horizontal line (parallel to the substrate) where the lowest point O of the recess 41 is located.

[0113] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in FIG9 , the light-blocking structure 50 and the pixel-defining layer 8 can be provided in the same layer and made of the same material. This can simplify the manufacturing process. For example, a black light-absorbing material can be used to make the pixel-defining layer 8 and the light-blocking structure 50 to ensure that the reflected light from the light-extraction enhancement structure 4 is absorbed as much as possible.

[0114] In some embodiments, in the above-mentioned display panel provided in the embodiments of the present disclosure, as shown in Figure 9, the thickness of the light-blocking structure 50 is smaller than the thickness of the pixel defining layer 8. For example, the thickness of the light-blocking structure 50 is 1 / 5 to 1 / 100 of the thickness of the pixel defining layer 8. If the thickness of the light-blocking structure 50 is too large, it is easy to cause the distance between the anode 31 and the light-emitting layer 32 to be too large, resulting in poor contact between the anode 31 and the light-emitting layer 32, thereby affecting the light-emitting effect of the light-emitting layer 32; and it is also easy to cause breakage when depositing the light-emitting layer 32.

[0115] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in FIG9 , the shapes of the anode 31, light-emitting layer 32, and cathode 33 are consistent with the shape of the light-extraction enhancement structure 4 (i.e., they are arranged in a conformal manner). This simplifies the manufacturing process and facilitates light emission from the light-extraction enhancement structure 4. The light-emitting layers 32 of adjacent sub-pixels can be connected or disconnected, and the cathodes 33 of adjacent sub-pixels can be integrated into a single, full-surface arrangement.

[0116] In some embodiments, the larger the area of ​​the sub-filter layer, the more light is emitted, and the larger the area of ​​the area with reflected light. To ensure that the reflected light corresponding to the sub-filter layers of different areas is blocked, in the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in Figure 10, the orthographic projection area of ​​the light-blocking structure 50 on the base substrate 1 can be proportional to the area of ​​the sub-filter layer (61, 62, 63). That is, the larger the area of ​​the sub-filter layer corresponding to the sub-pixel, the larger the orthographic projection area of ​​the corresponding light-blocking structure 50. For example, the area of ​​the red sub-filter layer 61 is greater than the area of ​​the green sub-filter layer 62, and the area of ​​the blue sub-filter layer 63. In this way, the area of ​​the light-blocking structure 50 corresponding to the red sub-filter layer 61 is greater than the area of ​​the light-blocking structure 50 corresponding to the green sub-filter layer 62, and the area of ​​the light-blocking structure 50 corresponding to the blue sub-filter layer 63. It can be understood that in some embodiments, the area of ​​the sub-filter layer can be regarded as the light-emitting area of ​​the light-emitting device of the corresponding sub-pixel.

[0117] In some embodiments, as shown in Figure 10, the overlapping area between the light-blocking structure 50 and the metal trace 9 corresponding to the red photon filter layer 61 is larger than the overlapping area between the light-blocking structure 50 and the metal trace 9 corresponding to the green photon filter layer 62. Such a design can ensure that the light-blocking structure 50 can block possible light leakage from the sub-filter layer with a larger area as much as possible.

[0118] In some embodiments, as shown in Figure 10, at least one recessed structure 82 can be formed on the upper surface of the pixel defining layer 8 (for example, the height of the recessed structure 82 is 1 / 10 to 1 / 30 of the height of the pixel defining layer 8), so that the light-emitting layer 32 and / or the cathode 33 form a concave-convex structure above the pixel defining layer 8. However, the amplitude of the concave-convex structure here (the height difference between the highest point of the convex structure and the lowest point of the recessed structure) is smaller than the amplitude of the light-emitting enhancement structure 4 in the effective light-emitting area (for example, the corresponding area of ​​the sub-filter layer) (that is, the height difference between the highest point of the protrusion 42 and the lowest point of the recess 41). On the one hand, such a design makes the surface morphology of the cathode 33 basically consistent, which is convenient for the subsequent process yield; on the other hand, it can ensure that the reflectivity of each part of the surface of the cathode 33 is basically consistent.

[0119] It should be noted that FIG. 10 only schematically illustrates that the area of ​​the light-blocking structure 50 corresponding to the red photon filter layer 61 is larger than the area of ​​the light-blocking structure 50 corresponding to the green photon filter layer 62 .

[0120] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in Figures 9 and 10 , a light crosstalk prevention structure 60 is provided between adjacent sub-filter layers (e.g., 61 and 62). The orthographic projections of the light crosstalk prevention structure 60, the light-blocking structure 50, and the metal trace 9 on the base substrate 1 have a first overlapping area AA. The width of the first overlapping area AA is greater than half the width of the metal trace 9. This can further absorb light that may be reflected by the metal trace 9 from adjacent sub-pixels.

[0121] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in Figures 9 and 10, the material of the light crosstalk prevention structure 60 can be a black matrix. For example, the black matrix can be made of a black organic material, such as chromium (Cr), chromium oxide (CrOx), black resin, or graphene.

[0122] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in Figures 11 and 12 , the anti-light crosstalk structure 60 can be a filter structure (e.g., a blue light filter structure) having a different color than the two adjacent sub-filter layers (e.g., the red sub-filter layer 61 and the green sub-filter layer 62). Light emitted from the two adjacent sub-filter layers (e.g., the red sub-filter layer 61 and the green sub-filter layer 62) and light (blue light) emitted from the anti-light crosstalk structure 60 are mixed to form white light. For example, a portion of light from a red sub-pixel (R) is mixed to form green light after passing through the anti-light crosstalk structure 60 (blue light filter structure). This green light does not experience light crosstalk when it enters the adjacent green sub-filter layer 62. Optionally, the anti-light crosstalk structure 60 between the red photon filter layer 61 and the green photon filter layer 62 can be made of blue light filtering material, the anti-light crosstalk structure 60 between the green photon filter layer 62 and the blue photon filter layer 63 can be made of red light filtering material, and the anti-light crosstalk structure 60 between the red photon filter layer 61 and the blue photon filter layer 63 can be made of green light filtering material.

[0123] In some embodiments, the display panel provided in the embodiments of the present disclosure, as shown in FIG13 and FIG14 , further includes an anti-reflection layer 70 located between the metal trace 9 and the passivation layer 5. The orthographic projection of the metal trace 9 on the base substrate 1 is located within the orthographic projection of the anti-reflection layer 70 on the base substrate 1. For example, the anti-reflection layer 70 may be made of a black organic resin or a black PDL material, which can further absorb light from adjacent sub-pixels that may be reflected by the metal trace 9.

[0124] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in FIG13 and FIG14 , the orthographic projections of the anti-reflection layer 70, the light-blocking structure 50, and the metal trace 9 on the base substrate 1 have a second overlapping area BB, and the width of the second overlapping area BB is greater than half the width of the metal trace 9. This can further absorb light from adjacent sub-pixels that may be reflected by the metal trace 9.

[0125] Optionally, the anti-reflection layers 70 corresponding to the metal traces 9 may be independent of each other, or may be an annular integrated structure.

[0126] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in Figures 15 and 16 , the pixel defining layer 8 has a first groove 81, which is filled with a light absorption structure 80. By forming grooves in the pixel defining layer 8 of adjacent sub-pixels and filling them with the light absorption structure 80, light from adjacent sub-pixels that might be reflected by the metal traces 9 can be further absorbed.

[0127] In some embodiments, in the above-mentioned display panel provided in the embodiment of the present disclosure, as shown in Figures 15 and 16, the depth of the first groove 81 can be less than or equal to the height of the pixel defining layer 8. Figures 15 and 16 of the embodiment of the present disclosure take the example that the depth of the first groove 81 is equal to the height of the pixel defining layer 8.

[0128] In one possible implementation, in the display panel provided by an embodiment of the present disclosure, as shown in Figures 17 and 18 , the planarization layer 7 has a second groove 71 corresponding to the first groove 81. The second groove 71 penetrates the planarization layer 7, and the light absorption structure 80 extends into the second groove 71 and contacts the light crosstalk prevention structure 60. In this way, the light absorption structure 80 can provide a certain degree of support for the display panel and further absorb possible light leakage from adjacent sub-pixels.

[0129] In some embodiments, in the display panel provided by the embodiments of the present disclosure, as shown in FIG. 15 to FIG. 18 , the material of the light absorption structure 80 may be a black organic resin.

[0130] In some embodiments, in the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in Figures 15 to 18, the material of the light absorption structure 80 can be a ferrous metal, and the light absorption structure 80 is electrically connected to the cathode 33 with its top facing away from the base substrate 1, so that the light absorption structure 80 can act as an auxiliary cathode to reduce the resistance of the cathode 33, thereby reducing IR Drop. In some embodiments, in the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in Figures 15 to 18, the orthographic projection of the light absorption structure 80 on the base substrate 1 can be located within the range of the orthographic projection of the interval between adjacent metal traces 9 on the base substrate 1, and the orthographic projection width of the light absorption structure 80 on the base substrate 1 can be slightly smaller than the width of the interval between adjacent metal traces 9. Such a design can avoid the light absorption structure 80 and the metal traces 9 from having overlapping areas, thereby causing unevenness.

[0131] Alternatively, the light-emitting device may be an inorganic light-emitting diode, an organic light-emitting diode (OLED) made of organic materials, a micro light-emitting diode (Micro LED), or a mini light-emitting diode (Mini LED). A micro light-emitting diode refers to an ultra-small inorganic light-emitting element with a size of less than 100 microns that emits light without a backlight or filter.

[0132] Based on the same inventive concept, the present disclosure further provides a method for manufacturing a display panel, which is used to manufacture the display panel provided in the present disclosure. As shown in FIG19 , the manufacturing method may include:

[0133] S1901, forming a plurality of pixel driving circuits on a base substrate; wherein the pixel driving circuits include driving transistors;

[0134] S1902, forming a plurality of light extraction enhancement structures on a side of the pixel driving circuit facing away from the base substrate; wherein the orthographic projections of the light extraction enhancement structures on the base substrate do not overlap with the orthographic projections of the channel regions of the active layers of the driving transistors on the base substrate;

[0135] S1903, forming a plurality of light-emitting devices on a side of the light-extraction enhancement structure facing away from the base substrate; wherein the orthographic projection of the light-extraction enhancement structure on the base substrate at least partially covers the orthographic projection of the corresponding light-emitting devices on the base substrate.

[0136] The following describes in detail the method for manufacturing the display panel provided by the embodiment of the present disclosure, taking the structure shown in FIG. 9 as an example.

[0137] (1) A light shielding layer LS is formed on a base substrate 1, a buffer layer 10 is formed on the light shielding layer LS, and a pixel driving circuit having a 3T1C structure, such as that shown in FIG. 4 , is formed on the buffer layer 10. The formation of the pixel driving circuit specifically includes forming an active layer Act, a gate insulating layer 20, a gate layer (G2, G), an interlayer insulating layer 30, and a source / drain metal layer (S2, D2, metal trace 9); the materials, thicknesses, and manufacturing methods of the above-mentioned film layers can be the same as those in the prior art and are not described in detail herein.

[0138] (2) A passivation layer 5 is formed on the source / drain metal layer, and a patterned light crosstalk prevention structure 60 is formed on the passivation layer 5. For example, the light crosstalk prevention structure 60 may be a ring-shaped structure having a plurality of openings, and sub-filter layers 6 including a red photon filter layer 61, a green photon filter layer 62, a blue photon filter layer 63, and a white photon filter layer 64 are formed in the openings, as shown in FIG20A .

[0139] (3) A deposited resin layer is formed on the sub-filter layer 6, and a light extraction enhancement structure 4 having recesses 41 and protrusions 42 is formed on the surface of the resin layer through an exposure and development process, as shown in FIG20B.

[0140] (4) A patterned anode 31 is formed on the light-emitting enhancement structure 4, and a pixel defining layer 8 and a light-blocking structure 50 that is in contact with the inner wall of the pixel defining layer 8 are formed on the anode 31 through a single patterning process. The pixel defining layer 8 has pixel openings corresponding to the red photon filter layer 61, the green photon filter layer 62, the blue photon filter layer 63, and the white photon filter layer 64, as shown in FIG20C .

[0141] (5) A light-emitting layer 32 is formed in the pixel opening, and a cathode 33 is formed on the light-emitting layer 32, as shown in FIG20D.

[0142] Afterwards, a packaging layer may be formed on the cathode by using a thin film packaging method.

[0143] It should be noted that the manufacturing method of the display panel described in Figures 10 to 18 is basically the same as the manufacturing method shown in Figure 9. The differences lie in the manufacturing area of ​​the light-blocking structure 50 in different sub-pixels, the structure of the anti-light crosstalk structure 60, the structure of the pixel defining layer 8, the addition of the anti-reflection layer 70 and the light-absorbing structure 80, etc. The specific manufacturing steps of Figures 10 to 18 will not be described in detail here.

[0144] Based on the same inventive concept, the present disclosure also provides a display device comprising the display panel described above. The principles of this display device are similar to those of the aforementioned display panel, so the implementation of this display device can refer to the implementation of the aforementioned display panel, and any repetitions will not be repeated here.

[0145] In some embodiments, the display device provided in the embodiments of the present disclosure may be a full-screen display device, or a flexible display device, etc., which is not limited here.

[0146] In some embodiments, the display device provided in the embodiments of the present disclosure may be a full-screen mobile phone as shown in FIG21 . Of course, the display device provided in the embodiments of the present disclosure may also be any product or component with a display function, such as a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, or a navigator. Other essential components of the display device are well understood by those skilled in the art and are not described here in detail, nor should they be construed as limitations of the present disclosure.

[0147] A display panel, a manufacturing method thereof, and a display device provided by an embodiment of the present disclosure improve the light extraction efficiency of the display panel by providing a light extraction enhancement structure whose orthographic projection at least partially covers the light-emitting device. Since the channel region of the active layer in the transistor (for example, the driving transistor) is greatly affected by light (for example, the channel region of the oxide-type active layer), the light extraction enhancement structure should be kept as far away from the channel region as possible. The present disclosure arranges the orthographic projection of the light extraction enhancement structure on the substrate to not overlap with the orthographic projection of the channel region of the active layer in the transistor (for example, the driving transistor) on the substrate. In this way, while improving the light extraction efficiency of the product, it can prevent light from irradiating the channel region of the driving transistor, thereby ensuring that the channel region of the driving transistor is not affected by light and improving the performance of the pixel driving circuit.

[0148] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present disclosure.

[0149] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if such changes and modifications of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is intended to include such changes and modifications.

Claims

1. A display panel, wherein, Comprising: A substrate; A plurality of pixel driving circuits located on one side of the substrate, the pixel driving circuit including a driving transistor; A plurality of light-emitting devices located on the side of the pixel driving circuit away from the substrate, the light-emitting device being electrically connected to the corresponding pixel driving circuit; A plurality of light extraction enhancement structures located between the pixel driving circuit and the light-emitting device, at least a part of the orthographic projection of the light extraction enhancement structure on the substrate covers the orthographic projection of the corresponding light-emitting device on the substrate, and the orthographic projection of the light extraction enhancement structure on the substrate does not overlap with the orthographic projection of the channel region of the active layer in the driving transistor on the substrate.

2. The display panel according to claim 1, wherein, The distance between the adjacent boundary of the orthographic projection of the light extraction enhancement structure and the channel region of the active layer in the driving transistor on the substrate is proportional to the area of the light-emitting device.

3. The display panel according to claim 2, wherein, Further comprising: a passivation layer located between the pixel driving circuit and the light-emitting device, a light filtering layer located between the passivation layer and the light-emitting device, a planarization layer located between the light filtering layer and the light-emitting device, a pixel defining layer located on the side of the planarization layer away from the substrate, and a metal trace located between the substrate and the passivation layer and electrically connected to the pixel driving circuit; wherein, The pixel defining layer defines a plurality of sub-pixels, the plurality of light-emitting devices are correspondingly arranged in the plurality of sub-pixels, the light filtering layer includes a plurality of sub-light filtering layers correspondingly arranged in the plurality of sub-pixels, the planarization layer includes the light extraction enhancement structure, and the orthographic projection of the pixel defining layer on the substrate at least covers a partial area of the orthographic projection of the metal trace on the substrate.

4. The display panel according to claim 3, wherein, The light extraction enhancement structure includes a plurality of depressions and a plurality of protrusions, and the inclination angle of the protrusion is inversely proportional to the emission wavelength corresponding to the sub-pixel.

5. The display panel according to claim 4, wherein, The inclination angle of the protrusion corresponding to each sub-pixel is 30° to 60°, and the difference in the inclination angle of the protrusions corresponding to every two adjacent sub-pixels with different emission wavelengths is 5° to 10°.

6. The display panel according to claim 3, wherein The light extraction enhancement structure includes a plurality of depressions and a plurality of protrusions, and the orthographic projection area of the protrusion on the substrate is proportional to the area of the sub-light filtering layer.

7. The display panel according to claim 6, wherein, The shape of the orthographic projection of the protrusion on the substrate is a hexagon, a pentagon or a triangle.

8. The display panel according to any one of claims 4-7, wherein, The included angle between the central axis of the orthographic projection of the protrusion on the substrate and the vertical direction is proportional to the emission wavelength corresponding to the sub-pixel.

9. The display panel according to claim 8, wherein, The included angle corresponding to each sub-pixel is 3° to 18°, and the difference in the included angle corresponding to every two adjacent sub-pixels with different emission wavelengths is 3° to 5°.

10. The display panel according to any one of claims 4-9, wherein, At least one of the sub-pixels has a vacancy portion along at least one side of the sub-pixel arrangement direction corresponding to the light extraction enhancement structure.

11. The display panel according to claim 10, wherein, The area of the vacancy portion is proportional to the area of the sub-light filtering layer.

12. The display panel according to any one of claims 4-11, wherein, The light-emitting device includes: an anode located between the planarization layer and the pixel defining layer, a light-emitting layer located on the side of the anode away from the substrate, and a cathode located on the side of the light-emitting layer away from the substrate; Each of the sub-pixels further includes a light-blocking structure disposed between the anode and the light-emitting layer. The light-blocking structure is in contact with the inner wall of the pixel defining layer, and the orthographic projection of the light-blocking structure on the substrate covers at least a part of the orthographic projection of the light extraction enhancement structure on the substrate.

13. The display panel according to claim 12, wherein, The structure of the light extraction enhancement structure adjacent to the inner wall of the pixel defining layer is the recess. The orthographic projection of the light-blocking structure on the substrate covers at least the orthographic projection of the lowest point of the recess adjacent to the inner wall of the pixel defining layer on the substrate.

14. The display panel according to claim 13, wherein, The orthographic projection of the light-blocking structure on the substrate covers at least half of the width of the metal trace on the substrate.

15. The display panel according to any one of claims 12-14, wherein, The light-blocking structure is provided on the same layer and made of the same material as the pixel defining layer.

16. The display panel according to claim 15, wherein, The material of the pixel defining layer is a black light-absorbing material.

17. The display panel according to any one of claims 12-16, wherein, The area of the orthographic projection of the light-blocking structure on the substrate is proportional to the area of the sub-filter layer.

18. The display panel according to any one of claims 12-17, wherein, An anti-light crosstalk structure is provided between adjacent sub-filter layers. The orthographic projections of the anti-light crosstalk structure, the light-blocking structure, and the metal trace on the substrate have a first overlapping area, and the width of the first overlapping area is greater than half of the width of the metal trace.

19. The display panel according to claim 18, wherein, The material of the anti-light crosstalk structure is a black matrix.

20. The display panel according to claim 18, wherein, The anti-light crosstalk structure is a filter structure with colors different from those of two adjacent sub-filter layers. The light emitted from two adjacent sub-filter layers and the light emitted from the anti-light crosstalk structure are mixed into white light.

21. The display panel according to any one of claims 12-20, wherein, It further includes an anti-reflection layer located between the metal trace and the passivation layer. The orthographic projection of the metal trace on the substrate is within the orthographic projection range of the anti-reflection layer on the substrate.

22. The display panel according to claim 21, wherein, The orthographic projections of the anti-reflection layer, the light-blocking structure, and the metal trace on the substrate have a second overlapping area, and the width of the second overlapping area is greater than half of the width of the metal trace.

23. The display panel according to any one of claims 3-22, wherein, The pixel defining layer has a first groove, and an absorbent structure is filled in the first groove.

24. The display panel according to claim 23, wherein, The depth of the first groove is less than or equal to the height of the pixel defining layer.

25. The display panel according to claim 23, wherein, The planarization layer has a second groove corresponding to the first groove. The second groove penetrates the planarization layer, and the absorbent structure extends into the second groove and is in contact with the anti-light crosstalk structure.

26. The display panel according to any one of claims 23-25, wherein, The material of the absorbent structure is a black organic resin.

27. The display panel according to any one of claims 23-25, wherein, The material of the absorbent structure is a black metal, and the top of the absorbent structure facing away from the substrate is electrically connected to the cathode.

28. A display device, wherein, It includes a display panel according to any one of claims 1-27.

29. A method for manufacturing a display panel, which is used to manufacture the display panel according to any one of claims 1-27, wherein, The manufacturing method includes: Forming a plurality of pixel driving circuits on a substrate; wherein, the pixel driving circuit includes a driving transistor; Forming a plurality of light extraction enhancement structures on a side of the pixel driving circuit away from the substrate; wherein, the orthographic projection of the light extraction enhancement structure on the substrate does not overlap with the orthographic projection of the channel region of the active layer in the driving transistor on the substrate. A plurality of light-emitting devices are formed on a side of the light extraction enhancement structure facing away from the substrate; wherein, at least a part of a positive projection of the light extraction enhancement structure on the substrate covers a positive projection of the corresponding light-emitting device on the substrate.

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