Display panel and manufacturing method therefor, and display device
By insulating the isolation column in the display panel from the first electrode and electrically connecting it with the negative voltage signal source, the problem of electrochemical corrosion in the floating state of the metal isolation column is solved, and the reliability of the display panel is improved.
Patent Information
- Application Number
- PCT/CN2024/126135
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-11-29
- Filing Date
- 2024-10-21
- Publication Date
- 2025-06-05
AI Technical Summary
The metal isolation columns in the existing display panels are prone to electrochemical corrosion in the floating state of unloaded power supply, resulting in package failure and reduced reliability.
By insulating the isolation column from the first electrode and electrically connecting it with the negative voltage signal source, the potential of the isolation column is negative, thereby reducing electrochemical corrosion when in contact with external water and oxygen.
It effectively reduces the degree of electrochemical corrosion of metal isolation columns, reduces the chance of packaging failure, and thus improves the reliability of the display panel.
Smart Images

Figure CN2024126135_05062025_PF_FP_ABST
Abstract
Description
Display panel, manufacturing method thereof, and display device
[0001] This application claims priority to Chinese patent application No. 202311612832.4 filed on November 29, 2023, entitled “Display panel, manufacturing method thereof, and display device”, the entire contents of which are incorporated by reference into this application. Technical Field
[0002] The present disclosure relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art
[0003] Display devices are widely used in people's daily lives, such as mobile phones, monitors, tablet computers, etc. Display panels are an important component of display devices.
[0004] In related art, a display panel includes a base substrate and multiple isolation pillars. The base substrate has an aperture area, an isolation area, and a display area. The display area surrounds the aperture area, and the isolation area is located between the aperture area and the display area. Multiple isolation pillars are located in the isolation area and on the first surface of the base substrate. The multiple isolation pillars are annular and surround the aperture area. The isolation pillars are used to separate the film layer (e.g., the light-emitting layer) located on the side of the isolation pillars away from the first surface, thereby preventing external water and oxygen from extending from the edge of the aperture area along the light-emitting material to the display area.
[0005] However, isolation columns are typically made of metal and remain in a floating state for extended periods without power. This metal structure is susceptible to electrochemical reactions with water and oxygen, causing it to lose electrons and become oxidized, leading to electrochemical corrosion. Electrochemical corrosion can cause defects such as perforations and localized damage in the metal structure, leading to package failure and compromising the reliability of the display panel.
[0006] Summary of the Invention
[0007] The present disclosure provides a display panel, a manufacturing method thereof, and a display device that can reduce the electrochemical corrosion of isolation columns of a metal structure. The technical solution is as follows:
[0008] On the one hand, a display panel is provided, comprising a base substrate, a light-emitting functional layer and a plurality of isolation columns; the base substrate has a display area, an isolation area and an opening area, the display area surrounds the opening area, and the isolation area is located between the display area and the opening area; the light-emitting functional layer is located on the first surface of the base substrate, the light-emitting functional layer comprises a plurality of light-emitting units, the plurality of light-emitting units are arrayed in the display area, and the light-emitting units comprise a first electrode; the plurality of isolation columns are located in the isolation area and on the first surface, the isolation columns are annular and surround the opening area, the isolation columns are metal structures, the isolation columns are insulated from the first electrode and at least one of the isolation columns is electrically connected to a negative voltage signal source.
[0009] Optionally, the display panel also includes a driving circuit layer and a first connecting line, the driving circuit layer is located between the light-emitting functional layer and the base substrate, the first connecting line is electrically connected to the negative voltage signal source and the isolation column respectively, and the first connecting line is on the same layer as at least one conductive layer in the driving circuit layer.
[0010] Optionally, the driving circuit layer includes a bottom light-shielding layer, a first gate layer and a second gate layer located sequentially on the first surface in a direction away from the first surface; the at least one conductive layer includes at least one of the bottom light-shielding layer, the first gate layer and the second gate layer.
[0011] Optionally, the multiple isolation columns include at least one first isolation column and at least one second isolation column, the first isolation column surrounds the second isolation column, the first isolation column is electrically connected to the first connecting line, or the second isolation column is electrically connected to the first connecting line; the second isolation column is electrically connected to the first isolation column through the second connecting line.
[0012] Optionally, the second connecting line and the first electrode are in the same layer.
[0013] Optionally, the second connecting line is in the same layer as at least one of the bottom light shielding layer, the first gate layer and the second gate layer.
[0014] Optionally, the display panel also includes a first metal ring, which is located between the base substrate and the first isolation column, the orthographic projection of the first isolation column on the base substrate is located within the orthographic projection of the first metal ring on the base substrate, the first metal ring and the second connecting line are on the same layer and connected, the first isolation column is connected to the first metal ring through a via, and the first connecting line is connected to the first metal ring.
[0015] Optionally, the display panel also includes a second metal ring and a third metal ring located sequentially on the first surface in a direction away from the first surface, the second metal ring is located between the base substrate and the second isolation column, the third metal ring is located between the second metal ring and the second isolation column, the orthographic projection of the second isolation column on the base substrate is located within the orthographic projection of the third metal ring on the base substrate, and the orthographic projection of the third metal ring on the base substrate is located within the orthographic projection of the second metal ring on the base substrate; the side wall of the second isolation column has an extension portion, the extension portion is connected to the second metal ring through a via, and the second metal ring is on the same layer and connected to the second connecting line; or, the second isolation column is connected to the third metal ring through a via, and the third metal ring is on the same layer and connected to the second connecting line.
[0016] Optionally, the negative voltage signal source is used to provide an initialization signal or a light-emitting control signal to the driving circuit layer.
[0017] Optionally, the isolation column includes a first sublayer, a second sublayer and a third sublayer stacked in sequence in a direction away from the first surface, and the side wall of the second sublayer away from the opening area is recessed toward the opening area; and / or the side wall of the second sublayer close to the opening area is recessed toward the direction away from the opening area.
[0018] Optionally, the isolation column closest to the display area also includes an insulating portion, which is located in a groove structure formed by the side wall of the second sub-layer away from the opening area and recessed toward the opening area, and the insulating portion is respectively connected to the first sub-layer, the second sub-layer and the third sub-layer.
[0019] Optionally, the display panel further includes an encapsulation layer, and the encapsulation layer is located on a side of the light-emitting functional layer away from the first surface.
[0020] Optionally, the display panel further includes an isolation dam, the isolation dam is located in the isolation area, and the isolation dam is located on the first surface, and the height of the isolation dam is greater than the height of the isolation column.
[0021] On the other hand, a method for manufacturing a display panel is provided, comprising: providing a base substrate, the base substrate having a display area, an isolation area and an opening area, the display area surrounding the opening area, and the isolation area being located between the display area and the opening area; forming a light-emitting functional layer on the first surface of the base substrate, the light-emitting functional layer comprising a plurality of light-emitting units, the plurality of light-emitting units being arrayed in the display area, the light-emitting units comprising a first electrode; forming a plurality of isolation columns in the isolation area and on the first surface, the isolation columns being annular and surrounding the opening area, the isolation columns being a metal structure, the isolation columns being insulated from the first electrode, and at least one of the isolation columns being electrically connected to a negative voltage signal source.
[0022] On the other hand, a display device is provided, comprising a power supply circuit and any one of the aforementioned display panels, wherein the power supply circuit supplies power to the display panel.
[0023] The technical solutions provided by the embodiments of the present disclosure have the following beneficial effects:
[0024] In the embodiment of the present disclosure, the isolation column is a metal structure. By insulating the isolation column from the first electrode and electrically connecting it to the negative voltage signal source, the electrical signal on the first electrode will not interfere with or conflict with the negative voltage electrical signal provided by the negative voltage signal source, and the potential of the isolation column is a negative potential. When the isolation column comes into contact with external water and oxygen, the isolation column is unlikely to lose electrons and be oxidized, which can reduce the degree of electrochemical corrosion of the metal structure isolation column and reduce the probability of packaging failure, thereby improving the reliability of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0026] FIG1 is a schematic diagram of a planar structure of a display panel provided by an embodiment of the present disclosure;
[0027] FIG2 is a schematic diagram of a cross-sectional structure of a display panel provided by an embodiment of the present disclosure;
[0028] FIG3 is a schematic diagram of a partial planar structure of a display panel provided by an embodiment of the present disclosure;
[0029] FIG4 is a schematic cross-sectional view of another display panel provided in an embodiment of the present disclosure;
[0030] FIG5 is a schematic cross-sectional view of another display panel provided by an embodiment of the present disclosure;
[0031] FIG6 is a schematic cross-sectional view of another display panel provided in an embodiment of the present disclosure;
[0032] FIG7 is a flow chart of a method for manufacturing a display panel provided in an embodiment of the present disclosure;
[0033] FIG8 is a flow chart of another method for manufacturing a display panel provided by an embodiment of the present disclosure;
[0034] FIG9 is a schematic structural diagram of a display device provided in an embodiment of the present disclosure.
[0035] Legend: 1, display area 2, isolation area 3, opening area 10, driving backplane 101, base substrate 102, bottom light shielding layer 103, buffer layer 104, first active layer 105, first gate insulating layer 106, first gate layer 107, first insulating layer 108, second gate layer 109, second gate insulating layer 110, second active layer 111, third gate insulating layer 112, third gate layer 113, interlayer dielectric layer 114, first source and drain layer 115, passivation layer 116, first planarization layer 117, second source and drain Layer 118, second planarization layer 119, lead-out electrode 1000, display panel 1001, power supply circuit 20, light-emitting functional layer 21, first electrode 22, light-emitting layer 23, pixel definition layer 30, isolation column 31, first isolation column 32, second isolation column 33, isolation dam 34, groove 35, extension portion 40, first connecting line 41, second connecting line 50, first metal ring 51, second metal ring 52, third metal ring 60, encapsulation layer 61, first inorganic encapsulation layer 62, organic encapsulation layer 63, second inorganic encapsulation layer DETAILED DESCRIPTION
[0036] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.
[0037] Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meanings understood by persons of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," "third," and similar terms used in the patent specification and claims of this disclosure do not denote any order, quantity, or importance, but are merely used to distinguish between different components. Similarly, terms such as "a" or "an" do not denote a limitation on quantity, but rather denote the presence of at least one. Terms such as "include" or "comprising" mean that the elements or objects preceding the term "include" or "comprising" include the elements or objects listed after the term and their equivalents, and do not exclude other elements or objects. Terms such as "connected" or "connected" are not limited to physical or mechanical connections but may include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," "right," "top," and "bottom" are used solely to indicate relative positional relationships. When the absolute position of the described objects changes, the relative positional relationships may also change accordingly. Furthermore, "A and / or B" indicates the existence of three situations: A, B, and A and B.
[0038] Figure 1 is a schematic diagram of a planar structure of a display panel provided by an embodiment of the present disclosure. As shown in Figure 1, the display panel has a display area 1, an isolation area 2, and an opening area 3. The display area 1 surrounds the opening area 3, and the isolation area 2 is located between the display area 1 and the opening area 3.
[0039] The opening area 3 is used to place electronic devices. The electronic devices can be camera modules, fingerprint modules or other modules that need to receive external light.
[0040] Optionally, the display panel may further include a peripheral area (not shown), which surrounds the display area 1. The peripheral area is used to arrange peripheral wiring, etc., and the peripheral wiring is used to control the display area 1 to display an image.
[0041] Optionally, the display panel may be an organic light-emitting diode (OLED) display panel, a quantum dot light-emitting diode (QLED) display panel, etc., and the present disclosure does not limit this. The following description will take the OLED display panel as an example.
[0042] Figure 2 is a schematic cross-sectional view of a display panel provided by an embodiment of the present disclosure. Figure 2 may be a cross-sectional view of the display panel shown in Figure 1 taken along line BB'. As shown in Figure 2 , the display panel includes a base substrate 101, a light-emitting functional layer 20, and a plurality of isolation pillars 30. Base substrate 101 has the same display area 1, isolation area 2, and aperture area 3 as the display panel in Figure 1.
[0043] The light-emitting functional layer 20 is located on the first surface of the base substrate 101 and includes a plurality of light-emitting units arranged in an array in the display area 1. The light-emitting units include a first electrode 21. A plurality of isolation columns 30 are located in the isolation area 2 and on the first surface. The isolation columns 30 are annular and surround the opening area 3. The isolation columns 30 are metal structures, insulated from the first electrode 21, and at least one isolation column 30 is electrically connected to a negative voltage signal source.
[0044] In the embodiment of the present disclosure, the negative voltage signal source is used to provide a negative voltage electrical signal, which refers to an electrical signal less than 0 V. Optionally, the voltage range of the negative voltage electrical signal may be -11 V to -3 V. Exemplarily, the negative voltage electrical signal may be -7 V or -3 V.
[0045] In the embodiment of the present disclosure, the isolation column 30 is a metal structure. By insulating the isolation column 30 from the first electrode 21 and electrically connecting it to the negative voltage signal source, the electrical signal on the first electrode 21 will not interfere with or conflict with the negative voltage electrical signal provided by the negative voltage signal source, and the potential of the isolation column 30 is a negative potential. When the isolation column 30 comes into contact with external water and oxygen, it is difficult for the isolation column 30 to lose electrons and be oxidized, which can reduce the degree of electrochemical corrosion of the metal structure isolation column 30 and reduce the probability of packaging failure, thereby improving the reliability of the display panel.
[0046] As shown in Figure 2, the display panel further includes a driving circuit layer 10, which is located between the light-emitting functional layer 20 and the base substrate 101. The driving circuit layer 10 includes multiple pixel driving circuits, each of which is connected to a light-emitting unit to control the light emission of the connected light-emitting unit.
[0047] In one possible embodiment, the negative voltage signal source is used to provide a negative voltage electrical signal to the pixel driving circuit corresponding to each light-emitting unit during operation of the display panel. Optionally, the negative voltage signal source is used to provide an initialization signal or a light-emitting control signal to the driving circuit layer 10.
[0048] During the operation of the display panel, the initialization signal (Vinit) and the luminescence control (EM) signal are in a negative voltage state most of the time. Therefore, the electrical connection between the negative voltage signal source and the isolation column 30 can effectively reduce the degree of electrochemical corrosion of the isolation column 30 and reduce the probability of packaging failure, thereby improving the reliability of the display panel.
[0049] For example, the voltage of the initialization signal may be -3V, and the voltage of the light emitting control signal may be at -7V for a long time.
[0050] In another possible implementation, the negative pressure signal source may also be a separate signal source, which is only used to provide a negative pressure electrical signal to the isolation column 30 .
[0051] To electrically connect the isolation column 30 to the negative voltage signal source, the display panel further includes a first connecting line 40. The first connecting line 40 is electrically connected to the negative voltage signal source and the isolation column 30, respectively. The first connecting line 40 is co-located with at least one conductive layer in the drive circuit layer 10. The first connecting line 40 can serve as an introduction port for the negative voltage signal source, thereby electrically connecting the isolation column 30 to the negative voltage signal source. The first connecting line 40 is co-located with at least one conductive layer in the drive circuit layer 10. Therefore, the first connecting line 40 can be manufactured simultaneously with the other conductive layers in the drive circuit layer 10, simplifying the process flow.
[0052] Optionally, the driving circuit layer 10 includes a bottom light shielding layer 102, a first gate layer 106, and a second gate layer 108, which are sequentially located on the first surface in a direction away from the first surface. The at least one conductive layer includes at least one of the bottom light shielding layer 102, the first gate layer 106, and the second gate layer 108. The bottom light shielding layer 102 may also be referred to as a bottom shield metal (BSM) layer.
[0053] Since the bottom light shielding layer 102, the first gate layer 106 and the second gate layer 108 in the driving circuit layer 10 are generally made of conductive materials, the first connecting line 40 is on the same layer as at least one of these conductive layers, which facilitates the electrical connection of the negative voltage signal source to the isolation column 30 below the isolation column 30.
[0054] In one possible embodiment, the first connection line 40 is in the same layer as the bottom light shielding layer 102, the first gate layer 106, or the second gate layer 108. For example, as shown in FIG2 , the first connection line 40 is in the same layer as the second gate layer 108.
[0055] In another possible embodiment, the first connecting line 40 includes multiple parts, wherein a portion of the first connecting line 40 is in the same layer as the bottom light shielding layer 102, and another portion of the first connecting line 40 is in the same layer as the first gate layer 106. Of course, the multiple parts of the first connecting line 40 may also adopt other combinations of the same layers, and this disclosure is not limited to this.
[0056] Optionally, the plurality of isolation pillars 30 include at least one first isolation pillar 31 and at least one second isolation pillar 32, wherein the first isolation pillar 31 surrounds the second isolation pillar 32. The first isolation pillar 31 is also called an inner isolation pillar, and the second isolation pillar 32 is also called an outer isolation pillar.
[0057] In some embodiments, some of the plurality of isolation pillars 30 are electrically connected to a negative voltage signal source. In other embodiments, all isolation pillars 30 are electrically connected to a negative voltage signal source. FIG2 illustrates an example in which all isolation pillars 30 are electrically connected to a negative voltage signal source. By using the negative voltage signal source, the potential of all isolation pillars 30 is negative, which helps reduce electrochemical corrosion of the isolation pillars 30 and improves the reliability of the display panel.
[0058] As shown in FIG. 2 , the first isolation column 31 is electrically connected to the first connection line 40 ; the second isolation column 32 is electrically connected to the first isolation column 31 through the second connection line 41 .
[0059] That is, the first connecting wire 40 can first be electrically connected to the first isolation column 31 to electrically connect the negative pressure signal source to the first isolation column 31. Then, the second isolation column 32 can be electrically connected to the first isolation column 31 via the second connecting wire 41, thereby electrically connecting both the first isolation column 31 and the second isolation column 32 to the negative pressure signal source. In this way, because the first isolation column 31 is far away from the hole area 3, the first isolation column 31, as the starting point for introducing the negative pressure signal among the multiple isolation columns 30, can make the first connecting wire 40 farther away from the hole area 3, reducing the probability of the first connecting wire 40 being corroded by external water and oxygen.
[0060] In other embodiments, the second isolation column 32 is electrically connected to the first connection line 40 ; the second isolation column 32 is electrically connected to the first isolation column 31 through the second connection line 41 .
[0061] That is, the first connecting line 40 can be electrically connected to the second isolation column 32 first, so that the negative pressure signal source is electrically connected to the second isolation column 32, and then the second isolation column 32 is electrically connected to the first isolation column 31 through the second connecting line 41, so that both the first isolation column 31 and the second isolation column 32 are electrically connected to the negative pressure signal source.
[0062] It should be noted that when there are multiple first isolation pillars 31 and multiple second isolation pillars 32 , the multiple first isolation pillars 31 are electrically connected through the second connection line 41 , and the multiple second isolation pillars 32 are electrically connected through the second connection line 41 .
[0063] Optionally, the second connection line 41 is in the same layer as the first electrode 21. In this way, the first electrode 21 and the second connection line 41 can be manufactured simultaneously, thereby saving process costs.
[0064] Optionally, the second connection line 41 is in the same layer as at least one of the bottom light shielding layer 102 , the first gate layer 106 , and the second gate layer 108 . This facilitates electrical connection between the second isolation pillar 32 and the first isolation pillar 31 through the second connection line 41 below the isolation pillar 30 .
[0065] In one possible embodiment, the second connecting line 41 is in the same layer as the first electrode 21, the bottom light shielding layer 102, the first gate layer 106, or the second gate layer 108. For example, the second connecting line 41 may be in the same layer only as the first electrode 21. Since the first electrode 21 is generally manufactured as a whole layer to cover the driving circuit layer 10 and the surface of the light-emitting functional layer 20 away from the first surface, the first electrode 21 and the second connecting line 41 can be manufactured simultaneously without modifying the pattern formed after photolithography during the manufacturing process of the first electrode 21. Thus, electrical connection between all the isolation pillars 30 of the metal structure is achieved through the second connecting line 41 in a whole layer above the isolation pillars 30.
[0066] In another possible embodiment, the second connecting line 41 includes multiple parts, wherein a portion of the second connecting line 41 is in the same layer as the first electrode 21, another portion of the second connecting line 41 is in the same layer as the first gate layer 106, and another portion of the second connecting line 41 is in the same layer as the second gate layer 108. Of course, the multiple parts of the second connecting line 41 may also adopt other combinations of the same layers, and this disclosure is not limited to this.
[0067] 2 , the second connection line includes two parts, one part of the second connection line 41 is in the same layer as the first electrode 21, and the other part of the second connection line 41 is in the same layer as the second gate layer 108. The two parts of the second connection line are electrically connected to all the isolation pillars 30 respectively.
[0068] Optionally, the display panel further includes a first metal ring 50, which is located between the base substrate 101 and the first spacer 31. The orthographic projection of the first spacer 31 on the base substrate 101 is located within the orthographic projection of the first metal ring 50 on the base substrate 101. The first metal ring 50 can increase the height of the first spacer 31, which helps the first spacer 31 divide the luminescent material, thereby better preventing external water and oxygen from extending from the edge of the opening area 3 along the luminescent material to the display area 1.
[0069] Optionally, the first metal ring 50 and the second connecting wire 41 are on the same layer and connected, the first isolation column 31 is connected to the first metal ring 50 through a via, and the first connecting wire 40 is connected to the first metal ring 50. This can save process costs and can electrically connect the first isolation column 31 to the first metal ring 50 through the via.
[0070] In some embodiments, the first metal ring 50 is not disposed under the first isolation column 31 , and the first isolation column 31 is directly connected to the first connection line 40 through a via.
[0071] Optionally, the display panel also includes a second metal ring 51 and a third metal ring 52 located sequentially on the first surface in a direction away from the first surface, the second metal ring 51 is located between the base substrate 101 and the second isolation column 32, the third metal ring 52 is located between the second metal ring 51 and the second isolation column 32, the orthographic projection of the second isolation column 32 on the base substrate 101 is located within the orthographic projection of the third metal ring 52 on the base substrate 101, and the orthographic projection of the third metal ring 52 on the base substrate 101 is located within the orthographic projection of the second metal ring 51 on the base substrate 101.
[0072] In this way, the height of the second isolation pillar 32 near the opening area 3 can be made higher than that of the first isolation pillar 31, which can better divide the luminescent material and thus better prevent external water and oxygen from extending from the edge of the opening area 3 along the luminescent material to the display area 1. From bottom to top, the widths of the second metal ring 51, the third metal ring 52, and the second isolation pillar 32 decrease successively. After the encapsulation layer is subsequently covered on the second isolation pillar 32, the encapsulation layer can be deposited more smoothly, which helps to release external stress, reduce the probability of cracks in the encapsulation layer caused by external stress, and further prevent the intrusion of water and oxygen.
[0073] As shown in FIG2 , the second isolation pillar 32 is connected to the third metal ring 52 through a via, and the third metal ring 52 is on the same layer and connected to the second connection line 41. That is, in FIG2 , the first connection line 40, the second connection line 41 below the isolation pillar 30, the first metal ring 50, and the third metal ring 52 are all on the same layer as the second gate layer 108, and the second metal ring 51 is on the same layer as the first gate layer 106.
[0074] As shown in Figure 2, the isolation column 30 includes a first sublayer 301, a second sublayer 302 and a third sublayer 303 stacked in sequence along the direction away from the first surface, and the side wall of the second sublayer 302 away from the hole area 3 is recessed toward the direction close to the opening area 3, and the side wall of the second sublayer 302 close to the opening area is recessed toward the direction away from the hole area.
[0075] In this way, a spacer column 30 having an I-shaped structure can be formed, which is beneficial for naturally isolating the film layer above the spacer column 30 and simplifying the manufacturing process of the display panel.
[0076] In other embodiments, only the sidewall of the second sub-layer 302 away from the hole region 3 may be recessed toward the hole region 3, or only the sidewall of the second sub-layer 302 close to the hole region 3 may be recessed toward the hole region 3. This groove structure formed by the unilateral inward recess can also isolate the film layer above the isolation pillar 30.
[0077] As shown in Figure 2, the isolation column 30 closest to the display area 1 also includes an insulating portion 304. The insulating portion 304 is located in a groove structure formed by the side wall of the second sub-layer 302 away from the opening area 3 being recessed toward the opening area 3, and the insulating portion 304 is respectively connected to the first sub-layer 301, the second sub-layer 302 and the third sub-layer 303.
[0078] The insulating portion 304 can isolate the electrical connection between the first electrode 21 of the display area 1 and the isolation column 30 , thereby preventing the electrical signal on the first electrode 30 from interfering with or conflicting with the negative voltage signal provided by the negative voltage signal source.
[0079] For example, the insulating portion 304 may be made of an organic insulating material or an inorganic insulating material, such as acrylic organic glue.
[0080] For example, the groove structure may be a groove structure with a trapezoidal cross section or a groove structure with an arc-shaped interface. The embodiment of the present disclosure does not limit the shape of the groove structure, as long as it can isolate the film layer above the isolation column 30.
[0081] The hierarchical structure of the display panel is exemplarily described below.
[0082] Optionally, the base substrate 101 and the driving circuit layer 10 form a driving backplane, which may be a low-temperature polycrystalline silicon oxide (LTPO) backplane or a low-temperature polycrystalline silicon (LTPS) backplane.
[0083] Optionally, the driving circuit layer 10 includes a plurality of thin film transistors (TFTs).
[0084] As shown in FIG2 , taking the LTPO backplane as an example, the multiple TFTs include low-temperature polysilicon TFTs and metal oxide TFTs.
[0085] Optionally, the driving circuit layer also includes a buffer layer 103, a first active layer 104, a first gate insulating layer 105, a first insulating layer 107, a second gate insulating layer 109, a second active layer 110, a third gate insulating layer 111, a third gate layer 112, an interlayer dielectric layer 113, a first source and drain layer 114, a passivation layer 115, a first planarization layer 116, a second source and drain layer 117 and a second planarization layer 118. In Figure 2, the bottom light-shielding layer 102, the buffer layer 103, the first active layer 104, the first gate insulating layer 105, the first gate layer 106, the first insulating layer 107, the second gate layer 108, the second gate insulating layer 109, the second active layer 110, the third gate insulating layer 111, the third gate layer 112, the interlayer dielectric layer 113, the first source and drain layer 114, the passivation layer 115, the first planarization layer 116, the second source and drain layer 117 and the second planarization layer 118 are stacked in sequence along the direction away from the first surface.
[0086] For example, the driving circuit layer may further include an extraction electrode 119, which is co-layered with the first source / drain electrode layer 114 and connected to the bottom light shielding layer 102 through a via. The extraction electrode 119 may be used to provide a negative voltage signal with a constant voltage of -7V to the bottom light shielding layer 102, which is used to prevent leakage caused by TFT characteristic drift.
[0087] For example, the light-emitting functional layer 20 may include a second electrode (not shown), a pixel definition layer 23 , a light-emitting layer 22 and a first electrode 21 , which are sequentially stacked in a direction away from the first surface.
[0088] Exemplarily, the pixel definition layer 23 is a halftone pixel definition layer (HPDL), the first electrode 21 is a cathode layer, and the second electrode is an anode layer.
[0089] Exemplarily, the base substrate 101 can be any transparent substrate, such as a glass substrate, a quartz substrate, a plastic substrate, other transparent hard substrates, or other transparent flexible substrates, and can be a single-layer or multi-layer structure. Taking a multi-layer structure as an example, the base substrate 101 includes a first PI (polyimide) layer, a first protective layer, a second PI layer, and a second protective layer stacked from bottom to top. The two protective layers are used to protect the PI layer and prevent damage to the PI layer by subsequent processes. The second protective layer is also covered with a buffer layer 103, which can block water and oxygen and block alkaline ions.
[0090] For example, the bottom light shielding layer 102 may be made of a metal material, including but not limited to molybdenum, aluminum, titanium, copper and the like. The bottom light shielding layer 102 can reduce the light exposure to the TFT while also being conductive.
[0091] Exemplarily, the first active layer 104 is made of low-temperature polysilicon material, and the second active layer 110 is made of metal oxide semiconductor materials such as indium gallium zinc oxide (IGZO).
[0092] For example, the first gate insulating layer 105 , the first insulating layer 107 , the second gate insulating layer 109 , the third gate insulating layer 111 and the interlayer dielectric layer 113 may be made of silicon oxide, silicon nitride, silicon oxynitride or the like.
[0093] Exemplarily, the first gate layer 106 and the second gate layer 108 are made of metal materials, such as one or more of molybdenum, copper, and aluminum.
[0094] Illustratively, the third gate layer 112 includes a stacked first sub-gate layer and a second sub-gate layer. The first sub-gate layer is made of a transparent conductive material, such as indium tin oxide (ITO). The second sub-gate layer is made of a metal material, which can be a single metal layer or a plurality of metal layers stacked in sequence. The metal material used in the metal layer of the second sub-gate layer can be titanium, aluminum, titanium, etc.
[0095] For example, the passivation layer 115 may be made of a silicon oxide layer or a silicon nitride layer.
[0096] Exemplarily, the first planarization layer 116 and the second planarization layer 118 are made of an organic insulating material, such as resin.
[0097] Exemplarily, the material of the pixel definition layer 23 includes one or more of polyimide, polyphthalimide, polyphthalamide, silicon oxide, silicon nitride, and the like.
[0098] Exemplarily, the second electrode may be made of a metal material, such as gold, or the second electrode may be made of a transparent conductive material, such as ITO.
[0099] For example, the light-emitting layer 22 may include a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), an electron injection layer (EIL), a hole blocking layer (HBL), an electron blocking layer (EBL) and a light-emitting material layer.
[0100] Exemplarily, the first electrode 21 is made of a metal material such as magnesium-silver alloy; or made of a transparent conductive material such as ITO.
[0101] For example, the first source / drain electrode layer 114 may include a plurality of metal thin films including a titanium layer, an aluminum layer, and a titanium layer stacked in sequence. The second source / drain electrode layer 117 may include a plurality of metal thin films including a titanium layer, an aluminum layer, and a titanium layer stacked in sequence.
[0102] In the embodiment of the present disclosure, the isolation column 30 may be in the same layer as the first source / drain electrode layer 114 or the second source / drain electrode layer 117. Accordingly, the first sub-layer 301 and the third sub-layer 303 may be titanium layers, and the second sub-layer 302 may be aluminum layers.
[0103] Optionally, the display panel further includes an encapsulation layer 60, which is located on a side of the light-emitting functional layer 20 away from the first surface. The encapsulation layer 60 can protect the underlying light-emitting functional layer 20, block water and oxygen intrusion, and ensure the reliability of the display panel.
[0104] For example, the encapsulation layer 60 may include a first inorganic encapsulation layer 61, an organic encapsulation layer 62, and a second inorganic encapsulation layer 63 stacked sequentially in a direction away from the first surface. Of course, the encapsulation layer 60 may also include more or fewer film layers, which is not limited in the present disclosure.
[0105] Illustratively, the first inorganic encapsulation layer 61 is made of silicon nitride, silicon oxide, or silicon oxynitride. The second inorganic encapsulation layer 63 is made of silicon nitride, silicon oxide, or silicon oxynitride. The organic encapsulation layer 62 is made of an organic insulating material, which may include polyimide, polyamide, acrylic resin, benzocyclobutene, hexamethyldisiloxane (HMDSO), phenolic resin, and the like.
[0106] Optionally, the display panel further includes an isolation dam 33, which is located in the isolation region 2 and on the first surface. The height of the isolation dam 33 is greater than that of the isolation pillar 30. The isolation dam 33 can further prevent moisture and oxygen from entering the display region 1 and causing display defects, and can also prevent the organic encapsulation layer 62 from overflowing into the opening region 3, thereby improving the reliability of the display panel.
[0107] Exemplarily, the orthographic projection of the isolation dam 33 on the base substrate 101 is located between the orthographic projection of the first isolation column 31 on the base substrate 101 and the orthographic projection of the second isolation column 32 on the base substrate 101 .
[0108] For example, the isolation dam 33 may be formed in the same layer as the pixel definition layer 23 .
[0109] In the embodiments of the present disclosure, the same layer means formed by the same patterning process, or in contact with the same surface of the same film layer, or located on the same side of the same film layer, etc.
[0110] As shown in FIG. 2 , a groove 34 is formed in the interlayer dielectric layer 113 located in the isolation region 2 and on a side of the plurality of isolation pillars 30 close to the first surface.
[0111] FIG3 is a schematic diagram of a partial planar structure of a display panel provided by an embodiment of the present disclosure. FIG3 may be a schematic diagram of a partial planar structure of the display panel shown in FIG1 at the dotted box C. As shown in FIG3 , the orthographic projection of the groove 34 on the base substrate 101 is located between the orthographic projection of the isolation dam 33 on the base substrate 101 and the orthographic projection of the first isolation column 31 on the base substrate 101. The groove 34 can make the height fluctuation between the isolation dam 34 and the first isolation column 31 larger. When the crack generated in the process of forming the opening area 3 propagates to the fluctuation, if the crack needs to continue to propagate, it needs to change direction. Changing the direction of propagation consumes a lot of energy, and the large fluctuation height increases the propagation path of the crack, thereby hindering the propagation of the crack, reducing the probability of the crack generated in the process of forming the opening area 3 propagating to the display area 1, and ensuring the reliability of the display panel.
[0112] As shown in FIG3 , multiple first isolation columns 31 , adjacent first isolation columns 31 and second isolation columns 32 , and multiple second isolation columns 32 are electrically connected through second connecting lines 41 , so that the potential of all isolation columns 30 is negative, which is beneficial to improving the reliability of the display panel.
[0113] Figure 4 is a schematic cross-sectional view of another display panel provided by an embodiment of the present disclosure. The display panel shown in Figure 4 differs from the display panel shown in Figure 2 in the connection method between the first connecting wire 40 and the first metal ring 50. In Figure 4 , the first connecting wire 40 is located on the same layer as the bottom light shielding layer 102. The first metal ring 50 is connected to the first connecting wire 40 through a via. This allows the isolation column 30 to be connected to a negative voltage signal source via the extraction electrode 119 on the bottom light shielding layer 102, thereby providing a negative potential.
[0114] FIG5 is a schematic diagram of the cross-sectional structure of another display panel provided by an embodiment of the present disclosure. The display panel shown in FIG5 differs from the display panel shown in FIG2 in that the first connecting line 40, the second connecting line 41 below the isolation column 30, the first metal ring 50, and the second metal ring 51 in FIG5 are all on the same layer as the first gate layer 106.
[0115] As shown in FIG. 5 , the sidewall of the second isolation column 32 has an extension portion 35 . The extension portion 35 is connected to the second metal ring 51 through a via hole, and the second metal ring 51 is connected to the second connection line 41 .
[0116] Since the orthographic projection of the second spacer 32 on the base substrate 101 is located within the orthographic projection of the third metal ring 52 on the base substrate 101, and the orthographic projection of the third metal ring 52 on the base substrate 101 is located within the orthographic projection of the second metal ring 51 on the base substrate 101, by providing the extension 35 on the sidewall of the second spacer 32, the second spacer 32 can be connected to the second metal ring 51, and further, the first spacer 31 and the second spacer 32 can be electrically connected via the second connecting wire 41.
[0117] Figure 6 is a schematic cross-sectional view of another display panel provided by an embodiment of the present disclosure. The display panel shown in Figure 6 differs from the display panel shown in Figure 5 in the connection method between the first connecting wire 40 and the first metal ring 50. In Figure 6, the first connecting wire 40 is located on the same layer as the bottom light shielding layer 102. The first metal ring 50 is connected to the first connecting wire 40 through a via. This allows a negative voltage signal source to be connected through the bottom light shielding layer 102, causing the isolation column 30 to have a negative potential.
[0118] In the embodiments shown in FIG. 4 to FIG. 6 , the structures, materials, and positional relationships of the orthographic projections of the remaining layers on the base substrate 101 refer to the embodiment related to FIG. 2 , and detailed descriptions are omitted here.
[0119] FIG7 is a flow chart of a method for manufacturing a display panel provided by an embodiment of the present disclosure. As shown in FIG7 , the manufacturing method includes:
[0120] In step S701 , a base substrate is provided.
[0121] The base substrate comprises a display area, an isolation area and an opening area, wherein the display area surrounds the opening area, and the isolation area is located between the display area and the opening area.
[0122] In step S702 , a light-emitting functional layer is formed on a first surface of the base substrate.
[0123] The light-emitting functional layer includes a plurality of light-emitting units, the plurality of light-emitting units are arrayed in the display area, and the light-emitting units include a first electrode.
[0124] In step S703 , a plurality of isolation pillars are formed in the isolation region and on the first surface.
[0125] The isolation column is annular and surrounds the opening area. The isolation column is a metal structure. The isolation column is insulated from the first electrode and at least one isolation column is electrically connected to the negative pressure signal source.
[0126] In the embodiment of the present disclosure, the isolation column is a metal structure. By insulating the isolation column from the first electrode and electrically connecting it to the negative voltage signal source, the electrical signal on the first electrode will not interfere with or conflict with the negative voltage electrical signal provided by the negative voltage signal source, and the potential of the isolation column is a negative potential. When the isolation column comes into contact with external water and oxygen, the isolation column is unlikely to lose electrons and be oxidized, which can reduce the degree of electrochemical corrosion of the metal structure isolation column and reduce the probability of packaging failure, thereby improving the reliability of the display panel.
[0127] FIG8 is a flow chart of another method for manufacturing a display panel according to an embodiment of the present disclosure. The method is used to manufacture the display panel shown in FIG2 . As shown in FIG8 , the method includes:
[0128] In step S801 , a base substrate is provided.
[0129] In step S802 , a driving circuit layer is formed on a first surface of the base substrate.
[0130] Exemplarily, step S802 may include:
[0131] In the first step, a light-shielding metal layer is deposited on the substrate, and then a photoresist structure is obtained through processes such as photoresist coating, exposure, and development. The light-shielding metal layer is etched using the photoresist structure as a mask to obtain a bottom light-shielding layer.
[0132] The second step is to form a buffer layer on the bottom light-shielding layer, for example, by deposition. Then, the first active layer is formed on the buffer layer. For example, an initial first active layer can be deposited on the buffer layer, and a photoresist structure can be obtained through processes such as photoresist coating, exposure, and development. The initial first active layer is then etched using the photoresist structure as a mask to form the first active layer.
[0133] In the third step, an initial first gate insulating layer and an initial first gate layer are sequentially formed on the first active layer, for example, by deposition. The initial first gate insulating layer covers the first active layer. A photoresist structure is formed on the initial first gate layer through processes such as photoresist coating, exposure, and development. The initial first gate layer is then etched using the photoresist structure as a mask to form a first gate pattern layer. The first gate pattern layer includes a first gate layer located in the display area and a second metal ring located in the isolation area. Optionally, the portion of the first active layer not covered by the first gate layer is conductorized to ensure good ohmic contact between the first active layer and the subsequently formed first source and drain layer.
[0134] In the fourth step, an initial first insulating layer and an initial second gate layer are sequentially formed on the first gate pattern layer, for example, by deposition. A photoresist structure is formed on the initial second gate layer through processes such as photoresist coating, exposure, and development. The initial second gate layer is then etched using the photoresist structure as a mask to form a second gate pattern layer. The second gate pattern layer includes the second gate layer, a first connecting line, a second connecting line, a first metal ring, and a third metal ring.
[0135] In the fifth step, an initial second gate insulating layer and an initial second active layer are formed on the second gate layer in sequence by, for example, deposition, and then a photoresist structure is obtained through processes such as photoresist coating, exposure, and development. The initial second active layer is etched using the photoresist structure as a mask to obtain a second active layer.
[0136] In step 6, an initial third gate insulating layer and an initial third gate layer are sequentially formed on the second active layer, for example, by deposition. The initial third gate insulating layer covers the second active layer. A photoresist structure is formed on the initial third gate layer through processes such as photoresist coating, exposure, and development. The initial third gate layer is then etched using the photoresist structure as a mask to form the third gate layer. Optionally, the portion of the second active layer not covered by the third gate layer is conductively conductive to ensure good ohmic contact between the second active layer and the subsequently formed second source and drain electrode layer.
[0137] In the seventh step, an initial interlayer dielectric layer is formed on the third gate layer, for example, by deposition. Through a series of processes including photoresist coating, exposure, etching, and stripping, multiple vias are formed that expose the light shielding layer, and a first gate insulating layer is obtained from the initial first gate insulating layer. Further, through a series of processes including photoresist coating, exposure, etching, and stripping, multiple vias are formed that expose the first active layer, and a first insulating layer is obtained from the initial first insulating layer, and a second gate insulating layer is obtained from the initial second gate insulating layer. This simultaneously forms the interlayer dielectric layer.
[0138] In step 8, after etching the via holes exposing the light shielding layer and the first active layer obtained in step 7, a first source / drain pattern layer is formed through a series of processes such as deposition, photoresist coating, exposure, etching, and stripping. The first source / drain pattern layer includes a first source / drain layer and extraction electrodes located in the display area, and a plurality of isolation pillars located in the isolation area. Optionally, the isolation pillars include a first sublayer, a second sublayer, and a third sublayer stacked sequentially in a direction away from the first surface, with the sidewalls of the second sublayer away from the aperture region being recessed toward the aperture region, and the sidewalls of the second sublayer near the aperture region being recessed away from the aperture region.
[0139] In the ninth step, an initial passivation layer and an initial first planarization layer are formed on the first source and drain pattern layer by, for example, deposition. A series of processes, including photoresist coating, exposure, etching, and stripping, are performed to form a plurality of vias exposing the second active layer. Simultaneously, a third gate insulating layer is formed from the initial third gate insulating layer, a passivation layer is formed from the initial passivation layer, and a first planarization layer is formed from the initial first planarization layer.
[0140] In the tenth step, a second source and drain layer is formed in the via hole that exposes the second active layer obtained by etching in the ninth step by adopting a series of processes such as deposition, photoresist coating, exposure, etching, and stripping.
[0141] In the eleventh step, a second planarization layer is formed on the second source and drain electrode layer by, for example, deposition.
[0142] In step S803 , an insulating portion is formed in the groove structure of the isolation column closest to the display area on a side close to the display area.
[0143] In step S804 , a light-emitting functional layer is formed on a side of the driving circuit layer away from the first surface.
[0144] Optionally, the light-emitting functional layer may include a plurality of light-emitting units, the plurality of light-emitting units are arrayed in the display area, and the first electrodes of the plurality of light-emitting units are connected.
[0145] Optionally, the light-emitting functional layer includes a second electrode, a pixel definition layer, a light-emitting layer and a first electrode stacked in sequence in a direction away from the first surface.
[0146] Exemplarily, the pixel definition layer is HPDL, the first electrode layer is a cathode layer, and the second electrode layer is an anode layer.
[0147] In step S805 , an encapsulation layer is formed on a side of the light-emitting functional layer away from the first surface.
[0148] Optionally, the structure and material of each layer and the positional relationship of the orthographic projection of each layer on the substrate are shown in the embodiment related to FIG2 , and detailed description is omitted here.
[0149] The difference between the manufacturing method for manufacturing the display panel shown in Figures 4 to 6 and the manufacturing method in the embodiment of Figure 8 lies primarily in the different ways in which the first and second connecting lines are fabricated in the same layer. Specifically, the patterns formed after photolithography during the steps of forming the bottom light shielding layer, forming the first gate layer, or forming the second gate layer are different, and a detailed description thereof will be omitted here.
[0150] FIG9 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure. As shown in FIG9 , the display device includes a power supply circuit 1001 and the aforementioned display panel 1000 , wherein the power supply circuit 1001 supplies power to the display panel 1000 .
[0151] Optionally, the display device can be any product or component with a display function, such as a laptop computer, a mobile phone, a tablet computer, a television, a monitor, a wearable device, a digital photo frame, a navigator, or the like.
[0152] The above description does not limit the present disclosure in any form. Although the present disclosure has been disclosed as above through the embodiments, it is not intended to limit the present disclosure. Any technician familiar with the profession can make some changes or modifications to equivalent embodiments with equivalent changes using the technical content disclosed above without departing from the scope of the technical solution of the present disclosure. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present disclosure without departing from the content of the technical solution of the present disclosure are still within the scope of the technical solution of the present disclosure.
Claims
1. A display panel, characterized in that: It includes a substrate, a light-emitting functional layer and a plurality of isolation columns; The base substrate comprises a display area, an isolation area and an opening area, wherein the display area surrounds the opening area, and the isolation area is located between the display area and the opening area; The light-emitting functional layer is located on the first surface of the base substrate, the light-emitting functional layer includes a plurality of light-emitting units, the plurality of light-emitting units are arrayed in the display area, and the light-emitting unit includes a first electrode; The plurality of isolation columns are located in the isolation area and on the first surface. The isolation columns are annular and surround the opening area. The isolation columns are metal structures. The isolation columns are insulated from the first electrode and at least one of the isolation columns is electrically connected to a negative pressure signal source.
2. The display panel according to claim 1, characterized in that: The display panel also includes a driving circuit layer and a first connecting line, the driving circuit layer is located between the light-emitting functional layer and the base substrate, the first connecting line is electrically connected to the negative voltage signal source and the isolation column respectively, and the first connecting line is in the same layer as at least one conductive layer in the driving circuit layer.
3. The display panel according to claim 2, characterized in that: The driving circuit layer comprises a bottom light shielding layer, a first gate layer and a second gate layer which are sequentially located on the first surface in a direction away from the first surface; The at least one conductive layer includes at least one of the bottom light shielding layer, the first gate layer, and the second gate layer.
4. The display panel according to claim 3, characterized in that: The plurality of isolation columns include at least one first isolation column and at least one second isolation column, the first isolation column surrounds the second isolation column, the first isolation column is electrically connected to the first connection line, or the second isolation column is electrically connected to the first connection line; The second isolation column is electrically connected to the first isolation column through a second connection line.
5. The display panel according to claim 4, characterized in that: The second connecting line is in the same layer as the first electrode.
6. The display panel according to claim 4, characterized in that: The second connection line is in the same layer as at least one of the bottom light shielding layer, the first gate layer, and the second gate layer.
7. The display panel according to claim 6, characterized in that: The display panel also includes a first metal ring, which is located between the base substrate and the first isolation column, the orthographic projection of the first isolation column on the base substrate is located within the orthographic projection of the first metal ring on the base substrate, the first metal ring and the second connecting line are in the same layer and connected, the first isolation column is connected to the first metal ring through a via, and the first connecting line is connected to the first metal ring.
8. The display panel according to claim 6, characterized in that: The display panel further comprises a second metal ring and a third metal ring which are sequentially located on the first surface in a direction away from the first surface, the second metal ring is located between the base substrate and the second isolation column, the third metal ring is located between the second metal ring and the second isolation column, the orthographic projection of the second isolation column on the base substrate is located within the orthographic projection of the third metal ring on the base substrate, and the orthographic projection of the third metal ring on the base substrate is located at the orthographic projection of the second metal ring on the base substrate; The side wall of the second isolation column has an extension portion, the extension portion is connected to the second metal ring through a via hole, and the second metal ring is in the same layer and connected to the second connecting line; or, The second isolation column is connected to the third metal ring through a via hole, and the third metal ring is in the same layer as the second connection line and is connected to the third metal ring.
9. The display panel according to any one of claims 2 to 8, characterized in that: The negative voltage signal source is used to provide an initialization signal or a light emitting control signal for the driving circuit layer.
10. The display panel according to claim 9, characterized in that: The isolation column comprises a first sublayer, a second sublayer and a third sublayer sequentially stacked in a direction away from the first surface, and a side wall of the second sublayer away from the opening area is recessed toward a direction close to the opening area; And / or, a side wall of the second sub-layer close to the opening area is recessed in a direction away from the opening area.
11. The display panel according to claim 10, characterized in that: The isolation column closest to the display area also includes an insulating part, which is located in a groove structure formed by the side wall of the second sub-layer away from the opening area and concave toward the opening area, and the insulating part is respectively connected to the first sub-layer, the second sub-layer and the third sub-layer.
12. The display panel according to any one of claims 1 to 8 and claims 10 to 11, characterized in that: The display panel further includes an encapsulation layer, and the encapsulation layer is located on a side of the light-emitting functional layer away from the first surface.
13. The display panel according to any one of claims 1 to 8 and claims 10 to 11, characterized in that: The display panel further includes an isolation dam, the isolation dam is located in the isolation region, and the isolation dam is located on the first surface, and the height of the isolation dam is greater than the height of the isolation column.
14. A method for manufacturing a display panel, characterized in that: include: Providing a substrate, the substrate having a display area, an isolation area and an opening area, the display area surrounds the opening area, and the isolation area is located between the display area and the opening area; Forming a light-emitting functional layer on the first surface of the base substrate, wherein the light-emitting functional layer comprises a plurality of light-emitting units, wherein the plurality of light-emitting units are arrayed in the display area, and the light-emitting units comprise a first electrode; A plurality of isolation columns are formed in the isolation area and on the first surface. The isolation columns are annular and surround the opening area. The isolation columns are metal structures. The isolation columns are insulated from the first electrode and at least one of the isolation columns is electrically connected to a negative pressure signal source.
15. A display device, characterized in that: The device comprises a power supply circuit and a display panel as claimed in any one of claims 1 to 13, wherein the power supply circuit supplies power to the display panel.
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