High-frequency circuit control method, program, high-frequency circuit, and communication device

Abstract

Provided is a control method for a high frequency circuit capable of reducing damage to a power amplifier by a reflected wave of a sounding reference signal (SRS) in a switch. The method for controlling the high-frequency circuit has a control step (ST2). The control step (ST2) includes a first transmission control step (ST21), a connection step (ST22), a disconnection step (ST24), and a second transmission control step (ST25). In the connection step (ST22), after the first transmission control step (ST21), a second common terminal (7b) and a first selection terminal (7c) are connected in a state in which the first common terminal (7a) and the first selection terminal (7c) are connected. In the disconnection step (ST24), after the connection step (ST22), the connection between the first common terminal (7a) and the first selection terminal (7c) is cut off in a state in which the second common terminal (7b) and the first selection terminal (7c) are connected. In the second transmission control step (ST25), after the cutting step (ST24), the SRS from the power amplifier (12) is transmitted from a second antenna (3B).

Description

High frequency circuit control method, program, high frequency circuit, and communication device

[0001] The present invention generally relates to a control method, a program, a radio frequency circuit, and a communication device for a radio frequency circuit, and more particularly, to a control method, a program, a radio frequency circuit, and a communication device for transmitting a Sounding Reference Signal (SRS) from multiple antennas in sequence in response to an SRS request signal.

[0002] The RF front-end integrated circuit described in Patent Document 1 includes a power amplifier, an antenna switch that outputs an output signal of the power amplifier to an antenna, an output signal sensor that detects the voltage amplitude of the signal flowing through the antenna, and a PA control circuit that limits the output power of the power amplifier if the voltage amplitude detected by the output signal sensor is an excessive value.

[0003] JP 2011-41315 A

[0004] Consider the configuration of Patent Document 1, in which multiple antennas are provided and an antenna switch is used to sequentially switch between the multiple antennas, thereby transmitting SRS from the multiple antennas to a base station in sequence. In this case, while the antenna switch switches the output destination of the power amplifier to the next antenna, the antenna switch enters an unstable state in which the output destination of the power amplifier is not fully connected to any antenna. In this unstable state, the SRS from the power amplifier is reflected by the antenna switch back to the power amplifier. The reflected wave generated by this reflection may damage the power amplifier.

[0005] In view of the above problems, an object of the present invention is to provide a control method, a program, a high-frequency circuit, and a communication device for a high-frequency circuit that can reduce damage to a power amplifier due to reflected waves of SRS at a switch during switching.

[0006] A control method for a high-frequency circuit according to one aspect of the present invention includes a receiving step and a control step. In the receiving step, an SRS request signal is received. In the control step, a first switch is controlled in accordance with the received SRS request signal to transmit the SRS from a power amplifier from a first antenna and a second antenna. The first switch has a first common terminal, a second common terminal, and a first selection terminal. The first common terminal is connected to a first antenna terminal. The second common terminal is connected to a second antenna terminal. The first selection terminal is connectable to the first common terminal and the second common terminal. The first antenna terminal is connected to the first antenna. The second antenna terminal is connected to the second antenna. The power amplifier is connected to the first selection terminal. The control step includes a first transmission control step, a connection step, a disconnection step, and a second transmission control step. In the first transmission control step, the SRS from the power amplifier is transmitted from the first antenna with the first common terminal and the first selection terminal connected. In the connecting step, after the first transmission control step, the second common terminal is connected to the first selection terminal while the first common terminal is connected to the first selection terminal. In the disconnecting step, after the connecting step, the first common terminal is disconnected from the first selection terminal while the second common terminal is connected to the first selection terminal. In the second transmission control step, after the disconnecting step, the SRS from the power amplifier is transmitted from the second antenna.

[0007] A control method for a high-frequency circuit according to one aspect of the present invention includes a receiving step and a control step. In the receiving step, an SRS request signal is received. In the control step, a first switch and a power amplifier are controlled in accordance with the received SRS request signal to transmit the SRS from the power amplifier from a first antenna and a second antenna. The first switch has a first common terminal, a second common terminal, and a first selection terminal. The first common terminal is connected to a first antenna terminal. The second common terminal is connected to a second antenna terminal. The first selection terminal is connectable to the first common terminal and the second common terminal. The first antenna terminal is connected to the first antenna. The second antenna terminal is connected to the second antenna. The power amplifier is connected to the first selection terminal. The control step includes a first transmission control step, a reduction step, a switching step, and a second transmission control step. In the first transmission control step, the SRS from the power amplifier is transmitted from the first antenna with the first common terminal and the first selection terminal connected. In the reducing step, after the first transmission control step, the output of the power amplifier is reduced. In the switching step, after the reducing step, the connection between the first common terminal and the first selection terminal is cut and the second common terminal is connected to the first selection terminal. In the second transmission control step, after the switching step, the SRS from the power amplifier is transmitted from the second antenna.

[0008] A program according to one aspect of the present invention causes one or more processors to execute the method for controlling a high-frequency circuit.

[0009] A radio frequency circuit according to one aspect of the present invention includes a switch, a power amplifier, and a control circuit. The power amplifier is connected to the switch. The control circuit controls the switch and the power amplifier. The switch has a first common terminal, a second common terminal, and a selection terminal. The first common terminal is connected to a first antenna terminal. The second common terminal is connected to a second antenna terminal. The selection terminal is connectable to the first common terminal and the second common terminal. The first antenna terminal is connected to a first antenna. The second antenna terminal is connected to a second antenna. The power amplifier is connected to the selection terminal. The control circuit controls the switch in response to an SRS request signal to transmit the SRS from the power amplifier from the first antenna and then the second antenna. The control circuit has a first transmission control function, a connection function, a disconnection function, and a second transmission control function. The first transmission control function transmits the SRS from the power amplifier from the first antenna while the first common terminal and the selection terminal are connected. The connection function, after processing of the first transmission control function, connects the second common terminal and the selection terminal while keeping the first common terminal and the selection terminal connected. The disconnection function, after processing of the connection function, disconnects the connection between the first common terminal and the selection terminal while keeping the second common terminal and the selection terminal connected. The second transmission control function, after processing of the disconnection function, transmits the SRS from the power amplifier from the second antenna.

[0010] A radio frequency circuit according to one aspect of the present invention includes a switch, a power amplifier, and a control circuit. The power amplifier is connected to the switch. The control circuit controls the switch and the power amplifier. The switch has a first common terminal, a second common terminal, and a selection terminal. The first common terminal is connected to a first antenna terminal. The second common terminal is connected to a second antenna terminal. The selection terminal is connectable to the first common terminal and the second common terminal. The first antenna terminal is connected to a first antenna. The second antenna terminal is connected to a second antenna. The power amplifier is connected to the selection terminal. The control circuit controls the switch and the power amplifier in response to an SRS request signal to transmit the SRS from the power amplifier from the first antenna and then the second antenna. The control circuit has a first transmission control function, a reduction function, a switching function, and a second transmission control function. The first transmission control function transmits the SRS from the power amplifier from the first antenna while the first common terminal and the selection terminal are connected. The reduction function reduces the output of the power amplifier after processing by the first transmission control function. The switching function disconnects the first common terminal from the selection terminal and connects the second common terminal to the selection terminal after processing by the reduction function. The second transmission control function transmits the SRS from the power amplifier from the second antenna after processing by the switching function.

[0011] A communication device according to one aspect of the present invention includes the high-frequency circuit and a signal processing circuit connected to the high-frequency circuit and processing a high-frequency signal.

[0012] The high-frequency circuit control method, program, high-frequency circuit, and communication device according to the present invention have the advantage of being able to reduce damage to a power amplifier caused by reflected waves of SRS at a switch during switching.

[0013] FIG. 1 is a block diagram of a high-frequency circuit and a communication device according to a first embodiment. FIG. 2 is a flowchart illustrating the operation of the high-frequency circuit according to the first embodiment. FIG. 3 is a timing chart illustrating the operation of the high-frequency circuit according to the first embodiment. FIG. 4 is an explanatory diagram illustrating a method for checking the operation of the high-frequency circuit according to the first embodiment. FIG. 5 is a timing chart illustrating the operation of a high-frequency circuit according to a second embodiment. FIG. 6 is a timing chart illustrating the operation of a high-frequency circuit according to a first modification of the second embodiment. FIG. 7 is a block diagram of a high-frequency circuit and a communication device according to a second modification of the second embodiment. FIG. 8 is a timing chart illustrating the operation of the high-frequency circuit according to the first modification. FIG. 9 is a block diagram of a high-frequency circuit and a communication device according to a third modification of the second embodiment.

[0014] First Embodiment A control method for a high-frequency circuit 1 according to a first embodiment, the high-frequency circuit 1, and a communication device 30 including the high-frequency circuit 1 will be described in detail with reference to the drawings.

[0015] (1) Overview As shown in FIGS. 1 to 3 , the control method for the high-frequency circuit 1 according to the first embodiment includes a receiving step ST1 and a control step ST2. In the receiving step ST1, an SRS request signal is received. In the control step ST2, the first switch 7 is controlled in response to the received SRS request signal to transmit an SRS (Sounding Reference Signal) from the power amplifier 12 via the first antenna 3A and the second antenna 3B. The first switch 7 has a first common terminal 7a, a second common terminal 7b, and a first selection terminal 7c. The first common terminal 7a is connected to the external terminal 6a (first antenna terminal). The second common terminal 7b is connected to the external terminal 6b (second antenna terminal). The first selection terminal 7c is connectable to the first common terminal 7a and the second common terminal 7b. The first antenna terminal 6a is connected to the first antenna 3A. The second antenna terminal 6b is connected to the second antenna 3B. The power amplifier 12 is connected to the first selection terminal 7c. The control step ST2 includes a first transmission control step ST21, a connection step ST22, a disconnection step ST24, and a second transmission control step ST25. In the first transmission control step ST21, the SRS from the power amplifier 12 is transmitted from the first antenna 3A while the first common terminal 7a and the first selection terminal 7c are connected. In the connection step ST22, after the first transmission control step ST21, the second common terminal 7b and the first selection terminal 7c are connected while the first common terminal 7a and the first selection terminal 7c are connected. In the disconnection step ST24, after the connection step ST22, the connection between the first common terminal 7a and the first selection terminal 7c is disconnected while the second common terminal 7b and the first selection terminal 7c are connected. In the second transmission control step ST25, after the disconnection step ST24, the SRS from the power amplifier 12 is transmitted from the second antenna 3B.

[0016] According to this configuration, in the connecting step ST22, the second common terminal 7b is connected to the first selection terminal 7c while the first common terminal 7a is connected to the first selection terminal 7c. Then, in the disconnecting step ST24, the first common terminal 7a is disconnected from the first selection terminal 7c while the second common terminal 7b is connected to the first selection terminal 7c. Therefore, when the connection of the first selection terminal 7c is switched from the first common terminal 7a to the second common terminal 7b, at least one of the connection between the first common terminal 7a and the first selection terminal 7c and the connection between the second common terminal 7b and the first selection terminal 7c is always maintained. Therefore, the state of the first switch 7 does not become unstable while the first switch 7 is being switched. The unstable state is a state in which the first switch 7 has insufficient connections between the first common terminal 7a and the first selection terminal 7c and between the second common terminal 7b and the first selection terminal 7c, causing the SRS from the power amplifier 12 to be reflected back toward the power amplifier 12. This reduces damage to the power amplifier 12 caused by the reflected SRS waves at the first switch 7 during switching.

[0017] (2) Configuration of the Communication Device As shown in FIG. 1 , the communication device 30 is a communication device including a high-frequency circuit 1. The communication device 30 is, for example, a mobile terminal (e.g., a smartphone), but is not limited to a mobile terminal and may be, for example, a wearable terminal (e.g., a smartwatch). The high-frequency circuit 1 is, for example, a circuit compatible with the 4G (fourth generation mobile communication) standard and the 5G (fifth generation mobile communication) standard. The 4G standard is, for example, 3GPP (registered trademark, Third Generation Partnership Project) or the LTE standard (registered trademark, Long Term Evolution). The 5G standard is, for example, 5G NR (New Radio).

[0018] In addition to the high-frequency circuit 1, the communication device 30 includes a signal processing circuit 2, a plurality of antennas 3 (two in the example of FIG. 1 ), and matching circuits 5 and 6. When distinguishing between the two antennas 3, the two antennas 3 are referred to as a first antenna 3A and a second antenna 3B.

[0019] The high-frequency circuit 1 is configured to amplify a received signal (high-frequency signal) received by one of the plurality of antennas 3 and output the amplified signal to the signal processing circuit 2. The high-frequency circuit 1 is also configured to amplify a transmission signal (high-frequency signal) output from the signal processing circuit 2 and transmit the amplified signal from one of the plurality of antennas 3. The high-frequency circuit 1 is controlled by, for example, the signal processing circuit 2.

[0020] The signal processing circuit 2 is connected to the high-frequency circuit 1 and configured to process a received signal output from the high-frequency circuit 1. The signal processing circuit 2 is configured to process a transmission signal to be output to the high-frequency circuit 1. The signal processing circuit 2 includes an RF (Radio Frequency) signal processing circuit 2a and a baseband signal processing circuit 2b.

[0021] The RF signal processing circuit 2a is, for example, an RFIC (Radio Frequency Integrated Circuit) and performs signal processing on high-frequency signals (transmission signals and reception signals). The RF signal processing circuit 2a performs signal processing such as down-conversion on the reception signal output from the high-frequency circuit 1 and outputs the result to the baseband signal processing circuit 2b. The RF signal processing circuit 2a also performs signal processing such as up-conversion on the transmission signal output from the baseband signal processing circuit 2b and outputs the result to the high-frequency circuit 1.

[0022] The baseband signal processing circuit 2b is, for example, a baseband integrated circuit (BBIC). The baseband signal processing circuit 2b outputs the received signal output from the RF signal processing circuit 2a to the outside. This output signal (received signal) is used, for example, as an image signal for image display or as an audio signal for communication. The baseband signal processing circuit 2b also generates a transmission signal from a baseband signal (e.g., an audio signal and an image signal) input from the outside and outputs the generated transmission signal to the RF signal processing circuit 2a.

[0023] The signal processing circuit 2 controls the high-frequency circuit 1. The signal processing circuit 2 is electrically connected to the high-frequency circuit 1. The signal processing circuit 2 controls the high-frequency circuit 1 by outputting a control signal to the high-frequency circuit 1. For example, the signal processing circuit 2 controls the switching of the first switch 7, the second switch 8, and the third switch 9 of the high-frequency circuit 1 by outputting a control signal to the first switch 7, the second switch 8, and the third switch 9 when receiving a reception signal, transmitting a transmission signal, and transmitting an SRS. The signal processing circuit 2 controls the output of the power amplifier 12 via the controller 15 by outputting a control signal to the controller 15 of the high-frequency circuit 1 when transmitting an SRS. Furthermore, when the signal processing circuit 2 receives an SRS request signal from a base station via the high-frequency circuit 1, it outputs the SRS to the high-frequency circuit 1 and transmits the output SRS from multiple antennas 3 to the base station via the high-frequency circuit 1.

[0024] The signal processing circuit 2 communicates with the high frequency circuit 1 in accordance with the MIPI (Mobile Industry Processor Interface, registered trademark) standard. The signal processing circuit 2 outputs a control signal to the high frequency circuit 1 using communication in accordance with the MIPI standard.

[0025] The matching circuit 5 is provided in the signal path L1 between the first antenna 3A and a later-described external terminal 6a of the high-frequency circuit 1. The external terminal 6a is connected to a later-described first common terminal 7a of the first switch 7. The matching circuit 5 is a circuit for achieving impedance matching between the first antenna 3A and the first common terminal 7a of the first switch 7. The matching circuit 5 includes, for example, an inductor connected in series to the signal path L1, or an inductor connected between the signal path L1 and ground.

[0026] The matching circuit 6 is provided on the signal path L2 between the second antenna 3B and a later-described external terminal 6b of the high-frequency circuit 1. The external terminal 6b is connected to a later-described second common terminal 7b of the first switch 7. The matching circuit 6 is a circuit for achieving impedance matching between the second antenna 3B and the second common terminal 7b of the first switch 7. The matching circuit 6 includes, for example, an inductor connected in series to the signal path L2, or an inductor connected between the signal path L2 and ground.

[0027] 1, the high-frequency circuit 1 includes a plurality of external terminals 6a to 6e and a plurality of electronic components, such as a first switch 7, a second switch 8, a third switch 9, a plurality of (two in the example of FIG. 1) duplexers 10 and 11, a power amplifier 12, a low-noise amplifier 13, a matching circuit 14, and a controller 15.

[0028] The external terminal 6a is a first antenna terminal to which the first antenna 3A is connected. Hereinafter, the external terminal 6a may be referred to as the first antenna terminal 6a. The external terminal 6b is a second antenna terminal to which the second antenna 3B is connected. Hereinafter, the external terminal 6b may be referred to as the second antenna terminal 6b. The external terminal 6c is connected to an input section (not shown) of the signal processing circuit 2 and is an output terminal that outputs a received signal processed by the high-frequency circuit 1 to the input section of the signal processing circuit 2. The external terminal 6d is connected to an output section (not shown) of the signal processing circuit 2 and is an input terminal that inputs a transmission signal output from the output section of the signal processing circuit 2. The external terminal 6e is a connection terminal for connection to the signal output section of the signal processing circuit 2. The external terminal 6e is also connected to the first switch 7, the second switch 8, the third switch 9, and the controller 15. Communication between the signal processing circuit 2 and the first to third switches 7 to 9 and the controller 15 is, for example, communication compliant with the MIPI standard.

[0029] In the first embodiment, "A is connected to B" is not limited to a case where A is directly connected to B, but also includes a case where A is indirectly connected to B via a conductive member. Furthermore, "A is connected to B" means that A and B are electrically connected (i.e., electrically conductive).

[0030] The first switch 7 selects a connection destination of each of the multiple antennas 3 from among the multiple duplexers 10 and 11, and connects each of the multiple antennas 3 to the selected duplexer. The first switch 7 can also not select a connection destination of each of the multiple antennas 3. The first switch 7 is operated by a control signal from the signal processing circuit 2. The first switch 7 is, for example, a switch integrated circuit (IC). The first switch 7 has multiple common terminals 7a and 7b and multiple selection terminals 7c and 7d. When distinguishing between the multiple common terminals 7a and 7b, the common terminal 7a will be referred to as a first common terminal 7a, and the common terminal 7b will be referred to as a second common terminal 7b. When distinguishing between the multiple selection terminals 7c and 7d, the selection terminal 7c will be referred to as a first selection terminal 7c, and the selection terminal 7d will be referred to as a second selection terminal 7d. Each of the multiple common terminals 7a and 7b can be selectively connected to at least one of the multiple selection terminals 7c and 7d. The first common terminal 7a is connected to the first antenna terminal 6a. The second common terminal 7b is connected to the second antenna terminal 6b. The first selection terminal 7c is connected to the input / output unit 10a of the duplexer 10. The second selection terminal 7d is connected to the input / output unit 11a of the duplexer 11.

[0031] The first switch 7 further includes a control unit 7e. The control unit 7e is connected to the signal processing circuit 2 via the external terminal 6e, and controls the switching of the first switch 7 in accordance with a control signal from the signal processing circuit 2. The control unit 7e controls the switching of the first switch 7 during SRS transmission based on the control signal from the signal processing circuit 2.

[0032] The second switch 8 selects the connection destination of the output section 12b of the power amplifier 12 from among the transmit filters 10T and 11T (described later) of each of the multiple duplexers 10 and 11, and connects the connection destination of the output section 12b of the power amplifier 12 to the input sections 10b and 11b of the selected transmit filters 10T and 11T. The second switch 8 is operated by a control signal from the controller 15. The second switch 8 is, for example, a switch integrated circuit (IC). The second switch 8 has a common terminal 8a and multiple selection terminals 8b and 8c. When distinguishing between the multiple selection terminals 8b and 8c, the selection terminal 8b will be referred to as a first selection terminal 8b and the selection terminal 8c will be referred to as a second selection terminal 8c. The common terminal 8a can be selectively connected to at least one of the multiple selection terminals 8b and 8c. The common terminal 8a is connected to the output section 12b of the power amplifier 12 via a matching circuit 14. The first selection terminal 8b is connected to an input 10b of a transmission filter 10T (described later) of the duplexer 10. The second selection terminal 8c is connected to an input 11b of a transmission filter 11T of the duplexer 11.

[0033] The second switch 8 further includes a control unit 8d. The control unit 8d is connected to the signal processing circuit 2 via the external terminal 6e, and controls the switching of the second switch 8 in accordance with a control signal from the signal processing circuit 2.

[0034] The third switch 9 selects the connection destination of the input section 13a of the low-noise amplifier 13 from among the receive filters 10R and 11R (described later) of each of the multiple duplexers 10 and 11, and connects the connection destination of the input section 13a of the low-noise amplifier 13 to the output sections 10c and 11c of the selected receive filters 10R and 11R. The third switch 9 is operated by a control signal from the controller 15. The third switch 9 is, for example, a switch integrated circuit (IC). The third switch 9 has a common terminal 9a and multiple selection terminals 9b and 9c. When distinguishing between the multiple selection terminals 9b and 9c, the selection terminal 9b will be referred to as a first selection terminal 9b and the selection terminal 8c will be referred to as a second selection terminal 8c. The common terminal 9a can be selectively connected to at least one of the multiple selection terminals 9b and 9c. The common terminal 9a is connected to the input section 13a of the low-noise amplifier 13. The first selection terminal 9b is connected to an output 10c of a receiving filter 10R (described later) of the duplexer 10. The second selection terminal 9c is connected to an output 11c of a receiving filter 11R (described later) of the duplexer 11.

[0035] The third switch 9 includes a control unit 9d. The control unit 9d is connected to the signal processing circuit 2 via the external terminal 6e, and controls the switching of the third switch 9 in accordance with a control signal from the signal processing circuit 2.

[0036] The duplexer 10 includes a transmit filter 10T and a receive filter 10R. The transmit filter 10T has a transmit band (communication band) that includes a first communication band as its pass band. The transmit filter 10T is connected between a first selection terminal 7c of the first switch 7 and a first selection terminal 8b of the second switch 8. The receive filter 10R has a receive band (communication band) that includes a second communication band that is different from the first communication band as its pass band. The receive filter 10R is connected between a first selection terminal 7c of the first switch 7 and a first selection terminal 9b of the third switch 9.

[0037] The duplexer 10 has an input / output unit 10a, an input unit 10b, and an output unit 10c. The input / output unit 10a functions as the output unit of the transmit filter 10T and the input unit of the receive filter 10R. The input unit 10b functions as the input unit of the transmit filter 10T. The output unit 10c functions as the output unit of the receive filter 10R. The input / output unit 10a is connected to a first selection terminal 7c of the first switch 7. The input unit 10b is connected to a first selection terminal 8b of the second switch 8. The output unit 10c is connected to a first selection terminal 9b of the third switch 9. The transmit filter 10T passes an input signal (transmission signal or SRS) input to the input unit 10b by restricting it to a signal in the transmission band of the first communication band, and outputs the passed signal from the input / output unit 10a. The receiving filter 10R restricts the input signal (received signal) input to the input / output unit 10a to a signal in the receiving band of the second communication band, and outputs the passed signal from the output unit 10c.

[0038] The duplexer 11 has a transmit filter 11T and a receive filter 11R. The transmit filter 11T has a transmit band (communication band) as a pass band that includes a third communication band different from the first communication band and the second communication band. The transmit filter 11T is connected between the second selection terminal 7d of the first switch 7 and the second selection terminal 8c of the second switch 8. The receive filter 11R has a receive band (communication band) as a pass band that includes a fourth communication band different from the first communication band, the second communication band, and the third communication band. The receive filter 11R is connected between the second selection terminal 7d of the first switch 7 and the second selection terminal 9c of the third switch 9.

[0039] The duplexer 11 has an input / output unit 11a, an input unit 11b, and an output unit 11c. The input / output unit 11a functions as the output unit of the transmit filter 11T and the input unit of the receive filter 11R. The input unit 11b functions as the input unit of the transmit filter 11T. The output unit 11c functions as the output unit of the receive filter 11R. The input / output unit 11a is connected to the second selection terminal 7d of the first switch 7. The input unit 11b is connected to the second selection terminal 8c of the second switch 8. The output unit 11c is connected to the second selection terminal 9c of the third switch 9. The transmit filter 11T passes an input signal (transmission signal or SRS) input to the input unit 11b by restricting it to a signal in the transmission band of the third communication band, and outputs the passed signal from the input / output unit 11a. The receiving filter 11R restricts the input signal (received signal) input to the input / output unit 11a to a signal in the receiving band of the fourth communication band, and outputs the passed signal from the output unit 11c.

[0040] The power amplifier 12 has an input section 12a and an output section 12b. The input section 12a is connected to the external terminal 6d. The output section 12b is connected to the common terminal 8a of the second switch 8 via a matching circuit 14. The power amplifier 12 amplifies an input signal (transmission signal or SRS) input to the input section 12a, and outputs the amplified signal from the output section 12b to the common terminal 8a of the second switch 8 via the matching circuit 14.

[0041] The low-noise amplifier 13 has an input section 13a and an output section 13b. The input section 13a is connected to the common terminal 9a of the third switch 9. The output section 13b is connected to the external terminal 6c. The low-noise amplifier 13 amplifies the input signal (received signal or SRS) input to the input section 13a, and outputs the amplified signal from the output section 13b to the external terminal 6c.

[0042] The matching circuit 14 is a circuit for achieving impedance matching between the output part 12b of the power amplifier 12 and the common terminal 8a of the second switch 8. The matching circuit 14 includes, for example, an inductor connected in series to the signal path L3 between the output part 12b of the power amplifier 12 and the common terminal 8a of the second switch 8, or an inductor connected between the signal path L3 and ground.

[0043] The controller 15 controls the output of the power amplifier 12 in accordance with a control signal from the signal processing circuit 2. More specifically, the controller 15 is electrically connected to the power amplifier 12. The controller 15 is also connected to the signal processing circuit 2 via an external terminal 6e. The controller 15 controls the power amplifier 12 based on the control signal input from the signal processing circuit 2 to the external terminal 6e. The controller 15 also controls the output of the power amplifier 12 during SRS transmission based on the control signal input from the signal processing circuit 2 to the external terminal 6e.

[0044] The control unit 7e of the first switch 7, the control unit 8d of the second switch 8, the control unit 9d of the third switch 9, and the controller 15 constitute a control circuit 16. The control circuit 16 controls the first switch 7, the second switch 8, the third switch 9, and the power amplifier 12 in response to a control signal input from the signal processing circuit 2 to the external terminal 6e. The control circuit 16 performs processing defined in control step ST2, as described below.

[0045] The control units 7e, 8d, and 9d and the controller 15 each include, for example, a microcomputer having a processor and a memory. The processor executes a program, causing a computer system to function as the control units 7e, 8d, and 9d or the controller 15. In other words, the control units 7e, 8d, and 9d and the controller 15 are each realized as a computer system having a processor and a memory. Each of the one or more programs may be pre-recorded in the memory, or may be provided via a telecommunications line such as the Internet, or recorded on a non-transitory recording medium such as a memory card.

[0046] (4) Operation The operation of the high frequency circuit 1 (i.e., the method of controlling the high frequency circuit 1) will be described with reference to FIGS.

[0047] (4-1) Overview of the Control Method of the High-Frequency Circuit 1 As shown in FIG. 2, the control method of the high-frequency circuit 1 includes a receiving step ST1 and a control step ST2.

[0048] In the receiving step ST1, the high-frequency circuit 1 receives an SRS request signal from a base station via one of the multiple antennas 3 (e.g., the first antenna 3A). More specifically, in the receiving step ST1, the control circuit 16 of the high-frequency circuit 1 controls the first to third switches 7-9 and the controller 15 based on a control signal from the signal processing circuit 2 so as to form a signal path from one of the multiple antennas 3 (e.g., the first antenna 3A) to the external terminal 6c. At this time, the control unit 7e of the first switch 7 connects one of the multiple common terminals 7a, 7b of the first switch 7 (e.g., the first common terminal 7a) to one of the multiple selection terminals 7c, 7d (e.g., the first selection terminal 7c) based on the control signal from the signal processing circuit 2. Furthermore, the control unit 9d of the third switch 9 connects the common terminal 9a to the first selection terminal 9b based on the control signal from the signal processing circuit 2. By controlling the first switch 7 and the third switch 9 in this manner, a signal path is formed from the first antenna 3A through the matching circuit 5, the first switch 7, the receiving filter 10R, the third switch 9 and the low-noise amplifier 13 to the external terminal 6c.

[0049] When the first antenna 3A receives an SRS request signal from the base station, the received SRS request signal is output to the signal processing circuit 2 through the above-mentioned signal path. In this way, the high-frequency circuit 1 receives the SRS request signal from the base station by one antenna 3 (for example, the first antenna 3A) of the multiple antennas 3. The received SRS request signal is then processed by the high-frequency circuit 1 and output to the signal processing circuit 2.

[0050] Then, when the signal processing circuit 2 acquires an SRS request signal from the base station as described above, it outputs a control signal S1 (see (a) of FIG. 3 ) to the high-frequency circuit 1. The control signal S1 is a signal (transmission start signal) that instructs the start of transmission of the SRS. When the signal processing circuit 2 acquires the SRS request signal, it generates an SRS and outputs the generated SRS to the external terminal 6 d of the high-frequency circuit 1. When the control signal S1 from the signal processing circuit 2 is input to the external terminal 6 e, the control circuit 16 of the high-frequency circuit 1 transmits the SRS from the signal processing circuit 2 to the base station in sequence from the multiple antennas 3 using a certain communication band (for example, the first communication band) based on control step ST2, as described below.

[0051] In the control step ST2, as shown in FIG. 3, the control circuit 16 of the high-frequency circuit 1 sequentially performs processing of a first transmission control step ST21, a connection step ST22, a connection maintenance step ST23, a disconnection step ST24, and a second transmission control step ST25, thereby transmitting the SRS from the signal processing circuit 2 to the base station sequentially from the multiple antennas 3.

[0052] In the first transmission control step ST21, the control circuit 16 of the high-frequency circuit 1 transmits the SRS from the signal processing circuit 2 to the base station from the first antenna 3A. More specifically, in the high-frequency circuit 1, when the control signal S1 (see (a) in FIG. 3 ) output from the signal processing circuit 2 is input to the external terminal 6e, the input control signal S1 is output from the external terminal 6e to the first switch 7, the second switch 8, and the controller 15. When the control signal S1 from the signal processing circuit 2 is input to the control circuit 16 of the high-frequency circuit 1, the processing of the control circuit 16 proceeds to the first transmission control step ST21.

[0053] Furthermore, in the first transmission control step ST21, when the controller 15 receives a control signal S1 from the external terminal 6e, the controller 15 controls the power amplifier 12 so that its output becomes high. More specifically, the power amplifier 12 has a semiconductor switching element that controls the output of the power amplifier 12. The controller 15 controls the signal level of a control signal input to a control electrode of the semiconductor switching element, thereby controlling the output of the power amplifier 12. If the semiconductor switching element is an HBT (heterojunction bipolar transistor), the control electrode is a base electrode and the control signal is a base current. In this case, the controller 15 controls the base current to control the output of the power amplifier 12. If the semiconductor switching element is an FET (field effect transistor), the control electrode is a gate electrode and the control signal is a gate voltage. In this case, the controller 15 controls the output of the power amplifier 12 by controlling the gate voltage. In the first transmission control step ST21, the controller 15 controls the signal level of the control signal input to the control electrode of the semiconductor switching element of the power amplifier 12 to a high level (see (b) of FIG. 3), thereby controlling the output of the power amplifier 12 to a high level. As a result, the SRS input from the signal processing circuit 2 to the external terminal 6d is amplified by the power amplifier 12 and output from the power amplifier 12.

[0054] In the first embodiment, the signal level of the control signal input to the control electrode of the semiconductor switching element of the power amplifier 12 is maintained at a high level at least until the transmission of the SRS is completed (i.e., from the first transmission control step ST21 to the second transmission control step ST25) (see (b) of FIG. 3). As a result, the output (SRS) of the power amplifier 12 is maintained at a high level at least until the transmission of the SRS is completed.

[0055] Furthermore, in the first transmission control step ST21, when the control unit 7e of the first switch 7 receives a control signal S1 from the external terminal 6e, the control unit 7e connects the first common terminal 7a to the first selection terminal 7c and disconnects the second common terminal 7b to the first selection terminal 7c. That is, the first selection terminal 7c is connected to the first common terminal 7a and disconnected from the second common terminal 7b (see (c) of FIG. 3). In the example of FIG. 3, before the control signal S1 is input to the control unit 7e, the control unit 7e connects the first common terminal 7a to the first selection terminal 7c and disconnects the second common terminal 7b to the first selection terminal 7c in the first switch 7. Therefore, the example of FIG. 3 illustrates a case in which, when the control signal S1 is input, the control unit 7e maintains a state in which the first common terminal 7a is connected to the first selection terminal 7c and the second common terminal 7b is disconnected from the first selection terminal 7c. Furthermore, when a control signal S1 is input from the external terminal 6e, the control unit 8d of the second switch 8 connects the common terminal 8a and the first selection terminal 8b. By switching the first switch 7 and the second switch 8 in this manner, a signal path is formed from the external terminal 6d to the first antenna 3A via the power amplifier 12, the matching circuit 14, the second switch 8, the transmit filter 10T, the first switch 7, and the matching circuit 5. Once this signal path is formed, the SRS input from the signal processing circuit 2 to the external terminal 6d flows through the signal path and is transmitted from the first antenna 3A to the base station, but is not transmitted from the second antenna 3B. At this time, the output of the first antenna 3A becomes high level, and the output of the second antenna 3B becomes low level (see (d) in FIG. 3 ).

[0056] When the SRS is transmitted from the first antenna 3A, the signal processing circuit 2 outputs a control signal S2 to the first switch 7 while connecting the first common terminal 7a and the first selection terminal 7c (see (a) of FIG. 3). The control signal S2 is a control signal that instructs the first switch 7 to connect the second common terminal 7b, which is in a disconnected state, to the first selection terminal 7c while connecting the first common terminal 7a and the first selection terminal 7c. When the control signal S2 from the signal processing circuit 2 is input to the control circuit 16 of the high-frequency circuit 1, the processing of the control circuit 16 shifts from the first transmission control step ST21 to a connection step ST22.

[0057] In the connection step ST22, when the control unit 7e of the first switch 7 receives the control signal S2 from the signal processing circuit 2, the control unit 7e of the first switch 7 connects the second common terminal 7b, which is in a disconnected state, to the first selection terminal 7c while keeping the first common terminal 7a and the first selection terminal 7c connected. That is, in the connection step ST22, the control unit 7e of the first switch 7 switches the state of the second common terminal 7b and the first selection terminal 7c from a disconnected state to a connected state while keeping the first common terminal 7a and the first selection terminal 7c connected. In the connection step ST22, a first fixed time T11 is required from the start to the completion of the connection between the second common terminal 7b and the first selection terminal 7c. Then, after the first fixed time T11 has elapsed and the processing of the connection step ST22 is completed (i.e., the first switch 7 completes the connection between the second common terminal 7b and the first selection terminal 7c), the processing of the control circuit 16 of the high-frequency circuit 1 transitions from the connection step ST22 to a connection maintenance step ST23.

[0058] In the connection maintaining step ST23, the control unit 7e of the first switch 7 maintains the state in which the first common terminal 7a and the first selection terminal 7c are connected and the second common terminal 7b and the first selection terminal 7c are connected for a second predetermined time T12. During this time, the output (SRS) of the power amplifier 12 flows from the first selection terminal 7c to the first common terminal 7a in the first switch 7 and is transmitted from the first antenna 3A to the base station. In parallel with this transmission, the output (SRS) of the power amplifier 12 flows from the first selection terminal 7c to the second common terminal 7b in the first switch 7 and is also transmitted from the second antenna 3B to the base station. That is, in the connection maintaining step ST23, the first selection terminal 7c is connected to the first common terminal 7a and the second common terminal 7b, and the output (SRS) of the power amplifier 12 is transmitted from both the first antenna 3A and the second antenna 3B. At this time, the outputs of the first antenna 3A and the second antenna 3B both become approximately high level (see (d) of FIG. 3). Note that in the connection maintaining step ST23, the first selection terminal 7c of the first switch 7 is connected to both the first common terminal 7a and the second common terminal 7b. Therefore, the output of the power amplifier 12 is distributed approximately equally between the first antenna 3A and the second antenna 3B in the first switch 7. As a result, in the connection maintaining step ST23, the outputs of the first antenna 3A and the second antenna 3B are slightly lower than the output (high level output) of the power amplifier 12. Then, when a second predetermined time T12 has elapsed since the transition to the connection maintaining step ST23, the processing of the control circuit 16 of the high-frequency circuit 1 transitions to the disconnection step ST24.

[0059] In this case, the second certain time T12 required for the connection maintaining step ST23 (i.e., the time required to maintain the connection between the second common terminal 7b and the first selection terminal 7c) is shorter than the first certain time T11 required for the connection step ST22 (i.e., the time required from the start to the completion of the process of connecting the second common terminal 7b and the first selection terminal 7c). This makes it possible to shorten the second certain time T12 as much as possible. In other words, it is possible to shorten the period during which the output (SRS) of the power amplifier 12 is transmitted from both the first antenna 3A and the second antenna 3B.

[0060] Then, in a disconnection step ST24, the control unit 7e of the first switch 7 automatically disconnects the first common terminal 7a from the first selection terminal 7c after a second predetermined time T12 has elapsed, while keeping the second common terminal 7b and the first selection terminal 7c connected (see (c) of FIG. 3). In the disconnection step ST24, a third predetermined time T13 is required from the start to the completion of disconnection of the first common terminal 7a from the first selection terminal 7c. In the disconnection step ST24, as the switching of the first switch 7 progresses, the proportion of the output (SRS) of the power amplifier 12 output from the first selection terminal 7c to the first common terminal 7a gradually decreases, and the proportion of the output from the first selection terminal 7c to the second common terminal 7b gradually increases. That is, the output of the first antenna 3A gradually decreases, and the output of the second antenna 3B gradually increases (see (d) of FIG. 3). Then, after the third fixed time T13 has elapsed, all of the output of the power amplifier 12 is output from the first selection terminal 7c to the second common terminal 7b. At this time, the output of the first antenna 3A goes low, and the output of the second antenna 3B goes high (see FIG. 3(d)). After the third fixed time T13 has elapsed and the processing of the disconnection step ST24 has been completed (i.e., the first switch 7 has completely disconnected the first common terminal 7a and the first selection terminal 7c), the processing of the control circuit 16 of the high-frequency circuit 1 transitions from the disconnection step ST24 to the second transmission control step ST25.

[0061] In the second transmission control step ST25, the first selection terminal 7c of the first switch 7 is connected to the second common terminal 7b and disconnected from the first common terminal 7a (see (c) of FIG. 3). As a result, the entire output (SRS) of the power amplifier 12 flows from the first selection terminal 7c to the second common terminal 7b of the first switch 7 and is transmitted from the second antenna 3B to the base station. At this time, the output of the first antenna 3A becomes low level, and the output of the second antenna 3B becomes high level (see (d) of FIG. 3).

[0062] In this way, the high-frequency circuit 1 transmits the SRS from the signal processing circuit 2 to the base station using a certain communication band (for example, the first communication band) in sequence from the multiple antennas 3. Then, the control step ST2 ends (see FIG. 2).

[0063] (5) Characteristics of Reducing SRS Reflection at the First Switch 7 As described above, in the high-frequency circuit 1, during switching of the first switch 7 when transmitting SRS (steps ST22 to ST24), at least one of the connections between the first selection terminal 7c and the first common terminal 7a and the first selection terminal 7c and the second common terminal 7b is maintained in a connection-completed state. The connection-completed state refers to a state in which a connection is completed and almost no reflected waves are generated when a signal is passed through the connection. That is, in the high-frequency circuit 1, the first switch 7 does not enter an indeterminate state in which both the connection between the first selection terminal 7c and the first common terminal 7a and the connection between the first selection terminal 7c and the second common terminal 7b are not simultaneously in a connection-completed state. In the indeterminate state of the first switch 7, both the connection between the first selection terminal 7c and the first common terminal 7a and the connection between the first selection terminal 7c and the second common terminal 7b are not in a connection-completed state. Therefore, when the output (SRS) of the power amplifier 12 flows from the first selection terminal 7c to the first common terminal 7a or the second common terminal 7b in the first switch 7, a reflected wave traveling back toward the power amplifier 12 is generated. However, in the high-frequency circuit 1 of embodiment 1, as described above, at least one of the connections between the first selection terminal 7c and the second common terminal 7b is maintained in a complete connection state, so the first switch 7 does not enter an unstable state. In this case, most of the output of the power amplifier 12 flows through at least one of the connections between the first selection terminal 7c and the first common terminal 7a and the first selection terminal 7c and the second common terminal 7b, which is in a complete connection state, so almost no reflected wave is generated. Therefore, damage to the power amplifier 12 due to the reflected wave can be reduced.

[0064] (6) Method for Checking the Operation of the High-Frequency Circuit 1 A method for checking the operation of the high-frequency circuit 1 will be described with reference to Fig. 4. More specifically, a method for measuring the times T11, T12, and T13 during the operation of the high-frequency circuit 1 will be described.

[0065] As shown in FIG. 4 , the high-frequency circuit 1 is mounted on an evaluation board 100. The evaluation board 100 is provided with an input unit 101, a power supply input unit 102, a signal input unit 103, a first output unit 104, and a second output unit 105. The input unit 101 is connected to an external terminal 6d of the high-frequency circuit 1. A signal q1 (high-frequency signal) generated by an external signal generator 106 is input to the input unit 101. The power supply input unit 102 is connected to a power supply input unit (not shown) of the high-frequency circuit 1. Power from an external power supply 107, which is used to operate the high-frequency circuit 1, is input to the power supply input unit 102. The signal input unit 103 is connected to an external terminal 6e of the high-frequency circuit 1. Control signals (such as control signals S1 and S2) generated by an external signal output unit 108 (e.g., an FPGA (Field Programmable Gate Array)) are input to the signal input unit 103. The first output unit 104 is connected to the external terminal 6a (first antenna terminal) of the high-frequency circuit 1 and outputs an output signal q2 from the external terminal 6a to the outside. This output signal q2 is measured by an external measuring instrument 109 (e.g., a spectrum analyzer (SA)). The second output unit 105 is connected to the external terminal 6b (second antenna terminal) of the high-frequency circuit 1 and outputs an output signal q2 from the external terminal 6b to the outside. This output signal q2 is measured by an external measuring instrument 110 (e.g., a spectrum analyzer (SA)). The signal q1 generated by the signal generator 106 and the output signals q2 and q3 measured by the measuring instruments 109 and 110 are synchronized with each other and output to an oscilloscope 111. The oscilloscope 111 can measure the time fluctuations of the signals q1 to q3.

[0066] When measuring the times T11, T12, and T13 during operation of the high-frequency circuit 1, in the evaluation board 100 on which the high-frequency circuit 1 is mounted as described above, a control signal generated by the signal output device 108 is input to the signal input device 103 while the signal q1 (SRS) from the signal generator 106 is input to the input device 101, causing the high-frequency circuit 1 to operate in accordance with the control method for the high-frequency circuit 1 described above. This operation switches the first switch 7 in accordance with the control method for the high-frequency circuit 1 described above. Then, the signals q2 and q3 output from the first output device 104 and the second output device 105 are measured by measuring devices 109 and 110. The signal q1 generated by the signal generator 106 and the output signals q2 and q3 measured by the measuring devices 109 and 110 are measured synchronously with each other by an oscilloscope 111, thereby measuring the time fluctuations of the signals q1 to q3. From these measurement results, the times T11, T12, and T13 are measured.

[0067] (7) Effects The control method for the high-frequency circuit 1 according to the first embodiment includes a receiving step ST1 and a control step ST2. In the receiving step ST1, an SRS request signal is received. In the control step ST2, the first switch 7 is controlled in accordance with the received SRS request signal to transmit the SRS from the power amplifier 12 from the first antenna 3A and the second antenna 3B. The first switch 7 has a first common terminal 7a, a second common terminal 7b, and a first selection terminal 7c. The first common terminal 7a is connected to the first antenna terminal 6a. The second common terminal 7b is connected to the second antenna terminal 6b. The first selection terminal 7c is connectable to the first common terminal 7a and the second common terminal 7b. The first antenna terminal 6a is connected to the first antenna 3A. The second antenna terminal 6b is connected to the second antenna 3B. The power amplifier 12 is connected to the first selection terminal 7c. The control step ST2 includes a first transmission control step ST21, a connection step ST22, a disconnection step ST24, and a second transmission control step ST25. In the first transmission control step ST21, the SRS from the power amplifier 12 is transmitted from the first antenna 3A while the first common terminal 7a and the first selection terminal 7c are connected. In the connection step ST22, after the first transmission control step ST21, the second common terminal 7b and the first selection terminal 7c are connected while the first common terminal 7a and the first selection terminal 7c are connected. In the disconnection step ST24, after the connection step ST22, the connection between the first common terminal 7a and the first selection terminal 7c is disconnected while the second common terminal 7b and the first selection terminal 7c are connected. In the second transmission control step ST25, after the disconnection step ST24, the SRS from the power amplifier 12 is transmitted from the second antenna 3B.

[0068] According to this configuration, in the connection step ST22, the second common terminal 7b is connected to the first selection terminal 7c while the first common terminal 7a is connected to the first selection terminal 7c. Then, in the disconnection step ST24, the first common terminal 7a is disconnected from the first selection terminal 7c while the second common terminal 7b is connected to the first selection terminal 7c. Therefore, when the connection of the first selection terminal 7c is switched from the first common terminal 7a to the second common terminal 7b, at least one of the connection between the first common terminal 7a and the first selection terminal 7c and the connection between the second common terminal 7b and the first selection terminal 7c is always maintained. Therefore, the state of the first switch 7 is not in an unstable state during the switching of the first switch 7. This reduces damage to the power amplifier 12 due to reflected SRS waves at the first switch 7 during the switching operation.

[0069] Moreover, the control method for the high-frequency circuit 1 according to the first embodiment further includes a connection maintaining step ST23. In the connection maintaining step ST23, between the connecting step ST22 and the disconnecting step ST24, the connection between the second common terminal 7b and the first selected terminal 7c is maintained while the first common terminal 7a and the first selected terminal 7c are connected. In the connection maintaining step ST23, the time during which the connection between the second common terminal 7b and the first selected terminal 7c is maintained (second certain time T12) is shorter than the time from the start to the completion of the process of connecting the second common terminal 7b and the first selected terminal 7c in the connecting step ST22 (first certain time T11).

[0070] According to this configuration, the time (second certain time T12) during which the connection between the second common terminal 7b and the first selection terminal 7c is maintained in the connection maintaining step ST23 can be shortened as much as possible. In other words, the state in which the SRS is transmitted from both the first antenna 3A and the second antenna 3B can be shortened.

[0071] Furthermore, in the control method for the high-frequency circuit 1 according to the first embodiment, a first filter (e.g., the duplexer 10) is connected between the power amplifier 12 and the first selection terminal 7c of the first switch 7. According to this configuration, in a configuration in which the first filter is connected between the power amplifier 12 and the first selection terminal 7c of the first switch 7, damage to the first filter due to reflected waves of SRS at the first switch 7 during switching can be further reduced.

[0072] Furthermore, in the control method for the high-frequency circuit 1 according to the first embodiment, the first switch 7 further includes a second selection terminal 7d connectable to the first common terminal 7a and the second common terminal 7b. A second filter (e.g., duplexer 11) is connected between the power amplifier 12 and the second selection terminal 7d of the first switch 7. A second switch 8 is connected between the power amplifier 12 and the first filter (e.g., duplexer 10) and the second filter (e.g., duplexer 11). The second switch 8 can connect the power amplifier 12 to the first filter and the second filter. This configuration further reduces damage to the second filter and the second switch 8 due to reflected waves of SRS at the first switch 7 during switching in a configuration in which the second switch 8 is connected between the power amplifier 12 and the first filter and the second filter.

[0073] Furthermore, in the control method for the high-frequency circuit 1 according to the first embodiment, the matching circuit 14 is connected between the power amplifier 12 and the second switch 8. According to this configuration, in a configuration in which the matching circuit 14 is connected between the power amplifier 12 and the second switch 8, it is possible to further reduce damage to the matching circuit 14 due to the reflected wave of the SRS at the first switch 7 during switching.

[0074] Furthermore, in the control method for the high-frequency circuit 1 according to the first embodiment, the first filter is a duplexer 10. The first filter includes a transmit filter 10T and a receive filter 10R. The transmit filter 10T outputs a transmit signal from the second switch 8 to a first selection terminal 7c of the first switch 7. The receive filter 10R outputs a receive signal from the first selection terminal 7c to a downstream circuit (e.g., a low-noise amplifier 13). With this configuration, in a configuration in which the first filter is a duplexer 10, damage to the power amplifier 12 due to reflected waves of SRS at the first switch 7 during switching can be reduced.

[0075] Furthermore, in the control method for the high-frequency circuit 1 according to the first embodiment, the subsequent circuit is the low-noise amplifier 13 that amplifies the received signal from the receiving filter 10R. According to this configuration, in a configuration in which the subsequent circuit is the low-noise amplifier 13, it is possible to reduce damage to the power amplifier 12 caused by the reflected wave of the SRS at the first switch 7 during switching.

[0076] (8) Aspects other than the control method of the high-frequency circuit Functions similar to the control method of the high-frequency circuit 1 according to embodiment 1 may be embodied in a computer program (program), a non-transitory recording medium on which a computer program is recorded, the high-frequency circuit 1, etc.

[0077] A program according to one aspect causes one or more processors to execute the control method for a high-frequency circuit according to the first embodiment.

[0078] A non-transitory recording medium according to one embodiment stores a program for causing a computer to execute the method for controlling a high-frequency circuit.

[0079] A high-frequency circuit 1 according to one aspect includes a first switch 7 (switch), a power amplifier 12, and a control circuit 16. The power amplifier 12 is connected to the first switch 7. The control circuit 16 controls the first switch 7 and the power amplifier 12. The first switch 7 has a first common terminal 7a, a second common terminal 7b, and a first selection terminal 7c (selection terminal). The first common terminal 7a is connected to the first antenna terminal 6a. The second common terminal 7b is connected to the second antenna terminal 6b. The first selection terminal 7c is connectable to the first common terminal 7a and the second common terminal 7b. The first antenna terminal 6a is connected to the first antenna 3A. The second antenna terminal 6b is connected to the second antenna 3B. The power amplifier 12 is connected to the first selection terminal 7c. The control circuit 16 has a first transmission control function, a connection function, a disconnection function, and a second transmission control function. The first transmission control function (first transmission control step ST21) controls the first switch 7 in response to the SRS request signal to transmit the SRS from the power amplifier 12 from the first antenna 3A and the second antenna 3B. The connection function (connection step ST22) connects the second common terminal 7b to the first selection terminal 7c while keeping the first common terminal 7a connected to the first selection terminal 7c after processing of the first transmission control function. The disconnection function (disconnection step ST24) disconnects the connection between the first common terminal 7a and the first selection terminal 7c while keeping the second common terminal 7b and the first selection terminal 7c connected after processing of the connection function. The second transmission control function (second transmission control step ST25) transmits the SRS from the power amplifier 12 from the second antenna 3B after processing of the disconnection function.

[0080] (9) Modification A modification of the first embodiment will be described.

[0081] (9-1) Modification 1 In the first embodiment, the control unit 7e of the first switch 7, the control unit 8d of the second switch 8, and the control unit 9d of the third switch 9 may be configured integrally with the controller 15. For example, the control units 7e, 8d, and 9d may be configured together with the controller 15 as a single IC chip.

[0082] (Embodiment 2) A high-frequency circuit 1 according to embodiment 2 will be described in detail with reference to the drawings. The high-frequency circuit 1 according to embodiment 2 has the same configuration as the high-frequency circuit 1 according to embodiment 1 except for the operation.

[0083] 1, the configurations of the high-frequency circuit 1 and the communication device 30 according to the second embodiment are similar to those of the high-frequency circuit 1 and the communication device 30 according to the first embodiment. Therefore, in the description of the configuration of the high-frequency circuit 1 and the communication device 30 according to the second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals as those in the first embodiment, and the description thereof will be omitted.

[0084] (2) Operation The operation of the high frequency circuit 1 (i.e., the method of controlling the high frequency circuit 1) will be described with reference to FIG.

[0085] The operation of the high-frequency circuit 1 according to the second embodiment differs from the operation of the high-frequency circuit 1 according to the first embodiment (see FIG. 3 ) in that the output of the power amplifier 12 is temporarily lowered from a high level to a low level (ST33), and the first switch 7 is switched during that time.

[0086] 2, the operation of the high-frequency circuit 1 according to the second embodiment includes a receiving step ST1 and a control step ST3. The receiving step ST1 of the second embodiment is the same as the receiving step ST1 of the first embodiment, and therefore a description thereof will be omitted.

[0087] As shown in Fig. 5, the control step ST3 of the second embodiment includes a first transmission control step ST31, a decrease step ST32, a switch step ST33, an increase step ST34, and a second transmission control step ST35. The first transmission control step ST31 and the second transmission control step ST35 are respectively the same as the first transmission control step ST21 and the second transmission control step ST25 (see Fig. 3) of the first embodiment. In the following explanation, the explanation of the same steps as in the first embodiment will be omitted, and the explanation will focus on the steps that are different from the first embodiment.

[0088] In the first transmission control step ST31, similarly to the first transmission control step ST21 (see FIG. 3) of the first embodiment, when the control signal S1 is input from the signal processing circuit 2, the control circuit 16 of the high-frequency circuit 1 controls the first to third switches 7 to 9 and the power amplifier 12 to transmit the output (SRS) of the power amplifier 12 to the base station from the first antenna 3A while connecting the first common terminal 7a and the first selection terminal 7c of the first switch 7.

[0089] When the SRS is transmitted from the first antenna 3A in the first transmission control step ST31, the signal processing circuit 2 outputs a control signal S3 to the controller 15 and the first switch 7 (see (a) of FIG. 5). The control signal S3 is a control signal that instructs the first switch 7 to switch from the first state to the second state. The first state is a state in which the first common terminal 7a and the first selection terminal 7c are connected and the second common terminal 7b and the first selection terminal 7c are disconnected. The second state is a state in which the first common terminal 7a and the first selection terminal 7c are disconnected and the second common terminal 7b and the first selection terminal 7c are connected. When the control signal S3 from the signal processing circuit 2 is input to the control circuit 16 of the high-frequency circuit 1, the processing of the control circuit 16 transitions from the first transmission control step ST31 to a reduction step ST32.

[0090] In the decrease step ST32, when the control signal S3 is input from the signal processing circuit 2, the controller 15 decreases the signal level of the control signal input to the control electrode of the semiconductor switching element of the power amplifier 12 from high to low (see (b) of FIG. 5), thereby decreasing the output (SRS) of the power amplifier 12 from high to a predetermined output level Q1 or lower.

[0091] In the reduction step ST32, the control unit 7e of the first switch 7 does not switch the first switch 7 (see (c) of FIG. 5). That is, the state of the first switch 7 is maintained in the first state (i.e., the first switch 7 connects the first selection terminal 7c to the first common terminal 7a and disconnects the first selection terminal 7c from the second common terminal 7b). This maintains a state in which the output of the power amplifier 12 is transmitted from the first antenna 3A but not from the second antenna 3B. In the reduction step ST32, as described above, the output of the power amplifier 12 drops below the predetermined output level Q1, and the output of the first antenna 3A also drops below the predetermined output level Q1 ((d) of FIG. 5). The predetermined output level Q1 is an output level low enough that the reflected wave of the output (SRS) of the power amplifier 12 at the first switch 7 does not damage the power amplifier 12. The reduction step ST32 requires a first fixed time T21 from the start to completion of the process (i.e., until the output of the first antenna 3A (i.e., the output of the power amplifier 12) drops from a high level to a predetermined output level Q1 or less). After the first fixed time T21 has elapsed and the process of the reduction step ST32 is completed, the process of the control circuit 16 of the high-frequency circuit 1 shifts from the reduction step ST32 to a switching step ST33.

[0092] In the switching step ST33, the control unit 7e of the first switch 7 switches the state of the first switch 7 from the first state to the second state after a first predetermined time T21 has elapsed since the control signal S3 was input from the signal processing circuit 2. That is, the connection of the first selection terminal 7c is switched from the first common terminal 7a to the second common terminal 7b (see (c) of FIG. 5 ). In the switching step ST33, a second predetermined time T22 is required from the start to the completion of the switching of the first switch 7 (i.e., from the start to the completion of the disconnection of the first common terminal 7a and the first selection terminal 7c, and from the start to the completion of the connection of the second common terminal 7b and the first selection terminal 7c). In the switching step ST33, as the switching of the first switch 7 progresses, the output of the first antenna 3A gradually decreases and the output of the second antenna 3B gradually increases (see (d) of FIG. 5 ). During this time, the output of the first antenna 3A and the output of the second antenna 3B are both equal to or lower than a predetermined output level Q1 (see FIG. 5(d)).

[0093] During the switching step ST33, the first selection terminal 7c of the first switch 7 is in an indefinite state, with insufficient connection to both the first common terminal 7a and the second common terminal 7b. Therefore, whether the output (SRS) of the power amplifier 12 flows from the first selection terminal 7c to the first common terminal 7a (first antenna 3A side) (first case) or from the first selection terminal 7c to the second common terminal 7b (second antenna 3B side) (second case), a reflected wave traveling back toward the power amplifier 12 is generated when passing through the first switch 7. However, because the outputs of the first antenna 3A and the second antenna 3B are both below a predetermined output level Q1, the reflected wave generated in the first case and the reflected wave generated in the second case are both below the predetermined output level. This reduces damage to the power amplifier 12 caused by the reflected wave generated in the first case and the reflected wave generated in the second case.

[0094] Then, after a second fixed time T22 has elapsed since the transition to the switching step ST33, and the processing in the switching step ST33 is completed (i.e., when the first common terminal 7a and the first selection terminal 7c of the first switch 7 are disconnected and the second common terminal 7b and the first selection terminal 7c are connected), the processing of the control circuit 16 of the high-frequency circuit 1 transitions from the switching step ST33 to the increase step ST34.

[0095] In the increasing step ST34, the controller 15 automatically controls the signal level of the control signal input to the control electrode of the semiconductor switching element of the power amplifier 12 from low to high (see FIG. 5(b)) when a certain time T24 (i.e., the sum of the first certain time T21 and the second certain time T22) has elapsed since the control signal S3 was input from the signal processing circuit 2. By this control, the controller 15 increases the output of the power amplifier 12 from a level equal to or lower than the predetermined output level Q1 to the original high level.

[0096] In the increasing step ST34, as described above, in the first switch 7, the first selection terminal 7c is connected to the second common terminal 7b, not to the first common terminal 7a. Therefore, the entire output of the power amplifier 12 is output to the second antenna 3B. Therefore, in the increasing step ST34, as the output (SRS) of the power amplifier 12 increases to a high level as described above, the output of the second antenna 3B also increases to a high level (see (d) in FIG. 5).

[0097] In the increasing step ST34, a third fixed time T23 is required from the start to completion of the processing (i.e., until the signal level of the control signal to the power amplifier 12 rises from low to high). Then, when the third fixed time T23 has elapsed since the transition to the increasing step ST34 and the processing of the increasing step ST34 is completed, the processing of the control circuit 16 of the high-frequency circuit 1 transitions from the increasing step ST34 to a second transmission control step ST35.

[0098] In the second transmission control step ST35, similarly to the second transmission control step ST25 in embodiment 1, the output (SRS) of the power amplifier 12 does not flow from the first selection terminal 7c to the first common terminal 7a in the first switch 7, but flows from the first selection terminal 7c to the second common terminal 7b and is transmitted to the base station from the second antenna 3B. At this time, the output of the second antenna 3B is at a high level, and the output of the first antenna 3A is at a low level (see (d) in FIG. 5).

[0099] In this way, the high-frequency circuit 1 transmits the SRS from the signal processing circuit 2 to the base station using a certain communication band (for example, the first communication band) in sequence from the multiple antennas 3. Then, the control step ST3 ends (see FIG. 2).

[0100] (3) Characteristics of Reducing Reflection of SRS at the First Switch 7 As described above, in the high-frequency circuit 1, the first switch 7 is switched while the output of the power amplifier 12 is reduced to a predetermined output level Q1 or less (switching step ST33). Therefore, even if the first switch 7 is in an unstable state during switching of the first switch 7 and the output of the power amplifier 12 is reflected by the first switch 7, the signal level of the reflected wave generated by the reflection is equal to or less than the predetermined output level Q1. Therefore, damage to the power amplifier 12 due to the reflected wave of SRS at the first switch 7 can be reduced.

[0101] (4) Effects The control method for the high-frequency circuit 1 according to the second embodiment includes a receiving step ST1 and a control step ST3. In the receiving step ST1, an SRS request signal is received. In the control step ST3, the first switch 7 and the power amplifier 12 are controlled in accordance with the received SRS request signal to transmit the SRS from the power amplifier 12 sequentially from the first antenna 3A and the second antenna 3B. The first switch 7 has a first common terminal 7a, a second common terminal 7b, and a first selection terminal 7c. The first common terminal 7a is connected to the first antenna terminal 6a. The second common terminal 7b is connected to the second antenna terminal 6b. The first selection terminal 7c is connectable to the first common terminal 7a and the second common terminal 7b. The first antenna terminal 6a is connected to the first antenna 3A. The second antenna terminal 6b is connected to the second antenna 3B. The power amplifier 12 is connected to the first selection terminal 7c. The control step ST3 includes a first transmission control step ST31, a reduction step ST32, a switching step ST33, and a second transmission control step ST35. In the first transmission control step ST31, the SRS from the power amplifier 12 is transmitted from the first antenna 3A with the first common terminal 7a and the first selection terminal 7c connected. In the reduction step ST32, the output of the power amplifier 12 is reduced after the first transmission control step ST31. In the switching step ST33, the connection between the first common terminal 7a and the first selection terminal 7c is disconnected and the second common terminal 7b and the first selection terminal 7c are connected after the reduction step ST32. In the second transmission control step ST25, after the switching step ST33, the SRS from the power amplifier 12 is transmitted from the second antenna 3B.

[0102] According to this configuration, the switching step ST33 is performed after the decreasing step ST32. As a result, the output of the power amplifier 12 can be reduced during the switching step ST33 (i.e., while the first switch 7 is in an unstable state). Therefore, the reflection of SRS from the power amplifier 12 at the first switch 7 can be reduced. As a result, damage to the power amplifier 12 due to the reflected SRS at the first switch 7 during switching can be reduced.

[0103] (5) Aspects other than the control method of the high-frequency circuit A function similar to the control method of the high-frequency circuit 1 according to embodiment 2 may be embodied in a computer program (program), a non-transitory recording medium on which a computer program is recorded, the high-frequency circuit 1, etc.

[0104] A program according to one aspect causes one or more processors to execute the control method for a high-frequency circuit according to the first embodiment.

[0105] A non-transitory recording medium according to one embodiment stores a program for causing a computer to execute the method for controlling a high-frequency circuit.

[0106] A high-frequency circuit 1 according to one aspect includes a first switch 7 (switch), a power amplifier 12, and a control circuit 16. The power amplifier 12 is connected to the first switch 7. The control circuit 16 controls the first switch 7 and the power amplifier 12. The first switch 7 has a first common terminal 7a, a second common terminal 7b, and a first selection terminal 7c (selection terminal). The first common terminal 7a is connected to the first antenna terminal 6a. The second common terminal 7b is connected to the second antenna terminal 6b. The first selection terminal 7c is connectable to the first common terminal 7a and the second common terminal 7b. The first antenna terminal 6a is connected to the first antenna 3A. The second antenna terminal 6b is connected to the second antenna 3B. The power amplifier 12 is connected to the first selection terminal 7c. The control circuit 16 has a first transmission control function, a reduction function, a switching function, and a second transmission control function. The first transmission control function transmits the SRS from the power amplifier 12 from the first antenna 3A while connecting the first common terminal 7a and the first selection terminal 7c. The reduction function reduces the output of the power amplifier 12 after processing by the first transmission control function. The switching function disconnects the first common terminal 7a from the first selection terminal 7c and connects the second common terminal 7b to the first selection terminal 7c after processing by the reduction function. The second transmission control function transmits the SRS from the power amplifier 12 from the second antenna (3B) after processing by the switching function.

[0107] (6) Modifications Modifications of the second embodiment will be described. The modifications described below can be implemented in combination.

[0108] 6, in Modification 1, the controller 15 controls the power amplifier 12 so that the output of the power amplifier 12 increases to the original high level in response to a control signal S4 input from the signal processing circuit 2. Modification 2 will be described in detail below.

[0109] In the second modification, the signal processing circuit 2 inputs a control signal S4 to the controller 15 at a predetermined timing after a certain time T25 (which is equal to or longer than the sum of the first certain time T21 and the second certain time T22) has elapsed since the control signal S3 was input to the controller 15. The control signal S4 is a control signal that instructs the power amplifier 12 to increase its output to its original output level. In the second modification, when the second certain time T22 has elapsed since the transition to the switching step S33, the processing of the switching step ST33 ends. Then, until the control signal S4 (described later) is input to the control circuit 16 (controller 15), the processing of the control circuit 16 enters a standby state, waiting for the input of the control signal S4. Then, when the control signal S4 is input to the controller 15, the processing of the control circuit 16 of the high-frequency circuit 1 transitions from the standby state to the increasing step ST34.

[0110] In the increasing step ST34, the controller 15 controls the power amplifier 12 to increase the output of the power amplifier 12 to the original output level in response to the control signal S4 input from the signal processing circuit 2. More specifically, the controller 15 controls the signal level of the control signal input to the control electrode of the semiconductor switching element of the power amplifier 12 from low to high. After the start of this control, when a third fixed time T23 has elapsed and the processing in the increasing step ST34 is completed, the processing of the control circuit 16 of the high-frequency circuit 1 transitions from the increasing step ST34 to a second transmission control step ST35.

[0111] Then, in the second transmission control step ST35, similar to the second transmission control step ST25 in embodiment 1, the output (SRS) of the power amplifier 12 flows from the first selection terminal 7c to the second common terminal 7b in the first switch 7 and is transmitted to the base station from the second antenna 3B. Then, the control step ST3 ends (see FIG. 2).

[0112] In the first modification, an increasing step ST34 is further provided between the switching step ST33 and the second transmission control step ST35. In the increasing step ST34, the output of the power amplifier 12 is increased in response to the control signal S4. With this configuration, the timing of increasing the output of the power amplifier 12 can be freely controlled by the control signal S4.

[0113] 7, a high-frequency circuit 1A according to Modification 2 differs from the high-frequency circuit 1 according to Embodiment 2 in that it further includes a plurality of power amplifiers 12 connected in parallel with each other, a plurality of phase shifters 17 and 18, a distribution point N1, and a combining point N2. Modification 2 will be described in detail below.

[0114] (6-2-1) Description of Configuration As shown in Fig. 7, the multiple power amplifiers 12 include a first power amplifier 12A and a second power amplifier 12B. The first power amplifier 12A and the second power amplifier 12B constitute a Doherty amplifier. The first power amplifier 12A functions as a carrier amplifier, and the second power amplifier 12B functions as a peak amplifier. In the Doherty amplifier, only the carrier amplifier operates at low output, and both the carrier amplifier and the peak amplifier operate at high output.

[0115] The first power amplifier 12A has an input port 12a and an output port 12b. The input port 12a is connected to a distribution point N1 via a phase shifter 17. The output port 12b is connected to a combining point N2 via a phase shifter 18. The first power amplifier 12A amplifies an input signal (transmission signal or SRS) input to the input port 12a and outputs the amplified signal from the output port 12b.

[0116] The second power amplifier 12B has an input port 12c and an output port 12d. The input port 12c is connected to the distribution point N1. The output port 12b is connected to the combining point N2. The second power amplifier 12B amplifies the input signal (transmission signal or SRS) input to the input port 12c and outputs the amplified signal from the output port 12d.

[0117] The phase shifter 17 is connected between the distribution point N1 and the input 12a of the first power amplifier 12A to adjust the phase of the signal input to the first power amplifier 12A. The phase shifter 18 is connected between the output 12b of the first power amplifier 12A and the combining point N2 to adjust the phase of the signal output from the first power amplifier 12A.

[0118] The distribution point N1 is connected to the external terminal 6d. The distribution point N1 is electrically connected to each input portion of the plurality of power amplifiers 12 (the input portion 12a of the first power amplifier 12A and the input portion 12c of the second power amplifier 12B). The distribution point N1 distributes and outputs the signal from the external terminal 6d to each input portion of the plurality of power amplifiers 12. Although the distribution point N1 is a node in FIG. 7, it may also be a distribution circuit.

[0119] The combining point N2 is connected to the common terminal 8a of the second switch 8 via the matching circuit 14. The combining point N2 is electrically connected to the output sections of the plurality of power amplifiers 12 (the output section 12b of the first power amplifier 12A and the output section 12d of the second power amplifier 12B). The combining point N2 combines and outputs the signals output from the output sections of the plurality of power amplifiers 12. Although the combining point N2 is a node in FIG. 7, it may be a combining circuit.

[0120] The controller 15 controls the output of each of the multiple power amplifiers 12 in response to a control signal from the signal processing circuit 2. For example, when transmitting an SRS, the controller 15 temporarily reduces the output of one of the multiple power amplifiers (e.g., the second power amplifier 12B) like the power amplifier 12 in embodiment 2, and maintains the output of the remaining power amplifiers 12 (e.g., the first power amplifier 12A) at a high level. As a result, the combined output of the multiple power amplifiers 12 is temporarily reduced.

[0121] The control unit 7e of the first switch 7 switches the first switch 7 in response to a control signal from the signal processing circuit 2, as in the second embodiment. The control unit 8d of the second switch 8 and the control unit 9d of the third switch 9 also switch the second switch 8 and the third switch 9 in response to a control signal from the signal processing circuit 2, as in the second embodiment.

[0122] 8, the operation of the high-frequency circuit 1A according to Modification 2 differs from the operation of the high-frequency circuit 1 according to Embodiment 2 in that the output of only one power amplifier 12 (second power amplifier 12B) among the multiple power amplifiers 12 temporarily drops, and during that time (switching step ST33) the first switch 7 is switched. The operation of the high-frequency circuit 1A according to Modification 2 will be described in detail below.

[0123] In a first transmission control step ST31, when the controller 15 receives a control signal S1 from the signal processing circuit 2 (see (a) of FIG. 8), the controller 15 controls the signal level of the control signal input to the control electrode of each of the semiconductor switching elements of the multiple power amplifiers 12 (first power amplifier 12A and second power amplifier 12B) to a high level ((b) and (c) of FIG. 8). Through this control, the controller 15 controls the output of each of the multiple power amplifiers 12 to a high level. As a result, a combined output obtained by combining the outputs of the multiple power amplifiers 12 flows as an SRS through the matching circuit 14 and the second switch 8 and is output to the first selection terminal 7c of the first switch 7.

[0124] Furthermore, in the first transmission control step ST31, the control unit 7e of the first switch 7 connects the first selection terminal 7c to the first common terminal 7a and disconnects the first selection terminal 7c from the second common terminal 7b, as in the second embodiment (see (d) of FIG. 8). By switching the first switch 7 in this manner, in the first transmission control step ST31, the combined output (SRS) of the multiple power amplifiers 12 flows between the first selection terminal 7c and the first common terminal 7a in the first switch 7, as in the second embodiment, and is transmitted from the first antenna 3A to the base station. At this time, the output of the first antenna 3A becomes high level, and the output of the second antenna 3B becomes low level (see (e) of FIG. 8). When the control signal S3 from the signal processing circuit 2 is input to the control circuit 16 of the high-frequency circuit 1A, the process of the control circuit 16 transitions from the first transmission control step ST31 to the reduction step ST32.

[0125] In the decrease step ST32, when the controller 15 receives the control signal S3 from the signal processing circuit 2, the controller 15 controls the outputs of the power amplifiers 12 so that the output of one of the power amplifiers 12 (the second power amplifier 12B) is decreased and the output of the remaining power amplifier 12 (the first power amplifier 12A) is maintained at a high level. More specifically, the controller 15 maintains the signal level of the control signal input to the control electrode of the semiconductor switching element of the first power amplifier 12A at a high level for the first power amplifier 12A (see (b) of FIG. 8). Furthermore, the controller 15 controls the signal level of the control signal input to the control electrode of the semiconductor switching element of the second power amplifier 12B from a high level to a low level for the second power amplifier 12B, similar to the signal level of the control signal input to the power amplifier 12 in the decrease step ST32 of the second embodiment (see (c) of FIG. 8).

[0126] In this manner, by reducing the output of one of the multiple power amplifiers 12, the combined output (SRS) of the multiple power amplifiers 12 drops to a predetermined output level Q1 or less. In this case, all of the combined outputs of the multiple power amplifiers 12 are output to the first antenna 3A side by the first switch 7, and therefore the output of the first antenna 3A drops to a predetermined output level Q1 or less as the combined outputs of the multiple power amplifiers 12 drop (see (e) of FIG. 8 ). Then, when a first predetermined time T21 has elapsed since the transition to the reduction step ST32 and the processing of the reduction step ST32 is completed, the processing of the control circuit 16 of the high-frequency circuit 1A transitions from the reduction step ST32 to a switching step ST33.

[0127] In the switching step ST33, similar to the switching step ST33 in the second embodiment, the control unit 7e of the first switch 7 disconnects the first common terminal 7a from the first selection terminal 7c and connects the second common terminal 7b to the first selection terminal 7c after a first fixed time T21 has elapsed since the control signal S3 was input from the signal processing circuit 2 (see (d) of Figure 8).

[0128] During the processing of the switching step ST33, similar to the switching step ST33 in the second embodiment, the first selection terminal 7c of the first switch 7 is in an indeterminate state in which connection with both the first common terminal 7a and the second common terminal 7b is not completed. Therefore, whether the combined output (SRS) of the multiple power amplifiers 12 flows from the first selection terminal 7c to the first common terminal 7a (first antenna 3A side) in the first switch 7 (first case) or from the first selection terminal 7c to the second common terminal 7b (second antenna 3B side) (second case), a reflected wave traveling back toward the power amplifier 12 is generated when passing through the first switch 7. However, because the output of the first antenna 3A and the output of the second antenna 3B are both below a predetermined output level Q1, the reflected wave generated in the first case and the reflected wave generated in the second case are both below the predetermined output level. This reduces damage to the power amplifier 12 caused by the reflected wave generated in the first case and the reflected wave generated in the second case.

[0129] Then, when a second fixed time T22 has elapsed since the transition to the switching step ST33 and the processing in the switching step ST33 is completed (i.e., when the first common terminal 7a and the first selection terminal 7c of the first switch 7 are disconnected and the second common terminal 7b and the first selection terminal 7c are connected), the processing of the control circuit 16 of the high-frequency circuit 1A transitions from the switching step ST33 to the increase step ST34.

[0130] In the increasing step ST34, the controller 15 automatically controls the signal level of the control signal input to the control electrode of the semiconductor switching element of the second power amplifier 12B from low to high when a certain time T24 (i.e., the sum of the first certain time T21 and the second certain time T22) has elapsed since the control signal S3 was input from the signal processing circuit 2 ((c) of FIG. 8). Through this control, the controller 15 increases the output of the second power amplifier 12B to its original high level. In this way, by increasing the output of one power amplifier 12 (the second power amplifier 12B) of the multiple power amplifiers 12 to its original high level, the combined output (SRS) of the multiple power amplifiers 12 increases to its original output level (high level).

[0131] In the increasing step ST34, the first selection terminal 7c of the first switch 7 is connected to the second common terminal 7b, not to the first common terminal 7a. Therefore, all of the combined outputs of the multiple power amplifiers 12 are output to the second antenna 3B. Therefore, in the increasing step ST34, as the combined output (SRS) of the multiple power amplifiers 12 increases to a high level as described above, the output of the second antenna 3B also increases to a high level (see (e) in FIG. 8).

[0132] Then, after the third fixed time T23 has elapsed since the transition to the increase step ST34 and the processing of the increase step ST34 has been completed, the processing of the control circuit 16 of the high-frequency circuit 1A transitions from the increase step ST34 to the second transmission control step ST35.

[0133] Then, in a second transmission control step ST35, the combined output (SRS) of the multiple power amplifiers 12 does not flow from the first selection terminal 7c to the first common terminal 7a in the first switch 7, but flows from the first selection terminal 7c to the second common terminal 7b and is transmitted to the base station from the second antenna 3B. At this time, the output of the second antenna 3B is at a high level, and the output of the first antenna 3A is at a low level (see (e) in FIG. 8).

[0134] In this way, the high-frequency circuit 1A transmits the SRS from the signal processing circuit 2 to the base station using a certain communication band (for example, the first communication band) in sequence from the multiple antennas 3. Then, the control step ST3 ends (see FIG. 2).

[0135] (6-2-3) Effects In the control method for the high-frequency circuit 1A according to the second modification, the power amplifier 12 is one of a plurality of power amplifiers 12 connected in parallel to one another. In the reduction step ST32, the output of any one of the plurality of power amplifiers 12 (e.g., the second power amplifier 12B) is reduced. With this configuration, simply reducing the output of one of the plurality of power amplifiers 12 can effectively reduce the combined output of the plurality of power amplifiers 12. Furthermore, compared to reducing the outputs of all of the plurality of power amplifiers 12, the responsiveness of the recovery of the combined output of the plurality of power amplifiers 12 after the first switch 7 is switched can be improved, thereby reducing the impact on communication quality.

[0136] 9, a high-frequency circuit 1B according to Modification 3 differs from the high-frequency circuit 1 according to Embodiment 2 in that it further includes a plurality of power amplifiers 12 connected in series with each other. Modification 2 will be described in detail below.

[0137] (6-3-1) Description of Configuration The plurality of power amplifiers 12 include a first power amplifier 12 A and a second power amplifier 12 B. The first power amplifier 12 A and the second power amplifier 12 B are connected in series with each other.

[0138] The first power amplifier 12A has an input section 12a and an output section 12b. The input section 12a is connected to the external terminal 6d. The output section 12b is connected to an input section 12c of the second power amplifier 12B. The first power amplifier 12A amplifies an input signal (transmission signal or SRS) input to the input section 12a and outputs the amplified signal from the output section 12b.

[0139] The second power amplifier 12B has an input port 12c and an output port 12d. The input port 12c is connected to the output port 12b of the first power amplifier 12A. The output port 12d is connected to the common terminal 8a of the second switch 8 via a matching circuit 14. The second power amplifier 12B amplifies the input signal (transmission signal or SRS) input to the input port 12c and outputs the amplified signal from the output port 12d.

[0140] The controller 15 controls the output of each of the multiple power amplifiers 12 in response to a control signal from the signal processing circuit 2. For example, when transmitting an SRS, the controller 15 temporarily reduces the output of one of the multiple power amplifiers (e.g., the second power amplifier 12B) like the power amplifier 12 in the second embodiment, and maintains the output of the remaining power amplifiers 12 (e.g., the first power amplifier 12A) at a high level. As a result, the output of the final-stage power amplifier 12 (e.g., the second power amplifier 12B) among the multiple power amplifiers 12 is temporarily reduced.

[0141] The control unit 7e of the first switch 7 switches the first switch 7 in response to a control signal from the signal processing circuit 2, as in the second embodiment. The control unit 8d of the second switch 8 and the control unit 9d of the third switch 9 also switch the second switch 8 and the third switch 9 in response to a control signal from the signal processing circuit 2, as in the second embodiment.

[0142] (6-3-2) Operation The operation of the high-frequency circuit 1B according to the third modification is the same as the operation of the high-frequency circuit 1A according to the second modification (FIG. 8), and therefore a description thereof will be omitted.

[0143] (6-3-3) Effects In the control method for the high-frequency circuit 1B according to the third modification, the power amplifier 12 is one of a plurality of power amplifiers 12 connected in series. In the reduction step ST32, the output of any one of the plurality of power amplifiers 12 (e.g., the second power amplifier 12B) is reduced. With this configuration, the outputs of the plurality of power amplifiers 12 can be effectively reduced simply by reducing the output of one of the plurality of power amplifiers 12. Compared to reducing the outputs of all of the plurality of power amplifiers 12, the responsiveness of the recovery of the output of the final-stage power amplifier 12 after the first switch 7 is switched can be improved, and the impact on communication quality can be reduced.

[0144] (6-4) Modification 4 The final-stage power amplifier 12 among the multiple power amplifiers 12 in Modification 3 of Embodiment 2 may be replaced with multiple power amplifiers 12 connected in parallel with each other, like the multiple power amplifiers 12 in Modification 2 of Embodiment 2.

[0145] Although the first and second embodiments and their modifications have been described above, the first and second embodiments and their modifications may be combined and implemented.

[0146] (Aspects) The present specification discloses the following aspects.

[0147] The control method for a high-frequency circuit (1) of the first aspect includes a receiving step (ST1) and a control step (ST2). In the receiving step (ST1), an SRS request signal is received. In the control step (ST2), a first switch (7) is controlled in accordance with the received SRS request signal to transmit the SRS from the power amplifier (12) from a first antenna (3A) and a second antenna (3B). The first switch (7) has a first common terminal (7a), a second common terminal (7b), and a first selection terminal (7c). The first common terminal (7a) is connected to the first antenna terminal (6a). The second common terminal (7b) is connected to the second antenna terminal (6b). The first selection terminal (7c) is connectable to the first common terminal (7a) and the second common terminal (7b). The first antenna terminal (6a) is connected to the first antenna (3A). The second antenna terminal (6b) is connected to the second antenna (3B). The power amplifier (12) is connected to the first selection terminal (7c). The control step (ST2) includes a first transmission control step (ST21), a connection step (ST22), a disconnection step (ST24), and a second transmission control step (ST25). In the first transmission control step (ST21), the SRS from the power amplifier (12) is transmitted from the first antenna (3A) while the first common terminal (7a) and the first selection terminal (7c) are connected. In the connection step (ST22), after the first transmission control step (ST21), the second common terminal (7b) and the first selection terminal (7c) are connected while the first common terminal (7a) and the first selection terminal (7c) are connected. In the disconnection step (ST24), after the connection step (ST22), the first common terminal (7a) and the first selection terminal (7c) are disconnected while the second common terminal (7b) and the first selection terminal (7c) are connected. In the second transmission control step (ST25), after the disconnection step (ST24), the SRS from the power amplifier (12) is transmitted from the second antenna (3B).

[0148] According to this configuration, in the connection step (ST22), the second common terminal (7b) is connected to the first selection terminal (7c) while the first common terminal (7a) is connected to the first selection terminal (7c). Then, in the disconnection step (ST24), the first common terminal (7a) is disconnected from the first selection terminal (7c) while the second common terminal (7b) is connected to the first selection terminal (7c). Therefore, when the connection of the first selection terminal (7c) is switched from the first common terminal (7a) to the second common terminal (7b), at least one of the connection between the first common terminal (7a) and the first selection terminal (7c) and the connection between the second common terminal (7b) and the first selection terminal (7c) is always maintained. Therefore, the state of the first switch (7) is not in an indeterminate state during the switching of the first switch (7). The indeterminate state is a state in which the first switch (7) has completed both the connection between the first common terminal (7a) and the first selection terminal (7c) and the connection between the second common terminal (7b) and the first selection terminal (7c), and therefore reflects the SRS from the power amplifier (12) toward the power amplifier (12). This reduces damage to the power amplifier (12) due to the reflected wave of the SRS at the first switch (7) during switching.

[0149] The control method for a high-frequency circuit (1) according to the second aspect is the same as that according to the first aspect, but further includes a connection maintaining step (ST23). In the connection maintaining step (ST23), the connection between the second common terminal (7b) and the first selection terminal (7c) is maintained while the first common terminal (7a) and the first selection terminal (7c) are connected between the first common terminal (7a) and the first selection terminal (7c). In the connection maintaining step (ST23), the time (T12) during which the connection between the second common terminal (7b) and the first selection terminal (7c) is maintained is shorter than the time (T11) from the start to the completion of the process of connecting the second common terminal (7b) and the first selection terminal (7c) in the connection step (ST22).

[0150] According to this configuration, in the connection maintaining step (ST23), the time (T12) during which the connection between the second common terminal (7b) and the first selection terminal (7c) is maintained can be shortened as much as possible, i.e., the state during which the SRS is transmitted from both the first antenna (3A) and the second antenna (3B) can be shortened.

[0151] A control method for a high-frequency circuit (1; 1A; 1B) according to a third aspect includes a receiving step (ST1) and a control step (ST3). In the receiving step (ST1), an SRS request signal is received. In the control step (ST2), a first switch (7) and a power amplifier (12) are controlled in accordance with the received SRS request signal to transmit the SRS from the power amplifier (12) from a first antenna (3A) and a second antenna (3B). The first switch (7) has a first common terminal (7a), a second common terminal (7b), and a first selection terminal (7c). The first common terminal (7a) is connected to a first antenna terminal (6a). The second common terminal (7b) is connected to a second antenna terminal (6b). The first selection terminal (7c) is connectable to the first common terminal (7a) and the second common terminal (7b). The first antenna terminal (6a) is connected to the first antenna (3A). The second antenna terminal (6b) is connected to the second antenna (3B). The power amplifier (12) is connected to the first selection terminal (7c). The control step (ST3) includes a first transmission control step (ST31), a reduction step (ST32), a switching step (ST33), and a second transmission control step (ST25). In the first transmission control step (ST21), the SRS from the power amplifier (12) is transmitted from the first antenna (3A) with the first common terminal (7a) and the first selection terminal (7c) connected. In the reduction step (ST32), after the first transmission control step (ST21), the output of the power amplifier (12) is reduced. In the switching step (ST33), after the decreasing step (ST32), the first common terminal (7a) is disconnected from the first selection terminal (7c), and the second common terminal (7b) is connected to the first selection terminal (7c). In the second transmission control step (ST25), after the switching step (ST33), the SRS from the power amplifier (12) is transmitted from the second antenna (3B).

[0152] According to this configuration, the switching step (ST33) is performed after the reduction step (ST32). This allows the output of the power amplifier (12) to be reduced during the switching step (ST33) (i.e., while the switch (7) is in an unstable state). Therefore, the reflection of SRS from the power amplifier (12) at the switch (7) can be reduced. As a result, damage to the power amplifier (12) due to the reflected wave of SRS at the switch (7) during switching can be reduced.

[0153] The control method for the high-frequency circuit (1; 1A; 1B) of the fourth aspect is the same as that of the third aspect, but further includes an increasing step (ST34) between the switching step (ST33) and the second transmission control step (ST35), and in the increasing step (ST34), the output of the power amplifier (12) is increased in response to the control signal (S4).

[0154] According to this configuration, the timing for increasing the output of the power amplifier (12) can be freely controlled by the control signal (S4).

[0155] In the control method for a high-frequency circuit (1; 1A; 1B) of the fifth aspect, in the third or fourth aspect, the power amplifier (12) is one of a plurality of power amplifiers (12) connected in parallel with each other. In the reduction step (ST32), the output of any one of the plurality of power amplifiers (12) is reduced.

[0156] According to this configuration, it is possible to effectively reduce the combined output of the multiple power amplifiers 12 simply by reducing the output of one power amplifier 12B among the outputs of the multiple power amplifiers 12. Furthermore, compared to reducing the outputs of all of the multiple power amplifiers 12, it is possible to improve the responsiveness of the recovery of the combined output of the multiple power amplifiers 12 after switching of the first switch 7, thereby reducing the impact on communication quality.

[0157] In the sixth aspect of the control method for a high-frequency circuit (1; 1A; 1B) of the third or fourth aspect, the power amplifier (12) is one of a plurality of power amplifiers (12) connected in series with each other. In the reduction step (ST32), the output of any one of the plurality of power amplifiers (12) is reduced.

[0158] According to this configuration, the output of the final-stage power amplifier 12 can be effectively reduced by simply reducing the output of one power amplifier 12B among the outputs of the multiple power amplifiers 12. Compared to reducing the outputs of all of the multiple power amplifiers 12, the responsiveness of the recovery of the output of the final-stage power amplifier 12 after switching of the first switch 7 can be improved, and the impact on communication quality can be reduced.

[0159] In a seventh aspect of the control method for a high-frequency circuit (1), in any one of the first to sixth aspects, a first filter (10) is connected between the power amplifier (12) and the first selection terminal (7c) of the first switch (7).

[0160] According to this configuration, in a configuration in which the first filter (10) is connected between the power amplifier (12) and the first selection terminal (7c) of the first switch (7), damage to the first filter (10) due to reflected waves of SRS at the first switch (7) during switching can be further reduced.

[0161] In the eighth aspect of the control method for a high-frequency circuit (1), in the seventh aspect, the first switch (7) further has a second selection terminal (7d) connectable to the first common terminal (7a) and the second common terminal (7b). A second filter (11) is connected between the power amplifier (12) and the second selection terminal (7d) of the first switch (7). A second switch (8) is connected between the power amplifier (12) and the first filter (10) and the second filter (11). The second switch (8) can connect the power amplifier (12) to the first filter (10) and the second filter (11).

[0162] According to this configuration, in a configuration in which the second switch (8) is connected between the power amplifier (12) and the first filter (10) and the second filter (11), damage to the second switch (8) due to reflected waves of SRS at the first switch (7) during switching can be further reduced.

[0163] In the control method for the high frequency circuit (1) of the ninth aspect, in the eighth aspect, a matching circuit (14) is connected between the power amplifier (12) and the second switch (8).

[0164] According to this configuration, in a configuration in which a matching circuit (14) is connected between the power amplifier (12) and the second switch (8), damage to the matching circuit (14) due to reflected waves of SRS at the first switch (7) during switching can be further reduced.

[0165] In a tenth aspect of the control method for a high-frequency circuit (1), in the ninth aspect, the first filter (10) is a duplexer. The first filter (10) has a transmit filter (10T) and a receive filter (10R). The transmit filter (10T) outputs a transmit signal from the second switch (8) to a first selection terminal (7c) of the first switch (7). The receive filter (10R) outputs a receive signal from the first selection terminal (7c) to a subsequent circuit (13).

[0166] According to this configuration, in a configuration in which the first filter (10) is a duplexer, it is possible to reduce damage to the power amplifier (12) caused by the reflected wave of the SRS at the first switch (7) during switching.

[0167] In the control method for the high frequency circuit (1) of the eleventh aspect, in the tenth aspect, the subsequent circuit (13) is a low noise amplifier (13) that amplifies the reception signal from the reception filter (10R).

[0168] According to this configuration, in a configuration in which the subsequent circuit (13) is a low-noise amplifier (13), damage to the power amplifier (12) due to reflected waves of SRS at the first switch (7) during switching can be reduced.

[0169] A program according to a twelfth aspect causes one or more processors to execute the control method for a high-frequency circuit (1) according to any one of the first to eleventh aspects.

[0170] According to this configuration, it is possible to provide a program that can execute the control method for the high frequency circuit (1).

[0171] A high-frequency circuit (1) according to a thirteenth aspect includes a switch (7), a power amplifier (12), and a control circuit (16). The power amplifier (12) is connected to the switch (7). The control circuit (16) controls the switch (7) and the power amplifier (12). The switch (7) has a first common terminal (7a), a second common terminal (7b), and a selection terminal (7c). The first common terminal (7a) is connected to a first antenna terminal (6a). The second common terminal (7b) is connected to a second antenna terminal (6b). The selection terminal (7c) is connectable to the first common terminal (7a) and the second common terminal (7b). The first antenna terminal (6a) is connected to a first antenna (3A). The second antenna terminal (6b) is connected to a second antenna (3B). The power amplifier (12) is connected to the selection terminal (7c). The control circuit (16) controls the switch (7) in response to the SRS request signal to transmit the SRS from the power amplifier (12) from the first antenna (3A) and the second antenna (3B) in that order. The control circuit (16) has a first transmission control function, a connection function, a disconnection function, and a second transmission control function. The first transmission control function transmits the SRS from the power amplifier (12) from the first antenna (3A) while the first common terminal (7a) and the selection terminal (7c) are connected. The connection function connects the second common terminal (7b) and the selection terminal (7c) while the first common terminal (7a) and the selection terminal (7c) are connected after processing the first transmission control function. The disconnection function disconnects the connection between the first common terminal (7a) and the selection terminal (7c) while the second common terminal (7b) and the selection terminal (7c) are connected after processing the connection function. The second transmission control function transmits the SRS from the power amplifier (12) from the second antenna (3B) after the processing of the disconnection function.

[0172] According to this configuration, the connection function connects the first common terminal (7a) and the selection terminal (7c) while the second common terminal (7b) and the selection terminal (7c) are connected, and then the disconnection function disconnects the first common terminal (7a) and the selection terminal (7c) while the second common terminal (7b) and the selection terminal (7c) are connected. Therefore, when the connection destination of the selection terminal (7c) is switched from the first common terminal (7a) to the second common terminal (7b), at least one of the connection between the first common terminal (7a) and the selection terminal (7c) and the connection between the second common terminal (7b) and the selection terminal (7c) is always maintained. Therefore, the state of the switch (7) does not become indeterminate during switching of the switch (7). The indeterminate state is a state in which the switch (7) has completed both the connection between the first common terminal (7a) and the selection terminal (7c) and the connection between the second common terminal (7b) and the selection terminal (7c), and therefore the SRS from the power amplifier (12) is reflected back to the power amplifier (12).This reduces damage to the power amplifier (12) due to the reflected wave of the SRS at the switch (7) during switching.

[0173] A high-frequency circuit (1) according to a fourteenth aspect includes a switch (7), a power amplifier (12), and a control circuit (16). The power amplifier (12) is connected to the switch (7). The control circuit (16) controls the switch (7) and the power amplifier (12). The switch (7) has a first common terminal (7a), a second common terminal (7b), and a selection terminal (7c). The first common terminal (7a) is connected to a first antenna terminal (6a). The second common terminal (7b) is connected to a second antenna terminal (6b). The selection terminal (7c) is connectable to the first common terminal (7a) and the second common terminal (7b). The first antenna terminal (6a) is connected to a first antenna (3A). The second antenna terminal (6b) is connected to a second antenna (3B). The power amplifier (12) is connected to the selection terminal (7c). The control circuit (16) controls the switch (7) and the power amplifier (12) in response to the SRS request signal to transmit the SRS from the power amplifier (12) from the first antenna (3A) and the second antenna (3B) in that order. The control circuit (16) has a first transmission control function, a reduction function, a switching function, and a second transmission control function. The first transmission control function transmits the SRS from the power amplifier (12) from the first antenna (3A) while connecting the first common terminal (7a) and the selection terminal (7c). The reduction function reduces the output of the power amplifier (12) after processing the first transmission control function. The switching function disconnects the connection between the first common terminal (7a) and the selection terminal (7c) and connects the second common terminal (7b) and the selection terminal (7c) after processing the reduction function. The second transmission control function transmits the SRS from the power amplifier (12) from the second antenna (3B) after the processing of the switching function.

[0174] According to this configuration, the switching function is performed after the reduction function. This allows the output of the power amplifier (12) to be reduced during the switching function (i.e., while the switch (7) is in an unstable state). This reduces the reflection of SRS from the power amplifier (12) at the switch (7). As a result, damage to the power amplifier (12) due to the reflected wave of SRS at the switch (7) during switching can be reduced.

[0175] A communication device (30) of a 15th aspect includes the high-frequency circuit (1) of the 13th or 14th aspect and a signal processing circuit (2). The signal processing circuit (2) is connected to the high-frequency circuit (1) and processes the high-frequency signal.

[0176] According to this configuration, a communication device (30) that exhibits the effects of the high frequency circuit (1) can be provided.

[0177] 1, 1A, 1B High frequency circuit 2 Signal processing circuit 2a RF signal processing circuit 2b Baseband signal processing circuit 3 Antenna 3A First antenna 3B Second antenna 5, 6, 14 Matching circuit 6a External terminal (first antenna terminal) 6b External terminal (second antenna terminal) 6c to 6e External terminals 7 First switch (switch) 7a First common terminal 7b Second common terminal 7c First selection terminal (selection terminal) 7d Second selection terminal 7e Control unit 8 Second switch 8a Common terminal 8b, 8c Selection terminal 8d Control unit 9 Third switch 9a Common terminal 9b, 9c Selection terminal 9d Control unit 10 Duplexer (first filter) 10a Input / output unit 10b Input unit 10c Output unit 10R Receiving filter 10T Transmitting filter 11 DESCRIPTION OF THE REFERENCE NUMERALS Duplexer (second filter) 11a Input / output section 11b Input section 11c Output section 11R Receiving filter 11T Transmitting filter 12 Power amplifier 12a Input section 12b Output section 12A First power amplifier (power amplifier) ​​12B Second power amplifier (power amplifier) ​​12c Input section 12d Output section 13 Low noise amplifier (post-stage circuit) 13a Input section 13b Output section 15 Controller 16 Control circuit 17, 18 Phase shifter 30 Communication device L1 to L3 Signal path N1 Distribution point N2 Combining point Q1 Predetermined output level S1 to S4 Control signal ST1 Receiving step ST2, ST3 Control step ST21, ST31 First transmission control step ST22 Connection step ST23 Connection maintenance step ST24 Disconnection step ST25, ST35 Second transmission control step ST32: Decrease step ST33: Switching step ST34: Increase step T11, T21: First fixed time T12, T22: Second fixed time T13, T23: Third fixed time T24, T25: Fixed time

Claims

1. A method for transmitting an SRS from a power amplifier from a first antenna and a second antenna, the method comprising: a receiving step of receiving an SRS request signal; and a control step of controlling a first switch in response to the received SRS request signal to transmit an SRS from a power amplifier from a first antenna and a second antenna, the first switch having: a first common terminal connected to a first antenna terminal; a second common terminal connected to a second antenna terminal; and a first selection terminal connectable to the first common terminal and the second common terminal, the first antenna terminal being connected to the first antenna, the second antenna terminal being connected to the second antenna, the power amplifier being connected to the first selection terminal, the control step comprising: a first transmission control step of transmitting the SRS from the power amplifier from the first antenna with the first common terminal and the first selection terminal connected; and a connection step of connecting the second common terminal and the first selection terminal after the first transmission control step with the first common terminal and the first selection terminal connected. a disconnection step of disconnecting the first common terminal and the first selection terminal while keeping the second common terminal and the first selection terminal connected after the connection step; and a second transmission control step of transmitting the SRS from the power amplifier from the second antenna after the disconnection step.

2. A method for controlling a high-frequency circuit as described in claim 1, further comprising a connection maintaining step between the connection step and the disconnection step, wherein in the connection maintaining step, the connection between the second common terminal and the first selection terminal is maintained while the first common terminal and the first selection terminal are connected, and a time for which the connection between the second common terminal and the first selection terminal is maintained in the connection maintaining step is shorter than a time from start to completion of a process for connecting the second common terminal and the first selection terminal in the connection step.

3. A method for transmitting an SRS from a power amplifier through a first antenna and a second antenna, the method comprising: a receiving step of receiving an SRS request signal; and a control step of controlling a first switch and a power amplifier in accordance with the received SRS request signal to transmit an SRS from the power amplifier through a first antenna and a second antenna, the first switch having a first common terminal connected to a first antenna terminal, a second common terminal connected to a second antenna terminal, and a first selection terminal connectable to the first common terminal and the second common terminal, the first antenna terminal being connected to the first antenna, the second antenna terminal being connected to the second antenna, and the power amplifier being connected to the first selection terminal, the control step including: a first transmission control step of transmitting the SRS from the power amplifier through the first antenna with the first common terminal and the first selection terminal connected; a reduction step of reducing the output of the power amplifier after the first transmission control step; and a switching step of disconnecting the first common terminal and the first selection terminal and connecting the second common terminal and the first selection terminal after the reduction step. a second transmission control step of transmitting the SRS from the power amplifier through the second antenna after the switching step.

4. The method for controlling a high frequency circuit according to claim 3, further comprising an increasing step between said switching step and said second transmission control step, said increasing step increasing an output of said power amplifier in response to a control signal.

5. A method for controlling a high frequency circuit according to claim 3 or 4, wherein the power amplifier is one of a plurality of power amplifiers connected in parallel with each other, and in the reducing step, the output of any one of the plurality of power amplifiers is reduced.

6. The method of controlling a high frequency circuit according to claim 3 or 4, wherein the power amplifier is one of a plurality of power amplifiers connected in series with each other, and in the reducing step, the output of any one of the plurality of power amplifiers is reduced.

7. The method for controlling a high frequency circuit according to any one of claims 1 to 6, wherein a first filter is connected between the power amplifier and the first selection terminal of the first switch.

8. A method for controlling a high-frequency circuit as described in claim 7, wherein the first switch further has a second selection terminal connectable to the first common terminal and the second common terminal, a second filter is connected between the power amplifier and the second selection terminal of the first switch, a second switch is connected between the power amplifier and the first filter and the second filter, and the second switch is capable of connecting the power amplifier to the first filter and the second filter.

9. The method for controlling a high-frequency circuit according to claim 8, wherein a matching circuit is connected between the power amplifier and the second switch.

10. A method for controlling a high-frequency circuit as described in claim 9, wherein the first filter is a duplexer, and the first filter has: a transmitting filter that outputs a transmitting signal from the second switch to the first selection terminal of the first switch; and a receiving filter that outputs a receiving signal from the first selection terminal to a subsequent circuit.

11. The method for controlling a high frequency circuit according to claim 10, wherein the subsequent circuit is a low noise amplifier that amplifies the received signal from the receiving filter.

12. A program for causing one or more processors to execute the method for controlling a high-frequency circuit according to any one of claims 1 to 11.

13. A radio communication device comprising: a switch; a power amplifier connected to the switch; and a control circuit for controlling the switch and the power amplifier, wherein the switch has: a first common terminal connected to a first antenna terminal; a second common terminal connected to a second antenna terminal; and a selection terminal connectable to the first common terminal and the second common terminal, wherein the first antenna terminal is connected to a first antenna, the second antenna terminal is connected to a second antenna, and the power amplifier is connected to the selection terminal, and the control circuit controls the switch in response to an SRS request signal to transmit an SRS from the power amplifier from the first antenna and the second antenna in that order, and the control circuit has a first transmission control function for transmitting the SRS from the power amplifier from the first antenna while the first common terminal and the selection terminal are connected, and a connection function for connecting the second common terminal and the selection terminal while the first common terminal and the selection terminal are connected after processing of the first transmission control function, a disconnection function of disconnecting the first common terminal and the selection terminal while keeping the second common terminal and the selection terminal connected after processing of the connection function, and a second transmission control function of transmitting the SRS from the power amplifier from the second antenna after processing of the disconnection function.

14. A radio communication device comprising: a switch; a power amplifier connected to the switch; and a control circuit for controlling the switch and the power amplifier, wherein the switch has: a first common terminal connected to a first antenna terminal; a second common terminal connected to a second antenna terminal; and a selection terminal connectable to the first common terminal and the second common terminal, the first antenna terminal being connected to a first antenna, the second antenna terminal being connected to a second antenna, and the power amplifier being connected to the selection terminal, the control circuit controls the switch and the power amplifier in response to an SRS request signal to transmit the SRS from the power amplifier from the first antenna and the second antenna in that order, and the control circuit has: a first transmission control function for transmitting the SRS from the power amplifier from the first antenna while the first common terminal and the selection terminal are connected; and a reduction function for reducing the output of the power amplifier after processing of the first transmission control function. a switching function of disconnecting the first common terminal and the selection terminal and connecting the second common terminal and the selection terminal after the processing of the reduction function, and a second transmission control function of transmitting the SRS from the power amplifier from the second antenna after the processing of the switching function.

15. A communication device comprising: a high-frequency circuit according to claim 13 or 14; and a signal processing circuit connected to the high-frequency circuit and for processing a high-frequency signal.

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