Sensor pixel circuit and driving method thereof, and ultrasonic sensor and electronic device

Abstract

The embodiments of the present application relate to the technical field of electronics. Provided are a sensor pixel circuit and a driving method thereof, and an ultrasonic sensor and an electronic device, which are used for improving the performance of the sensor pixel circuit. The sensor pixel circuit comprises a driving circuit, wherein a port voltage of the driving circuit directly affects the performance of the sensor pixel circuit. In the embodiments of the present application, a variable voltage is directly or indirectly provided for a port of a driving circuit at different stages of one sampling period; or a variable voltage is directly or indirectly provided for the port of the driving circuit in different sampling periods; or a plurality of groups of driving circuits which are of different structures are provided, and different driving circuits are used in different cases, so that the sensor pixel circuit can achieve a better performance in different electronic devices.

Description

Sensor pixel circuit and driving method thereof, ultrasonic sensor, and electronic device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on December 20, 2023, with application number 202311772376.X and invention name “Sensor pixel circuit and driving method thereof, ultrasonic sensor, electronic device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of electronic technology, and in particular to a sensor pixel circuit and a driving method thereof, an ultrasonic sensor, and an electronic device. Background Art

[0003] In an ultrasonic sensor, an ultrasonic transceiver may be used to transmit ultrasonic waves toward an object to be detected through an ultrasonic transmission medium and receive ultrasonic waves reflected back from the object to be detected, thereby completing detection of the object to be detected.

[0004] For example, in an ultrasonic fingerprint sensor, ultrasonic waves emitted by an ultrasonic transceiver are transmitted to the finger and reflected back to the transceiver at varying intensities at the ridges and valleys of the fingerprint. The reflected signals are processed to generate an image of the fingerprint, enabling fingerprint image acquisition and recognition.

[0005] Ultrasonic sensors consist of pixel circuits and piezoelectric devices. The piezoelectric device is used to transmit and receive ultrasonic waves, while the pixel circuit is used to collect them. The performance of the pixel circuit directly affects the detection results of the ultrasonic sensor. Summary of the Invention

[0006] Embodiments of the present application provide a sensor pixel circuit and a driving method thereof, an ultrasonic sensor, and an electronic device, for improving the performance of the sensor pixel circuit.

[0007] To achieve the above objectives, this application adopts the following technical solutions:

[0008] According to a first aspect of an embodiment of the present application, a sensor pixel circuit is provided, comprising an emission circuit, a sampling circuit, a driver circuit, a readout circuit, and a voltage write circuit. The emission circuit is coupled to a first control signal terminal, a bias voltage terminal, and a first node, and is configured to transmit a bias voltage at the bias voltage terminal to the first node under control of a first control signal received at the first control signal terminal. The sampling circuit is coupled to a second control signal terminal, a second node, and the first node, and is configured to transmit a signal at the first node to the second node under control of a second control signal received at the second control signal terminal. The driver circuit is coupled to the second node, a power supply voltage terminal, and a third node, and is configured to transmit a power supply signal at the power supply voltage terminal to the third node under control of a signal at the second node. The readout circuit is coupled to a third control signal terminal, a third node, and a fourth node, and is configured to transmit a signal at the third node to the fourth node under control of a third control signal received at the third control signal terminal. The voltage write circuit is coupled to a fourth control signal terminal, the third node, and a set voltage terminal, and is configured to transmit a set voltage at the set voltage terminal to the third node under control of a fourth control signal received at the fourth control signal terminal.

[0009] Because the voltage at the second node, the voltage at the power supply voltage terminal, and the voltage at the third node all affect the performance of the driver circuit, the sensor pixel circuit provided in the embodiments of the present application includes a voltage writing circuit coupled to the third node, allowing the voltage at the third node to be controlled by the voltage writing circuit. This allows, in combination with the specific structure of the sensor pixel circuit, the voltage at the third node to be optimized, thereby optimizing the performance of the driver circuit and, therefore, achieving the goal of optimizing the performance of the sensor pixel circuit.

[0010] In one possible implementation, the set voltage received by the set voltage terminal is a variable voltage. By having the third node receive the variable voltage, the equivalent capacitance effect of the fourth transistor can be adjusted to be optimal at different stages within a sampling cycle or in different sampling cycles, thereby improving the gain, signal-to-noise ratio, and other performance of the sensor pixel circuit.

[0011] In one possible implementation, during a sampling cycle, the set voltage is a first voltage during the emission phase and a second voltage during the sampling phase. This allows the performance of the driver circuit to be optimized at different phases of the sampling cycle, thereby improving the performance of the sensor pixel circuit.

[0012] In one possible implementation, the set voltage is a third voltage during one sampling period, and a fourth voltage during another sampling period. This allows the performance of the driver circuit to be optimized for different sampling periods based on various factors, thereby improving the performance of the sensor pixel circuit.

[0013] In one possible implementation, the sensor pixel circuit further includes an auxiliary circuit coupled to the second node and the auxiliary voltage terminal. Because the voltage at the second node affects the performance of the driver circuit, providing the auxiliary circuit connected to the second node can optimize the voltage at the second node via the auxiliary circuit, thereby optimizing the performance of the driver circuit and further optimizing the performance of the sensor pixel circuit.

[0014] In one possible implementation, the fourth control signal terminal is coupled to the first control signal terminal. In this way, the voltage writing circuit is controlled by the first control signal terminal, which can reduce the number of signal ports and lower the requirements for control signals.

[0015] In one possible implementation, the fourth control signal terminal is coupled to the second control signal terminal. In this way, the voltage writing circuit is controlled by the second control signal terminal, which can reduce the number of signal ports and lower the requirements for control signals.

[0016] In one possible implementation, the voltage writing circuit includes a first transistor, a control electrode of the first transistor coupled to the fourth control signal terminal, a first electrode of the first transistor coupled to the set voltage terminal, and a second electrode of the first transistor coupled to the third node. Adjusting the potential of the third node using the first transistor results in a simple process, a simple structure, and low cost.

[0017] In one possible implementation, the transmitting circuit includes a second transistor, a control electrode of the second transistor coupled to the first control signal terminal, a first electrode of the second transistor coupled to the bias voltage terminal, and a second electrode of the second transistor coupled to the first node. This is an implementation with simple process, simple structure, and low cost.

[0018] In one possible implementation, the sampling circuit includes a third transistor, a control electrode of the third transistor coupled to the second control signal terminal, a first electrode of the third transistor coupled to the first node, and a second electrode of the third transistor coupled to the second node. This is an implementation method with simple process, simple structure, and low cost.

[0019] In one possible implementation, the drive circuit includes a fourth transistor, a control electrode of the fourth transistor coupled to the second node, a first electrode of the fourth transistor coupled to the third node, and a second electrode of the fourth transistor coupled to a power supply voltage terminal. This is an implementation with simple process, simple structure, and low cost.

[0020] In one possible implementation, the read circuit includes a fifth transistor, a control electrode of the fifth transistor coupled to the third control signal terminal, a first electrode of the fifth transistor coupled to the fourth node, and a second electrode of the fourth transistor coupled to the third node. This is an implementation method with simple process, simple structure, and low cost.

[0021] In one possible implementation, the auxiliary circuit includes a sixth transistor, a control electrode of the sixth transistor coupled to the second node, and a first electrode and a second electrode of the sixth transistor both coupled to the third control signal terminal. Adjusting the potential of the second node using the sixth transistor simplifies the process, structure, and cost.

[0022] According to a second aspect of an embodiment of the present application, a sensor pixel circuit is provided, comprising: an emitting circuit coupled to a first control signal terminal, a bias voltage terminal, and a first node, and configured to transmit a bias voltage at the bias voltage terminal to the first node under control of a first control signal received at the first control signal terminal. A first sampling circuit coupled to a second control signal terminal, a second node, and the first node, and configured to transmit a signal at the first node to the second node under control of a second control signal received at the second control signal terminal. A first driving circuit coupled to the second node, a power supply voltage terminal, and a third node, and configured to transmit a power supply signal at the power supply voltage terminal to the third node under control of a signal at the second node. A reading circuit coupled to a third control signal terminal, the third node, and a fourth node, and configured to transmit a signal at the third node to the fourth node under control of a third control signal received at the third control signal terminal. A second sampling circuit coupled to a fourth control signal terminal, a fifth node, and the first node, and configured to transmit a signal at the first node to the fifth node under control of a fourth control signal received at the fourth control signal terminal. The second driving circuit is coupled to the fifth node, the power supply voltage terminal and the third node, and is used to transmit the power supply signal to the third node under the control of the signal of the fifth node; the structure of the first driving circuit is different from that of the second driving circuit.

[0023] In the sensor pixel circuit provided in the embodiment of the present application, the sampling circuit and the driving circuit are regarded as a reading unit, and the sensor pixel circuit includes a plurality of independently controlled and structurally different reading units. The number of reading units is not limited to two, and can be more than two. Then, in different electronic devices, the sensor pixel circuit can select a reading unit with the best performance from multiple reading units to perform fingerprint acquisition to overcome the deviation caused by process errors. In the same electronic device, the sensor pixel circuit can also select different reading units for fingerprint acquisition in different sampling periods to overcome the deviation caused by changes in the state of the electronic device (such as aging, changes in operating temperature, etc.), thereby achieving the purpose of optimizing the performance of the sensor pixel circuit.

[0024] In one possible implementation, the sensor pixel circuit further includes a first auxiliary circuit and a second auxiliary circuit; the first auxiliary circuit is coupled to the second node and the auxiliary voltage terminal; and the second auxiliary circuit is coupled to the fifth node and the auxiliary voltage terminal. By providing the first and second auxiliary circuits, the potentials of the second and fifth nodes can be adjusted to optimize the performance of the first and second drive circuits, thereby optimizing the performance of the sensor pixel circuit.

[0025] In one possible implementation, a first drive circuit includes a first transistor; a control electrode of the first transistor is coupled to a second node, a first electrode of the first transistor is coupled to a third node, and a second electrode of the first transistor is coupled to a power supply voltage terminal; a second drive circuit includes a second transistor; a control electrode of the second transistor is coupled to a fifth node, a first electrode of the second transistor is coupled to a third node, and a second electrode of the second transistor is coupled to a power supply voltage terminal; and a channel length of the first transistor is different from a channel length of the second transistor. The channel length directly affects the performance of the transistor. Therefore, by setting the channel length of the first transistor to be different from the channel length of the second transistor, the equivalent capacitance of the first transistor and the second transistor can be different, so that the first transistor and the second transistor are suitable for different scenarios.

[0026] In one possible implementation, a first drive circuit includes a first transistor; a control electrode of the first transistor is coupled to a second node, a first electrode of the first transistor is coupled to a third node, and a second electrode of the first transistor is coupled to a power supply voltage terminal; a second drive circuit includes a second transistor; a control electrode of the second transistor is coupled to a fifth node, a first electrode of the second transistor is coupled to a third node, and a second electrode of the second transistor is coupled to a power supply voltage terminal; a channel width of the first transistor is different from a channel width of the second transistor. The channel width directly affects the performance of the transistor. Therefore, by setting the channel length of the first transistor and the channel width of the second transistor to be different, the equivalent capacitance of the first transistor and the second transistor can be different, so that the first transistor and the second transistor are suitable for different scenarios.

[0027] In one possible implementation, the first sampling circuit includes a third transistor, a control electrode of the third transistor coupled to the second control signal terminal, a first electrode of the third transistor coupled to the first node, and a second electrode of the third transistor coupled to the second node. This is an implementation with simple process, simple structure, and low cost.

[0028] In one possible implementation, the second sampling circuit includes a fourth transistor, a control electrode of the fourth transistor coupled to the fourth control signal terminal, a first electrode of the fourth transistor coupled to the first node, and a second electrode of the fourth transistor coupled to the fifth node. This is an implementation with simple process, simple structure, and low cost.

[0029] In one possible implementation, the first auxiliary circuit includes a fifth transistor, a control electrode of the fifth transistor is coupled to the second node, and a first electrode and a second electrode of the fifth transistor are both coupled to the auxiliary voltage terminal. This is an implementation with simple process, simple structure, and low cost.

[0030] In one possible implementation, the second auxiliary circuit includes a sixth transistor, a control electrode of the sixth transistor is coupled to the fifth node, and a first electrode and a second electrode of the sixth transistor are both coupled to the auxiliary voltage terminal. This is an implementation with simple process, simple structure, and low cost.

[0031] In one possible implementation, the transmitting circuit includes a seventh transistor, a control electrode of the seventh transistor coupled to the first control signal terminal, a first electrode of the seventh transistor coupled to the bias voltage terminal, and a second electrode of the seventh transistor coupled to the first node. This implementation has a simple process, a simple structure, and a low cost.

[0032] In one possible implementation, the read circuit includes an eighth transistor, a control electrode of the eighth transistor coupled to the third control signal terminal, a first electrode of the eighth transistor coupled to the fourth node, and a second electrode of the eighth transistor coupled to the third node. This is an implementation with simple process, simple structure, and low cost.

[0033] In a possible implementation, the auxiliary voltage terminal is coupled to the third control signal terminal, thereby reducing the number of ports in the sensor pixel circuit.

[0034] In one possible implementation, the fourth node is coupled to a variable voltage terminal. Because the voltage at the third node affects the performance of the driver circuit, coupling the fourth node to the variable voltage terminal allows the voltage at the third node to be variable via the variable voltage terminal, thereby optimizing the performance of the driver circuit and further optimizing the performance of the sensor pixel circuit.

[0035] In one possible implementation, during a sampling cycle, the voltage at the fourth node is a first voltage during the emission phase; a second voltage during the sampling phase; and either the second voltage or the third voltage during the reading phase. This allows the performance of the driver circuit to be optimized at different phases of the sampling cycle, thereby improving the performance of the sensor pixel circuit.

[0036] In one possible implementation, during one sampling period, the voltage at the fourth node is a fourth voltage; during another sampling period, the voltage at the fourth node is a fifth voltage. In this way, the performance of the driver circuit can be optimized correspondingly at different sampling periods based on various factors, thereby improving the performance of the sensor pixel circuit.

[0037] According to a third aspect of an embodiment of the present application, a sensor pixel circuit is provided, comprising: an emitting circuit coupled to a first control signal terminal, a bias voltage terminal, and a first node, and configured to transmit a bias voltage at the bias voltage terminal to the first node under control of a first control signal received at the first control signal terminal; a sampling circuit coupled to a second control signal terminal, a second node, and the first node, and configured to transmit a signal at the first node to the second node under control of a second control signal received at the second control signal terminal; a driving circuit coupled to the second node, a power supply voltage terminal, and a third node, and configured to transmit a power supply signal at the power supply voltage terminal to the third node under control of a signal at the second node; and a reading circuit coupled to a third control signal terminal, the third node, and a fourth node, and configured to transmit a signal at the third node to the fourth node under control of a third control signal received at the third control signal terminal; the fourth node being coupled to the voltage variable terminal.

[0038] Since the voltage of the third node will affect the performance of the driving circuit, the fourth node is used to couple with the voltage variable terminal. The voltage of the third node coupled with the fourth node can be made a variable voltage through the variable voltage terminal to optimize the performance of the driving circuit and achieve the purpose of further optimizing the performance of the sensor pixel circuit.

[0039] In one possible implementation, during a sampling cycle, the voltage at the fourth node is a first voltage during the emission phase; a second voltage during the sampling phase; and either the second voltage or the third voltage during the reading phase. This allows the performance of the driver circuit to be optimized at different phases of the sampling cycle, thereby improving the performance of the sensor pixel circuit.

[0040] In one possible implementation, during one sampling period, the voltage at the fourth node is a fourth voltage; during another sampling period, the voltage at the fourth node is a fifth voltage. In this way, the performance of the driver circuit can be optimized correspondingly at different sampling periods based on various factors, thereby improving the performance of the sensor pixel circuit.

[0041] In one possible implementation, the sensor pixel circuit further includes an auxiliary circuit coupled to the second node and the third control signal terminal. By providing the auxiliary circuit, the potential of the second node can be adjusted to optimize the performance of the driver circuit, thereby optimizing the performance of the sensor pixel circuit.

[0042] According to a fourth aspect of an embodiment of the present application, an array substrate is provided, comprising a substrate and a plurality of sensor pixel circuits arranged on one side of the substrate, wherein the sensor pixel circuits comprise the sensor pixel circuit of any one of the first to third aspects.

[0043] According to a fifth aspect of the embodiments of the present application, an ultrasonic sensor is provided, comprising an array substrate and a plurality of pixel electrodes, wherein the array substrate comprises the array substrate of the fourth aspect, and the plurality of pixel electrodes are coupled correspondingly to a plurality of sensor pixel circuits.

[0044] According to a sixth aspect of an embodiment of the present application, an electronic device is provided, including an ultrasonic sensor and a control chip, wherein the ultrasonic sensor includes the ultrasonic sensor according to the fifth aspect, and the ultrasonic sensor is coupled to the control chip.

[0045] In a possible implementation, the control chip is configured to transmit a set voltage to a set voltage terminal of the ultrasonic sensor.

[0046] In a possible implementation, the port of the control chip coupled to the fourth node of the ultrasonic sensor is a voltage-variable terminal.

[0047] In a possible implementation, at the same time, the control chip is configured to transmit the second control signal or the fourth control signal to the ultrasonic sensor.

[0048] According to a seventh aspect of the embodiments of the present application, a method for driving the sensor pixel circuit of any one of the first aspects is provided, comprising: within a sampling period: an emission phase: the emission circuit transmits the bias voltage of the bias voltage terminal to the first node under the control of the first control signal received at the first control signal terminal; a sampling phase: the sampling circuit transmits the signal of the first node to the second node under the control of the second control signal received at the second control signal terminal; a reading phase: the driving circuit transmits the power signal of the power voltage terminal to the third node under the control of the signal of the second node; the reading circuit transmits the signal of the third node to the fourth node under the control of the third control signal received at the third control signal terminal; wherein, before the reading phase, the voltage writing circuit transmits the set voltage of the set voltage terminal to the third node under the control of the fourth control signal received at the fourth control signal terminal.

[0049] In a possible implementation, the set voltage received by the set voltage terminal is a variable voltage.

[0050] In a possible implementation, in a sampling period, during the emission phase, the set voltage is a first voltage; during the sampling phase, the set voltage is a second voltage.

[0051] In a possible implementation, in one sampling period, the set voltage is the third voltage; in another sampling period, the set voltage is the fourth voltage.

[0052] According to an eighth aspect of the embodiments of the present application, a method for driving a sensor pixel circuit according to any one of the second aspects is provided, comprising: in a sampling period: an emission phase: the emission circuit transmits a bias voltage at a bias voltage terminal to a first node under the control of a first control signal received at a first control signal terminal; a sampling phase: the first sampling circuit transmits a signal at the first node to a second node under the control of a second control signal received at a second control signal terminal; a reading phase: the first driving circuit transmits a power signal at a power voltage terminal to a third node under the control of a signal at the second node; and the reading circuit transmits a signal at the third node to a fourth node under the control of a third control signal received at a third control signal terminal; or, in the sampling phase: the second sampling circuit transmits a signal at the first node to a fifth node under the control of a second control signal received at a fourth control signal terminal; and a reading phase: the second driving circuit transmits a power signal at the power voltage terminal to a third node under the control of a signal at the fifth node; and the reading circuit transmits a signal at the third node to a fourth node under the control of a third control signal.

[0053] In a possible implementation, the voltage of the fourth node is a fixed voltage.

[0054] In a possible implementation, the voltage of the fourth node is a variable voltage.

[0055] In one possible implementation, the voltage of the fourth node is a variable voltage, including: in the sampling period, in the emission phase, the voltage of the fourth node is the first voltage; in the sampling phase, the voltage of the fourth node is the second voltage; in the reading phase, the voltage of the fourth node is the second voltage or the third voltage.

[0056] In a possible implementation, the voltage of the fourth node is a variable voltage, including: in one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is a fifth voltage.

[0057] According to a ninth aspect of the embodiments of the present application, a method for driving a sensor pixel circuit according to any one of the third aspects is provided, comprising: in a sampling period: an emission phase: the emission circuit transmits the bias voltage of the bias voltage terminal to the first node under the control of a first control signal received at the first control signal terminal; a sampling phase: the sampling circuit transmits the signal of the first node to the second node under the control of a second control signal received at the second control signal terminal; a reading phase: the driving circuit transmits the power signal of the power voltage terminal to the third node under the control of a signal at the second node; and the reading circuit transmits the signal of the third node to the fourth node under the control of a third control signal received at the third control signal terminal; the voltage of the fourth node is a variable voltage.

[0058] In one possible implementation, the voltage of the fourth node is a variable voltage, including: in the sampling period, in the emission phase, the voltage of the fourth node is the first voltage; in the sampling phase, the voltage of the fourth node is the second voltage; in the reading phase, the voltage of the fourth node is the second voltage or the third voltage.

[0059] In a possible implementation, the voltage of the fourth node is a variable voltage, including: in one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is a fifth voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] FIG1 is a schematic structural diagram of an electronic device according to an embodiment of the present application;

[0061] FIG2 is a schematic diagram of the structure of an ultrasonic sensor provided in an embodiment of the present application;

[0062] FIG3A is a schematic diagram of a peak detection technology provided in an embodiment of the present application;

[0063] FIG3B is a waveform diagram of an output terminal provided in an embodiment of the present application;

[0064] FIG4A is a topological diagram of a sensor pixel circuit provided in an embodiment of the present application;

[0065] FIG4B is a timing diagram of the pixel circuit shown in FIG4A provided in an embodiment of the present application;

[0066] FIG5 is a topological diagram of a sensor pixel circuit provided in an embodiment of the present application;

[0067] FIG6A is a topological diagram of various circuits in a sensor pixel circuit provided in an embodiment of the present application;

[0068] 6B-6D are timing diagrams of the pixel circuit shown in FIG. 6A provided in an embodiment of the present application;

[0069] FIG7 is a topological diagram of a sensor pixel circuit provided in an embodiment of the present application;

[0070] FIG8A is a topological diagram of various circuits in a sensor pixel circuit provided in an embodiment of the present application;

[0071] 8B and 8C are timing diagrams of the pixel circuit shown in FIG. 8A provided in an embodiment of the present application;

[0072] FIG9 is a topological diagram of a sensor pixel circuit provided in an embodiment of the present application;

[0073] FIG10A is a topological diagram of each circuit in a sensor pixel circuit provided by an embodiment of the present application.

[0074] 10B and 10C are timing diagrams of the pixel circuit shown in FIG. 10A provided in an embodiment of the present application;

[0075] FIG11 is a topological diagram of a sensor pixel circuit provided in an embodiment of the present application;

[0076] FIG12A is a topological diagram of various circuits in a sensor pixel circuit provided in an embodiment of the present application;

[0077] 12B and 12C are timing diagrams of the pixel circuit shown in FIG. 12A provided in an embodiment of the present application. DETAILED DESCRIPTION

[0078] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0079] Hereinafter, the terms "second," "first," etc., are used for descriptive convenience only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature qualified as "second," "first," etc., may explicitly or implicitly include one or more of such features. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0080] In addition, in the embodiments of the present application, directional terms such as "up", "down", "left", and "right" may be defined including but not limited to the orientation relative to the schematic placement of the components in the drawings. It should be understood that these directional terms may be relative concepts, which are used for relative descriptions and clarifications, and may change accordingly according to changes in the orientation of the components in the drawings.

[0081] In the embodiments of this application, unless otherwise specified or limited, the term "connection" should be understood in a broad sense. For example, "connection" can mean fixed connection, detachable connection, or integration; it can mean direct connection or indirect connection through an intermediate medium. In addition, the term "coupling" can mean direct electrical connection or indirect electrical connection through an intermediate medium. The term "contact" can mean direct contact or indirect contact through an intermediate medium.

[0082] In the embodiments of the present application, "and / or" describes the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, and B exists alone. A and B can be singular or plural. The character " / " generally indicates that the associated objects are in an "or" relationship.

[0083] The present application provides an electronic device that has a sensing function for a pressed object. For example, the device can detect fingerprints, palm prints, or handprints. The electronic device is, for example, a consumer electronic product, a home electronic product, or an in-vehicle electronic product with a biometric detection function. Among them, consumer electronic products include mobile phones, tablet computers, laptop computers, e-readers, personal computers (PCs), personal digital assistants (PDAs), desktop displays, smart wearable products (for example, smart watches, smart bracelets), virtual reality (VR) electronic devices, augmented reality (AR) electronic devices, drones, etc. Home electronic products include smart door locks, televisions, remote controls, refrigerators, rechargeable small household appliances (for example, soymilk machines, robot vacuums), etc. In-vehicle electronic products include in-vehicle navigation systems, in-vehicle high-density digital video discs (DVDs), etc. Among them, the electronic device can be an electronic device with a display function or an electronic device without a display function, and the present application does not limit this.

[0084] The following description will be given by taking a mobile phone as an example of an electronic device.

[0085] FIG1 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

[0086] As shown in Figure 1, electronic device 10 primarily includes a cover plate 11, a touchscreen display 12, a middle frame 13, and a rear housing 14. The rear housing 14 and touchscreen display 12 are located on either side of the middle frame 13, respectively. The middle frame 13 and touchscreen display 12 are disposed within the rear housing 14. The cover plate 11 is disposed on the side of the touchscreen display 12 away from the middle frame 13, with the display surface of the touchscreen display 12 facing the cover plate 11.

[0087] For example, the touch screen 12 can be a low-temperature polysilicon (LTPS) display, an active-matrix organic light emitting diode (AMOLED) display, a low-temperature polycrystalline oxide (LTPO) display, a liquid crystal display (LCD), or a micro organic light emitting diode (micro LED) display. Of course, the embodiment of the present application does not limit the type of the touch screen 12. All displays with a touch display function are applicable to the embodiment of the present application. The above list is only for reference.

[0088] On this basis, as shown in FIG1 , the electronic device 10 further includes a biometric identification sensor 15 , which is disposed on one side of the display screen 12 . The biometric identification sensor 15 is used to provide the electronic device 10 with a biometric identification function.

[0089] In addition, those skilled in the art will appreciate that the structure of the electronic device 10 shown in the above figures does not limit the electronic device 10. The electronic device 10 may include more or fewer components than shown, or may combine certain components or arrange the components differently. For example, the electronic device 10 may also include printed circuit boards (PCBs), a battery, a camera, a microphone, a speaker, a radio frequency circuit, an input unit, a sensor, an audio circuit, a wireless fidelity (WiFi) module, a power supply, a Bluetooth module, and other components, which are not described in detail here.

[0090] Taking fingerprint recognition as an example, as user demand for full-screen technology continues to grow, under-screen fingerprint technology is also constantly developing. Currently, under-screen fingerprint technology is mainly divided into two types: optical under-screen fingerprint and ultrasonic under-screen fingerprint.

[0091] Since 2018, optical under-screen fingerprint recognition has gradually been widely used in fingerprint recognition under OLED displays due to its low cost and excellent performance. However, with the continuous development of OLED display technology, if the biometric recognition sensor 15 adopts optical under-screen fingerprint technology, there will be the following problems: On the one hand, the performance of the optical under-screen fingerprint module depends on the transmittance of the OLED display itself. The overall transmittance of the common LTPS OLED display screen on the market is about 3%, which is sufficient for the application of the optical fingerprint module. However, with the continuous penetration of LTPO OLED display technology in the market and the continuous development of emerging OLED screen technologies such as color on encapsulation (COE) structure, the transmittance of OLED displays continues to decrease, resulting in major challenges for optical under-screen fingerprint technology. On the other hand, the current most cost-effective second-generation under-screen optical fingerprint has a module thickness of 3mm-4mm, which is relatively thick, resulting in restrictions on the design of the entire electronic device. In addition, due to its large thickness, it cannot be applied to folding screen electronic devices. On the other hand, when using the optical under-screen fingerprint, the display pixels in the fingerprint recognition area must be lit up first. At this time, the pixel brightness in this area is relatively high. If there is a certain deviation in the finger pressing, it will cause light leakage and glare, especially in dark environments, the problem is more serious.

[0092] While optical under-screen fingerprints are developing, ultrasonic under-screen fingerprint technology is also developing and being applied to the market. The ultrasonic under-screen fingerprint module is placed close to the bottom of the display screen and uses the piezoelectric layer to transmit and receive ultrasonic waves to acquire and identify fingerprint images. Compared with the optical under-screen fingerprint module, if the biometric recognition sensor 15 adopts ultrasonic under-screen fingerprint technology, it will have the following advantages: On the one hand, the ultrasonic under-screen fingerprint does not rely on the transmittance of the display screen itself, and can adapt to the current technological development trend of the continuous reduction in the transmittance of OLED display screens. On the other hand, the ultrasonic fingerprint module is relatively thin, only 200um-300um, which is conducive to the overall structural design of electronic equipment, and can also be used in folding screen electronic devices. On the other hand, the ultrasonic under-screen fingerprint module has a faster recognition speed and does not have problems such as light leakage and glare.

[0093] Based on this, an embodiment of the present application provides an ultrasonic sensor, which adopts ultrasonic under-screen fingerprint technology and can be used as a biometric recognition sensor 15 in an electronic device 10.

[0094] FIG2 is a schematic diagram of the structure of an ultrasonic sensor provided in an embodiment of the present application.

[0095] As shown in FIG2 , the ultrasonic sensor 20 includes a common electrode layer, a piezoelectric layer, a pixel electrode layer, and a thin film transistor (TFT) substrate.

[0096] For example, the common electrode layer is formed by coating the entire surface with conductive silver paste, and the piezoelectric layer is made of a copolymer organic composite material with polyvinylidene fluoride (PVDF) as the core raw material. The pixel electrode layer includes pixel electrodes arranged in an array, and the TFT substrate includes sensor pixel circuits 30 arranged in an array, and the sensor pixel circuits 30 are coupled to the pixel electrodes accordingly.

[0097] When the ultrasonic sensor 20 is applied to the electronic device 10, as shown in FIG2 , the ultrasonic sensor 20 is bonded to the OLED display via a bonding layer. Of course, in different application scenarios, the ultrasonic sensor 20 can be bonded to different structures. For example, the ultrasonic sensor can be bonded to a display screen, a glass cover, a metal cover, or other cover structures.

[0098] In actual applications, as shown in Figure 2, the ultrasonic sensor 20 can be laminated to the bottom of the OLED display screen from behind, i.e., the TFT substrate in the ultrasonic sensor 20 is laminated to the OLED display screen. Of course, the ultrasonic sensor 20 can also be laminated to the bottom of the OLED display screen from the front, i.e., the common electrode layer is laminated to the OLED display screen.

[0099] The ultrasonic sensor 20 primarily utilizes the piezoelectric effect of the piezoelectric layer, which converts pressure deformation into electrical signals. The operating process of the ultrasonic sensor 20 is primarily divided into a transmitter (TX) phase and a receiver (RX) phase. During the TX phase, a high-frequency, high-amplitude AC signal is transmitted to the pixel electrode (the common electrode layer is at a fixed voltage level) via the control chip and peripheral components (e.g., integrated on the PCB of the electronic device 10). After receiving the AC signal, the piezoelectric layer deforms under the influence of the high-voltage electrostatic charge on its upper and lower sides, converting the AC signal into high-frequency mechanical vibrations, generating ultrasonic waves. The ultrasonic waves penetrate the ultrasonic sensor 20 and the OLED display before reaching the fingertip. After contacting the valleys and ridges of the fingerprint, some of the ultrasonic waves are reflected by the fingerprint, while a smaller portion continues to propagate forward. During the RX phase, the reflected ultrasonic waves again pass through the various dielectric layers before reaching the piezoelectric layer. The nearly stationary piezoelectric layer is driven by the reflected ultrasonic waves to vibrate at high frequencies, which in turn converts the high-frequency vibrations into high-frequency pulsed electrical signals. This electrical signal is received by the sensor pixel circuit 30 coupled to the pixel electrode and then transmitted to the control chip. Since the valleys and ridges of the fingers reflect ultrasound waves to different degrees, the control chip can process and analyze the different signals to obtain the final fingerprint image.

[0100] From the above analysis, it can be seen that the accuracy of the detection of the sensor pixel circuit 30 has a direct impact on the accuracy of the fingerprint recognition result. In some technologies, the sensor pixel circuit 30 uses peak detection technology to realize valley ridge echo signal detection.

[0101] FIG3A is a schematic diagram of a peak detection technology provided in an embodiment of the present application, and FIG3B is a waveform diagram of an output end provided in an embodiment of the present application.

[0102] The specific principle of peak detection technology is shown in Figure 3A: When the level of the output terminal Vo is lower than the level of the input terminal Vi, diode D turns on, and the output terminal Vo is charged to the level of the input terminal Vi, to the turn-on level of diode D. The capacitor C and resistor R in Figure 3A are equivalent to other device modules in the circuit. As shown in Figure 3B, when the level of the output terminal Vo is higher than the level of the input terminal Vi, diode D turns off, and the output terminal Vo maintains its original level until the next level higher than the current value reaches the input terminal Vi. Ultimately, the level of the output terminal Vo will remain near the highest level of the input terminal Vi. Therefore, peak detection technology uses the unidirectional conduction capability of diode D to extract the peak value of the input signal. To achieve this goal, the voltage at the output terminal Vo will remain until a larger peak value appears or the circuit is reset.

[0103] FIG4A is a topological diagram of a sensor pixel circuit provided in an embodiment of the present application, and FIG4B is a timing diagram of the pixel circuit shown in FIG4A provided in an embodiment of the present application.

[0104] In some embodiments, as shown in FIG. 4A , the sensor pixel circuit 30 includes a transistor M1 , a transistor M2 , a transistor M3 , a diode D, a capacitor C, and a pixel electrode pad P.

[0105] The bias voltage terminal Vref is coupled to the pixel electrode pad P, the gate of the transistor M1 is coupled to the pixel electrode pad P, the first electrode of the transistor M1 is coupled to the power supply terminal AP, the second terminal of the transistor M1 is coupled to the first terminal of the transistor M3, the second terminal of the transistor M3 is coupled to the output terminal Vo, and the gate of the transistor M3 is coupled to the read voltage terminal VRe. The gate of the transistor M2 is coupled to the reset voltage terminal VRs, the first terminal of the transistor M2 is coupled to the input terminal Vi, and the second terminal of the transistor M2 is coupled to the gate of the transistor M1. One terminal of the diode D is coupled to the input terminal Vi, and the other terminal of the diode D is coupled to the gate of the transistor M1. One terminal of the capacitor C is coupled to the gate of the transistor M1, and the other terminal of the capacitor C is coupled to the reference ground voltage terminal GND.

[0106] Transistor M2 is a set transistor used as a switch to reset the peak signal before detection to avoid the influence of previous residual charge on the current signal reception and processing, thereby ensuring the consistency and accuracy of each signal processing.

[0107] The diode D is formed using a transistor process and is used to implement the peak detection function. The peak detection principle of the diode D can be referred to the above description of FIG2.

[0108] The transistor M1 is a driving transistor that receives a peak-related signal, is turned on during a read phase, and operates in a source-follower mode to control the output voltage to change with the gate voltage Vg.

[0109] The transistor M3 is a read transistor, which outputs the peak correlation signal from the output terminal Vo to the control chip terminal during the read phase. The transistor M3 is used as a switch.

[0110] The sensor pixel circuit 30 has six signal terminals: the output terminal Vo is used to output the sampling signal; the power supply terminal AP is a DC voltage and serves as a global signal; the reset voltage terminal VRs is used to control the global initialization signal during the TX phase; and the bias voltage terminal Vref provides a bias voltage to the pixel electrode pad P during the TX phase. The input terminal Vi is also a global signal, providing the initialization voltage Dbias (L) during the TX phase and the bias voltage Dbias (H) for the diode D during the RX phase. The read voltage terminal VRe is used as the output control signal during the RX phase.

[0111] This application uses the example that the transistor M1 , the transistor M2 , and the transistor M3 are all N-type transistors for schematic description. The transistor M1 , the transistor M2 , and the transistor M3 may also all be P-type transistors.

[0112] As can be seen from the topology circuit diagram shown in FIG. 4A and the timing diagram shown in FIG. 4B, the sensor pixel circuit 30 can be divided into three stages: the TX stage, in which the control chip injects a high-voltage periodic signal into the pixel electrode pad P side through the bias voltage terminal Vref to generate ultrasonic waves in the piezoelectric material. In the RX stage, the reset voltage terminal VRs signal is set high to control the transistor M2 to conduct, and the initialization voltage Dbias(L) provided by the input terminal Vi initializes the gate voltage Vg of the transistor M1, Vg = Dbias(L). At this time, the input terminal Vi is at a lower level, and the diode D is in the cut-off state. Then the reset voltage terminal VRs signal is set low to control the transistor M2 to turn off. The echo signal reflected by the finger is converted into an alternating current signal by the piezoelectric effect of the piezoelectric layer. The stronger the echo signal, the larger the amplitude of the alternating current signal. This signal is applied to the gate of the transistor M1 through the charge distribution of the capacitor C. The input terminal Vi provides a bias voltage Dbias(H) at a higher level to make the diode D in a conductive state, realizing the peak detection function. When Vg < Dbias(H), the diode D continues to charge the gate of the transistor M1 until Vg = Dbias(H). When Vg > Dbias(H), the diode D is cut off and Vg remains unchanged. Due to the different amplitudes of the fingerprint valley-ridge echo signals, the peak voltages of Vg are finally different. In the reading stage, the input terminal Vi switches back to the initialization voltage Dbias(L), and the reading voltage terminal VRe signal is set high to control the transistor M3 to conduct. The sensor pixel circuit 30 outputs line by line, and the transistor M1 operates in the source-follower mode. The voltage output at the output terminal Vo changes with the change of the Vg voltage, thus realizing the conversion from different echo signal intensities to different output voltages.

[0113] Although the sensor pixel circuit 30 shown in FIG. 4A can detect fingerprints, on the one hand, under ideal conditions, the peak detection technology can only identify the signal difference between the unilateral valley and ridge, losing the signal difference information on the side less than the bias voltage Dbias(H). At the same time, since the echo signal is a high-frequency sine wave signal with a certain attenuation coefficient, when the response rate of the diode D in the circuit is slow, it cannot follow the change of the echo signal in real time to make corresponding detection actions, resulting in the fact that the finally identified peak is not the maximum value of the echo signal, further losing effective information and resulting in a smaller valley-ridge signal difference at the output. On the other hand, there is a diode D structure in the sensor pixel circuit 30, which is different from the traditional TFT process and requires special process preparation, and the process complexity is relatively high. On the other hand, the voltage provided by the input terminal Vi as a power signal needs to quickly flip between the initialization voltage Dbias(L) and the bias voltage Dbias(H), which requires a relatively high requirement for the control chip.

[0114] Based on this, the embodiment of the present application provides a sensor pixel circuit 30, which is used to improve the performance of the sensor pixel circuit 30 without increasing the process difficulty.

[0115] The sensor pixel circuit and the driving method thereof provided in the embodiments of the present application are schematically described below with reference to several examples.

[0116] Example 1

[0117] FIG5 is a topological diagram of a sensor pixel circuit provided in an embodiment of the present application.

[0118] An embodiment of the present application provides a sensor pixel circuit 30 . As shown in FIG5 , the sensor pixel circuit 30 includes an emission circuit 31 , a sampling circuit 32 , a driving circuit 33 , and a reading circuit 34 .

[0119] The transmitting circuit 31 is coupled to the first control signal terminal S1, the bias voltage terminal Vb and the first node P1. The transmitting circuit 31 is configured to transmit the bias voltage of the bias voltage terminal Vb to the first node P1 under the control of the first control signal received by the first control signal terminal S1.

[0120] When the sensor pixel circuit 30 provided in the embodiment of the present application is applied to the ultrasonic sensor 20, the first node P1 is coupled to a pixel electrode in the ultrasonic sensor 20. After the bias voltage from the bias voltage terminal Vb is transmitted to the pixel electrode, the piezoelectric layer deforms under the influence of the high static voltage on its upper and lower sides, generating ultrasonic waves.

[0121] The sampling circuit 32 is coupled to the second control signal terminal S2 , the second node P2 and the first node P1 . The sampling circuit 32 is configured to transmit the signal of the first node P1 to the second node P2 under the control of the second control signal received by the second control signal terminal S2 .

[0122] The reflected ultrasound waves reach the piezoelectric layer again, causing it to vibrate at high frequencies, converting these vibrations into high-frequency pulsed electrical signals. This electrical signal is transmitted through the pixel electrode to the first node P1. The sampling circuit 32 then transmits the signal from the first node P1 to the second node P2, completing the sampling of the echo signal.

[0123] The driving circuit 33 is coupled to the second node P2 , the power voltage terminal AP, and the third node P3 . The driving circuit 33 is configured to transmit the power signal of the power voltage terminal AP to the third node P3 under the control of the signal of the second node P2 .

[0124] The driving circuit 33 transmits the power signal of the power voltage terminal AP to the third node P3. The voltage of the second node P2 determines the strength of the signal transmitted to the third node P3. The second node P2 is similar to the switch of a faucet, which determines the flow of the driving circuit 33.

[0125] The read circuit 34 is coupled to the third control signal terminal S3 , the third node P3 and the fourth node P4 . The read circuit 34 is configured to transmit the signal of the third node P3 to the fourth node P4 under the control of the third control signal received by the third control signal terminal S3 .

[0126] The reading circuit 34 serves as a selection circuit for column outputs, and determines whether the sensor pixel circuit 30 transmits the signal of the third node P3 to the fourth node P4 , thereby transmitting the signal to the peripheral control chip, thereby completing the reading of the echo signal.

[0127] In some embodiments, the sensor pixel circuit further includes an auxiliary circuit 35 , which is coupled to the second node P2 and the third control signal terminal S3 .

[0128] Figure 6A is a topological diagram of various circuits in a sensor pixel circuit provided in an embodiment of the present application. Figures 6B-6D are timing diagrams of the pixel circuit shown in Figure 6A provided in an embodiment of the present application.

[0129] In some embodiments, as shown in FIG6A , the transmitting circuit 31 includes a second transistor T2, wherein a control electrode of the second transistor T2 is coupled to the first control signal terminal S1, a first electrode of the second transistor T2 is coupled to the bias voltage terminal Vb, and a second electrode of the second transistor T2 is coupled to the first node P1. Of course, the transmitting circuit 31 may further include one or more transistors connected in series and / or in parallel with the second transistor T2, which is not limited in this embodiment of the present application.

[0130] The sampling circuit 32 includes a third transistor T3, wherein a control electrode of the third transistor T3 is coupled to the second control signal terminal S2, a first electrode of the third transistor T3 is coupled to the first node P1, and a second electrode of the third transistor T3 is coupled to the second node P2. Of course, the sampling circuit 32 may also include one or more transistors connected in series and / or in parallel with the third transistor T3, which is not limited in this embodiment of the present application.

[0131] The driving circuit 33 includes a fourth transistor T4, wherein a control electrode of the fourth transistor T4 is coupled to the second node P2, a first electrode of the fourth transistor T4 is coupled to the third node P3, and a second electrode of the fourth transistor T4 is coupled to the power supply voltage terminal AP. Of course, the driving circuit 33 may further include one or more transistors connected in series and / or in parallel with the fourth transistor T4, which is not limited in this embodiment of the present application.

[0132] The read circuit 34 includes a fifth transistor T5, wherein a control electrode of the fifth transistor T5 is coupled to the third control signal terminal S3, a first electrode of the fifth transistor T5 is coupled to the fourth node P4, and a second electrode of the fourth transistor T4 is coupled to the third node P3. Of course, the read circuit 34 may further include one or more transistors connected in series and / or in parallel with the fifth transistor T5, which is not limited in this embodiment of the present application.

[0133] The auxiliary circuit 35 includes a sixth transistor T6, wherein a control electrode of the sixth transistor T6 is coupled to the second node P2, and a first electrode of the sixth transistor T6 and a second electrode of the sixth transistor T6 are both coupled to the third control signal terminal S3. Of course, the auxiliary circuit 35 may further include one or more transistors connected in series and / or in parallel with the sixth transistor T6, which is not limited in this embodiment of the present application.

[0134] It should be noted that the embodiments of the present invention do not limit the types of transistors in each circuit. That is, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 can be N-type transistors or P-type transistors. The following embodiments of the present invention are described using the example that the transistors are all N-type transistors.

[0135] The first electrode of the transistor may be a drain electrode, and the second electrode may be a source electrode; or the first electrode may be a source electrode, and the second electrode may be a drain electrode. This embodiment of the present invention does not limit this.

[0136] The following is a schematic illustration of a driving method for a sensor pixel circuit according to an embodiment of the present application. As shown in FIG6B , within a sampling period:

[0137] During the launch phase:

[0138] The transmitting circuit 31 transmits the bias voltage of the bias voltage terminal Vb to the first node P1 under the control of the first control signal received by the first control signal terminal S1.

[0139] For example, the first control signal terminal S1 transmits a high-level turn-on signal to control the second transistor T2 to turn on, setting the voltage of the first node P1 to the bias voltage of the bias voltage terminal Vb, allowing the piezoelectric layer to transmit ultrasonic waves. During this period, for example, the second control signal terminal S2 transmits a high-level turn-on signal to control the third transistor T3 to turn on. The third control signal terminal S3 transmits a high-level turn-on signal to control the fifth transistor T5 to turn on. Alternatively, for example, the second control signal terminal S2 transmits a low-level turn-off signal to control the third transistor T3 to turn off. The third control signal terminal S3 transmits a low-level turn-off signal to control the fifth transistor T5 to turn off.

[0140] During the sampling phase:

[0141] After the piezoelectric layer transmits the ultrasonic fingerprint, the ultrasonic fingerprint will propagate toward the surface of the display screen, then be reflected at the interface between the display screen and the finger, and then propagate back to the piezoelectric layer, and be converted into an electrical signal through the piezoelectric layer. The electrical signal is received by the first node P1 corresponding to each sensor pixel circuit 30.

[0142] The sampling circuit 32 transmits the signal of the first node P1 to the second node P2 under the control of the second control signal received at the second control signal terminal S2 .

[0143] For example, the first control signal terminal S1 transmits a low-level shutdown signal to control the second transistor T2 to turn off. The second control signal terminal S2 transmits a high-level start signal to control the third transistor T3 to turn on, allowing the first node P1 and the second node P2 to follow the echo signal. Then, after a suitable time interval, the second control signal terminal S2 transmits a low-level shutdown signal to control the third transistor T3 to turn off. The callback voltage signal at the moment the third transistor T3 turns off can be stored at the second node P2 to complete the sampling of the echo signal. During this period, the third control signal terminal S3 transmits a high-level shutdown signal to control the fifth transistor T5 to turn on. The sixth transistor T6 plays an auxiliary role in the sampling phase to improve sampling accuracy.

[0144] During the read phase:

[0145] The driving circuit 33 transmits the power signal of the power supply voltage terminal AP to the third node P3 under the control of the signal at the second node P2. The reading circuit 34 transmits the signal of the third node P3 to the fourth node P4 under the control of the third control signal received at the third control signal terminal S3.

[0146] For example, when the power supply voltage terminal AP of the sensor pixel circuit 30 is at an appropriate voltage, the signal is converted through the fourth transistor T4 into a current flowing through the fourth transistor T4 and then transmitted to the third node P3. Furthermore, the third control signal terminal S3 transmits a high-level turn-on signal, turning on the fifth transistor T5, transmitting the signal from the third node P3 to the fourth node P4. The pixel signal is then transmitted to the column line coupled to the fourth node P4, and the echo signal is read and digitized by the back-end control chip.

[0147] In some embodiments, as shown in FIG6B , the fourth node P4 is coupled to a fixed voltage terminal in the control circuit via a column line, for example, to an input terminal of an input operational amplifier in an active front end (AFE) in the control circuit.

[0148] Then, during the entire sampling process, the voltage of the fourth node P4 is a fixed voltage.

[0149] Because the capacitance state of the fourth transistor T4 during the sampling and reading phases directly affects the core performance of the sensor pixel circuit 30, and the voltage conditions at the first and second electrodes of the fourth transistor T4 during the sampling cycle affect its capacitance state, if the voltage at the fourth node P4 coupled to the column line is constant throughout the sampling cycle, the voltage at the first electrode of the fourth transistor T4 during the sampling and reading phases will be determined by the column line voltage, making it impossible to maintain an optimal capacitance state, and consequently, unable to guarantee optimal performance of the sensor pixel circuit 30.

[0150] In other embodiments, the fourth node P4 is coupled to a port in the control chip capable of transmitting a variable voltage via a column line. For example, the fourth node P4 is coupled to an input of a charge integrating amplifier in the control chip, where the voltage at the input of the charge integrating amplifier is variable, thereby enabling the control chip to provide a variable voltage to the fourth node P4 of the ultrasonic sensor.

[0151] For example, the variable voltage output circuit outputs a variable voltage in a fixed pattern.

[0152] Alternatively, for example, the control chip further includes a detection circuit configured to detect whether the voltage output by the variable voltage output circuit is sufficient to optimize the equivalent capacitor performance of the fourth transistor T4. If the equivalent capacitor performance is sufficient, the variable voltage output circuit is controlled to continue outputting the current voltage. If the equivalent capacitor performance is insufficient, the variable voltage output circuit is controlled to output a new voltage.

[0153] Then, during the entire sampling process, the voltage of the fourth node P4 is a variable voltage.

[0154] In the embodiment of the present application, by making the fourth node P4 receive a variable voltage, the voltage of the first electrode of the fourth transistor T4 can be adjusted by the voltage of the fourth node P4, so as to optimize the equivalent capacitance of the fourth transistor T4 and improve the gain, signal-to-noise ratio and other performance of the sensor pixel circuit 30.

[0155] In a possible implementation, as shown in FIG6C , the voltage of the fourth node P4 is different in different stages of a sampling period.

[0156] For example, as shown in FIG6C , during the emission phase of a sampling cycle, the voltage at the fourth node P4 is the first voltage. During the sampling phase of the sampling cycle, the voltage at the fourth node P4 is the second voltage. During the reading phase of the sampling cycle, the voltage at the fourth node P4 is the second voltage. That is, within a sampling cycle, the voltage received by the fourth node P4 during the emission phase and the reading phase is the same, namely, the second voltage. The voltage received by the fourth node P4 during the emission phase is the first voltage. Of course, the embodiment of the present application does not limit the magnitude relationship between the first voltage and the second voltage, and can be combined with the specific configuration of the sensor pixel circuit 30. FIG6C is merely an example of the second voltage being greater than the first voltage.

[0157] Of course, the embodiment of the present application is not limited to the fourth node P4 receiving only the first voltage and the second voltage. The fourth node P4 can also receive multiple voltages with different values.

[0158] Alternatively, for example, as shown in FIG6D , during the emission phase of a sampling cycle, the voltage at the fourth node P4 is a first voltage. During the sampling phase of the sampling cycle, the voltage at the fourth node P4 is a second voltage. During the reading phase of the sampling cycle, the voltage at the fourth node P4 is a third voltage. That is, the voltage received by the fourth node P4 at each phase within a sampling cycle is different. Of course, the embodiment of the present application does not limit the magnitude relationship between the first voltage, the second voltage, and the third voltage; it can be combined with the specific configuration of the sensor pixel circuit 30. FIG6D merely illustrates an example in which the third voltage is greater than the second voltage, and the second voltage is greater than the first voltage.

[0159] Of course, the embodiment of the present application is not limited to the fourth node P4 receiving only the first voltage, the second voltage, and the third voltage. The fourth node P4 can also receive multiple voltages with different values.

[0160] In the embodiment of the present application, a variable voltage is provided to the fourth node P4, so that the first electrode of the fifth transistor T5 can receive different voltages at different stages within a sampling period, thereby optimizing the state of the equivalent capacitance of the fifth transistor T5, and further improving the gain, signal-to-noise ratio and other performance of the sensor pixel circuit 30.

[0161] In another possible implementation, in one sampling period, the voltage of the fourth node P4 is the fourth voltage; in another sampling period, the voltage of the fourth node P4 is the fifth voltage. That is, the voltage received by the fourth node P4 in different sampling periods may be different.

[0162] For example, the voltage received by the fourth node P4 may be the same throughout the entire sampling period, but the voltage received by the fourth node P4 may be different in different sampling periods. In this case, the fourth voltage may be understood as a single voltage, and the fifth voltage may also be understood as a single voltage.

[0163] Alternatively, for example, the voltage received by the fourth node P4 varies throughout the sampling period. The voltage received by the fourth node P4 also varies during different sampling periods. In this case, the fourth voltage can be understood as a set of voltages, including voltages corresponding to the emission phase, the sampling phase, and the reading phase. The fifth voltage can also be understood as a set of voltages, including voltages corresponding to the emission phase, the sampling phase, and the reading phase. Within a set of voltages, as long as the voltages in any one phase differ, the fourth voltage and the fifth voltage in the embodiments of the present application are different.

[0164] Of course, the embodiment of the present application is not limited to the fourth node P4 receiving only the fourth voltage and the fifth voltage. The fourth node P4 can also receive multiple voltages with different values.

[0165] During the sampling phase, the voltages at the first and second electrodes of the fourth transistor T4, particularly the voltage at the first electrode of the fourth transistor T4, directly affect the signal-to-noise ratio (SNR) and other performance characteristics of the sensor pixel circuit 30. Taking into account production process variations, the first electrode of the fourth transistor T4 in different ultrasonic sensors' TFT substrates may have different optimal voltages during the sampling phase. The fourth transistor T4 on the same TFT substrate may also have optimal voltages during different sampling phases. By causing the fourth node P4 to receive different voltages during different sampling periods, the embodiment of the present application selects a voltage that optimizes the equivalent capacitance of the fifth transistor T5, thereby improving the gain, SNR, and other performance characteristics of the sensor pixel circuit 30.

[0166] Example 2

[0167] The main difference between Example 2 and Example 1 is that the sensor pixel circuit 30 provided in Example 2 further includes a voltage writing circuit based on the structure of Example 1.

[0168] FIG7 is a topological diagram of a sensor pixel circuit provided in an embodiment of the present application.

[0169] An embodiment of the present application provides a sensor pixel circuit 30 , as shown in FIG7 . The sensor pixel circuit 30 includes an emission circuit 31 , a sampling circuit 32 , a driving circuit 33 , a reading circuit 34 , and a voltage writing circuit 36 ​​.

[0170] The structures of the transmitting circuit 31 , the sampling circuit 32 , the driving circuit 33 , and the reading circuit 34 are the same as those in Example 1 and will not be described again here.

[0171] The voltage writing circuit 36 ​​is coupled to the fourth control signal terminal S4 , the third node P3 and the set voltage terminal Vint, and is configured to transmit the set voltage of the set voltage terminal Vint to the third node P3 under the control of the fourth control signal of the fourth control signal terminal S4 .

[0172] Because the voltage at the second node P2, the voltage at the power supply voltage terminal AP, and the voltage at the third node P3 all affect the performance of the driver circuit 33, the sensor pixel circuit 30 provided in the embodiment of the present application is provided with a voltage writing circuit 36 ​​coupled to the third node P3, so that the voltage at the third node P3 can be controlled by the voltage writing circuit 36. In this way, combined with the specific structure of the sensor pixel circuit 30, the voltage at the third node P3 can be optimized to optimize the performance of the driver circuit 33, thereby achieving the purpose of optimizing the performance of the sensor pixel circuit 30.

[0173] In some embodiments, as shown in FIG. 7 , the fourth control signal terminal S4 is coupled to the first control signal terminal S1 .

[0174] In this way, the voltage writing circuit 36 ​​is controlled by the first control signal terminal S1 , which can reduce the number of signal ports and lower the requirements for the control signal.

[0175] In some other embodiments, as shown in FIG. 7 , the fourth control signal terminal S4 is coupled to the second control signal terminal S2 .

[0176] In this way, the voltage writing circuit 36 ​​is controlled by the second control signal terminal S2, which can reduce the number of signal ports and lower the requirements for the control signal.

[0177] In some embodiments, the sensor pixel circuit 30 further includes an auxiliary circuit 35 , which is coupled to the second node P2 and an auxiliary voltage terminal Vf; the auxiliary voltage terminal Vf is insulated from the third control signal terminal S3 .

[0178] Since the voltage of the second node P2, the voltage of the power supply voltage terminal AP, and the voltage of the third node P3 all affect the performance of the driving circuit 33, an auxiliary circuit 35 connected to the second node P2 is provided. The voltage of the second node P2 can be optimized through the auxiliary circuit 35 to optimize the performance of the driving circuit 33 and achieve the purpose of optimizing the performance of the sensor pixel circuit 30.

[0179] FIG8A is a topological diagram of each circuit in a sensor pixel circuit provided in an embodiment of the present application. FIG8B and FIG8C are timing diagrams of the pixel circuit shown in FIG8A provided in an embodiment of the present application.

[0180] In some embodiments, as shown in FIG8A , the voltage writing circuit 36 ​​includes a first transistor T1, wherein a control electrode of the first transistor T1 is coupled to the fourth control signal terminal S4, a first electrode of the first transistor T1 is coupled to the set voltage terminal Vint, and a second electrode of the first transistor T1 is coupled to the third node P3. Of course, the voltage writing circuit 36 ​​may also include one or more transistors connected in series and / or in parallel with the first transistor T1, which is not limited in this embodiment of the present application.

[0181] Whether the set voltage terminal Vint is connected to the third node P3 is controlled by the first transistor T1 , which has a simple process, a simple structure and a low cost.

[0182] In some embodiments, as shown in FIG8A , the auxiliary circuit 35 includes a sixth transistor T6 , a control electrode of the sixth transistor T6 is coupled to the second node P2 , and a first electrode of the sixth transistor T6 and a second electrode of the sixth transistor T6 are both coupled to the third control signal terminal S3 .

[0183] The potential of the second node P2 is adjusted by the sixth transistor T6 , which has a simple process, a simple structure and a low cost.

[0184] The following is a schematic illustration of the driving method of the sensor pixel circuit provided in the embodiment of the present application. As shown in FIG8B , within one sampling period, the driving process of the emission circuit 31, the sampling circuit 32, the driving circuit 33, and the reading circuit 34 within one image frame is the same as that in Example 1. The difference is that:

[0185] Before the reading phase, the voltage writing circuit 36 ​​transmits the set voltage of the set voltage terminal Vint to the third node P3 under the control of the fourth control signal of the fourth control signal terminal S4.

[0186] For example, before the reading phase, the fourth control signal terminal S4 transmits a high-level start signal to control the first transistor T1 to be turned on, and transmits the set voltage of the set voltage terminal Vint to the third node P3.

[0187] As shown in FIG8B , the third control signal terminal S3 transmits a high-level start signal only in the reading phase, and the fifth transistor T5 is turned on only in the reading phase. The fifth transistor T5 is not turned on in both the emission phase and the sampling phase.

[0188] As shown in FIG8B , the fourth control signal terminal S4 may transmit a high-level start signal during the transmission phase. As shown in FIG8C , the fourth control signal terminal S4 may also transmit a high-level start signal during both the transmission phase and the sampling phase. Of course, the fourth control signal terminal S4 may also transmit a high-level start signal during the sampling phase.

[0189] In some embodiments, as shown in FIG8B , the set voltage transmitted by the set voltage terminal Vint is a fixed voltage.

[0190] In some other embodiments, as shown in FIG8C , the set voltage transmitted by the set voltage terminal Vint is a variable voltage.

[0191] For example, in a sampling period, during the emission phase, the set voltage is a first voltage; during the sampling phase, the set voltage is a second voltage.

[0192] Alternatively, in one sampling period, the set voltage is the third voltage, and in another sampling period, the set voltage is the fourth voltage.

[0193] The manner in which the set voltage varies can be similar to the manner in which the voltage at the fourth node P4 varies in Example 1. For details, refer to the above description and are omitted here. The set voltage terminal Vint can also be coupled to a control chip, for example, which outputs a variable voltage to the set voltage terminal Vint. For example, the control chip can provide different set voltages to the ultrasonic sensor at different times.

[0194] In the embodiment of the present application, by making the third node P3 receive a variable voltage, the equivalent capacitance effect of the fourth transistor T4 in different stages within a sampling period or in different sampling periods can be adjusted to be better, so as to improve the gain, signal-to-noise ratio and other performance of the sensor pixel circuit 30.

[0195] In some embodiments, the auxiliary voltage of the auxiliary voltage terminal Vf maintains a high level signal during each phase of the sampling period. For example, the auxiliary voltage of the auxiliary voltage terminal Vf has the same timing as the third control signal of the third control signal terminal S3 in Example 1.

[0196] Example 3

[0197] The main difference between Example 3 and Example 1 is that Example 3 includes multiple groups of receiving circuits and driving circuits 33.

[0198] FIG9 is a topological diagram of a sensor pixel circuit provided in an embodiment of the present application.

[0199] In some embodiments, as shown in FIG. 9 , the sensor pixel circuit 30 includes an emission circuit 31 , a first sampling circuit 32 , a second sampling circuit 32 ′, a first driving circuit 33 , a second driving circuit 33 ′, and a readout circuit 34 .

[0200] The transmitting circuit 31 is coupled to the first control signal terminal S1, the bias voltage terminal Vb and the first node P1. The transmitting circuit 31 is configured to transmit the bias voltage of the bias voltage terminal Vb to the first node P1 under the control of the first control signal received by the first control signal terminal S1.

[0201] The first sampling circuit 32 is coupled to the second control signal terminal S2 , the second node P2 and the first node P1 . The first sampling circuit 32 is configured to transmit the signal of the first node P1 to the second node P2 under the control of the second control signal received at the second control signal terminal S2 .

[0202] The first driving circuit 33 is coupled to the second node P2 , the power voltage terminal AP, and the third node P3 . The first driving circuit 33 is configured to transmit the power signal of the power voltage terminal AP to the third node P3 under the control of the signal of the second node P2 .

[0203] The read circuit 34 is coupled to the third control signal terminal S3 , the third node P3 and the fourth node P4 . The read circuit 34 is configured to transmit the signal of the third node P3 to the fourth node P4 under the control of the third control signal received by the third control signal terminal S3 .

[0204] The second sampling circuit 32′ is coupled to the fourth control signal terminal S4, the fifth node P5, and the first node P1. The second sampling circuit 32′ is configured to transmit the signal from the first node P1 to the fifth node P5 under the control of the fourth control signal received at the fourth control signal terminal S4. For example, the second control signal terminal S2 and the fourth control signal terminal S4 are insulated from each other.

[0205] The second driving circuit 33 ′ is coupled to the fifth node P5 , the power voltage terminal AP and the third node P3 . The second driving circuit 33 ′ is configured to transmit the power signal to the third node P3 under the control of the signal at the fifth node P5 .

[0206] In some embodiments, the structure of the first driving circuit 33 is different from that of the second driving circuit 33', wherein different materials, different topology circuits, and different device sizes used in the topology circuits are all considered structural differences in the embodiments of the present application.

[0207] That is to say, the sampling circuit 32 and the driving circuit 33 are regarded as a reading unit, and the sensor pixel circuit 30 includes multiple independently controlled and structurally different reading units. The number of reading units is not limited to two, and can be more than two. Then, in different electronic devices, the sensor pixel circuit 30 can select a reading unit with the best performance from multiple reading units to perform fingerprint collection to overcome the deviation caused by process errors. In the same electronic device, the sensor pixel circuit 30 can also select different reading units to perform fingerprint collection in different sampling cycles to overcome the deviation caused by changes in the state of the electronic device (such as aging, temperature changes, etc.). Thereby achieving the purpose of optimizing the performance of the sensor pixel circuit 30.

[0208] In some embodiments, as shown in FIG9 , the sensor pixel circuit further includes a first auxiliary circuit 35 and a second auxiliary circuit 35 ′. The first auxiliary circuit 35 is coupled to the second node P2 and the auxiliary voltage terminal Vf, while the second auxiliary circuit 35 ′ is coupled to the fifth node P5 and the auxiliary voltage terminal Vf. For example, the auxiliary voltage terminal Vf and the third control signal terminal S3 are insulated from each other and are configured to receive different signals.

[0209] By providing the first auxiliary circuit 35 and the second auxiliary circuit 35 ′, the potentials of the second node P2 and the fifth node P5 can be adjusted to optimize the performance of the first driving circuit 33 and the second driving circuit 33 ′, thereby achieving the purpose of optimizing the performance of the sensor pixel circuit 30 .

[0210] FIG10A is a topological diagram of each circuit in a sensor pixel circuit provided in an embodiment of the present application, and FIG10B and FIG10C are timing diagrams of the pixel circuit shown in FIG10A provided in an embodiment of the present application.

[0211] In some embodiments, as shown in FIG10A , the first driving circuit 33 includes a first transistor T1 ; a control electrode of the first transistor T1 is coupled to the second node P2 , a first electrode of the first transistor T1 is coupled to the third node P3 , and a second electrode of the first transistor T1 is coupled to the power supply voltage terminal AP.

[0212] The second driving circuit 33 ′ includes a second transistor T2 ; a control electrode of the second transistor T2 is coupled to the fifth node P5 , a first electrode of the second transistor T2 is coupled to the third node P3 , and a second electrode of the second transistor T2 is coupled to the power supply voltage terminal AP.

[0213] For example, the length of the channel of the first transistor T1 is different from the length of the channel of the second transistor T2.

[0214] Alternatively, for example, the width of the channel of the first transistor T1 is different from the width of the channel of the second transistor T2 .

[0215] Alternatively, for example, the length of the channel of the first transistor T1 is different from the length of the channel of the second transistor T2 , and the width of the channel of the first transistor T1 is different from the width of the channel of the second transistor T2 .

[0216] Since the channel sizes of the first transistor T1 and the second transistor T2 affect the equivalent capacitance of the first transistor T1 and the second transistor T2, by setting the channel sizes of the first transistor T1 and the second transistor T2 to be different, the performance of the first driving circuit 33 and the second driving circuit 33' can be made different, thereby achieving the purpose of optimizing the performance of the sensor pixel circuit 30.

[0217] In some embodiments, as shown in FIG10A , the first sampling circuit 32 includes a third transistor T3 , a control electrode of the third transistor T3 is coupled to the second control signal terminal S2 , a first electrode of the third transistor T3 is coupled to the first node P1 , and a second electrode of the third transistor T3 is coupled to the second node P2 .

[0218] The second sampling circuit 32 ′ includes a fourth transistor T4 , a control electrode of the fourth transistor T4 coupled to the fourth control signal terminal S4 , a first electrode of the fourth transistor T4 coupled to the first node P1 , and a second electrode of the fourth transistor T4 coupled to the fifth node P5 .

[0219] The first auxiliary circuit 35 includes a fifth transistor T5 , a control electrode of the fifth transistor T5 is coupled to the second node P2 , and a first electrode and a second electrode of the fifth transistor T5 are both coupled to the auxiliary voltage terminal Vf.

[0220] The second auxiliary circuit 35 ′ includes a sixth transistor T6 , a control electrode of the sixth transistor T6 is coupled to the fifth node P5 , and a first electrode and a second electrode of the sixth transistor T6 are both coupled to the auxiliary voltage terminal Vf.

[0221] The transmitting circuit 31 includes a seventh transistor T7 , a control electrode of the seventh transistor T7 is coupled to the first control signal terminal S1 , a first electrode of the seventh transistor T7 is coupled to the bias voltage terminal Vb, and a second electrode of the seventh transistor T7 is coupled to the first node P1 .

[0222] The read circuit 34 includes an eighth transistor T8 , a control electrode of the eighth transistor T8 is coupled to the third control signal terminal S3 , a first electrode of the eighth transistor T8 is coupled to the fourth node P4 , and a second electrode of the eighth transistor T8 is coupled to the third node P3 .

[0223] Of course, in the above-mentioned first transistor T1 to seventh transistor T7, each transistor may further include transistors connected in series and / or in parallel therewith. This is only an example in the embodiment of the present application and is not intended to be limiting.

[0224] The following schematically illustrates the driving method for the sensor pixel circuit provided in an embodiment of the present application. As shown in FIG10B , the driving process described in Example 2 is performed within a sampling cycle. Unlike Example 2, the process associated with voltage write circuit 36 ​​is not performed. Alternatively, as shown in FIG10C , during the emission phase, the sensor pixel circuit is still controlled by emission circuit 31. However, during the sampling phase, the sensor pixel circuit is controlled by second sampling circuit 32′. Under the control of a second control signal received at fourth control signal terminal S4, second sampling circuit 32′ transmits the signal at first node P1 to fifth node P5. During the reading phase, the sensor pixel circuit is controlled by second driver circuit 33′ and reader circuit 34. Under the control of a signal at fifth node P5, second driver circuit 33′ transmits the power supply signal at power supply voltage terminal AP to third node P3. Under the control of a third control signal, reader circuit 34 transmits the signal at third node P3 to fourth node P4. At the same time, the control chip transmits a second control signal to second control signal terminal S2 or a fourth control signal to fourth control signal terminal S4.

[0225] In some embodiments, after the sensor pixel circuit 30 determines which reading unit is to be operated, the sensor pixel circuit 30 always operates with the same reading unit, and then the sensor pixel circuit 30 only executes the timing sequence shown in FIG10B or only executes the timing sequence shown in FIG10C.

[0226] In other embodiments, the sensor pixel circuit 30 may switch the reading unit. Then, the sensor pixel circuit 30 performs the timing shown in FIG10B in some sampling cycles and performs the timing shown in FIG10C in some sampling cycles.

[0227] For example, when the sensor pixel circuit 30 executes the timing sequence shown in FIG. 10B , the control chip in the electronic device transmits the signal shown in FIG. 10B to the sensor pixel circuit. When the sensor pixel circuit 30 executes the timing sequence shown in FIG. 10C , the control chip in the electronic device transmits the signal shown in FIG. 10C . Whether the sensor pixel circuit 30 executes the timing sequence shown in FIG. 10B or the timing sequence shown in FIG. 10C can be determined by the control chip, for example. The control chip determines which timing sequence provides better performance for the sensor pixel circuit 30, either when executing the timing sequence shown in FIG. 10B or when executing the timing sequence shown in FIG. 10C , and then determines which timing sequence the sensor pixel circuit 30 executes. At the same time, the control chip transmits a second control signal or a fourth control signal to the sensor pixel circuit 30. Of course, the second control signal in this case is an on-state signal (e.g., a high-level signal) that can control the third transistor T3 to turn on. Similarly, the fourth control signal in this case is an on-state signal (e.g., a high-level signal) that can control the fourth transistor T4 to turn on.

[0228] As shown in FIG. 10B and FIG. 10C , during the entire sampling period, the voltage at the fourth voltage terminal P4 is always a fixed voltage.

[0229] Example 4

[0230] The main difference between Example 4 and Example 3 is that in Example 4, the auxiliary voltage terminal is coupled to the third control signal terminal.

[0231] FIG11 is a topological diagram of a sensor pixel circuit provided in an embodiment of the present application.

[0232] In some embodiments, as shown in FIG11 , the sensor pixel circuit 30 includes an emission circuit 31 , a first sampling circuit 32 , a second sampling circuit 32 ′, a first driving circuit 33 , a second driving circuit 33 ′, a reading circuit 34 , a first auxiliary circuit 35 , and a second auxiliary circuit 35 ′.

[0233] The structures of the transmitting circuit 31, the first sampling circuit 32, the second sampling circuit 32', the first driving circuit 33, the second driving circuit 33', the reading circuit 34, the first auxiliary circuit 35 and the second auxiliary circuit 35' are the same as those in Example 3, except that, as shown in Figure 11, the auxiliary voltage terminal Vf coupled to the first auxiliary circuit 35 and the second auxiliary circuit 35' is coupled to the third control signal terminal S3 coupled to the reading circuit 34.

[0234] FIG12A is a topological diagram of each circuit in a sensor pixel circuit provided in an embodiment of the present application. FIG12B and FIG12C are timing diagrams of the pixel circuit shown in FIG12A provided in an embodiment of the present application.

[0235] As shown in FIG12A , the structures of the transmitting circuit 31 , the first sampling circuit 32 , the second sampling circuit 32 ′, the first driving circuit 33 , the second driving circuit 33 ′, the reading circuit 34 , the first auxiliary circuit 35 and the second auxiliary circuit 35 ′ are the same as those in Example 3. For details, please refer to the relevant description of FIG10A , which will not be repeated here.

[0236] In some embodiments, taking the operation of the first sampling circuit 32 as an example, as shown in FIG12B , the driving process of the sensor pixel circuit 30 is the same as the driving process of the sensor pixel circuit 30 in FIG10A , the signal of the third control signal terminal S3 follows the signal of the auxiliary voltage terminal Vf, and the voltage of the fourth node P4 is a fixed voltage.

[0237] In some other embodiments, as shown in FIG12C , the voltage of the fourth node P4 is a variable voltage. The manner in which the voltage of the fourth node P4 changes can be the same as that in Example 1, and will not be repeated here.

[0238] An embodiment of the present application further provides an array substrate, comprising a substrate and a plurality of sensor pixel circuits 30 of any of the above-mentioned types and a plurality of column lines arranged on one side of the substrate. The plurality of sensor pixel circuits 30 are arranged, for example, in an array on the substrate, and the fourth nodes P4 of the sensor pixel circuits 30 located in the same column are coupled to the same column line.

[0239] For example, the topological structure of the sensor pixel circuits 30 on the same array substrate is the same. When the array substrate described above is applied to the ultrasonic sensor provided in the embodiment of the present application, multiple sensor pixel circuits 30 are coupled to corresponding pixel electrodes. Based on the structure of the sensor pixel circuits 30 provided in the embodiment of the present application, the performance of the ultrasonic sensor can be improved.

[0240] The above are only specific embodiments of the present application, but the scope of protection of the present application is not limited thereto. Any changes or replacements within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A sensor pixel circuit, characterized in that: include: a transmitting circuit coupled to the first control signal terminal, the bias voltage terminal and the first node, and configured to transmit the bias voltage of the bias voltage terminal to the first node under the control of the first control signal received by the first control signal terminal; a sampling circuit coupled to the second control signal terminal, the second node and the first node, and configured to transmit the signal of the first node to the second node under the control of the second control signal received at the second control signal terminal; a driving circuit coupled to the second node, the power supply voltage terminal, and the third node, and configured to transmit the power supply signal of the power supply voltage terminal to the third node under the control of the signal of the second node; a reading circuit coupled to the third control signal terminal, the third node and the fourth node, and configured to transmit the signal of the third node to the fourth node under the control of the third control signal received by the third control signal terminal; The voltage writing circuit is coupled to the fourth control signal terminal, the third node and the set voltage terminal, and is used to transmit the set voltage of the set voltage terminal to the third node under the control of the fourth control signal of the fourth control signal terminal.

2. The sensor pixel circuit according to claim 1, characterized in that: The set voltage received by the set voltage terminal is a variable voltage.

3. The sensor pixel circuit according to claim 2, characterized in that: In a sampling cycle, during the emission phase, the set voltage is a first voltage; during the sampling phase, the set voltage is a second voltage.

4. The sensor pixel circuit according to claim 2 or 3, characterized in that: In one sampling cycle, the set voltage is a third voltage; in another sampling cycle, the set voltage is a fourth voltage.

5. The sensor pixel circuit according to any one of claims 1 to 4, characterized in that: The sensor pixel circuit further includes an auxiliary circuit coupled to the second node and an auxiliary voltage terminal.

6. The sensor pixel circuit according to any one of claims 1 to 5, characterized in that: The fourth control signal terminal is coupled to the first control signal terminal; or, The fourth control signal terminal is coupled to the second control signal terminal.

7. The sensor pixel circuit according to any one of claims 1 to 6, characterized in that: The voltage writing circuit includes a first transistor, a control electrode of the first transistor is coupled to the fourth control signal terminal, a first electrode of the first transistor is coupled to the set voltage terminal, and a second electrode of the first transistor is coupled to the third node.

8. The sensor pixel circuit according to any one of claims 1 to 7, characterized in that: The transmitting circuit includes a second transistor, a control electrode of the second transistor is coupled to the first control signal terminal, a first electrode of the second transistor is coupled to the bias voltage terminal, and a second electrode of the second transistor is coupled to the first node; and / or, The sampling circuit includes a third transistor, a control electrode of the third transistor is coupled to the second control signal terminal, a first electrode of the third transistor is coupled to the first node, and a second electrode of the third transistor is coupled to the second node; and / or, The driving circuit comprises a fourth transistor, a control electrode of the fourth transistor is coupled to the second node, a first electrode of the fourth transistor is coupled to the third node, and a second electrode of the fourth transistor is coupled to the power supply voltage terminal; and / or, The reading circuit includes a fifth transistor, a control electrode of the fifth transistor is coupled to the third control signal terminal, a first electrode of the fifth transistor is coupled to the fourth node, and a second electrode of the fourth transistor is coupled to the third node.

9. The sensor pixel circuit according to claim 5, characterized in that: The auxiliary circuit includes a sixth transistor, a control electrode of the sixth transistor is coupled to the second node, and a first electrode of the sixth transistor and a second electrode of the sixth transistor are both coupled to the third control signal terminal.

10. A sensor pixel circuit, characterized in that: include: a transmitting circuit coupled to the first control signal terminal, the bias voltage terminal and the first node, and configured to transmit the bias voltage of the bias voltage terminal to the first node under the control of the first control signal received by the first control signal terminal; A first sampling circuit is coupled to the second control signal terminal, the second node and the first node, and is used to transmit the signal of the first node to the second node under the control of the second control signal received by the second control signal terminal; a first driving circuit coupled to the second node, the power supply voltage terminal, and the third node, and configured to transmit the power supply signal of the power supply voltage terminal to the third node under the control of the signal of the second node; a reading circuit coupled to the third control signal terminal, the third node and the fourth node, and configured to transmit the signal of the third node to the fourth node under the control of the third control signal received by the third control signal terminal; a second sampling circuit coupled to a fourth control signal terminal, the fifth node and the first node, and configured to transmit a signal of the first node to the fifth node under the control of a fourth control signal received by the fourth control signal terminal; a second driving circuit coupled to the fifth node, the power supply voltage terminal and the third node, and configured to transmit the power supply signal to the third node under the control of the signal of the fifth node; The structure of the first driving circuit is different from that of the second driving circuit.

11. The sensor pixel circuit according to claim 10, characterized in that: The sensor pixel circuit also includes a first auxiliary circuit and a second auxiliary circuit; The first auxiliary circuit is coupled to the second node and an auxiliary voltage terminal; the second auxiliary circuit is coupled to the fifth node and the auxiliary voltage terminal.

12. The sensor pixel circuit according to claim 10 or 11, characterized in that: The first driving circuit includes a first transistor; a control electrode of the first transistor is coupled to the second node, a first electrode of the first transistor is coupled to the third node, and a second electrode of the first transistor is coupled to the power supply voltage terminal; The second driving circuit includes a second transistor; a control electrode of the second transistor is coupled to the fifth node, a first electrode of the second transistor is coupled to the third node, and a second electrode of the second transistor is coupled to the power supply voltage terminal; A length of a channel of the first transistor is different from a length of a channel of the second transistor, and / or a width of a channel of the first transistor is different from a width of a channel of the second transistor.

13. The sensor pixel circuit according to any one of claims 10 to 12, characterized in that: The first sampling circuit includes a third transistor, a control electrode of the third transistor is coupled to the second control signal terminal, a first electrode of the third transistor is coupled to the first node, and a second electrode of the third transistor is coupled to the second node; and / or, The second sampling circuit includes a fourth transistor, a control electrode of the fourth transistor is coupled to the fourth control signal terminal, a first electrode of the fourth transistor is coupled to the first node, and a second electrode of the fourth transistor is coupled to the fifth node; and / or, The first auxiliary circuit comprises a fifth transistor, a control electrode of the fifth transistor is coupled to the second node, and a first electrode and a second electrode of the fifth transistor are both coupled to the auxiliary voltage terminal; and / or, The second auxiliary circuit comprises a sixth transistor, a control electrode of the sixth transistor is coupled to the fifth node, and a first electrode and a second electrode of the sixth transistor are both coupled to the auxiliary voltage terminal; and / or, The transmitting circuit includes a seventh transistor, a control electrode of the seventh transistor is coupled to the first control signal terminal, a first electrode of the seventh transistor is coupled to the bias voltage terminal, and a second electrode of the seventh transistor is coupled to the first node; and / or, The reading circuit includes an eighth transistor, a control electrode of the eighth transistor is coupled to the third control signal terminal, a first electrode of the eighth transistor is coupled to the fourth node, and a second electrode of the eighth transistor is coupled to the third node.

14. The sensor pixel circuit according to any one of claims 11 to 13, characterized in that: The auxiliary voltage terminal is coupled to the third control signal terminal.

15. The sensor pixel circuit according to claim 14, characterized in that: The fourth node is used to be coupled to the voltage variable terminal.

16. The sensor pixel circuit according to claim 15, characterized in that: In a sampling cycle, in the emission phase, the voltage of the fourth node is the first voltage; in the sampling phase, the voltage of the fourth node is the second voltage; in the reading phase, the voltage of the fourth node is the second voltage or the third voltage.

17. The sensor pixel circuit according to claim 15 or 16, characterized in that: In one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is a fifth voltage.

18. A sensor pixel circuit, characterized in that: include: a transmitting circuit coupled to the first control signal terminal, the bias voltage terminal and the first node, and configured to transmit the bias voltage of the bias voltage terminal to the first node under the control of the first control signal received by the first control signal terminal; a sampling circuit coupled to the second control signal terminal, the second node and the first node, and configured to transmit the signal of the first node to the second node under the control of the second control signal received at the second control signal terminal; a driving circuit coupled to the second node, the power supply voltage terminal, and the third node, and configured to transmit the power supply signal of the power supply voltage terminal to the third node under the control of the signal of the second node; The reading circuit is coupled to the third control signal terminal, the third node and the fourth node, and is used to transmit the signal of the third node to the fourth node under the control of the third control signal received by the third control signal terminal; the fourth node is used to couple to the voltage variable terminal.

19. The sensor pixel circuit according to claim 18, characterized in that: In a sampling cycle, in the emission phase, the voltage of the fourth node is the first voltage; in the sampling phase, the voltage of the fourth node is the second voltage; in the reading phase, the voltage of the fourth node is the second voltage or the third voltage.

20. The sensor pixel circuit according to claim 18 or 19, characterized in that: In one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is a fifth voltage.

21. The sensor pixel circuit according to any one of claims 18 to 20, characterized in that: The sensor pixel circuit further includes an auxiliary circuit coupled to the second node and the third control signal terminal.

22. An array substrate, characterized in that: It comprises a substrate and a plurality of sensor pixel circuits arranged on one side of the substrate, wherein the sensor pixel circuit comprises the sensor pixel circuit according to any one of claims 1 to 21.

23. An ultrasonic sensor, characterized in that: It comprises an array substrate and a plurality of pixel electrodes, wherein the array substrate comprises the array substrate according to claim 22, and the plurality of pixel electrodes are coupled correspondingly to a plurality of sensor pixel circuits.

24. An electronic device, characterized in that: The invention comprises an ultrasonic sensor and a control chip, wherein the ultrasonic sensor comprises the ultrasonic sensor according to claim 23, and the ultrasonic sensor is coupled to the control chip.

25. The electronic device according to claim 24, characterized in that: The control chip is used to transmit a set voltage to a set voltage terminal of the ultrasonic sensor.

26. The electronic device according to claim 24, characterized in that: The port of the control chip coupled to the fourth node of the ultrasonic sensor is a voltage variable terminal.

27. The electronic device according to claim 24, characterized in that: At the same time, the control chip is used to transmit the second control signal or the fourth control signal to the ultrasonic sensor.

28. A method for driving a sensor pixel circuit according to any one of claims 1 to 9, characterized in that: include: In one sampling period: Launch phase: The transmitting circuit transmits the bias voltage of the bias voltage terminal to the first node under the control of the first control signal received at the first control signal terminal; Sampling phase: The sampling circuit transmits the signal of the first node to the second node under the control of the second control signal received at the second control signal terminal; Reading phase: The driving circuit transmits the power signal of the power voltage terminal to the third node under the control of the signal of the second node; the reading circuit transmits the signal of the third node to the fourth node under the control of the third control signal received at the third control signal terminal; Before the reading phase, the voltage writing circuit transmits the set voltage of the set voltage terminal to the third node under the control of the fourth control signal of the fourth control signal terminal.

29. The driving method according to claim 28, characterized in that: The set voltage received by the set voltage terminal is a variable voltage.

30. The driving method according to claim 29, characterized in that: In a sampling cycle, during the emission phase, the set voltage is a first voltage; during the sampling phase, the set voltage is a second voltage.

31. The driving method according to claim 29 or 30, characterized in that: In one sampling cycle, the set voltage is a third voltage; in another sampling cycle, the set voltage is a fourth voltage.

32. A method for driving a sensor pixel circuit according to any one of claims 10 to 17, characterized in that: include: In one sampling period: Launch phase: The transmitting circuit transmits the bias voltage of the bias voltage terminal to the first node under the control of the first control signal received at the first control signal terminal; Sampling phase: The first sampling circuit transmits the signal of the first node to the second node under the control of the second control signal received at the second control signal terminal; Reading phase: The first driving circuit transmits the power signal of the power voltage terminal to the third node under the control of the signal of the second node; The reading circuit transmits the signal of the third node to the fourth node under the control of the third control signal received by the third control signal terminal; or, Sampling phase: The second sampling circuit transmits the signal of the first node to the fifth node under the control of the second control signal received at the fourth control signal terminal; Reading phase: The second driving circuit transmits the power signal of the power voltage terminal to the third node under the control of the signal of the fifth node; the reading circuit transmits the signal of the third node to the fourth node under the control of the third control signal.

33. The driving method according to claim 32, characterized in that: The voltage of the fourth node is a variable voltage.

34. The driving method according to claim 33, characterized in that: The voltage of the fourth node is a variable voltage, including: in the sampling period, in the emission phase, the voltage of the fourth node is the first voltage; in the sampling phase, the voltage of the fourth node is the second voltage; in the reading phase, the voltage of the fourth node is the second voltage or the third voltage.

35. The driving method according to claim 33 or 34, characterized in that: The voltage of the fourth node is a variable voltage, including: in one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is a fifth voltage.

36. A method for driving a sensor pixel circuit according to any one of claims 18 to 21, characterized in that: include: In one sampling period: Launch phase: The transmitting circuit transmits the bias voltage of the bias voltage terminal to the first node under the control of the first control signal received at the first control signal terminal; Sampling phase: The sampling circuit transmits the signal of the first node to the second node under the control of the second control signal received at the second control signal terminal; Reading phase: The driving circuit transmits the power signal of the power voltage terminal to the third node under the control of the signal of the second node; The reading circuit transmits the signal of the third node to the fourth node under the control of the third control signal received by the third control signal terminal; the voltage of the fourth node is a variable voltage.

37. The driving method according to claim 36, characterized in that: The voltage of the fourth node is a variable voltage, including: in the sampling period, in the emission phase, the voltage of the fourth node is the first voltage; in the sampling phase, the voltage of the fourth node is the second voltage; in the reading phase, the voltage of the fourth node is the second voltage or the third voltage.

38. The driving method according to claim 36 or 37, characterized in that: The voltage of the fourth node is a variable voltage, including: in one sampling period, the voltage of the fourth node is a fourth voltage; in another sampling period, the voltage of the fourth node is a fifth voltage.

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