Decoder configuration in a wireless communications system

Abstract

Various aspects of the present disclosure relate to decoder configuration in a wireless communications system. A device using a guessing random additive noise decoding (GRAND) decoder is configured with various parameters, such as an abandonment threshold, which of multiple variants of GRAND decoders to use, whether a de-interleaving pattern is to be used by the GRAND decoder, etc. This configuration allows the same GRAND decoder to decode codewords encoded in any of a variety of different manners. Based on the configuration, the GRAND decoder receives a codeword over a communication channel and attempts to guess the noise on the communication channel. If the abandonment threshold number of guesses is made without resulting in a codeword that is included in the codebook, the decoding of the received codeword fails. An indication of the failure, and a reason for the failure, is optionally returned to the configuring device.

Description

Lenovo Ref. No. SMM920240020-WO-PCT 1 DECODER CONFIGURATION IN A WIRELESS COMMUNICATIONS SYSTEM RELATED APPLICATION

[0001] This application claims priority to U.S. Patent Application Serial No. 63 / 572,859 filed April 1, 2024 entitled “DECODER CONFIGURATION IN A WIRELESS COMMUNICATIONS SYSTEM,” the disclosure of which is incorporated by reference herein in its entirety. TECHNICAL FIELD

[0002] The present disclosure relates to wireless communications, and more specifically to decoder configuration in a wireless communications system. BACKGROUND

[0003] A wireless communications system may include one or multiple network communication devices, which may be otherwise known as network equipment (NE), supporting wireless communications for one or multiple user communication devices, which may be otherwise known as user equipment (UE), or other suitable terminology. The wireless communications system may support wireless communications with one or multiple user communication devices by utilizing resources of the wireless communication system (e.g., time resources (e.g., symbols, slots, subframes, frames, or the like) or frequency resources (e.g., subcarriers, carriers, or the like)). Additionally, the wireless communications system may support wireless communications across various radio access technologies including third generation (3G) radio access technology, fourth generation (4G) radio access technology, fifth generation (5G) radio access technology, among other suitable radio access technologies beyond 5G (e.g., sixth generation (6G)). SUMMARY

[0004] An article “a” before an element is unrestricted and understood to refer to “at least one” of those elements or “one or more” of those elements. The terms “a,” “at least one,” “one or more,” and “at least one of one or more” may be interchangeable. As used herein, including in the claims, “or” as used in a list of items (e.g., a list of items prefaced by a phrase such as “at least one of” or “one or more of” or “one or both of”) indicates an inclusive list such that, for example, a list of at least one of A, B, or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C). By Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 2 way of another example, a list of at least one of B; or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C). Also, as used herein, the phrase “based on” shall not be construed as a reference to a closed set of conditions. For example, an example step that is described as “based on condition A” may be based on both a condition A and a condition B without departing from the scope of the present disclosure. In other words, as used herein, the phrase “based on” shall be construed in the same manner as the phrase “based at least in part on”. Further, as used herein, including in the claims, a “set” may include one or more elements.

[0005] An apparatus (e.g., a UE or a NE) for wireless communication is described. The apparatus may be configured to, capable of, or operable to perform one or more operations as described herein. For example, the apparatus may be configured to, capable of, or operable to receive a guessing random additive noise decoding (GRAND) configuration; receive a codeword; and attempt to decode the codeword using a decoder and based at least in part on the GRAND configuration.

[0006] A processor (e.g., a standalone processor chipset, or a component of a UE or of or a NE) for wireless communication is described. The processor may be configured to, capable of, or operable to perform one or more operations as described herein. For example, the processor may be configured to, capable of, or operable to receive a GRAND configuration; receive a codeword; and attempt to decode the codeword using a decoder and based at least in part on the GRAND configuration.

[0007] A method performed or performable by an apparatus (e.g., a UE or a NE) for wireless communication is described. The method may include receiving a GRAND configuration; receiving a codeword; and attempting to decode the codeword using a decoder and based at least in part on the GRAND configuration.

[0008] In some implementations of the apparatus, the processor, and the method described herein, the GRAND configuration includes an abandonment threshold value. In some implementations of the apparatus, the processor, and the method described herein, the GRAND configuration includes an indication of one of multiple variants of GRAND decoders to use as the decoder. In some implementations of the apparatus, the processor, and the method described herein, the multiple variants of GRAND decoders include one or more of a hard-detection GRAND Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 3 decoder, an ordered reliability bit GRAND a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder.

[0009] In some implementations of the apparatus, the processor, and the method described herein, the GRAND configuration includes an indication of an interleaving / de-interleaving pattern to be used by the decoder to attempt to decode the codeword. In some implementations of the apparatus, the processor, and the method described herein, the abandonment threshold value comprises one of multiple pre-determined threshold values at the device, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values.

[0010] In some implementations of the apparatus, the processor, and the method described herein, each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword. In some implementations of the apparatus, the processor, and the method described herein, the indication of the interleaving / de-interleaving pattern is a value of zero, indicating that interleaving / de-interleaving is disabled for the decoder.

[0011] In some implementations of the apparatus, the processor, and the method described herein, the codeword is encoded using a low-density parity check (LDPC) code. In some implementations of the apparatus, the processor, and the method described herein, the codeword is encoded using a polar code. In some implementations of the apparatus, the processor, and the method described herein, the GRAND configuration is received as part of a modulation and coding scheme (MCS) field via downlink control information (DCI) in a case of downlink and uplink control information (UCI) in a case of uplink.

[0012] In some implementations of the apparatus, the processor, and the method described herein, at least a subset of information elements of the GRAND configuration is received via a radio resource control (RRC) signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during reception of a plurality of codewords. In some implementations of the apparatus, the processor, and the method described herein, the at least a subset of information elements includes at least one of an abandonment threshold or transmission chain characteristics. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 4

[0013] In some implementations of the processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to transmit a hybrid automatic repeat request (HARQ) acknowledgement (ACK) indicating that the codeword was successfully decoded or a HARQ non-acknowledgement (NACK) indicating that the codeword was not successfully decoded. In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to transmit feedback information with the HARQ NACK, where the feedback information indicates a reason that the codeword was not successfully decoded.

[0014] In some implementations of the apparatus, processor, and method described herein, the feedback information indicates that the codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword. In some implementations of the apparatus, processor, and method described herein, the device comprises a first UE. In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to receive the codeword from a second UE.

[0015] In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to receive the GRAND configuration from a base station. In some implementations of the apparatus, processor, and method described herein, the apparatus, processor, and method may further be configured to, capable of, performed, performable, or operable to cause the device to receive the codeword from the base station.

[0016] An NE (e.g., a base station) for wireless communication is described. The NE may be configured to, capable of, or operable to perform one or more operations as described herein. For example, the NE may be configured to, capable of, or operable to transmit a GRAND configuration; and transmit a codeword.

[0017] A processor (e.g., a standalone processor chipset, or a component of a NE (e.g., a base station)) for wireless communication is described. The processor may be configured to, capable of, or operable to perform one or more operations as described herein. For example, the processor may Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 5 be configured to, capable of, or operable to a GRAND configuration; and transmit a codeword.

[0018] A method performed or performable by an NE (e.g., a base station) for wireless communication is described. The method may include transmitting a GRAND configuration; and transmitting a codeword.

[0019] In some implementations of the NE, the processor, and the method described herein, the GRAND configuration includes an abandonment threshold value. In some implementations of the NE, the processor, and the method described herein, the GRAND configuration includes an indication of one of multiple variants of GRAND decoders for a UE to use for decoding. In some implementations of the NE, the processor, and the method described herein, the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder.

[0020] In some implementations of the NE, the processor, and the method described herein, the GRAND configuration includes an indication of an interleaving / de-interleaving pattern for a UE to use to attempt to decode the codeword. In some implementations of the NE, the processor, and the method described herein, the abandonment threshold value comprises one of multiple pre- determined threshold values, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values.

[0021] In some implementations of the NE, the processor, and the method described herein, each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword. In some implementations of the NE, the processor, and the method described herein, the indication of the interleaving / de-interleaving pattern is a value of zero, indicating that interleaving / de-interleaving is disabled for a UE. In some implementations of the NE, processor, and method described herein, the NE, processor, and method may further be configured to, capable of, performed, performable, or operable to encode the codeword using a LDPC code. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 6

[0022] In some implementations of the NE, and method described herein, the NE, processor, and method may further be configured to, capable of, performed, performable, or operable to encode the codeword is encoded using a polar code. In some implementations of the NE, the processor, and the method described herein, the GRAND configuration is transmitted as part of a MCS field via DCI in a case of downlink and UCI in a case of uplink.

[0023] In some implementations of the NE, the processor, and the method described herein, at least a subset of information elements of the GRAND configuration is transmitted via a RRC signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during transmission of a plurality of codewords. In some implementations of the NE, the processor, and the method described herein, the at least a subset of information elements includes at least one of an abandonment threshold or transmission chain characteristics.

[0024] In some implementations of the NE, processor, and method described herein, the NE, processor, and method may further be configured to, capable of, performed, performable, or operable to receive, from a UE, a HARQ ACK indicating that the codeword was successfully decoded or a HARQ NACK indicating that the codeword was not successfully decoded. In some implementations of the NE, the processor, and the method described herein, feedback information is included with the HARQ NACK, where the feedback information indicates a reason that the codeword was not successfully decoded. In some implementations of the NE, the processor, and the method described herein, the feedback information indicates that the codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 illustrates an example of a wireless communications system in accordance with aspects of the present disclosure.

[0026] Figure 2 illustrates an example of use cases and target requirements in accordance with aspects of the present disclosure.

[0027] Figure 3 illustrates an example of channel combining in accordance with aspects of the present disclosure. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 7

[0028] Figure 4 illustrates an example of polarization in accordance with aspects of the present disclosure.

[0029] Figure 5 illustrates an example of encoding chain blocks for LDPC codes in accordance with aspects of the present disclosure.

[0030] Figure 6 illustrates an example of a transmission chain of codewords in accordance with aspects of the present disclosure.

[0031] Figures 7, 8, and 9 illustrate examples of average numbers of codebook entries for different channel codes and code lengths in accordance with aspects of the present disclosure.

[0032] Figure 10 illustrates an example of a UE in accordance with aspects of the present disclosure.

[0033] Figure 11 illustrates an example of a processor in accordance with aspects of the present disclosure.

[0034] Figure 12 illustrates an example of a NE in accordance with aspects of the present disclosure.

[0035] Figure 13 illustrates a flowchart of a method in accordance with aspects of the present disclosure.

[0036] Figure 14 illustrates a flowchart of a method in accordance with aspects of the present disclosure. DETAILED DESCRIPTION

[0037] Current 5G NR standardization has adopted polar codes for control channels and LDPC codes for data channels due to their capacity-achieving performance and low-complexity encoding and decoding schemes. However, legacy decoding algorithms are typically co-designed with particular code-book structures in mind and heuristically aim to approximately identify a maximum- likelihood (ML) decoding candidate. This applies to polar codes designed to be decoded using the cyclic redundancy check (CRC)-aided successive cancellation list (CA-SCL) decoder and LDPC codes designed to be decoded using the belief propagation (BP) decoder or sum-product algorithms (SPA). Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 8

[0038] Another type of decoder is a random additive noise decoding (GRAND) decoder, which works with any block-code, including polar codes and LDPC codes. The GRAND decoder identifies an ML decoding, while GRAND with abandonment (GRANDAB), a variant with reduced computational complexity, identifies an ML decoding or reports a decoding failure. In contrast to codebook-oriented algorithms, GRAND and GRANDAB are noise-centric, and aim to infer the noise that has occurred on the channel from which the ML decoding can be deduced.

[0039] The techniques discussed herein include mechanisms and procedures to configure a GRAND decoder to enable efficient decoding of wireless channel codes, such as polar codes and LDPC codes. Generally, a device using a GRAND decoder is configured with various parameters, such as the abandonment threshold ^, which of multiple variants of GRAND decoders to use as the GRAND decoder, whether an interleaving / de-interleaving pattern is to be used by the GRAND decoder, and so forth. This configuration allows the same GRAND decoder to decode codewords encoded in any of a variety of different manners, including polar codes and LDPC codes. Based on the configuration, the GRAND decoder receives a codeword over a communication channel and attempts to guess the noise on the communication channel and decode the received codeword. The codeword refers to encoded data or an encoded command (e.g., encoded using a polar code or an LDPC code). The GRAND decoder guesses the channel noise, subtracts the guessed noise, and compares the resultant codeword to a codebook. If the resultant codeword is in a codebook, then the resultant codeword is the correct decoding of the received codeword. However, if the resultant codeword is not in the codebook, then the GRAND decoder attempts another guess of the noise on the communication channel and repeats the process. If a threshold number of guesses, referred to as an abandonment threshold ^, is made without resulting in codeword that is included in the codebook, the decoding of the received codeword fails. The abandonment threshold ^ is determined based at least in part on multiple code parameters, such as the code rate, the code length, and the transmission channel.

[0040] Configuration of a decoder, such as the GRAND decoder, allows for universal decoding for wireless communications (e.g., 5G NR) channel codes, enabling more efficient and less complex hardware implementation compared to implementing multiple decoders. Such a GRAND decoder is further useful for devices with reduced chip areas and where high area efficiency is desired. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 9

[0041] Reference is made herein to transmitting, or communicating data or information, such as signaling communication resources and / or communications that are transmitted or received between devices. It is to be appreciated that other terms may be used interchangeably with communicating, such as signaling, transmitting, receiving, outputting, forwarding, retrieving, obtaining, and so forth. Similarly, other terms may be used interchangeably with transmitting (e.g., communicating, signaling, outputting, forwarding, and so forth), and other terms may be used interchangeably with receiving (e.g., communicating, retrieving, obtaining, and so forth).

[0042] Aspects of the present disclosure are described in the context of a wireless communications system.

[0043] Figure 1 illustrates an example of a wireless communications system 100 in accordance with aspects of the present disclosure. The wireless communications system 100 may include one or more NE 102, one or more UE 104, and a core network (CN) 106. The wireless communications system 100 may support various radio access technologies. In some implementations, the wireless communications system 100 may be a 4G network, such as an LTE network or an LTE-Advanced (LTE-A) network. In some other implementations, the wireless communications system 100 may be a new radio (NR) network, such as a 5G network, a 5G-Advanced (5G-A) network, or a 5G ultrawideband (5G-UWB) network. In other implementations, the wireless communications system 100 may be a combination of a 4G network and a 5G network, or other suitable radio access technology including Institute of Electrical and Electronics Engineers (IEEE) 802.11 (Wi-Fi), IEEE 802.16 (WiMAX), IEEE 802.20. The wireless communications system 100 may support radio access technologies beyond 5G, for example, 6G. Additionally, the wireless communications system 100 may support technologies, such as time division multiple access (TDMA), frequency division multiple access (FDMA), or code division multiple access (CDMA), etc.

[0044] The one or more NE 102 may be dispersed throughout a geographic region to form the wireless communications system 100. One or more of the NE 102 described herein may be or include or may be referred to as a network node, a base station, a network element, a network function, a network entity, a radio access network (RAN), a NodeB, an eNodeB (eNB), a next- generation NodeB (gNB), or other suitable terminology. An NE 102 and a UE 104 may communicate via a communication link, which may be a wireless or wired connection. For example, Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 10 an NE 102 and a UE 104 may perform wireless (e.g., receive signaling, transmit signaling) over a Uu interface.

[0045] An NE 102 may provide a geographic coverage area for which the NE 102 may support services for one or more UEs 104 within the geographic coverage area. For example, an NE 102 and a UE 104 may support wireless communication of signals related to services (e.g., voice, video, packet data, messaging, broadcast, etc.) according to one or multiple radio access technologies. In some implementations, an NE 102 may be moveable, for example, a satellite associated with a non- terrestrial network (NTN). In some implementations, different geographic coverage areas associated with the same or different radio access technologies may overlap, but the different geographic coverage areas may be associated with different NE 102.

[0046] The one or more UE 104 may be dispersed throughout a geographic region of the wireless communications system 100. A UE 104 may include or may be referred to as a remote unit, a mobile device, a wireless device, a remote device, a subscriber device, a transmitter device, a receiver device, or some other suitable terminology. In some implementations, the UE 104 may be referred to as a unit, a station, a terminal, or a client, among other examples. Additionally, or alternatively, the UE 104 may be referred to as an Internet-of-Things (IoT) device, an Internet-of- Everything (IoE) device, or machine-type communication (MTC) device, among other examples.

[0047] A UE 104 may be able to support wireless communication directly with other UEs 104 over a communication link. For example, a UE 104 may support wireless communication directly with another UE 104 over a device-to-device (D2D) communication link. In some implementations, such as vehicle-to-vehicle (V2V) deployments, vehicle-to-everything (V2X) deployments, or cellular-V2X deployments, the communication link may be referred to as a sidelink. For example, a UE 104 may support wireless communication directly with another UE 104 over a PC5 interface.

[0048] An NE 102 may support communications with the CN 106, or with another NE 102, or both. For example, an NE 102 may interface with other NE 102 or the CN 106 through one or more backhaul links (e.g., S1, N2, N6, or other network interface). In some implementations, the NE 102 may communicate with each other directly. In some other implementations, the NE 102 may communicate with each other indirectly (e.g., via the CN 106). In some implementations, one or more NE 102 may include subcomponents, such as an access network entity, which may be an Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 11 example of an access node controller (ANC). ANC may communicate with the one or more UEs 104 through one or more other access network transmission entities, which may be referred to as a radio heads, smart radio heads, or transmission-reception points (TRPs).

[0049] The CN 106 may support user authentication, access authorization, tracking, connectivity, and other access, routing, or mobility functions. The CN 106 may be an evolved packet core (EPC), or a 5G core (5GC), which may include a control plane entity that manages access and mobility (e.g., a mobility management entity (MME), an access and mobility management functions (AMF)) and a user plane entity that routes packets or interconnects to external networks (e.g., a serving gateway (S-GW), a packet data network (PDN) gateway (P-GW), or a user plane function (UPF)). In some implementations, the control plane entity may manage non-access stratum (NAS) functions, such as mobility, authentication, and bearer management (e.g., data bearers, signal bearers, etc.) for the one or more UEs 104 served by the one or more NE 102 associated with the CN 106.

[0050] The CN 106 may communicate with a packet data network over one or more backhaul links (e.g., via an S1, N2, N6, or other network interface). The packet data network may include an application server. In some implementations, one or more UEs 104 may communicate with the application server. A UE 104 may establish a session (e.g., a protocol data unit (PDU) session, or the like) with the CN 106 via an NE 102. The CN 106 may route traffic (e.g., control information, data, and the like) between the UE 104 and the application server using the established session (e.g., the established PDU session). The PDU session may be an example of a logical connection between the UE 104 and the CN 106 (e.g., one or more network functions of the CN 106).

[0051] In the wireless communications system 100, the NEs 102 and the UEs 104 may use resources of the wireless communications system 100 (e.g., time resources (e.g., symbols, slots, subframes, frames, or the like) or frequency resources (e.g., subcarriers, carriers)) to perform various operations (e.g., wireless communications). In some implementations, the NEs 102 and the UEs 104 may support different resource structures. For example, the NEs 102 and the UEs 104 may support different frame structures. In some implementations, such as in 4G, the NEs 102 and the UEs 104 may support a single frame structure. In some other implementations, such as in 5G and among other suitable radio access technologies, the NEs 102 and the UEs 104 may support various Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 12 frame structures (i.e., multiple frame NEs 102 and the UEs 104 may support various frame structures based on one or more numerologies.

[0052] One or more numerologies may be supported in the wireless communications system 100, and a numerology may include a subcarrier spacing and a cyclic prefix. A first numerology (e.g., ^=0) may be associated with a first subcarrier spacing (e.g., 15 kHz) and a normal cyclic prefix. In some implementations, the first numerology (e.g., ^=0) associated with the first subcarrier spacing (e.g., 15 kHz) may utilize one slot per subframe. A second numerology (e.g., ^=1) may be associated with a second subcarrier spacing (e.g., 30 kHz) and a normal cyclic prefix. A third numerology (e.g., ^=2) may be associated with a third subcarrier spacing (e.g., 60 kHz) and a normal cyclic prefix or an extended cyclic prefix. A fourth numerology (e.g., ^=3) may be associated with a fourth subcarrier spacing (e.g., 120 kHz) and a normal cyclic prefix. A fifth numerology (e.g., ^=4) may be associated with a fifth subcarrier spacing (e.g., 240 kHz) and a normal cyclic prefix.

[0053] A time interval of a resource (e.g., a communication resource) may be organized according to frames (also referred to as radio frames). Each frame may have a duration, for example, a 10 millisecond (ms) duration. In some implementations, each frame may include multiple subframes. For example, each frame may include 10 subframes, and each subframe may have a duration, for example, a 1 ms duration. In some implementations, each frame may have the same duration. In some implementations, each subframe of a frame may have the same duration.

[0054] Additionally or alternatively, a time interval of a resource (e.g., a communication resource) may be organized according to slots. For example, a subframe may include a number (e.g., quantity) of slots. The number of slots in each subframe may also depend on the one or more numerologies supported in the wireless communications system 100. For instance, the first, second, third, fourth, and fifth numerologies (i.e., ^=0, ^=1, ^=2, ^=3, ^=4) associated with respective subcarrier spacings of 15 kHz, 30 kHz, 60 kHz, 120 kHz, and 240 kHz may utilize a single slot per subframe, two slots per subframe, four slots per subframe, eight slots per subframe, and 16 slots per subframe, respectively. Each slot may include a number (e.g., quantity) of symbols (e.g., OFDM symbols). In some implementations, the number (e.g., quantity) of slots for a subframe may depend on a numerology. For a normal cyclic prefix, a slot may include 14 symbols. For an extended cyclic prefix (e.g., applicable for 60 kHz subcarrier spacing), a slot may include 12 symbols. The Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 13 relationship between the number of symbols the number of slots per subframe, and the number of slots per frame for a normal cyclic prefix and an extended cyclic prefix may depend on a numerology. It should be understood that reference to a first numerology (e.g., ^=0) associated with a first subcarrier spacing (e.g., 15 kHz) may be used interchangeably between subframes and slots.

[0055] In the wireless communications system 100, an electromagnetic (EM) spectrum may be split, based on frequency or wavelength, into various classes, frequency bands, frequency channels, etc. By way of example, the wireless communications system 100 may support one or multiple operating frequency bands, such as frequency range designations FR1 (410 MHz – 7.125 GHz), FR2 (24.25 GHz – 52.6 GHz), FR3 (7.125 GHz – 24.25 GHz), FR4 (52.6 GHz – 114.25 GHz), FR4a or FR4-1 (52.6 GHz – 71 GHz), and FR5 (114.25 GHz – 300 GHz). In some implementations, the NEs 102 and the UEs 104 may perform wireless communications over one or more of the operating frequency bands. In some implementations, FR1 may be used by the NEs 102 and the UEs 104, among other equipment or devices for cellular communications traffic (e.g., control information, data). In some implementations, FR2 may be used by the NEs 102 and the UEs 104, among other equipment or devices for short-range, high data rate capabilities.

[0056] FR1 may be associated with one or multiple numerologies (e.g., at least three numerologies). For example, FR1 may be associated with a first numerology (e.g., ^=0), which includes 15 kHz subcarrier spacing; a second numerology (e.g., ^=1), which includes 30 kHz subcarrier spacing; and a third numerology (e.g., ^=2), which includes 60 kHz subcarrier spacing. FR2 may be associated with one or multiple numerologies (e.g., at least 2 numerologies). For example, FR2 may be associated with a third numerology (e.g., ^=2), which includes 60 kHz subcarrier spacing; and a fourth numerology (e.g., ^=3), which includes 120 kHz subcarrier spacing.

[0057] The wireless communications system 100, such as for 6G, use mainly enhanced ultra- reliable low latency communication (URLLC), enhanced-enhanced mobile broadband (enhanced- eMBB) and enhanced massive machine-type communications (mMTC) that are aimed at services with stringent requirements for high throughput, low end-to-end transmission latency, ultra- reliability, packet size flexibility and availability.6G URLLC plays an important role in providing connectivity for the new services and applications from vertical domains, such as factory automation, tactile internet, autonomous driving and so on. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 14

[0058] Channel coding is an important of modern communication systems, which significantly enhances the communication efficiency with given bandwidth, power, and noise level. Over years researchers have been seeking good codes with low-complexity decoders and their efforts result in a number of long codes with capacity-approaching performance and practical decoders. For short codes, which are gaining more attention recently for emerging new applications, many conclusions, and techniques for channel codes with long lengths no longer hold, including their decoding performance and their decoders’ effectiveness. Designing practical universal decoders and using them to evaluate achievable performance of short codes is discussed herein.

[0059] Current 5G NR standardization has adopted polar codes for control channels and LDPC codes for data channels due to their capacity-achieving performance and low-complexity encoding and decoding schemes. However, legacy decoding algorithms are typically co-designed with particular code-book structures in mind and heuristically aim to approximately identify an ML decoding candidate. This applies to polar codes designed to be decoded using the CA-SCL decoder and LDPC codes designed to be decoded using the belief propagation (BP) decoder or SPA. An exception to this is the GRAND framework, which works with any block-code. GRAND identifies an ML decoding, while GRANDAB, a variant with reduced computational complexity, identifies an ML decoding or reports a decoding failure. Both have been theoretically proven to be capacity- achieving when used with random codebooks. In contrast to codebook-oriented algorithms, GRAND and GRANDAB are noise-centric, and aim to infer the noise that has occurred on the channel from which the ML decoding can be deduced. The abandonment threshold is an important parameter to enable near-ML performance of GRAND decoder. This threshold is a function of different code parameters.

[0060] The techniques discussed herein describe solutions and procedures that enable the configuration of a GRAND decoder to enable efficient and low latency decoding of polar codes and LDPC codes. The techniques include procedures for the determination, tabulation and signaling of abandonment thresholds associated with different 5G NR channel codes when a GRAND decoder is used.

[0061] The third-generation partnership project (3GPP) has defined URLLC as an important communication scenario for beyond 5G and 6G networks. URLLC in 6G has a significantly lower end-to-end latency (= 1ms) compared to the 5G new radio (NR), and a high level of transmission Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 15 reliability, including a block error rate (BLER) less than 10^^. URLLC will enable emerging applications, such as future factory applications, tactile internet, distributed utility grid, and metaverse, as well as mission-critical applications, such as telesurgery, autonomous driving and factory automation. Table 1 depicts target requirements of some of these ultra-reliable low latency use cases and their target requirements. Table 1 Scenario End-to-end latency Reliability Discrete automation – 1 ms 99.9999% motion control Electricity distribution – 5 ms 99.9999% high voltage Remote control 5 ms 99.999% Discrete automation 10 ms 99.99% Intelligent transport 10 ms 99.9999% systems – infrastructure backhaul Process automation – 50 ms 99.9999% remote control Process automation – 50 ms 99.9% monitoring Electricity distribution – 25 ms 99.9% medium voltage

[0062] Figure 2 illustrates an example 200 of use cases and target requirements in accordance with aspects of the present disclosure. The example 200 illustrates a vision of 6G systems and underlaying use cases, and different target expectations.

[0063] Short block-length codes with strong error-correction capabilities are important in URLLC to meet the stringent latency and reliability requirements. However, the use of short block- length codes could degrade the transmission reliability. According to the normal approximation (NA) bound for the finite block-length regime, the theoretical maximum ratio of information bits to coded bits that can be correctly transmitted over a noisy channel significantly drops as the block- length decreases. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 16

[0064] Polar codes have been discussed, since they are the first provably capacity achieving codes, with explicit construction and very low complexity of encoding and decoding. The polar codes are based on a concept referred to as channel polarization. Both the concept of channel polarization as well as polar codes have been extended to several applications and generalizations.

[0065] With respect to polar codes, W: X → Y denotes a generic binary discrete memoryless channel (B-DMC) with input alphabet X, output alphabet Y, and transition probabilities W (y|x) , x ∈ X , y ∈ Y. The input alphabet X is {0,1}, the output alphabet and the transition probabilities may be arbitrary. ^^denotes the channel corresponding to N uses of W; thus, ^^: ^^→ ^^with^ ^^^|^^) ∏^^ ^ ^ = ^^^ ^^^^|^^) .there are two channel parameters of primary interest. These are the symmetric capacity: ^^^) = ∑ ^^^^^^ &∈'∑$∈%^ ^^^|^) log^! "^^^^0 #!"^^^^1)and the Bhattacharyya parameter: (^^) ≜ * +^^^|0)^^^|1)

[0067] These parameters arerespectively. I (W) is the highest rate at which reliable communication is possible across W using the inputs of W with equal frequency. Z (W) is an upper bound on the probability of ML decision error when W is used only once to transmit a 0 or 1. It can be seen that Z (W) takes values in [0 ,1], whereby a 0 indicates a null probability of error in ML-sense, and respectively, a 1 indicates a certain probability of error in ML-sense.

[0068] Channel polarization is an operation by which one manufactures out of N independent copies of a given B-DMC W, a second set of N channels {^^^)^ : 1 ≤ i ≤ N} that show a polarization effect in the sense that, as N becomes large, theterms {I(^^^)^ )} tend towards 0 or 1 for all but a vanishing fraction of indices i. This operation consists of a channel combining phase and a channel splitting phase. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 17

[0069] The channel combining phase copies of a given B-DMC W in a recursivemanner to produce a vector channel ^ .^: ^^→ ^^ , where N can be any power of two, , = 2 , n ≥0. The recursion begins at the 0-th level (n = 0) with only one copy of W and set ^^ ≜ ^. The firstlevel (n = 1) of the recursion combines two independent copies of ^^and obtains the channel ^^:^ → ^ with the transition probabili ^ | )^^ ties: ^^ ^^, ^^ 0^, 0^ = ⊕ 0^) 0^)

[0070] Figure 3 illustrates an example 300 of channel combining in accordance with aspects of the present disclosure. The example 300 illustrates combining two independent copies of ^^.

[0071] For the channel splitting phase, having synthesized the vector channel ^^out of ^^, the next step of channel polarization is to split ^^back into a set of N binary-input coordinatechannels ^^^) ^ ^^^^ : ^ → ^ × ^ , 1 ≤ i ≤ N, defined by the transition probabilities^^^) ^ ^ ^^∑7589! ∈ %568^56! ^^ ^^^ |0^ ), To gain an intuitive understandingthe channels {^^^)^ }, consider a genie-aided successive cancellation decoder in which the ith decision 0^after observing ^^^and the past channel inputs 0^^^^(supplied correctly by the genie regardless of any^errors at earlier stages). If 0^is a-priori uniform on ^^, then ^^^)is the effective channel seen by the ith decision elementthis

[0072] With respect to channel polarization, for any B-DMC W, the channels {^^^)^ } polarize in the sense that, for any fixed δ ∈ (0, 1), as N goes to infinity through powers ofthe fraction of indices i ∈ {1, . . . , N} for which I(^^^)^ ) ∈ (1 − δ, 1] goes to I(W) and the fraction for which I(^^^)^ ) ∈ [0, δ) goes to 1−I(W). These polarization effects are illustrated in Figure 4.

[0073] Figure 4 illustrates an example 400 of channel polarization in accordance with aspects of the present disclosure. As illustrated, some of the channels become very reliable and some of the channels become very noisy.

[0074] The main idea of polar codes encoding is the splitting of data sequence indexes into two different sets before transmission. The first set includes the indexes of the data to be transmitted on the noise-free channels. The other set includes the indexes corresponding to the known frozen bits Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 18 to be transmitted on the pure-noise channel. techniques can be used to construct polar codes. One technique is based on Bhattacharyya parameter bounds. This technique has the least complexity relative to other proposed techniques. Another technique is a Monte-Carlo estimation approach to construct polar codes, however, this approach has higher complexity than other techniques.

[0075] A density evolution (DE) technique approximates the exact transition probability of each binary input channel to overcome difficulties in calculating the actual values of the Bhattacharyya parameter. A Gauss approximation technique constructs polar codes. This technique estimates a bit channel metric inversely proportional to a defined Q-function, which represents its bit error rate (BER) under Gaussian approximation. Mostly, all these techniques are equally good in improving the signal-to-noise ratio (SNR) for additive white Gaussian noise (AWGN) channel.

[0076] Another polar codes construction depends on the Bhattacharyya parameter bounds. In this case, first a generalized upper and lower bound of Bhattacharyya parameter are determined. The upper bound of this parameter corresponds to the noisiest channel, while its lower bound corresponds to the lowest noisy channel. Thus, for better performance, it the gap between the Bhattacharyya parameter extremes is increased. This increases the polarization of the synthetic channels carrying the information bits. Then, the most appropriate kernel matrix associated with Bhattacharyya parameter constraints is selected.

[0077] Many techniques can be used to decode polar codes. Three of these techniques considered for decoding are: successive cancellation (SC), successive cancellation list (SCL) and log-likelihood ratio (LLR) based SCL. The SC decoding technique was improved to SCL for a finite small length of polar block codes.

[0078] Successive cancellation (SC) decoding is sub-optimal for finite length polar codes, but successive cancellation list (SCL) decoding achieves the ML bound for a sufficiently large list size L, at the cost of increased complexity due to the list decoding nature. Further enhancement of the code concatenates a high-rate outer code such as CRC and parity-check (PC) codes. Under SCL decoding, these CRC-aided polar codes and parity-check concatenated polar codes outperform LDPC codes. An extension of polar codes, namely Polar Subcodes, outperform the above- mentioned code constructions. However, the SCL decoder is characterized by a high complexity Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 19 and an inherently serial decoding nature, turn reduces the decoding throughput and causes high decoding latency. In addition, SCL decoding is not a good match to iterative detection and decoding due to its hard decision output nature (e.g., not a soft-in / soft-out decoder). Iterative decoding of polar codes based on message passing over the encoding graph is possible through BP decoders. The BP algorithm has some fundamental advantages over SC-based decoding, as it can be easily parallelized, thus high throughput / low latency implementations are possible, and it inherently enables soft-in / soft-out decoding, facilitating joint iterative detection and decoding. Thus, BP decoding is a candidate for high data rate and low latency demanding applications. A belief propagation list (BPL) decoder with comparable performance to the successive cancellation list (SCL) decoder of polar codes, which already achieves the maximum likelihood (ML) bound of polar codes for sufficiently large list size L, can also be used.

[0079] LDPC codes have good performance with iterative decoding that is very close to the Shannon limit over Additive White Gaussian Noise (AWGN) channels. Quasi-cyclic LDPC (QC- LDPC) codes have been adopted for data channels in 5G networks due to their low complexity implementation and near Shannon limit performance.

[0080] Figure 5 illustrates an example 500 of encoding chain blocks for LDPC codes in accordance with aspects of the present disclosure. The example 500 illustrates the generic transmitter encoding chain when LDPC codes are used for channel coding.

[0081] An ^:, ;) − LDPC code is a linear block code for which the parity-check matrix = has alow density of 1s. = is an ^: − ;) × : parity-check matrix whose rows are vectors {ℎ^}. The parity-check matrix performs A = : − ; separate parity-checks on a received word. A regular LDPC codeis a linear block code whose parity-check matrix = contains exactly BC1’s in each column andexactly BD = BC^:⁄ A ) 1’s in each row, where BC ≪ A (and equivalently BD ≪ A ). The code rateG = His related to these param BC. eters via ^G = 1 − I BD ) which assumes = is full rank. If = is lowdensity, but the number of 1’s in each column or row is not constant, then the code is an irregular LDPC code. The sense in which an LDPC code is regular or irregular through can be seen in its graphical representation.

[0082] 5G NR QC-LDPC are codes that can be put into quasi-cyclic form. Its parity check matrix can be put into the form of a block matrix consisting of circulant permutation sub-matrices Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 20 or the zero sub-matrix. Such codes are often by lifting certain protographs into such block matrices. Their simple structure makes them useful for several wireless communication standards.

[0083] With respect to encoding schemes, the bit sequence input for a given code block to channel coding is denoted by c0,c1,c2,c3,...,cK − 1, whereKis the number of bits that could be calculated at the output of the code block (CB) segmentation and CRC attachment.

[0084] After encoding the bits are denoted byd0,d1,d2 ,...,dN − 1, whereN = 66Z cfor LDPC base graph 1 andN = 50Z cfor LDPC base graph 2, and the value of the lifting sizeZ cis given in 3GPP technical specification (TS) 38.212 section 5.

[0085] LDPC encoder is based on the determination of a parity check matrix J. Parity check matrices can be determined based on chosen base graphs and lifting sizes (C. For LDPC base graph 1, a matrix ofH BG has 46 rows with row indices i = 0,1,2,..., 45 and 68 columns with column indicesj = 0,1,2,..., 67. For LDPC base graph 2, a matrix of H BGhas 42 rows with row indicesi = 0,1,2,..., 41and 52 columns with column indices j = 0,1,2,..., 51. The elements in H BGwith row and column indices given in 3GPP TS 38.212 Table 5.3.2-2 (for LDPC base graph 1) and 3GPP TS 38.212 Table 5.3.2-3 (for LDPC base graph 2) are of value 1, and all other elements inH BGare of value 0.

[0086] Once the parity check matrix is calculated, the , + 2(C − L parity bitsM = NBUWO, B^, B^, ... , B^#^QR^S^^T can be generated such that J × VMX = Y, wherec= [c ,c1,c2 ,...,cK − 1 ]T; 0 is a column vector of all elements equal toencoding is performedGF(2).

[0087] With respect to decoding schemes and the general structure of natural message-passing iterative decoding algorithms, in these algorithms messages are exchanged between the variable andcheck nodes in discrete time steps. Initially, each variable node Z[ 1 ≤ ] ≤ :, has an associatedreceived value[̂, which is a random variable taking values in the channel output alphabet Y. Based on this, each variable sends a message belonging to some message alphabet M. A common choice for this initial message is simply the received value[̂, or some quantized version of[̂for continuous output channels such as binary input additive white Gaussian noise (BIAWGN). Now, Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 21 each check node c processes the messages it from its neighbors and sends back a suitable message in M to each of its neighboring variable nodes. Upon receipt of the messages from the check nodes, each variable node Z[uses these together with its own received value[̂to produce new messages that are sent to its neighboring check nodes. This process continues for many time steps, till a certain cap on the number of iterations is reached. In the analysis, the probability ofincorrect decoding is of interest, such as the bit-error probability. For every time step _, _ ∈ ℕ , thei’th iteration consists of a round check-to-variable node messages, followed by the variable nodes responding with their messages to the check nodes. The 0’th iteration consists of dummy messages from the check nodes, followed by the variable nodes sending their received values to the check nodes.

[0088] A condition in the determination of the next message based on the messages received from the neighbors is that message sent by 0 along an edge e does not depend on the message just received along edge a. This is so that only “extrinsic” information is passed along from a node to its neighbor in each step. It is this restriction that leads to the independence condition that makes analysis of the decoding possible.

[0089] GRAND is an algorithm for realizing ML decoding in discrete channels with or without memory. GRAND belongs to the family of code-agnostic decoding algorithms. The idea behind GRAND decoder is that the noise sequences are ranked from most likely to least likely. Subtracting noise from the received signal in that order, the first instance that results in a member of the codebook is the ML decoding. GRAND is capacity-achieving when used with random codebooks. For rates below capacity, error exponents are identified, and for rates beyond capacity success exponents are identified. The scheme’s complexity is determined in terms of the number of computations the receiver performs. For rates beyond capacity, this reveals thresholds for the number of guesses by which if a member of the codebook is identified it is likely to be the transmitted codeword. We introduce an approximate ML decoding scheme where the receiver abandons the search after a fixed number of queries, an approach referred to as GRAND with abandonment (GRANDAB). While not an ML decoder, the algorithm GRANDAB is also capacity- achieving for an appropriate choice of abandonment threshold, and characterize its complexity, error and success exponents. These decoding schemes substantially outperform the brute force decoding approach. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 22

[0090] Table 2 includes an algorithm for Inputs include a demodulated channel output yn; a codebook membership function such that C(yn)=1 if and only if ynis in the codebook; and optional statistical noise characteristics or soft information Φ. The outputs include a decoded element cn,^; and the number of codebook queries made, D, a measure of confidence in decoding. Table 2 Inputs: Codebook membership function b: {0,1}. ↦ {0,1}; demodulated bits yn;optional information Φ. Output: Decoding cn,^, soft output D. d ← 0, D ← 0. while d=0 do zn← next most likely binary noise effect sequence (which may depend on Φ) D ← D + 1 if b^^. ⊖ e.) = 1 thencn,^ ← ^. ⊖ e.d ← 1 end if end while return cn,^, D

[0091] The techniques discussed herein describe contains mechanisms and procedures to enable the configuration of a GRAND decoder to enable efficient decoding of wireless communications (e.g., 5G NR) channel codes mainly polar codes and LDPC codes. The techniques include procedures for the determination, tabulation and signaling of the abandonment threshold ^ when channel codes are decoded using a universal code-agnostic decoder, such as the ordered reliability bit guessing random additive noise with abandonment threshold decoder (ORBGRANDAB). Both polar codes and LDPC codes are decoded using the same decoding algorithm. BLER performance of both codes depends on an efficient determination of the threshold ^ which is a function of several code parameters such as the code rate, the code length, the transmission channel, and so forth. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 23 Different thresholds can be tabulated for both codes and LDPC codes. The number of guessing operations can be infinite or very high to avoid high decoding complexity and cannot be lower than a particular number of iterations to avoid decoding failure. GRAND configuration includes the configuration of a feedback procedure when a decoding failure occur and a NACK is transmitted back to the source.

[0092] Universal decoding for wireless communications (e.g., 5G NR) channel codes enables more efficient and less complex hardware implementation and is useful for devices with reduced chip areas and where high area efficiency is desired. The techniques discussed herein are valid for different transmission channels including memoryless and channels with memory as opposed to legacy decoders that assume memoryless channels. Raw communication channels are seldom memoryless. Channel fading, inter-symbol interference, multi-user interference, and external noise sources all have inherent timescales that result in time-dependent correlations in instantaneous signal to interference plus noise ratio (SINR). Essentially all forward error correction decoders assume, however, that channels are memoryless and their performance degrades significantly if they are not. The solution to this mismatch is to employ interleaving. In the transmitter, the interleaver permutes the location of bits across the codewords prior to their transmission. At the receiver, the de-interleaver recovers the original bit order, and the resulting signals are passed to a decoder for error correction. In this way, clumped errors are separated and distributed across multiple codewords, giving noise the appearance of being uncorrelated.

[0093] In the discussions herein, the channel is additive white gaussian noise (AWGN)f^0, g^) with variance g^, unless mentioned otherwise.

[0094] GRAND can be implemented as a universal decoder of wireless communication (e.g., 5G NR) channel codes, e.g., LDPC codes and polar codes, which allows better hardware efficiency and lower implementation complexity. To this end, a decoder configuration may be signaled including several information elements applicable to the decoding routine, including for example the abandonment threshold ^, the transmission chain characteristics and the parity check matrix of the code, as well as for several code parameters. The GRAND decoder allows improved performance of LDPC and polar codes over legacy 5G NR decoders, mainly BP or SPA for LDPC codes and CA-SCL for polar codes. Due to its parallelizability, the GRAND decoder and its variants also allow decoding latency gains compared to a sequential SCL decoder. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 24

[0095] In one or more implementations, parameters and input are configured to enable better decoding performance of LDPC and polar codes. The GRAND configuration is signaled to the decoder, in one example, as part of the modulation and coding scheme (MCS) field via downlink control information (DCI) in the case of downlink and uplink control information (UCI) in the case of uplink. In another example, the GRAND configuration or a subset of information elements thereof (e.g., abandonment threshold ^, transmission chain characteristics, etc.) is signaled via RRC-signaling in the case of static channel conditions, static radio transceiver setup or when the channel’s noise entropy does not change during the transmission.

[0096] Additionally or alternatively, the decoder configuration includes the GRAND decoder variant used to decode the received LDPC or polar codeword. This can be a hard-detection GRAND decoder with abandonment threshold or soft-detection GRAND decoder. In the latter, the decoder can be, for example, the symbol-reliability information GRAND (SRGRAND), the ordered reliability bit GRAND (ORBGRAND), the line-1 ORBGRAND, or the Markovian order GRAND (GRAND-MO). The decoder can be chosen based at least in part on the channel conditions (e.g., memoryless channel or channel with memory, fading, inter-symbol interference, etc.), the required or desired decoding latency, the required or desired BLER performance and coding gain, whether the interleaving or de-interleaving blocks are enabled or disabled, or a combination thereof.

[0097] Figure 6 illustrates an example 600 of a transmission chain of codewords in accordance with aspects of the present disclosure. The example 600 illustrates a transmission chain (e.g., in 5G NR) of LDPC and / or polar codes using GRAND-MO decoder and no interleaving (e.g., without interleaving / de-interleaving blocks).

[0098] The decoder’s related configuration can also include the abandonment threshold ^ of the GRANDAB decoder and its variants, e.g., ORBGRAND and line-1 ORBGRAND for wireless communication (e.g., 5G NR) channel codes, e.g., LDPC codes and Polar codes. The abandonment threshold ^ is efficiently determined to allow capacity-achieving performance as well as moderate decoding latency. The channel considered for wireless communication (e.g., 5G NR) encoding and decoding design is the AWGN. The threshold is upper bounded by a fixed value which is function of the noise entropy of the channel and code parameters. ^≤ |h^|.^i#^) = 2.^i#^)Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 25 Where n is the code length and R is the noise entropy. In the case of GRAND with Abandonment, the receiver abandons identification of the transmitted code word if no element of the codebook is identified after a pre-defined number of noise removal queries. GRANDAB is then not a ML decoder as the algorithm sometimes terminates without returning an element of the codebook. Despite that, GRANDAB is also capacity achieving for random codebooks once the abandonment threshold is set based on all elements of the Shannon Typical Set of the noise being queried, and determining the exponent for the likelihood of abandonment. By abandoning after a fixed number of queries, an upper-bound on complexity is obtained. GRANDAB results in an error if the ML decoding is erroneous or if the algorithm abandons guessing before an element of the codebook is identified. Whichever of these two events is more likely dominates the error rate. So as long as the algorithm does not abandon until after querying all elements in the typical set of the noise, the algorithm is capacity achieving.

[0099] The channel code’s configuration can include information about optional interleaving or de-interleaving when a GRAND decoder is used. In this situation, the permutation matrix or sub- block interleaver can be removed from the transmission chain, which allows lower encoding and decoding latency as well as higher channel capacity. The configuration of the GRAND could signal information about disabling the interleaving (and eventually de-interleaving) blocks, as outlined in the example 600 of Figure 6 characterizing the transmission chain characteristics in an example implementation. In one or more implementations, the polar code sequence at the transmitter{aO, a^, … ak^^} can directly undergo QAM modulation after the encoding process without beinginterleaved as in 3GPP TS 38.212 and shown in Table 3. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 26

[0100] In this case the signaled interleaving pattern Π^;) field can be set to 0 to indicate that interleaving is to be disabled at the transmitter and de-interleaving is to consequently be disabled at the receiver. The interleaving pattern is signaled, for example using higher layer RRC-signaling or DCI / MCS.

[0101] In one or more implementations, the abandonment threshold ^ can be efficiently determined for several code lengths, channel conditions, SNR values and channel codes using, for example empirical methods such as Monte-Carlo simulations or using artificial intelligence / machine learning training methods or the like.

[0102] Figures 7, 8, and 9 illustrate examples of average numbers of codebook entries for different channel codes and code lengths in accordance with aspects of the present disclosure. In the examples of Figures 7, 8, and 9, the average number of codebook queries varies from one code to another and intuitively as a function of SNR and code length and code rate.

[0103] To enable good BLER performance while ensuring low decoding latency and complexity, the abandonment threshold values can then be tabulated. For example, the abandonment threshold values can be tabulated in a table giving an abandonment threshold value Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 27 for each of various combinations of SNR, channel, and code length. The corresponding abandonment threshold value can be signaled and input to the GRAND decoder. Table 4 shows example pseudo-algorithm of a GRAND decoder. Table 4 Inputs: Code-book membership function m: {0,1}. → {0,1}demodulated bits ^.; threshold ^ optional information Φ. Output: Decoding n.∗p ← 0, q ← 0. while p ≤ ^ doe.← next most likely binary noise effect sequence (which may depend on Φ) q ← q + 1 if m^^.⊖ e.) then n. = ^. ⊖ e.p ←d + 1; end if end while return n.∗

[0104] In one or more implementations, the GRAND decoder is configured to report feedback to the transmitter along with HARQ in case of decoding failure (e.g., NACK). Since the GRAND decoder is different from other decoders which handles channel’s noise instead of the received codeword itself, the decoder feedback along with channel information can be beneficial to enhance error detection and correction capabilities as well as reducing decoding latency. In one example, the decoder or receiver could feedback information about decoding failure, such as indicate failure because of the abandonment threshold. In this case, the threshold could be inefficient as the number of codebook queries surpasses the threshold while the codeword has not been identified yet. In another example, the feedback can be a third state of HARQ, e.g., NACK-t in addition to ACK and Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 28 NACK. In another example, the feedback can or more extra bits for NACK only, such as soft-NACK information.

[0105] Accordingly, the techniques discussed herein describe mechanisms and procedures to enable the configuration of a GRAND decoder to enable efficient decoding of wireless communication (e.g., 5G NR) channel codes, such as polar codes and LDPC codes. The techniques include procedures for the determination, tabulation and signaling of the abandonment threshold ^ when wireless communication (e.g., 5G NR) channel codes are decoded using a universal code- agnostic decoder, such as the ORBGRANDAB decoder. Both polar codes and LDPC codes are decoded using the same decoding algorithm. BLER performance of both codes depend on an efficient determination of the threshold ^ which is a function of several code parameters such as at least one of the code rate, the code length, or the transmission channel.

[0106] The universal, code-agnostic GRAND decoder enables the decoding of any code including random and structured codes, transmitted over different channels such as memoryless and channels with memory while allowing a good error correction performance. The GRAND decoder allows for many features, including low-complexity hardware-friendly encoding and decoding, high levels of flexibility in length and rate through modularity, and high levels of parallelism in encoding and decoding that enable low latency.

[0107] In one or more implementations, the GRAND decoder is configured to decode both wireless communication (e.g., 5G NR) channel codes, such as LDPC codes and Polar codes at any code length and any code rate. Several GRAND parameters and input variables can be configured to allow efficient and low latency decoding. The configuration of these parameters includes the GRAND variant used to decode the received codeword, for example hard-detection GRAND, ORBGRAND and lin-1 GRAND or the like, as well as the removing of the interleaving or de- interleaving blocks at transmitters and receivers and the configuration of the abandonment threshold. The abandonment thresholds can be determined for different codes, channel conditions, SNR values and code lengths and rates and can be tabulated and signaled to the decoder. Additionally or alternatively, the GRAND receiver is configured to report feedback in the case of NACK / decoding failure. The feedback includes the reason of the decoding failure, for example inefficient abandonment threshold, etc. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 29

[0108] Figure 10 illustrates an example of 1000 in accordance with aspects of the present disclosure. The UE 1000 may include a processor 1002, a memory 1004, a controller 1006, and a transceiver 1008. The processor 1002, the memory 1004, the controller 1006, or the transceiver 1008, or various combinations thereof or various components thereof may be examples of means for performing various aspects of the present disclosure as described herein. These components may be coupled (e.g., operatively, communicatively, functionally, electronically, electrically) via one or more interfaces.

[0109] The processor 1002, the memory 1004, the controller 1006, or the transceiver 1008, or various combinations or components thereof may be implemented in hardware (e.g., circuitry). The hardware may include a processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), or other programmable logic device, or any combination thereof configured as or otherwise supporting a means for performing the functions described in the present disclosure.

[0110] The processor 1002 may include an intelligent hardware device (e.g., a general-purpose processor, a DSP, a CPU, an ASIC, an FPGA, or any combination thereof). In some implementations, the processor 1002 may be configured to operate the memory 1004. In some other implementations, the memory 1004 may be integrated into the processor 1002. The processor 1002 may be configured to execute computer-readable instructions stored in the memory 1004 to cause the UE 1000 to perform various functions of the present disclosure.

[0111] The memory 1004 may include volatile or non-volatile memory. The memory 1004 may store computer-readable, computer-executable code including instructions when executed by the processor 1002 cause the UE 1000 to perform various functions described herein. The code may be stored in a non-transitory computer-readable medium such as the memory 1004 or another type of memory. Computer-readable media includes both non-transitory computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A non-transitory storage medium may be any available medium that may be accessed by a general-purpose or special-purpose computer.

[0112] In some implementations, the processor 1002 and the memory 1004 coupled with the processor 1002 may be configured to cause the UE 1000 to perform one or more of the functions Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 30 described herein (e.g., executing, by the 1002, instructions stored in the memory 1004). For example, the processor 1002 may support wireless communication at the UE 1000 in accordance with examples as disclosed herein. The UE 1000 may be configured to or operable to support a means for receiving a GRAND configuration; receiving a codeword; and attempting to decode the codeword using a decoder and based at least in part on the GRAND configuration.

[0113] Additionally, the UE 1000 may be configured to or operable to support any one or combination of where the GRAND configuration includes an abandonment threshold value; where the GRAND configuration includes an indication of one of multiple variants of GRAND decoders to use as the decoder; where the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder; where the GRAND configuration includes an indication of an interleaving / de-interleaving pattern to be used by the decoder to attempt to decode the codeword; where the abandonment threshold value comprises one of multiple pre-determined threshold values at the device, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values; where each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword; where the indication of the interleaving / de-interleaving pattern is a value of zero, indicating that interleaving / de-interleaving is disabled for the decoder; where the codeword is encoded using a LDPC code; where the codeword is encoded using a polar code; where the GRAND configuration is received as part of a MCS field via DCI in a case of downlink and UCI in a case of uplink; receiving at least a subset of information elements of the GRAND configuration via a RRC signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during reception of a plurality of codewords; where the at least a subset of information elements includes at least one of an abandonment threshold or transmission chain characteristics; transmitting a HARQ ACK indicating that the codeword was successfully decoded or a HARQ NACK indicating that the codeword was not successfully decoded; transmitting feedback information with the HARQ NACK, where the feedback information indicates a reason that the codeword was not successfully decoded; Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 31 where the feedback information indicates that codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword; where the device comprises a first UE; receiving the codeword from a second UE; receiving the GRAND configuration from a base station; receiving the codeword from the base station.

[0114] Additionally, or alternatively, the UE 1000 may support at least one memory (e.g., the memory 1004) and at least one processor (e.g., the processor 1002) coupled with the at least one memory and configured to or operable to cause the UE to: receive a GRAND configuration; receive a codeword; and attempt to decode the codeword using a decoder and based at least in part on the GRAND configuration.

[0115] Additionally, the UE 1000 may be configured to or operable to support any one or combination of where the GRAND configuration includes an abandonment threshold value; where the GRAND configuration includes an indication of one of multiple variants of GRAND decoders to use as the decoder; where the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder; where the GRAND configuration includes an indication of an interleaving / de-interleaving pattern to be used by the decoder to attempt to decode the codeword; where the abandonment threshold value comprises one of multiple pre-determined threshold values at the device, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values; where each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword; where the indication of the interleaving / de-interleaving pattern is a value of zero, indicating that interleaving / de-interleaving is disabled for the decoder; where the codeword is encoded using a LDPC code; where the codeword is encoded using a polar code; where the GRAND configuration is received as part of a MCS field via DCI in a case of downlink and UCI in a case of uplink; where the at least one processor is further configured to or operable to cause the device to receive at least a subset of information elements of the GRAND configuration via a RRC signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during reception of Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 32 a plurality of codewords; where the at least a of information elements includes at least one of an abandonment threshold or transmission chain characteristics; where the at least one processor is further configured to or operable to cause the device to transmit a HARQ ACK indicating that the codeword was successfully decoded or a HARQ NACK indicating that the codeword was not successfully decoded; where the at least one processor is further configured to or operable to cause the device to transmit feedback information with the HARQ NACK, where the feedback information indicates a reason that the codeword was not successfully decoded; where the feedback information indicates that the codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword; where the device comprises a first UE; where the at least one processor is further configured to or operable to cause the first UE to receive the codeword from a second UE; where the at least one processor is further configured to or operable to cause the device to receive the GRAND configuration from a base station; where the at least one processor is further configured to or operable to cause the device to receive the codeword from the base station.

[0116] The controller 1006 may manage input and output signals for the UE 1000. The controller 1006 may also manage peripherals not integrated into the UE 1000. In some implementations, the controller 1006 may utilize an operating system such as iOS®, ANDROID®, WINDOWS®, or other operating systems. In some implementations, the controller 1006 may be implemented as part of the processor 1002.

[0117] In some implementations, the UE 1000 may include at least one transceiver 1008. In some other implementations, the UE 1000 may have more than one transceiver 1008. The transceiver 1008 may represent a wireless transceiver. The transceiver 1008 may include one or more receiver chains 1010, one or more transmitter chains 1012, or a combination thereof.

[0118] A receiver chain 1010 may be configured to receive signals (e.g., control information, data, packets) over a wireless medium. For example, the receiver chain 1010 may include one or more antennas to receive a signal over the air or wireless medium. The receiver chain 1010 may include at least one amplifier (e.g., a low-noise amplifier (LNA)) configured to amplify the received signal. The receiver chain 1010 may include at least one demodulator configured to demodulate the receive signal and obtain the transmitted data by reversing the modulation technique applied during Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 33 transmission of the signal. The receiver chain may include at least one decoder for decoding the demodulated signal to receive the transmitted data.

[0119] A transmitter chain 1012 may be configured to generate and transmit signals (e.g., control information, data, packets). The transmitter chain 1012 may include at least one modulator for modulating data onto a carrier signal, preparing the signal for transmission over a wireless medium. The at least one modulator may be configured to support one or more techniques such as amplitude modulation (AM), frequency modulation (FM), or digital modulation schemes like phase- shift keying (PSK) or quadrature amplitude modulation (QAM). The transmitter chain 1012 may also include at least one power amplifier configured to amplify the modulated signal to an appropriate power level suitable for transmission over the wireless medium. The transmitter chain 1012 may also include one or more antennas for transmitting the amplified signal into the air or wireless medium.

[0120] Figure 11 illustrates an example of a processor 1100 in accordance with aspects of the present disclosure. The processor 1100 may be an example of a processor configured to perform various operations in accordance with examples as described herein. The processor 1100 may include a controller 1102 configured to perform various operations in accordance with examples as described herein. The processor 1100 may optionally include at least one memory 1104, which may be, for example, an L1 / L2 / L3 cache. Additionally, or alternatively, the processor 1100 may optionally include one or more arithmetic-logic units (ALUs) 1106. One or more of these components may be in electronic communication or otherwise coupled (e.g., operatively, communicatively, functionally, electronically, electrically) via one or more interfaces (e.g., buses).

[0121] The processor 1100 may be a processor chipset and include a protocol stack (e.g., a software stack) executed by the processor chipset to perform various operations (e.g., receiving, obtaining, retrieving, transmitting, outputting, forwarding, storing, determining, identifying, accessing, writing, reading) in accordance with examples as described herein. The processor chipset may include one or more cores, one or more caches (e.g., memory local to or included in the processor chipset (e.g., the processor 1100) or other memory (e.g., random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), static RAM (SRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase change memory (PCM), and others). Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 34

[0122] The controller 1102 may be to manage and coordinate various operations (e.g., signaling, receiving, obtaining, retrieving, transmitting, outputting, forwarding, storing, determining, identifying, accessing, writing, reading) of the processor 1100 to cause the processor 1100 to support various operations in accordance with examples as described herein. For example, the controller 1102 may operate as a control unit of the processor 1100, generating control signals that manage the operation of various components of the processor 1100. These control signals include enabling or disabling functional units, selecting data paths, initiating memory access, and coordinating timing of operations.

[0123] The controller 1102 may be configured to fetch (e.g., obtain, retrieve, receive) instructions from the memory 1104 and determine subsequent instruction(s) to be executed to cause the processor 1100 to support various operations in accordance with examples as described herein. The controller 1102 may be configured to track memory addresses of instructions associated with the memory 1104. The controller 1102 may be configured to decode instructions to determine the operation to be performed and the operands involved. For example, the controller 1102 may be configured to interpret the instruction and determine control signals to be output to other components of the processor 1100 to cause the processor 1100 to support various operations in accordance with examples as described herein. Additionally, or alternatively, the controller 1102 may be configured to manage flow of data within the processor 1100. The controller 1102 may be configured to control transfer of data between registers, ALUs 1106, and other functional units of the processor 1100.

[0124] The memory 1104 may include one or more caches (e.g., memory local to or included in the processor 1100 or other memory, such as RAM, ROM, DRAM, SDRAM, SRAM, MRAM, flash memory, etc. In some implementations, the memory 1104 may reside within or on a processor chipset (e.g., local to the processor 1100). In some other implementations, the memory 1104 may reside external to the processor chipset (e.g., remote to the processor 1100).

[0125] The memory 1104 may store computer-readable, computer-executable code including instructions that, when executed by the processor 1100, cause the processor 1100 to perform various functions described herein. The code may be stored in a non-transitory computer-readable medium such as system memory or another type of memory. The controller 1102 and / or the processor 1100 may be configured to execute computer-readable instructions stored in the memory 1104 to cause Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 35 the processor 1100 to perform various example, the processor 1100 and / or the controller 1102 may be coupled with or to the memory 1104, the processor 1100, and the controller 1102, and may be configured to perform various functions described herein. In some examples, the processor 1100 may include multiple processors and the memory 1104 may include multiple memories. One or more of the multiple processors may be coupled with one or more of the multiple memories, which may, individually or collectively, be configured to perform various functions herein.

[0126] The one or more ALUs 1106 may be configured to support various operations in accordance with examples as described herein. In some implementations, the one or more ALUs 1106 may reside within or on a processor chipset (e.g., the processor 1100). In some other implementations, the one or more ALUs 1106 may reside external to the processor chipset (e.g., the processor 1100). One or more ALUs 1106 may perform one or more computations such as addition, subtraction, multiplication, and division on data. For example, one or more ALUs 1106 may receive input operands and an operation code, which determines an operation to be executed. One or more ALUs 1106 may be configured with a variety of logical and arithmetic circuits, including adders, subtractors, shifters, and logic gates, to process and manipulate the data according to the operation. Additionally, or alternatively, the one or more ALUs 1106 may support logical operations such as AND, OR, exclusive-OR (XOR), not-OR (NOR), and not-AND (NAND), enabling the one or more ALUs 1106 to handle conditional operations, comparisons, and bitwise operations.

[0127] The processor 1100 may support wireless communication in accordance with examples as disclosed herein. The processor 1100 may be configured to or operable to support at least one controller (e.g., the controller 1102) coupled with at least one memory (e.g., the memory 1104) and configured to or operable to cause the processor to: receive a GRAND configuration; receive a codeword; and attempt to decode the codeword using a decoder and based at least in part on the GRAND configuration.

[0128] Additionally, the processor 1100 may be configured to or operable to support any one or combination of where the GRAND configuration includes an abandonment threshold value; where the GRAND configuration includes an indication of one of multiple variants of GRAND decoders to use as the decoder; where the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 36 reliability bit GRAND decoder, a symbol GRAND decoder, or a Markov order GRAND decoder; where the GRAND configuration includes an indication of an interleaving / de-interleaving pattern to be used by the decoder to attempt to decode the codeword; where the abandonment threshold value comprises one of multiple pre-determined threshold values at the processor, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values; where each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword; where the indication of the interleaving / de-interleaving pattern is a value of zero, indicating that interleaving / de-interleaving is disabled for the decoder; where the codeword is encoded using a LDPC code; where the codeword is encoded using a polar code; where the GRAND configuration is received as part of a MCS field via DCI in a case of downlink and UCI in a case of uplink; where the at least one controller is further configured to or operable to cause the processor to receive at least a subset of information elements of the GRAND configuration via a RRC signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during reception of a plurality of codewords; where the at least a subset of information elements includes at least one of an abandonment threshold or transmission chain characteristics; where the at least one controller is further configured to or operable to cause the processor to transmit a HARQ ACK indicating that the codeword was successfully decoded or a HARQ NACK indicating that the codeword was not successfully decoded; where the at least one controller is further configured to or operable to cause the processor to transmit feedback information with the HARQ NACK, where the feedback information indicates a reason that the codeword was not successfully decoded; where the feedback information indicates that the codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword; where the processor is implemented in a first UE; where the at least one configure is further configured to or operable to cause the processor to receive the codeword from a second UE; where the at least one controller is further configured to or operable to cause the processor to receive the GRAND configuration from a base station; where the at least one controller is further configured to or operable to cause the processor to receive the codeword from the base station. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 37

[0129] The processor 1100 may support communication in accordance with examples as disclosed herein. The processor 1100 may be configured to or operable to support at least one controller (e.g., the controller 1102) coupled with at least one memory (e.g., the memory 1104) and configured to or operable to cause the processor to: transmit a GRAND configuration; and transmit a codeword.

[0130] Additionally, the processor 1100 may be configured to or operable to support any one or combination of where the GRAND configuration includes an abandonment threshold value; where the GRAND configuration includes an indication of one of multiple variants of GRAND decoders for a UE to use for decoding; where the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder; where the GRAND configuration includes an indication of an interleaving / de-interleaving pattern for a UE to use to attempt to decode the codeword; where the abandonment threshold value comprises one of multiple pre-determined threshold values, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values; where each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword; where the indication of the interleaving / de-interleaving pattern is a value of zero, indicating that interleaving / de-interleaving is disabled for a UE; where the at least one controller is further configured to or operable to cause a transmitter to encode the codeword using a LDPC code; where the at least one controller is further configured to or operable to cause a transmitter to encode the codeword is encoded using a polar code; where the GRAND configuration is transmitted as part of a MCS field via DCI in a case of downlink and UCI in a case of uplink; where the at least one controller is further configured to or operable to cause the processor to transmit at least a subset of information elements of the GRAND configuration via a RRC signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during transmission of a plurality of codewords; where the at least a subset of information elements includes at least one of an abandonment threshold or transmission chain characteristics; where the at least one controller is further configured to or Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 38 operable to cause the processor to receive, UE, a HARQ ACK indicating that the codeword was successfully decoded or a HARQ NACK indicating that the codeword was not successfully decoded; where feedback information is included with the HARQ NACK, where the feedback information indicates a reason that the codeword was not successfully decoded; where the feedback information indicates that the codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword.

[0131] Figure 12 illustrates an example of a NE 1200 in accordance with aspects of the present disclosure. The NE 1200 may include a processor 1202, a memory 1204, a controller 1206, and a transceiver 1208. The processor 1202, the memory 1204, the controller 1206, or the transceiver 1208, or various combinations thereof or various components thereof may be examples of means for performing various aspects of the present disclosure as described herein. These components may be coupled (e.g., operatively, communicatively, functionally, electronically, electrically) via one or more interfaces.

[0132] The processor 1202, the memory 1204, the controller 1206, or the transceiver 1208, or various combinations or components thereof may be implemented in hardware (e.g., circuitry). The hardware may include a processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), or other programmable logic device, or any combination thereof configured as or otherwise supporting a means for performing the functions described in the present disclosure.

[0133] The processor 1202 may include an intelligent hardware device (e.g., a general-purpose processor, a DSP, a CPU, an ASIC, an FPGA, or any combination thereof). In some implementations, the processor 1202 may be configured to operate the memory 1204. In some other implementations, the memory 1204 may be integrated into the processor 1202. The processor 1202 may be configured to execute computer-readable instructions stored in the memory 1204 to cause the NE 1200 to perform various functions of the present disclosure.

[0134] The memory 1204 may include volatile or non-volatile memory. The memory 1204 may store computer-readable, computer-executable code including instructions when executed by the processor 1202 cause the NE 1200 to perform various functions described herein. The code may be stored in a non-transitory computer-readable medium such as the memory 1204 or another type of Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 39 memory. Computer-readable media includes non-transitory computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A non-transitory storage medium may be any available medium that may be accessed by a general-purpose or special-purpose computer.

[0135] In some implementations, the processor 1202 and the memory 1204 coupled with the processor 1202 may be configured to cause the NE 1200 to perform one or more of the functions described herein (e.g., executing, by the processor 1202, instructions stored in the memory 1204). For example, the processor 1202 may support wireless communication at the NE 1200 in accordance with examples as disclosed herein. The NE 1200 may be configured to or operable to support a means for transmitting a GRAND configuration; and transmitting a codeword.

[0136] Additionally, the NE 1200 may be configured to or operable to support any one or combination of where the GRAND configuration includes an abandonment threshold value; where the GRAND configuration includes an indication of one of multiple variants of GRAND decoders for a UE to use for decoding; where the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder; where the GRAND configuration includes an indication of an interleaving / de-interleaving pattern for a UE to use attempt to decode the codeword; where the abandonment threshold value comprises one of multiple pre-determined threshold values, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values; where each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword; where the indication of the interleaving / de-interleaving pattern is a value of zero, indicating that interleaving / de-interleaving is disabled for a UE; encoding the codeword using a LDPC code; encoding the codeword is encoded using a polar code; where the GRAND configuration is transmitted as part of a MCS field via DCI in a case of downlink and UCI in a case of uplink; transmitting at least a subset of information elements of the GRAND configuration via a RRC signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 40 transmission of a plurality of codewords; at least a subset of information elements includes at least one of an abandonment threshold or transmission chain characteristics; receiving, from a UE, a HARQ ACK indicating that the codeword was successfully decoded or a HARQ NACK indicating that the codeword was not successfully decoded; where feedback information is included with the HARQ NACK, where the feedback information indicates a reason that the codeword was not successfully decoded; where the feedback information indicates that the codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword.

[0137] Additionally, or alternatively, the NE 1200 may support at least one memory (e.g., the memory 1204) and at least one processor (e.g., the processor 1202) coupled with the at least one memory and configured to or operable to cause the NE to: transmit a GRAND configuration; and transmit a codeword.

[0138] Additionally, the NE 1200 may be configured to or operable to support any one or combination of where the GRAND configuration includes an abandonment threshold value; where the GRAND configuration includes an indication of one of multiple variants of GRAND decoders for a UE to use for decoding; where the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder; where the GRAND configuration includes an indication of an interleaving / de-interleaving pattern for a UE to use to attempt to decode the codeword; where the abandonment threshold value comprises one of multiple pre-determined threshold values, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values; where each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword; where the indication of the interleaving / de-interleaving pattern is a value of zero, indicating that interleaving / de-interleaving is disabled for a UE; where the at least one processor is further configured to or operable to cause a transmitter to encode the codeword using a LDPC code; where the at least one processor is further configured to or operable to cause a transmitter to encode the codeword is encoded using a polar code; where the GRAND configuration is transmitted as part Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 41 of a MCS field via DCI in a case of downlink UCI in a case of uplink; where the at least one processor is further configured to or operable to cause the base station to transmit at least a subset of information elements of the GRAND configuration via a RRC signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during transmission of a plurality of codewords; where the at least a subset of information elements includes at least one of an abandonment threshold or transmission chain characteristics; where the at least one processor is further configured to or operable to cause the base station to receive, from a UE, a HARQ ACK indicating that the codeword was successfully decoded or a HARQ NACK indicating that the codeword was not successfully decoded; where feedback information is included with the HARQ NACK, where the feedback information indicates a reason that the codeword was not successfully decoded; where the feedback information indicates that the codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword.

[0139] The NE 1200 may be configured to or operable to support a means for receiving a GRAND configuration; receiving a codeword; and attempting to decode the codeword using a decoder and based at least in part on the GRAND configuration.

[0140] Additionally, the NE 1200 may be configured to or operable to support any one or combination of where the GRAND configuration includes an abandonment threshold value; where the GRAND configuration includes an indication of one of multiple variants of GRAND decoders to use as the decoder; where the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder; where the GRAND configuration includes an indication of an interleaving / de-interleaving pattern to be used by the decoder to attempt to decode the codeword; where the abandonment threshold value comprises one of multiple pre-determined threshold values at the device, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values; where each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword; where the indication of the interleaving / de-interleaving pattern is a value Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 42 of zero, indicating that interleaving / de- is disabled for the decoder; where the codeword is encoded using a LDPC code; where the codeword is encoded using a polar code; where the GRAND configuration is received as part of a MCS field via DCI in a case of downlink and UCI in a case of uplink; where at least a subset of information elements of the GRAND configuration is received via a RRC signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during reception of a plurality of codewords; where the at least a subset of information elements includes at least one of an abandonment threshold or transmission chain characteristics; transmitting a HARQ ACK indicating that the codeword was successfully decoded or a HARQ NACK indicating that the codeword was not successfully decoded; transmitting feedback information with the HARQ NACK, where the feedback information indicates a reason that the codeword was not successfully decoded; where the feedback information indicates that the codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword; where the device comprises a first UE; receiving the codeword from a second UE; receiving the GRAND configuration from a base station; receiving the codeword from the base station.

[0141] Additionally, or alternatively, the NE 1200 may support at least one memory (e.g., the memory 1204) and at least one processor (e.g., the processor 1202) coupled with the at least one memory and configured to or operable to cause the NE to: receive a GRAND configuration; receive a codeword; and attempt to decode the codeword using a decoder and based at least in part on the GRAND configuration.

[0142] Additionally, the NE 1200 may be configured to or operable to support any one or combination of the at least one processor is configured to or operable to cause the NE to where the GRAND configuration includes an abandonment threshold value; where the GRAND configuration includes an indication of one of multiple variants of GRAND decoders to use as the decoder; where the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder; where the GRAND configuration includes an indication of an interleaving / de-interleaving pattern to be used by the decoder to attempt to decode the codeword; where the abandonment threshold value Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 43 comprises one of multiple pre-determined values at the device, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values; where each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword; where the indication of the interleaving / de-interleaving pattern is a value of zero, indicating that interleaving / de-interleaving is disabled for the decoder; where the codeword is encoded using a LDPC code; where the codeword is encoded using a polar code; where the GRAND configuration is received as part of a MCS field via DCI in a case of downlink and UCI in a case of uplink; where at least a subset of information elements of the GRAND configuration is received via a RRC signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during reception of a plurality of codewords; where the at least a subset of information elements includes at least one of an abandonment threshold or transmission chain characteristics; where the at least one processor is further configured to or operable to cause the device to transmit a HARQ ACK indicating that the codeword was successfully decoded or a HARQ NACK indicating that the codeword was not successfully decoded; where the at least one processor is further configured to or operable to cause the device to transmit feedback information with the HARQ NACK, where the feedback information indicates a reason that the codeword was not successfully decoded; where the feedback information indicates that the codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword; where the device comprises a first UE; where the at least one processor is further configured to or operable to cause the first UE to receive the codeword from a second UE; where the at least one processor is further configured to or operable to cause the device to receive the GRAND configuration from a base station; where the at least one processor is further configured to or operable to cause the device to receive the codeword from the base station.

[0143] The controller 1206 may manage input and output signals for the NE 1200. The controller 1206 may also manage peripherals not integrated into the NE 1200. In some implementations, the controller 1206 may utilize an operating system such as iOS®, ANDROID®, Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 44 WINDOWS®, or other operating systems. In implementations, the controller 1206 may be implemented as part of the processor 1202.

[0144] In some implementations, the NE 1200 may include at least one transceiver 1208. In some other implementations, the NE 1200 may have more than one transceiver 1208. The transceiver 1208 may represent a wireless transceiver. The transceiver 1208 may include one or more receiver chains 1210, one or more transmitter chains 1212, or a combination thereof.

[0145] A receiver chain 1210 may be configured to receive signals (e.g., control information, data, packets) over a wireless medium. For example, the receiver chain 1210 may include one or more antennas to receive a signal over the air or wireless medium. The receiver chain 1210 may include at least one amplifier (e.g., a low-noise amplifier (LNA)) configured to amplify the received signal. The receiver chain 1210 may include at least one demodulator configured to demodulate the receive signal and obtain the transmitted data by reversing the modulation technique applied during transmission of the signal. The receiver chain 1210 may include at least one decoder for decoding the demodulated signal to receive the transmitted data.

[0146] A transmitter chain 1212 may be configured to generate and transmit signals (e.g., control information, data, packets). The transmitter chain 1212 may include at least one modulator for modulating data onto a carrier signal, preparing the signal for transmission over a wireless medium. The at least one modulator may be configured to support one or more techniques such as amplitude modulation (AM), frequency modulation (FM), or digital modulation schemes like phase- shift keying (PSK) or quadrature amplitude modulation (QAM). The transmitter chain 1212 may also include at least one power amplifier configured to amplify the modulated signal to an appropriate power level suitable for transmission over the wireless medium. The transmitter chain 1212 may also include one or more antennas for transmitting the amplified signal into the air or wireless medium.

[0147] Figure 13 illustrates a flowchart of a method in accordance with aspects of the present disclosure. The operations of the method may be implemented by a UE or NE as described herein. In some implementations, the UE may execute a set of instructions to control the function elements of the UE to perform the described functions. Additionally or alternatively, the NE may execute a set of instructions to control the function elements of the NE to perform the described functions. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 45

[0148] At 1302, the method may include a GRAND configuration. The operations of 1302 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 1302 may be performed by a UE as described with reference to Figure 10 or an NE as described with reference to Figure 12.

[0149] At 1304, the method may include receiving a codeword. The operations of 1304 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 1304 may be performed by a UE as described with reference to Figure 10 or an NE as described with reference to Figure 12.

[0150] At 1306, the method may include attempting to decode the codeword using a decoder and based at least in part on the GRAND configuration. The operations of 1306 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 1306 may be performed a UE as described with reference to Figure 10 or an NE as described with reference to Figure 12.

[0151] It should be noted that the method described herein describes a possible implementation, and that the operations and the steps may be rearranged or otherwise modified and that other implementations are possible.

[0152] Figure 14 illustrates a flowchart of a method in accordance with aspects of the present disclosure. The operations of the method may be implemented by a NE as described herein. In some implementations, the NE may execute a set of instructions to control the function elements of the NE to perform the described functions.

[0153] At 1402, the method may include transmitting a GRAND configuration. The operations of 1402 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 1402 may be performed by a NE as described with reference to Figure 12.

[0154] At 1404, the method may include transmitting a codeword. The operations of 1404 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 1404 may be performed by a NE as described with reference to Figure 12. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 46

[0155] It should be noted that the method herein describes a possible implementation, and that the operations and the steps may be rearranged or otherwise modified and that other implementations are possible.

[0156] The description herein is provided to enable a person having ordinary skill in the art to make or use the disclosure. Various modifications to the disclosure will be apparent to a person having ordinary skill in the art, and the generic principles defined herein may be applied to other variations without departing from the scope of the disclosure. Thus, the disclosure is not limited to the examples and designs described herein but is to be accorded the broadest scope consistent with the principles and novel features disclosed herein. Firm Ref. No. SMM920240020-WO-PCT

Claims

Lenovo Ref. No. SMM920240020-WO-PCT 47 What is claimed is:

1. A device for wireless communication, comprising: at least one memory; and at least one processor coupled with the at least one memory and operable to cause the device to: receive a guessing random additive noise decoding (GRAND) configuration; receive a codeword; and attempt to decode the codeword using a decoder and based at least in part on the GRAND configuration.

2. The device of claim 1, wherein the GRAND configuration includes an abandonment threshold value.

3. The device of claim 1, wherein the GRAND configuration includes an indication of one of multiple variants of GRAND decoders to use as the decoder, and wherein the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder.

4. The device of claim 1, wherein the GRAND configuration includes an indication of an interleaving / de-interleaving pattern to be used by the decoder to attempt to decode the codeword.

5. The device of claim 2, wherein the abandonment threshold value comprises one of multiple pre-determined threshold values at the device, and the GRAND configuration includes an indication of one of the multiple pre-determined threshold values.

6. The device of claim 5, wherein each of the multiple pre-determined abandonment threshold values is based at least in part on at least one of a transmission channel over which the codeword is received, a code length used to encode the codeword, a signal-to-noise ratio of the transmission channel, or a code rate used to encode the codeword. Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 48 7. The device of claim 4, wherein the of the interleaving / de-interleaving pattern is a value of zero, indicating that interleaving / de-interleaving is disabled for the decoder.

8. The device of claim 1, wherein the codeword is encoded using a low-density parity check (LDPC) code.

9. The device of claim 1, wherein the codeword is encoded using a polar code.

10. The device of claim 1, wherein the GRAND configuration is received as part of a modulation and coding scheme (MCS) field via downlink control information (DCI) in a case of downlink and uplink control information (UCI) in a case of uplink.

11. The device of claim 1, wherein at least one processor is further operable to cause the device to receive at least a subset of information elements of the GRAND configuration via a radio resource control (RRC) signaling in a case of static channel conditions, a case of a static radio transceiver setup, or when noise entropy of a channel over which the codeword is received does not change during reception of a plurality of codewords, and wherein the at least a subset of information elements includes at least one of an abandonment threshold or transmission chain characteristics.

12. The device of claim 1, wherein the at least one processor is further operable to cause the device to transmit a hybrid automatic repeat request (HARQ) acknowledgement (ACK) indicating that the codeword was successfully decoded or a HARQ non-acknowledgement (NACK) indicating that the codeword was not successfully decoded.

13. The device of claim 12, wherein the at least one processor is further operable to cause the device to transmit feedback information with the HARQ NACK, wherein the feedback information indicates a reason that the codeword was not successfully decoded.

14. The device of claim 13, wherein the feedback information indicates that the codeword was not successfully decoded due to an abandonment threshold value being insufficient to identify the codeword.

15. The device of claim 1, wherein the device comprises a first user equipment (UE).

16. A base station for wireless communication, comprising: Firm Ref. No. SMM920240020-WO-PCTLenovo Ref. No. SMM920240020-WO-PCT 49 at least one memory; and at least one processor coupled with the at least one memory and operable to cause the base station to: transmit a guessing random additive noise decoding (GRAND) configuration; and transmit a codeword.

17. The base station of claim 16, wherein the GRAND configuration includes an indication of one of multiple variants of GRAND decoders for a user equipment (UE) to use for decoding, and wherein the multiple variants of GRAND decoders include one or more of a hard-detection GRAND decoder, an ordered reliability bit GRAND decoder, a line-1 ordered reliability bit GRAND decoder, a symbol reliability GRAND decoder, or a Markov order GRAND decoder.

18. The base station of claim 16, wherein the GRAND configuration includes an indication of an interleaving / de-interleaving pattern for a user equipment (UE) to use to attempt to decode the codeword.

19. A method performed by a device, the method comprising: receiving a guessing random additive noise decoding (GRAND) configuration; receiving a codeword; and attempting to decode the codeword using a decoder and based at least in part on the GRAND configuration.

20. A method performed by a base station, the method comprising: transmitting a guessing random additive noise decoding (GRAND) configuration; and transmitting a codeword. Firm Ref. No. SMM920240020-WO-PCT

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