Receiver, timing recovery method, optical communication system, and program
The proposed receiver design addresses the computational burden of sinc filters by interpolating and downsampling filter coefficients, achieving efficient timing recovery with reduced computational resources.
Patent Information
- Application Number
- PCT/JP2024/000260
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-01-10
- Publication Date
- 2025-07-17
AI Technical Summary
Conventional timing recovery methods for signal data sampled at a conventional baud rate require significant computational resources due to the use of sinc filters, leading to increased hardware and processing time.
A receiver design that includes a data signal interpolation unit, a downsampling filter calculation unit, and a data signal downsampling unit, which performs interpolation and downsampling using a combination of CMA and sinc filters on filter coefficients rather than directly on the signal data, reducing the computational load.
This approach allows for timing recovery with a reduced calculation amount, thereby minimizing hardware requirements and processing time.
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Figure JP2024000260_17072025_PF_FP_ABST
Abstract
Description
Receiver, timing recovery method, optical communication system and program
[0001] The present invention relates to a receiver, a timing recovery method, an optical communication system, and a program.
[0002] A conventional timing recovery technique for signal data sampled at a baud rate processes the signal data in the order of zero interpolation, a sinc filter, and a CMA (constant modulus algorithm) filter.
[0003] DS Millar, D. Lavery, R. Maher, BC Thomsen, P. Bayvel and SJ Savory, “A baud-rate sampled coherent transceiver with digital pulse shaping and interpolation,” OFC / NFOEC, pp. 1-3, 2013.
[0004] However, since the signal data is processed using a sinc filter, the amount of calculation required by the sinc filter is large, which poses issues such as an increase in the number of circuits required for hardware implementation and an increase in processing time required for software implementation.
[0005] An object of the present invention is to recover the timing of signal data with less computational complexity.
[0006] One aspect of the present invention is a receiver comprising: a data signal interpolation unit that interpolates a data signal; a downsampling filter calculation unit that calculates a filter that downsamples the interpolated data signal based on the data signal; and a data signal downsampling unit that downsamples the interpolated data signal using the filter.
[0007] One aspect of the present invention is a timing recovery method including: a data signal interpolation step of interpolating a data signal; a downsampling filter calculation step of calculating a filter that downsamples the interpolated data signal based on the data signal; and a data signal downsampling step of downsampling the interpolated data signal using the filter.
[0008] According to the present invention, the timing of signal data can be recovered with a smaller amount of calculation.
[0009] 1 is a diagram illustrating an example of the configuration of an optical communication system according to an embodiment; FIG. 2 is a diagram illustrating an example of the configuration of a digital signal processor according to an embodiment; FIG. 3 is a diagram illustrating an example of the configuration of a timing recovery unit according to an embodiment; and FIG. 4 is a flowchart illustrating the operation of the timing recovery unit according to an embodiment.
[0010] (Optical Communication System) Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a diagram showing an example of the configuration of an optical communication system 1 according to this embodiment. The optical communication system 1 includes a transmitter 2, a receiver 3, and an optical fiber 4. In the optical communication system 1, the transmitter 2 transmits light carrying information to the receiver 3 via the optical fiber 4.
[0011] (Transmitter) The transmitter 2 includes a signal generator 21, a laser 22, and an IQ modulator 23. The signal generator 21 generates a signal to be transmitted. The signal generator 21 outputs the generated transmission signal to the IQ modulator 23. The laser 22 outputs light to be used as a carrier wave to the IQ modulator 23. The IQ modulator 23 optically phase-modulates a signal generated from the transmission signal input from the signal generator 21 onto the carrier wave input from the laser 22. In this way, the transmitter 2 generates light carrying information.
[0012] (Receiver) The receiver 3 includes a local light generator 31, an optical coherent receiver 32, an ADC 33, and a digital signal processor 34. The local light generator 31 generates local light and outputs it to the optical coherent receiver 32. The optical coherent receiver 32 demodulates the optical phase of the received light by causing the light received from the transmitter 2 to interfere with the local light. The ADC 33 converts the signal demodulated by the optical coherent receiver 32 into a digital signal. The digital signal processor 34 processes the digital signal converted and generated by the ADC 33.
[0013] (Digital Signal Processor) FIG. 2 is a diagram showing an example of the configuration of the digital signal processor 34 according to this embodiment. The digital signal processor 34 includes a timing recovery unit 341, a polarization separation unit 342, frequency offset compensation units 343-1 to 343-2, carrier phase compensation units 344-1 to 344-2, a symbol decision unit 345, a differential decoding unit 346, and a Gray decoding unit 347. The timing recovery unit 341 compensates for degradation in reception performance caused by deviations in sampling by the ADC 33 of the digital signal converted by the ADC 33. The polarization separation unit 342 separates the signal compensated by the timing recovery unit 341 into an X-polarized signal and a Y-polarized signal. The frequency offset compensation unit 343 compensates for degradation in reception performance caused by frequency offsets of the X-polarized signal and the Y-polarized signal. The frequency offset compensation unit 343-1 compensates for degradation in reception performance caused by the frequency offset of the X-polarized signal, and the frequency offset compensation unit 343-2 compensates for degradation in reception performance caused by the frequency offset of the Y-polarized signal.
[0014] The carrier phase compensation unit 344 compensates for degradation in reception performance due to a phase shift of the signal compensated by the frequency offset compensation unit 343. The carrier phase compensation unit 344-1 compensates for degradation in reception performance due to a phase shift of the signal compensated by the frequency offset compensation unit 343-1, and the carrier phase compensation unit 344-2 compensates for degradation in reception performance due to a phase shift of the signal compensated by the frequency offset compensation unit 343-2. The symbol decision unit 345 determines a symbol based on the signal compensated by the carrier phase compensation unit 344. The differential decoding unit 346 decodes the symbol using differential decoding. The Gray decoding unit 347 decodes the signal decoded using differential decoding using Gray decoding. In this manner, the digital signal processor 34 processes the digital signal.
[0015] (Timing Recovery) FIG. 3 is a diagram showing an example of the configuration of the timing recovery unit 341 according to this embodiment. The timing recovery unit 341 includes a data signal interpolation unit 3411, a data signal downsampling unit 3412, and a downsampling filter calculation unit 3413. The data signal interpolation unit 3411 performs interpolation processing on a digital signal (signal data). The interpolation processing is, for example, zero interpolation processing. The interpolation processing is processing for generating an upsampled signal by interpolating signal data sampled every time T with a predetermined value. In the zero interpolation processing, the signal data sampled every time T is interpolated with zeros. The data signal interpolation unit 3411 interpolates a data sequence S consisting of N pieces of signal data sampled every time T, for example. T By performing interpolation on the even-numbered data, the data sequence S T data, and the odd-numbered data is a predetermined value, and the data sequence S T/2 In other words, the data sequence S T The k-th (k=1 to N) signal data is a data sequence S T/2 This process is a 2x upsampling, and a data string consisting of the same number of signal data as when sampling is performed every time T / 2 is generated. Hereinafter, the signal data is referred to as a data string S consisting of N signal data.T However, the present invention is not limited to this, and the signal data may be a data string consisting of any number of signal data. Furthermore, the interpolation process will be described in the case of upsampling by 2 times, but the present invention is not limited to this, and the data signal interpolation unit 3411 may generate a data string consisting of any number of signal data from N signal data by interpolation, for example.
[0016] The data signal downsampling unit 3412 downsamples the interpolated data sequence S T/2 This recovers the timing of the signal data. The downsampling filter calculation unit 3413 calculates the filter coefficients for downsampling by the data signal downsampling unit 3412. The calculation method will be described below.
[0017] The downsampling filter calculation unit 3413 calculates the data sequence S T CMA filter processing is performed on the data string W T *S T The CMA filter process generates a filter coefficient sequence W generated by a constant modulus algorithm (CMA). T The filter coefficient sequence W T The number of taps (number of filter coefficients) in the data sequence S T The number of data is N, which corresponds to the number of data W. T *S T Is W T and S T The downsampling filter calculation unit 3413 calculates the filter coefficient sequence W T Update.
[0018] Thereafter, the downsampling filter calculation unit 3413 calculates the filter coefficient sequence W T By interpolating the filter coefficient sequence W T/2 The interpolation process is, for example, a zero interpolation process. T/2 The number of taps in the data sequence S T/2The number of pieces of data is 2N, which corresponds to the number of pieces of data in the downsampling filter calculation unit 3413. T/2 By performing sinc filter processing on T/2 *W sinc The sinc filter process generates a filter coefficient sequence W sinc This is a filtering process using W sinc The number of taps of the signal data S T/2 The number of data is 2N, which corresponds to the number of data W. T/2 *W sinc Is W T/2 and W sinc The product of the filter coefficients in the same column is a filter coefficient column consisting of 2N coefficients.
[0019] The data signal downsampling unit 3412 T/2 *W sinc The data sequence S T/2 The data signal downsampling unit 3412 performs downsampling on (W T/2 *W sinc ) *S T/2 Calculate (W T/2 *W sinc ) *S T/2 Is W T/2 *W sinc and S T/2 The product of the filter coefficients and signal data of the same column is a data column consisting of 2N pieces. (W T/2 *W sinc ) *S T/2 is the timing recovered signal data.
[0020] In the above description, the filter coefficient sequence W T , filter coefficient sequence W T/2 , filter coefficient sequence W sinc The number of taps is set to N, 2N, and 2N respectively. T and data sequence S T/2 The number of signal data included in the signal data may be changed.
[0021] 4 is a flowchart showing the operation of the timing recovery unit 341 according to this embodiment. T Interpolate the data sequence S T/2 (Step S11). The downsampling filter calculation unit 3413 generates the data sequence S T CMA filter processing is performed on the T (step S12). The downsampling filter calculation unit 3413 updates the filter coefficient sequence W T and the filter coefficient sequence W T/2 (step S13). The downsampling filter calculation unit 3413 generates the filter coefficient sequence W T/2 The filter coefficient sequence W T/2 *W sinc (step S14). The timing recovery unit 341 performs step S11 and steps S12 to S14 in parallel. The timing recovery unit 341 may perform step S11 before steps S12 to S14, or may perform steps S12 to S14 before step S11.
[0022] The data signal downsampling unit 3412 downsamples the filter coefficient sequence W T/2 *W sinc The data sequence S T/2 By filtering the timing recovered data sequence (W T/2 *W sinc ) *S T/2 Generate.
[0023] The timing recovery unit 341 of this embodiment does not perform sinc filtering on the signal data. Instead, the timing recovery unit 341 uses a filter coefficient sequence W T/2 By performing sinc filter processing on the signal data, it is possible to obtain signal data with recovered timing similar to that obtained by performing sinc filter processing on the signal data. The length of the signal data is the filter coefficient sequence W T Since the length of the sinc filter is shorter than the length of the filter coefficient sequence W TThis allows the timing recovery unit 341 of this embodiment to reduce the amount of calculation.
[0024] Other Embodiments One embodiment of the present invention has been described in detail above with reference to the drawings, but the specific configuration is not limited to that described above, and various design changes and the like can be made within the scope that does not deviate from the gist of the present invention.
[0025] A portion of the processing of the transmitter 2 and receiver 3 in the above-described embodiment may be implemented by a computer using software. In this case, a program for implementing this function may be recorded on a computer-readable recording medium, and the program may be loaded into a computer system and executed. Note that the term "computer system" as used herein includes hardware such as an OS and peripheral devices. Furthermore, the term "computer-readable recording medium" refers to portable media such as flexible disks, optical magnetic disks, ROMs, and CD-ROMs, as well as storage devices such as hard disks built into a computer system. Furthermore, the term "computer-readable recording medium" may also include media that dynamically store programs for a short period of time, such as communication lines used when transmitting programs via networks such as the Internet or telephone lines, or media that store programs for a fixed period of time, such as volatile memory within a computer system that serves as a server or client. The program may be a program that implements a portion of the above-described functions, or may be a program that can implement the above-described functions in combination with a program already stored in the computer system, or may be implemented using a programmable logic device such as an FPGA (Field Programmable Gate Array).
[0026] 1 Optical communication system, 2 Transmitter, 21 Signal generator, 22 Laser, 23 IQ modulator, 3 Receiver, 31 Local light generator, 32 Optical coherent receiver, 33 ADC, 34 Digital signal processor, 341 Timing recovery unit, 342 Polarization separation unit, 343 Frequency offset compensation unit, 344 Carrier phase compensation unit, 345 Symbol decision unit, 346 Differential decoding unit, 347 Gray decoding unit, 3411 Data signal interpolation unit, 3412 Data signal downsampling unit, 3413 Downsampling filter calculation unit
Claims
1. A receiver comprising: a data signal interpolation unit that interpolates a data signal; a downsampling filter calculation unit that calculates a filter for downsampling the interpolated data signal based on the data signal; and a data signal downsampling unit that downsamples the interpolated data signal by the filter.
2. The receiver according to claim 1, wherein the downsampling filter calculation unit updates a filter coefficient sequence generated by a constant modulus algorithm (CMA) based on the data signal, interpolates the filter coefficient sequence, and performs a sinc filter process on the filter coefficient sequence to generate the filter for downsampling.
3. The receiver according to claim 1 or 2, wherein the interpolation is zero interpolation.
4. The receiver according to claim 1 or 2, wherein the data signal interpolation unit generates a signal upsampled by a factor of 2 by interpolating the signal data.
5. An optical communication system comprising: a transmitter that transmits light; and a receiver that receives the light, demodulates a phase of the light, and converts the demodulated signal into a digital signal, wherein the receiver comprises: a data signal interpolation unit that interpolates a data signal that is the digital signal; a downsampling filter calculation unit that calculates a filter for downsampling the interpolated data signal based on the data signal; and a data signal downsampling unit that downsamples the interpolated data signal by the filter.
6. A timing recovery method having: a data signal interpolation step of interpolating a data signal; a downsampling filter calculation step of calculating a filter for downsampling the interpolated data signal based on the data signal; and a data signal downsampling step of downsampling the interpolated data signal by the filter.
7. A program for causing a computer to execute the method according to claim 6.
Citation Information
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