Performance analysis method, application method, device, readable medium and program product

Abstract

The present application relates to the technical field of computers, in particular to a performance analysis method, an application method, a device, a readable medium and a program product. According to the method, a plurality of pieces of execution information which can be converted into related performance evaluation indexes are collected in one running process of a target program. The plurality of pieces of execution information may include, but are not limited to, target task start time information, end time information, time information corresponding to a state switching moment of each target thread run by the target program and state information before and after switching, time information corresponding to a CPU frequency point switching moment and frequency point information before and after switching. Furthermore, according to the method, the collected execution information can be used for quickly filtering out associated execution information in a target time period, and the associated execution information that affects a same performance evaluation index can be comprehensively analyzed and converted, so that a more accurate performance analysis result is obtained.

Description

Performance analysis method, application method, device, readable medium and program product

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on February 2, 2024, with application number 202410165481.5 and application name “Performance Analysis Method, Application Method, Device, Readable Medium and Program Product”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present invention relates to the field of computer technology, and in particular to a performance analysis method, an application method, a device, a readable medium, and a program product. Background Art

[0003] With the continuous development of computer technology, multi-core processing technology has become widely used to improve the processing and computing capabilities of electronic devices such as mobile phones and computers. Devices that support parallel processing by multiple central processing units (CPUs) typically integrate multiple computing cores, enabling the simultaneous execution of multiple applications (APPs) installed on the mobile terminal. To improve the user experience, developers often use performance analysis tools to test the performance of programs or hardware devices such as the CPU of the electronic device. For example, during the performance analysis and tuning of an application, program performance can be measured by collecting program execution information and converting it into performance evaluation indicators such as CPU usage and CPU load. The program code can then be tuned based on the performance evaluation indicators. In addition, in some hardware device testing scenarios, the collected program execution information and the converted performance evaluation indicators can also be used to analyze the hardware capabilities of one or more CPUs configured in the electronic device. For example, based on the CPU load converted from program execution information, the load capacity of each CPU in the electronic device can be measured, as well as the combined load capacity or load balancing performance provided by the electronic device based on multiple CPUs.

[0004] However, current performance analysis tools collect program execution information in a complex and disjointed manner. Each piece of program execution information is collected independently and the collected information is unrelated. This results in low accuracy and limited flexibility in performance analysis.

[0005] Summary of the Invention

[0006] In view of this, the present application provides a performance analysis method, application method, device, readable medium and program product, which can use the collected execution information to quickly filter out the related execution information within the target time period, and can comprehensively analyze and transform the related execution information that affects the same performance evaluation index, so as to obtain more accurate performance analysis results. Compared with other existing performance analysis solutions, the present application has better flexibility and can support custom plug-in code, thereby increasing the convenience of obtaining information in other dimensions. In the process of collecting execution information of various dimensions, information screening can be completed, and the final collection results of execution data are concentrated and accurate, with less redundant data. In addition, the present application does not need to modify the target program code, so it will not affect the original program, and the corresponding development cost is also low.

[0007] Specifically, in the first aspect, the present application provides a performance analysis method, applied to an electronic device, comprising: detecting an analysis request from a user to run a first program for performance analysis; and displaying a performance analysis result in response to the analysis request, wherein the performance analysis result is obtained based on execution information of the first program during the same running process, the execution information includes at least multiple time information related to the first task of the first program, and the performance analysis result includes a processor performance analysis result.

[0008] For example, the above-mentioned electronic device may be a device capable of running the target program and the performance analysis tool, such as an electronic device such as a mobile phone or a notebook as exemplified below. The first program that the above-mentioned user instructs to run may be the target program mentioned below. In an embodiment of the present application, the above-mentioned "user" may refer to a developer, or an analyst, in an embodiment of the present application. The above-mentioned analysis request may be a request for the user to operate the target program on the interface of the performance analysis tool run by the electronic device to perform performance analysis. Correspondingly, the electronic device may collect multiple pieces of execution information related to the performance analysis results that the user needs to obtain during the same operation of the target program (such as the above-mentioned first program).

[0009] Furthermore, the electronic device can determine at least one calculation interval corresponding to one or more target tasks of the target program based on the various time information in the multiple execution information, and then accurately calculate the CPU load in each calculation interval when the target thread is in the running state. Finally, it can accurately calculate the CPU load corresponding to each target task, and further calculate the comprehensive CPU load of the target program, thereby obtaining a performance analysis result.

[0010] It can be understood that the task load calculated by the performance analysis method provided in this application for each task of the target program is mainly reflected as the CPU load. Therefore, the performance analysis results finally obtained by the performance analysis method provided in this application can usually include processor performance analysis results, and the processor performance analysis results can, for example, include CPU load analysis results.

[0011] In a possible implementation of the first aspect above, the electronic device includes one or more CPUs, the processor performance analysis result includes the CPU performance analysis result, and detecting an analysis request from a user to run a first program for performance analysis includes: detecting a first analysis request from a user to run the first program to perform performance analysis on one or more CPUs; or detecting a second analysis request from the user to perform performance analysis on the first program.

[0012] For example, a performance analysis request performed by a user on a performance analysis tool running on an electronic device may be a performance analysis request for an electronic device configured with one or more CPUs (or a multi-core system) to optimize the balance between CPU computing power and device power consumption in order to pursue higher power consumption benefits, such as the above-mentioned first analysis request; or it may be a request for performance analysis of a target program developed or tested by a program developer, such as the above-mentioned second analysis request.

[0013] In a possible implementation of the first aspect above, the first program includes one or more tasks, the one or more tasks include the first task, and, in response to an analysis request, the performance analysis results are displayed, including: determining at least one calculation interval for calculating the first task load, wherein the first task load is the CPU load generated corresponding to the first task, and the performance analysis result is related to the first task load; determining the duration corresponding to the calculation interval in which the first thread is in a running state in at least one calculation interval, wherein the first thread is a thread executing the first task; obtaining the computing power parameters corresponding to the frequency points of the CPU work in each calculation interval; determining the first task load based on the number of at least one calculation interval, the duration corresponding to the calculation interval in which the first thread is in a running state, and the computing power parameters corresponding to the frequency points of the CPU work in each calculation interval.

[0014] In a possible implementation of the first aspect above, multiple time information related to the first task of the first program are used to determine the start time and end time of each calculation interval, and at least one calculation interval for calculating the first task load is determined, including: obtaining the start time information and end time information of the first task in at least one task of the first program, and obtaining the first time information corresponding to the activity state switching moment of the first thread where the first task is located, wherein the activity state includes the running state, and obtaining the second time information corresponding to the frequency point switching moment of the first CPU running the first thread; based on the start time information, the end time information, the first time information and the second time information, determine at least one calculation interval for calculating the first task load.

[0015] In a possible implementation of the first aspect above, the execution information of the first program during the same running process also includes the activity state information of the first thread collected before and after the activity state switching moment, and the running state includes the running state and / or the runnable state.

[0016] In a possible implementation of the first aspect, determining a duration of a computing interval in which a first thread is in a running state in at least one computing interval includes determining a first running duration corresponding to a first computing interval in which the first thread is in a running state, and determining a number of first computing intervals in which the first thread is in a running state.

[0017] In a possible implementation of the first aspect above, the execution information of the first program during the same operation process also includes the frequency information of the first CPU collected before and after the frequency switching moment, and obtaining the computing power parameters corresponding to the frequency of the CPU working in each calculation interval, including: obtaining the first frequency information of the first CPU working in the first calculation interval; determining the value of the corresponding first equivalent computing power based on the type of the first CPU and the first frequency information; and determining the value of the first equivalent computing power as the computing power parameter corresponding to the frequency of the first CPU working in the first calculation interval.

[0018] In a possible implementation of the first aspect above, the first task load is determined based on the number of at least one calculation interval, the duration corresponding to the calculation interval in which the first thread is in a running state, and the computing power parameters corresponding to the frequency of CPU operation in each calculation interval, including: calculating the first CPU load corresponding to the first calculation interval based on the first running duration and the value of the first equivalent computing power; and performing cumulative calculation according to the first CPU loads corresponding to one or more first calculation intervals in at least one calculation interval to obtain the first task load corresponding to the first task.

[0019] In a possible implementation of the first aspect above, one or more tasks also include a second task, and, in response to an analysis request, displaying the performance analysis results, also includes: determining at least one calculation interval for calculating the second task load, wherein the second task load is the CPU load generated by the second task; determining the duration corresponding to the calculation interval in which the second thread is in a running state in at least one calculation interval, wherein the second thread is a thread executing the second task; obtaining the computing power parameters corresponding to the frequency points of the CPU work in each calculation interval; determining the second task load based on the number of at least one calculation interval, the duration corresponding to the calculation interval in which the second thread is in a running state, and the computing power parameters corresponding to the frequency points of the CPU work in each calculation interval.

[0020] That is, the CPU load of the target program can be a combination of the task loads (i.e., CPU loads) corresponding to each task, and the aforementioned "combined calculation" can be performed by cumulative calculation. For example, the task loads of each task can be calculated separately, such as the first task load and the second task load, and then the CPU loads of each task can be cumulatively calculated to obtain the accurate task load of the target program.

[0021] It can be understood that the target program task load calculated above, combined with the corresponding target execution time of the program or task, can accurately reflect the program code performance of the target program or the CPU performance of the electronic device running the target program.

[0022] In a possible implementation of the first aspect above, in response to an analysis request, the performance analysis results are displayed, including: in response to the first analysis request, the first task load and the second task load are combined and calculated to obtain the total load corresponding to one or more CPUs currently working in the electronic device, determine it as the processor performance analysis result and display it.

[0023] For example, the total load corresponding to one or more CPUs included in the above-mentioned processor performance analysis results can be the target program task load generated by each CPU of the electronic device during the execution of the target program, that is, the CPU overhead calculated based on the combination of multiple task loads such as the first task load and the second task load. The above-mentioned processor performance analysis results can be used to guide the electronic device to timely increase or decrease the operating frequency of the corresponding CPU during the process of running one or more target programs, so as to correspondingly increase or decrease the computing power supply, achieve the purpose of timely optimizing the balance between CPU computing power and device power consumption, and thus pursue higher power consumption benefits.

[0024] In a possible implementation of the first aspect above, the performance analysis result includes a first program performance analysis result, and, in response to an analysis request, displaying the performance analysis result, including: in response to a second analysis request, generating and displaying the first program performance analysis result based on the first task load and the second task load.

[0025] For example, the first program performance analysis result may be a performance analysis result corresponding to the program code performance of the target program provided in this application. The performance analysis result may be used to guide whether a code optimization strategy such as reducing program logic complexity or improving algorithm efficiency is needed for the target program.

[0026] In a possible implementation of the first aspect above, the start time information of the first task is obtained based on the collection of running results of the first instrumentation program, and the end time information of the first task is obtained based on the collection of running results of the second instrumentation program. In addition, the electronic device jumps to run the first instrumentation program based on the first jump instruction inserted in the first program; and the electronic device jumps to run the second instrumentation program based on the second jump instruction inserted in the first program.

[0027] For example, the first jump instruction may be a jump instruction inserted at the task start point of the target task through a tracking method based on dynamic instrumentation. When the jump instruction is executed by the CPU, it can jump to the corresponding instrumentation program (such as the first instrumentation program), execute and collect the system time corresponding to the task start point as the start time information. The second jump instruction may be a jump instruction inserted at the task end point of the target task through a dynamic instrumentation method. When the jump instruction is executed by the CPU, it can jump to the corresponding instrumentation program (such as the second instrumentation program), execute and collect the system time corresponding to the task end point as the end time information.

[0028] In a possible implementation of the first aspect above, the first time information corresponding to the moment when the activity state of the first thread is switched is collected based on the running result of the third instrumentation program, and the electronic device jumps to run the third instrumentation program based on the third jump instruction inserted in the application code / kernel code used to monitor the activity state of the first thread.

[0029] For example, the above-mentioned first time information can be the time information corresponding to any active state switching moment of the target thread, hereinafter referred to as the time information corresponding to the state switching moment. For example, the time information corresponding to the state switching moment ①, state switching moment ②, state switching moment ③, state switching moment ④, etc. exemplified below. The jump instruction corresponding to the execution of the above-mentioned third plug-in program to collect the time information corresponding to each of the above-mentioned state switching moments, such as the above-mentioned third jump instruction, can be inserted into the application code / kernel code for monitoring the active state of the target thread using a tracking method based on dynamic plug-in. In some embodiments, the above-mentioned application code / kernel code can be integrated into the thread state acquisition module 812 to realize the collection of the time information corresponding to the target thread active state switching moment and the state information before and after the corresponding switching moment.

[0030] In a possible implementation of the first aspect above, the second time information corresponding to the frequency switching moment of the first CPU is collected based on the running results of the fourth instrumentation program, and the electronic device jumps to run the fourth instrumentation program based on the fourth jump instruction inserted in the application code / kernel code that can monitor the frequency switching event of the first CPU.

[0031] For example, the second time information may be the time information corresponding to the operating frequency switching moment of the CPU running the target thread at each moment in the electronic device, that is, the time information corresponding to the frequency switching moment hereinafter. For example, the time information corresponding to the frequency switching moment ①, frequency switching moment ②, frequency switching moment ③, frequency switching moment ④, and frequency switching moment ⑤ exemplified below. In some embodiments, the application code / kernel code may be integrated into the CPU frequency acquisition module 813 to implement the acquisition of the time information corresponding to the CPU frequency switching moment and the CPU frequency information before and after the corresponding switching moment.

[0032] In a second aspect, the present application provides a performance analysis method, applied to a first electronic device and a second electronic device, the method comprising: the first electronic device detects an analysis request from a user instructing to run a first program for performance analysis; the first electronic device sends an operation instruction corresponding to the first program to the second electronic device in response to the analysis request; the second electronic device runs the first program in response to the operation instruction; the first electronic device displays the performance analysis result based on the execution information collected by the second electronic device during the same operation of the first program, wherein the performance analysis result is obtained based on the execution information of the first program during the same operation process, the execution information includes at least multiple time information related to the first task of the first program, and the performance analysis result includes the processor performance analysis result.

[0033] For example, the first electronic device may be a device running a performance analysis tool, such as a notebook, etc. The second electronic device may be a device running a target program, such as a mobile phone, etc., as exemplified below.

[0034] In a possible implementation of the second aspect above, the first program includes one or more tasks, the one or more tasks include the first task, and the first electronic device displays the performance analysis result based on the execution information collected by the second electronic device during the same operation of the first program, including: the first electronic device receives the execution information collected by the second electronic device, and determines at least one calculation interval for calculating the first task load based on the execution information, wherein the first task load is the CPU load generated corresponding to the first task, and the performance analysis result is related to the first task load; the first electronic device determines the duration corresponding to the calculation interval in which the first thread is in a running state in at least one calculation interval, wherein the first thread is the thread executing the first task; the first electronic device obtains the computing power parameters corresponding to the frequency of the CPU operation in each calculation interval; the first electronic device determines the first task load based on the number of at least one calculation interval, the duration corresponding to the calculation interval in which the first thread is in a running state, and the computing power parameters corresponding to the frequency of the CPU operation in each calculation interval.

[0035] In a possible implementation of the second aspect above, the first electronic device determines at least one calculation interval for calculating the first task load based on the execution information, including: the first electronic device obtains the start time information and end time information of the first task in at least one task of the first program, and the first electronic device obtains the first time information corresponding to the activity state switching moment of the first thread where the first task is located, wherein the activity state includes the running state, and the first electronic device obtains the second time information corresponding to the frequency switching moment of the first CPU running the first thread, wherein the first CPU is any one of the one or more CPUs of the second electronic device; the first electronic device determines at least one calculation interval for calculating the first task load based on the start time information, the end time information, the first time information and the second time information.

[0036] In a possible implementation of the second aspect above, the execution information of the first program during the same running process also includes the activity state information of the first thread collected before and after the activity state switching moment, and the running state includes the running state and / or the runnable state.

[0037] In a possible implementation of the second aspect, the first electronic device determines a duration corresponding to a calculation interval in which the first thread is in a running state in at least one calculation interval, including: the first electronic device determines a first running duration corresponding to a first calculation interval in which the first thread is in a running state, and the first electronic device determines the number of first calculation intervals in which the first thread is in a running state.

[0038] In a possible implementation of the second aspect above, the execution information of the first program during the same operation process also includes the frequency information of the first CPU collected before and after the frequency switching moment, and the first electronic device obtains the computing power parameters corresponding to the frequency of the CPU working in each calculation interval, including: the first electronic device obtains the first frequency information of the first CPU working in the first calculation interval; the first electronic device determines the corresponding first equivalent computing power value based on the type of the first CPU and the first frequency information; the first electronic device determines the value of the first equivalent computing power as the computing power parameter corresponding to the frequency of the first CPU working in the first calculation interval.

[0039] In a possible implementation of the second aspect above, the first electronic device determines the first task load based on the number of at least one calculation interval, the duration corresponding to the calculation interval in which the first thread is in a running state, and the computing power parameters corresponding to the frequency of CPU operation in each calculation interval, including: the first electronic device calculates the first CPU load corresponding to the first calculation interval based on the first running duration and the value of the first equivalent computing power; the first electronic device performs cumulative calculation according to the first CPU loads corresponding to one or more first calculation intervals in at least one calculation interval to obtain the first task load corresponding to the first task.

[0040] In a possible implementation of the second aspect above, one or more tasks also include a second task, and the first electronic device displays the performance analysis results based on the execution information collected by the second electronic device during the same operation of the first program, including: the first electronic device determines at least one calculation interval for calculating the second task load, wherein the second task load is the CPU load generated by the second task; the first electronic device determines the duration corresponding to the calculation interval in which the second thread is in a running state in at least one calculation interval, wherein the second thread is the thread executing the second task; the first electronic device obtains the computing power parameters corresponding to the frequency points of the CPU work in each calculation interval; the first electronic device determines the second task load based on the number of at least one calculation interval, the duration corresponding to the calculation interval in which the second thread is in a running state, and the computing power parameters corresponding to the frequency points of the CPU work in each calculation interval; the first electronic device generates and displays the performance analysis results based on the first task load and the second task load.

[0041] In a third aspect, the present application provides a method for applying performance analysis results, which is applied to an electronic device, the electronic device including a performance analysis tool, wherein the performance analysis tool is used to execute the performance analysis method provided by the above-mentioned first aspect and various possible implementations of the first aspect to obtain performance analysis results, the performance analysis results including CPU load analysis results corresponding to multiple programs running in a first time period, and the method includes: establishing a first coordinate system, wherein the horizontal axis of the first coordinate system represents the task load and the vertical axis represents the CPU computing power; based on the maximum value of the screen frame rate of the electronic device, determining a first reference line in the first coordinate system, wherein the task load corresponding to the coordinate point on the first reference line and the CPU computing power provided by the electronic device meet a first balance condition, and the first balance condition is used to control the CPU computing power provided by the electronic device and the power consumption of the electronic device to reach a balanced state; based on the positional relationship between the landing points of the CPU load analysis results corresponding to multiple programs in the first coordinate system and the first reference line, determining program optimization strategies for multiple programs.

[0042] For example, the first coordinate system may be the computing power-load analysis coordinate system illustrated in FIG. 7 below.

[0043] Correspondingly, the first reference line can be the 120Hz computing power and power consumption balance line shown in FIG7 below. The positional relationship between the landing points of the CPU load analysis results corresponding to the multiple programs in the first coordinate system and the first reference line can include an over-provisioned region (where the landing points are above the 120Hz computing power and power consumption balance line) and an under-provisioned region (where the landing points are below the 120Hz computing power and power consumption balance line). For the landing points in the over-provisioned region, the primary consideration is how to achieve higher power consumption benefits. This can be achieved by reducing the CPU operating frequency, i.e., by operating the corresponding CPU at a lower frequency, thereby reducing the CPU computing power supply, thereby improving energy efficiency or reducing power consumption. For the landing points in the under-provisioned region, the CPU computing power supply can be increased by increasing the CPU operating frequency, i.e., by operating the corresponding CPU at a higher frequency, thereby shortening the task execution time and ultimately enabling the target task to be completed within the target time. In other embodiments, for the landing points in the under-provisioned region, the CPU load can also be reduced by reducing program logic complexity or improving algorithm efficiency, thereby enabling the target task to be completed within the target time.

[0044] In a possible implementation of the third aspect above, the method also includes: determining a second reference line in the first coordinate system based on the maximum value of the task load that the CPU computing power provided by the electronic device can support for processing, wherein the task load corresponding to the coordinate point on the second reference line and the CPU computing power provided by the electronic device satisfy a second balance condition, wherein the second balance condition is used to control the CPU computing power provided by the electronic device and the maximum load supported for processing by the electronic device to reach a balanced state; determining program optimization strategies for multiple programs based on the positional relationship between the landing points in the first coordinate system and the second reference line of the CPU load analysis results corresponding to multiple programs respectively.

[0045] For example, the second reference line can be the 120Hz maximum load line shown in Figure 7 below. Points to the right of the 120Hz maximum load line, i.e., the aforementioned points, are in the overload zone. At this point, the CPU's operating frequency cannot be increased further, meaning the CPU's computing power cannot be increased further. In this case, the load can be reduced by optimizing the program code, such as reducing program logic complexity or improving algorithm efficiency, ultimately enabling the target task to be completed within the target time.

[0046] In a possible implementation of the third aspect above, the program optimization strategy for multiple programs includes at least one of the following: increasing the operating frequency of one or more CPUs running the first program among the multiple programs; reducing the operating frequency of one or more CPUs running the first program among the multiple programs; reducing the logical complexity of the program code of the first program among the multiple programs; and optimizing the algorithm involved in the first program among the multiple programs.

[0047] In a fourth aspect, the present application provides an electronic device comprising: one or more processors; one or more memories; one or more memories storing one or more programs, wherein when one or more programs are executed by one or more processors, the electronic device executes the performance analysis method provided by the above-mentioned first aspect and various possible implementations of the first aspect, or the performance analysis result application method provided by the above-mentioned third aspect and various possible implementations of the third aspect.

[0048] In a fifth aspect, the present application provides a computer-readable medium having instructions stored thereon, which, when executed on a computer, causes the computer to execute the performance analysis method provided by the first aspect and various possible implementations of the first aspect, or the performance analysis result application method provided by the third aspect and various possible implementations of the third aspect.

[0049] In a sixth aspect, the present application provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the performance analysis method provided by the above-mentioned first aspect and various possible implementations of the first aspect, or the performance analysis result application method provided by the above-mentioned third aspect and various possible implementations of the third aspect.

[0050] The beneficial effects of the second, fourth to sixth aspects mentioned above can be found in the relevant descriptions of the first aspect and its various possible implementations, and the third aspect and its various possible implementations, and will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] FIG1a is a schematic diagram of a performance analysis scenario.

[0052] Figure 1b shows a schematic diagram comparing different ways in which performance analysis tools collect execution information.

[0053] FIG1c is a schematic diagram showing the implementation principle of a performance analysis method provided in an embodiment of the present application.

[0054] FIG2 is a schematic diagram showing the implementation principle of the dynamic instrumentation technology provided in an embodiment of the present application.

[0055] FIG3 is a schematic diagram showing the implementation principle of a static instrumentation technology.

[0056] FIG4 is a schematic diagram showing an implementation flow of a performance analysis method provided in an embodiment of the present application.

[0057] FIG5 shows an example table of computing power parameters corresponding to different types of CPUs at different frequency points provided in an embodiment of the present application.

[0058] FIG6 is a schematic diagram showing an interactive process of a performance analysis method provided in an embodiment of the present application.

[0059] FIG7 shows a schematic diagram of a computing power-load analysis coordinate system established based on performance analysis results according to an embodiment of the present application.

[0060] FIG8 is a schematic diagram showing the software structure of a performance analysis tool provided in an embodiment of the present application.

[0061] FIG9 is a schematic diagram showing the hardware structure of an electronic device 100 provided in an embodiment of the present application.

[0062] FIG10 is a schematic diagram showing the software structure of an operating system of an electronic device 100 provided in an embodiment of the present application. DETAILED DESCRIPTION

[0063] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described in detail below with reference to the accompanying drawings and specific implementation methods.

[0064] It is understood that the electronic devices in the embodiments of the present application may also be referred to as terminals or terminal devices, user equipment (UE), mobile stations (MS), mobile terminals (MT), etc. The terminal devices may be mobile phones, tablet computers (Pads), notebooks, wearable devices, computers with wireless transceiver functions, virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, etc.

[0065] FIG1a shows a schematic diagram of a performance analysis scenario.

[0066] Referring to Figure 1a, the scenario may include a mobile phone 10 and a laptop 20. Mobile phone 10 may have one or more applications installed for performance analysis, hereinafter referred to as target applications. Laptop 20 may run a performance analysis tool, such as an integrated development environment (IDE), without limitation.

[0067] The mobile phone 10 and the notebook 20 may both be electronic devices that use multi-core processing technology. For example, the multi-core processor of the mobile phone 10 may include CPU0, CPU1, CPU2, etc. In other embodiments, the performance analysis method provided in the embodiments of the present application may be applicable to scenarios that include only mobile phones or only computers, or may include terminal devices such as the above-mentioned tablet computers, without limitation.

[0068] As mentioned earlier, developers usually use performance analysis tools to test the performance of the program or the performance of the CPU.

[0069] Continuing with reference to FIG1a, the notebook 20 running the performance analysis tool can perform performance analysis on the target program on the mobile phone 10 and display the performance analysis results 101 as shown in FIG1a. The performance analysis results may include analysis of the function execution status on each CPU, analysis of the CPU operating frequency (frequency, hereinafter referred to as frequency point), analysis of CPU interruption status, and CPU usage rate, etc. Among them, the function execution status on each CPU includes, for example, the functions "audioserver()", "traced_prob()", "com.ss.and()" and so on executed on CPU0. The operating frequency of each CPU includes, for example, the operating frequency of CPU0 at 0.88GHz, the operating frequency of CPU1 at 1.22GHz, and the operating frequency of CPU2 at 3.5GHz, etc. The CPU interruption status includes, for example, the frequency, time, and duration of CPU interruptions during program execution, etc. The above performance analysis results 101 need to rely on the collected multiple pieces of program execution information (hereinafter referred to as execution information).

[0070] As shown in FIG1 b , the current performance analysis tool may collect execution information in two ways: one is method 1 and the other is method 2.

[0071] Among them, method one is tracing. This method records all execution information (or execution data) generated during the execution of a program for a period of time, and then filters out the corresponding execution information of the corresponding time period for performance analysis. As an example, referring to Figure 1b, during a certain execution process of target program A (for example, the i-th execution process), the entire execution information can be tracked and collected using the trace command. Then, based on the traced and collected execution information of the entire process, the execution information 01, execution information 02, execution information 03, etc. required for performance analysis can be filtered, and finally the CPU usage and activity status of each thread during the execution of the application (for example, target program A) can be analyzed. This method can capture all information and events during the entire time period. The advantage is that the collected execution data is relatively accurate, but the disadvantage is that the additional collection overhead introduced by recording all information and events during the collection process is relatively large.

[0072] If developers want to analyze the task load of a target task, they can only use static instrumentation to collect time information of the target task's start and end points, thereby identifying the execution time period of the target task. Among them, static instrumentation refers to modifying the source code during the program compilation phase, that is, pre-embedding the instrumentation code into the target program, and recompiling to generate an instrumentation technology for the target program. As shown in Figure 1c, the instruction stream of the target program before instrumentation can, for example, include instructions 01, instructions 02, instructions 03, instructions 04, instructions 05, and instructions 06, etc. After inserting a section of instrumentation code into the target program using static instrumentation technology, for example, inserting the instrumentation code X1 and instrumentation code X2 shown in Figure 1c, the instruction stream included in the recompiled target program can include instructions 01, instructions 02, instructions 03, instrumentation code X1, instructions 04, instructions 05, instructions 06, and instrumentation code X2, etc. During runtime, the recompiled target program is loaded into the memory space, and then, during the process of the target program code being loaded and executed by the CPU, the stub code therein is executed to collect a certain execution information indicated by the stub code.

[0073] As shown in Figure 1c, if the target task begins execution at instruction 04, when the target program reaches the instrumented code X1, the system time when instruction 03 completes execution can be collected based on the execution result of instrumented code X1 as the target task start time information. If the target task ends when instruction 06 completes execution, when the target program reaches the instrumented code X2, the system time when instruction 06 completes execution can be collected based on the execution result of instrumented code X2 as the target task end time information.

[0074] However, the above-mentioned tracing method based on static instrumentation still has the following disadvantages: First, the data collection points determined by static instrumentation technology are fixed and not flexible enough, which makes it difficult to identify the target segment to be analyzed during the analysis process (unless instrumentation is completed in advance). Second, the execution data collected by static instrumentation tracing are independent of each other and have weak correlation, and redundant information may be collected at the same time, which still needs to be screened, otherwise it cannot be directly used for in-depth performance analysis. Third, static instrumentation will lead to the modification and recompilation of program code, which is a very cumbersome process, and the process requires developers or analysts to have sufficient understanding of the code. Even so, the entire process of tracing based on static instrumentation will take a lot of time and be inefficient.

[0075] Method 2: Sampling. This method collects data information at certain intervals. That is to say, in this method, the multiple execution information collected by electronic devices such as mobile phones 10 through sampling may be obtained during multiple runs of the same target program. Referring to Figure 1b, for example, execution information 01 is collected during the first run of target program A, that is, execution information 01 is collected during one run. Similarly, execution information 02 is collected during the second run of target program A, ..., execution information 03 is collected during the Nth run of target program A, and so on. After collecting execution information through the above-mentioned sampling method, for example, the running time of the function in the target time period, the running time of a function on the CPU, and the waiting time when the function is not running on the CPU can be analyzed.

[0076] The advantage of this sampling approach is that it has a low overhead in obtaining execution information or execution data. However, its disadvantage is that it requires a sufficiently large sample size; otherwise, the results may be inaccurate, and it is often difficult to collect the required multiple execution data points in a single execution.

[0077] In order to solve the above problems, the present application provides a performance analysis method. Specifically, the method collects multiple execution information that can be converted into relevant performance evaluation indicators during one operation of the target program. The multiple execution information may include but is not limited to the target task start time information, end time information, time information corresponding to the state switching moment of each target thread run by the target program, and the state information before and after the switch, time information corresponding to the CPU frequency switching moment, and the frequency information before and after the switch, etc. Furthermore, the method can use the collected execution information to quickly filter out the related execution information within the target time period, and can comprehensively analyze and transform the related execution information that affects the same performance evaluation indicator, so as to obtain more accurate performance analysis results. In other words, the performance analysis method provided by the present application can take into account the low overhead and high efficiency of the execution information collection process, and can improve the accuracy of the performance analysis results.

[0078] For example, referring to method 3 shown in FIG1b , a mobile phone 10 or other electronic device, based on the performance analysis method provided in this application, can collect execution information 01, execution information 02, execution information 03, and so on, during the i-th run of target program A. That is, a mobile phone 10 or other electronic device, based on the performance analysis method provided in this application, can collect multiple pieces of execution information that can be converted into relevant performance evaluation indicators during a single program run. Here, i can be a natural number such as 1, 2, 3, ..., N. Based on this, the notebook 20 or mobile phone 10 can convert the collected execution information 01, execution information 02, execution information 03, etc., into one or more performance evaluation indicators required by the developer.

[0079] The above-mentioned conversion into relevant performance evaluation indicators may, for example, include first comprehensively analyzing at least one calculation interval corresponding to one or more target tasks of the target program based on the above-mentioned time information, and then calculating the CPU load corresponding to the thread running the target task within each calculation interval. This accurately calculates the CPU load corresponding to each target task, and further calculates the comprehensive CPU load of the target program. It is understood that the above-mentioned CPU load can represent the actual amount of CPU resources occupied during the operation of each target program. The CPU load corresponding to one or more target tasks contained in each target program may also be referred to as task load below.

[0080] When calculating the CPU load in each calculation interval, it can be determined by the running time of the target thread in the determined calculation interval and the computing power provided by the CPU running the target thread. Among them, the computing power provided by the CPU can be calculated based on the computing power parameters corresponding to the current operating frequency of the CPU. The computing power parameters may include equivalent computing power, for example. The size of the equivalent computing power can be determined by the current operating frequency of the CPU (i.e., the frequency point) and the type of CPU. The specific calculation method can be referred to the description in the specific embodiment below in combination with the relevant drawings, which will not be repeated here.

[0081] It can be understood that among the multiple execution information collected during the operation of a program, part of it can be execution information related to the process or thread running the system, such as the time information corresponding to the state switching moment of each target thread and the state information before and after the switching; the other part can be execution information related to the operation information of the CPU, such as the time information corresponding to the CPU frequency switching moment and the frequency information before and after the switching. The above different execution information can be replaced with a jump instruction at the designated insertion point during the operation of the target program, triggering a jump to the corresponding insertion code execution and completing information collection. For example, during the operation of the above target program, the CPU of the electronic device can execute the jump instruction added in the relevant application code / kernel code to jump to the corresponding insertion code, execute and collect the time information corresponding to the state switching moment of each target thread and the state information before and after the switching. For another example, during the operation of the above target program, the CPU of the electronic device can also execute the jump instruction added in the target program to jump to the corresponding insertion code, execute and collect the start time information, end time information, etc. of the target task.

[0082] In an embodiment of the present application, the jump instruction may include a jump instruction or a trap instruction. The jump instruction can trigger a jump to a specified plug-in code execution and is generally used for jumps within the same memory space. No register switching occurs and no scene saving is required. The trap instruction is used for switching between different memory spaces, such as jumping from user mode to kernel mode. It is necessary to save the scene (such as various registers and status information) before jumping and restore the scene upon return.

[0083] It can be understood that the above-mentioned designated insertion points can be, for example, insertion positions pre-set by the developer through the performance analysis tool before the target program is run according to actual analysis needs. Among them, the pre-set method can, for example, find the code address or function name of the program insertion point according to the binary file of the program when the electronic device runs the performance analysis tool, such as the instruction address or function name corresponding to the task start point and the task end point. In this way, when the electronic device loads and runs the target program through the performance analysis tool, it can identify the corresponding insertion position based on the corresponding instruction address or function name, that is, identify the designated insertion point, and then replace the instruction of the designated insertion point with a jump instruction to trigger the jump execution of the insertion code. In some embodiments, the above-mentioned tracing method of adding a jump instruction to trigger the execution of the insertion code during the program running process can also be referred to as a tracing method based on dynamic insertion or a method of implementing tracing based on dynamic insertion.

[0084] As shown in Figure 2, the instruction stream of the target program before instrumentation may include, for example, instruction 01, instruction 02, instruction 03, instruction 04, instruction 05, and instruction 06, etc. in sequence. The present application implements the process of tracing based on dynamic instrumentation. It may be that after the code file (such as an executable binary file, etc.) corresponding to the target program is loaded into the corresponding memory space, the performance analysis tool running on the corresponding electronic device can load the code file to prepare to run the target program or start running the target program, based on the instrumentation point in the target program indicated by the technician, that is, the specified instrumentation point. The specified instrumentation point may be an instruction before the target task starts executing, such as instruction 03. Then, during the operation of the target program, the electronic device may replace the instruction at the instrumentation point with a jump instruction. The jump instruction, for example, includes the jump instruction X1 and the jump instruction X2 shown in Figure 2. The instrumentation point corresponding to the replacement of the jump instruction X1 may be an instruction before the task starting point of the target task, such as instruction 03, and the instruction at the task starting point may be, for example, instruction 04 shown in Figure 2. The jump instruction X1 corresponds to the jump execution of the stub code X1, which can trigger the collection of the system time corresponding to the task starting point as the target task starting time information.

[0085] Similarly, the insertion point replaced by the jump instruction X2 can be the instruction after the target task's task end point, such as instruction 06, where the task end point instruction can be, for example, instruction 05 shown in Figure 2. The jump instruction X2 corresponding to the jump execution of the insertion code X2 can trigger the collection of the system time corresponding to the task end point as the target task end time information.

[0086] It can be understood that the stub code and the instruction stream of the target program can be executed serially. In the process of jumping to the execution of the stub code, the instructions before the corresponding stub point can be saved to the corresponding memory space before execution. Then, after the stub code is executed, the corresponding CPU can load the instructions saved before the stub point to continue execution, and continue to execute the instruction and other subsequent instructions. For example, with reference to Figure 2, the corresponding CPU of the electronic device can save instruction 03 first when the target program executes to the corresponding jump instruction, and after the execution of the stub code X1 that is triggered by the jump instruction is completed, the corresponding CPU can then execute the saved instruction 03, and then continue to execute instructions 04, instruction 05, etc. Similarly, the corresponding CPU can save instruction 06 to the memory space first when the target program executes to the corresponding jump instruction, and after the execution of the stub code X1 that is triggered by the jump instruction is completed, the corresponding CPU can then execute the saved instruction 06 and other subsequent instructions.

[0087] That is to say, based on the performance analysis method provided in this application, the execution order of the code instruction flow after dynamic instrumentation shown in Figure 2 can be: execute instruction 01 → execute instruction 02 → execute jump instruction X1 (save instruction 03 at this time) → jump and execute instrumented code X1 → execute saved instruction 03 → execute instruction 04 → execute instruction 05 → execute jump instruction X2 (save instruction 06 at this time) → jump and execute instrumented code X2 → execute saved instruction 06.

[0088] It can be understood that the performance analysis method provided by this application collects execution information based on the above-mentioned dynamic instrumentation tracking method, which has the following advantages compared to the above-mentioned tracking method based on static instrumentation: First, it has better flexibility. The above-mentioned tracking based on dynamic instrumentation can easily insert pile points and collect the required execution information. Second, the above-mentioned tracking based on dynamic instrumentation can support custom instrumentation code, so it is possible to obtain other dimensional information at any time during the collection process, such as checking which thread is undergoing state switching during the state switching process. The process can only focus on the collection thread, so in the process of collecting execution information of various dimensions, information screening can be completed, and the final collection results of the execution data are concentrated and accurate, and there is less redundant data. Third, the above-mentioned dynamic instrumentation does not require modification of the target program code, so it will not affect the original program. Developers or analysts do not need to understand too much about the code details to implement instrumentation, and the development cost is low.

[0089] It can be understood that if multiple target tasks need to be executed during the running of the target program, the corresponding designated insertion points can be replaced with jump instructions at the task start point and task end point of each target task, so as to trigger the jump to the corresponding insertion code to collect the start time information and end time information of each task.

[0090] At the same time, during the operation of the target program illustrated in FIG2 , the performance analysis tool for the system operation of the electronic device can also detect whether the jump instruction inserted in the relevant application code / kernel code enables dynamic insertion jump, or whether the conditions for executing the content of dynamic insertion (such as the insertion code) are met. Furthermore, when the execution conditions are met, the electronic device can trigger a jump to the corresponding insertion code (such as the insertion code X1 shown in FIG2 ) when executing the target program to the jump instruction (such as the jump instruction X1 shown in FIG2 ), which is not limited here.

[0091] In summary, based on the dynamic instrumentation method shown in the example of Figure 2 above, the electronic device can collect the start time information and end time information of one or more target tasks of the target program. Similarly, the electronic device can also adopt the dynamic instrumentation method shown in Figure 2 above to collect the time information corresponding to the moment when the active state of the target thread where the target program is located switches, and the time information corresponding to the moment when the CPU operating frequency of the target thread running in the electronic device changes. Based on the collection of the above-mentioned time information achieved by the dynamic instrumentation method, as well as the collection of the target thread status information and the CPU frequency information described below, the electronic device can further complete the analysis of performance indicators such as CPU load, and then realize the performance analysis of the target program or the CPU and other hardware devices of the electronic device.

[0092] Specifically, as shown in reference Figure 3, during the running of the above-mentioned target program, when the activity state of the target thread running the target program switches, the system of the electronic device can jump to execute the corresponding stub code based on the jump instruction added to the application code / kernel code that monitors the activity state of the target thread, and then collect the system time corresponding to the switching moment as the time information corresponding to the state switching moment, and record the activity state of the target thread before and after the switch at this moment as the collected state information.

[0093] It can be understood that the target task shown in Figure 3 can be any one of the one or more tasks executed in the target program, and the developer can set the task start point and task end point of the target task as the designated insertion point through the performance analysis tool. Among them, the target task starts running from the task start point and ends running at the task end point. The time period between the end time information corresponding to the above-mentioned task end point and the start time information corresponding to the task start point is the "target task execution interval" shown in Figure 3. Before the arrival of the task start point of the target task, that is, before the execution of the target task, the target thread can be in a running state (running) executing other tasks, or it can be in a sleeping state or an unsleeping state entered after the execution of the task is completed. In addition, when the target thread is in a dormant state, the CPU of the electronic device may also switch to a higher operating frequency due to the threads running other programs.

[0094] As shown in FIG3 , the state switching moments correspond to the target thread activity states being switched, and may include, for example, switching from the running state to the sleeping state, switching from the sleeping state to the runnable state, and switching from the runnable state to the running state. Correspondingly, the state switching moments collected by the system may include, for example, state switching moments ①, ②, ③, and ④ shown in FIG3 .

[0095] Continuing to refer to FIG3 , the system of the electronic device can, during the operation of the above-mentioned target program, when the CPU frequency of the target thread running changes (also known as the frequency switching moment), based on the jump instruction, jump to execute the corresponding plug-in code, collect the system time corresponding to the switching moment as the time information corresponding to the frequency switching moment, and record the frequency of the CPU working before and after the switching at this moment as the collected frequency information. Referring to FIG3 , the time information corresponding to the above-mentioned frequency switching moment collected can include the time information corresponding to the CPU frequency switching moment ①, the time information corresponding to the CPU frequency switching moment ②, the time information corresponding to the CPU frequency switching moment ③, the time information corresponding to the CPU frequency switching moment ④, the time information corresponding to the frequency switching moment ⑤, and the time information corresponding to the frequency switching moment ⑥, etc. Correspondingly, the frequency information collected at each frequency switching moment can include 0.88GHz, 0.96GHz, 1.03GHz, 1.13GHz, and 1.22GHz, etc., as exemplified in FIG3 .

[0096] Based on the program execution information collected above, the performance analysis tool run by the electronic device can first determine one or more calculation intervals for calculating evaluation indicators such as CPU load, and then accurately calculate the total task load during the execution of the target program, i.e., the CPU load, based on the length of time the target thread is in the running state within each calculation interval. Based on the performance analysis method provided by this application, the electronic device can also calculate other performance evaluation indicators, such as CPU running time, CPU usage, and one or more of the execution information of related functions in the target program, which are not limited here.

[0097] As shown in FIG3 , the multiple computation intervals during the execution of the target program can be determined based on a combination of time information related to the start and end points of the target task during the target program's lifecycle, time information corresponding to the moment when the activity state of each target thread running the target program changes (i.e., the aforementioned state switching moment), and time information corresponding to the moment when the CPU frequency switches. For example, one or more computation intervals for each target task can be determined based on the result of an intersection operation on the time periods corresponding to the aforementioned time information.

[0098] Therefore, the performance analysis method provided by this application, based on the multiple time information related to the target task collected by the above-mentioned dynamic instrumentation tracking method, can more accurately identify the time period of the target task execution and more accurately determine the effective calculation interval for calculating the target task load. Based on this, the performance analysis results obtained by the performance analysis method provided by this application can also be more accurate.

[0099] Referring to Figure 3, for example, based on the results of the time period intersection calculation corresponding to each of the aforementioned time information, it can be determined that the starting time of calculation interval 01 can be the starting time information corresponding to the task start point, and the end time can be the time information corresponding to the CPU frequency switching moment ①. For another example, based on the results of the time period intersection calculation corresponding to each of the aforementioned time information, it can be determined that the starting time of calculation interval 02 can be the time information corresponding to the CPU frequency switching moment ①, and the end time can be the time information corresponding to the CPU frequency switching moment ②. For another example, it can also be determined that the starting time of calculation interval 03 can be the time information corresponding to the CPU frequency switching moment ②, and the end time can be the time information corresponding to the state switching moment ① of the corresponding target thread. It can also be determined that the starting time of calculation interval 04 can be the time information corresponding to the CPU frequency switching moment ③, and the end time can be the time information corresponding to the CPU frequency switching moment ④. It can also be determined that the starting time of calculation interval 05 can be the time information corresponding to the CPU frequency switching moment ④, and the end time can be the time information corresponding to the state switching moment ③. For another example, based on the results of the time period intersection operation corresponding to the above-mentioned time information, it can also be determined that the starting time of the calculation interval 06 can be the time information corresponding to the CPU frequency switching moment ⑤, and the end time can be the end time information corresponding to the task end point in the target program life cycle.

[0100] In some embodiments, the above intersection operation may also be participated in based on some state switching moments of the target thread. For example, the state switching moment corresponding to the switching from the sleep state to the run-ready state may not participate in the above intersection operation, that is, it may not be used as the start time or end time of any of the above calculation intervals. Therefore, the end time of the calculation interval 05 shown in Figure 3 can be determined based on the time information corresponding to the state switching moment ③ when the run-ready state switches to the running state, and there is no limitation here. In addition, the calculation interval 05 and the calculation interval 06 shown in Figure 3 can also include a calculation interval X, and the starting time of the calculation interval X can be the time information corresponding to the state switching moment ③, and the end time can be the time information corresponding to the frequency switching moment ⑤.

[0101] Continuing with reference to FIG3 , the target program may include one or more target tasks, and each target task may determine one or more calculation intervals based on the performance analysis method provided in this application. The state of any target thread within each calculation interval may include a running state, a sleeping state, or a runnable state. When calculating the CPU load of the target task, the following formula (1) may be used to complete the calculation:

[0102] Among them, "task load" represents the total CPU load corresponding to each target task executed on the CPU; "number of calculation intervals" represents the number of calculation intervals determined based on the performance analysis method provided in this application within the execution interval of the target task, and this number can be a natural number; "running time" represents the length of time that any target thread is in the running state within each calculation interval; "equivalent computing power" represents the value of the equivalent computing power corresponding to the CPU frequency point of the running target task within each calculation interval, that is, the size of the equivalent computing power.

[0103] For the example shown in FIG3 , the above-mentioned running time can be the cumulative value of the time period of the calculation interval when the target thread is in the running state. The task load calculation result corresponding to the above formula (1) can be:

[0104] Task load = duration of computing interval 01 × equivalent computing power 01 + duration of computing interval 02 × equivalent computing power 02 + duration of computing interval 03 × equivalent computing power 03 + (computing interval X) × (equivalent computing power X) + computing interval 06 × equivalent computing power 06.

[0105] Among them, equivalent computing power 01, equivalent computing power 02, equivalent computing power 03, equivalent computing power X, and equivalent computing power 06 are the equivalent computing power values ​​corresponding to the CPU operating at the corresponding frequency points within the corresponding computing range.

[0106] It can be understood that in an electronic device that implements the performance analysis method provided in the present application, the equivalent computing power values ​​corresponding to CPUs of various types and frequencies can be pre-stored. Referring to the example shown in FIG3 , for the same type of CPU, such as a small-core CPU (E-Core), the value of the equivalent computing power corresponding to a frequency of 0.88 GHz can be 152; the value of the equivalent computing power corresponding to a frequency of 0.96 GHz can be 190; the value of the equivalent computing power corresponding to a frequency of 1.03 GHz can be 223; the value of the equivalent computing power corresponding to a frequency of 1.13 GHz can be 250; and the value of the equivalent computing power corresponding to a frequency of 1.22 GHz can be 303. The above-mentioned equivalent computing power 01, equivalent computing power 02, equivalent computing power 03, equivalent computing power X, and equivalent computing power 06 can be the values ​​of any of the equivalent computing powers in the above examples or other corresponding equivalent computing power values, and are not limited or elaborated upon herein.

[0107] Therefore, based on the above formula (1), the electronic device can calculate the task load corresponding to each target task, and then accurately calculate the performance indicators such as the CPU load required for the execution of the target program. The CPU load can be used to measure the performance of the target program, thereby guiding the direction and process of optimizing the performance of the target program. The CPU load can also be used to measure the performance of each CPU running the target program, thereby guiding the electronic device to optimize the balance between CPU computing power and device power consumption by adjusting the CPU operating frequency.

[0108] In other embodiments, the target program may also run on a virtual machine, and performance analysis tools such as the IDE may also run on a server or other electronic devices with one or more processors, without limitation herein.

[0109] In summary, the performance analysis method provided by this application is based on dynamic instrumentation and does not invade the code of the target program, nor does it require the code of the target program to be recompiled or modified. In this way, the above-mentioned method of obtaining multiple execution information of the target program during its operation based on dynamic instrumentation can greatly improve the applicability and flexibility of the performance analysis method. It can be applied to scenarios where the target program under development or completed development is optimized through performance analysis of business code, and can also be applied to performance analysis scenarios of CPUs of various types and operating frequencies.

[0110] The specific implementation process of the performance analysis method provided in this application is described in detail below with reference to specific embodiments and drawings.

[0111] The specific implementation process of the performance analysis method provided by the present application on a single electronic device will be described in detail below in conjunction with Example 1.

[0112] Example 1

[0113] The performance analysis method provided in the embodiment of the present application can be applied to scenarios where electronic devices such as mobile phones 10 and notebooks 20 are independently implemented.

[0114] FIG4 is a schematic diagram illustrating an implementation process of a performance analysis method according to an embodiment of the present application. It is understood that the execution entity of each step in the implementation process can be the mobile phone 10 or laptop 20 in the performance analysis scenario shown in FIG1a above, or other terminal devices such as a tablet computer in other embodiments.

[0115] As shown in Figure 4, the implementation process may include the following steps:

[0116] 401: In response to a user operation to run a target program, the target program is run.

[0117] For example, a developer can operate the target program on the interface of a performance analysis tool running on mobile phone 10 or laptop 20. Correspondingly, mobile phone 10 or laptop 20 can run the target program in response to the user operation. The developer can be the user of the performance analysis tool running on mobile phone 10 or laptop 20. This interface can refer to the performance analysis interface displayed on laptop 20 in the scenario shown in FIG. 1a above.

[0118] It is understood that the performance analysis tool interface displayed on the mobile phone 10 may be an interface style adapted to the screen size of the mobile phone 10. In other embodiments, the performance analysis tool interface displayed on the notebook 20 may also be different from the interface style illustrated in FIG. 1a , which is not limited here.

[0119] 402: Replace the specified insertion point in the target program with a jump instruction for insertion.

[0120] For example, the target program can be any application installed on the mobile phone 10, or any software program installed on the notebook 20, or a test program deployed and installed by a developer on the mobile phone 10 or notebook 20, without limitation. The designated insertion point in the target program can be the location designated by the developer after the target program to be analyzed is loaded into memory by inputting the instruction address or function name corresponding to the insertion point, i.e., the designated insertion point. It will be understood that the insertion point is typically a location designed by the developer in the target program to be replaced with a jump instruction based on actual performance analysis requirements. The developer can design the insertion point by inputting the instruction address or function name corresponding to the designated insertion point into a performance analysis tool running on the electronic device. The jump instruction, such as a jump instruction, that replaces the designated insertion point can be an instruction that does not affect the code integrity of the target program. The jump instruction can trigger a jump to a designated program or code. After the program or code to be jumped to complete execution, the target program code can jump back to the target program code following the jump instruction to continue execution.

[0121] In some embodiments, the mobile phone 10 or laptop 20 can analyze the performance of its own CPU device by running the target program. For example, for a terminal device such as a multi-core mobile phone 10 or laptop 20, the load capacity, computing power, code execution capability, or fault self-recovery capability of each core type of CPU included in the terminal device can be analyzed. In other embodiments, the mobile phone 10 or laptop 20 can analyze the code performance of the target program by running the program. The performance analysis results can be used to guide developers to optimize the code of the target program, that is, to perform program code tuning.

[0122] It can be understood that the implementation principle of the above-mentioned replacement of the designated insertion point with a jump instruction for insertion can refer to the implementation principle of the dynamic insertion technology illustrated in FIG. 2 .

[0123] 403: Execute to the jump instruction, jump to the stub program indicated by the instruction and continue running.

[0124] For example, when the target program code is executed on each CPU of the mobile phone 10 or the notebook 20, when the CPU executes a jump instruction, it can trigger a jump to a specified program to continue executing the program content, such as jumping to an instrumented program to continue executing the instrumented content. The instrumented program can be, for example, the instrumented code X1 or the instrumented code X2 shown in Figure 2 above.

[0125] It is understood that after the jump instruction indicates that the program is executed, it can trigger a jump back to the next code of the target program to continue execution. In this way, the code of the target program can maintain its integrity and the code execution process of the target program can also be unaffected by the stub code.

[0126] 404: During the execution of the instrumentation program, multiple execution information items are collected and correlated.

[0127] Exemplarily, the instrumentation content of the above-mentioned instrumentation program may include collection instructions or collection functions for multiple execution information, such as hook functions, etc. Based on the collection instructions or collection functions in the instrumentation program, the mobile phone 10 or the notebook 20 can synchronously collect multiple execution information during the code running process of the target program. In an embodiment of the present application, the multiple execution information may include the start time information of the target task, the end time information, the time information corresponding to the state switching moment of each target thread run by the target program, and the state information before and after the switching, the time information corresponding to the CPU frequency switching moment, and the frequency information before and after the switching, etc. In other embodiments, the multiple execution information may also include other information that can affect the level or size of the evaluation indicators of the final analysis, which is not limited here.

[0128] It is understandable that since the above-mentioned multiple execution information are collected based on the same execution process, the collection conditions of each information, such as the execution time of each target task of the target program, the execution time of the target program on each thread, the change of activity status, etc., are all consistent. Therefore, there is a correlation between the multiple execution information collected during the same operation process. Comprehensive calculation based on the collected multiple execution information can improve the accuracy of the calculation results. The specific calculation process can be referred to the description in the relevant steps below and will not be repeated here.

[0129] 405 : Determine at least one calculation interval corresponding to each target task based on the multiple pieces of time information in the multiple pieces of execution information.

[0130] Exemplarily, the mobile phone 10 or notebook 20 can comprehensively determine at least one calculation interval corresponding to the target task based on multiple time information such as the start time information and end time information of the target task, the time information corresponding to the state switching moment of the target thread, and the time information of the CPU frequency switching moment.

[0131] Referring to Figure 3 above, based on the intersection of the target task execution interval in the target program life cycle, the state switching time corresponding to the activity state change on the target thread, and the frequency switching time when the relevant CPU frequency changes, multiple calculation intervals such as calculation interval 01, calculation interval 02, calculation interval 03, calculation interval 04, calculation interval 05, and calculation interval 06 corresponding to the target task execution process can be determined. Among them, the calculation interval 01 can be a time period calculated based on the starting time information corresponding to the task starting point and the time information corresponding to the CPU frequency switching moment ①; the calculation interval 02 can be a time period calculated based on the time information corresponding to the CPU frequency switching moment ① and the time information corresponding to the CPU frequency switching moment ②; the calculation interval 03 can be a time period calculated based on the time information corresponding to the CPU frequency switching moment ② and the time information corresponding to the state switching moment ①; the calculation interval 04 can be a time period calculated based on the time information corresponding to the CPU frequency switching moment ③ and the time information corresponding to the frequency switching moment ④; the calculation interval 05 can be a time period calculated based on the time information corresponding to the CPU frequency switching moment ④ and the time information corresponding to the state switching moment ③; the calculation interval 06 can be a time period calculated based on the time information corresponding to the CPU frequency switching moment ⑤ and the end time information corresponding to the task end point, which will not be repeated here.

[0132] It is understood that one or more target tasks may be executed during the execution of the target program. The at least one calculation interval corresponding to each target task may be determined using the above-mentioned method, which will not be described in detail here.

[0133] 406: Obtain the frequency information of the CPU operation corresponding to each calculation interval and the activity state of the target thread in the multiple execution information.

[0134] Exemplarily, the multiple pieces of execution information collected during the execution of a target program also include the activity state of the target thread before and after the state switch, such as the running state, the sleeping state, and the runnable state. When the target thread is in the running state, it needs to occupy CPU resources to generate CPU load. In other embodiments, when the target thread is in the runnable state, it may also need to occupy CPU resources to generate CPU load. Therefore, when subsequently calculating the CPU load, the performance analysis tool running on the mobile phone 10 or the notebook 20 can obtain the activity state of the target thread in each calculation interval, and then filter out the duration of the running state, or filter out the duration of the running state and the runnable state.

[0135] In addition, the multiple execution information also includes the frequency of the CPU operation in each calculation interval, that is, frequency information. At this time, the performance analysis tool running on the mobile phone 10 or notebook 20 can obtain this part of the frequency information.

[0136] 407: Convert the CPU operating frequency information in each calculation interval into an equivalent CPU computing power parameter.

[0137] Exemplarily, the above-mentioned CPU computing power parameters may include equivalent computing power. Referring to the matching relationship table between the frequency of CPU operation and the equivalent computing power as illustrated in FIG3 above, that is, the "CPU computing power table" shown in FIG3, the above-mentioned CPU frequency information obtained can be converted into the value of equivalent computing power. For example, when the frequency information is 0.88GHz, the corresponding equivalent computing power value is 152; when the frequency information is 0.96GHz, the corresponding equivalent computing power value is 190; when the frequency information is 1.03GHz, the corresponding equivalent computing power value is 223; when the frequency information is 1.13GHz, the corresponding equivalent computing power value is 250; when the frequency information is 1.22GHz, the corresponding equivalent computing power value can be 303, etc.

[0138] It is understood that the "computing power table" shown in Figure 3 can be a matching relationship between the frequency information and equivalent computing power corresponding to the same type of CPU, for example, the matching relationship between the different frequencies and the corresponding equivalent computing power of small-core CPUs. Based on this matching relationship, it can be seen that for the same type of CPU, the higher the operating frequency, that is, the higher the CPU frequency, the higher the corresponding equivalent computing power value, that is, the greater the equivalent computing power.

[0139] The matching relationship between the frequency point information and equivalent computing power corresponding to different types of CPUs can be referred to as shown in Figure 5. When different types of CPUs operate at the same frequency point, the corresponding equivalent computing power may be different. For example, the equivalent computing power value corresponding to the small-core CPU shown in Figure 5 operating at 0.88GHz is 152, while the equivalent computing power value corresponding to the medium-core CPU operating at 0.88GHz can be 331. For another example, the equivalent computing power value corresponding to the small-core CPU shown in Figure 5 operating at 0.96GHz is 190, while the equivalent computing power value corresponding to the medium-core CPU operating at 0.96GHz can be 437. For another example, the equivalent computing power value corresponding to the medium-core CPU operating at 2.00GHz is 1564, while the equivalent computing power corresponding to the large-core CPU operating at 2.00GHz can be 1613. The examples are not enumerated here. Among them, the computing power table shown in Figure 5 can be the matching relationship between the frequency points and equivalent computing power of different types of CPUs preset in the mobile phone 10 or notebook 20, which is not limited here.

[0140] 408: Calculate the CPU load corresponding to each target task based on the running time of each computing interval in which the target thread is in the running state and the CPU computing power parameter of the corresponding computing interval.

[0141] For example, the performance analysis tool running on the mobile phone 10 or the notebook 20 can first determine the time period of each calculation interval and the time period corresponding to the target thread being in the running state, and determine the running time of each calculation interval. Then, according to the above formula (1), the running time of each calculation interval obtained above and the equivalent computing power of the CPU working in the corresponding calculation interval are substituted into the formula (1) for calculation, and finally the CPU load corresponding to the corresponding target task can be calculated.

[0142] It can be understood that the CPU load corresponding to each target task obtained by the above calculation can also be described as the task load of the target task in other embodiments, which represents the amount of CPU resources actually consumed during the operation of the target task.

[0143] 409: Calculate the CPU load corresponding to the target program by integrating the CPU loads of the target tasks.

[0144] As mentioned above, the target program may include one or more target tasks. Exemplarily, when the target program includes one target task, the CPU load of the target task obtained by the above calculation is the CPU load of the target program. When the target program includes multiple target tasks, the sum of the CPU loads of the multiple target tasks obtained by the above calculation can be used as the CPU load of the target program. It can be understood that the CPU load of the target program obtained by the above calculation can also be described as the task load of the target program in other embodiments, which characterizes the amount of CPU resources actually consumed during the operation of the target program.

[0145] It is understood that the CPU load of the target task and / or the CPU load corresponding to the target program calculated above can be presented as the performance analysis result on the performance analysis interface. The specific form of presenting the performance analysis result will be described below in conjunction with the relevant drawings and will not be repeated here.

[0146] Based on the execution process of the above steps 401 to 409, the performance analysis method provided in the present application can realize the synchronous collection of multiple execution information required for performance analysis during one operation of the target program, and when performing performance analysis based on the collected multiple execution information, it can integrate multiple time information to accurately analyze the various calculation intervals that consume CPU resources, and then accurately calculate the task load of the target task and / or the task load of the target program, thereby improving the accuracy of the performance analysis results.

[0147] It can be understood that in other embodiments, the mobile phone 10 or notebook 20 executes the performance analysis method provided in this application, and can also analyze other evaluation indicators based on multiple execution information collected during one operation of the target program to analyze the performance of the target program or the CPU performance of electronic devices such as the mobile phone 10, etc., without limitation here.

[0148] Example 2

[0149] The performance analysis method provided in the embodiment of the present application can be applied to scenarios where a mobile phone 10 interacts with a notebook 20 or other electronic devices.

[0150] Figure 6 shows a schematic diagram of an interactive process of a performance analysis method according to an embodiment of the present application. It is understood that the execution entities involved in each step of the interactive process may include the mobile phone 10 and notebook 20 in the scenario shown in Figure 1a above, and in other embodiments, other terminal devices such as a tablet computer may also be involved.

[0151] As shown in Figure 6, the implementation process may include the following steps:

[0152] 601: Notebook 20 runs a performance analysis tool.

[0153] For example, the notebook 20 may execute the performance analysis tool in response to the developer's instruction to execute the performance analysis tool, and display a performance analysis interface. The performance analysis interface may refer to the interface where the performance analysis result 101 is located in the scenario shown in FIG1a above, and will not be described in detail here.

[0154] 602: The notebook 20 sends a communication connection request based on the performance analysis tool.

[0155] Exemplarily, the developer can operate the performance analysis interface displayed on the notebook 20 to connect the electronic device where the target program to be analyzed is installed, such as the mobile phone 10. Prior to this, it can be understood that a wireless communication connection can be established in advance between the mobile phone 10 and the notebook 20, such as a communication connection established based on wireless communication methods such as Bluetooth (BT), wireless fidelity (Wi-Fi) or a distributed soft bus. In other implementation scenarios, the target program to be analyzed can be an application program suitable for an operating system of an electronic device such as a mobile phone. The developer can pre-connect the mobile phone 10 to the notebook 20 via a cable, which can be, for example, a communication cable with an interface type such as a universal serial bus (USB) or a high-definition multimedia interface (HDMI). This is not limited here.

[0156] 603 : The notebook 20 detects a user operation instructing to run a target program.

[0157] For example, a developer can click a run control on the performance analysis interface displayed on the notebook 20 to instruct the target program to run. At this time, the notebook 20 can detect the user operation instructing the target program to run, and can respond to the developer's operation, that is, respond to the user operation, and continue to execute the following step 604 to send the run instruction.

[0158] 604 : The notebook 20 sends a running instruction and an inserting instruction corresponding to the target program to the mobile phone 10 .

[0159] Exemplarily, the run instruction is used to instruct the mobile phone 10 to run the target program. The instrumentation instruction can be used to instruct the mobile phone 10 to replace a specified instrumentation point with a jump instruction during the execution of the target program. The instrumentation instruction may include information describing the specified instrumentation point, or instrumentation location, in the target program code file, as well as an instrumentation program for adding a jump instruction to the running target program and executing the jump instruction. The instrumentation program may be, for example, the instrumentation code X1 or the instrumentation code X2 illustrated in FIG. 2 , and further description thereof is omitted.

[0160] 605: The mobile phone 10 executes the target program in response to the execution instruction.

[0161] 606 : In response to the insertion instruction, the mobile phone 10 replaces the specified insertion point in the target program with a jump instruction to perform insertion.

[0162] The specific execution process of replacing the designated insertion point with a jump instruction for insertion can be referred to the relevant description of step 402 in the above embodiment 1, which will not be repeated here.

[0163] 607: The mobile phone 10 runs to a jump instruction, jumps to the stub program indicated by the instruction and continues to run.

[0164] The specific execution process of jumping to run the instrumented program based on the jump instruction can refer to the relevant description of step 403 in the above embodiment 1, which will not be repeated here.

[0165] 608: When running the instrumentation program, the mobile phone 10 collects multiple pieces of execution information in a correlated manner.

[0166] Exemplarily, the multiple execution information may include the start time information and end time information of the target task, the time information corresponding to the state switching moment of each target thread run by the target program and the state information before and after the switching, the time information corresponding to the CPU frequency switching moment and the frequency information before and after the switching, etc.

[0167] For the specific execution process of associating and collecting multiple pieces of execution information, reference may be made to the relevant description of step 404 in the above embodiment 1, which will not be elaborated here.

[0168] It is understood that, while collecting multiple pieces of execution information, mobile phone 10 may save the execution information in real time, for example, in the memory space allocated by the system for the target program. After completing the collection, step 609 may be executed to send the collected multiple pieces of execution information to notebook computer 20. In other embodiments, mobile phone 10 may also send the multiple pieces of execution information collected during the execution of the target program to notebook computer 20 in real time, without limitation.

[0169] 609 : The mobile phone 10 sends the collected multiple pieces of execution information to the notebook 20 .

[0170] For example, after completing the information collection, the mobile phone 10 can send the collected multiple execution information to the notebook 20.

[0171] 610: The notebook 20 saves the received multiple pieces of execution information into the memory space.

[0172] For example, the memory space may be storage space allocated by the system of the notebook 20 for the performance analysis tool. The memory space may be used to store a target program to be analyzed, or a target program used to perform performance analysis on the CPU of an electronic device such as the notebook 20. In an embodiment of the present application, the memory space may be used to store multiple pieces of execution information collected by the mobile phone 10.

[0173] As mentioned above, the above-mentioned multiple pieces of execution information are program execution information collected synchronously during the process of the mobile phone 10 running the target program.

[0174] 611 : The notebook 20 determines at least one computing interval corresponding to each target task based on the multiple pieces of time information in the multiple pieces of execution information.

[0175] 612: The notebook 20 obtains the frequency information of the CPU operation corresponding to each calculation interval and the activity state of the target thread from the multiple pieces of execution information.

[0176] 613: The notebook 20 converts the CPU frequency information of each computing interval into an equivalent CPU computing power parameter.

[0177] 614 : The notebook 20 calculates the CPU load corresponding to each target task based on the running time of each computing interval in which the target thread is in the running state and the CPU computing power parameter of the corresponding computing interval.

[0178] 615: The notebook 20 integrates the CPU loads of the target tasks and calculates the CPU load corresponding to the target program.

[0179] The specific execution process of the above steps 611 to 615 can refer to the relevant descriptions of steps 406 to 409 in the above embodiment 1, and will not be repeated here.

[0180] It can be understood that in the application scenario where two or more devices interactively implement the performance analysis method provided in this application, the electronic device running the target program (such as mobile phone 10, etc.) can be responsible for collecting multiple program execution information during one operation of the target program to be used as the original data for performance analysis. Among them, there may be a correlation in time or content between the various execution information. Another electronic device running the performance analysis tool (such as notebook 20, etc.) can comprehensively analyze and obtain performance analysis results based on the various execution information with correlation, such as the CPU load or task load of the above-mentioned target program. In this way, the accuracy of the performance analysis results can be improved.

[0181] In addition, the present application is based on the performance analysis method provided in the above-mentioned embodiments 1 and 2. By replacing the designated insertion points with jump instructions during the operation of the target program and realizing the process of collecting execution information, this dynamic insertion method can effectively improve the applicability flexibility of the performance analysis method provided by the present application. For example, this method can not only be applied to the target program under development to optimize the code through performance analysis, but can also be applied to the released target program to perform performance analysis testing to guide subsequent program optimization strategies, etc. For each CPU in the electronic device, the performance analysis method provided by the present application can also support CPUs of various core types to perform performance analysis such as computing power or load capacity. Moreover, the relevant performance analysis results can guide the system of the electronic device to perform load regulation during the process of the CPU of the electronic device running the target program. For details, please refer to the exemplary description in conjunction with the relevant drawings below, which will not be repeated here.

[0182] FIG7 shows a schematic diagram of a computing power-load analysis coordinate system established based on performance analysis results according to the present application.

[0183] For example, consider a scenario where an electronic device executes multiple interface display tasks while running multiple target programs. For example, if the frame rate of the electronic device is 120 Hz, meaning that 120 frames of interface images can be refreshed per second, in other words, the electronic device can complete the drawing, rendering, and display of one frame of interface image in 8.3 ms. The one or more target programs may be one or more applications or software programs currently running on the electronic device, such as multiple applications running on a mobile phone 10 or multiple software programs running on a laptop 20.

[0184] Referring to Figure 7, the horizontal axis of the computing power-load analysis coordinate system represents the load, i.e., the load consumed by the interface display tasks of each target program currently executed by the electronic device. This load can be the CPU load or task load value of one or more target programs calculated based on the performance analysis method provided in this application.

[0185] Continuing to refer to Figure 7, the vertical coordinate of the computing power-load analysis coordinate is the average computing power, that is, the ratio between the load consumed by the interface display tasks of each target program currently executed by the electronic device and the running time of the relevant task thread. The running time can refer to the sum of the time periods when each target thread is in the running state as shown in Figure 2 above. The average computing power can be obtained, for example, by "the sum of the CPU loads corresponding to each interface display task calculated by the performance analysis method of the electronic device implementing the present application / the running time obtained by adding the time periods when each target thread is in the running state".

[0186] It is understandable that the more complex the application or software program run by the electronic device in the same time period and / or the lower the program execution efficiency, the greater the CPU computing power consumed by the interface display task corresponding to each target program.

[0187] Continuing with Figure 7, the horizontal and vertical coordinates of each coordinate point in the power-load analysis coordinates correspond to the power-load of the interface display task for each frame of the interface image executed per second. It is understood that once the CPU configuration of an electronic device is determined, a balance can be achieved between the CPU power that the electronic device can provide and the power consumption of the electronic device. It is understood that for the same load, running at a high frequency will result in a shorter runtime, but high frequencies tend to have poorer energy efficiency and higher power consumption. While running at a low frequency will result in a longer runtime, it also has higher energy efficiency and lower power consumption. Therefore, based on the target allowed runtime, for example, 8.3ms, if the frequency used achieves exactly 8.3ms to complete the task, the task can be completed on time while minimizing power consumption. Referring to the power-load analysis coordinates shown in Figure 7, for coordinate points that fall on the 120Hz power-power balance line, the computing power that the corresponding electronic device can provide for the corresponding task and the corresponding power consumption are balanced.

[0188] Taking the 120Hz computing power and power consumption balance line as the boundary, for each coordinate point that falls to the left of this computing power and power consumption balance line, the relationship between the computing power that the corresponding electronic device can provide for the task and the power consumption of the electronic device can be maintained in a state where supply exceeds demand. In this case, the computing power supply and power consumption of the electronic device can be balanced by adjusting the CPU operating frequency of the electronic device, that is, the switching frequency. Continuing with Figure 7, in this state, the electronic device may be under-supplied or over-supplied with computing power.

[0189] For example, for the coordinate point that falls in the under-supply area shown in Figure 7, the corresponding task execution time is greater than the target time, indicating that the CPU computing power supply is less than the CPU load at this time. At this time, the CPU computing power supply can be increased by increasing the CPU operating frequency, that is, making the corresponding CPU work at a higher frequency point, to shorten the task execution time, and ultimately enable the target task to be completed within the target time. In other embodiments, the CPU load can also be reduced by reducing the complexity of program logic or improving the efficiency of the algorithm, so as to achieve the purpose of enabling the target task to be completed within the target time. The above-mentioned target time can be the execution time set for the target task by the developer of the application code / kernel code based on the performance optimization goal.

[0190] For another example, for a point in the oversupply zone shown in Figure 7, the corresponding task execution time is less than the target time, indicating that the CPU computing power supply is greater than the CPU load. In this case, the CPU computing power supply can be reduced by lowering the CPU operating frequency, that is, by having the corresponding CPU operate at a lower frequency. As you can see, a lower frequency is beneficial for improving energy efficiency or reducing power consumption. In other words, for points in the oversupply zone, the main consideration is how to achieve higher power consumption benefits.

[0191] Continuing with Figure 7, for coordinate points that fall to the right of the 120Hz maximum load line, that is, for coordinate points that fall in the overload zone, the corresponding CPU operating frequency cannot be further increased, meaning that the CPU computing power supply has reached its limit. To solve the problem of how to complete the target task within the target time, the program code can be optimized by reducing program logic complexity or improving algorithm efficiency, thereby reducing the load and ultimately completing the target task within the target time.

[0192] Figure 8 shows a schematic diagram of the software structure of a performance analysis tool according to an embodiment of the present application. In this embodiment of the present application, the performance analysis tool can be deployed and installed on electronic devices such as the mobile phone 10 and / or laptop 20. In other embodiments, the performance analysis tool can also be deployed and installed on other electronic devices that need to perform performance analysis tasks, such as tablet computers, etc., without limitation.

[0193] As shown in FIG. 8 , the system software structure of the electronic device 100 may include an execution information collection module 810 , an evaluation index conversion module 820 , and a performance analysis module 830 .

[0194] The execution information collection module 810 is used to collect multiple execution information during the execution of the target program. In the embodiment of the present application, the execution information collection module 810 may include a dynamic instrumentation module 811, a thread state collection module 812, and a CPU frequency collection module 813.

[0195] The dynamic instrumentation module 811 is used to obtain the instruction address or function name corresponding to the designated instrumentation point entered by the developer and replace it with a jump instruction at the designated instrumentation point during the execution of the target program. As previously mentioned, this jump instruction can be used to jump to the developer-specified instrumentation code to continue execution and collect information such as the system time corresponding to the instrumentation point. The designated instrumentation point can be in the target program code or in application code / kernel code. The application code / kernel code can be the code executed by the system process or thread called during the execution of the target program.

[0196] The thread state collection module 812 is used to collect information related to the activity state changes of the execution threads (also referred to as target threads) corresponding to each target task of the target program in real time during the execution of the target program. This includes the time information corresponding to the state switch of each target thread and the state information before and after the switch. For details, please refer to Figures 2 and 3 above and the related description, and will not be repeated here.

[0197] The CPU frequency acquisition module 813 is used to collect information related to the operating frequency changes of each CPU executing the task code in real time during the execution of the target program, including the time corresponding to the CPU frequency switching moment and the frequency information before and after the switching. For details, please refer to the relevant description of Figure 3 above and will not be repeated here.

[0198] The evaluation index conversion module 820 may include a computing power conversion module 821 and an evaluation index calculation module 822, etc.

[0199] The computing power conversion module 821 is used to convert the collected CPU frequency information into the corresponding equivalent computing power. As previously mentioned, the equivalent computing power can be determined by the current CPU operating frequency (i.e., frequency) and CPU type. For details, please refer to Figure 5 and the related description above, and will not be repeated here.

[0200] The evaluation index calculation module 822 is used to calculate the values ​​of relevant evaluation index parameters based on the collected execution information, that is, to convert the various program execution information into relevant performance evaluation indicators. For example, the evaluation index calculation module 822 can determine at least one calculation interval corresponding to each target task based on the above-mentioned collected time information, and combine the equivalent computing power converted by the computing power conversion module 821 to calculate the CPU load during the execution of each target task, as well as the comprehensive CPU load of the target program. In the embodiment of the present application, the above-mentioned CPU load is the task load.

[0201] The performance analysis module 830 is used to measure the performance of the target program based on the performance evaluation indicators calculated above, such as the CPU load corresponding to each target task or each target program, or to analyze the CPU load balancing performance of the electronic device. Among them, the analysis results of the CPU load balancing performance can be reflected in the computing power-load analysis coordinates shown in Figure 7 above. In other embodiments, it can also be reflected in other forms of presentation of performance analysis results, which are not limited here.

[0202] Figure 9 shows a schematic diagram of the hardware structure of an electronic device according to an embodiment of the present application. It is understood that the electronic device can be the mobile phone 10, the notebook 20 or other electronic devices, and is not limited here.

[0203] The electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identity module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0204] It should be understood that the structures illustrated in the embodiments of the present application do not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0205] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU). The different processing units may be independent devices or integrated into one or more processors.

[0206] The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of instruction fetching and execution.

[0207] In the embodiment of the present application, the processor 110 of the electronic device 100 can control the instruction fetching and instruction instruction through the controller to implement the steps in the process shown in Figure 4 of the above embodiment 1 or the steps shown in Figure 6 of the above embodiment 2, thereby realizing the performance analysis method provided by the present application. The specific implementation process can refer to the relevant descriptions in the above embodiments 1 and 2, and will not be repeated here.

[0208] Processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in processor 110 is a cache memory. This memory can store instructions or data that have just been used or are being recycled by processor 110. If processor 110 needs to use the same instruction or data again, it can directly access the memory. This avoids duplicate accesses, reduces processor 110 latency, and thus improves system efficiency.

[0209] In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a SIM card interface, and / or a universal serial bus (USB) interface.

[0210] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.

[0211] Antenna 1 and Antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve antenna utilization. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In other embodiments, the antennas can be used in conjunction with a tuning switch.

[0212] The mobile communication module 150 can provide solutions for wireless communications including 2G / 3G / 4G / 5G applied to the electronic device 100. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the same device as at least some of the modules of the processor 110.

[0213] The wireless communication module 160 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to the electronic device 100. The wireless communication module 160 can be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, frequency modulates and filters the electromagnetic wave signals, and sends the processed signals to the processor 110. The wireless communication module 160 can also receive the signal to be sent from the processor 110, frequency modulate it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0214] In some embodiments, antenna 1 of electronic device 100 is coupled to mobile communication module 150, and antenna 2 is coupled to wireless communication module 160, so that electronic device 100 can communicate with a network and other devices via wireless communication technologies. The above-mentioned wireless communication technologies may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technology. The above-mentioned GNSS may include the global positioning system (GPS), the global navigation satellite system (GLONASS), the Beidou navigation satellite system (BDS), the quasi-zenith satellite system (QZSS) and / or the satellite based augmentation system (SBAS).

[0215] The electronic device 100 implements display functions through a GPU, display screen 194, and an application processor. The GPU is a microprocessor for image processing and is connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or change display information. The electronic device 100 can implement a camera function through an ISP, camera 193, a video codec, a GPU, display screen 194, and an application processor.

[0216] The camera 193 is used to capture still images or videos. The object generates an optical image through the lens and projects it onto the photosensitive element. The photosensitive element can be a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the light signal into an electrical signal, and then passes the electrical signal to the ISP for conversion into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV or other format. In some embodiments, the electronic device 100 may include 1 or N cameras 193, where N is a positive integer greater than 1.

[0217] The external memory interface 120 can be used to connect an external memory card, such as a MicroSD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 via the external memory interface 120 to implement data storage functions. For example, files such as music and videos can be stored on the external memory card.

[0218] The internal memory 121 can be used to store computer executable program code, which includes instructions. The internal memory 121 may include a program storage area and a data storage area. In addition, the internal memory 121 may include a high-speed random access memory and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc. The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121 and / or the instructions stored in the memory provided in the processor.

[0219] The electronic device 100 can implement audio functions such as music playback and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

[0220] The buttons 190 include a power button, a volume button, and the like. The buttons 190 may be mechanical buttons or touch buttons. The electronic device 100 may receive key inputs and generate key signal inputs related to user settings and function control of the electronic device 100.

[0221] Motor 191 can generate vibration prompts. Motor 191 can be used for incoming call vibration prompts, and can also be used for touch vibration feedback. For example, touch operations acting on different applications (such as taking pictures, audio playback, etc.) can correspond to different vibration feedback effects. For touch operations acting on different areas of the display screen 194, motor 191 can also correspond to different vibration feedback effects. Different application scenarios (for example: time reminders, receiving messages, alarm clocks, games, etc.) can also correspond to different vibration feedback effects. The touch vibration feedback effect can also support customization.

[0222] The indicator 192 may be an indicator light, which may be used to indicate the charging status, power level changes, messages, missed calls, notifications, etc.

[0223] The SIM card interface 195 is used to connect a SIM card. The SIM card can be connected to and separated from the electronic device 100 by inserting it into or removing it from the SIM card interface 195. The electronic device 100 can support 1 or N SIM card interfaces, where N is a positive integer greater than 1. The SIM card interface 195 can support Nano SIM cards, Micro SIM cards, SIM cards, etc. Multiple cards can be inserted into the same SIM card interface 195 at the same time. The types of the above-mentioned multiple cards can be the same or different. The SIM card interface 195 can also be compatible with different types of SIM cards. The SIM card interface 195 can also be compatible with external memory cards. The electronic device 100 interacts with the network through the SIM card to implement functions such as calls and data communications. In some embodiments, the electronic device 100 uses an eSIM, i.e., an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.

[0224] FIG10 shows a schematic diagram of the software structure of an operating system of an electronic device according to an embodiment of the present application.

[0225] It is understood that the operating system of the electronic device 100 can adopt a layered architecture, an event-driven architecture, a micro-kernel architecture, a microservice architecture, or a cloud architecture. The embodiment of the present application takes the Android system of the layered architecture as an example to exemplify the system software structure of the electronic device 100.

[0226] The layered architecture divides the software into several layers, each with a clear role and division of labor. The layers communicate with each other through software interfaces. In some embodiments, Android TM The system is divided into four layers, from top to bottom: application layer, application framework layer, Android TM Runtime (Android TM runtime) and system libraries, as well as the kernel layer.

[0227] As shown in Figure 10, the application layer may include a series of application packages. The application packages may include camera, gallery, calendar, call, map, navigation, WLAN, Bluetooth, music, video, short message and other applications.

[0228] The application framework layer provides an application programming interface (API) and programming framework for applications in the application layer. The application framework layer includes some predefined functions.

[0229] The application framework layer may include a window manager, content provider, view system, telephony manager, resource manager, notification manager, etc.

[0230] The window manager is used to manage window programs. The window manager can obtain the display size, determine whether there is a status bar, lock the screen, take screenshots, etc.

[0231] Content providers are used to store and retrieve data and make it accessible to applications. This data can include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

[0232] The view system includes visual controls, such as those for displaying text and images. The view system is used to build applications. A display interface can consist of one or more views. For example, a display interface containing a text notification icon might include a view for displaying text and a view for displaying images.

[0233] The phone manager is used to provide communication functions of the electronic device 100, such as management of call status (including answering, hanging up, etc.).

[0234] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0235] The Notification Manager allows applications to display notifications in the status bar. These messages can be displayed briefly and then disappear automatically without user interaction. For example, the Notification Manager is used to notify users of completed downloads and message reminders. The Notification Manager can also display notifications in the top status bar of the system as icons or scrolling text, such as notifications from background applications, or as dialog windows on the screen. Examples include text messages in the status bar, beeps, vibrations on electronic devices, and flashing indicator lights.

[0236] Android TM Runtime includes core libraries and virtual machines. Android TMruntime is responsible for Android TM System scheduling and management.

[0237] The core library consists of two parts: one is the function that needs to be called by the Java language, and the other is the Android core library.

[0238] The application layer and application framework layer run in a virtual machine. The virtual machine executes Java files in the application layer and application framework layer as binary files. The virtual machine manages object lifecycles, stack management, thread management, security and exception management, and garbage collection.

[0239] The system library can include multiple functional modules, such as surface manager, media libraries, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.

[0240] The surface manager is used to manage the display subsystem and provide fusion of 2D and 3D layers for multiple applications.

[0241] The media library supports playback and recording of a variety of common audio and video formats, as well as static image files. The media library can support a variety of audio and video encoding formats, such as: MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.

[0242] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0243] A 2D graphics engine is a drawing engine for 2D drawings.

[0244] The kernel layer is the layer between hardware and software. The kernel layer includes at least display driver, camera driver, audio driver, and sensor driver.

[0245] The embodiments of the present application also provide a computer program product for implementing the performance analysis methods provided in the above embodiments.

[0246] The various embodiments of the mechanisms disclosed in this application can be implemented in hardware, software, firmware, or a combination of these implementation methods. The embodiments of the present application can be implemented as computer program modules or module codes executed on a programmable system, which includes at least one processor, a storage system (including volatile and non-volatile memory and / or storage elements), at least one input device, and at least one output device.

[0247] A computer program module or module code can be applied to input instructions to perform the functions described herein and generate output information. The output information can be applied to one or more output devices in a known manner. For the purposes of this application, a processing system includes any system having a processor such as, for example, a digital signal processor (DSP), a microcontroller, an application specific integrated circuit (ASIC), or a microprocessor.

[0248] Module code can be implemented with high-level modular language or object-oriented programming language to communicate with the processing system. When necessary, module code can also be implemented with assembly language or machine language. In fact, the mechanism described in this application is not limited to the scope of any specific programming language. In either case, the language can be a compiled language or an interpreted language.

[0249] In some cases, the disclosed embodiments may be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented as instructions carried or stored on one or more temporary or non-temporary machine-readable (e.g., computer-readable) storage media, which may be read and executed by one or more processors. For example, instructions may be distributed over a network or through other computer-readable media. Therefore, a machine-readable medium may include any mechanism for storing or transmitting information in a machine (e.g., computer) readable form, including but not limited to a floppy disk, an optical disk, an optical disk, a magneto-optical disk, a read-only memory (ROM), a random access memory (RAM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic card or an optical card, a flash memory, or a tangible machine-readable memory for transmitting information (e.g., a carrier wave, an infrared signal, a digital signal, etc.) using the Internet in an electrical, optical, acoustic, or other form of propagation signal. Accordingly, machine-readable media includes any type of machine-readable media suitable for storing or transmitting electronic instructions or information in a form readable by a machine (eg, a computer).

[0250] References in the specification to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one exemplary implementation or technique disclosed according to the embodiment of the present application. The appearances of the phrase "in one embodiment" in various places in the specification do not necessarily all refer to the same embodiment.

[0251] The disclosure of the embodiments of the present application also relates to an operating device for executing the text. The device can be constructed specifically for the required purpose or it can include a general-purpose computer that is selectively activated or reconfigured by a computer program stored in the computer. Such a computer program can be stored in a computer-readable medium, such as, but not limited to, any type of disk, including a floppy disk, an optical disk, a CD-ROM, a magneto-optical disk, a read-only memory (ROM), a random access memory (RAM), an EPROM, an EEPROM, a magnetic or optical card, an application-specific integrated circuit (ASIC) or any type of medium suitable for storing electronic instructions, and each can be coupled to a computer system bus. In addition, the computer mentioned in the specification can include a single processor or can be an architecture involving multiple processors for increased computing power.

[0252] In addition, the language used in this specification has been primarily selected for readability and instructional purposes and may not be selected to describe or limit the disclosed subject matter. Therefore, the present disclosure of embodiments is intended to illustrate, not to limit, the scope of the concepts discussed herein.

Claims

1. A performance analysis method, applied to electronic equipment, characterized in that: include: detecting an analysis request from a user instructing to run a first program for performance analysis; In response to the analysis request, a performance analysis result is displayed, wherein the performance analysis result is obtained based on execution information of the first program during the same running process, the execution information at least includes multiple time information related to the first task of the first program, and the performance analysis result includes a processor performance analysis result.

2. The method according to claim 1, characterized in that The electronic device includes one or more CPUs, the processor performance analysis result includes a CPU performance analysis result, and, The detecting a user's request to execute a first program for performance analysis includes: detecting a first analysis request from a user instructing to run a first program to perform performance analysis on the one or more CPUs; or A second analysis request from a user to perform performance analysis on the first program is detected.

3. The method according to claim 2, characterized in that The first program includes one or more tasks, the one or more tasks including the first task, and, The displaying of the performance analysis result in response to the analysis request includes: determining at least one calculation interval for calculating a first task load, wherein the first task load is a CPU load corresponding to the first task, and the performance analysis result is related to the first task load; determining a duration corresponding to a computing interval in which a first thread is in a running state in the at least one computing interval, wherein the first thread is a thread executing the first task; Get the computing power parameters corresponding to the CPU working frequency points in each computing interval; The first task load is determined based on the number of the at least one computing interval, the duration corresponding to the computing interval in which the first thread is in a running state, and the computing power parameter corresponding to the frequency of CPU operation in each computing interval.

4. The method according to claim 3, characterized in that The plurality of time information related to the first task of the first program is used to determine the start time and the end time of each calculation interval, and The determining of at least one calculation interval for calculating the first task load includes: Obtaining start time information and end time information of a first task in at least one task of the first program, and, Obtaining first time information corresponding to an activity state switching moment of a first thread where the first task is located, wherein the activity state includes the running state, and Obtaining second time information corresponding to a frequency switching moment of a first CPU running the first thread; At least one calculation interval for calculating the first task load is determined based on the start time information, the end time information, the first time information, and the second time information.

5. The method according to claim 4, characterized in that The execution information of the first program during the same running process also includes the activity state information of the first thread collected before and after the activity state switching moment, and, The running state includes a running state and / or a runnable state.

6. The method according to claim 5, characterized in that The determining of a duration corresponding to a computing interval in which the first thread is in a running state in the at least one computing interval includes: determining a first running time corresponding to a first computing interval in which the first thread is in a running state, and The number of first computing intervals in which the first thread is in a running state is determined.

7. The method according to claim 6, characterized in that The execution information of the first program during the same running process also includes the frequency information of the first CPU collected before and after the frequency switching moment, and, The step of obtaining the computing power parameters corresponding to the CPU operating frequency points within each computing interval includes: Obtaining first frequency point information of a first CPU operating within the first calculation interval; Determine a corresponding first equivalent computing power value based on the type of the first CPU and the first frequency information; The value of the first equivalent computing power is determined as a computing power parameter corresponding to the operating frequency of the first CPU within the first calculation interval.

8. The method according to claim 7, characterized in that The determining the first task load based on the number of the at least one computing interval, the duration of the computing interval in which the first thread is in the running state, and the computing power parameter corresponding to the CPU operating frequency in each computing interval includes: Calculating a first CPU load corresponding to the first computing interval based on the first running time and the first equivalent computing power; The first task load corresponding to the first task is obtained by performing cumulative calculation based on the first CPU loads respectively corresponding to one or more first calculation intervals in the at least one calculation interval.

9. The method according to claim 8, characterized in that The one or more tasks further include a second task, and, The displaying of the performance analysis result in response to the analysis request further includes: Determining at least one calculation interval for calculating a second task load, wherein the second task load is a CPU load generated by the second task; determining a duration corresponding to a computing interval in which a second thread is in a running state in the at least one computing interval, wherein the second thread is a thread executing the second task; Get the computing power parameters corresponding to the CPU working frequency points in each computing interval; The second task load is determined based on the number of the at least one computing interval, the duration corresponding to the computing interval in which the second thread is in the running state, and the computing power parameter corresponding to the frequency of the CPU operation in each computing interval.

10. The method according to claim 9, characterized in that The displaying of the performance analysis result in response to the analysis request includes: In response to the first analysis request, the first task load and the second task load are combined and calculated to obtain the total load corresponding to one or more CPUs currently working in the electronic device, which is determined as the processor performance analysis result and displayed.

11. The method according to claim 9, characterized in that The performance analysis result includes a first program performance analysis result, and The displaying of the performance analysis result in response to the analysis request includes: In response to the second analysis request, based on the first task load and the second task load, the first program performance analysis result is generated and displayed.

12. The method according to any one of claims 3 to 11, characterized in that The start time information of the first task is obtained based on the collection of the running result of the first instrumentation program, the end time information of the first task is obtained based on the collection of the running result of the second instrumentation program, and, The electronic device jumps to run the first inserted program based on a first jump instruction inserted in the first program; The electronic device jumps to run the second inserted program based on the second jump instruction inserted in the first program.

13. The method according to any one of claims 3 to 11, characterized in that The first time information corresponding to the active state switching moment of the first thread is collected and obtained based on the running result of the third instrumentation program, and The electronic device jumps to run the third inserted program based on a third jump instruction inserted in the application code / kernel code for monitoring the activity state of the first thread.

14. The method according to any one of claims 4 to 11, characterized in that The second time information corresponding to the frequency switching moment of the first CPU is collected and obtained based on the running result of the fourth instrumentation program, and The electronic device jumps to run the fourth inserted program based on a fourth jump instruction inserted in the application code / kernel code capable of monitoring the frequency switching event of the first CPU.

15. A performance analysis method, applied to a first electronic device and a second electronic device, characterized in that: include: The first electronic device detects an analysis request from a user instructing to run a first program to perform performance analysis; The first electronic device sends, in response to the analysis request, an execution instruction corresponding to the first program to the second electronic device; The second electronic device runs the first program in response to the running instruction; The first electronic device displays a performance analysis result based on the execution information collected by the second electronic device during the same operation of the first program, wherein the performance analysis result is obtained based on the execution information of the first program during the same operation, the execution information at least includes multiple time information related to the first task of the first program, and the performance analysis result includes a processor performance analysis result.

16. The method according to claim 15, characterized in that The first program includes one or more tasks, the one or more tasks including the first task, and, The first electronic device displays a performance analysis result based on the execution information collected by the second electronic device during the same execution of the first program, including: The first electronic device receives the execution information collected by the second electronic device, and determines, based on the execution information, at least one calculation interval for calculating a first task load, wherein the first task load is a CPU load corresponding to the first task, and the performance analysis result is related to the first task load; The first electronic device determines a duration corresponding to a calculation interval in which a first thread is in a running state in the at least one calculation interval, wherein the first thread is a thread that executes the first task; The first electronic device obtains a computing power parameter corresponding to a CPU operating frequency point within each computing interval; The first electronic device determines the first task load based on the number of the at least one computing interval, the duration corresponding to the computing interval in which the first thread is in a running state, and the computing power parameters corresponding to the frequency of the CPU operation in each computing interval.

17. The method according to claim 16, characterized in that The first electronic device determines, based on the execution information, at least one calculation interval for calculating the first task load, including: The first electronic device obtains start time information and end time information of a first task in at least one task of the first program, and The first electronic device obtains first time information corresponding to the moment of switching the activity state of the first thread where the first task is located, wherein the activity state includes the running state, and The first electronic device obtains second time information corresponding to a frequency switching moment of a first CPU running the first thread, where the first CPU is any one of the one or more CPUs of the second electronic device; The first electronic device determines at least one calculation interval for calculating the first task load based on the start time information, the end time information, the first time information, and the second time information.

18. The method according to claim 17, characterized in that The execution information of the first program during the same running process also includes the activity state information of the first thread collected before and after the activity state switching moment, and, The running state includes a running state and / or a runnable state.

19. The method according to claim 18, characterized in that The first electronic device determines, in the at least one calculation interval, a duration corresponding to a calculation interval in which the first thread is in a running state, including: The first electronic device determines a first running time corresponding to a first calculation interval in which the first thread is in a running state, and The first electronic device determines the number of first computing intervals in which the first thread is in a running state.

20. The method according to claim 19, characterized in that The execution information of the first program during the same running process also includes the frequency information of the first CPU collected before and after the frequency switching moment, and, The first electronic device obtains computing power parameters corresponding to the CPU operating frequency points within each computing interval, including: The first electronic device obtains first frequency point information of the first CPU operating in the first calculation interval; The first electronic device determines a corresponding first equivalent computing power value based on the type of the first CPU and the first frequency information; The first electronic device determines the value of the first equivalent computing power as a computing power parameter corresponding to the operating frequency of the first CPU within the first calculation interval.

21. The method according to claim 20, characterized in that The first electronic device determines the first task load based on the number of the at least one computing interval, a duration corresponding to a computing interval in which the first thread is in a running state, and a computing power parameter corresponding to a CPU operating frequency in each computing interval, including: The first electronic device calculates a first CPU load corresponding to the first calculation interval based on the first operating time and the value of the first equivalent computing power; The first electronic device performs cumulative calculation based on the first CPU loads respectively corresponding to one or more first calculation intervals in the at least one calculation interval to obtain the first task load corresponding to the first task.

22. The method according to claim 21, characterized in that The one or more tasks further include a second task, and, The first electronic device displays a performance analysis result based on the execution information collected by the second electronic device during the same execution of the first program, including: The first electronic device determines at least one calculation interval for calculating a second task load, wherein the second task load is a CPU load generated by the second task; The first electronic device determines a duration corresponding to a calculation interval in which a second thread is in a running state in the at least one calculation interval, wherein the second thread is a thread that executes the second task; The first electronic device obtains a computing power parameter corresponding to a CPU operating frequency point within each computing interval; The first electronic device determines the second task load based on the number of the at least one computing interval, the duration of the computing interval in which the second thread is in the running state, and the computing power parameter corresponding to the CPU operating frequency in each computing interval; The first electronic device generates and displays the performance analysis result based on the first task load and the second task load.

23. A method for applying performance analysis results, applied to electronic equipment, characterized in that: The electronic device includes a performance analysis tool, wherein the performance analysis tool is used to execute the performance analysis method according to any one of claims 1 to 14 to obtain a performance analysis result, wherein the performance analysis result includes CPU load analysis results corresponding to multiple programs running in a first time period, and The method comprises: Establishing a first coordinate system, wherein the horizontal axis of the first coordinate system represents task load and the vertical axis represents CPU computing power; Based on the maximum value of the screen frame rate of the electronic device, a first reference line is determined in the first coordinate system, wherein the task load corresponding to the coordinate point on the first reference line and the CPU computing power provided by the electronic device satisfy a first balance condition, and the first balance condition is used to control the CPU computing power provided by the electronic device and the power consumption of the electronic device to reach a balanced state; Program optimization strategies for the multiple programs are determined based on the positional relationship between the landing points of the CPU load analysis results corresponding to the multiple programs in the first coordinate system and the first reference line.

24. The application method according to claim 23, characterized in that: The method further comprises: Based on the maximum value of the task load that can be supported by the CPU computing power provided by the electronic device, determining a second reference line in the first coordinate system, wherein the task load corresponding to the coordinate point on the second reference line and the CPU computing power provided by the electronic device satisfy a second balance condition, wherein the second balance condition is used to control the CPU computing power provided by the electronic device and the maximum load supported by the electronic device to reach a balanced state; Program optimization strategies for the multiple programs are determined based on the positional relationship between the landing points of the CPU load analysis results corresponding to the multiple programs in the first coordinate system and the second reference line.

25. The application method according to claim 23 or 24, characterized in that: The program optimization strategy for the plurality of programs includes at least one of the following: increasing the operating frequency of one or more CPUs running a first program among the plurality of programs; reducing the operating frequency of one or more CPUs running a first program among the plurality of programs; reducing the logic complexity of program code of a first program among the plurality of programs; An algorithm involved in a first program among the multiple programs is optimized.

26. An electronic device, characterized in that: include: one or more processors; One or more memories; the one or more memories store one or more programs, and when the one or more programs are executed by the one or more processors, the electronic device executes the performance analysis method described in any one of claims 1 to 14, or executes the performance analysis result application method described in any one of claims 23 to 25.

27. A computer-readable medium, characterized in that The readable medium stores instructions, which, when executed on a computer, cause the computer to execute the performance analysis method according to any one of claims 1 to 14, or the performance analysis result application method according to any one of claims 23 to 25.

28. A computer program product, characterized in that The invention comprises a computer program / instruction, which, when executed by a processor, implements the performance analysis method according to any one of claims 1 to 14, or executes the performance analysis result application method according to any one of claims 23 to 25.

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