Communication method and apparatus

Abstract

A communication method and apparatus, relating to the technical field of communications, expected to be able to reduce decoding latency and improve the area efficiency and decoding performance of a decoder. The method comprises: on the basis of the reliability corresponding to a first sequence having a length of N2, determining (K+C1*L1) first positions, wherein N2 is an integer multiple of the length N1 of a mother code for initial data transmission, K is the length of an information bit sequence, C1 is the length of each first CRC bit sequence, and L1 is the number of first CRC bit sequences; mapping A information bits in the information bit sequence and L1 first CRC bit sequences to (A+C1*L1) first positions located in a second sequence having a length of (N2-N1) within the first sequence to obtain a third sequence, wherein L1 first position groups are included in the (A+C1*L1) first positions, and information bits of the i-th first position group among the L1 first position groups are used for determining the i-th first CRC bit sequence among the L1 first CRC bit sequences; and performing polar encoding on the third sequence to obtain an encoded bit sequence and outputting one or more bits in the encoded bit sequence.

Description

Communication method and device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on February 5, 2024, with application number 202410172542.0 and application name “Communication Method and Device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of communication technology, and in particular to a communication method and device. Background Art

[0003] Polar codes are the first channel coding scheme rigorously proven to achieve Shannon channel capacity. They offer excellent error correction performance and low decoding complexity. They have been selected by the Third Generation Partnership Project (3GPP) as the coding scheme for the uplink and downlink control channels of enhanced mobile broadband (eMBB) scenarios in fifth-generation (5G) mobile communication systems.

[0004] The receiving device can decode the received sequence using a successive cancellation list (SCL) decoding method. This decoding method increases computational complexity and decoding latency as the list size increases, resulting in a decrease in the decoder's efficiency per unit area, limiting the performance improvement of Polar codes.

[0005] Based on this, an error detection code, determined based on the information bits, can be inserted at a specific location. When decoding reaches the error detection code, each decoding path can be verified against the decoding result. Paths that pass the verification can continue decoding, while paths that fail the verification stop decoding. This allows paths that fail the verification to be discarded, reducing the decoder's storage and computational overhead.

[0006] However, in actual applications, the transmitted codeword bits may be incomplete relative to their error detection codes, and the corresponding error detection codes cannot detect errors. As a result, the Polar code transmitted this time cannot prune the paths that fail verification. Summary of the Invention

[0007] The embodiments of the present application provide a communication method and apparatus, which are expected to reduce decoding delay and improve the area efficiency and decoding performance of the decoder.

[0008] In a first aspect, an embodiment of the present application provides a communication method that can be executed by a transmitting device. Unless otherwise specified, the "transmitting device" in this application can refer to the transmitting device itself, or a component in the transmitting device (such as a processor, chip, or chip system), or a logic module or software that can implement all or part of the functions of the transmitting device. The method includes: determining (K+C1*L1) first positions based on the reliability corresponding to a first sequence of length N2; mapping A information bits and L1 first CRC bit sequences in the information bit sequence to (A+C1*L1) first positions of a second sequence of length (N2-N1) in the first sequence to obtain a third sequence; performing polarization coding on the third sequence to obtain a coded bit sequence; and outputting one or more bits of the coded bit sequence. Among them, N2 is an integer multiple of the mother code length N1 of the initial data transmission; K is the length of the information bit sequence; C1 is the length of the first cyclic redundancy check CRC bit sequence; L1 is the number of first CRC bit sequences; N1, N2, K, C1, and L1 are all positive integers; L1 first position groups are included in (A+C1*L1) first positions, and the information bits in the i-th first position group in the L1 first position groups are used to determine the i-th first CRC bit sequence in the L1 first CRC bit sequences.

[0009] Based on the first aspect, a new method for adding a CRC bit sequence to a Polar code is provided. This method enables path pruning based on the CRC bit sequence even when the transmitted codeword bits are incomplete, thereby reducing implementation complexity. For Polar codes that support the transmission of arbitrary lengths, information bits can be specifically selected for error detection. For example, whether the information bit participates in error detection can be determined based on the first position corresponding to the information bit. Specifically, the information bits in the i-th first position group of L1 first position groups can be selected for error detection, and the first CRC bit sequence in the i-th first position group can be determined based on the information bits in the i-th first position group. Thus, even if the entire codeword of the Polar code is not transmitted in full, as long as the i-th coded bit subsequence corresponding to the i-th first position group is transmitted, the receiving device can perform path screening based on the relevant information in the obtained third sequence, avoiding the situation where the information bits corresponding to the CRC bit sequence are not fully transmitted, resulting in the inability to perform path screening based on the CRC bit sequence. The communication method provided in the embodiment of the present application can effectively reduce the processing delay of the decoder, improve the area efficiency of the decoder, and improve decoding performance.

[0010] In one possible design, when N2 is twice as much as N1, the value of L1 is 1; or, when N2 is four times as much as N1, the value of L1 is 3; or, when N2 is eight times as much as N1, the value of L1 is 7.

[0011] Based on this possible design, multiple possible designs are provided for the value of L1.

[0012] In one possible design, the first positions included in each first position group are determined according to the first interleaving pattern.

[0013] Based on this possible design, the transmitting device can select Q sub-blocks from each segment in a backward-to-forward order according to the first interleaving pattern, and determine the first position of the Q sub-blocks as the first position group in the segment. This ensures that during a single bit transmission process, all information bits corresponding to the first CRC bit sequence are transmitted. The receiving device can perform error detection on the corresponding information bits based on the obtained first CRC bit sequence, and further perform path screening, thereby reducing the storage and computational overhead of the decoder and improving decoding performance.

[0014] In one possible design, the first interleaving pattern is any of the following patterns: [1 5 9 13 2 6 10 14 3 7 11 15 4 8 12 16 17 21 25 29 18 22 26 30 19 23 27 31 20 24 28 32]; or, [1 5 2 6 3 7 4 8 9 13 10 14 11 15 12 16]; or, [1 3 2 4 5 7 6 8]; or, [1 2 3 5 4 6 7 8 9 17 10 18 11 19 12 20 13 21 14 22 15 23 16 24 25 26 27 29 28 30 31 32].

[0015] Based on this possible design, the first and second of the four patterns described above are based on row-column interleaving, which is simple to implement. The third pattern is determined based on the reliability order of the sub-blocks, which can improve decoding performance. The fourth pattern is compatible with NR. Multiple possible designs are provided for the first interleaving pattern.

[0016] In one possible design, A information bits and L1 first CRC bit sequences in the information bit sequence are mapped to the (A+C1*L1) first positions of a second sequence with a length of (N2-N1) in the first sequence, including: the L1 first CRC bit sequences correspond to the last C1 first positions in each first position group in the L1 first position groups, sorted from low to high according to the numbering, and the A information bits correspond to the A first positions of the (A+C1*L1) first positions except the (C1*L1) first positions.

[0017] Based on this possible design, the transmitting device can map the first CRC bit sequence to the last C1 first positions of each segment and map A information bits to A first positions, providing a feasible solution for bit mapping and improving decoding performance.

[0018] In one possible design, A information bits correspond to A first positions among (A+C1*L1) first positions except (C1*L1) first positions, including: determining the A first positions corresponding to the A information bits according to the second interleaving pattern.

[0019] Based on this possible design, the transmitting device may further interleave A information bits according to a second interleaving pattern, and map the interleaved information bits to A first positions to improve decoding performance.

[0020] In one possible design, the (A+C1*L1) first positions are the (A+C1*L1) first positions numbered less than (N2-N1) among the (K+C1*L1) first positions with high reliability in the first sequence.

[0021] In one possible design, the (A+C1*L1) first positions are the (A+C1*L1) first positions numbered less than (N2-N1) among the (K+C1*L1+C2) first positions with high reliability in the first sequence; where C2 is the length of the second CRC bit sequence; C2 is a positive integer.

[0022] Based on the above two possible designs, multiple feasible solutions are provided for determining (A+C1*L1) first positions.

[0023] In one possible design, (K+C2) second positions are determined based on the reliability corresponding to a fourth sequence of length N1; C2 is the length of the second CRC bit sequence; C2 is a positive integer; the information bit sequence and the second CRC bit sequence are mapped to the (K+C2) second positions of the fourth sequence in the first sequence to obtain a third sequence; wherein the second CRC bit sequence is determined based on the information bit sequence.

[0024] Based on this possible design, the transmitting device can also determine a second CRC bit sequence according to the information bit sequence, so as to select a path after decoding and determine whether the decoding is successful, thereby improving decoding performance.

[0025] In one possible design, the information bit sequence and the second CRC bit sequence are mapped to the (K+C2) second positions in the fourth sequence in the first sequence, including: the second CRC bit sequence corresponds to the last C2 second positions in the second position group sorted from low to high according to the numbering, and the information bit sequence corresponds to the K second positions in the second position group except the C2 second positions; wherein the second position group is included in the (K+C2) second positions.

[0026] Based on this possible design, the transmitting device can map the second CRC bit sequence to the last C2 second positions of each segment and map the K information bits to the K second positions, providing a feasible solution for bit mapping and improving decoding performance.

[0027] In one possible design, the information bit sequence corresponds to K second positions other than C2 second positions in the second position group, including: determining the K second positions corresponding to the information bit sequence according to a third interleaving pattern.

[0028] Based on this possible design, the transmitting device may further interleave the K information bits according to a third interleaving pattern, and map the interleaved information bits to K second positions to improve decoding performance.

[0029] In one possible design, the A information bits are information bits corresponding to the A second positions among the K second positions corresponding to the information bit sequence.

[0030] In one possible design, the A second positions are the last A second positions among the K second positions sorted in descending order of reliability.

[0031] Based on the above two possible designs, A first positions and A second positions each correspond to A information bits, and there is a corresponding check relationship between the A first positions and the A second positions, which can reduce the decoding complexity and improve the decoding performance.

[0032] In a second aspect, an embodiment of the present application provides a communication method that can be executed by a receiving device. Unless otherwise specified, the "receiving device" in this application can refer to the receiving device itself, or a component in the receiving device (such as a processor, chip, or chip system, etc.), or a logic module or software that can implement all or part of the functions of the receiving device. The method includes: receiving information to be decoded from a transmitting device; determining (K+C1*L1) first positions based on the reliability corresponding to a first sequence of length N2; and decoding the information to be decoded based on the (A+C1*L1) first positions. Among them, the length of the information bit sequence corresponding to the information to be decoded is K; N2 is an integer multiple of the mother code length N1 of the initial data transmission; C1 is the length of the first CRC bit sequence; L1 is the number of first CRC bit sequences; N1, N2, K, C1, and L1 are all positive integers; (A+C1*L1) first positions in the (K+C1*L1) first positions correspond to A information bits and L1 first CRC bit sequences in the information bit sequence; L1 first position groups are included in (A+C1*L1) first positions in the (K+C1*L1) first positions, and the information bits in the i-th first position group in the L1 first position groups are used to determine the i-th first CRC bit sequence in the L1 first CRC bit sequences.

[0033] Based on the second aspect, a new method for adding a CRC bit sequence to a Polar code is provided. This method enables path pruning based on the CRC bit sequence even when the transmitted codeword bits are incomplete, thereby reducing implementation complexity. For Polar codes that support the transmission of arbitrary lengths, information bits can be specifically selected for error detection. For example, whether the information bit participates in error detection can be determined based on the first position corresponding to the information bit. Specifically, the information bits in the i-th first position group of L1 first position groups can be selected for error detection, and the first CRC bit sequence in the i-th first position group can be determined based on the information bits in the i-th first position group. Thus, even if the entire codeword of the Polar code is not completely transmitted, as long as the i-th coded bit subsequence corresponding to the i-th first position group is completely transmitted, the receiving device can perform path screening based on the relevant information in the obtained third sequence, avoiding the situation where the information bits corresponding to the CRC bit sequence are not completely transmitted, resulting in the inability to perform path screening based on the CRC bit sequence. The communication method provided in the embodiment of the present application can effectively reduce the processing delay of the decoder, improve the area efficiency of the decoder, and improve the decoding performance.

[0034] In one possible design, when N2 is twice as much as N1, the value of L1 is 1; or, when N2 is four times as much as N1, the value of L1 is 3; or, when N2 is eight times as much as N1, the value of L1 is 7.

[0035] Based on this possible design, multiple possible designs are provided for the value of L1.

[0036] In one possible design, the first positions included in each first position group are determined according to the first interleaving pattern.

[0037] Based on this possible design, the receiving device can select Q sub-blocks from each segment in a backward-to-forward order according to the first interleaving pattern, and determine the first position of the Q sub-blocks as the first position group in the segment. This ensures that during a single bit transmission process, all information bits corresponding to the first CRC bit sequence are transmitted. The receiving device can perform error detection on the corresponding information bits based on the obtained first CRC bit sequence, and further perform path screening, thereby reducing the storage and computational overhead of the decoder and improving decoding performance.

[0038] In one possible design, the first interleaving pattern is any of the following patterns: [1 5 9 13 2 6 10 14 3 7 11 15 4 8 12 16 17 21 25 29 18 22 26 30 19 23 27 31 20 24 28 32]; or, [1 5 2 6 3 7 4 8 9 13 10 14 11 15 12 16]; or, [1 3 2 4 5 7 6 8]; or, [1 2 3 5 4 6 7 8 9 17 10 18 11 19 12 20 13 21 14 22 15 23 16 24 25 26 27 29 28 30 31 32].

[0039] Based on this possible design, the first and second of the four patterns described above are based on row-column interleaving, which is simple to implement. The third pattern is determined based on the reliability order of the sub-blocks, which can improve decoding performance. The fourth pattern is compatible with NR. Multiple possible designs are provided for the first interleaving pattern.

[0040] In one possible design, (A+C1*L1) first positions out of the (K+C1*L1) first positions correspond to A information bits and L1 first CRC bit sequences in the information bit sequence, including: the last C1 first positions in each first position group of the L1 first position groups sorted from low to high according to the numbers correspond to L1 first CRC bit sequences respectively, and the A first positions other than the (C1*L1) first positions out of the (A+C1*L1) first positions correspond to A information bits.

[0041] Based on this possible design, the first CRC bit sequence can be determined according to the last C1 first positions of each segment, and A information bits can be determined according to the A first positions, providing a feasible solution for decoding and improving decoding performance.

[0042] In one possible design, the (A+C1*L1) first positions are the (A+C1*L1) first positions numbered less than (N2-N1) among the (K+C1*L1) first positions with high reliability in the first sequence.

[0043] In one possible design, the (A+C1*L1) first positions are the (A+C1*L1) first positions numbered less than (N2-N1) among the (K+C1*L1+C2) first positions with high reliability in the first sequence; where C2 is the length of the second CRC bit sequence; C2 is a positive integer.

[0044] Based on the above two possible designs, multiple feasible solutions are provided for determining (A+C1*L1) first positions.

[0045] In one possible design, (K+C2) second positions are determined based on the reliability corresponding to the fourth sequence of length N1; where C2 is the length of the second CRC bit sequence; C2 is a positive integer; the (K+C2) second positions correspond to the information bit sequence and the second CRC bit sequence; and the second CRC bit sequence is determined based on the information bit sequence.

[0046] Based on this possible design, the receiving device can also determine (K+C2) second positions to determine the information bit sequence and the second CRC bit sequence, which facilitates path selection after decoding and determines whether the decoding is successful, thereby improving decoding performance.

[0047] In one possible design, the (K+C2) second positions correspond to the information bit sequence and the second CRC bit sequence, including: the last C2 second positions in the second position group sorted in ascending order correspond to the second CRC bit sequence; the K second positions other than the C2 second positions in the second position group correspond to the information bit sequence; wherein the second position group is included in the (K+C2) second positions.

[0048] Based on this possible design, the second CRC bit sequence can be determined according to the last C2 second positions of each segment, and the information bit sequence can be determined according to the K second positions, providing a feasible solution for decoding and improving decoding performance.

[0049] In combination with the first or second aspect above, in a possible design, the number L1 of the first cyclic redundancy check CRC bit sequences is determined based on the length K of the information bit sequence and the rate matching length M corresponding to the information bit sequence.

[0050] In combination with the first or second aspect above, in one possible design, the number L of CRC bit sequences is determined based on the length K of the information bit sequence and the rate matching length M corresponding to the information bit sequence; wherein the L CRC bit sequences include L1 first CRC bit sequences and one second CRC bit sequence, the second CRC bit sequence is a CRC bit sequence determined based on the information bit sequence, and L is a positive integer.

[0051] Based on the above two possible designs, multiple feasible solutions are provided for determining the number L1 of the first cyclic redundancy check CRC bit sequences.

[0052] In combination with the first or second aspect above, in a possible design, the number L of CRC bit sequences is determined based on the length K of the information bit sequence and the rate matching length M corresponding to the information bit sequence, including: determining N1 based on the rate matching length M; determining N2 based on N1; and determining the number L of CRC bit sequences based on N2 and the first numerical value.

[0053] Based on this possible design, a feasible solution is provided for determining the number L of CRC bit sequences.

[0054] In combination with the above-mentioned first aspect or second aspect, in one possible design, the first value is any of the following values: 1024, 2048, 4096.

[0055] Based on this possible design, the larger the first value, the better the performance, but the more complex the decoder implementation. When the first value is 2048, a better balance can be achieved.

[0056] In combination with the above-mentioned first aspect or second aspect, in a possible design, the number L of CRC bit sequences is determined based on N2 and the first numerical value, including: the number L of CRC bit sequences is the result of rounding up the quotient of N2 and the first numerical value.

[0057] Based on this possible design, a feasible solution is provided for determining the number L of CRC bit sequences.

[0058] In combination with the first or second aspect above, in one possible design, N1 is the smallest integer power of 2 that is greater than or equal to M.

[0059] In combination with the above-mentioned first aspect or second aspect, in one possible design, the number of CRC bit sequences is any of the following values: 2, 4, or 8.

[0060] In combination with the above-mentioned first aspect or second aspect, in one possible design, the number of the second CRC bit sequence is 1.

[0061] In the third aspect, an embodiment of the present application provides a communication device, which can be applied to the transmitting device of the first aspect above to implement the functions performed by the transmitting device above. The communication device can be a transmitting device, or a chip or chip system or system on chip of the transmitting device, etc. The communication device can perform the functions performed by the transmitting device above through hardware, or can perform the corresponding software implementation through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or cooperate with the processing module to complete the following transceiver operations; accordingly, the processing module can also independently complete the following processing operations, or cooperate with the transceiver module to complete the following processing operations, without limitation.

[0062] Exemplarily, a processing module is configured to determine (K+C1*L1) first positions based on the reliability corresponding to a first sequence of length N2; map A information bits and L1 first CRC bit sequences in the information bit sequence to (A+C1*L1) first positions of a second sequence of length (N2-N1) in the first sequence to obtain a third sequence; perform polarization coding on the third sequence to obtain a coded bit sequence; and a transceiver module is configured to output one or more bits of the coded bit sequence. N2 is an integer multiple of the length N1 of the mother code for initial data transmission; K is the length of the information bit sequence; C1 is the length of the first cyclic redundancy check (CRC) bit sequence; L1 is the number of first CRC bit sequences; N1, N2, K, C1, and L1 are all positive integers; the L1 first position groups are included in the (A+C1*L1) first positions, and the information bits in the i-th first position group in the L1 first position groups are used to determine the i-th first CRC bit sequence in the L1 first CRC bit sequences.

[0063] Optionally, the transceiver module and processing module of the communication device in the third aspect can also perform the corresponding functions in the above-mentioned first aspect or any possible design of the first aspect. Please refer to the detailed description in the method example for details. The beneficial effects that can be achieved can also be referred to the above-mentioned related content.

[0064] In a fourth aspect, an embodiment of the present application provides a communication device, which can be applied to the receiving device of the second aspect above to implement the functions performed by the receiving device above. The communication device can be a receiving device, or a chip or chip system or system on chip of the receiving device, etc. The communication device can perform the functions performed by the receiving device above through hardware, or it can perform the corresponding software implementation through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; accordingly, the processing module can also independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0065] Exemplarily, the transceiver module is used to receive information to be decoded from a transmitting device; the processing module is used to determine (K+C1*L1) first positions based on the reliability corresponding to the first sequence of length N2; and decode the information to be decoded based on the (A+C1*L1) first positions. Among them, the length of the information bit sequence corresponding to the information to be decoded is K; N2 is an integer multiple of the mother code length N1 of the initial data transmission; C1 is the length of the first CRC bit sequence; L1 is the number of first CRC bit sequences; N1, N2, K, C1, and L1 are all positive integers; (A+C1*L1) first positions in the (K+C1*L1) first positions correspond to A information bits and L1 first CRC bit sequences in the information bit sequence; L1 first position groups are included in (A+C1*L1) first positions in the (K+C1*L1) first positions, and the information bits in the i-th first position group in the L1 first position groups are used to determine the i-th first CRC bit sequence in the L1 first CRC bit sequences.

[0066] Optionally, the transceiver module and processing module of the communication device in the fourth aspect can also perform the corresponding functions in the above-mentioned second aspect or any possible design of the second aspect. Please refer to the detailed description in the method example for details. The beneficial effects that can be achieved can also be found in the above-mentioned related content.

[0067] In a fifth aspect, an embodiment of the present application provides a communication device, which includes one or more processors; one or more processors are used to run computer programs or instructions, and when the one or more processors execute the computer instructions or instructions, the communication method described in any one of the first to second aspects is executed.

[0068] In one possible design, the communication device further includes one or more memories, the one or more memories being coupled to one or more processors, and the one or more memories being used to store the above-mentioned computer programs or instructions. In one possible implementation, the memory is located outside the communication device. In another possible implementation, the memory is located within the communication device. In an embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together. In one possible implementation, the communication device further includes a transceiver, and the transceiver is used to receive information and / or send information.

[0069] In one possible design, the communication device further includes one or more communication interfaces, the one or more communication interfaces are coupled to one or more processors, and the one or more communication interfaces are used to communicate with other modules outside the communication device.

[0070] In a sixth aspect, an embodiment of the present application provides a communication device, which includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to execute the communication method described in either the first aspect or the second aspect, and process and / or generate information based on the information.

[0071] In the seventh aspect, an embodiment of the present application provides a computer-readable storage medium, which stores computer instructions or programs. When the computer instructions or programs are run on a computer, the communication method described in either the first aspect or the second aspect is executed.

[0072] In an eighth aspect, an embodiment of the present application provides a computer program product comprising computer instructions, which, when executed on a computer, enables the communication method as described in either the first aspect or the second aspect to be executed.

[0073] In a ninth aspect, an embodiment of the present application provides a computer program, which, when executed on a computer, enables the communication method described in either the first aspect or the second aspect to be executed.

[0074] In the tenth aspect, an embodiment of the present application provides a chip, comprising: a processor, the processor being coupled to a memory, the memory being used to store programs or instructions, and when the programs or instructions are executed by the processor, the communication method described in either the first aspect or the second aspect is executed.

[0075] Among them, the technical effects brought about by any design method in the fifth to tenth aspects can refer to the technical effects brought about by any one of the first or second aspects mentioned above, and will not be repeated here.

[0076] In the eleventh aspect, an embodiment of the present application provides a communication system, which may include a communication device for performing the communication as described in the first aspect or any possible design of the first aspect, and a communication device for performing the communication as described in the second aspect or any possible design of the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0077] FIG1 is a schematic diagram of a Polar code provided in an embodiment of the present application;

[0078] FIG2 is a schematic diagram of SC decoding of a Polar code provided in an embodiment of the present application;

[0079] FIG3 is a schematic diagram of a Polar code cascade CRC encoding method provided in an embodiment of the present application;

[0080] FIG4 is a schematic diagram of CA-SCL decoding of a Polar code provided in an embodiment of the present application;

[0081] FIG5 is a schematic diagram of an IR-HARQ framework based on Polar codes provided in an embodiment of the present application;

[0082] FIG6 is a schematic diagram of sequence transmission based on sub-block interleaving provided in an embodiment of the present application;

[0083] FIG7 is a schematic diagram of encoding and decoding based on an error detection code provided in an embodiment of the present application;

[0084] FIG8 is a schematic diagram of a communication system provided in an embodiment of the present application;

[0085] FIG9 is a schematic diagram of encoding and decoding performed by a transmitting device and a receiving device according to an embodiment of the present application;

[0086] FIG10 is a schematic diagram of a Polar code encoding chain provided in an embodiment of the present application;

[0087] FIG11 is a schematic diagram of a communication device provided in an embodiment of the present application;

[0088] FIG12 is a flow chart of a communication method provided in an embodiment of the present application;

[0089] FIG13 is a schematic diagram of encoding and decoding based on a first error detection bit sequence provided in an embodiment of the present application;

[0090] FIG14 is a schematic diagram of a transmitting end device provided in an embodiment of the present application;

[0091] FIG15 is a schematic diagram of a receiving device provided in an embodiment of the present application;

[0092] FIG16 is a schematic diagram of a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0093] Before describing the embodiments of the present application, the technical terms involved in the embodiments of the present application are described.

[0094] Polar codes are the first channel coding scheme rigorously proven to achieve Shannon channel capacity. They offer excellent error correction performance and low decoding complexity. They have been selected by the Third Generation Partnership Project (3GPP) as the coding scheme for the uplink and downlink control channels of enhanced mobile broadband (eMBB) scenarios in fifth-generation (5G) mobile communication systems.

[0095] In the Polar code encoding scheme, bit positions can be divided into fixed bit positions (also called frozen bit positions) and information bit positions based on their reliability. Bit positions with lower reliability are fixed bit positions and can be used to carry fixed bits (also called frozen bits). These fixed bits are usually set to 0 and are known to both the sender and receiver during actual transmission. Bit positions with higher reliability are information bit positions and can be used to carry information bits (data) during actual transmission.

[0096] For example, as shown in Figure 1, a typical Polar code encoding diagram with a length of 8 is provided. The positions of bits with higher reliability (such as u7, u6, u5, and u3) can be set as information bit positions, carrying information bits 0 or 1; the positions of bits with lower reliability (such as u4, u2, u1, and u0) can be set as fixed bit positions, carrying fixed bits, usually 0.

[0097] Polar code decoding: With the inclusion of Polar codes in the 5G standard, research on Polar code decoding has become a hot topic in communications. Mainstream Polar code decoding methods can be categorized into two types based on their decoding timing: sequential decoding and non-sequential decoding. Sequential decoding involves decoding bit by bit based on the inherent sequential nature of the Polar code design. Non-sequential decoding involves decoding the code bit by bit based on other Polar code structures (such as the Tanner graph and trellis graph) and outputting the decoding results in parallel.

[0098] For sequential decoding, the main Polar code decoding algorithms include successive cancellation (SC) decoding, successive cancellation list (SCL) decoding, successive cancellation stack (SCS) decoding, and cyclic redundancy check (CRC)-aided successive cancellation list (CA-SCL) decoding. For non-sequential decoding, the main Polar code non-sequential decoding algorithms include belief propagation (BP) decoding.

[0099] Polar codes primarily use sequential decoding. SCL decoding significantly improves decoding performance over SC decoding. Combined with CA-SCL decoding after CRC checking, Polar codes outperform low-density parity-check codes (LDPC) and Turbo codes. Therefore, SCL and CA-SCL decoding are primarily used in communication systems.

[0100] For SC decoding, when using the SC decoding algorithm to decode Polar codes, the log-likelihood ratio (LLR) of the information bit can be calculated step by step. For an information bit, if the LLR>0, the information bit is judged to be 0, and if the LLR<0, the information bit is judged to be 1. For frozen bits, regardless of the LLR, the frozen bit is set to 0. For example, as shown in Figure 2, a simple SC decoding diagram is provided. There are 8 computing nodes in Figure 2, including 4 f nodes and 4 g nodes. The calculation of the f node requires 2 LLR inputs on its right side, and the calculation of the g node requires 2 LLR inputs on its right side and 1 "partial sum" input above. Note that the output can only be calculated after the input items are calculated. According to the above rules, starting from the received signal on the right side of Figure 2, the 8 nodes are calculated in sequence, and the decoding sequence obtained is ①→②→③→④, which is the SC decoding process.

[0101] SCL decoding is an extension of SC decoding. Instead of determining the decoding result mid-process, SCL retains both the decoding results corresponding to 0 and 1, forming two candidate decoding paths. This approach allows the SCL algorithm to store multiple candidate paths and ultimately select a good candidate path using the path metric (PM, used to determine path quality) as the decoding result.

[0102] The corresponding Polar code for CA-SCL decoding with CRC checksum is also called Polar code cascade CRC, or CA-Polar for short. The encoding process of this Polar code is shown in Figure 3. The transmitting device sequentially performs CRC encoding and Polar encoding on the information block to obtain the coded block. The receiving device can decode the received information to be decoded based on CA-SCL decoding. After decoding, the receiving device selects a candidate path from the candidate paths output by the SCL decoder through CRC checksum as the decoded output. For example, bits in one candidate path from candidate paths 1, 2, and 3 shown in Figure 4 are selected as the decoded bits.

[0103] Based on the above description of Polar codes, information bits need to be placed in corresponding information bit positions before Polar code encoding. When constructing Polar codes for hybrid automatic repeat request (HARQ) transmission, the bit mapping process can be specially designed to reduce decoding complexity and improve decoding performance.

[0104] Among them, HARQ transmission can combine forward error correction (FEC) code with automatic repeat request (ARQ) method to significantly improve spectrum efficiency. The specific process may include the following steps:

[0105] Step 1: The sending device sends a coded bit sequence with a higher code rate as the initial transmission.

[0106] Step 2: The receiving device receives the symbol sequence and attempts to decode it.

[0107] If the receiving device decodes successfully, the receiving device may feed back an acknowledgment frame (ACK) to the sending device, and the sending device may stop sending based on the acknowledgment frame.

[0108] If the receiving device fails to decode, it can buffer the received symbol sequence and send a negative acknowledgement (NACK) frame back to the transmitting device. Alternatively, it can omit the negative acknowledgement frame. The transmitting device can continue to send the coded bit sequence if it receives a negative acknowledgement frame or does not receive an acknowledgment frame within a certain period of time. The receiving device can decode the two received sequences together.

[0109] Compared to sending data in multiple passes in a single HARQ transmission, this HARQ transmission allows transmission to be stopped if decoding is successful, improving system throughput. That is, if the initial transmission is successful, retransmission is not required, saving spectrum resources and improving spectrum efficiency. If the initial transmission is unsuccessful, the receiving device can decode the two received sequences together, still achieving the error correction performance of long codes.

[0110] Exemplarily, as shown in FIG5 , an IR-HARQ framework based on Polar code is provided, which may include an initial transmission sequence of length 8 (or also referred to as a U code) and a retransmission sequence of length 8 (or also referred to as a V code), and the initial transmission sequence and the retransmission sequence may be combined to form a coded bit sequence of length 16. In the initial transmission sequence, the positions of the bits filled with Figure 1 and Figure 2 are the positions of the information bits. In the retransmission sequence, the positions of the bits filled with Figure 3 are the positions of the information bits. There is a corresponding check relationship between the positions of the bits filled with Figure 3 and the positions of the bits filled with Figure 1, that is, the positions of the bits filled with Figure 3 and the positions of the bits filled with Figure 1 to which they are mapped are the same information bits.

[0111] Based on the Polar code described in Figure 5, the receiving device can decode the initial transmission sequence alone. The positions filled with patterns 1 and 2 are information bits. If decoding is successful, the transmitting device does not need to continue sending the coded bit sequence. If decoding fails, the receiving device can decode the initial transmission sequence and the retransmission sequence together. Specifically, it can decode the Polar code of length 16 composed of the initial transmission sequence and the retransmission sequence. The positions filled with patterns 2 and 3 are information bits. When decoding the position filled with pattern 1, the result has already been obtained by decoding the same position filled with pattern 3. The position filled with pattern 1 becomes a known value and can be understood as a dynamically frozen bit position.

[0112] Based on the above bit mapping relationship, it can be seen that the IR-HARQ framework based on Polar codes needs to form a corresponding check relationship between some information bits of the initial transmission sequence and some information bits of the retransmission sequence. In other words, it is necessary to map some information bits to both the initial transmission sequence and the retransmission sequence. This ensures that whether the initial transmission sequence is decoded alone or the initial transmission sequence and retransmission sequence are decoded jointly, the corresponding information bits are always carried in a highly reliable position, thereby improving decoding performance.

[0113] Furthermore, when implementing the HARQ transmission mechanism in a communication system, retransmission resources are determined by system scheduling and can be few or many. Therefore, it is best to support rateless transmission. This means that the encoding is done in advance, and the number of codeword bits to be sent is determined based on the number of retransmission resources. The corresponding number of codeword bits is then taken from the encoding and sent. In other words, "rateless" does not predetermine the code rate, but rather determines the code rate after the resources are given.

[0114] In addition, a flexible Polar code transmission mechanism is proposed, which can perform sub-block interleaving on the retransmission sequence to achieve the early transmission of low-code-rate sub-blocks through interleaving, thereby improving the performance of a small number of retransmissions without sacrificing the performance of a large number of retransmissions.

[0115] For example, as shown in FIG6 , the transmitting device may divide a retransmission sequence of length N into 32 sub-blocks (including sub-block 0, sub-block 1, sub-block 2, ..., sub-block 30, sub-block 31), each sub-block having a length of N / 32, and perform sub-block interleaving on the retransmission sequence before sending, thereby sending low-code-rate sub-blocks in advance through interleaving, such as sub-block 31, sub-block 27, sub-block 23, sub-block 19, sub-block 30, sub-block 26, sub-block 22, sub-block 18, sub-block 29, sub-block 25, sub-block 21, sub-block 17, sub-block 28, sub-block 24, sub-block 20, sub-block 16 in the order of sending, thereby improving the performance of a small number of retransmissions without sacrificing the performance of a large number of retransmissions.

[0116] Based on the above description, when a receiving device uses the above decoding method to decode a received sequence, the computational complexity and decoding latency of the receiving device will increase as the list expands, resulting in a decrease in the decoder's efficiency per unit area, limiting the improvement in Polar code decoding performance.

[0117] Based on this, encoding can be performed based on the asymmetric block-combined (ABC) Polar coding scheme. Specifically, error detection codes (ECCs) based on information bits can be inserted at specific positions (e.g., positions 1 / 2, 1 / 4, 3 / 4, etc.) of the mother code. When decoding to the ECC code, each decoding path can be verified against the decoding result. Paths that pass the verification can continue decoding, while paths that fail the verification are stopped. This allows paths that fail the verification to be discarded, reducing the decoder's storage and computational overhead.

[0118] However, in actual applications, the transmitted codeword bits may be incomplete, and the corresponding error detection code cannot detect errors. As a result, the Polar code sent this time cannot prune the paths that fail the check.

[0119] For example, taking the example of a retransmission sequence of length 16, as shown in Figure 7, which supports the transmission of Polar codes of arbitrary length, the positions filled with the bits shown in Figure 3 are information bits. The retransmission sequence includes seven information bits. Based on these seven information bits, an error detection code of length 2 can be determined, and this error detection code can be mapped to the last two bits of the retransmission sequence. As shown in Figure 7 (a), the transmitting device can send the entire retransmission sequence at once (i.e., the retransmission sequence is sent in its entirety, or the seven information bits corresponding to the error detection code are sent in their entirety), and the receiving device can perform error detection on the seven received information bits based on the received error detection code. Alternatively, as shown in (b) of Figure 7, the transmitting device can perform sub-block interleaving on the retransmission sequence based on the flexible Polar code transmission mechanism, and send low-rate sub-blocks in advance through interleaving. For example, the transmitting device can send bits 2-3, 6-7, 10-11, and 14-15 in a single retransmission process. During this retransmission process, the 7 information bits corresponding to the error detection code are not all sent (the 5th, 9th, and 13th bits of the retransmission sequence are not sent). The receiving device cannot perform error detection on the received 4 information bits (i.e., bits 6-7, 10-11 of the retransmission sequence) based on the received error detection code, and cannot perform path screening, thereby failing to reduce the decoder's storage and computational overhead and increasing decoding complexity.

[0120] In order to solve the above technical problems, an embodiment of the present application provides a communication method, in which a transmitting device can determine (K+C*L1) first positions based on the reliability corresponding to a first sequence of length N2; map A information bits and L1 first CRC bit sequences in the information bit sequence to (A+C*L1) first positions of a second sequence of length (N2-N1) in the first sequence to obtain a third sequence; polarization encode the third sequence to obtain a coded bit sequence; and output one or more bits of the coded bit sequence. Wherein, N2 is an integer multiple of the length N1 of the mother code of the initial data transmission; K is the length of the information bit sequence; C is the length of the first cyclic redundancy check CRC bit sequence; L1 is the number of first CRC bit sequences; N1, N2, K, C, and L1 are all positive integers; L1 first position groups are included in the (A+C*L1) first positions, and the information bits in the i-th first position group in the L1 first position groups are used to determine the i-th first CRC bit sequence in the L1 first CRC bit sequences.

[0121] In an embodiment of the present application, a new method for adding a CRC bit sequence to a Polar code is provided. This method enables path pruning based on the CRC bit sequence even when the transmitted codeword bits are incomplete, thereby reducing implementation complexity. For Polar codes that support the transmission of arbitrary lengths, information bits can be specifically selected for error detection. For example, whether the information bit participates in error detection can be determined based on the first position corresponding to the information bit. Specifically, the information bits in the i-th first position group of L1 first position groups can be selected for error detection, and the first CRC bit sequence in the i-th first position group can be determined based on the information bits in the i-th first position group. Thus, even if the entire codeword of the Polar code is not completely transmitted, as long as the i-th coded bit subsequence corresponding to the i-th first position group is completely transmitted, the receiving device can perform path screening based on the relevant information in the obtained third sequence, avoiding the situation where the information bits corresponding to the CRC bit sequence are not completely transmitted, resulting in the inability to perform path screening based on the CRC bit sequence. The communication method provided in the embodiment of the present application can effectively reduce the processing delay of the decoder, improve the area efficiency of the decoder, and improve the decoding performance.

[0122] The following describes in detail the implementation of the embodiments of the present application in conjunction with the accompanying drawings.

[0123] The communication method provided in the embodiments of the present application can be used in any communication system, which can be a 3GPP communication system, such as a long term evolution (LTE) system, or a 5G mobile communication system, a system of hybrid LTE and 5G networking, a NR system, an NR vehicle to everything (V2X) system, a device-to-device (D2D) communication system, a machine to machine (M2M) communication system, the Internet of Things (IoT), a narrowband Internet of Things (NB-IoT), a global system for mobile communications (GSM), an enhanced data rate for GSM evolution (EDGE), a wideband code division multiple access (WCDMA), a code division multiple access 2000 (CDMA2000), a time division-synchronization code division multiple access (TD-SCDMA), an enhanced mobile broadband (EMB) system. Broadband (eMBB), ultra-reliable and low-latency communication (URLLC), enhanced machine-type communication (eMTC), and various types of next-generation communication systems, such as the sixth generation (6G) mobile communication system, as well as non-terrestrial network (NTN) systems (such as satellite communication systems) and non-3GPP communication systems, are not restricted.

[0124] The communication method provided in the embodiments of the present application can be applied to various communication scenarios. For example, it can be applied to one or more of the following communication scenarios: coding of control channels, coding of data channels, etc., without limitation.

[0125] The communication system provided in the embodiment of the present application is described below using FIG8 as an example.

[0126] FIG8 is a schematic diagram of a communication system provided in an embodiment of the present application. As shown in FIG8 , the communication system may include at least one terminal device and at least one network device.

[0127] Among them, the terminal device in Figure 8 can be located within the beam / cell coverage of the network device, and the network device can provide communication services for the terminal device. Exemplarily, the network device can use channel coding to encode the downlink data, and transmit it to the terminal device through the air interface after constellation modulation (that is, the network device is a transmitting device, and the terminal device is a receiving device); the terminal device can also use channel coding to encode the uplink data, and send it to the network device through the air interface after constellation modulation (that is, the terminal device is a transmitting device, and the network device is a receiving device). It can be understood that when network devices communicate with each other, or when terminal devices communicate with each other, they can also communicate based on channel coding, that is, the transmitting device and the receiving device can both be network devices, or both be terminal devices, without limitation.

[0128] The terminal device in Figure 8 can be a device with wireless transceiver functions or a chip or chip system that can be set up in the device, which can allow users to access the network and is a device for providing voice and / or data connectivity to users. The terminal device can also be called user equipment (UE), subscriber unit (subscriber unit), terminal (terminal), mobile station (MS), mobile terminal (MT), etc.

[0129] Exemplarily, the terminal device in FIG8 may be a mobile phone, a tablet computer, or a computer with wireless transceiver function. The terminal device may also be a user station, a mobile station, a remote station, a remote terminal device, a mobile terminal device, a user terminal device, a wireless communication device, a user agent, a user device, a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a handheld device with wireless communication capabilities, a computing device, a processing device connected to a wireless modem, an in-vehicle device, a wearable device, a terminal device in the Internet of Things, a home appliance, a virtual reality (VR) terminal, an augmented reality (AR) terminal, a wireless terminal in industrial control, a wireless terminal in unmanned driving, a wireless terminal in telemedicine, a wireless terminal in a smart grid, a wireless terminal in a smart city, a wireless terminal in a smart home, a vehicle with vehicle-to-vehicle (V2V) communication capabilities, an intelligent connected vehicle, a UAV to UAV (UAV to Unmanned aerial vehicles (UAVs, U2Us) with communication capabilities, terminal devices in future networks, or terminal devices in future evolved public land mobile networks (PLMNs), etc. are not restricted.

[0130] The network device in Figure 8 can be any device deployed in an access network that can communicate wirelessly with a terminal device. It can also be a chip or chip system that can be set in the above-mentioned device, or a logical node or logical module or a function implemented in software. It can be used to implement wireless physical control functions, resource scheduling and wireless resource management, wireless access control, mobility management, etc. Specifically, the network device can be a device that supports wired access or a device that supports wireless access.

[0131] Exemplarily, the network device may be composed of one or more access network (AN) / radio access network (RAN) nodes. The AN / RAN nodes may be: a gNB, a transmission reception point (TRP), an evolved NodeB (eNB), a radio network controller (RNC), a NodeB (NB), a base station controller (BSC), a base transceiver station (BTS), a home evolved NodeB (HNB), a base band unit (BBU), or a wireless fidelity (Wi-Fi) access point (AP).

[0132] In another example, network equipment may include a baseband unit (BBU) and a remote radio unit (RRU). The BBU and RRU can be placed in different locations. For example, the RRU can be remotely located in a high-traffic area, while the BBU can be placed in a central computer room. The BBU and RRU can also be placed in the same computer room. The BBU and RRU can also be different components within the same rack.

[0133] In another example, the network device may also be a device including a centralized unit (CU) node, or a distributed unit (DU) node, or a CU node and a DU node. For example, the network device can be divided into CU and DU from a logical function perspective, with some protocol layer functions placed in the CU for centralized control, and the remaining part or all of the protocol layer functions distributed in the DU, which is centrally controlled by the CU. Furthermore, the centralized unit CU can also be divided into a control plane (CU-CP) and a user plane (CU-UP). In different systems, CU (including CU-CP or CU-UP) or DU may also have different names. For example, in an open radio access network (O-RAN) system, CU may also be called O-CU (open CU), DU may also be called O-DU, CU-CP may also be called O-CU-CP, and CU-UP may also be called O-CU-UP.

[0134] Based on the above description of the terminal device and the network device, optionally, the communication method provided in the embodiment of the present application can be implemented by the above-mentioned terminal device or network device, or by components of the terminal device or network device, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or software (such as program code in a memory) deployed in the terminal device or network device, without limitation.

[0135] Optionally, in an embodiment of the present application, the transmitting device (or referred to as a signal source) and the receiving device (or referred to as a signal sink) may perform encoding and decoding using the process shown in FIG. 9 below.

[0136] The transmitting device can perform source coding on the bits it generates to obtain a source bit stream. This source bit stream is then channel-coded and modulated before being sent to the receiving device via a noisy channel. When the receiving device receives the modulated symbols via the noisy channel, it can demodulate them and then perform channel decoding to recover the source bit stream. This is then followed by source recovery to obtain the decoding result.

[0137] Optionally, when the transmitting device performs Polar code encoding, it can be encoded based on the Polar code encoding chain shown in Figure 10, where the Polar code encoding chain may include encoding construction, second CRC encoding, bit mapping, first CRC encoding, first CRC bit mapping, Polar code encoding, bit interleaving and other processes.

[0138] Among them, the coding construction can obtain a set of information bit positions, a set of frozen bit positions and / or a check relationship between information bits. The second CRC coding is used to pre-code the information bits before the Polar code to obtain a second CRC bit sequence, and the second CRC bit sequence corresponds to the information bit sequence. Bit mapping can be used to map the information bits to the positions of corresponding information bits. The first CRC coding is used to perform CRC coding on the information bit sequence to obtain a first CRC bit sequence, and the first CRC bit sequence can correspond to part of the information bits in the information bit sequence. The first CRC bit mapping is used to map the first CRC bit to the corresponding bit position, and the Polar code coding is used to perform polarization coding on the sequence after bit mapping to obtain a Polar code coded bit sequence. Bit interleaving is used to interleave the Polar code.

[0139] In a specific implementation, as shown in FIG8 , each terminal device and network device may adopt the structure shown in FIG11 , or include the components shown in FIG11 . FIG11 is a schematic diagram of the structure of a communication device 1100 provided in an embodiment of the present application. The communication device 1100 may be a terminal device or a chip or system-on-chip in a terminal device; or a network device or a chip or system-on-chip in a network device. As shown in FIG11 , the communication device 1100 includes a processor 1101 , a transceiver 1102 , and a communication circuit 1103 .

[0140] Furthermore, the communication device 1100 may further include a memory 1104 . The processor 1101 , the memory 1104 and the transceiver 1102 may be connected via a communication line 1103 .

[0141] The processor 1101 is a central processing unit (CPU), a general-purpose processor, a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 1101 may also be other devices with processing functions, such as circuits, devices, or software modules, without limitation.

[0142] Transceiver 1102 is used to communicate with other devices or other communication networks. The other communication networks may be Ethernet, radio access networks (RAN), wireless local area networks (WLAN), etc. Transceiver 1102 may be a module, circuit, transceiver, or any device capable of communication.

[0143] The communication line 1103 is used to transmit information between the components included in the communication device 1100.

[0144] The memory 1104 is used to store instructions, where the instructions may be computer programs.

[0145] Among them, the memory 1104 can be a read-only memory (ROM) or other types of static storage devices that can store static information and / or instructions, or a random access memory (RAM) or other types of dynamic storage devices that can store information and / or instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), magnetic disk storage media or other magnetic storage devices, etc., without limitation.

[0146] It should be noted that memory 1104 can exist independently of processor 1101 or can be integrated with processor 1101. Memory 1104 can be used to store instructions, program code, or data. Memory 1104 can be located within or outside of communication device 1100, without limitation. Processor 1101 is configured to execute instructions stored in memory 1104 to implement the communication methods provided in the following embodiments of this application.

[0147] In one example, the processor 1101 may include one or more CPUs, such as CPU0 and CPU1 in FIG. 11 .

[0148] As an optional implementation, the communication device 1100 includes multiple processors. For example, in addition to the processor 1101 in FIG. 11 , it may also include a processor 1107 .

[0149] As an optional implementation, the communication apparatus 1100 further includes an output device 1105 and an input device 1106. For example, the input device 1106 is a keyboard, a mouse, a microphone, or a joystick, and the output device 1105 is a display screen, a speaker, or the like.

[0150] It should be noted that the communication device 1100 may be a desktop computer, a portable computer, a network server, a mobile phone, a tablet computer, a wireless terminal, an embedded device, a chip system, or a device having a structure similar to that shown in FIG11 . Furthermore, the structure shown in FIG11 does not limit the communication device. In addition to the components shown in FIG11 , the communication device may include more or fewer components than shown, or combine certain components, or arrange the components differently.

[0151] In the embodiment of the present application, the chip system can be composed of chips, or can include chips and other discrete devices.

[0152] In addition, the actions and terms involved in the various embodiments of this application can refer to each other without limitation. The message names or parameter names in the messages exchanged between the various devices in the embodiments of this application are only examples, and other names can also be used in specific implementations without limitation.

[0153] The communication method provided in an embodiment of the present application is described below in conjunction with the communication system shown in FIG8 and with reference to FIG12 below. The transmitting device may be any terminal device or network device in the communication system shown in FIG8, and the receiving device may also be any terminal device or network device in the communication system shown in FIG8. The transmitting device or receiving device described in the following embodiment may include the components shown in FIG11.

[0154] FIG12 is a flow chart of a communication method provided in an embodiment of the present application. As shown in FIG12 , the method may include:

[0155] Step 1201: The transmitting end device determines (K+C1*L1) first positions according to the reliability corresponding to the first sequence of length N2.

[0156] Among them, N2 is an integer multiple of the mother code length N1 of the initial data transmission; C1 is the length of the first error detection bit sequence, L1 is the number of the first error detection bit sequence; K is the length of the information bit sequence; N1, N2, K, C1, and L1 are all positive integers.

[0157] The transmitting end device may determine the mother code length N1 of the initial data transmission by referring to any of the following two possible implementations, and then determine the integer multiple length of N1 as N2:

[0158] In a first possible implementation, N1 may be the smallest integer power of 2 that is greater than or equal to M (the rate matching length corresponding to the information bit sequence).

[0159] For example, when M=252, N1=256. Or, when M=5, N1=8.

[0160] In a second possible implementation, the transmitting device may also determine the specific value of N1 in the following manner: based on the length K of the information bit sequence and the rate matching length M (or also referred to as the transmission length M) corresponding to the information bit sequence, calculate N3 as the smallest integer power of 2 greater than or equal to M (for example, if M is equal to 252, then N3 is equal to 256; or, if M is equal to 5, then N3 is equal to 8). Define R min Equal to 1 / 8, indicating the minimum supported bit rate, n min Equal to 5, nmax =10(upper row) / 5(lower row). If K / M is less than 9 / 16, and M is less than (1+1 / 8)*N3 / 2, then n1 is equal to log2(N3)-1. Otherwise, n1 is equal to log2(N3); n2 is equal to Calculate n equal to max{min{n1, n2, n max}, n min}, according to n, determine that N1 is equal to 2 n .

[0161] The above-mentioned information bit sequence may include information bits, CRC bits, and parity-check (PC) bits, or the information bit sequence may include information bits and CRC bits, or the information bit sequence may include information bits and parity-check bits, or the information bit sequence may include information bits themselves. K may be the sum of the number of information bits, the number of CRC bits, and the number of parity-check bits included in the information bit sequence. Alternatively, K may be the sum of the number of information bits and the number of CRC bits included in the information bit sequence. Alternatively, K may be the sum of the number of information bits and the number of parity-check bits included in the information bit sequence, or K may be the number of information bits included in the information bit sequence.

[0162] The error detection bit sequence may be any bit sequence that can be used for error detection or verification. The error detection bit sequence may also be referred to as an error detection code, a check code, or a check bit sequence, without limitation. For example, the error detection bit sequence may be a CRC bit sequence, a PC bit sequence, or a linear bit sequence, without limitation.

[0163] The length C of the error detection bit sequence may be predefined by the protocol, or may be preconfigured and is not limited.

[0164] The transmitting device can determine the number L of error detection bit sequences based on the length K of the information bit sequence and the rate matching length M corresponding to the information bit sequence. The L error detection bit sequences include L1 first error detection bit sequences and 1 second error detection bit sequence, where L is a positive integer. L1 can also be described as the number of first error detection bit sequences included in the V code.

[0165] The transmitting end device may determine the number L of error detection bit sequences based on the following steps 1 to 3:

[0166] Step 1: The transmitting device determines N1 based on the rate matching length M.

[0167] The transmitting device may determine N1 based on M with reference to the first possible implementation, or determine N1 based on K and M with reference to the second possible implementation.

[0168] Step 2: The sending device determines N2 based on N1.

[0169] Wherein, N2 is an integer multiple of N1. For example, N2=2*N1.

[0170] Step 3: The transmitting device determines the number L of error detection bit sequences according to N2 and the first value.

[0171] The first value may be any of the following values: 1024, 2048, or 4096.

[0172] Optionally, the number L of error detection bit sequences may be the result of rounding up the quotient of N2 and the first value, that is,

[0173] Where H0 is the first value. When N2 is less than or equal to H0, L is equal to 1. When N2 is greater than H0, segmentation is performed based on the length of H0. H0 can be 1024, 2048, or 4096, among others. It is understood that a larger H0 results in better performance but also more complex decoder implementation. A H0 of 2048 achieves a better balance.

[0174] Exemplarily, the number L of error detection bit sequences can be any of the following values: 1, 2, 4, or 8.

[0175] Exemplarily, the number L1 of the first error detection bit sequences can be any of the following values: 0, 1, 3, or 7.

[0176] For example, when N2 is twice as large as H0, the value of L1 is 1; or, when N2 is four times as large as H0, the value of L1 is 3.

[0177] For another example, when N2 is twice as much as N1, the value of L1 is 1; or, when N2 is four times as much as N1, the value of L1 is 3; or, when N2 is eight times as much as N1, the value of L1 is 7.

[0178] It is understandable that the transmitting end device may segment the encoded sequence according to the error detection bit sequence, and the number of error detection bit sequences may also be considered as the number of segments.

[0179] Exemplarily, the transmitting device may segment some bits of the encoded sequence (such as the V code) according to the first error detection bit sequence, such as dividing the V code into multiple segments according to the first error detection bit sequence, and each segment of the V code corresponds to a first error detection bit sequence.

[0180] In another example, the transmitting device may also segment some bits of the encoded sequence (such as V code) according to the first error detection bit sequence, and segment the remaining bits in the encoded sequence (such as U code) according to the second error detection bit sequence, such as dividing the U code into a segment according to the second error detection bit sequence, and the U code corresponds to a second error detection bit sequence.

[0181] In another example, the transmitting device may also segment some bits of the encoded sequence (such as V code) according to the first error detection bit sequence, and segment the remaining bits in the encoded sequence (such as U code) according to the first error detection bit sequence and the second error detection bit sequence. For example, the U code is divided into multiple segments according to the first error detection bit sequence and the second error detection bit sequence, the last segment of the U code corresponds to a second error detection bit sequence, and each of the remaining segments corresponds to a first error detection bit sequence.

[0182] The first error detection bit sequence is used for path pruning, early stopping, etc. in the segment. When the number of the second error detection bit sequence is 1, the second error detection bit is used for path selection and determining whether the decoding is successful after decoding.

[0183] It should be noted that, in the embodiment of the present application, the first error detection bit sequence is described by taking the example of any two first error detection bit sequences having the same length. It is understandable that there may also be at least two first error detection bit sequences with different lengths, which is not limited.

[0184] It is understandable that the lengths of the first error detection bit sequence and the second error detection bit sequence may be the same or different, without limitation.

[0185] In addition, the polynomials of any two first error detection bit sequences may be the same or different. The polynomials of the first error detection bit sequence and the second error detection bit sequence may be the same or different, without limitation.

[0186] Exemplarily, taking the error detection bit sequence as a CRC bit sequence as an example, the first error detection bit sequence may be a first CRC bit sequence, and the second error detection bit sequence may be a second CRC bit sequence.

[0187] It can be understood that in the embodiment of the present application, the larger the value of K, the larger the value of N1, or the larger the value of N2, the more error detection bit sequences there are, that is, the larger the value of L. Alternatively, the larger the value of K, the larger the value of N1, or the larger the value of N2, the more first error detection bit sequences there are, that is, the larger the value of L1.

[0188] Based on the above description, after determining the specific values ​​of K, C1, and L1, the transmitting end device can determine (K+C1*L1) first positions according to the reliability corresponding to the first sequence of length N2.

[0189] The transmitting end device may determine the reliability corresponding to the first sequence according to the reliability sequence of length N2, and further determine (K+C1*L1) first positions.

[0190] The reliability sequence may be used to indicate the reliability corresponding to the position of each bit of the sequence. A larger value of the reliability indicates a more reliable position corresponding to the reliability.

[0191] Optionally, the reliability sequence may be predefined by a protocol. The transmitting device may select a reliability sequence with a length of N2 from one or more reliability sequences predefined by the protocol.

[0192] For example, taking the transmitting end device determining that N2 is 32 as an example, the reliability sequence with a length of 32 may be the reliability sequence shown in the following Table 1, where: Represents reliability, Indicates the bit corresponding to the reliability:

[0193] Table 1

[0194] It can be understood that the above Table 1 is defined starting from bit 0, and can also be defined starting from bit 1, that is, the above 0, 1, ..., 31 can be replaced by 1, 2, ..., 32 respectively without limitation.

[0195] With reference to the above reliability sequence, the transmitting end device may sort by reliability and determine (K+C1*L1) first positions with reference to any one of the following two possible designs.

[0196] In the first possible design, the transmitting device can refer to the above reliability sequence, sort by reliability, and select the (K+C1*L1) bit positions with high reliability in the first sequence of length N2 as the (K+C1*L1) first positions.

[0197] For example, taking the reliability sequence as the reliability sequence of length N2 of 32 described in Table 1 above, and K as 15, C1 as 2, and L1 as 1, according to this reliability sequence, it can be determined that (K+C1*L1)=17 first positions are: {31 30 29 27 23 15 28 22 25 26 21 14 13 19 11 7 24}.

[0198] Optionally, the K first positions among the (K+C1*L1) first positions can be recorded as The position set I2 of the information bits in the first sequence of length N2 may include K first positions. The (C1*L1) first positions among the (K+C1*L1) first positions are denoted as A position set R2 of a first error detection bit sequence in a first sequence of length N2 is represented, and R2 may include (C1*L1) first positions.

[0199] For example,

[0200] Optionally, in each segment corresponding to the first error detection bit sequence, the last C1 first positions sorted in ascending order according to numbering may be determined as the first position corresponding to the first error detection bit sequence.

[0201] In the above-mentioned first possible design, the length K of the information bit sequence is described as including the second CRC bit sequence. It can be understood that the length K of the information bit sequence may also not include the second CRC bit sequence. In this case, reference can be made to the following second possible design, and the positions of the (K+C1*L1+C2) bits with high reliability of the first sequence with a length of N2 are selected according to reliability as the (K+C1*L1+C2) first positions, where C2 is the length of the second CRC bit sequence.

[0202] In the second possible design, the transmitting device may also refer to the above-mentioned reliability sequence, sort by reliability, select the positions of (K+C1*L1+C2) bits with high reliability in the first sequence of length N2 as the (K+C1*L1+C2) first positions, and determine the (K+C1*L1) first positions based on the (K+C1*L1+C2) first positions.

[0203] Illustratively, the (K+C1*L1) first positions may be the (K+C1*L1) first positions among the (K+C1*L1+C2) first positions, excluding the first position corresponding to the second error detection bit sequence. The first position corresponding to the second error detection bit sequence may be the last C2 first positions among the (K+C1*L1+C2) first positions, numbered in ascending order. Alternatively, it can be described as follows: the (K+C1*L1) first positions may be the first (K+C1*L1) first positions among the (K+C1*L1+C2) first positions, numbered in ascending order.

[0204] For example, taking the reliability sequence as the reliability sequence with a length N2 of 32 described in Table 1 above, and K being 15, C1 being 2, L1 being 1, and C2 being 2 as an example, according to this reliability sequence, it can be determined that (K+C1*L1+C2)=19 first positions are: {31 30 29 27 23 15 28 22 25 26 21 14 13 19 11 7 24 20 12}, the first position corresponding to the second error detection bit sequence can be {31 30}, and the (K+C1*L1) first positions can be {29 27 23 15 28 22 25 26 21 14 13 19 11 7 24 20 12}.

[0205] Optionally, the K first positions among the (K+C1*L1) first positions can be recorded as The position set I2 of the information bits in the first sequence of length N2 may include K first positions. The (C1*L1) first positions among the (K+C1*L1) first positions are denoted as A position set R2 of a first error detection bit sequence in a first sequence of length N2 is represented, and R2 may include (C1*L1) first positions.

[0206] Optionally, in each segment corresponding to the first error detection bit sequence, the last C1 first positions sorted in ascending order according to numbering may be determined as the first position corresponding to the first error detection bit sequence in the segment.

[0207] Step 1202: The transmitting device maps the A information bits and L1 first error detection bit sequences in the information bit sequence to the (A+C1*L1) first positions of the second sequence of length (N2-N1) in the first sequence to obtain a third sequence.

[0208] The transmitting device may determine the A information bits by referring to any of the following two possible designs:

[0209] In the first possible design, the transmitting device can determine K second positions based on the reliability corresponding to the fourth sequence of length N1, determine A second positions based on the K second positions, and determine the information bits corresponding to the A second positions as A information bits.

[0210] The transmitting end device may determine the reliability corresponding to the fourth sequence according to the reliability sequence of length N1, and further determine the K second positions.

[0211] Optionally, the transmitting device may select a reliability sequence with a length of N1 from one or more reliability sequences predefined in the protocol.

[0212] For example, taking the transmitting end device determining that N1 is 16 as an example, the reliability sequence with a length of 16 may be the reliability sequence shown in the following Table 2, where: Represents reliability, Indicates the bit corresponding to the reliability:

[0213] Table 2

[0214] It can be understood that the above Table 2 is defined starting from bit 0, and can also be defined starting from bit 1, that is, the above 0, 1, ..., 15 can be replaced by 1, 2, ..., 16 respectively without limitation.

[0215] Referring to the above reliability sequence, the transmitting end device may sort by reliability and select K bits of the fourth sequence of length N1 with high reliability as K second positions.

[0216] Exemplarily, taking the reliability sequence as the reliability sequence with a length N1 of 16 as described in Table 2 above, and the length K of the information bit sequence as 15, according to the reliability sequence, the K second positions can be determined as: {15 14 13 11 7 12 10 6 9 5 3 8 4 2 1}.

[0217] Optionally, the K second positions can be recorded as It represents a second position set I1 in a sequence of length N1, and I1 may include K second positions.

[0218] For example,

[0219] Based on the above description of the K second positions, optionally, the A second positions may be the last A second positions in the K second positions sorted from high to low in terms of reliability.

[0220] For example, taking K as 15, A as 3, and the K second positions as {15 14 13 11 7 12 10 6 9 5 3 8 4 2 1}, the A second positions may be {4 2 1}.

[0221] Based on the above description of the K second positions and the A second positions, the transmitting device can map the information bit sequence to the K second positions, and then determine the A information bits corresponding to the A second positions. That is, the A information bits are the information bits corresponding to the A second positions among the K second positions corresponding to the information bit sequence.

[0222] Optionally, the transmitting device may map the information bit sequence to K second positions according to the third interleaving pattern.

[0223] In the second possible design, the transmitting device can determine (K+C2) second positions based on the reliability corresponding to the fourth sequence of length N1, determine K second positions based on the (K+C2) second positions, determine A second positions based on the K second positions, and determine the information bits corresponding to the A second positions as A information bits.

[0224] The transmitting end device may determine the reliability corresponding to the fourth sequence according to the reliability sequence of length N1, and further determine (K+C2) second positions.

[0225] Optionally, the transmitting device may select a reliability sequence with a length of N1 from one or more reliability sequences predefined in the protocol.

[0226] Referring to the above reliability sequence, the transmitting end device may sort by reliability and select the (K+C2) bit positions of the fourth sequence of length N1 with high reliability as the (K+C2) second positions.

[0227] Among them, the K second positions in the (K+C2) second positions can be recorded as The position set I1 of the information bits in the fourth sequence of length N1 may include K second positions. The C2 second positions in the (K+C2) second positions are recorded as A position set R1 of a second error detection bit sequence in a fourth sequence of length N1 is represented, and R1 may include C2 second positions.

[0228] Based on the above description of the (K+C2) second positions, the K second positions may be the K second positions among the (K+C2) second positions excluding the second position corresponding to the second error detection bit sequence.

[0229] Illustratively, the second position corresponding to the second error detection bit sequence may be the last C2 second positions, numbered in ascending order, among the (K+C2) second positions. Alternatively, it may be described as follows: the K second positions may be the first K second positions, numbered in ascending order, among the (K+C2) second positions.

[0230] Exemplarily, the second positions corresponding to the second error detection bit sequence may be C2 second positions among the (K+C2) second positions, and the K second positions may be the remaining K second positions among the (K+C2) second positions.

[0231] Based on the above description of the K second positions, optionally, the A second positions may be the last A second positions in the K second positions sorted from high to low in terms of reliability.

[0232] Based on the above description of the K second positions and the A second positions, the transmitting device can map the information bit sequence to the K second positions, and then determine the A information bits corresponding to the A second positions. That is, the A information bits are the information bits corresponding to the A second positions among the K second positions corresponding to the information bit sequence.

[0233] Optionally, the transmitting device may map the information bit sequence to K second positions according to the third interleaving pattern.

[0234] For the above (A+C1*L1) first positions, the transmitting end device may determine the (A+C1*L1) first positions by referring to any one of the following two possible designs:

[0235] In a first possible design, the (A+C1*L1) first positions may be the (A+C1*L1) first positions numbered less than (N2-N1) among the (K+C1*L1) first positions with high reliability in the first sequence.

[0236] Among them, when the transmitting device refers to the reliability sequence, sorts according to the reliability, and selects the (K+C1*L1) bit positions with high reliability of the first sequence with a length of N2 as the (K+C1*L1) first positions, the (A+C1*L1) first positions can be the (A+C1*L1) first positions with numbers less than (N2-N1) among the (K+C1*L1) first positions.

[0237] In a second possible design, the (A+C1*L1) first positions may be the (A+C1*L1) first positions numbered less than (N2-N1) among the (K+C1*L1+C2) first positions with high reliability in the first sequence.

[0238] Among them, when the transmitting device refers to the reliability sequence and sorts according to the reliability, and selects the (K+C1*L1+C2) bit positions with high reliability of the first sequence with a length of N2 as the (K+C1*L1+C2) first positions, and determines the (K+C1*L1) first positions based on the (K+C1*L1+C2) first positions, the (A+C1*L1) first positions can be the (A+C1*L1) first positions among the (K+C1*L1+C2) first positions whose numbers are less than (N2-N1).

[0239] Based on the above description of A information bits and (A+C1*L1) first positions, the transmitting device can map the A information bits and L1 first error detection bit sequences to the (A+C1*L1) first positions of the second sequence with a length of (N2-N1) in the first sequence to obtain a third sequence.

[0240] The second sequence may be a sequence consisting of the first (N2-N1) bits of the first sequence.

[0241] Among them, L1 first position groups are included in (A+C1*L1) first positions, and the information bits in the i-th first position group in the L1 first position groups are used to determine the i-th first error detection bit sequence in the L1 first error detection bit sequences; i = 0, 1, 2, …, L1-1.

[0242] Specifically, the transmitting end device may determine L1 first position groups based on (A+C1*L1) first positions. Different first position groups may correspond to different segments, or the first position included in each segment may be described as a first position group.

[0243] Optionally, the transmitting end device may determine the first positions included in each first position group according to the first interleaving pattern.

[0244] Specifically, the transmitting end device may select Q sub-blocks from each segment in a backward order according to the first interleaving pattern, and determine the first position of the Q sub-blocks as the first position group in the segment.

[0245] The value of Q can be an integer power of 2, such as 2, 4, 8, or 16, without limitation.

[0246] Exemplarily, the first interleaving pattern may be any of the following patterns: [1 5 9 13 2 6 10 14 3 7 11 15 4 8 12 16 17 21 25 29 18 22 26 30 19 23 27 31 20 24 28 32]; or, [1 5 2 6 3 7 4 8 9 13 10 14 11 15 12 16]; or, [1 3 2 4 5 7 6 8]; or, [1 2 3 5 4 6 7 8 9 17 10 18 11 19 12 20 13 21 14 22 15 23 16 24 25 26 27 29 28 30 31 32].

[0247] The first and second of the four patterns described above are based on row-column interleaving, which is simple to implement. The third pattern is determined based on the reliability order of the sub-blocks, which can improve decoding performance. The fourth pattern is compatible with NR. Multiple possible designs are provided for the first interleaving pattern.

[0248] For example, taking the first interleaving pattern of [1 5 9 13 2 6 10 14 3 7 11 15 4 8 12 16 17 21 25 29 18 22 26 30 19 23 27 31 20 24 28 32] as an example, assuming that the length N2 of the first sequence is twice that of N1, L1 can be equal to 1, that is, there can be one first error detection bit sequence, and the first sequence of length N2 can be divided into two segments. If the transmitting device sends 4 sub-blocks each time (that is, Q is equal to 4), then according to the above first interleaving pattern, the first positions in the 32nd, 28th, 24th, and 20th sub-blocks in the first segment can be determined as the first first position group.

[0249] Based on the above description of the L1 first position groups, when the transmitting device performs bit mapping, the L1 first error detection bit sequences can respectively correspond to the last C1 first positions in each of the L1 first position groups, which are sorted in ascending order according to the numbers. It can also be described as the L1 first error detection bit sequences can respectively correspond to the largest C1 first positions in each of the L1 first position groups, which are sorted in ascending order according to the numbers. In addition, the A information bits can correspond to the A first positions among the (A+C1*L1) first positions excluding the (C1*L1) first positions.

[0250] Among them, the transmitting device can map A information bits to A first positions, and then determine the specific value of the first error detection bit sequence in the i-th first position group based on the information bits in the i-th first position group in the L1 first position groups, and map it to the last C1 first positions in the i-th first position group sorted from low to high according to the numbering, to obtain a third sequence; i = 0, 1, 2,…, L1-1.

[0251] The A first positions and the A second positions each correspond to the A information bits, and a corresponding check relationship exists between the A first positions and the A second positions, which can reduce decoding complexity and improve decoding performance. Optionally, the transmitting device can map the A information bits to the A first positions according to the second interleaving pattern.

[0252] Optionally, the transmitting end device may perform some transformation on part or all of the information bits in the i-th first position group to obtain a first error detection bit sequence in the i-th first position group.

[0253] For example, the transmitting device may perform CRC encoding on the information bits in the i-th first position group to obtain the first error detection bit sequence in the i-th first position group. Alternatively, the transmitting device may determine some or all of the information bits in the i-th first position group as the first error detection bit sequence in the i-th first position group, etc., without limitation.

[0254] The partial information bits in the i-th first position group may be a subset of all the information bits in the i-th first position group. For example, the partial information bits may be the first X information bits, numbered in ascending order, of all the information bits; or the partial information bits may be the last Y information bits, numbered in ascending order, of all the information bits, without limitation. Both X and Y are positive integers.

[0255] The above description separately describes the first positions of the A information bits and the first positions of the L1 first error detection bit sequences. It is understandable that they do not need to be described separately, that is, (A+C1*L1) first positions can be determined, and the first error detection bit sequence can be directly sorted after each first position group (or each segment) during bit mapping, thereby achieving the above purpose.

[0256] Step 1203: The transmitting device performs polarization coding on the third sequence to obtain a coded bit sequence.

[0257] Step 1204: The transmitting device outputs one or more bits of the coded bit sequence; correspondingly, the receiving device receives the information to be decoded from the transmitting device.

[0258] The length of the information bit sequence corresponding to the information to be decoded is K.

[0259] Among them, one or more bits in the coded bit sequence sent by the transmitting device to the receiving device may be affected by interference such as noise when transmitted through the channel. The information to be decoded received by the receiving device is one or more bits in the coded bit sequence affected by interference such as noise.

[0260] Step 1205: The receiving end device determines (K+C1*L1) first positions according to the reliability corresponding to the first sequence of length N2.

[0261] Among them, the description of the receiving end device determining (K+C1*L1) first positions can refer to the above-mentioned description of the transmitting end device determining (K+C1*L1) first positions, and is not repeated here.

[0262] Step 1206: The receiving device decodes the information to be decoded according to the (A+C1*L1) first positions.

[0263] Among them, (A+C1*L1) first positions among the (K+C1*L1) first positions correspond to A information bits and L1 first CRC bit sequences in the information bit sequence; the L1 first position groups are included in the (A+C1*L1) first positions among the (K+C1*L1) first positions, and the information bits in the i-th first position group among the L1 first position groups are used to determine the i-th first CRC bit sequence in the L1 first CRC bit sequences.

[0264] Among them, for the (A+C1*L1) first positions and L1 first position groups, reference can be made to the aforementioned description of the (A+C1*L1) first positions and L1 first position groups, and no further details are given.

[0265] Specifically, the last C1 first positions in each of the L1 first position groups, which are sorted from low to high according to the numbers, respectively correspond to L1 first CRC bit sequences, that is, the largest C1 first positions in each of the L1 first position groups, which are sorted from small to large according to the numbers; the A first positions in the (A+C1*L1) first positions except the (C1*L1) first positions correspond to A information bits.

[0266] The receiving device may perform path screening according to the acquired first error detection bit sequence to improve decoding performance.

[0267] Based on the method shown in FIG12 above, the embodiment of the present application provides a new method for adding error detection bit sequences to Polar codes. This method enables path pruning based on the error detection bit sequence even when the transmitted codeword bits are incomplete, thereby reducing implementation complexity. For Polar codes that support transmission of arbitrary lengths, information bits can be specifically selected for error detection. For example, whether the information bit participates in error detection can be determined based on the first position corresponding to the information bit. Specifically, the information bits in the i-th first position group of L1 first position groups can be selected for error detection, and the first CRC bit sequence in the i-th first position group can be determined based on the information bits in the i-th first position group. Thus, even if the entire codeword of the Polar code is not transmitted in full, as long as the i-th coded bit subsequence corresponding to the i-th first position group is transmitted, the receiving device can perform path screening based on the relevant information in the obtained third sequence, avoiding the situation where the information bits corresponding to the error detection bit sequence are not fully transmitted, resulting in the inability to perform path screening based on the error detection bit sequence. The communication method provided in the embodiment of the present application can effectively reduce the processing delay of the decoder, improve the area efficiency of the decoder, and improve decoding performance.

[0268] For example, taking the example of a retransmission sequence of length 16, which supports the transmission of Polar codes of arbitrary length, as shown in FIG13 , the retransmission sequence can be the first (N2-N1)=16 bits of the third sequence (i.e., bits 0-15 arranged in descending order in FIG13 ). The positions filled with the bits in FIG3 are information bit positions. The retransmission sequence includes 7 information bits (i.e., bits 5-7, 9-11, and 13 of the retransmission sequence). A first error detection bit sequence can be determined based on information bits 3-6 of the 7 information bits (i.e., bits 9-11 and 13 of the retransmission sequence), and the first error detection bit sequence is mapped to the last two bit positions of the retransmission sequence (i.e., the positions filled with bits 14 and 15 of FIG4 in FIG13 ). That is, the first error detection bit sequence corresponds to the two largest first positions (i.e., the 14th and 15th bit positions of the retransmission sequence) in a first position group (including the 9th-11th and 13th-15th bit positions of the retransmission sequence) numbered from small to large.

[0269] When the transmitting device performs sub-block interleaving on the retransmission sequence based on the flexible Polar code transmission mechanism, for example, the interleaving pattern is [0 4 1 5 2 6 3 7 8 12 9 13 10 14 11 15] to pre-send low-rate sub-blocks through interleaving, assuming a retransmission length of 8, the transmitting device can send bits 8-15 of the retransmission sequence in a single retransmission. Bits 0-7 of the retransmission sequence are the bits that are rate-matched during this retransmission (or described as bits that are not transmitted during this retransmission). During this retransmission, the four information bits corresponding to the first error detection bit sequence (i.e., bits 9-11 and 13 of the retransmission sequence) are all transmitted. The receiving device can perform error detection on the four received information bits (i.e., bits 9-11 and 13 of the retransmission sequence) based on the obtained first error detection bit sequence, and can then perform path screening, reducing the decoder's storage and computational overhead and improving decoding performance.

[0270] Based on the method shown in Figure 12 above, optionally, for each segment (or first position group) corresponding to the first error detection bit sequence, if the number of first positions in the segment (or first position group) corresponding to the first error detection bit sequence is less than a second value, the first error detection bit sequence in the segment (or first position group) can be removed, that is, the first error detection bit sequence does not need to be added to the segment (or first position group).

[0271] The second value may be predefined by the protocol, or may be preconfigured, without limitation.

[0272] Exemplarily, the second value may be a value greater than or equal to the length C1 of the first error detection bit sequence.

[0273] It is understood that the transmitting end device may add only the first error detection bit sequence to the V code based on the method shown in FIG12 . Alternatively, the transmitting end device may, while adding the first error detection bit sequence to the V code based on the method shown in FIG12 , add the second error detection bit sequence and / or the first error detection bit sequence to the U code with reference to any one or more of the following two possible designs, without limitation.

[0274] In a first possible design, the transmitting device may segment some bits of the encoded sequence (such as the V code, or the above-mentioned second sequence) according to the first error detection bit sequence, and also segment the remaining bits in the encoded sequence (such as the U code, or the fourth sequence described below) according to the second error detection bit sequence. For example, the U code (or the fourth sequence described below) is determined as a segment according to the second error detection bit sequence, and the U code (or the fourth sequence described below) corresponds to a second error detection bit sequence, or it is described as adding a second error detection bit sequence to the U code (or the fourth sequence described below), and the second error detection bit sequence is determined according to the information bit sequence.

[0275] Specifically, the transmitting device may determine (K+C2) second positions based on the reliability corresponding to the fourth sequence of length N1; map the information bit sequence and a second error detection bit sequence to the (K+C2) second positions of the fourth sequence in the first sequence to obtain a third sequence. Correspondingly, the receiving device may also determine (K+C2) second positions based on the reliability corresponding to the fourth sequence of length N1, and decode the received information to be decoded based on the (K+C2) second positions.

[0276] The fourth sequence may be a sequence consisting of the last N1 bits of the first sequence. A second error detection bit sequence may be determined based on the information bit sequence. The description of the (K+C2) second positions can refer to the relevant description in step 1202 above and is not repeated here.

[0277] Wherein, one second position group is included in the (K+C2) second positions. Exemplarily, the transmitting end device may determine the second position in the fourth sequence as the one second position group.

[0278] Based on the above description of a second position group, when the transmitting device performs bit mapping, a second error detection bit sequence can correspond to the last C2 second positions in a second position group sorted from low to high according to the numbering, and the information bit sequence corresponds to the K second positions in a second position group except the C2 second positions.

[0279] Among them, the sending device can map the K information bits of the information bit sequence to K second positions, and then determine the specific value of the second error detection bit sequence based on the K information bits, and map it to the last C2 second positions in the second position group sorted from low to high according to the numbering, to obtain a third sequence.

[0280] Optionally, the transmitting device may map the K information bits to K second positions according to a third interleaving pattern.

[0281] Accordingly, when performing decoding, the receiving device can determine (K+C2) second positions based on the reliability corresponding to the fourth sequence of length N1, and decode the information to be decoded based on the (K+C2) second positions. That is, the last C2 second positions in a second position group, numbered in ascending order, correspond to a second error detection bit sequence; and the K second positions in a second position group other than the C2 second positions correspond to the information bit sequence.

[0282] The above description separately describes the second positions of the K information bits and the second position of one second error detection bit sequence. It is understandable that they do not need to be described separately, that is, (K+C2) second positions can be determined, and the second error detection bit sequence can be directly sorted after the second position group during bit mapping, thereby achieving the above purpose.

[0283] In a second possible design, the transmitting device can segment some bits of the encoded sequence (such as the V code, or the above-mentioned second sequence) according to the first error detection bit sequence, and can also segment the remaining bits in the encoded sequence (such as the U code, or the fourth sequence described below) according to one or more first error detection bit sequences. For example, the U code (or the fourth sequence described below) is divided into multiple segments according to one or more first error detection bit sequences, and the U code (or the fourth sequence described below) corresponds to one or more first error detection bit sequences, or is described as adding one or more first error detection bit sequences to the U code (or the fourth sequence described below), and the first error detection bit sequence is determined based on some information bits in the information bit sequence.

[0284] Specifically, the transmitting device may determine (K+C1*L2) second positions based on the reliability corresponding to the fourth sequence of length N1; map the information bit sequence and L2 first error detection bit sequences to the (K+C1*L2) second positions of the fourth sequence in the first sequence to obtain a third sequence. Correspondingly, the receiving device may also determine (K+C1*L2) second positions based on the reliability corresponding to the fourth sequence of length N1, and decode the received information to be decoded based on the (K+C1*L2) second positions.

[0285] The fourth sequence may be a sequence consisting of the last N1 bits of the first sequence. L2 is the number of first error detection bit sequences included in the fourth sequence, or L2 is the number of first error detection bit sequences included in the U code.

[0286] The transmitting end device may determine the number L2 of the first error detection bit sequences in the U code according to the length K of the information bit sequence and the rate matching length M corresponding to the information bit sequence.

[0287] The transmitting end device may determine the number L2 of the first error detection bit sequences based on the following steps 1 and 2:

[0288] Step 1: The transmitting device determines N1 based on the rate matching length M.

[0289] The transmitting end device may refer to the description in the above step 1201 to determine N1 according to M, or determine N1 according to K and M, which will not be described in detail.

[0290] Step 2: The transmitting end device determines the number L2 of the first error detection bit sequences according to N1 and the first value.

[0291] The first value may be any of the following values: 1024, 2048, or 4096.

[0292] Optionally, the number L2 of the first error detection bit sequence may be the result of rounding up the quotient of N1 and the first value, that is,

[0293] Where H0 is the first value. When N1 is less than or equal to H0, L2 is equal to 0. When N1 is greater than H0, segmentation is performed based on the length of H0. H0 can be 1024, 2048, or 4096, among others. It is understood that a larger H0 results in better performance but also more complex decoder implementation. A H0 of 2048 achieves a better balance.

[0294] Exemplarily, the number L2 of the first error detection bit sequences can be any of the following values: 0, 1, 2 or 3.

[0295] Based on the above description, after determining the specific value of L2, the transmitting end device can determine (K+C1*L2) second positions according to the reliability corresponding to the fourth sequence of length N1.

[0296] The transmitting end device may determine the reliability corresponding to the fourth sequence according to the reliability sequence of length N1, and further determine (K+C1*L2) second positions.

[0297] Specifically, the transmitting end device may determine (K+C1*L2) second positions by sorting according to reliability and referring to any one of the following two possible designs.

[0298] In the first possible design, the transmitting device can refer to the reliability sequence, sort by reliability, and select the (K+C1*L2) bit positions with high reliability of the fourth sequence of length N1 as the (K+C1*L2) second positions.

[0299] Optionally, in each segment corresponding to the first error detection bit sequence, the last C1 first positions sorted in ascending order of numbers may be determined as the second positions corresponding to the first error detection bit sequence.

[0300] In the above-mentioned first possible design, the length K of the information bit sequence is described as including the second CRC bit sequence. The length K of the information bit sequence may also not include the second CRC bit sequence. In this case, the following second possible design can be referred to, and the positions of (K+C1*L2+C2) bits with high reliability of the fourth sequence with a length of N1 are selected according to reliability as the (K+C1*L2+C2) second positions, where C2 is the length of the second CRC bit sequence.

[0301] In the second possible design, the transmitting device may also refer to the above-mentioned reliability sequence, sort by reliability, select the positions of (K+C1*L2+C2) bits with high reliability of the fourth sequence of length N1 as the (K+C1*L2+C2) second positions, and determine the (K+C1*L2) second positions based on the (K+C1*L2+C2) second positions.

[0302] Illustratively, the (K+C1*L2) second positions may be the (K+C1*L2) second positions among the (K+C1*L2+C2) second positions, excluding the second position corresponding to the second error detection bit sequence. The second position corresponding to the second error detection bit sequence may be the last C2 second positions, numbered in ascending order, among the (K+C1*L2+C2) second positions. Alternatively, it may be described as follows: the (K+C1*L2) second positions may be the first (K+C1*L2) second positions, numbered in ascending order, among the (K+C1*L2+C2) second positions.

[0303] Optionally, in each segment corresponding to the first error detection bit sequence, the last C1 second positions sorted in ascending order according to numbering may be determined as the second position corresponding to the first error detection bit sequence in the segment.

[0304] Based on the above description of the (K+C1*L2) second positions, the transmitting device can map the information bit sequence and L2 first error detection bit sequences to the (K+C1*L2) second positions of the fourth sequence to obtain a third sequence.

[0305] Among them, L2 second position groups are included in (K+C1*L2) second positions, and the information bits in the j-th second position group in the L2 second position groups are used to determine the j-th first error detection bit sequence in the L2 first error detection bit sequences; j=0, 1, 2,…, L2-1.

[0306] Specifically, the transmitting end device may determine L2 second position groups based on (K+C1*L2) second positions. Different second position groups may correspond to different segments, or the second position included in each segment may be described as a second position group.

[0307] Optionally, the transmitting end device may determine the second positions included in each second position group according to the first interleaving pattern.

[0308] Specifically, the transmitting end device may select Q sub-blocks from each segment in a backward order according to the first interleaving pattern, and determine the second positions in the Q sub-blocks as the second position group in the segment.

[0309] The value of Q can be an integer power of 2, such as 2, 4, 8, or 16, without limitation.

[0310] Based on the above description of the L2 second position groups, when the transmitting device performs bit mapping, the L2 first error detection bit sequences can respectively correspond to the last C1 second positions in each of the L2 second position groups, sorted from low to high according to the numbers, and the K information bits can correspond to the K second positions in the (K+C1*L2) second positions except the (C1*L2) second positions.

[0311] Among them, the transmitting device can map K information bits to K second positions, and then determine the specific value of the first error detection bit sequence in the jth second position group based on the information bits in the jth second position group in the L2 second position groups, and map it to the last C1 second positions in the jth second position group sorted from low to high according to the numbering, to obtain a third sequence.

[0312] Optionally, the transmitting end device may perform some transformation on part or all of the information bits in the j-th second position group to obtain a first error detection bit sequence in the j-th second position group.

[0313] For example, the transmitting device may perform CRC encoding on the information bits in the jth second position group to obtain the first error detection bit sequence in the jth second position group. Alternatively, the transmitting device may determine some or all of the information bits in the jth second position group as the first error detection bit sequence in the jth second position group, etc., without limitation.

[0314] The partial information bits in the j-th second position group may be a subset of all the information bits in the j-th second position group. For example, the partial information bits may be the first X information bits, numbered in ascending order, of all the information bits; or the partial information bits may be the last Y information bits, numbered in ascending order, of all the information bits, without limitation. Both X and Y are positive integers.

[0315] The above description separately describes the second positions of the K information bits and the second positions of the L2 first error detection bit sequences. It is understandable that they do not need to be described separately, that is, (K+C1*L2) second positions can be determined, and the first error detection bit sequence can be directly sorted after each second position group (or each segment) during bit mapping, thereby achieving the above purpose.

[0316] Accordingly, when performing decoding, the receiving device can determine (K+C1*L2) second positions based on the reliability corresponding to the fourth sequence of length N1, and decode the information to be decoded based on the (K+C1*L2) second positions. That is, the last C1 second positions in each of the L2 second position groups, sorted in ascending order by number, correspond to the first error detection bit sequence; and the K second positions in the L2 second position groups, excluding the (C1*L2) second positions, correspond to the information bit sequence.

[0317] Based on the second possible design described above, optionally, for each segment (or second position group) corresponding to the first error detection bit sequence, if the number of second positions in the segment (or second position group) corresponding to the first error detection bit sequence is less than a second value, the first error detection bit sequence in the segment (or second position group) can be removed, that is, there is no need to add the first error detection bit sequence to the segment (or second position group).

[0318] Optionally, different from the above-mentioned sending end device mapping the first error detection bit sequence to the first position and / or second position of the first sequence, the sending end device may also map the first error detection bit sequence to the position of the frozen bit of the first sequence.

[0319] The transmitting end device may map the first error detection bit sequence to the positions of the frozen bits in the Q sub-blocks where the corresponding information bits are located. The description of the Q sub-blocks may refer to the relevant description in step 1202 above and is not limited thereto.

[0320] When all frozen bit positions in the Q sub-blocks carry the first error detection bit sequence, it can be called a full check (full check) or a partial full check (partial full check).

[0321] Unlike the requirement that "when constructing a Polar code for HARQ transmission (i.e., the third sequence including the V code and the U code), the transmitting device adds one or more first error detection bit sequences to the V code and / or adds a second error detection bit sequence and / or one or more first error detection bit sequences to the U code," when constructing a Polar code for non-HARQ transmission (e.g., a fifth sequence of length N1), the transmitting device may add a second error detection code and / or one or more first error detection bit sequences to the fifth sequence.

[0322] The fifth sequence can also be understood as the above-mentioned U code, that is, when the transmitting device constructs the Polar code for non-HARQ transmission, it can add a second error detection code and / or one or more first error detection bit sequences to the U code.

[0323] Among them, the description of the sending end device adding a second error detection code and / or one or more first error detection bit sequences to the U code can refer to the above related description and will not be repeated here.

[0324] It should be noted that the various embodiments of this application can be implemented independently or in combination, without limitation. Unless otherwise specified or there is a logical conflict, the terms and / or descriptions of the different embodiments provided in this application are consistent and can be referenced by each other. The technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0325] It is understood that in the embodiments of the present application, the execution subject may perform some or all of the steps in the embodiments of the present application. These steps or operations are merely examples, and the embodiments of the present application may also perform other operations or variations of various operations. In addition, the various steps may be performed in a different order than those presented in the embodiments of the present application, and it is possible that not all operations in the embodiments of the present application need to be performed.

[0326] The above mainly introduces the solution provided by the embodiment of the present application from the perspective of interaction between devices. It is understandable that, in order to realize the above functions, each device includes a hardware structure and / or software module corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the algorithm steps of each example described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0327] The embodiments of the present application can divide the functional modules of each device according to the above method examples. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in the embodiments of the present application is schematic and is only a logical function division. In actual implementation, there may be other division methods.

[0328] In the case of dividing each functional module according to each function, Figure 14 shows a sending end device 140, which can execute the actions performed by the sending end device in the method shown in Figures 12 to 13 above. All relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiment and will not be repeated here.

[0329] The transmitting device 140 may include a transceiver module 1401 and a processing module 1402. Exemplarily, the transmitting device 140 may be a communications device, or a chip used in a communications device, or other combined device or component having the aforementioned functions of the transmitting device. When the transmitting device 140 is a communications device, the transceiver module 1401 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 1402 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the transmitting device 140 is a component having the aforementioned functions of the transmitting device, the transceiver module 1401 may be a radio frequency unit; the processing module 1402 may be a processor (or processing circuit), such as a baseband processor. When the transmitting device 140 is a system-on-chip (SoC), the transceiver module 1401 may be the input / output interface of the chip (e.g., a baseband chip); the processing module 1402 may be the system-on-chip's processor (or processing circuit), which may include one or more central processing units. It should be understood that the transceiver module 1401 in the embodiment of the present application can be implemented by a transceiver or a transceiver-related circuit component; the processing module 1402 can be implemented by a processor or a processor-related circuit component (or, referred to as a processing circuit).

[0330] For example, the transceiver module 1401 can be used to perform all transceiver operations performed by the transmitting device in the embodiments shown in Figures 12 to 13, and / or to support other processes of the technology described in this document; the processing module 1402 can be used to perform all operations other than transceiver operations performed by the transmitting device in the embodiments shown in Figures 12 to 13, and / or to support other processes of the technology described in this document.

[0331] Figure 15 shows a receiving end device 150, which can execute the actions performed by the receiving end device in the method shown in Figures 12 to 13 above. All relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module. The technical effects that can be obtained can refer to the above method embodiment and will not be repeated here.

[0332] The receiving device 150 may include a transceiver module 1501 and a processing module 1502. Exemplarily, the receiving device 150 may be a communications device, or a chip used in a communications device, or other combined device or component having the aforementioned functions of the receiving device. When the receiving device 150 is a communications device, the transceiver module 1501 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 1502 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the receiving device 150 is a component having the aforementioned functions of the receiving device, the transceiver module 1501 may be a radio frequency unit; the processing module 1502 may be a processor (or processing circuit), such as a baseband processor. When the receiving device 150 is a system-on-chip (SoC), the transceiver module 1501 may be the input / output interface of the chip (e.g., a baseband chip); the processing module 1502 may be the system-on-chip's processor (or processing circuit), which may include one or more central processing units. It should be understood that the transceiver module 1501 in the embodiment of the present application can be implemented by a transceiver or a transceiver-related circuit component; the processing module 1502 can be implemented by a processor or a processor-related circuit component (or, referred to as a processing circuit).

[0333] For example, the transceiver module 1501 can be used to perform all transceiver operations performed by the receiving device in the embodiments shown in Figures 12 to 13, and / or to support other processes of the technology described in this document; the processing module 1502 can be used to perform all operations other than transceiver operations performed by the receiving device in the embodiments shown in Figures 12 to 13, and / or to support other processes of the technology described in this document.

[0334] As another possible implementation, transceiver module 1401 in Figure 14 can be replaced by a transceiver that integrates the functionality of transceiver module 1401; processing module 1402 can be replaced by a processor that integrates the functionality of processing module 1402. Furthermore, transmitting device 140 shown in Figure 14 can also include a memory. Alternatively, transceiver module 1501 in Figure 15 can be replaced by a transceiver that integrates the functionality of transceiver module 1501; processing module 1502 can be replaced by a processor that integrates the functionality of processing module 1502. Furthermore, receiving device 150 shown in Figure 15 can also include a memory.

[0335] Alternatively, when the processing module 1402 is replaced by a processor and the transceiver module 1401 is replaced by a transceiver, the transmitting device 140 involved in the embodiment of the present application may also be the communication device 160 shown in Figure 16. Alternatively, when the processing module 1502 is replaced by a processor and the transceiver module 1501 is replaced by a transceiver, the receiving device 150 involved in the embodiment of the present application may also be the communication device 160 shown in Figure 16.

[0336] The processor may be a logic circuit 1601, and the transceiver may be an interface circuit 1602. Furthermore, the communication device 160 shown in FIG16 may further include a memory 1603.

[0337] The embodiments of the present application also provide a computer program product, which, when executed by a computer, can implement the functions of any of the above method embodiments.

[0338] The embodiments of the present application also provide a computer program, which, when executed by a computer, can implement the functions of any of the above method embodiments.

[0339] The embodiment of the present application also provides a computer-readable storage medium. All or part of the processes in the above-mentioned method embodiments can be completed by a computer program to instruct the relevant hardware, and the program can be stored in the above-mentioned computer-readable storage medium. When the program is executed, it can include the processes of the above-mentioned method embodiments. The computer-readable storage medium can be an internal storage unit of the terminal (including the data sending end and / or the data receiving end) of any of the above-mentioned embodiments, such as the hard disk or memory of the terminal. The above-mentioned computer-readable storage medium can also be an external storage device of the above-mentioned terminal, such as a plug-in hard disk equipped on the above-mentioned terminal, a smart memory card (smart media card, SMC), a secure digital (secure digital, SD) card, a flash card (flash card), etc. Further, the above-mentioned computer-readable storage medium can also include both the internal storage unit of the above-mentioned terminal and an external storage device. The above-mentioned computer-readable storage medium is used to store the above-mentioned computer program and other programs and data required by the above-mentioned terminal. The above-mentioned computer-readable storage medium can also be used to temporarily store data that has been output or is to be output.

[0340] It should be noted that the terms "first" and "second" in the specification, claims and drawings of this application are used to distinguish different objects, rather than to describe a specific order. "First" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this embodiment, unless otherwise specified, "multiple" means two or more.

[0341] Furthermore, the terms "include," "comprise," and "have," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0342] It should be understood that in this application, "at least one (item)" refers to one or more. "Multiple" refers to two or more. "At least two (items)" refers to two or three and more than three. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships can exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple. “When” and “if” both mean that corresponding measures will be taken under certain objective circumstances. They do not limit the time, nor do they require any judgment action when they are implemented, nor do they mean that there are other limitations.

[0343] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner to facilitate understanding.

[0344] In this application, "sending information to ... (a terminal device)" can be understood as the destination of the information being the terminal device. This can include sending information directly or indirectly to the terminal device. "Receiving information from ... (a terminal device)" can be understood as the source of the information being the terminal device. This can include receiving information directly or indirectly from the terminal device. The information may undergo necessary processing between the source and destination, such as formatting changes, but the destination can still understand the valid information from the source.

[0345] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0346] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the modules or units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0347] The units described as separate components may or may not be physically separate, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple places. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0348] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0349] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a ROM, a RAM, a magnetic disk, or an optical disk.

Claims

1. A communication method, characterized in that: include: Determine (K+C1*L1) first positions based on the reliability corresponding to the first sequence of length N2; where N2 is an integer multiple of the length N1 of the mother code of the initial data transmission; K is the length of the information bit sequence; C1 is the length of the first cyclic redundancy check CRC bit sequence; L1 is the number of the first CRC bit sequence; N1, N2, K, C1, and L1 are all positive integers; Mapping the A information bits and L1 first CRC bit sequences in the information bit sequence to (A+C1*L1) first positions of a second sequence of length (N2-N1) in the first sequence to obtain a third sequence; wherein the L1 first position groups are included in the (A+C1*L1) first positions, and the information bits in the i-th first position group in the L1 first position groups are used to determine the i-th first CRC bit sequence in the L1 first CRC bit sequences; performing polarization coding on the third sequence to obtain a coded bit sequence; One or more bits of the coded bit sequence are output.

2. The method according to claim 1, characterized in that When N2 is twice as large as N1, the value of L1 is 1; or When N2 is 4 times of N1, the value of L1 is 3; or When N2 is 8 times of N1, the value of L1 is 7.

3. The method according to claim 1 or 2, characterized in that The first position included in each of the first position groups is determined according to the first interleaving pattern.

4. The method according to claim 3, characterized in that The first interleaving pattern is any of the following patterns: [1 5 9 13 2 6 10 14 3 7 11 15 4 8 12 16 17 21 25 29 18 22 26 30 19 23 27 31 20 24 28 32]; or [1 3 2 4 5 7 6 8]; or [1 5 2 6 3 7 4 8 9 13 10 14 11 15 12 16]; or [1 2 3 5 4 6 7 8 9 17 10 18 11 19 12 20 13 21 14 22 15 23 16 24 25 26 27 29 28 30 31 32].

5. The method according to any one of claims 1 to 4, characterized in that The mapping of the A information bits and L1 first CRC bit sequences in the information bit sequence to (A+C1*L1) first positions of a second sequence of length (N2-N1) in the first sequence includes: The L1 first CRC bit sequences respectively correspond to the last C1 first positions in each of the L1 first position groups, sorted from low to high according to the numbers, and the A information bits correspond to the A first positions of the (A+C1*L1) first positions except the (C1*L1) first positions.

6. The method according to claim 5, characterized in that The A information bits correspond to the A first positions of the (A+C1*L1) first positions excluding the (C1*L1) first positions, including: The A first positions corresponding to the A information bits are determined according to a second interleaving pattern.

7. The method according to any one of claims 1 to 6, characterized in that The (A+C1*L1) first positions are the (A+C1*L1) first positions whose numbers are less than (N2-N1) among the (K+C1*L1) first positions with high reliability in the first sequence.

8. The method according to any one of claims 1 to 6, characterized in that The (A+C1*L1) first positions are the (A+C1*L1) first positions numbered less than (N2-N1) among the (K+C1*L1+C2) first positions with high reliability in the first sequence; where C2 is the length of the second CRC bit sequence; C2 is a positive integer.

9. The method according to any one of claims 1 to 8, characterized in that The method further comprises: Determine (K+C2) second positions according to the reliability corresponding to the fourth sequence of length N1, where C2 is the length of the second CRC bit sequence and C2 is a positive integer; The information bit sequence and the second CRC bit sequence are mapped to the (K+C2) second positions of the fourth sequence in the first sequence to obtain the third sequence; wherein the second CRC bit sequence is determined based on the information bit sequence.

10. The method according to claim 9, characterized in that Mapping the information bit sequence and the second CRC bit sequence to the (K+C2) second positions of the fourth sequence in the first sequence includes: The second CRC bit sequence corresponds to the last C2 second positions in the second position group sorted from low to high according to the numbering, and the information bit sequence corresponds to the K second positions in the second position group except the C2 second positions; wherein the second position group is included in the (K+C2) second positions.

11. The method according to claim 10, characterized in that The information bit sequence corresponds to K second positions other than C2 second positions in the second position group, including: The K second positions corresponding to the information bit sequence are determined according to the third interleaving pattern.

12. The method according to any one of claims 9 to 11, characterized in that: The A information bits are information bits corresponding to A second positions among the K second positions corresponding to the information bit sequence.

13. The method according to claim 12, characterized in that The A second positions are the last A second positions among the K second positions sorted from high to low according to reliability.

14. A communication method, characterized in that: include: Receiving information to be decoded from a transmitting end device; wherein the length of the information bit sequence corresponding to the information to be decoded is K; Determine (K+C1*L1) first positions based on the reliability corresponding to the first sequence of length N2; wherein N2 is an integer multiple of the mother code length N1 of the initially transmitted data; C1 is the length of the first cyclic redundancy check CRC bit sequence; L1 is the number of the first CRC bit sequences; N1, N2, K, C1, and L1 are all positive integers; (A+C1*L1) first positions among the (K+C1*L1) first positions correspond to A information bits in the information bit sequence and L1 first CRC bit sequences; L1 first position groups are included in (A+C1*L1) first positions among the (K+C1*L1) first positions, and the information bits in the i-th first position group among the L1 first position groups are used to determine the i-th first CRC bit sequence among the L1 first CRC bit sequences; The information to be decoded is decoded according to the (A+C1*L1) first positions.

15. The method according to claim 14, characterized in that When N2 is twice as large as N1, the value of L1 is 1; or When N2 is 4 times of N1, the value of L1 is 3; or When N2 is 8 times of N1, the value of L1 is 7.

16. The method according to claim 14 or 15, characterized in that The first positions included in each first position group are determined according to the first interleaving pattern.

17. The method according to claim 16, characterized in that The first interleaving pattern is any of the following patterns: [1 5 9 13 2 6 10 14 3 7 11 15 4 8 12 16 17 21 25 29 18 22 26 30 19 23 27 31 20 24 28 32]; or [1 3 2 4 5 7 6 8]; or [1 5 2 6 3 7 4 8 9 13 10 14 11 15 12 16]; or [1 2 3 5 4 6 7 8 9 17 10 18 11 19 12 20 13 21 14 22 15 23 16 24 25 26 27 29 28 30 31 32].

18. The method according to any one of claims 14 to 17, characterized in that: (A+C1*L1) first positions of the (K+C1*L1) first positions correspond to A information bits in the information bit sequence and L1 first CRC bit sequences, including: The last C1 first positions in each of the L1 first position groups, sorted from low to high according to the numbers, respectively correspond to the L1 first CRC bit sequences, and the A first positions in the (A+C1*L1) first positions except the (C1*L1) first positions correspond to the A information bits.

19. The method according to any one of claims 14 to 18, characterized in that: The (A+C1*L1) first positions are the (A+C1*L1) first positions whose numbers are less than (N2-N1) among the (K+C1*L1) first positions with high reliability in the first sequence.

20. The method according to any one of claims 14 to 18, characterized in that: The (A+C1*L1) first positions are the (A+C1*L1) first positions numbered less than (N2-N1) among the (K+C1*L1+C2) first positions with high reliability in the first sequence; where C2 is the length of the second CRC bit sequence; C2 is a positive integer.

21. The method according to any one of claims 14 to 20, characterized in that: The method further comprises: According to the reliability corresponding to the fourth sequence of length N1, (K+C2) second positions are determined; wherein C2 is the length of the second CRC bit sequence; C2 is a positive integer; the (K+C2) second positions correspond to the information bit sequence and the second CRC bit sequence; the second CRC bit sequence is determined based on the information bit sequence.

22. The method according to claim 21, characterized in that The (K+C2) second positions correspond to the information bit sequence and the second CRC bit sequence, including: The last C2 second positions in the second position group, sorted from low to high according to the numbering, correspond to the second CRC bit sequence; the K second positions other than the C2 second positions in the second position group correspond to the information bit sequence; wherein, the second position group is included in the (K+C2) second positions.

23. The method according to any one of claims 1 to 22, characterized in that The method further comprises: The number L1 of first cyclic redundancy check CRC bit sequences is determined according to the length K of the information bit sequence and the rate matching length M corresponding to the information bit sequence.

24. The method according to any one of claims 1 to 22, characterized in that The method further comprises: The number L of CRC bit sequences is determined based on the length K of the information bit sequence and the rate matching length M corresponding to the information bit sequence; wherein the L CRC bit sequences include the L1 first CRC bit sequences and one second CRC bit sequence, the second CRC bit sequence is a CRC bit sequence determined based on the information bit sequence, and L is a positive integer.

25. The method according to claim 24, characterized in that The determining the number L of CRC bit sequences according to the length K of the information bit sequence and the rate matching length M corresponding to the information bit sequence includes: Determine N1 according to the rate matching length M; Determine N2 according to N1; The number L of the CRC bit sequences is determined according to the N2 and the first value.

26. The method according to claim 25, characterized in that The first value is any of the following values: 1024, 2048, 4096.

27. The method according to claim 25 or 26, characterized in that The determining the number L of the CRC bit sequences according to the N2 and the first value includes: The number L of the CRC bit sequence is the result of rounding up the quotient of N2 and the first value.

28. The method according to any one of claims 24 to 27, characterized in that The N1 is the smallest integer power of 2 that is greater than or equal to the M.

29. The method according to any one of claims 24 to 28, characterized in that The number of CRC bit sequences is any of the following: 2, 4, or 8.

30. The method according to any one of claims 24 to 29, characterized in that The number of the second CRC bit sequence is 1.

31. A communication device, characterized in that: The communication device includes a processor; the processor is configured to execute a computer program or instruction so that the communication method according to any one of claims 1 to 13 and 23 to 30 is executed, or the communication method according to any one of claims 14 to 30 is executed.

32. A communication device, characterized in that: The communication device includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to execute the communication method described in any one of claims 1-13, 23-30, or execute the communication method described in any one of claims 14-30, and process and / or generate the information based on the information.

33. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions or programs, which, when executed on a computer, enable the communication method according to any one of claims 1 to 13, 23 to 30 to be executed, or enable the communication method according to any one of claims 14 to 30 to be executed.

34. A computer program product, characterized in that The computer program product includes computer instructions; when part or all of the computer instructions are executed on a computer, the communication method according to any one of claims 1 to 13, 23 to 30 is executed, or the communication method according to any one of claims 14 to 30 is executed.

Images