Transmitter circuitry

Abstract

In an example, transmitter circuitry is provided comprising a power amplifier and an impedance matching network connected between an output of the power amplifier and an antenna node for connection to an antenna. The impedance matching network is configured such that a phase difference of a signal between a first node and a second node is an odd integer multiple of (90) degrees, wherein the first node is between the output of the power amplifier and the impedance matching network, and the second node is between the impedance matching network and the antenna node. The transmitter circuitry also comprises a first scaling apparatus configured to receive a signal obtained from the first node, and second scaling apparatus configured to receive a signal obtained from the second node. The transmitter circuitry also comprises signal combining apparatus configured to combine a signal output from the first scaling apparatus and a signal output from the second scaling apparatus.

Description

[0001] TRANSMITTER CIRCUITRY

[0002] Technical Field

[0003] Example embodiments of this disclosure relate to transmitter circuitry, for example including an antenna impedance matching network.

[0004] In band full duplex (IBFD) and sub-band full duplex (SBFD) wireless communication systems suffer from self-interference (SI) due to the strong transmit signal being present at the antenna while receiving the weak receive signal, since the transmission and reception occur simultaneously and on the same frequency channel, as explained in Katanbaf et al, “Two- Way Traffic Ahead: RFVAnalog Self-Interference Cancellation Techniques and the Challenges for Future Integrated Full-Duplex Transceivers,” IEEE Microwave Magazine, vol. 20, no. 2, pp. 22-35, Feb. 2019. This reference suggests that successful IBFD relies on Sl- cancelation in multiple steps.

[0005] These are air interface isolation, RF & analog front-end (AFE) cancellation, and cancellation in the digital back end (DBE). There are four well known air interface isolation techniques. These are 1) separation of transmit (TX) and receive (RX) antennas, 2) use of circulators, 3) use of electrical balanced duplexer (EBD), and 4) separation of TX and RX polarizations. All four methods have significant drawbacks and limitations in the achievable isolation.

[0006] The transmitter (TX) to receiver (RX) isolation is the first step in Sl-cancellation and reduces the level of the strong transmitter signal at the receiver input. It is used to reduce the linearity and noise requirements of the receiver and to avoid compression of the low noise amplifier (LNA) and other parts in the receive chain before next level of Sl-cancellation. Furthermore, TX to RX isolation also relieves requirements on succeeding cancellation in RF, AFE, and DBE.

[0007] Nevertheless, RF and analog front-end SIC is needed to further suppress the strong transmitter signal to enable IBFD and SBFD. There are multiple AFE SIC techniques described in published literature such as N-path filters and analog FIR filters, that are placed between the PA and the LNA, for example as described in the Katanbaf et al reference referred to above. Another popular technique is to use vector based SIC to adjust amplitude and phase of SIC-signal. The vector based SIC can operate at base band frequencies after down conversion, as in van den Broek et al, “An In-Band Full-Duplex Radio Receiver With a Passive Vector Modulator Downmixer for Self-Interference Cancellation,” IEEE Journal of Solid-State Circuits, vol. 50, no. 12, pp. 3003-3014, Dec. 2015. Alternatively, the vector based SIC can operate directly at the carrier wave frequency, as in Essawy et al, “A Noise- Cancelling Self-Interference Canceller with +7 dBm Self-Interference Power Handling in 0.18p m CMOS,” 2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Atlanta, GA, USA, 2021 , pp. 95-98. Figure 2 of this reference shows a vector based SIC proposal operating at carrier wave frequency, where input quadrature signal I & Q (TX0 and TX90) are produced using a quadrature coupler.

[0008] Vector based SIC at base band can be accomplished using quadrature local oscillator (LO) signals in the down conversion. However, for vector based SIC that operates directly at the carrier frequency, generation of two phase shifted TX signals is required by the vector modulator to freely adjust the phase of the SIC signal. Typically, the two phase shifted signals are separated by 90 degrees, effectively making them orthogonal vectors, which makes it possible to represent any amplitude and phase by a simple linear combination of the two vectors. These two signals are referred to henceforth as TX0 and TX90.

[0009] Multiple methods to produce TX0 and TX90 exist, such as the use of quadrature hybrid couplers (QHC) as in the Essawy et al reference above, poly phase filters (PPF) and transformer-based solutions, all of which are complex and have drawbacks such as significant area consumption, bandwidth limitations, and in the Essawy et al reference >3dB power loss of the transmit signal.

[0010] US 10,020,837 B2 uses feedback for SI cancellation, and WO 2016 / 034740 A1 uses a coupler based CS CG topology. US 11 ,063,355 B2 uses a mixer combined LO to generate the TX0 and TX90 (I & Q), and US 10,790,594 B2 proposes a PPF based solution. US 11 ,627,024 B2 uses a wideband VM using Coupler and cross-switch (xfmr) for flipping phase.

[0011] Another method to generate a replica of the output signal is presented in US 8,817,671 B2, which proposes to use a matching resistor placed between the PA and the load. The voltage drop across the matching resistor is then fed back and used as SIC. This method has multiple drawbacks, and the most severe ones include the loss in the resistor and that the fed back SIC will only consist of a single phase. Summary

[0012] Examples of this disclosure may have certain advantages. For instance, examples of this disclosure can provide low loss and area efficient generation of signals, such as TXO and TX90 (orthogonal vectors), used in SIC at RF or carrier frequency. SIC signal may also contain transmitter noise as well as PA distortion. Proposed examples may avoid the 3dB loss in TX output power that is associated with the use of a quadrature hybrid coupler.

[0013] One aspect of the present disclosure provides transmitter circuitry comprising a power amplifier and an impedance matching network connected between an output of the power amplifier and an antenna node for connection to an antenna. The impedance matching network is configured such that a phase difference of a signal between a first node and a second node is an odd integer multiple of 90 degrees, wherein the first node is between the output of the power amplifier and the impedance matching network, and the second node is between the impedance matching network and the antenna node. The transmitter circuitry also comprises a first scaling apparatus configured to receive a signal obtained from the first node, and second scaling apparatus configured to receive a signal obtained from the second node. The transmitter circuitry also comprises signal combining apparatus configured to combine a signal output from the first scaling apparatus and a signal output from the second scaling apparatus.

[0014] Another aspect of the present disclosure provides a wireless communications device comprising the transmitter circuitry of the above aspect.

[0015] Brief Description of the Drawings

[0016] For a better understanding of examples of the present disclosure, and to show more clearly how the examples may be carried into effect, reference will now be made, by way of example only, to the following drawings in which:

[0017] Figure 1 illustrates an example of transmitter circuitry;

[0018] Figure 2 shows an example of a pi-shaped impedance matching network;

[0019] Figure 3 shows an example of a T-shaped impedance matching network;

[0020] Figure 4 shows an example of an L-shaped impedance matching network;

[0021] Figure 5 shows an example of a wireless communications device according to embodiments of this disclosure; and

[0022] Figure 6 shows an example of a transceiver 600. Detailed

[0023] The following sets forth specific details, such as particular embodiments or examples for purposes of explanation and not limitation. It will be appreciated by one skilled in the art that other examples may be employed apart from these specific details. In some instances, detailed descriptions of well-known methods, nodes, interfaces, circuits, and devices are omitted so as not obscure the description with unnecessary detail.

[0024] Typically, in a transmitter or transceiver, an impedance matching network is present at the output of a power amplifier (PA) to increase or maximize power transfer to the antenna. The main task of the matching network is to match the antenna impedance to a desired impedance level at the output of the PA. Examples of this disclosure propose that the matching network can be designed with the additional constraint that it should also produce a 90-degree phase shift (or an odd integer multiple thereof), such as that of a lambda / 4 transmission line. This additional constraint does not present any significant obstacle but opens up a possibility to tap off two quadrature signals, referred to as TXO and TX90, from the two sides of the matching network, which can be fed to a signal combining apparatus, for example a vector modulator (VM). The resulting signal produced by the signal combining apparatus may be used for example as a SIC-signal for the receiver. The signals TXO and TX90 are named such that TX refers to a transmitter signal, and the number xx in TXxx refers to a phase shift in degrees from a reference phase (for example, the reference phase may be the phase of a signal output from a power amplifier). Thus, TXO is a signal at 0 degrees relative to the phase of the signal at the output of the power amplifier, and TX90 is a signal at 90 degrees relative to the phase of the signal at the output of the power amplifier. In some examples, TXO may also be the signal at the output of the power amplifier.

[0025] Thus, embodiments of this disclosure propose designing the output matching network of the PA so that it produces a 90-degree phase shift (e.g. at the desired frequency, such as a carrier frequency or RF). For example, the signal at both sides of the matching network (e.g. TXO at the PA side and TX90 at the antenna side) may be provided to a signal combining apparatus such as a VM to be used to produce a SIC signal operating at RF, or for any other purpose. To achieve equal amplitude of the two signals, scaling or compensation for one of them may be used in some examples, due to different impedances seen at each side of the matching network, or due to the change in signal level between each side. Figure 1 illustrates an example of transmitter circuitry 100. The transmitter circuitry comprises a power amplifier 102, and an impedance matching network 104 connected between an output 106 of the power amplifier 102 and an antenna node 108 for connection to an antenna (not shown). The impedance matching network 104 is configured such that a phase difference of a signal (e.g. a modulated carrier or RF signal) between a first node 110 and a second node 112 is an odd integer multiple of 90 degrees. The first node 110 is between the output 106 of the power amplifier 102 and the impedance matching network 104, and the second node 112 is between the impedance matching network 104 and the antenna node 108. In the example shown, the nodes 106 and 110 are connected together directly or may be considered to be the same node, and similarly the nodes 108 and 112 are together directly or may be considered to be the same node. However, in some examples, one or more other components may be connected between the nodes 106 and 110, and / or the nodes 108 and 112. In the example shown in Figure 1, the nodes 106 and 110 are the same node, i.e. the signal output from the power amplifier 102 is provided directly to the impedance matching network 104 at the first node 110. However, in other examples there may be one or more additional components between the output 106 of the power amplifier 102 and the first node 110. Additionally, in the example shown in Figure 1 , the nodes 108 and 112 are the same node, though in other examples there may be one or more additional components between the nodes 108 and 112.

[0026] The transmitter circuitry 100 also comprises first scaling apparatus 114 configured to receive a signal obtained from the first node 110, and second scaling apparatus 116 configured to receive a signal obtained from the second node 112. In the example shown in Figure 1 , the node 110 is connected directly to the first scaling apparatus 114, and the node 112 is connected directly to the second scaling apparatus 116. Thus, for example, the signal obtained from the first node 110 may comprise a first voltage at the first node 110, and / or the signal obtained from the second node 112 comprises a second voltage at the second node 112. However, in other examples, other ways of providing a signal based on the nodes 110 or 112 to the first scaling apparatus 114 or second scaling apparatus 116 respectively may be used.

[0027] The transmitter circuitry 100 also comprises signal combining apparatus 118 configured to combine a signal output from the first scaling apparatus 114 and a signal output from the second scaling apparatus 116, for example by summing or linearly combining the signal output from the first scaling apparatus and the signal output from the second scaling apparatus. By adjusting the scaling applied by the first scaling apparatus 114 and / or the second scaling apparatus 116, in some examples the signal combining apparatus 118 may output a signal of a desired amplitude and / or phase at node 120. The signal combining apparatus 118 may be a vector modulator (VM) in some examples.

[0028] Thus, using the apparatus 114 and 116 with the signal combining apparatus 118 may for example improve the dynamic range of the SIC path, as in some examples of this disclosure losses are kept at a minimum and the amplitude imbalance between the signals present at nodes 110 and 112 is the smallest possible and with the highest possible signal amplitude / level. As a result, the first scaling apparatus 114 and the second scaling apparatus 116 will in some examples have a small difference in their scaling with the highest possible input signal to noise ratio (SNR), and this gives the smallest difference in SNR after scaling and therefore the best dynamic range at node 120. By choosing a desired linear combination in the signal combining apparatus 118 of the two signals output from the first scaling apparatus 114 and the second scaling apparatus 116, it possible to control both phase and amplitude of the signal at node 120. The accuracy of signal at node 120, which could be for example a SIC signal, can in some examples be further improved by using a fine-tuned variable gain amplifier (VGA) after the signal combining apparatus 118, thus improving the amplitude matching of the SIC-signal.

[0029] In some examples, the signals at nodes 110 and 112 may be considered to be the signals TX0 and TX90 respectively, for example where the impedance matching network causes a 90 degree phase difference between the nodes 110 and 112, although it is noted that in other examples other values for the phase difference may be used, such as for example 270 degrees, 450 degrees and so on (i.e. odd integer multiples of 90). The signal at the node 120 at the output of the signal combining apparatus 118 can be used for example as a self interference cancellation (SIC) signal in some examples, for example where the transmitter circuitry is used in a transceiver, where the SIC signal can be provided to the receiver for SIC.

[0030] In some examples, the signal at the output 106 of the power amplifier 102 comprises a single ended output. In such examples, the first scaling apparatus 114 may include first apparatus for selectively inverting the polarity of the signal obtained from the first node. Additionally or alternatively, the second scaling apparatus 116 includes second apparatus for selectively inverting the polarity of the signal obtained from the second node. The selective inversion can be used for example to output a signal from the signal combining apparatus 118 that may have an amplitude and / or phase in three or four quadrants in a Cartesian coordinate system using the signals based on nodes 110 and 112, which may be two orthogonal vectors TX0 and TX90 for example. In other examples, the output 106 of the power amplifier 102 may comprise a balanced output signal. In such examples, the impedance matching network 104 may comprise a first impedance matching network configured to receive a first signal of the balanced output signal and a second impedance matching network configured to receive a second signal of the balanced output signal. That is, for example, the impedance matching network 104 may comprise two single-ended impedance matching networks, one for each of the two signals comprising the balanced output signal from the power amplifier 102. However, in other examples, the impedance matching network 104 may be a single network that provides impedance matching and the phase difference for both signals of the balanced output signal from the power amplifier 102.

[0031] In examples where the power amplifier 102 provides a balanced output signal, the first scaling apparatus 114 may be configured to scale a first balanced signal obtained from the first node 110 and provide a first balanced scaled signal to the signal combining apparatus 118. Thus, a balanced signal may in some examples be provided to the first scaling apparatus 114, and may for example be considered as TX0 and TX180 signals. In some examples, the two signals of the balanced signal are scaled by the same amount in the first scaling apparatus 114, and then provided to the signal combining apparatus 118 as the first balanced scaled signal. However, in other examples, the input to the signal combining apparatus 118 may be single ended, in which case only one signal of the balanced signal pair provided to the first scaling apparatus 114 may be scaled and provided to the signal combining apparatus 118.

[0032] Similarly, the second scaling apparatus 116 may be configured to scale a second balanced signal obtained from the second node 112 and provide a second balanced scaled signal to the signal combining apparatus 118. The signal combining apparatus 118 may thus in some examples be configured to combine the first balanced scaled signal and the second balanced scaled signal. Thus, a balanced signal may in some examples be provided to the second scaling apparatus 116, and may for example be considered as TX90 and TX270 signals. In some examples, the two signals of the balanced signal are scaled by the same amount in the second scaling apparatus 116, and then provided to the signal combining apparatus 118 as the second balanced scaled signal. However, in other examples, the input to the signal combining apparatus 118 may be single ended, in which case only one signal of the balanced signal pair provided to the second scaling apparatus 116 may be scaled and provided to the signal combining apparatus 118. Thus, in some examples, the first scaling apparatus 114 may be configured to scale a first balanced signal obtained from the first node 110 and provide a first single ended scaled signal to the signal combining apparatus 118. Similarly, the second scaling apparatus 116 may be configured to scale a second balanced signal obtained from the second node 112 and provide a second single ended scaled signal to the signal combining apparatus. The signal combining apparatus 118 may then be configured to combine the first single ended scaled signal and the second single ended scaled signal.

[0033] Therefore, for example, where the power amplifier 102 provides a balanced output signal, any desired phase may be obtained from the signal combining apparatus 118 by appropriate scaling of each of the four signals TXO, TX90, TX180 and TX270.

[0034] In examples where the power amplifier 102 provides a balanced output signal, the transmitter circuitry 100 may include conversion apparatus (not shown in Figure 1) configured to convert a balanced signal at the second node 112 to a single ended signal, and to provide the single ended signal to the antenna node 108.

[0035] In some examples, the first scaling apparatus 114 is configured such that the signal output from the first scaling apparatus 114 is scaled by a first selectable amount. Additionally or alternatively, in some examples, the second scaling apparatus 114 is configured such that the signal output from the second scaling apparatus 116 is scaled by a second selectable amount. Thus, for example, the amounts of scaling can be selectable such that the signal at the node 120 at the output of the signal combining apparatus 118 has a selectable amplitude and / or phase. The first scaling apparatus 114 may in some examples comprise a first attenuator, and / or the second scaling apparatus 116 may in some examples comprise a second attenuator. Each attenuator may be for example a high impedance low noise attenuators, which may for example use capacitive voltage division.

[0036] In some examples, either the first scaling apparatus 114 or the second scaling apparatus 116 is configured to compensate for a change in a level of the signal between the input of the impedance matching network and the output of the impedance matching network. For example, as mentioned above, there may be a change in signal level (e.g. a drop in power or an increase or decrease in voltage) at the second node 112 as compared to the first node 110. The compensation thus compensates for this level difference, in some examples, such that the signal level output from the first scaling apparatus 114 and the second scaling apparatus 116 is substantially the same when the first and second scaling apparatus apply the same amount of scaling to their respective input signals. The signal combining apparatus 118 may in some examples configured to combine the signal output from the first scaling apparatus and the signal output from the second scaling apparatus by summing or linearly combining the signal output from the first scaling apparatus and the signal output from the second scaling apparatus.

[0037] The impedance matching network 104 may be any suitable impedance matching network, such as for example a pi-shaped impedance matching network, an L-shaped impedance matching network, and / or a T-shaped impedance matching network.

[0038] Figure 2 shows an example of a pi-shaped impedance matching network 200, which may be connected between the first node 110 and the second node 112 of the transmitter circuitry 100 in some examples. The impedance matching network 200 comprises an inductance 202 connected between the first node 110 and the second node 112. The impedance matching network 200 also comprises a first capacitance 204 connected between the first node 110 and a reference voltage (in this example ground), and comprises a second capacitance 206 connected between the second node 112 and the reference voltage (in this example ground). The values of the inductance 202 (Li) and capacitances 204 and 206 (Ci and C2 respectively) can be selected to provide the desired impedance as well as the 90 degree (or odd integer multiple thereof) phase difference between the nodes 110 and 112.

[0039] Figure 3 shows an example of a T-shaped impedance matching network 300, which may be connected between the first node 110 and the second node 112 of the transmitter circuitry 100 in some examples. The impedance matching network 300 comprises a first inductance 302 and a second inductance 304 connected in series between the first node 110 and the second node 112. The impedance matching network 300 also comprises a capacitance 306 connected between a reference voltage (in this example ground) and a node 308 between the first inductance 302 and the second inductance 304. The values of the inductances 302 and 304 (Li and L2 respectively) and capacitance 306 (Ci) can be selected to provide the desired impedance as well as the 90 degree (or odd integer multiple thereof) phase difference between the nodes 110 and 112.

[0040] Figure 4 shows an example of an L-shaped impedance matching network 400, which may be connected between the first node 110 and the second node 112 of the transmitter circuitry 100 in some examples. The impedance matching network 400 comprises an inductance 402 connected between the first node 110 and the second node 112. The impedance matching network 400 also comprises a capacitance 404 connected between the second node 112 and a reference voltage (in this example ground). The values of the inductance 402 (Li) and capacitance 404 (Ci) can be selected to provide the desired impedance as well as the 90 degree (or odd integer multiple thereof) phase difference between the nodes 110 and 112. In other examples, the capacitance 404 may instead be connected between the first node 110 and the reference voltage (e.g. ground).

[0041] The impedance matching networks 200, 300 and 400 illustrated in Figures 2-4 are nonlimiting examples and any suitable impedance matching network may be used.

[0042] Figure 5 shows an example of a wireless communications device 500 according to embodiments of this disclosure. The wireless communications device 500 comprises the transmitter circuitry 100 of any example described herein. Thus, in some examples, the wireless communications device 500 includes an antenna node 108 for connection to an antenna (not shown), and also a node 120 at which a signal from a signal combining apparatus 118 is provided. The signal at node 120 may in some examples be used for SIC in a receiver (not shown) of the wireless communications device 500.

[0043] Figure 6 shows an example of a transceiver 600. The transceiver 600 includes the transmitter circuitry 100 of any example described herein, and receiver circuitry 602. The transceiver 600 includes an antenna node 108 for connection to an antenna (not shown), and also a node 120 at which a signal from a signal combining apparatus 118 is provided. The signal at node 120 is provided to the receiver circuitry 602, where it may be used for SIC, for example due to a signal from the transmitter circuitry 100 received at an antenna (not shown) connected to an antenna node 604 of the receiver circuitry 602. Thus, the signal at node 120 is provided to SIC apparatus 606 in the receiver circuitry 602. The receiver circuitry 606 includes an output node 608 for providing a received signal, for example following SIC. In some examples, the transceiver 600 may be included in a wireless communications device. The antenna nodes 108 and 604 may be connected to the same antenna(s), or respectively to different transmit antenna(s) and receive antenna(s).

[0044] It should be noted that the above-mentioned examples illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative examples without departing from the scope of the appended statements. The word “comprising” does not exclude the presence of elements or steps other than those listed in a claim, “a” or “an” does not exclude a plurality, and a single processor or other unit may fulfil the functions of several units recited in the statements below. Where the terms, “first”, “second” etc. are used they are to be understood merely as labels for the convenient identification of a particular feature. In particular, they are not to be interpreted as describing the first or the second feature of a plurality of such features (i.e., the first or second of such features to occur in time or space) unless explicitly stated otherwise. Steps in the methods disclosed herein may be carried out in any order unless expressly otherwise stated. Any reference signs in the statements shall not be construed so as to limit their scope.

Claims

Claims1. T ransmitter circuitry comprising: a power amplifier; an impedance matching network connected between an output of the power amplifier and an antenna node for connection to an antenna; wherein the impedance matching network is configured such that a phase difference of a signal between a first node and a second node is an odd integer multiple of 90 degrees, wherein the first node is between the output of the power amplifier and the impedance matching network and the second node is between the impedance matching network and the antenna node; and wherein the transmitter circuitry comprises: first scaling apparatus configured to receive a signal obtained from the first node; second scaling apparatus configured to receive a signal obtained from the second node; and signal combining apparatus configured to combine a signal output from the first scaling apparatus and a signal output from the second scaling apparatus.

2. The transmitter circuitry of claim 1 , wherein the output of the power amplifier comprises a single ended output.

3. The transmitter circuitry of claim 2, wherein: the first scaling apparatus includes first apparatus for selectively inverting the polarity of the signal obtained from the first node; and / or the second scaling apparatus includes second apparatus for selectively inverting the polarity of the signal obtained from the second node.

4. The transmitter circuitry of claim 1 , wherein the output of the power amplifier comprises a balanced output signal.

5. The transmitter circuitry of claim 4, wherein the impedance matching network comprises a first impedance matching network configured to receive a first signal of the balanced output signal and a second impedance matching network configured to receive a second signal of the balanced output signal.

6. The transmitter circuitry of claim 4 or 5, wherein the first scaling apparatus is configured to:scale a first balanced signal obtained from the first node and provide a first balanced scaled signal to the signal combining apparatus.

7. The transmitter circuitry of any of claims 4 to 6, wherein the second scaling apparatus is configured to: scale a second balanced signal obtained from the second node and provide a second balanced scaled signal to the signal combining apparatus.

8. The transmitter circuitry of claim 7 when dependent on claim 6, wherein the signal combining apparatus is configured to combine the first balanced scaled signal and the second balanced scaled signal.

9. The transmitter circuitry of claim 4 or 5, wherein: the first scaling apparatus is configured to scale a first balanced signal obtained from the first node and provide a first single ended scaled signal to the signal combining apparatus; the second scaling apparatus is configured to scale a second balanced signal obtained from the second node and provide a second single ended scaled signal to the signal combining apparatus; and the signal combining apparatus is configured to combine the first single ended scaled signal and the second single ended scaled signal.

10. The transmitter circuitry of any of claims 4 to 9, comprising conversion apparatus configured to convert a balanced signal at the second node to a single ended signal and provide the single ended signal to the antenna node.11 . The transmitter circuitry of any of claims 1 to 10, wherein: the first scaling apparatus is configured such that the signal output from the first scaling apparatus is scaled by a first selectable amount; and / or the second scaling apparatus is configured such that the signal output from the second scaling apparatus is scaled by a second selectable amount.

12. The transmitter circuitry of any of claims 1 to 11 , wherein: the first scaling apparatus comprises a first attenuator; and / or the second scaling apparatus comprises a second attenuator.

13. The transmitter circuitry of any of claims 1 to 12, wherein:the signal obtained from the first node comprises a first voltage at the first node; and / or the signal obtained from the second node comprises a second voltage at the second node.

14. The transmitter circuitry of any of claims 1 to 13, wherein the second scaling apparatus is configured to compensate for a change in a level of the signal between the input of the impedance matching network and the output of the impedance matching network.

15. The transmitter circuitry of any of claims 1 to 14, wherein the signal combining apparatus is configured to combine the signal output from the first scaling apparatus and the signal output from the second scaling apparatus by summing or linearly combining the signal output from the first scaling apparatus and the signal output from the second scaling apparatus.

16. The transmitter circuitry of any of claims 1 to 15, wherein the impedance matching network comprises a pi-shaped impedance matching network, an L-shaped impedance matching network, and / or a T-shaped impedance matching network.

17. The transmitter circuitry of any of claims 1 to 16, wherein the signal combining apparatus comprises a vector modulator.

18. The transmitter circuitry of any of claims 1 to 17, wherein the signal between the first node and the second node comprises a carrier frequency signal.

19. The transmitter circuitry of any of claims 1 to 18, wherein the impedance matching network is configured such that the phase difference of the signal between the first node and the second node is substantially 90 degrees.

20. A wireless communications device comprising the transmitter circuitry of any of claims 1 to 19.

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